xref: /openbmc/linux/drivers/irqchip/Kconfig (revision e2f1cf25)
1config IRQCHIP
2	def_bool y
3	depends on OF_IRQ
4
5config ARM_GIC
6	bool
7	select IRQ_DOMAIN
8	select IRQ_DOMAIN_HIERARCHY
9	select MULTI_IRQ_HANDLER
10
11config ARM_GIC_V2M
12	bool
13	depends on ARM_GIC
14	depends on PCI && PCI_MSI
15	select PCI_MSI_IRQ_DOMAIN
16
17config GIC_NON_BANKED
18	bool
19
20config ARM_GIC_V3
21	bool
22	select IRQ_DOMAIN
23	select MULTI_IRQ_HANDLER
24	select IRQ_DOMAIN_HIERARCHY
25
26config ARM_GIC_V3_ITS
27	bool
28	select PCI_MSI_IRQ_DOMAIN
29
30config ARM_NVIC
31	bool
32	select IRQ_DOMAIN
33	select IRQ_DOMAIN_HIERARCHY
34	select GENERIC_IRQ_CHIP
35
36config ARM_VIC
37	bool
38	select IRQ_DOMAIN
39	select MULTI_IRQ_HANDLER
40
41config ARM_VIC_NR
42	int
43	default 4 if ARCH_S5PV210
44	default 2
45	depends on ARM_VIC
46	help
47	  The maximum number of VICs available in the system, for
48	  power management.
49
50config ATMEL_AIC_IRQ
51	bool
52	select GENERIC_IRQ_CHIP
53	select IRQ_DOMAIN
54	select MULTI_IRQ_HANDLER
55	select SPARSE_IRQ
56
57config ATMEL_AIC5_IRQ
58	bool
59	select GENERIC_IRQ_CHIP
60	select IRQ_DOMAIN
61	select MULTI_IRQ_HANDLER
62	select SPARSE_IRQ
63
64config BCM7038_L1_IRQ
65	bool
66	select GENERIC_IRQ_CHIP
67	select IRQ_DOMAIN
68
69config BCM7120_L2_IRQ
70	bool
71	select GENERIC_IRQ_CHIP
72	select IRQ_DOMAIN
73
74config BRCMSTB_L2_IRQ
75	bool
76	select GENERIC_IRQ_CHIP
77	select IRQ_DOMAIN
78
79config DW_APB_ICTL
80	bool
81	select GENERIC_IRQ_CHIP
82	select IRQ_DOMAIN
83
84config IMGPDC_IRQ
85	bool
86	select GENERIC_IRQ_CHIP
87	select IRQ_DOMAIN
88
89config IRQ_MIPS_CPU
90	bool
91	select GENERIC_IRQ_CHIP
92	select IRQ_DOMAIN
93
94config CLPS711X_IRQCHIP
95	bool
96	depends on ARCH_CLPS711X
97	select IRQ_DOMAIN
98	select MULTI_IRQ_HANDLER
99	select SPARSE_IRQ
100	default y
101
102config OR1K_PIC
103	bool
104	select IRQ_DOMAIN
105
106config OMAP_IRQCHIP
107	bool
108	select GENERIC_IRQ_CHIP
109	select IRQ_DOMAIN
110
111config ORION_IRQCHIP
112	bool
113	select IRQ_DOMAIN
114	select MULTI_IRQ_HANDLER
115
116config RENESAS_INTC_IRQPIN
117	bool
118	select IRQ_DOMAIN
119
120config RENESAS_IRQC
121	bool
122	select IRQ_DOMAIN
123
124config ST_IRQCHIP
125	bool
126	select REGMAP
127	select MFD_SYSCON
128	help
129	  Enables SysCfg Controlled IRQs on STi based platforms.
130
131config TB10X_IRQC
132	bool
133	select IRQ_DOMAIN
134	select GENERIC_IRQ_CHIP
135
136config VERSATILE_FPGA_IRQ
137	bool
138	select IRQ_DOMAIN
139
140config VERSATILE_FPGA_IRQ_NR
141       int
142       default 4
143       depends on VERSATILE_FPGA_IRQ
144
145config XTENSA_MX
146	bool
147	select IRQ_DOMAIN
148
149config IRQ_CROSSBAR
150	bool
151	help
152	  Support for a CROSSBAR ip that precedes the main interrupt controller.
153	  The primary irqchip invokes the crossbar's callback which inturn allocates
154	  a free irq and configures the IP. Thus the peripheral interrupts are
155	  routed to one of the free irqchip interrupt lines.
156
157config KEYSTONE_IRQ
158	tristate "Keystone 2 IRQ controller IP"
159	depends on ARCH_KEYSTONE
160	help
161		Support for Texas Instruments Keystone 2 IRQ controller IP which
162		is part of the Keystone 2 IPC mechanism
163
164config MIPS_GIC
165	bool
166	select MIPS_CM
167
168config INGENIC_IRQ
169	bool
170	depends on MACH_INGENIC
171	default y
172
173config RENESAS_H8300H_INTC
174        bool
175	select IRQ_DOMAIN
176
177config RENESAS_H8S_INTC
178        bool
179	select IRQ_DOMAIN
180