xref: /openbmc/linux/drivers/irqchip/Kconfig (revision cd4d09ec)
1config IRQCHIP
2	def_bool y
3	depends on OF_IRQ
4
5config ARM_GIC
6	bool
7	select IRQ_DOMAIN
8	select IRQ_DOMAIN_HIERARCHY
9	select MULTI_IRQ_HANDLER
10
11config ARM_GIC_MAX_NR
12	int
13	default 2 if ARCH_REALVIEW
14	default 1
15
16config ARM_GIC_V2M
17	bool
18	depends on ARM_GIC
19	depends on PCI && PCI_MSI
20	select PCI_MSI_IRQ_DOMAIN
21
22config GIC_NON_BANKED
23	bool
24
25config ARM_GIC_V3
26	bool
27	select IRQ_DOMAIN
28	select MULTI_IRQ_HANDLER
29	select IRQ_DOMAIN_HIERARCHY
30
31config ARM_GIC_V3_ITS
32	bool
33	select PCI_MSI_IRQ_DOMAIN
34
35config HISILICON_IRQ_MBIGEN
36	bool "Support mbigen interrupt controller"
37	default n
38	depends on ARM_GIC_V3 && ARM_GIC_V3_ITS && GENERIC_MSI_IRQ_DOMAIN
39	help
40	 Enable the mbigen interrupt controller used on
41	 Hisilicon platform.
42
43config ARM_NVIC
44	bool
45	select IRQ_DOMAIN
46	select IRQ_DOMAIN_HIERARCHY
47	select GENERIC_IRQ_CHIP
48
49config ARM_VIC
50	bool
51	select IRQ_DOMAIN
52	select MULTI_IRQ_HANDLER
53
54config ARM_VIC_NR
55	int
56	default 4 if ARCH_S5PV210
57	default 2
58	depends on ARM_VIC
59	help
60	  The maximum number of VICs available in the system, for
61	  power management.
62
63config ATMEL_AIC_IRQ
64	bool
65	select GENERIC_IRQ_CHIP
66	select IRQ_DOMAIN
67	select MULTI_IRQ_HANDLER
68	select SPARSE_IRQ
69
70config ATMEL_AIC5_IRQ
71	bool
72	select GENERIC_IRQ_CHIP
73	select IRQ_DOMAIN
74	select MULTI_IRQ_HANDLER
75	select SPARSE_IRQ
76
77config I8259
78	bool
79	select IRQ_DOMAIN
80
81config BCM7038_L1_IRQ
82	bool
83	select GENERIC_IRQ_CHIP
84	select IRQ_DOMAIN
85
86config BCM7120_L2_IRQ
87	bool
88	select GENERIC_IRQ_CHIP
89	select IRQ_DOMAIN
90
91config BRCMSTB_L2_IRQ
92	bool
93	select GENERIC_IRQ_CHIP
94	select IRQ_DOMAIN
95
96config DW_APB_ICTL
97	bool
98	select GENERIC_IRQ_CHIP
99	select IRQ_DOMAIN
100
101config IMGPDC_IRQ
102	bool
103	select GENERIC_IRQ_CHIP
104	select IRQ_DOMAIN
105
106config IRQ_MIPS_CPU
107	bool
108	select GENERIC_IRQ_CHIP
109	select IRQ_DOMAIN
110
111config CLPS711X_IRQCHIP
112	bool
113	depends on ARCH_CLPS711X
114	select IRQ_DOMAIN
115	select MULTI_IRQ_HANDLER
116	select SPARSE_IRQ
117	default y
118
119config OR1K_PIC
120	bool
121	select IRQ_DOMAIN
122
123config OMAP_IRQCHIP
124	bool
125	select GENERIC_IRQ_CHIP
126	select IRQ_DOMAIN
127
128config ORION_IRQCHIP
129	bool
130	select IRQ_DOMAIN
131	select MULTI_IRQ_HANDLER
132
133config PIC32_EVIC
134	bool
135	select GENERIC_IRQ_CHIP
136	select IRQ_DOMAIN
137
138config RENESAS_INTC_IRQPIN
139	bool
140	select IRQ_DOMAIN
141
142config RENESAS_IRQC
143	bool
144	select GENERIC_IRQ_CHIP
145	select IRQ_DOMAIN
146
147config ST_IRQCHIP
148	bool
149	select REGMAP
150	select MFD_SYSCON
151	help
152	  Enables SysCfg Controlled IRQs on STi based platforms.
153
154config TB10X_IRQC
155	bool
156	select IRQ_DOMAIN
157	select GENERIC_IRQ_CHIP
158
159config TS4800_IRQ
160	tristate "TS-4800 IRQ controller"
161	select IRQ_DOMAIN
162	help
163	  Support for the TS-4800 FPGA IRQ controller
164
165config VERSATILE_FPGA_IRQ
166	bool
167	select IRQ_DOMAIN
168
169config VERSATILE_FPGA_IRQ_NR
170       int
171       default 4
172       depends on VERSATILE_FPGA_IRQ
173
174config XTENSA_MX
175	bool
176	select IRQ_DOMAIN
177
178config IRQ_CROSSBAR
179	bool
180	help
181	  Support for a CROSSBAR ip that precedes the main interrupt controller.
182	  The primary irqchip invokes the crossbar's callback which inturn allocates
183	  a free irq and configures the IP. Thus the peripheral interrupts are
184	  routed to one of the free irqchip interrupt lines.
185
186config KEYSTONE_IRQ
187	tristate "Keystone 2 IRQ controller IP"
188	depends on ARCH_KEYSTONE
189	help
190		Support for Texas Instruments Keystone 2 IRQ controller IP which
191		is part of the Keystone 2 IPC mechanism
192
193config MIPS_GIC
194	bool
195	select MIPS_CM
196
197config INGENIC_IRQ
198	bool
199	depends on MACH_INGENIC
200	default y
201
202config RENESAS_H8300H_INTC
203        bool
204	select IRQ_DOMAIN
205
206config RENESAS_H8S_INTC
207        bool
208	select IRQ_DOMAIN
209
210config IMX_GPCV2
211	bool
212	select IRQ_DOMAIN
213	help
214	  Enables the wakeup IRQs for IMX platforms with GPCv2 block
215
216config IRQ_MXS
217	def_bool y if MACH_ASM9260 || ARCH_MXS
218	select IRQ_DOMAIN
219	select STMP_DEVICE
220