1config IRQCHIP 2 def_bool y 3 depends on OF_IRQ 4 5config ARM_GIC 6 bool 7 select IRQ_DOMAIN 8 select IRQ_DOMAIN_HIERARCHY 9 select MULTI_IRQ_HANDLER 10 11config ARM_GIC_V2M 12 bool 13 depends on ARM_GIC 14 depends on PCI && PCI_MSI 15 select PCI_MSI_IRQ_DOMAIN 16 17config GIC_NON_BANKED 18 bool 19 20config ARM_GIC_V3 21 bool 22 select IRQ_DOMAIN 23 select MULTI_IRQ_HANDLER 24 select IRQ_DOMAIN_HIERARCHY 25 26config ARM_GIC_V3_ITS 27 bool 28 select PCI_MSI_IRQ_DOMAIN 29 30config ARM_NVIC 31 bool 32 select IRQ_DOMAIN 33 select IRQ_DOMAIN_HIERARCHY 34 select GENERIC_IRQ_CHIP 35 36config ARM_VIC 37 bool 38 select IRQ_DOMAIN 39 select MULTI_IRQ_HANDLER 40 41config ARM_VIC_NR 42 int 43 default 4 if ARCH_S5PV210 44 default 2 45 depends on ARM_VIC 46 help 47 The maximum number of VICs available in the system, for 48 power management. 49 50config ATMEL_AIC_IRQ 51 bool 52 select GENERIC_IRQ_CHIP 53 select IRQ_DOMAIN 54 select MULTI_IRQ_HANDLER 55 select SPARSE_IRQ 56 57config ATMEL_AIC5_IRQ 58 bool 59 select GENERIC_IRQ_CHIP 60 select IRQ_DOMAIN 61 select MULTI_IRQ_HANDLER 62 select SPARSE_IRQ 63 64config I8259 65 bool 66 select IRQ_DOMAIN 67 68config BCM7038_L1_IRQ 69 bool 70 select GENERIC_IRQ_CHIP 71 select IRQ_DOMAIN 72 73config BCM7120_L2_IRQ 74 bool 75 select GENERIC_IRQ_CHIP 76 select IRQ_DOMAIN 77 78config BRCMSTB_L2_IRQ 79 bool 80 select GENERIC_IRQ_CHIP 81 select IRQ_DOMAIN 82 83config DW_APB_ICTL 84 bool 85 select GENERIC_IRQ_CHIP 86 select IRQ_DOMAIN 87 88config IMGPDC_IRQ 89 bool 90 select GENERIC_IRQ_CHIP 91 select IRQ_DOMAIN 92 93config IRQ_MIPS_CPU 94 bool 95 select GENERIC_IRQ_CHIP 96 select IRQ_DOMAIN 97 98config CLPS711X_IRQCHIP 99 bool 100 depends on ARCH_CLPS711X 101 select IRQ_DOMAIN 102 select MULTI_IRQ_HANDLER 103 select SPARSE_IRQ 104 default y 105 106config OR1K_PIC 107 bool 108 select IRQ_DOMAIN 109 110config OMAP_IRQCHIP 111 bool 112 select GENERIC_IRQ_CHIP 113 select IRQ_DOMAIN 114 115config ORION_IRQCHIP 116 bool 117 select IRQ_DOMAIN 118 select MULTI_IRQ_HANDLER 119 120config PIC32_EVIC 121 bool 122 select GENERIC_IRQ_CHIP 123 select IRQ_DOMAIN 124 125config RENESAS_INTC_IRQPIN 126 bool 127 select IRQ_DOMAIN 128 129config RENESAS_IRQC 130 bool 131 select GENERIC_IRQ_CHIP 132 select IRQ_DOMAIN 133 134config ST_IRQCHIP 135 bool 136 select REGMAP 137 select MFD_SYSCON 138 help 139 Enables SysCfg Controlled IRQs on STi based platforms. 140 141config TB10X_IRQC 142 bool 143 select IRQ_DOMAIN 144 select GENERIC_IRQ_CHIP 145 146config VERSATILE_FPGA_IRQ 147 bool 148 select IRQ_DOMAIN 149 150config VERSATILE_FPGA_IRQ_NR 151 int 152 default 4 153 depends on VERSATILE_FPGA_IRQ 154 155config XTENSA_MX 156 bool 157 select IRQ_DOMAIN 158 159config IRQ_CROSSBAR 160 bool 161 help 162 Support for a CROSSBAR ip that precedes the main interrupt controller. 163 The primary irqchip invokes the crossbar's callback which inturn allocates 164 a free irq and configures the IP. Thus the peripheral interrupts are 165 routed to one of the free irqchip interrupt lines. 166 167config KEYSTONE_IRQ 168 tristate "Keystone 2 IRQ controller IP" 169 depends on ARCH_KEYSTONE 170 help 171 Support for Texas Instruments Keystone 2 IRQ controller IP which 172 is part of the Keystone 2 IPC mechanism 173 174config MIPS_GIC 175 bool 176 select MIPS_CM 177 178config INGENIC_IRQ 179 bool 180 depends on MACH_INGENIC 181 default y 182 183config RENESAS_H8300H_INTC 184 bool 185 select IRQ_DOMAIN 186 187config RENESAS_H8S_INTC 188 bool 189 select IRQ_DOMAIN 190 191config IMX_GPCV2 192 bool 193 select IRQ_DOMAIN 194 help 195 Enables the wakeup IRQs for IMX platforms with GPCv2 block 196 197config IRQ_MXS 198 def_bool y if MACH_ASM9260 || ARCH_MXS 199 select IRQ_DOMAIN 200 select STMP_DEVICE 201