1f6e916b8SThomas Petazzoniconfig IRQCHIP 2f6e916b8SThomas Petazzoni def_bool y 3f6e916b8SThomas Petazzoni depends on OF_IRQ 4f6e916b8SThomas Petazzoni 581243e44SRob Herringconfig ARM_GIC 681243e44SRob Herring bool 781243e44SRob Herring select IRQ_DOMAIN 881243e44SRob Herring select MULTI_IRQ_HANDLER 981243e44SRob Herring 1081243e44SRob Herringconfig GIC_NON_BANKED 1181243e44SRob Herring bool 1281243e44SRob Herring 13021f6537SMarc Zyngierconfig ARM_GIC_V3 14021f6537SMarc Zyngier bool 15021f6537SMarc Zyngier select IRQ_DOMAIN 16021f6537SMarc Zyngier select MULTI_IRQ_HANDLER 17021f6537SMarc Zyngier 18292ec080SUwe Kleine-Königconfig ARM_NVIC 19292ec080SUwe Kleine-König bool 20292ec080SUwe Kleine-König select IRQ_DOMAIN 21292ec080SUwe Kleine-König select GENERIC_IRQ_CHIP 22292ec080SUwe Kleine-König 2344430ec0SRob Herringconfig ARM_VIC 2444430ec0SRob Herring bool 2544430ec0SRob Herring select IRQ_DOMAIN 2644430ec0SRob Herring select MULTI_IRQ_HANDLER 2744430ec0SRob Herring 2844430ec0SRob Herringconfig ARM_VIC_NR 2944430ec0SRob Herring int 3044430ec0SRob Herring default 4 if ARCH_S5PV210 3144430ec0SRob Herring default 2 3244430ec0SRob Herring depends on ARM_VIC 3344430ec0SRob Herring help 3444430ec0SRob Herring The maximum number of VICs available in the system, for 3544430ec0SRob Herring power management. 3644430ec0SRob Herring 37b1479ebbSBoris BREZILLONconfig ATMEL_AIC_IRQ 38b1479ebbSBoris BREZILLON bool 39b1479ebbSBoris BREZILLON select GENERIC_IRQ_CHIP 40b1479ebbSBoris BREZILLON select IRQ_DOMAIN 41b1479ebbSBoris BREZILLON select MULTI_IRQ_HANDLER 42b1479ebbSBoris BREZILLON select SPARSE_IRQ 43b1479ebbSBoris BREZILLON 44b1479ebbSBoris BREZILLONconfig ATMEL_AIC5_IRQ 45b1479ebbSBoris BREZILLON bool 46b1479ebbSBoris BREZILLON select GENERIC_IRQ_CHIP 47b1479ebbSBoris BREZILLON select IRQ_DOMAIN 48b1479ebbSBoris BREZILLON select MULTI_IRQ_HANDLER 49b1479ebbSBoris BREZILLON select SPARSE_IRQ 50b1479ebbSBoris BREZILLON 517f646e92SFlorian Fainelliconfig BRCMSTB_L2_IRQ 527f646e92SFlorian Fainelli bool 537f646e92SFlorian Fainelli depends on ARM 547f646e92SFlorian Fainelli select GENERIC_IRQ_CHIP 557f646e92SFlorian Fainelli select IRQ_DOMAIN 567f646e92SFlorian Fainelli 57350d71b9SSebastian Hesselbarthconfig DW_APB_ICTL 58350d71b9SSebastian Hesselbarth bool 59350d71b9SSebastian Hesselbarth select IRQ_DOMAIN 60350d71b9SSebastian Hesselbarth 61b6ef9161SJames Hoganconfig IMGPDC_IRQ 62b6ef9161SJames Hogan bool 63b6ef9161SJames Hogan select GENERIC_IRQ_CHIP 64b6ef9161SJames Hogan select IRQ_DOMAIN 65b6ef9161SJames Hogan 66afc98d90SAlexander Shiyanconfig CLPS711X_IRQCHIP 67afc98d90SAlexander Shiyan bool 68afc98d90SAlexander Shiyan depends on ARCH_CLPS711X 69afc98d90SAlexander Shiyan select IRQ_DOMAIN 70afc98d90SAlexander Shiyan select MULTI_IRQ_HANDLER 71afc98d90SAlexander Shiyan select SPARSE_IRQ 72afc98d90SAlexander Shiyan default y 73afc98d90SAlexander Shiyan 744db8e6d2SStefan Kristianssonconfig OR1K_PIC 754db8e6d2SStefan Kristiansson bool 764db8e6d2SStefan Kristiansson select IRQ_DOMAIN 774db8e6d2SStefan Kristiansson 789dbd90f1SSebastian Hesselbarthconfig ORION_IRQCHIP 799dbd90f1SSebastian Hesselbarth bool 809dbd90f1SSebastian Hesselbarth select IRQ_DOMAIN 819dbd90f1SSebastian Hesselbarth select MULTI_IRQ_HANDLER 829dbd90f1SSebastian Hesselbarth 8344358048SMagnus Dammconfig RENESAS_INTC_IRQPIN 8444358048SMagnus Damm bool 8544358048SMagnus Damm select IRQ_DOMAIN 8644358048SMagnus Damm 87fbc83b7fSMagnus Dammconfig RENESAS_IRQC 88fbc83b7fSMagnus Damm bool 89fbc83b7fSMagnus Damm select IRQ_DOMAIN 90fbc83b7fSMagnus Damm 91b06eb017SChristian Ruppertconfig TB10X_IRQC 92b06eb017SChristian Ruppert bool 93b06eb017SChristian Ruppert select IRQ_DOMAIN 94b06eb017SChristian Ruppert select GENERIC_IRQ_CHIP 95b06eb017SChristian Ruppert 962389d501SLinus Walleijconfig VERSATILE_FPGA_IRQ 972389d501SLinus Walleij bool 982389d501SLinus Walleij select IRQ_DOMAIN 992389d501SLinus Walleij 1002389d501SLinus Walleijconfig VERSATILE_FPGA_IRQ_NR 1012389d501SLinus Walleij int 1022389d501SLinus Walleij default 4 1032389d501SLinus Walleij depends on VERSATILE_FPGA_IRQ 10426a8e96aSMax Filippov 10526a8e96aSMax Filippovconfig XTENSA_MX 10626a8e96aSMax Filippov bool 10726a8e96aSMax Filippov select IRQ_DOMAIN 10896ca848eSSricharan R 10996ca848eSSricharan Rconfig IRQ_CROSSBAR 11096ca848eSSricharan R bool 11196ca848eSSricharan R help 11296ca848eSSricharan R Support for a CROSSBAR ip that preceeds the main interrupt controller. 11396ca848eSSricharan R The primary irqchip invokes the crossbar's callback which inturn allocates 11496ca848eSSricharan R a free irq and configures the IP. Thus the peripheral interrupts are 11596ca848eSSricharan R routed to one of the free irqchip interrupt lines. 11689323f8cSGrygorii Strashko 11789323f8cSGrygorii Strashkoconfig KEYSTONE_IRQ 11889323f8cSGrygorii Strashko tristate "Keystone 2 IRQ controller IP" 11989323f8cSGrygorii Strashko depends on ARCH_KEYSTONE 12089323f8cSGrygorii Strashko help 12189323f8cSGrygorii Strashko Support for Texas Instruments Keystone 2 IRQ controller IP which 12289323f8cSGrygorii Strashko is part of the Keystone 2 IPC mechanism 123