1f6e916b8SThomas Petazzoniconfig IRQCHIP 2f6e916b8SThomas Petazzoni def_bool y 3f6e916b8SThomas Petazzoni depends on OF_IRQ 4f6e916b8SThomas Petazzoni 581243e44SRob Herringconfig ARM_GIC 681243e44SRob Herring bool 781243e44SRob Herring select IRQ_DOMAIN 881243e44SRob Herring select MULTI_IRQ_HANDLER 981243e44SRob Herring 1081243e44SRob Herringconfig GIC_NON_BANKED 1181243e44SRob Herring bool 1281243e44SRob Herring 1344430ec0SRob Herringconfig ARM_VIC 1444430ec0SRob Herring bool 1544430ec0SRob Herring select IRQ_DOMAIN 1644430ec0SRob Herring select MULTI_IRQ_HANDLER 1744430ec0SRob Herring 1844430ec0SRob Herringconfig ARM_VIC_NR 1944430ec0SRob Herring int 2044430ec0SRob Herring default 4 if ARCH_S5PV210 2144430ec0SRob Herring default 3 if ARCH_S5PC100 2244430ec0SRob Herring default 2 2344430ec0SRob Herring depends on ARM_VIC 2444430ec0SRob Herring help 2544430ec0SRob Herring The maximum number of VICs available in the system, for 2644430ec0SRob Herring power management. 2744430ec0SRob Herring 2844358048SMagnus Dammconfig RENESAS_INTC_IRQPIN 2944358048SMagnus Damm bool 3044358048SMagnus Damm select IRQ_DOMAIN 3144358048SMagnus Damm 322389d501SLinus Walleijconfig VERSATILE_FPGA_IRQ 332389d501SLinus Walleij bool 342389d501SLinus Walleij select IRQ_DOMAIN 352389d501SLinus Walleij 362389d501SLinus Walleijconfig VERSATILE_FPGA_IRQ_NR 372389d501SLinus Walleij int 382389d501SLinus Walleij default 4 392389d501SLinus Walleij depends on VERSATILE_FPGA_IRQ 40