1ec8f24b7SThomas Gleixner# SPDX-License-Identifier: GPL-2.0-only 2c94fb639SRandy Dunlapmenu "IRQ chip support" 3c94fb639SRandy Dunlap 4f6e916b8SThomas Petazzoniconfig IRQCHIP 5f6e916b8SThomas Petazzoni def_bool y 6f6e916b8SThomas Petazzoni depends on OF_IRQ 7f6e916b8SThomas Petazzoni 881243e44SRob Herringconfig ARM_GIC 981243e44SRob Herring bool 109a1091efSYingjoe Chen select IRQ_DOMAIN_HIERARCHY 110c9e4982SMarc Zyngier select GENERIC_IRQ_EFFECTIVE_AFF_MASK 1281243e44SRob Herring 139c8edddfSJon Hunterconfig ARM_GIC_PM 149c8edddfSJon Hunter bool 159c8edddfSJon Hunter depends on PM 169c8edddfSJon Hunter select ARM_GIC 179c8edddfSJon Hunter 18a27d21e0SLinus Walleijconfig ARM_GIC_MAX_NR 19a27d21e0SLinus Walleij int 2070265523SJiangfeng Xiao depends on ARM_GIC 21a27d21e0SLinus Walleij default 2 if ARCH_REALVIEW 22a27d21e0SLinus Walleij default 1 23a27d21e0SLinus Walleij 24853a33ceSSuravee Suthikulpanitconfig ARM_GIC_V2M 25853a33ceSSuravee Suthikulpanit bool 263ee80364SArnd Bergmann depends on PCI 273ee80364SArnd Bergmann select ARM_GIC 283ee80364SArnd Bergmann select PCI_MSI 29853a33ceSSuravee Suthikulpanit 3081243e44SRob Herringconfig GIC_NON_BANKED 3181243e44SRob Herring bool 3281243e44SRob Herring 33021f6537SMarc Zyngierconfig ARM_GIC_V3 34021f6537SMarc Zyngier bool 35443acc4fSMarc Zyngier select IRQ_DOMAIN_HIERARCHY 36e3825ba1SMarc Zyngier select PARTITION_PERCPU 37956ae91aSMarc Zyngier select GENERIC_IRQ_EFFECTIVE_AFF_MASK 38021f6537SMarc Zyngier 3919812729SMarc Zyngierconfig ARM_GIC_V3_ITS 4019812729SMarc Zyngier bool 4129f41139SMarc Zyngier select GENERIC_MSI_IRQ_DOMAIN 4229f41139SMarc Zyngier default ARM_GIC_V3 4329f41139SMarc Zyngier 4429f41139SMarc Zyngierconfig ARM_GIC_V3_ITS_PCI 4529f41139SMarc Zyngier bool 4629f41139SMarc Zyngier depends on ARM_GIC_V3_ITS 473ee80364SArnd Bergmann depends on PCI 483ee80364SArnd Bergmann depends on PCI_MSI 4929f41139SMarc Zyngier default ARM_GIC_V3_ITS 50292ec080SUwe Kleine-König 517afe031cSBogdan Purcareataconfig ARM_GIC_V3_ITS_FSL_MC 527afe031cSBogdan Purcareata bool 537afe031cSBogdan Purcareata depends on ARM_GIC_V3_ITS 547afe031cSBogdan Purcareata depends on FSL_MC_BUS 557afe031cSBogdan Purcareata default ARM_GIC_V3_ITS 567afe031cSBogdan Purcareata 5744430ec0SRob Herringconfig ARM_NVIC 5844430ec0SRob Herring bool 592d9f59f7SStefan Agner select IRQ_DOMAIN_HIERARCHY 6044430ec0SRob Herring select GENERIC_IRQ_CHIP 6144430ec0SRob Herring 6244430ec0SRob Herringconfig ARM_VIC 6344430ec0SRob Herring bool 6444430ec0SRob Herring select IRQ_DOMAIN 6544430ec0SRob Herring 6644430ec0SRob Herringconfig ARM_VIC_NR 6744430ec0SRob Herring int 6844430ec0SRob Herring default 4 if ARCH_S5PV210 6944430ec0SRob Herring default 2 7044430ec0SRob Herring depends on ARM_VIC 7144430ec0SRob Herring help 7244430ec0SRob Herring The maximum number of VICs available in the system, for 7344430ec0SRob Herring power management. 7444430ec0SRob Herring 75fed6d336SThomas Petazzoniconfig ARMADA_370_XP_IRQ 76fed6d336SThomas Petazzoni bool 77fed6d336SThomas Petazzoni select GENERIC_IRQ_CHIP 783ee80364SArnd Bergmann select PCI_MSI if PCI 79e31793a3SMarc Zyngier select GENERIC_IRQ_EFFECTIVE_AFF_MASK 80fed6d336SThomas Petazzoni 81e6b78f2cSAntoine Tenartconfig ALPINE_MSI 82e6b78f2cSAntoine Tenart bool 833ee80364SArnd Bergmann depends on PCI 843ee80364SArnd Bergmann select PCI_MSI 85e6b78f2cSAntoine Tenart select GENERIC_IRQ_CHIP 86e6b78f2cSAntoine Tenart 871eb77c3bSTalel Shenharconfig AL_FIC 881eb77c3bSTalel Shenhar bool "Amazon's Annapurna Labs Fabric Interrupt Controller" 891eb77c3bSTalel Shenhar depends on OF || COMPILE_TEST 901eb77c3bSTalel Shenhar select GENERIC_IRQ_CHIP 911eb77c3bSTalel Shenhar select IRQ_DOMAIN 921eb77c3bSTalel Shenhar help 931eb77c3bSTalel Shenhar Support Amazon's Annapurna Labs Fabric Interrupt Controller. 941eb77c3bSTalel Shenhar 95b1479ebbSBoris BREZILLONconfig ATMEL_AIC_IRQ 96b1479ebbSBoris BREZILLON bool 97b1479ebbSBoris BREZILLON select GENERIC_IRQ_CHIP 98b1479ebbSBoris BREZILLON select IRQ_DOMAIN 99b1479ebbSBoris BREZILLON select SPARSE_IRQ 100b1479ebbSBoris BREZILLON 101b1479ebbSBoris BREZILLONconfig ATMEL_AIC5_IRQ 102b1479ebbSBoris BREZILLON bool 103b1479ebbSBoris BREZILLON select GENERIC_IRQ_CHIP 104b1479ebbSBoris BREZILLON select IRQ_DOMAIN 105b1479ebbSBoris BREZILLON select SPARSE_IRQ 106b1479ebbSBoris BREZILLON 1070509cfdeSRalf Baechleconfig I8259 1080509cfdeSRalf Baechle bool 1090509cfdeSRalf Baechle select IRQ_DOMAIN 1100509cfdeSRalf Baechle 111c7c42ec2SSimon Arlottconfig BCM6345_L1_IRQ 112c7c42ec2SSimon Arlott bool 113c7c42ec2SSimon Arlott select GENERIC_IRQ_CHIP 114c7c42ec2SSimon Arlott select IRQ_DOMAIN 115d0ed5e8eSMarc Zyngier select GENERIC_IRQ_EFFECTIVE_AFF_MASK 116c7c42ec2SSimon Arlott 1175f7f0317SKevin Cernekeeconfig BCM7038_L1_IRQ 118c057c799SFlorian Fainelli tristate "Broadcom STB 7038-style L1/L2 interrupt controller driver" 119c057c799SFlorian Fainelli depends on ARCH_BRCMSTB || BMIPS_GENERIC 120c057c799SFlorian Fainelli default ARCH_BRCMSTB || BMIPS_GENERIC 1215f7f0317SKevin Cernekee select GENERIC_IRQ_CHIP 1225f7f0317SKevin Cernekee select IRQ_DOMAIN 123b8d9884aSMarc Zyngier select GENERIC_IRQ_EFFECTIVE_AFF_MASK 1245f7f0317SKevin Cernekee 125a4fcbb86SKevin Cernekeeconfig BCM7120_L2_IRQ 1263ac268d5SFlorian Fainelli tristate "Broadcom STB 7120-style L2 interrupt controller driver" 1273ac268d5SFlorian Fainelli depends on ARCH_BRCMSTB || BMIPS_GENERIC 1283ac268d5SFlorian Fainelli default ARCH_BRCMSTB || BMIPS_GENERIC 129a4fcbb86SKevin Cernekee select GENERIC_IRQ_CHIP 130a4fcbb86SKevin Cernekee select IRQ_DOMAIN 131a4fcbb86SKevin Cernekee 1327f646e92SFlorian Fainelliconfig BRCMSTB_L2_IRQ 13351d9db5cSFlorian Fainelli tristate "Broadcom STB generic L2 interrupt controller driver" 13451d9db5cSFlorian Fainelli depends on ARCH_BCM2835 || ARCH_BRCMSTB || BMIPS_GENERIC 13551d9db5cSFlorian Fainelli default ARCH_BCM2835 || ARCH_BRCMSTB || BMIPS_GENERIC 1367f646e92SFlorian Fainelli select GENERIC_IRQ_CHIP 1377f646e92SFlorian Fainelli select IRQ_DOMAIN 1387f646e92SFlorian Fainelli 1390145beedSBartosz Golaszewskiconfig DAVINCI_AINTC 1400145beedSBartosz Golaszewski bool 1410145beedSBartosz Golaszewski select GENERIC_IRQ_CHIP 1420145beedSBartosz Golaszewski select IRQ_DOMAIN 1430145beedSBartosz Golaszewski 1440fc3d74cSBartosz Golaszewskiconfig DAVINCI_CP_INTC 1450fc3d74cSBartosz Golaszewski bool 1460fc3d74cSBartosz Golaszewski select GENERIC_IRQ_CHIP 1470fc3d74cSBartosz Golaszewski select IRQ_DOMAIN 1480fc3d74cSBartosz Golaszewski 149350d71b9SSebastian Hesselbarthconfig DW_APB_ICTL 150350d71b9SSebastian Hesselbarth bool 151e1588490SJisheng Zhang select GENERIC_IRQ_CHIP 15254a38440SZhen Lei select IRQ_DOMAIN_HIERARCHY 153350d71b9SSebastian Hesselbarth 1546ee532e2SLinus Walleijconfig FARADAY_FTINTC010 1556ee532e2SLinus Walleij bool 1566ee532e2SLinus Walleij select IRQ_DOMAIN 1576ee532e2SLinus Walleij select SPARSE_IRQ 1586ee532e2SLinus Walleij 1599a7c4abdSMaJunconfig HISILICON_IRQ_MBIGEN 1609a7c4abdSMaJun bool 1619a7c4abdSMaJun select ARM_GIC_V3 1629a7c4abdSMaJun select ARM_GIC_V3_ITS 1639a7c4abdSMaJun 164b6ef9161SJames Hoganconfig IMGPDC_IRQ 165b6ef9161SJames Hogan bool 166b6ef9161SJames Hogan select GENERIC_IRQ_CHIP 167b6ef9161SJames Hogan select IRQ_DOMAIN 168b6ef9161SJames Hogan 1695b978c10SLinus Walleijconfig IXP4XX_IRQ 1705b978c10SLinus Walleij bool 1715b978c10SLinus Walleij select IRQ_DOMAIN 1725b978c10SLinus Walleij select SPARSE_IRQ 1735b978c10SLinus Walleij 174da0abe1aSRichard Fitzgeraldconfig MADERA_IRQ 175da0abe1aSRichard Fitzgerald tristate 176da0abe1aSRichard Fitzgerald 17767e38cf2SRalf Baechleconfig IRQ_MIPS_CPU 17867e38cf2SRalf Baechle bool 17967e38cf2SRalf Baechle select GENERIC_IRQ_CHIP 180*0f5209feSSamuel Holland select GENERIC_IRQ_IPI if SMP && SYS_SUPPORTS_MULTITHREADING 18167e38cf2SRalf Baechle select IRQ_DOMAIN 18218416e45SMarc Zyngier select GENERIC_IRQ_EFFECTIVE_AFF_MASK 18367e38cf2SRalf Baechle 184afc98d90SAlexander Shiyanconfig CLPS711X_IRQCHIP 185afc98d90SAlexander Shiyan bool 186afc98d90SAlexander Shiyan depends on ARCH_CLPS711X 187afc98d90SAlexander Shiyan select IRQ_DOMAIN 188afc98d90SAlexander Shiyan select SPARSE_IRQ 189afc98d90SAlexander Shiyan default y 190afc98d90SAlexander Shiyan 1919b54470aSStafford Horneconfig OMPIC 1929b54470aSStafford Horne bool 1939b54470aSStafford Horne 1944db8e6d2SStefan Kristianssonconfig OR1K_PIC 1954db8e6d2SStefan Kristiansson bool 1964db8e6d2SStefan Kristiansson select IRQ_DOMAIN 1974db8e6d2SStefan Kristiansson 1988598066cSFelipe Balbiconfig OMAP_IRQCHIP 1998598066cSFelipe Balbi bool 2008598066cSFelipe Balbi select GENERIC_IRQ_CHIP 2018598066cSFelipe Balbi select IRQ_DOMAIN 2028598066cSFelipe Balbi 2039dbd90f1SSebastian Hesselbarthconfig ORION_IRQCHIP 2049dbd90f1SSebastian Hesselbarth bool 2059dbd90f1SSebastian Hesselbarth select IRQ_DOMAIN 2069dbd90f1SSebastian Hesselbarth 207aaa8666aSCristian Birsanconfig PIC32_EVIC 208aaa8666aSCristian Birsan bool 209aaa8666aSCristian Birsan select GENERIC_IRQ_CHIP 210aaa8666aSCristian Birsan select IRQ_DOMAIN 211aaa8666aSCristian Birsan 212981b58f6SRich Felkerconfig JCORE_AIC 2133602ffdeSRich Felker bool "J-Core integrated AIC" if COMPILE_TEST 2143602ffdeSRich Felker depends on OF 215981b58f6SRich Felker select IRQ_DOMAIN 216981b58f6SRich Felker help 217981b58f6SRich Felker Support for the J-Core integrated AIC. 218981b58f6SRich Felker 219d852e62aSManivannan Sadhasivamconfig RDA_INTC 220d852e62aSManivannan Sadhasivam bool 221d852e62aSManivannan Sadhasivam select IRQ_DOMAIN 222d852e62aSManivannan Sadhasivam 22344358048SMagnus Dammconfig RENESAS_INTC_IRQPIN 22402d7e041SGeert Uytterhoeven bool "Renesas INTC External IRQ Pin Support" if COMPILE_TEST 22544358048SMagnus Damm select IRQ_DOMAIN 22602d7e041SGeert Uytterhoeven help 22702d7e041SGeert Uytterhoeven Enable support for the Renesas Interrupt Controller for external 22802d7e041SGeert Uytterhoeven interrupt pins, as found on SH/R-Mobile and R-Car Gen1 SoCs. 22944358048SMagnus Damm 230fbc83b7fSMagnus Dammconfig RENESAS_IRQC 23172d44c0cSLad Prabhakar bool "Renesas R-Mobile APE6, R-Car Gen{2,3} and RZ/G{1,2} IRQC support" if COMPILE_TEST 23299c221dfSMagnus Damm select GENERIC_IRQ_CHIP 233fbc83b7fSMagnus Damm select IRQ_DOMAIN 23402d7e041SGeert Uytterhoeven help 23502d7e041SGeert Uytterhoeven Enable support for the Renesas Interrupt Controller for external 23672d44c0cSLad Prabhakar devices, as found on R-Mobile APE6, R-Car Gen{2,3} and RZ/G{1,2} SoCs. 237fbc83b7fSMagnus Damm 238a644ccb8SGeert Uytterhoevenconfig RENESAS_RZA1_IRQC 23902d7e041SGeert Uytterhoeven bool "Renesas RZ/A1 IRQC support" if COMPILE_TEST 240a644ccb8SGeert Uytterhoeven select IRQ_DOMAIN_HIERARCHY 24102d7e041SGeert Uytterhoeven help 24202d7e041SGeert Uytterhoeven Enable support for the Renesas RZ/A1 Interrupt Controller, to use up 24302d7e041SGeert Uytterhoeven to 8 external interrupts with configurable sense select. 244a644ccb8SGeert Uytterhoeven 24503ac990eSMichael Walleconfig SL28CPLD_INTC 24603ac990eSMichael Walle bool "Kontron sl28cpld IRQ controller" 24703ac990eSMichael Walle depends on MFD_SL28CPLD=y || COMPILE_TEST 24803ac990eSMichael Walle select REGMAP_IRQ 24903ac990eSMichael Walle help 25003ac990eSMichael Walle Interrupt controller driver for the board management controller 25103ac990eSMichael Walle found on the Kontron sl28 CPLD. 25203ac990eSMichael Walle 25307088484SLee Jonesconfig ST_IRQCHIP 25407088484SLee Jones bool 25507088484SLee Jones select REGMAP 25607088484SLee Jones select MFD_SYSCON 25707088484SLee Jones help 25807088484SLee Jones Enables SysCfg Controlled IRQs on STi based platforms. 25907088484SLee Jones 260d421fd6dSSamuel Hollandconfig SUN4I_INTC 261d421fd6dSSamuel Holland bool 262d421fd6dSSamuel Holland 263d421fd6dSSamuel Hollandconfig SUN6I_R_INTC 264d421fd6dSSamuel Holland bool 265d421fd6dSSamuel Holland select IRQ_DOMAIN_HIERARCHY 266d421fd6dSSamuel Holland select IRQ_FASTEOI_HIERARCHY_HANDLERS 267d421fd6dSSamuel Holland 268d421fd6dSSamuel Hollandconfig SUNXI_NMI_INTC 269d421fd6dSSamuel Holland bool 270d421fd6dSSamuel Holland select GENERIC_IRQ_CHIP 271d421fd6dSSamuel Holland 272b06eb017SChristian Ruppertconfig TB10X_IRQC 273b06eb017SChristian Ruppert bool 274b06eb017SChristian Ruppert select IRQ_DOMAIN 275b06eb017SChristian Ruppert select GENERIC_IRQ_CHIP 276b06eb017SChristian Ruppert 277d01f8633SDamien Riegelconfig TS4800_IRQ 278d01f8633SDamien Riegel tristate "TS-4800 IRQ controller" 279d01f8633SDamien Riegel select IRQ_DOMAIN 2800df337cfSRichard Weinberger depends on HAS_IOMEM 281d2b383dcSJean Delvare depends on SOC_IMX51 || COMPILE_TEST 282d01f8633SDamien Riegel help 283d01f8633SDamien Riegel Support for the TS-4800 FPGA IRQ controller 284d01f8633SDamien Riegel 2852389d501SLinus Walleijconfig VERSATILE_FPGA_IRQ 2862389d501SLinus Walleij bool 2872389d501SLinus Walleij select IRQ_DOMAIN 2882389d501SLinus Walleij 2892389d501SLinus Walleijconfig VERSATILE_FPGA_IRQ_NR 2902389d501SLinus Walleij int 2912389d501SLinus Walleij default 4 2922389d501SLinus Walleij depends on VERSATILE_FPGA_IRQ 29326a8e96aSMax Filippov 29426a8e96aSMax Filippovconfig XTENSA_MX 29526a8e96aSMax Filippov bool 29626a8e96aSMax Filippov select IRQ_DOMAIN 29750091212SMarc Zyngier select GENERIC_IRQ_EFFECTIVE_AFF_MASK 29896ca848eSSricharan R 2990547dc78SZubair Lutfullah Kakakhelconfig XILINX_INTC 300debf69cfSRobert Hancock bool "Xilinx Interrupt Controller IP" 301b84dc7f0SJamie Iles depends on OF 3020547dc78SZubair Lutfullah Kakakhel select IRQ_DOMAIN 303debf69cfSRobert Hancock help 304debf69cfSRobert Hancock Support for the Xilinx Interrupt Controller IP core. 305debf69cfSRobert Hancock This is used as a primary controller with MicroBlaze and can also 306debf69cfSRobert Hancock be used as a secondary chained controller on other platforms. 3070547dc78SZubair Lutfullah Kakakhel 30896ca848eSSricharan Rconfig IRQ_CROSSBAR 30996ca848eSSricharan R bool 31096ca848eSSricharan R help 311f54619f2SMasanari Iida Support for a CROSSBAR ip that precedes the main interrupt controller. 31296ca848eSSricharan R The primary irqchip invokes the crossbar's callback which inturn allocates 31396ca848eSSricharan R a free irq and configures the IP. Thus the peripheral interrupts are 31496ca848eSSricharan R routed to one of the free irqchip interrupt lines. 31589323f8cSGrygorii Strashko 31689323f8cSGrygorii Strashkoconfig KEYSTONE_IRQ 31789323f8cSGrygorii Strashko tristate "Keystone 2 IRQ controller IP" 31889323f8cSGrygorii Strashko depends on ARCH_KEYSTONE 31989323f8cSGrygorii Strashko help 32089323f8cSGrygorii Strashko Support for Texas Instruments Keystone 2 IRQ controller IP which 32189323f8cSGrygorii Strashko is part of the Keystone 2 IPC mechanism 3228a19b8f1SAndrew Bresticker 3238a19b8f1SAndrew Brestickerconfig MIPS_GIC 3248a19b8f1SAndrew Bresticker bool 3258190cc57SSamuel Holland select GENERIC_IRQ_IPI if SMP 3268190cc57SSamuel Holland select IRQ_DOMAIN_HIERARCHY 3278a19b8f1SAndrew Bresticker select MIPS_CM 3288a764482SYoshinori Sato 32944e08e70SPaul Burtonconfig INGENIC_IRQ 33044e08e70SPaul Burton bool 33144e08e70SPaul Burton depends on MACH_INGENIC 33244e08e70SPaul Burton default y 33378c10e55SLinus Torvalds 3349536eba0SPaul Cercueilconfig INGENIC_TCU_IRQ 3359536eba0SPaul Cercueil bool "Ingenic JZ47xx TCU interrupt controller" 3369536eba0SPaul Cercueil default MACH_INGENIC 3379536eba0SPaul Cercueil depends on MIPS || COMPILE_TEST 3389536eba0SPaul Cercueil select MFD_SYSCON 3398084499bSYueHaibing select GENERIC_IRQ_CHIP 3409536eba0SPaul Cercueil help 3419536eba0SPaul Cercueil Support for interrupts in the Timer/Counter Unit (TCU) of the Ingenic 3429536eba0SPaul Cercueil JZ47xx SoCs. 3439536eba0SPaul Cercueil 3449536eba0SPaul Cercueil If unsure, say N. 3459536eba0SPaul Cercueil 346e324c4dcSShenwei Wangconfig IMX_GPCV2 347e324c4dcSShenwei Wang bool 348e324c4dcSShenwei Wang select IRQ_DOMAIN 349e324c4dcSShenwei Wang help 350e324c4dcSShenwei Wang Enables the wakeup IRQs for IMX platforms with GPCv2 block 3517e4ac676SOleksij Rempel 3527e4ac676SOleksij Rempelconfig IRQ_MXS 3537e4ac676SOleksij Rempel def_bool y if MACH_ASM9260 || ARCH_MXS 3547e4ac676SOleksij Rempel select IRQ_DOMAIN 3557e4ac676SOleksij Rempel select STMP_DEVICE 356c27f29bbSThomas Petazzoni 35719d99164SAlexandre Belloniconfig MSCC_OCELOT_IRQ 35819d99164SAlexandre Belloni bool 35919d99164SAlexandre Belloni select IRQ_DOMAIN 36019d99164SAlexandre Belloni select GENERIC_IRQ_CHIP 36119d99164SAlexandre Belloni 362a68a63cbSThomas Petazzoniconfig MVEBU_GICP 363a68a63cbSThomas Petazzoni bool 364a68a63cbSThomas Petazzoni 365e0de91a9SThomas Petazzoniconfig MVEBU_ICU 366e0de91a9SThomas Petazzoni bool 367e0de91a9SThomas Petazzoni 368c27f29bbSThomas Petazzoniconfig MVEBU_ODMI 369c27f29bbSThomas Petazzoni bool 370fa23b9d1SArnd Bergmann select GENERIC_MSI_IRQ_DOMAIN 3719e2c986cSMarc Zyngier 372a109893bSThomas Petazzoniconfig MVEBU_PIC 373a109893bSThomas Petazzoni bool 374a109893bSThomas Petazzoni 37561ce8d8dSMiquel Raynalconfig MVEBU_SEI 37661ce8d8dSMiquel Raynal bool 37761ce8d8dSMiquel Raynal 3780dcd9f87SRasmus Villemoesconfig LS_EXTIRQ 3790dcd9f87SRasmus Villemoes def_bool y if SOC_LS1021A || ARCH_LAYERSCAPE 3800dcd9f87SRasmus Villemoes select MFD_SYSCON 3810dcd9f87SRasmus Villemoes 382b8f3ebe6SMinghuan Lianconfig LS_SCFG_MSI 383b8f3ebe6SMinghuan Lian def_bool y if SOC_LS1021A || ARCH_LAYERSCAPE 384b8f3ebe6SMinghuan Lian depends on PCI && PCI_MSI 385b8f3ebe6SMinghuan Lian 3869e2c986cSMarc Zyngierconfig PARTITION_PERCPU 3879e2c986cSMarc Zyngier bool 3880efacbbaSLinus Torvalds 389e0720416SAlexandre TORGUEconfig STM32_EXTI 390e0720416SAlexandre TORGUE bool 391e0720416SAlexandre TORGUE select IRQ_DOMAIN 3920e7d7807SLudovic Barre select GENERIC_IRQ_CHIP 393f20cc9b0SAgustin Vega-Frias 394f20cc9b0SAgustin Vega-Friasconfig QCOM_IRQ_COMBINER 395f20cc9b0SAgustin Vega-Frias bool "QCOM IRQ combiner support" 396f20cc9b0SAgustin Vega-Frias depends on ARCH_QCOM && ACPI 397f20cc9b0SAgustin Vega-Frias select IRQ_DOMAIN_HIERARCHY 398f20cc9b0SAgustin Vega-Frias help 399f20cc9b0SAgustin Vega-Frias Say yes here to add support for the IRQ combiner devices embedded 400f20cc9b0SAgustin Vega-Frias in Qualcomm Technologies chips. 4015ed34d3aSMasahiro Yamada 4025ed34d3aSMasahiro Yamadaconfig IRQ_UNIPHIER_AIDET 4035ed34d3aSMasahiro Yamada bool "UniPhier AIDET support" if COMPILE_TEST 4045ed34d3aSMasahiro Yamada depends on ARCH_UNIPHIER || COMPILE_TEST 4055ed34d3aSMasahiro Yamada default ARCH_UNIPHIER 4065ed34d3aSMasahiro Yamada select IRQ_DOMAIN_HIERARCHY 4075ed34d3aSMasahiro Yamada help 4085ed34d3aSMasahiro Yamada Support for the UniPhier AIDET (ARM Interrupt Detector). 409c94fb639SRandy Dunlap 410215f4cc0SJerome Brunetconfig MESON_IRQ_GPIO 411a947aa00SNeil Armstrong tristate "Meson GPIO Interrupt Multiplexer" 412a947aa00SNeil Armstrong depends on ARCH_MESON || COMPILE_TEST 413a947aa00SNeil Armstrong default ARCH_MESON 414215f4cc0SJerome Brunet select IRQ_DOMAIN_HIERARCHY 415215f4cc0SJerome Brunet help 416215f4cc0SJerome Brunet Support Meson SoC Family GPIO Interrupt Multiplexer 417215f4cc0SJerome Brunet 4184235ff50SMiodrag Dinicconfig GOLDFISH_PIC 4194235ff50SMiodrag Dinic bool "Goldfish programmable interrupt controller" 4204235ff50SMiodrag Dinic depends on MIPS && (GOLDFISH || COMPILE_TEST) 421969ac78dSRandy Dunlap select GENERIC_IRQ_CHIP 4224235ff50SMiodrag Dinic select IRQ_DOMAIN 4234235ff50SMiodrag Dinic help 4244235ff50SMiodrag Dinic Say yes here to enable Goldfish interrupt controller driver used 4254235ff50SMiodrag Dinic for Goldfish based virtual platforms. 4264235ff50SMiodrag Dinic 427f55c73aeSArchana Sathyakumarconfig QCOM_PDC 4284acd8a4bSSaravana Kannan tristate "QCOM PDC" 429f55c73aeSArchana Sathyakumar depends on ARCH_QCOM 430f55c73aeSArchana Sathyakumar select IRQ_DOMAIN_HIERARCHY 431f55c73aeSArchana Sathyakumar help 432f55c73aeSArchana Sathyakumar Power Domain Controller driver to manage and configure wakeup 433f55c73aeSArchana Sathyakumar IRQs for Qualcomm Technologies Inc (QTI) mobile chips. 434f55c73aeSArchana Sathyakumar 435a6199bb5SShawn Guoconfig QCOM_MPM 436a6199bb5SShawn Guo tristate "QCOM MPM" 437a6199bb5SShawn Guo depends on ARCH_QCOM 438fa4dcc88SYueHaibing depends on MAILBOX 439a6199bb5SShawn Guo select IRQ_DOMAIN_HIERARCHY 440a6199bb5SShawn Guo help 441a6199bb5SShawn Guo MSM Power Manager driver to manage and configure wakeup 442a6199bb5SShawn Guo IRQs for Qualcomm Technologies Inc (QTI) mobile chips. 443a6199bb5SShawn Guo 444d8a5f5f7SGuo Renconfig CSKY_MPINTC 445be1abc5bSGuo Ren bool 446d8a5f5f7SGuo Ren depends on CSKY 447d8a5f5f7SGuo Ren help 448d8a5f5f7SGuo Ren Say yes here to enable C-SKY SMP interrupt controller driver used 449d8a5f5f7SGuo Ren for C-SKY SMP system. 450656b42deSRandy Dunlap In fact it's not mmio map in hardware and it uses ld/st to visit the 451d8a5f5f7SGuo Ren controller's register inside CPU. 452d8a5f5f7SGuo Ren 453edff1b48SGuo Renconfig CSKY_APB_INTC 454edff1b48SGuo Ren bool "C-SKY APB Interrupt Controller" 455edff1b48SGuo Ren depends on CSKY 456edff1b48SGuo Ren help 457edff1b48SGuo Ren Say yes here to enable C-SKY APB interrupt controller driver used 458656b42deSRandy Dunlap by C-SKY single core SOC system. It uses mmio map apb-bus to visit 459edff1b48SGuo Ren the controller's register. 460edff1b48SGuo Ren 4610136afa0SLucas Stachconfig IMX_IRQSTEER 4620136afa0SLucas Stach bool "i.MX IRQSTEER support" 4630136afa0SLucas Stach depends on ARCH_MXC || COMPILE_TEST 4640136afa0SLucas Stach default ARCH_MXC 4650136afa0SLucas Stach select IRQ_DOMAIN 4660136afa0SLucas Stach help 4670136afa0SLucas Stach Support for the i.MX IRQSTEER interrupt multiplexer/remapper. 4680136afa0SLucas Stach 4692fbb1396SJoakim Zhangconfig IMX_INTMUX 470a890caebSGeert Uytterhoeven bool "i.MX INTMUX support" if COMPILE_TEST 471a890caebSGeert Uytterhoeven default y if ARCH_MXC 4722fbb1396SJoakim Zhang select IRQ_DOMAIN 4732fbb1396SJoakim Zhang help 4742fbb1396SJoakim Zhang Support for the i.MX INTMUX interrupt multiplexer. 4752fbb1396SJoakim Zhang 4769e543e22SJiaxun Yangconfig LS1X_IRQ 4779e543e22SJiaxun Yang bool "Loongson-1 Interrupt Controller" 4789e543e22SJiaxun Yang depends on MACH_LOONGSON32 4799e543e22SJiaxun Yang default y 4809e543e22SJiaxun Yang select IRQ_DOMAIN 4819e543e22SJiaxun Yang select GENERIC_IRQ_CHIP 4829e543e22SJiaxun Yang help 4839e543e22SJiaxun Yang Support for the Loongson-1 platform Interrupt Controller. 4849e543e22SJiaxun Yang 485cd844b07SLokesh Vutlaconfig TI_SCI_INTR_IRQCHIP 486cd844b07SLokesh Vutla bool 487cd844b07SLokesh Vutla depends on TI_SCI_PROTOCOL 488cd844b07SLokesh Vutla select IRQ_DOMAIN_HIERARCHY 489cd844b07SLokesh Vutla help 490cd844b07SLokesh Vutla This enables the irqchip driver support for K3 Interrupt router 491cd844b07SLokesh Vutla over TI System Control Interface available on some new TI's SoCs. 492cd844b07SLokesh Vutla If you wish to use interrupt router irq resources managed by the 493cd844b07SLokesh Vutla TI System Controller, say Y here. Otherwise, say N. 494cd844b07SLokesh Vutla 4959f1463b8SLokesh Vutlaconfig TI_SCI_INTA_IRQCHIP 4969f1463b8SLokesh Vutla bool 4979f1463b8SLokesh Vutla depends on TI_SCI_PROTOCOL 4989f1463b8SLokesh Vutla select IRQ_DOMAIN_HIERARCHY 499f011df61SLokesh Vutla select TI_SCI_INTA_MSI_DOMAIN 5009f1463b8SLokesh Vutla help 5019f1463b8SLokesh Vutla This enables the irqchip driver support for K3 Interrupt aggregator 5029f1463b8SLokesh Vutla over TI System Control Interface available on some new TI's SoCs. 5039f1463b8SLokesh Vutla If you wish to use interrupt aggregator irq resources managed by the 5049f1463b8SLokesh Vutla TI System Controller, say Y here. Otherwise, say N. 5059f1463b8SLokesh Vutla 50604e2d1e0SGrzegorz Jaszczykconfig TI_PRUSS_INTC 507b8e594faSSuman Anna tristate 508b8e594faSSuman Anna depends on TI_PRUSS 509b8e594faSSuman Anna default TI_PRUSS 51004e2d1e0SGrzegorz Jaszczyk select IRQ_DOMAIN 51104e2d1e0SGrzegorz Jaszczyk help 51204e2d1e0SGrzegorz Jaszczyk This enables support for the PRU-ICSS Local Interrupt Controller 51304e2d1e0SGrzegorz Jaszczyk present within a PRU-ICSS subsystem present on various TI SoCs. 51404e2d1e0SGrzegorz Jaszczyk The PRUSS INTC enables various interrupts to be routed to multiple 51504e2d1e0SGrzegorz Jaszczyk different processors within the SoC. 51604e2d1e0SGrzegorz Jaszczyk 5176b7ce892SAnup Patelconfig RISCV_INTC 5186b7ce892SAnup Patel bool "RISC-V Local Interrupt Controller" 5196b7ce892SAnup Patel depends on RISCV 5206b7ce892SAnup Patel default y 5216b7ce892SAnup Patel help 5226b7ce892SAnup Patel This enables support for the per-HART local interrupt controller 5236b7ce892SAnup Patel found in standard RISC-V systems. The per-HART local interrupt 5246b7ce892SAnup Patel controller handles timer interrupts, software interrupts, and 5256b7ce892SAnup Patel hardware interrupts. Without a per-HART local interrupt controller, 5266b7ce892SAnup Patel a RISC-V system will be unable to handle any interrupts. 5276b7ce892SAnup Patel 5286b7ce892SAnup Patel If you don't know what to do here, say Y. 5296b7ce892SAnup Patel 5308237f8bcSChristoph Hellwigconfig SIFIVE_PLIC 5318237f8bcSChristoph Hellwig bool "SiFive Platform-Level Interrupt Controller" 5328237f8bcSChristoph Hellwig depends on RISCV 533466008f9SYash Shah select IRQ_DOMAIN_HIERARCHY 5348237f8bcSChristoph Hellwig help 5358237f8bcSChristoph Hellwig This enables support for the PLIC chip found in SiFive (and 5368237f8bcSChristoph Hellwig potentially other) RISC-V systems. The PLIC controls devices 5378237f8bcSChristoph Hellwig interrupts and connects them to each core's local interrupt 5388237f8bcSChristoph Hellwig controller. Aside from timer and software interrupts, all other 5398237f8bcSChristoph Hellwig interrupt sources are subordinate to the PLIC. 5408237f8bcSChristoph Hellwig 5418237f8bcSChristoph Hellwig If you don't know what to do here, say Y. 54201493855SJonathan Neuschäfer 543b74416dbSHyunki Kooconfig EXYNOS_IRQ_COMBINER 544b74416dbSHyunki Koo bool "Samsung Exynos IRQ combiner support" if COMPILE_TEST 545b74416dbSHyunki Koo depends on (ARCH_EXYNOS && ARM) || COMPILE_TEST 546b74416dbSHyunki Koo help 547b74416dbSHyunki Koo Say yes here to add support for the IRQ combiner devices embedded 548b74416dbSHyunki Koo in Samsung Exynos chips. 549b74416dbSHyunki Koo 550dbb15226SJiaxun Yangconfig LOONGSON_LIOINTC 551dbb15226SJiaxun Yang bool "Loongson Local I/O Interrupt Controller" 552dbb15226SJiaxun Yang depends on MACH_LOONGSON64 553dbb15226SJiaxun Yang default y 554dbb15226SJiaxun Yang select IRQ_DOMAIN 555dbb15226SJiaxun Yang select GENERIC_IRQ_CHIP 556dbb15226SJiaxun Yang help 557dbb15226SJiaxun Yang Support for the Loongson Local I/O Interrupt Controller. 558dbb15226SJiaxun Yang 559a93f1d90SJiaxun Yangconfig LOONGSON_HTPIC 560a93f1d90SJiaxun Yang bool "Loongson3 HyperTransport PIC Controller" 561987a3e03SHuacai Chen depends on MACH_LOONGSON64 && MIPS 562a93f1d90SJiaxun Yang default y 563a93f1d90SJiaxun Yang select IRQ_DOMAIN 564a93f1d90SJiaxun Yang select GENERIC_IRQ_CHIP 565a93f1d90SJiaxun Yang help 566a93f1d90SJiaxun Yang Support for the Loongson-3 HyperTransport PIC Controller. 567a93f1d90SJiaxun Yang 568818e915fSJiaxun Yangconfig LOONGSON_HTVEC 569987a3e03SHuacai Chen bool "Loongson HyperTransport Interrupt Vector Controller" 570d77aeb5dSIngo Molnar depends on MACH_LOONGSON64 571818e915fSJiaxun Yang default MACH_LOONGSON64 572818e915fSJiaxun Yang select IRQ_DOMAIN_HIERARCHY 573818e915fSJiaxun Yang help 574987a3e03SHuacai Chen Support for the Loongson HyperTransport Interrupt Vector Controller. 575818e915fSJiaxun Yang 576ef8c01ebSJiaxun Yangconfig LOONGSON_PCH_PIC 577ef8c01ebSJiaxun Yang bool "Loongson PCH PIC Controller" 578ef8c01ebSJiaxun Yang depends on MACH_LOONGSON64 || COMPILE_TEST 579ef8c01ebSJiaxun Yang default MACH_LOONGSON64 580ef8c01ebSJiaxun Yang select IRQ_DOMAIN_HIERARCHY 581ef8c01ebSJiaxun Yang select IRQ_FASTEOI_HIERARCHY_HANDLERS 582ef8c01ebSJiaxun Yang help 583ef8c01ebSJiaxun Yang Support for the Loongson PCH PIC Controller. 584ef8c01ebSJiaxun Yang 585632dcc2cSJiaxun Yangconfig LOONGSON_PCH_MSI 586a23df9a4SJiaxun Yang bool "Loongson PCH MSI Controller" 587632dcc2cSJiaxun Yang depends on MACH_LOONGSON64 || COMPILE_TEST 588632dcc2cSJiaxun Yang depends on PCI 589632dcc2cSJiaxun Yang default MACH_LOONGSON64 590632dcc2cSJiaxun Yang select IRQ_DOMAIN_HIERARCHY 591632dcc2cSJiaxun Yang select PCI_MSI 592632dcc2cSJiaxun Yang help 593632dcc2cSJiaxun Yang Support for the Loongson PCH MSI Controller. 594632dcc2cSJiaxun Yang 595ad4c938cSMark-PK Tsaiconfig MST_IRQ 596ad4c938cSMark-PK Tsai bool "MStar Interrupt Controller" 59761b0648dSGeert Uytterhoeven depends on ARCH_MEDIATEK || ARCH_MSTARV7 || COMPILE_TEST 598ad4c938cSMark-PK Tsai default ARCH_MEDIATEK 599ad4c938cSMark-PK Tsai select IRQ_DOMAIN 600ad4c938cSMark-PK Tsai select IRQ_DOMAIN_HIERARCHY 601ad4c938cSMark-PK Tsai help 602ad4c938cSMark-PK Tsai Support MStar Interrupt Controller. 603ad4c938cSMark-PK Tsai 604fead4dd4SJonathan Neuschäferconfig WPCM450_AIC 605fead4dd4SJonathan Neuschäfer bool "Nuvoton WPCM450 Advanced Interrupt Controller" 60694bc9420SMarc Zyngier depends on ARCH_WPCM450 607fead4dd4SJonathan Neuschäfer help 608fead4dd4SJonathan Neuschäfer Support for the interrupt controller in the Nuvoton WPCM450 BMC SoC. 609fead4dd4SJonathan Neuschäfer 610529ea368SThomas Bogendoerferconfig IRQ_IDT3243X 611529ea368SThomas Bogendoerfer bool 612529ea368SThomas Bogendoerfer select GENERIC_IRQ_CHIP 613529ea368SThomas Bogendoerfer select IRQ_DOMAIN 614529ea368SThomas Bogendoerfer 61576cde263SHector Martinconfig APPLE_AIC 61676cde263SHector Martin bool "Apple Interrupt Controller (AIC)" 61776cde263SHector Martin depends on ARM64 6185b44955dSGeert Uytterhoeven depends on ARCH_APPLE || COMPILE_TEST 61976cde263SHector Martin help 62076cde263SHector Martin Support for the Apple Interrupt Controller found on Apple Silicon SoCs, 62176cde263SHector Martin such as the M1. 62276cde263SHector Martin 62300fa3461SClaudiu Bezneaconfig MCHP_EIC 62400fa3461SClaudiu Beznea bool "Microchip External Interrupt Controller" 62500fa3461SClaudiu Beznea depends on ARCH_AT91 || COMPILE_TEST 62600fa3461SClaudiu Beznea select IRQ_DOMAIN 62700fa3461SClaudiu Beznea select IRQ_DOMAIN_HIERARCHY 62800fa3461SClaudiu Beznea help 62900fa3461SClaudiu Beznea Support for Microchip External Interrupt Controller. 63000fa3461SClaudiu Beznea 63101493855SJonathan Neuschäferendmenu 632