xref: /openbmc/linux/drivers/iommu/sprd-iommu.c (revision ee7da21a) 
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Unisoc IOMMU driver
4  *
5  * Copyright (C) 2020 Unisoc, Inc.
6  * Author: Chunyan Zhang <chunyan.zhang@unisoc.com>
7  */
8 
9 #include <linux/clk.h>
10 #include <linux/device.h>
11 #include <linux/dma-iommu.h>
12 #include <linux/dma-mapping.h>
13 #include <linux/errno.h>
14 #include <linux/iommu.h>
15 #include <linux/mfd/syscon.h>
16 #include <linux/module.h>
17 #include <linux/of_platform.h>
18 #include <linux/regmap.h>
19 #include <linux/slab.h>
20 
21 #define SPRD_IOMMU_PAGE_SHIFT	12
22 #define SPRD_IOMMU_PAGE_SIZE	SZ_4K
23 
24 #define SPRD_EX_CFG		0x0
25 #define SPRD_IOMMU_VAOR_BYPASS	BIT(4)
26 #define SPRD_IOMMU_GATE_EN	BIT(1)
27 #define SPRD_IOMMU_EN		BIT(0)
28 #define SPRD_EX_UPDATE		0x4
29 #define SPRD_EX_FIRST_VPN	0x8
30 #define SPRD_EX_VPN_RANGE	0xc
31 #define SPRD_EX_FIRST_PPN	0x10
32 #define SPRD_EX_DEFAULT_PPN	0x14
33 
34 #define SPRD_IOMMU_VERSION	0x0
35 #define SPRD_VERSION_MASK	GENMASK(15, 8)
36 #define SPRD_VERSION_SHIFT	0x8
37 #define SPRD_VAU_CFG		0x4
38 #define SPRD_VAU_UPDATE		0x8
39 #define SPRD_VAU_AUTH_CFG	0xc
40 #define SPRD_VAU_FIRST_PPN	0x10
41 #define SPRD_VAU_DEFAULT_PPN_RD	0x14
42 #define SPRD_VAU_DEFAULT_PPN_WR	0x18
43 #define SPRD_VAU_FIRST_VPN	0x1c
44 #define SPRD_VAU_VPN_RANGE	0x20
45 
46 enum sprd_iommu_version {
47 	SPRD_IOMMU_EX,
48 	SPRD_IOMMU_VAU,
49 };
50 
51 /*
52  * struct sprd_iommu_device - high-level sprd IOMMU device representation,
53  * including hardware information and configuration, also driver data, etc
54  *
55  * @ver: sprd IOMMU IP version
56  * @prot_page_va: protect page base virtual address
57  * @prot_page_pa: protect page base physical address, data would be
58  *		  written to here while translation fault
59  * @base: mapped base address for accessing registers
60  * @dev: pointer to basic device structure
61  * @iommu: IOMMU core representation
62  * @group: IOMMU group
63  * @eb: gate clock which controls IOMMU access
64  */
65 struct sprd_iommu_device {
66 	enum sprd_iommu_version	ver;
67 	u32			*prot_page_va;
68 	dma_addr_t		prot_page_pa;
69 	void __iomem		*base;
70 	struct device		*dev;
71 	struct iommu_device	iommu;
72 	struct iommu_group	*group;
73 	struct clk		*eb;
74 };
75 
76 struct sprd_iommu_domain {
77 	spinlock_t		pgtlock; /* lock for page table */
78 	struct iommu_domain	domain;
79 	u32			*pgt_va; /* page table virtual address base */
80 	dma_addr_t		pgt_pa; /* page table physical address base */
81 	struct sprd_iommu_device	*sdev;
82 };
83 
84 static const struct iommu_ops sprd_iommu_ops;
85 
86 static struct sprd_iommu_domain *to_sprd_domain(struct iommu_domain *dom)
87 {
88 	return container_of(dom, struct sprd_iommu_domain, domain);
89 }
90 
91 static inline void
92 sprd_iommu_write(struct sprd_iommu_device *sdev, unsigned int reg, u32 val)
93 {
94 	writel_relaxed(val, sdev->base + reg);
95 }
96 
97 static inline u32
98 sprd_iommu_read(struct sprd_iommu_device *sdev, unsigned int reg)
99 {
100 	return readl_relaxed(sdev->base + reg);
101 }
102 
103 static inline void
104 sprd_iommu_update_bits(struct sprd_iommu_device *sdev, unsigned int reg,
105 		  u32 mask, u32 shift, u32 val)
106 {
107 	u32 t = sprd_iommu_read(sdev, reg);
108 
109 	t = (t & (~(mask << shift))) | ((val & mask) << shift);
110 	sprd_iommu_write(sdev, reg, t);
111 }
112 
113 static inline int
114 sprd_iommu_get_version(struct sprd_iommu_device *sdev)
115 {
116 	int ver = (sprd_iommu_read(sdev, SPRD_IOMMU_VERSION) &
117 		   SPRD_VERSION_MASK) >> SPRD_VERSION_SHIFT;
118 
119 	switch (ver) {
120 	case SPRD_IOMMU_EX:
121 	case SPRD_IOMMU_VAU:
122 		return ver;
123 	default:
124 		return -EINVAL;
125 	}
126 }
127 
128 static size_t
129 sprd_iommu_pgt_size(struct iommu_domain *domain)
130 {
131 	return ((domain->geometry.aperture_end -
132 		 domain->geometry.aperture_start + 1) >>
133 		SPRD_IOMMU_PAGE_SHIFT) * sizeof(u32);
134 }
135 
136 static struct iommu_domain *sprd_iommu_domain_alloc(unsigned int domain_type)
137 {
138 	struct sprd_iommu_domain *dom;
139 
140 	if (domain_type != IOMMU_DOMAIN_DMA && domain_type != IOMMU_DOMAIN_UNMANAGED)
141 		return NULL;
142 
143 	dom = kzalloc(sizeof(*dom), GFP_KERNEL);
144 	if (!dom)
145 		return NULL;
146 
147 	if (iommu_get_dma_cookie(&dom->domain)) {
148 		kfree(dom);
149 		return NULL;
150 	}
151 
152 	spin_lock_init(&dom->pgtlock);
153 
154 	dom->domain.geometry.aperture_start = 0;
155 	dom->domain.geometry.aperture_end = SZ_256M - 1;
156 
157 	return &dom->domain;
158 }
159 
160 static void sprd_iommu_domain_free(struct iommu_domain *domain)
161 {
162 	struct sprd_iommu_domain *dom = to_sprd_domain(domain);
163 
164 	iommu_put_dma_cookie(domain);
165 	kfree(dom);
166 }
167 
168 static void sprd_iommu_first_vpn(struct sprd_iommu_domain *dom)
169 {
170 	struct sprd_iommu_device *sdev = dom->sdev;
171 	u32 val;
172 	unsigned int reg;
173 
174 	if (sdev->ver == SPRD_IOMMU_EX)
175 		reg = SPRD_EX_FIRST_VPN;
176 	else
177 		reg = SPRD_VAU_FIRST_VPN;
178 
179 	val = dom->domain.geometry.aperture_start >> SPRD_IOMMU_PAGE_SHIFT;
180 	sprd_iommu_write(sdev, reg, val);
181 }
182 
183 static void sprd_iommu_vpn_range(struct sprd_iommu_domain *dom)
184 {
185 	struct sprd_iommu_device *sdev = dom->sdev;
186 	u32 val;
187 	unsigned int reg;
188 
189 	if (sdev->ver == SPRD_IOMMU_EX)
190 		reg = SPRD_EX_VPN_RANGE;
191 	else
192 		reg = SPRD_VAU_VPN_RANGE;
193 
194 	val = (dom->domain.geometry.aperture_end -
195 	       dom->domain.geometry.aperture_start) >> SPRD_IOMMU_PAGE_SHIFT;
196 	sprd_iommu_write(sdev, reg, val);
197 }
198 
199 static void sprd_iommu_first_ppn(struct sprd_iommu_domain *dom)
200 {
201 	u32 val = dom->pgt_pa >> SPRD_IOMMU_PAGE_SHIFT;
202 	struct sprd_iommu_device *sdev = dom->sdev;
203 	unsigned int reg;
204 
205 	if (sdev->ver == SPRD_IOMMU_EX)
206 		reg = SPRD_EX_FIRST_PPN;
207 	else
208 		reg = SPRD_VAU_FIRST_PPN;
209 
210 	sprd_iommu_write(sdev, reg, val);
211 }
212 
213 static void sprd_iommu_default_ppn(struct sprd_iommu_device *sdev)
214 {
215 	u32 val = sdev->prot_page_pa >> SPRD_IOMMU_PAGE_SHIFT;
216 
217 	if (sdev->ver == SPRD_IOMMU_EX) {
218 		sprd_iommu_write(sdev, SPRD_EX_DEFAULT_PPN, val);
219 	} else if (sdev->ver == SPRD_IOMMU_VAU) {
220 		sprd_iommu_write(sdev, SPRD_VAU_DEFAULT_PPN_RD, val);
221 		sprd_iommu_write(sdev, SPRD_VAU_DEFAULT_PPN_WR, val);
222 	}
223 }
224 
225 static void sprd_iommu_hw_en(struct sprd_iommu_device *sdev, bool en)
226 {
227 	unsigned int reg_cfg;
228 	u32 mask, val;
229 
230 	if (sdev->ver == SPRD_IOMMU_EX)
231 		reg_cfg = SPRD_EX_CFG;
232 	else
233 		reg_cfg = SPRD_VAU_CFG;
234 
235 	mask = SPRD_IOMMU_EN | SPRD_IOMMU_GATE_EN;
236 	val = en ? mask : 0;
237 	sprd_iommu_update_bits(sdev, reg_cfg, mask, 0, val);
238 }
239 
240 static int sprd_iommu_attach_device(struct iommu_domain *domain,
241 				    struct device *dev)
242 {
243 	struct sprd_iommu_device *sdev = dev_iommu_priv_get(dev);
244 	struct sprd_iommu_domain *dom = to_sprd_domain(domain);
245 	size_t pgt_size = sprd_iommu_pgt_size(domain);
246 
247 	if (dom->sdev) {
248 		pr_err("There's already a device attached to this domain.\n");
249 		return -EINVAL;
250 	}
251 
252 	dom->pgt_va = dma_alloc_coherent(sdev->dev, pgt_size, &dom->pgt_pa, GFP_KERNEL);
253 	if (!dom->pgt_va)
254 		return -ENOMEM;
255 
256 	dom->sdev = sdev;
257 
258 	sprd_iommu_first_ppn(dom);
259 	sprd_iommu_first_vpn(dom);
260 	sprd_iommu_vpn_range(dom);
261 	sprd_iommu_default_ppn(sdev);
262 	sprd_iommu_hw_en(sdev, true);
263 
264 	return 0;
265 }
266 
267 static void sprd_iommu_detach_device(struct iommu_domain *domain,
268 					     struct device *dev)
269 {
270 	struct sprd_iommu_domain *dom = to_sprd_domain(domain);
271 	struct sprd_iommu_device *sdev = dom->sdev;
272 	size_t pgt_size = sprd_iommu_pgt_size(domain);
273 
274 	if (!sdev)
275 		return;
276 
277 	dma_free_coherent(sdev->dev, pgt_size, dom->pgt_va, dom->pgt_pa);
278 	sprd_iommu_hw_en(sdev, false);
279 	dom->sdev = NULL;
280 }
281 
282 static int sprd_iommu_map(struct iommu_domain *domain, unsigned long iova,
283 			  phys_addr_t paddr, size_t size, int prot, gfp_t gfp)
284 {
285 	struct sprd_iommu_domain *dom = to_sprd_domain(domain);
286 	unsigned int page_num = size >> SPRD_IOMMU_PAGE_SHIFT;
287 	unsigned long flags;
288 	unsigned int i;
289 	u32 *pgt_base_iova;
290 	u32 pabase = (u32)paddr;
291 	unsigned long start = domain->geometry.aperture_start;
292 	unsigned long end = domain->geometry.aperture_end;
293 
294 	if (!dom->sdev) {
295 		pr_err("No sprd_iommu_device attached to the domain\n");
296 		return -EINVAL;
297 	}
298 
299 	if (iova < start || (iova + size) > (end + 1)) {
300 		dev_err(dom->sdev->dev, "(iova(0x%lx) + size(%zx)) are not in the range!\n",
301 			iova, size);
302 		return -EINVAL;
303 	}
304 
305 	pgt_base_iova = dom->pgt_va + ((iova - start) >> SPRD_IOMMU_PAGE_SHIFT);
306 
307 	spin_lock_irqsave(&dom->pgtlock, flags);
308 	for (i = 0; i < page_num; i++) {
309 		pgt_base_iova[i] = pabase >> SPRD_IOMMU_PAGE_SHIFT;
310 		pabase += SPRD_IOMMU_PAGE_SIZE;
311 	}
312 	spin_unlock_irqrestore(&dom->pgtlock, flags);
313 
314 	return 0;
315 }
316 
317 static size_t sprd_iommu_unmap(struct iommu_domain *domain, unsigned long iova,
318 			size_t size, struct iommu_iotlb_gather *iotlb_gather)
319 {
320 	struct sprd_iommu_domain *dom = to_sprd_domain(domain);
321 	unsigned long flags;
322 	u32 *pgt_base_iova;
323 	unsigned int page_num = size >> SPRD_IOMMU_PAGE_SHIFT;
324 	unsigned long start = domain->geometry.aperture_start;
325 	unsigned long end = domain->geometry.aperture_end;
326 
327 	if (iova < start || (iova + size) > (end + 1))
328 		return -EINVAL;
329 
330 	pgt_base_iova = dom->pgt_va + ((iova - start) >> SPRD_IOMMU_PAGE_SHIFT);
331 
332 	spin_lock_irqsave(&dom->pgtlock, flags);
333 	memset(pgt_base_iova, 0, page_num * sizeof(u32));
334 	spin_unlock_irqrestore(&dom->pgtlock, flags);
335 
336 	return 0;
337 }
338 
339 static void sprd_iommu_sync_map(struct iommu_domain *domain,
340 				unsigned long iova, size_t size)
341 {
342 	struct sprd_iommu_domain *dom = to_sprd_domain(domain);
343 	unsigned int reg;
344 
345 	if (dom->sdev->ver == SPRD_IOMMU_EX)
346 		reg = SPRD_EX_UPDATE;
347 	else
348 		reg = SPRD_VAU_UPDATE;
349 
350 	/* clear IOMMU TLB buffer after page table updated */
351 	sprd_iommu_write(dom->sdev, reg, 0xffffffff);
352 }
353 
354 static void sprd_iommu_sync(struct iommu_domain *domain,
355 			    struct iommu_iotlb_gather *iotlb_gather)
356 {
357 	sprd_iommu_sync_map(domain, 0, 0);
358 }
359 
360 static phys_addr_t sprd_iommu_iova_to_phys(struct iommu_domain *domain,
361 					   dma_addr_t iova)
362 {
363 	struct sprd_iommu_domain *dom = to_sprd_domain(domain);
364 	unsigned long flags;
365 	phys_addr_t pa;
366 	unsigned long start = domain->geometry.aperture_start;
367 	unsigned long end = domain->geometry.aperture_end;
368 
369 	if (WARN_ON(iova < start || iova > end))
370 		return 0;
371 
372 	spin_lock_irqsave(&dom->pgtlock, flags);
373 	pa = *(dom->pgt_va + ((iova - start) >> SPRD_IOMMU_PAGE_SHIFT));
374 	pa = (pa << SPRD_IOMMU_PAGE_SHIFT) + ((iova - start) & (SPRD_IOMMU_PAGE_SIZE - 1));
375 	spin_unlock_irqrestore(&dom->pgtlock, flags);
376 
377 	return pa;
378 }
379 
380 static struct iommu_device *sprd_iommu_probe_device(struct device *dev)
381 {
382 	struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev);
383 	struct sprd_iommu_device *sdev;
384 
385 	if (!fwspec || fwspec->ops != &sprd_iommu_ops)
386 		return ERR_PTR(-ENODEV);
387 
388 	sdev = dev_iommu_priv_get(dev);
389 
390 	return &sdev->iommu;
391 }
392 
393 static void sprd_iommu_release_device(struct device *dev)
394 {
395 	struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev);
396 
397 	if (!fwspec || fwspec->ops != &sprd_iommu_ops)
398 		return;
399 
400 	iommu_fwspec_free(dev);
401 }
402 
403 static struct iommu_group *sprd_iommu_device_group(struct device *dev)
404 {
405 	struct sprd_iommu_device *sdev = dev_iommu_priv_get(dev);
406 
407 	return iommu_group_ref_get(sdev->group);
408 }
409 
410 static int sprd_iommu_of_xlate(struct device *dev, struct of_phandle_args *args)
411 {
412 	struct platform_device *pdev;
413 
414 	if (!dev_iommu_priv_get(dev)) {
415 		pdev = of_find_device_by_node(args->np);
416 		dev_iommu_priv_set(dev, platform_get_drvdata(pdev));
417 		platform_device_put(pdev);
418 	}
419 
420 	return 0;
421 }
422 
423 
424 static const struct iommu_ops sprd_iommu_ops = {
425 	.domain_alloc	= sprd_iommu_domain_alloc,
426 	.domain_free	= sprd_iommu_domain_free,
427 	.attach_dev	= sprd_iommu_attach_device,
428 	.detach_dev	= sprd_iommu_detach_device,
429 	.map		= sprd_iommu_map,
430 	.unmap		= sprd_iommu_unmap,
431 	.iotlb_sync_map	= sprd_iommu_sync_map,
432 	.iotlb_sync	= sprd_iommu_sync,
433 	.iova_to_phys	= sprd_iommu_iova_to_phys,
434 	.probe_device	= sprd_iommu_probe_device,
435 	.release_device	= sprd_iommu_release_device,
436 	.device_group	= sprd_iommu_device_group,
437 	.of_xlate	= sprd_iommu_of_xlate,
438 	.pgsize_bitmap	= ~0UL << SPRD_IOMMU_PAGE_SHIFT,
439 	.owner		= THIS_MODULE,
440 };
441 
442 static const struct of_device_id sprd_iommu_of_match[] = {
443 	{ .compatible = "sprd,iommu-v1" },
444 	{ },
445 };
446 MODULE_DEVICE_TABLE(of, sprd_iommu_of_match);
447 
448 /*
449  * Clock is not required, access to some of IOMMUs is controlled by gate
450  * clk, enabled clocks for that kind of IOMMUs before accessing.
451  * Return 0 for success or no clocks found.
452  */
453 static int sprd_iommu_clk_enable(struct sprd_iommu_device *sdev)
454 {
455 	struct clk *eb;
456 
457 	eb = devm_clk_get_optional(sdev->dev, NULL);
458 	if (!eb)
459 		return 0;
460 
461 	if (IS_ERR(eb))
462 		return PTR_ERR(eb);
463 
464 	sdev->eb = eb;
465 	return clk_prepare_enable(eb);
466 }
467 
468 static void sprd_iommu_clk_disable(struct sprd_iommu_device *sdev)
469 {
470 	if (sdev->eb)
471 		clk_disable_unprepare(sdev->eb);
472 }
473 
474 static int sprd_iommu_probe(struct platform_device *pdev)
475 {
476 	struct sprd_iommu_device *sdev;
477 	struct device *dev = &pdev->dev;
478 	void __iomem *base;
479 	int ret;
480 
481 	sdev = devm_kzalloc(dev, sizeof(*sdev), GFP_KERNEL);
482 	if (!sdev)
483 		return -ENOMEM;
484 
485 	base = devm_platform_ioremap_resource(pdev, 0);
486 	if (IS_ERR(base)) {
487 		dev_err(dev, "Failed to get ioremap resource.\n");
488 		return PTR_ERR(base);
489 	}
490 	sdev->base = base;
491 
492 	sdev->prot_page_va = dma_alloc_coherent(dev, SPRD_IOMMU_PAGE_SIZE,
493 						&sdev->prot_page_pa, GFP_KERNEL);
494 	if (!sdev->prot_page_va)
495 		return -ENOMEM;
496 
497 	platform_set_drvdata(pdev, sdev);
498 	sdev->dev = dev;
499 
500 	/* All the client devices are in the same iommu-group */
501 	sdev->group = iommu_group_alloc();
502 	if (IS_ERR(sdev->group)) {
503 		ret = PTR_ERR(sdev->group);
504 		goto free_page;
505 	}
506 
507 	ret = iommu_device_sysfs_add(&sdev->iommu, dev, NULL, dev_name(dev));
508 	if (ret)
509 		goto put_group;
510 
511 	ret = iommu_device_register(&sdev->iommu, &sprd_iommu_ops, dev);
512 	if (ret)
513 		goto remove_sysfs;
514 
515 	if (!iommu_present(&platform_bus_type))
516 		bus_set_iommu(&platform_bus_type, &sprd_iommu_ops);
517 
518 	ret = sprd_iommu_clk_enable(sdev);
519 	if (ret)
520 		goto unregister_iommu;
521 
522 	ret = sprd_iommu_get_version(sdev);
523 	if (ret < 0) {
524 		dev_err(dev, "IOMMU version(%d) is invalid.\n", ret);
525 		goto disable_clk;
526 	}
527 	sdev->ver = ret;
528 
529 	return 0;
530 
531 disable_clk:
532 	sprd_iommu_clk_disable(sdev);
533 unregister_iommu:
534 	iommu_device_unregister(&sdev->iommu);
535 remove_sysfs:
536 	iommu_device_sysfs_remove(&sdev->iommu);
537 put_group:
538 	iommu_group_put(sdev->group);
539 free_page:
540 	dma_free_coherent(sdev->dev, SPRD_IOMMU_PAGE_SIZE, sdev->prot_page_va, sdev->prot_page_pa);
541 	return ret;
542 }
543 
544 static int sprd_iommu_remove(struct platform_device *pdev)
545 {
546 	struct sprd_iommu_device *sdev = platform_get_drvdata(pdev);
547 
548 	dma_free_coherent(sdev->dev, SPRD_IOMMU_PAGE_SIZE, sdev->prot_page_va, sdev->prot_page_pa);
549 
550 	iommu_group_put(sdev->group);
551 	sdev->group = NULL;
552 
553 	bus_set_iommu(&platform_bus_type, NULL);
554 
555 	platform_set_drvdata(pdev, NULL);
556 	iommu_device_sysfs_remove(&sdev->iommu);
557 	iommu_device_unregister(&sdev->iommu);
558 
559 	return 0;
560 }
561 
562 static struct platform_driver sprd_iommu_driver = {
563 	.driver	= {
564 		.name		= "sprd-iommu",
565 		.of_match_table	= sprd_iommu_of_match,
566 		.suppress_bind_attrs = true,
567 	},
568 	.probe	= sprd_iommu_probe,
569 	.remove	= sprd_iommu_remove,
570 };
571 module_platform_driver(sprd_iommu_driver);
572 
573 MODULE_DESCRIPTION("IOMMU driver for Unisoc SoCs");
574 MODULE_ALIAS("platform:sprd-iommu");
575 MODULE_LICENSE("GPL");
576