1 /* 2 * omap iommu: main structures 3 * 4 * Copyright (C) 2008-2009 Nokia Corporation 5 * 6 * Written by Hiroshi DOYU <Hiroshi.DOYU@nokia.com> 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 */ 12 13 #if defined(CONFIG_ARCH_OMAP1) 14 #error "iommu for this processor not implemented yet" 15 #endif 16 17 struct iotlb_entry { 18 u32 da; 19 u32 pa; 20 u32 pgsz, prsvd, valid; 21 union { 22 u16 ap; 23 struct { 24 u32 endian, elsz, mixed; 25 }; 26 }; 27 }; 28 29 struct omap_iommu { 30 const char *name; 31 struct module *owner; 32 void __iomem *regbase; 33 struct device *dev; 34 void *isr_priv; 35 struct iommu_domain *domain; 36 37 unsigned int refcount; 38 spinlock_t iommu_lock; /* global for this whole object */ 39 40 /* 41 * We don't change iopgd for a situation like pgd for a task, 42 * but share it globally for each iommu. 43 */ 44 u32 *iopgd; 45 spinlock_t page_table_lock; /* protect iopgd */ 46 47 int nr_tlb_entries; 48 49 struct list_head mmap; 50 struct mutex mmap_lock; /* protect mmap */ 51 52 void *ctx; /* iommu context: registres saved area */ 53 u32 da_start; 54 u32 da_end; 55 }; 56 57 struct cr_regs { 58 union { 59 struct { 60 u16 cam_l; 61 u16 cam_h; 62 }; 63 u32 cam; 64 }; 65 union { 66 struct { 67 u16 ram_l; 68 u16 ram_h; 69 }; 70 u32 ram; 71 }; 72 }; 73 74 /* architecture specific functions */ 75 struct iommu_functions { 76 unsigned long version; 77 78 int (*enable)(struct omap_iommu *obj); 79 void (*disable)(struct omap_iommu *obj); 80 void (*set_twl)(struct omap_iommu *obj, bool on); 81 u32 (*fault_isr)(struct omap_iommu *obj, u32 *ra); 82 83 void (*tlb_read_cr)(struct omap_iommu *obj, struct cr_regs *cr); 84 void (*tlb_load_cr)(struct omap_iommu *obj, struct cr_regs *cr); 85 86 struct cr_regs *(*alloc_cr)(struct omap_iommu *obj, 87 struct iotlb_entry *e); 88 int (*cr_valid)(struct cr_regs *cr); 89 u32 (*cr_to_virt)(struct cr_regs *cr); 90 void (*cr_to_e)(struct cr_regs *cr, struct iotlb_entry *e); 91 ssize_t (*dump_cr)(struct omap_iommu *obj, struct cr_regs *cr, 92 char *buf); 93 94 u32 (*get_pte_attr)(struct iotlb_entry *e); 95 96 void (*save_ctx)(struct omap_iommu *obj); 97 void (*restore_ctx)(struct omap_iommu *obj); 98 ssize_t (*dump_ctx)(struct omap_iommu *obj, char *buf, ssize_t len); 99 }; 100 101 #ifdef CONFIG_IOMMU_API 102 /** 103 * dev_to_omap_iommu() - retrieves an omap iommu object from a user device 104 * @dev: iommu client device 105 */ 106 static inline struct omap_iommu *dev_to_omap_iommu(struct device *dev) 107 { 108 struct omap_iommu_arch_data *arch_data = dev->archdata.iommu; 109 110 return arch_data->iommu_dev; 111 } 112 #endif 113 114 /* 115 * MMU Register offsets 116 */ 117 #define MMU_REVISION 0x00 118 #define MMU_IRQSTATUS 0x18 119 #define MMU_IRQENABLE 0x1c 120 #define MMU_WALKING_ST 0x40 121 #define MMU_CNTL 0x44 122 #define MMU_FAULT_AD 0x48 123 #define MMU_TTB 0x4c 124 #define MMU_LOCK 0x50 125 #define MMU_LD_TLB 0x54 126 #define MMU_CAM 0x58 127 #define MMU_RAM 0x5c 128 #define MMU_GFLUSH 0x60 129 #define MMU_FLUSH_ENTRY 0x64 130 #define MMU_READ_CAM 0x68 131 #define MMU_READ_RAM 0x6c 132 #define MMU_EMU_FAULT_AD 0x70 133 134 #define MMU_REG_SIZE 256 135 136 /* 137 * MMU Register bit definitions 138 */ 139 #define MMU_CAM_VATAG_SHIFT 12 140 #define MMU_CAM_VATAG_MASK \ 141 ((~0UL >> MMU_CAM_VATAG_SHIFT) << MMU_CAM_VATAG_SHIFT) 142 #define MMU_CAM_P (1 << 3) 143 #define MMU_CAM_V (1 << 2) 144 #define MMU_CAM_PGSZ_MASK 3 145 #define MMU_CAM_PGSZ_1M (0 << 0) 146 #define MMU_CAM_PGSZ_64K (1 << 0) 147 #define MMU_CAM_PGSZ_4K (2 << 0) 148 #define MMU_CAM_PGSZ_16M (3 << 0) 149 150 #define MMU_RAM_PADDR_SHIFT 12 151 #define MMU_RAM_PADDR_MASK \ 152 ((~0UL >> MMU_RAM_PADDR_SHIFT) << MMU_RAM_PADDR_SHIFT) 153 154 #define MMU_RAM_ENDIAN_MASK (1 << MMU_RAM_ENDIAN_SHIFT) 155 #define MMU_RAM_ENDIAN_BIG (1 << MMU_RAM_ENDIAN_SHIFT) 156 157 #define MMU_RAM_ELSZ_MASK (3 << MMU_RAM_ELSZ_SHIFT) 158 #define MMU_RAM_ELSZ_8 (0 << MMU_RAM_ELSZ_SHIFT) 159 #define MMU_RAM_ELSZ_16 (1 << MMU_RAM_ELSZ_SHIFT) 160 #define MMU_RAM_ELSZ_32 (2 << MMU_RAM_ELSZ_SHIFT) 161 #define MMU_RAM_ELSZ_NONE (3 << MMU_RAM_ELSZ_SHIFT) 162 #define MMU_RAM_MIXED_SHIFT 6 163 #define MMU_RAM_MIXED_MASK (1 << MMU_RAM_MIXED_SHIFT) 164 #define MMU_RAM_MIXED MMU_RAM_MIXED_MASK 165 166 /* 167 * utilities for super page(16MB, 1MB, 64KB and 4KB) 168 */ 169 170 #define iopgsz_max(bytes) \ 171 (((bytes) >= SZ_16M) ? SZ_16M : \ 172 ((bytes) >= SZ_1M) ? SZ_1M : \ 173 ((bytes) >= SZ_64K) ? SZ_64K : \ 174 ((bytes) >= SZ_4K) ? SZ_4K : 0) 175 176 #define bytes_to_iopgsz(bytes) \ 177 (((bytes) == SZ_16M) ? MMU_CAM_PGSZ_16M : \ 178 ((bytes) == SZ_1M) ? MMU_CAM_PGSZ_1M : \ 179 ((bytes) == SZ_64K) ? MMU_CAM_PGSZ_64K : \ 180 ((bytes) == SZ_4K) ? MMU_CAM_PGSZ_4K : -1) 181 182 #define iopgsz_to_bytes(iopgsz) \ 183 (((iopgsz) == MMU_CAM_PGSZ_16M) ? SZ_16M : \ 184 ((iopgsz) == MMU_CAM_PGSZ_1M) ? SZ_1M : \ 185 ((iopgsz) == MMU_CAM_PGSZ_64K) ? SZ_64K : \ 186 ((iopgsz) == MMU_CAM_PGSZ_4K) ? SZ_4K : 0) 187 188 #define iopgsz_ok(bytes) (bytes_to_iopgsz(bytes) >= 0) 189 190 /* 191 * global functions 192 */ 193 extern u32 omap_iommu_arch_version(void); 194 195 extern void omap_iotlb_cr_to_e(struct cr_regs *cr, struct iotlb_entry *e); 196 197 extern int 198 omap_iopgtable_store_entry(struct omap_iommu *obj, struct iotlb_entry *e); 199 200 extern void omap_iommu_save_ctx(struct device *dev); 201 extern void omap_iommu_restore_ctx(struct device *dev); 202 203 extern int omap_foreach_iommu_device(void *data, 204 int (*fn)(struct device *, void *)); 205 206 extern int omap_install_iommu_arch(const struct iommu_functions *ops); 207 extern void omap_uninstall_iommu_arch(const struct iommu_functions *ops); 208 209 extern ssize_t 210 omap_iommu_dump_ctx(struct omap_iommu *obj, char *buf, ssize_t len); 211 extern size_t 212 omap_dump_tlb_entries(struct omap_iommu *obj, char *buf, ssize_t len); 213 214 /* 215 * register accessors 216 */ 217 static inline u32 iommu_read_reg(struct omap_iommu *obj, size_t offs) 218 { 219 return __raw_readl(obj->regbase + offs); 220 } 221 222 static inline void iommu_write_reg(struct omap_iommu *obj, u32 val, size_t offs) 223 { 224 __raw_writel(val, obj->regbase + offs); 225 } 226