1 /* 2 * omap iommu: main structures 3 * 4 * Copyright (C) 2008-2009 Nokia Corporation 5 * 6 * Written by Hiroshi DOYU <Hiroshi.DOYU@nokia.com> 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 */ 12 13 #if defined(CONFIG_ARCH_OMAP1) 14 #error "iommu for this processor not implemented yet" 15 #endif 16 17 struct iotlb_entry { 18 u32 da; 19 u32 pa; 20 u32 pgsz, prsvd, valid; 21 union { 22 u16 ap; 23 struct { 24 u32 endian, elsz, mixed; 25 }; 26 }; 27 }; 28 29 struct omap_iommu { 30 const char *name; 31 struct module *owner; 32 void __iomem *regbase; 33 struct device *dev; 34 void *isr_priv; 35 struct iommu_domain *domain; 36 37 unsigned int refcount; 38 spinlock_t iommu_lock; /* global for this whole object */ 39 40 /* 41 * We don't change iopgd for a situation like pgd for a task, 42 * but share it globally for each iommu. 43 */ 44 u32 *iopgd; 45 spinlock_t page_table_lock; /* protect iopgd */ 46 47 int nr_tlb_entries; 48 49 void *ctx; /* iommu context: registres saved area */ 50 51 int has_bus_err_back; 52 }; 53 54 struct cr_regs { 55 union { 56 struct { 57 u16 cam_l; 58 u16 cam_h; 59 }; 60 u32 cam; 61 }; 62 union { 63 struct { 64 u16 ram_l; 65 u16 ram_h; 66 }; 67 u32 ram; 68 }; 69 }; 70 71 /* architecture specific functions */ 72 struct iommu_functions { 73 unsigned long version; 74 75 int (*enable)(struct omap_iommu *obj); 76 void (*disable)(struct omap_iommu *obj); 77 void (*set_twl)(struct omap_iommu *obj, bool on); 78 u32 (*fault_isr)(struct omap_iommu *obj, u32 *ra); 79 80 void (*tlb_read_cr)(struct omap_iommu *obj, struct cr_regs *cr); 81 void (*tlb_load_cr)(struct omap_iommu *obj, struct cr_regs *cr); 82 83 struct cr_regs *(*alloc_cr)(struct omap_iommu *obj, 84 struct iotlb_entry *e); 85 int (*cr_valid)(struct cr_regs *cr); 86 u32 (*cr_to_virt)(struct cr_regs *cr); 87 void (*cr_to_e)(struct cr_regs *cr, struct iotlb_entry *e); 88 ssize_t (*dump_cr)(struct omap_iommu *obj, struct cr_regs *cr, 89 char *buf); 90 91 u32 (*get_pte_attr)(struct iotlb_entry *e); 92 93 void (*save_ctx)(struct omap_iommu *obj); 94 void (*restore_ctx)(struct omap_iommu *obj); 95 ssize_t (*dump_ctx)(struct omap_iommu *obj, char *buf, ssize_t len); 96 }; 97 98 #ifdef CONFIG_IOMMU_API 99 /** 100 * dev_to_omap_iommu() - retrieves an omap iommu object from a user device 101 * @dev: iommu client device 102 */ 103 static inline struct omap_iommu *dev_to_omap_iommu(struct device *dev) 104 { 105 struct omap_iommu_arch_data *arch_data = dev->archdata.iommu; 106 107 return arch_data->iommu_dev; 108 } 109 #endif 110 111 /* 112 * MMU Register offsets 113 */ 114 #define MMU_REVISION 0x00 115 #define MMU_IRQSTATUS 0x18 116 #define MMU_IRQENABLE 0x1c 117 #define MMU_WALKING_ST 0x40 118 #define MMU_CNTL 0x44 119 #define MMU_FAULT_AD 0x48 120 #define MMU_TTB 0x4c 121 #define MMU_LOCK 0x50 122 #define MMU_LD_TLB 0x54 123 #define MMU_CAM 0x58 124 #define MMU_RAM 0x5c 125 #define MMU_GFLUSH 0x60 126 #define MMU_FLUSH_ENTRY 0x64 127 #define MMU_READ_CAM 0x68 128 #define MMU_READ_RAM 0x6c 129 #define MMU_EMU_FAULT_AD 0x70 130 #define MMU_GP_REG 0x88 131 132 #define MMU_REG_SIZE 256 133 134 /* 135 * MMU Register bit definitions 136 */ 137 #define MMU_CAM_VATAG_SHIFT 12 138 #define MMU_CAM_VATAG_MASK \ 139 ((~0UL >> MMU_CAM_VATAG_SHIFT) << MMU_CAM_VATAG_SHIFT) 140 #define MMU_CAM_P (1 << 3) 141 #define MMU_CAM_V (1 << 2) 142 #define MMU_CAM_PGSZ_MASK 3 143 #define MMU_CAM_PGSZ_1M (0 << 0) 144 #define MMU_CAM_PGSZ_64K (1 << 0) 145 #define MMU_CAM_PGSZ_4K (2 << 0) 146 #define MMU_CAM_PGSZ_16M (3 << 0) 147 148 #define MMU_RAM_PADDR_SHIFT 12 149 #define MMU_RAM_PADDR_MASK \ 150 ((~0UL >> MMU_RAM_PADDR_SHIFT) << MMU_RAM_PADDR_SHIFT) 151 152 #define MMU_RAM_ENDIAN_SHIFT 9 153 #define MMU_RAM_ENDIAN_MASK (1 << MMU_RAM_ENDIAN_SHIFT) 154 #define MMU_RAM_ENDIAN_LITTLE (0 << MMU_RAM_ENDIAN_SHIFT) 155 #define MMU_RAM_ENDIAN_BIG (1 << MMU_RAM_ENDIAN_SHIFT) 156 157 #define MMU_RAM_ELSZ_SHIFT 7 158 #define MMU_RAM_ELSZ_MASK (3 << MMU_RAM_ELSZ_SHIFT) 159 #define MMU_RAM_ELSZ_8 (0 << MMU_RAM_ELSZ_SHIFT) 160 #define MMU_RAM_ELSZ_16 (1 << MMU_RAM_ELSZ_SHIFT) 161 #define MMU_RAM_ELSZ_32 (2 << MMU_RAM_ELSZ_SHIFT) 162 #define MMU_RAM_ELSZ_NONE (3 << MMU_RAM_ELSZ_SHIFT) 163 #define MMU_RAM_MIXED_SHIFT 6 164 #define MMU_RAM_MIXED_MASK (1 << MMU_RAM_MIXED_SHIFT) 165 #define MMU_RAM_MIXED MMU_RAM_MIXED_MASK 166 167 #define MMU_GP_REG_BUS_ERR_BACK_EN 0x1 168 169 /* 170 * utilities for super page(16MB, 1MB, 64KB and 4KB) 171 */ 172 173 #define iopgsz_max(bytes) \ 174 (((bytes) >= SZ_16M) ? SZ_16M : \ 175 ((bytes) >= SZ_1M) ? SZ_1M : \ 176 ((bytes) >= SZ_64K) ? SZ_64K : \ 177 ((bytes) >= SZ_4K) ? SZ_4K : 0) 178 179 #define bytes_to_iopgsz(bytes) \ 180 (((bytes) == SZ_16M) ? MMU_CAM_PGSZ_16M : \ 181 ((bytes) == SZ_1M) ? MMU_CAM_PGSZ_1M : \ 182 ((bytes) == SZ_64K) ? MMU_CAM_PGSZ_64K : \ 183 ((bytes) == SZ_4K) ? MMU_CAM_PGSZ_4K : -1) 184 185 #define iopgsz_to_bytes(iopgsz) \ 186 (((iopgsz) == MMU_CAM_PGSZ_16M) ? SZ_16M : \ 187 ((iopgsz) == MMU_CAM_PGSZ_1M) ? SZ_1M : \ 188 ((iopgsz) == MMU_CAM_PGSZ_64K) ? SZ_64K : \ 189 ((iopgsz) == MMU_CAM_PGSZ_4K) ? SZ_4K : 0) 190 191 #define iopgsz_ok(bytes) (bytes_to_iopgsz(bytes) >= 0) 192 193 /* 194 * global functions 195 */ 196 extern u32 omap_iommu_arch_version(void); 197 198 extern void omap_iotlb_cr_to_e(struct cr_regs *cr, struct iotlb_entry *e); 199 200 extern int 201 omap_iopgtable_store_entry(struct omap_iommu *obj, struct iotlb_entry *e); 202 203 extern void omap_iommu_save_ctx(struct device *dev); 204 extern void omap_iommu_restore_ctx(struct device *dev); 205 206 extern int omap_foreach_iommu_device(void *data, 207 int (*fn)(struct device *, void *)); 208 209 extern int omap_install_iommu_arch(const struct iommu_functions *ops); 210 extern void omap_uninstall_iommu_arch(const struct iommu_functions *ops); 211 212 extern ssize_t 213 omap_iommu_dump_ctx(struct omap_iommu *obj, char *buf, ssize_t len); 214 extern size_t 215 omap_dump_tlb_entries(struct omap_iommu *obj, char *buf, ssize_t len); 216 217 /* 218 * register accessors 219 */ 220 static inline u32 iommu_read_reg(struct omap_iommu *obj, size_t offs) 221 { 222 return __raw_readl(obj->regbase + offs); 223 } 224 225 static inline void iommu_write_reg(struct omap_iommu *obj, u32 val, size_t offs) 226 { 227 __raw_writel(val, obj->regbase + offs); 228 } 229