1 /* 2 * omap iommu: main structures 3 * 4 * Copyright (C) 2008-2009 Nokia Corporation 5 * 6 * Written by Hiroshi DOYU <Hiroshi.DOYU@nokia.com> 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 */ 12 13 #if defined(CONFIG_ARCH_OMAP1) 14 #error "iommu for this processor not implemented yet" 15 #endif 16 17 struct iotlb_entry { 18 u32 da; 19 u32 pa; 20 u32 pgsz, prsvd, valid; 21 union { 22 u16 ap; 23 struct { 24 u32 endian, elsz, mixed; 25 }; 26 }; 27 }; 28 29 struct omap_iommu { 30 const char *name; 31 struct module *owner; 32 void __iomem *regbase; 33 struct device *dev; 34 void *isr_priv; 35 struct iommu_domain *domain; 36 37 unsigned int refcount; 38 spinlock_t iommu_lock; /* global for this whole object */ 39 40 /* 41 * We don't change iopgd for a situation like pgd for a task, 42 * but share it globally for each iommu. 43 */ 44 u32 *iopgd; 45 spinlock_t page_table_lock; /* protect iopgd */ 46 47 int nr_tlb_entries; 48 49 struct list_head mmap; 50 struct mutex mmap_lock; /* protect mmap */ 51 52 void *ctx; /* iommu context: registres saved area */ 53 u32 da_start; 54 u32 da_end; 55 56 int has_bus_err_back; 57 }; 58 59 struct cr_regs { 60 union { 61 struct { 62 u16 cam_l; 63 u16 cam_h; 64 }; 65 u32 cam; 66 }; 67 union { 68 struct { 69 u16 ram_l; 70 u16 ram_h; 71 }; 72 u32 ram; 73 }; 74 }; 75 76 /* architecture specific functions */ 77 struct iommu_functions { 78 unsigned long version; 79 80 int (*enable)(struct omap_iommu *obj); 81 void (*disable)(struct omap_iommu *obj); 82 void (*set_twl)(struct omap_iommu *obj, bool on); 83 u32 (*fault_isr)(struct omap_iommu *obj, u32 *ra); 84 85 void (*tlb_read_cr)(struct omap_iommu *obj, struct cr_regs *cr); 86 void (*tlb_load_cr)(struct omap_iommu *obj, struct cr_regs *cr); 87 88 struct cr_regs *(*alloc_cr)(struct omap_iommu *obj, 89 struct iotlb_entry *e); 90 int (*cr_valid)(struct cr_regs *cr); 91 u32 (*cr_to_virt)(struct cr_regs *cr); 92 void (*cr_to_e)(struct cr_regs *cr, struct iotlb_entry *e); 93 ssize_t (*dump_cr)(struct omap_iommu *obj, struct cr_regs *cr, 94 char *buf); 95 96 u32 (*get_pte_attr)(struct iotlb_entry *e); 97 98 void (*save_ctx)(struct omap_iommu *obj); 99 void (*restore_ctx)(struct omap_iommu *obj); 100 ssize_t (*dump_ctx)(struct omap_iommu *obj, char *buf, ssize_t len); 101 }; 102 103 #ifdef CONFIG_IOMMU_API 104 /** 105 * dev_to_omap_iommu() - retrieves an omap iommu object from a user device 106 * @dev: iommu client device 107 */ 108 static inline struct omap_iommu *dev_to_omap_iommu(struct device *dev) 109 { 110 struct omap_iommu_arch_data *arch_data = dev->archdata.iommu; 111 112 return arch_data->iommu_dev; 113 } 114 #endif 115 116 /* 117 * MMU Register offsets 118 */ 119 #define MMU_REVISION 0x00 120 #define MMU_IRQSTATUS 0x18 121 #define MMU_IRQENABLE 0x1c 122 #define MMU_WALKING_ST 0x40 123 #define MMU_CNTL 0x44 124 #define MMU_FAULT_AD 0x48 125 #define MMU_TTB 0x4c 126 #define MMU_LOCK 0x50 127 #define MMU_LD_TLB 0x54 128 #define MMU_CAM 0x58 129 #define MMU_RAM 0x5c 130 #define MMU_GFLUSH 0x60 131 #define MMU_FLUSH_ENTRY 0x64 132 #define MMU_READ_CAM 0x68 133 #define MMU_READ_RAM 0x6c 134 #define MMU_EMU_FAULT_AD 0x70 135 #define MMU_GP_REG 0x88 136 137 #define MMU_REG_SIZE 256 138 139 /* 140 * MMU Register bit definitions 141 */ 142 #define MMU_CAM_VATAG_SHIFT 12 143 #define MMU_CAM_VATAG_MASK \ 144 ((~0UL >> MMU_CAM_VATAG_SHIFT) << MMU_CAM_VATAG_SHIFT) 145 #define MMU_CAM_P (1 << 3) 146 #define MMU_CAM_V (1 << 2) 147 #define MMU_CAM_PGSZ_MASK 3 148 #define MMU_CAM_PGSZ_1M (0 << 0) 149 #define MMU_CAM_PGSZ_64K (1 << 0) 150 #define MMU_CAM_PGSZ_4K (2 << 0) 151 #define MMU_CAM_PGSZ_16M (3 << 0) 152 153 #define MMU_RAM_PADDR_SHIFT 12 154 #define MMU_RAM_PADDR_MASK \ 155 ((~0UL >> MMU_RAM_PADDR_SHIFT) << MMU_RAM_PADDR_SHIFT) 156 157 #define MMU_RAM_ENDIAN_MASK (1 << MMU_RAM_ENDIAN_SHIFT) 158 #define MMU_RAM_ENDIAN_BIG (1 << MMU_RAM_ENDIAN_SHIFT) 159 160 #define MMU_RAM_ELSZ_MASK (3 << MMU_RAM_ELSZ_SHIFT) 161 #define MMU_RAM_ELSZ_8 (0 << MMU_RAM_ELSZ_SHIFT) 162 #define MMU_RAM_ELSZ_16 (1 << MMU_RAM_ELSZ_SHIFT) 163 #define MMU_RAM_ELSZ_32 (2 << MMU_RAM_ELSZ_SHIFT) 164 #define MMU_RAM_ELSZ_NONE (3 << MMU_RAM_ELSZ_SHIFT) 165 #define MMU_RAM_MIXED_SHIFT 6 166 #define MMU_RAM_MIXED_MASK (1 << MMU_RAM_MIXED_SHIFT) 167 #define MMU_RAM_MIXED MMU_RAM_MIXED_MASK 168 169 #define MMU_GP_REG_BUS_ERR_BACK_EN 0x1 170 171 /* 172 * utilities for super page(16MB, 1MB, 64KB and 4KB) 173 */ 174 175 #define iopgsz_max(bytes) \ 176 (((bytes) >= SZ_16M) ? SZ_16M : \ 177 ((bytes) >= SZ_1M) ? SZ_1M : \ 178 ((bytes) >= SZ_64K) ? SZ_64K : \ 179 ((bytes) >= SZ_4K) ? SZ_4K : 0) 180 181 #define bytes_to_iopgsz(bytes) \ 182 (((bytes) == SZ_16M) ? MMU_CAM_PGSZ_16M : \ 183 ((bytes) == SZ_1M) ? MMU_CAM_PGSZ_1M : \ 184 ((bytes) == SZ_64K) ? MMU_CAM_PGSZ_64K : \ 185 ((bytes) == SZ_4K) ? MMU_CAM_PGSZ_4K : -1) 186 187 #define iopgsz_to_bytes(iopgsz) \ 188 (((iopgsz) == MMU_CAM_PGSZ_16M) ? SZ_16M : \ 189 ((iopgsz) == MMU_CAM_PGSZ_1M) ? SZ_1M : \ 190 ((iopgsz) == MMU_CAM_PGSZ_64K) ? SZ_64K : \ 191 ((iopgsz) == MMU_CAM_PGSZ_4K) ? SZ_4K : 0) 192 193 #define iopgsz_ok(bytes) (bytes_to_iopgsz(bytes) >= 0) 194 195 /* 196 * global functions 197 */ 198 extern u32 omap_iommu_arch_version(void); 199 200 extern void omap_iotlb_cr_to_e(struct cr_regs *cr, struct iotlb_entry *e); 201 202 extern int 203 omap_iopgtable_store_entry(struct omap_iommu *obj, struct iotlb_entry *e); 204 205 extern void omap_iommu_save_ctx(struct device *dev); 206 extern void omap_iommu_restore_ctx(struct device *dev); 207 208 extern int omap_foreach_iommu_device(void *data, 209 int (*fn)(struct device *, void *)); 210 211 extern int omap_install_iommu_arch(const struct iommu_functions *ops); 212 extern void omap_uninstall_iommu_arch(const struct iommu_functions *ops); 213 214 extern ssize_t 215 omap_iommu_dump_ctx(struct omap_iommu *obj, char *buf, ssize_t len); 216 extern size_t 217 omap_dump_tlb_entries(struct omap_iommu *obj, char *buf, ssize_t len); 218 219 /* 220 * register accessors 221 */ 222 static inline u32 iommu_read_reg(struct omap_iommu *obj, size_t offs) 223 { 224 return __raw_readl(obj->regbase + offs); 225 } 226 227 static inline void iommu_write_reg(struct omap_iommu *obj, u32 val, size_t offs) 228 { 229 __raw_writel(val, obj->regbase + offs); 230 } 231