1 // SPDX-License-Identifier: GPL-2.0 2 3 /* 4 * Hyper-V stub IOMMU driver. 5 * 6 * Copyright (C) 2019, Microsoft, Inc. 7 * 8 * Author : Lan Tianyu <Tianyu.Lan@microsoft.com> 9 */ 10 11 #include <linux/types.h> 12 #include <linux/interrupt.h> 13 #include <linux/irq.h> 14 #include <linux/iommu.h> 15 #include <linux/module.h> 16 17 #include <asm/apic.h> 18 #include <asm/cpu.h> 19 #include <asm/hw_irq.h> 20 #include <asm/io_apic.h> 21 #include <asm/irq_remapping.h> 22 #include <asm/hypervisor.h> 23 #include <asm/mshyperv.h> 24 25 #include "irq_remapping.h" 26 27 #ifdef CONFIG_IRQ_REMAP 28 29 /* 30 * According 82093AA IO-APIC spec , IO APIC has a 24-entry Interrupt 31 * Redirection Table. Hyper-V exposes one single IO-APIC and so define 32 * 24 IO APIC remmapping entries. 33 */ 34 #define IOAPIC_REMAPPING_ENTRY 24 35 36 static cpumask_t ioapic_max_cpumask = { CPU_BITS_NONE }; 37 static struct irq_domain *ioapic_ir_domain; 38 39 static int hyperv_ir_set_affinity(struct irq_data *data, 40 const struct cpumask *mask, bool force) 41 { 42 struct irq_data *parent = data->parent_data; 43 struct irq_cfg *cfg = irqd_cfg(data); 44 int ret; 45 46 /* Return error If new irq affinity is out of ioapic_max_cpumask. */ 47 if (!cpumask_subset(mask, &ioapic_max_cpumask)) 48 return -EINVAL; 49 50 ret = parent->chip->irq_set_affinity(parent, mask, force); 51 if (ret < 0 || ret == IRQ_SET_MASK_OK_DONE) 52 return ret; 53 54 send_cleanup_vector(cfg); 55 56 return 0; 57 } 58 59 static struct irq_chip hyperv_ir_chip = { 60 .name = "HYPERV-IR", 61 .irq_ack = apic_ack_irq, 62 .irq_set_affinity = hyperv_ir_set_affinity, 63 }; 64 65 static int hyperv_irq_remapping_alloc(struct irq_domain *domain, 66 unsigned int virq, unsigned int nr_irqs, 67 void *arg) 68 { 69 struct irq_alloc_info *info = arg; 70 struct irq_data *irq_data; 71 struct irq_desc *desc; 72 int ret = 0; 73 74 if (!info || info->type != X86_IRQ_ALLOC_TYPE_IOAPIC || nr_irqs > 1) 75 return -EINVAL; 76 77 ret = irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, arg); 78 if (ret < 0) 79 return ret; 80 81 irq_data = irq_domain_get_irq_data(domain, virq); 82 if (!irq_data) { 83 irq_domain_free_irqs_common(domain, virq, nr_irqs); 84 return -EINVAL; 85 } 86 87 irq_data->chip = &hyperv_ir_chip; 88 89 /* 90 * Hypver-V IO APIC irq affinity should be in the scope of 91 * ioapic_max_cpumask because no irq remapping support. 92 */ 93 desc = irq_data_to_desc(irq_data); 94 cpumask_copy(desc->irq_common_data.affinity, &ioapic_max_cpumask); 95 96 return 0; 97 } 98 99 static void hyperv_irq_remapping_free(struct irq_domain *domain, 100 unsigned int virq, unsigned int nr_irqs) 101 { 102 irq_domain_free_irqs_common(domain, virq, nr_irqs); 103 } 104 105 static int hyperv_irq_remapping_select(struct irq_domain *d, 106 struct irq_fwspec *fwspec, 107 enum irq_domain_bus_token bus_token) 108 { 109 /* Claim the only I/O APIC emulated by Hyper-V */ 110 return x86_fwspec_is_ioapic(fwspec); 111 } 112 113 static const struct irq_domain_ops hyperv_ir_domain_ops = { 114 .select = hyperv_irq_remapping_select, 115 .alloc = hyperv_irq_remapping_alloc, 116 .free = hyperv_irq_remapping_free, 117 }; 118 119 static const struct irq_domain_ops hyperv_root_ir_domain_ops; 120 static int __init hyperv_prepare_irq_remapping(void) 121 { 122 struct fwnode_handle *fn; 123 int i; 124 const char *name; 125 const struct irq_domain_ops *ops; 126 127 if (!hypervisor_is_type(X86_HYPER_MS_HYPERV) || 128 x86_init.hyper.msi_ext_dest_id() || 129 !x2apic_supported()) 130 return -ENODEV; 131 132 if (hv_root_partition) { 133 name = "HYPERV-ROOT-IR"; 134 ops = &hyperv_root_ir_domain_ops; 135 } else { 136 name = "HYPERV-IR"; 137 ops = &hyperv_ir_domain_ops; 138 } 139 140 fn = irq_domain_alloc_named_id_fwnode(name, 0); 141 if (!fn) 142 return -ENOMEM; 143 144 ioapic_ir_domain = 145 irq_domain_create_hierarchy(arch_get_ir_parent_domain(), 146 0, IOAPIC_REMAPPING_ENTRY, fn, ops, NULL); 147 148 if (!ioapic_ir_domain) { 149 irq_domain_free_fwnode(fn); 150 return -ENOMEM; 151 } 152 153 if (hv_root_partition) 154 return 0; /* The rest is only relevant to guests */ 155 156 /* 157 * Hyper-V doesn't provide irq remapping function for 158 * IO-APIC and so IO-APIC only accepts 8-bit APIC ID. 159 * Cpu's APIC ID is read from ACPI MADT table and APIC IDs 160 * in the MADT table on Hyper-v are sorted monotonic increasingly. 161 * APIC ID reflects cpu topology. There maybe some APIC ID 162 * gaps when cpu number in a socket is not power of two. Prepare 163 * max cpu affinity for IOAPIC irqs. Scan cpu 0-255 and set cpu 164 * into ioapic_max_cpumask if its APIC ID is less than 256. 165 */ 166 for (i = min_t(unsigned int, num_possible_cpus() - 1, 255); i >= 0; i--) 167 if (cpu_physical_id(i) < 256) 168 cpumask_set_cpu(i, &ioapic_max_cpumask); 169 170 return 0; 171 } 172 173 static int __init hyperv_enable_irq_remapping(void) 174 { 175 return IRQ_REMAP_X2APIC_MODE; 176 } 177 178 struct irq_remap_ops hyperv_irq_remap_ops = { 179 .prepare = hyperv_prepare_irq_remapping, 180 .enable = hyperv_enable_irq_remapping, 181 }; 182 183 /* IRQ remapping domain when Linux runs as the root partition */ 184 struct hyperv_root_ir_data { 185 u8 ioapic_id; 186 bool is_level; 187 struct hv_interrupt_entry entry; 188 }; 189 190 static void 191 hyperv_root_ir_compose_msi_msg(struct irq_data *irq_data, struct msi_msg *msg) 192 { 193 u64 status; 194 u32 vector; 195 struct irq_cfg *cfg; 196 int ioapic_id; 197 const struct cpumask *affinity; 198 int cpu; 199 struct hv_interrupt_entry entry; 200 struct hyperv_root_ir_data *data = irq_data->chip_data; 201 struct IO_APIC_route_entry e; 202 203 cfg = irqd_cfg(irq_data); 204 affinity = irq_data_get_effective_affinity_mask(irq_data); 205 cpu = cpumask_first_and(affinity, cpu_online_mask); 206 207 vector = cfg->vector; 208 ioapic_id = data->ioapic_id; 209 210 if (data->entry.source == HV_DEVICE_TYPE_IOAPIC 211 && data->entry.ioapic_rte.as_uint64) { 212 entry = data->entry; 213 214 status = hv_unmap_ioapic_interrupt(ioapic_id, &entry); 215 216 if (status != HV_STATUS_SUCCESS) 217 pr_debug("%s: unexpected unmap status %lld\n", __func__, status); 218 219 data->entry.ioapic_rte.as_uint64 = 0; 220 data->entry.source = 0; /* Invalid source */ 221 } 222 223 224 status = hv_map_ioapic_interrupt(ioapic_id, data->is_level, cpu, 225 vector, &entry); 226 227 if (status != HV_STATUS_SUCCESS) { 228 pr_err("%s: map hypercall failed, status %lld\n", __func__, status); 229 return; 230 } 231 232 data->entry = entry; 233 234 /* Turn it into an IO_APIC_route_entry, and generate MSI MSG. */ 235 e.w1 = entry.ioapic_rte.low_uint32; 236 e.w2 = entry.ioapic_rte.high_uint32; 237 238 memset(msg, 0, sizeof(*msg)); 239 msg->arch_data.vector = e.vector; 240 msg->arch_data.delivery_mode = e.delivery_mode; 241 msg->arch_addr_lo.dest_mode_logical = e.dest_mode_logical; 242 msg->arch_addr_lo.dmar_format = e.ir_format; 243 msg->arch_addr_lo.dmar_index_0_14 = e.ir_index_0_14; 244 } 245 246 static int hyperv_root_ir_set_affinity(struct irq_data *data, 247 const struct cpumask *mask, bool force) 248 { 249 struct irq_data *parent = data->parent_data; 250 struct irq_cfg *cfg = irqd_cfg(data); 251 int ret; 252 253 ret = parent->chip->irq_set_affinity(parent, mask, force); 254 if (ret < 0 || ret == IRQ_SET_MASK_OK_DONE) 255 return ret; 256 257 send_cleanup_vector(cfg); 258 259 return 0; 260 } 261 262 static struct irq_chip hyperv_root_ir_chip = { 263 .name = "HYPERV-ROOT-IR", 264 .irq_ack = apic_ack_irq, 265 .irq_set_affinity = hyperv_root_ir_set_affinity, 266 .irq_compose_msi_msg = hyperv_root_ir_compose_msi_msg, 267 }; 268 269 static int hyperv_root_irq_remapping_alloc(struct irq_domain *domain, 270 unsigned int virq, unsigned int nr_irqs, 271 void *arg) 272 { 273 struct irq_alloc_info *info = arg; 274 struct irq_data *irq_data; 275 struct hyperv_root_ir_data *data; 276 int ret = 0; 277 278 if (!info || info->type != X86_IRQ_ALLOC_TYPE_IOAPIC || nr_irqs > 1) 279 return -EINVAL; 280 281 ret = irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, arg); 282 if (ret < 0) 283 return ret; 284 285 data = kzalloc(sizeof(*data), GFP_KERNEL); 286 if (!data) { 287 irq_domain_free_irqs_common(domain, virq, nr_irqs); 288 return -ENOMEM; 289 } 290 291 irq_data = irq_domain_get_irq_data(domain, virq); 292 if (!irq_data) { 293 kfree(data); 294 irq_domain_free_irqs_common(domain, virq, nr_irqs); 295 return -EINVAL; 296 } 297 298 data->ioapic_id = info->devid; 299 data->is_level = info->ioapic.is_level; 300 301 irq_data->chip = &hyperv_root_ir_chip; 302 irq_data->chip_data = data; 303 304 return 0; 305 } 306 307 static void hyperv_root_irq_remapping_free(struct irq_domain *domain, 308 unsigned int virq, unsigned int nr_irqs) 309 { 310 struct irq_data *irq_data; 311 struct hyperv_root_ir_data *data; 312 struct hv_interrupt_entry *e; 313 int i; 314 315 for (i = 0; i < nr_irqs; i++) { 316 irq_data = irq_domain_get_irq_data(domain, virq + i); 317 318 if (irq_data && irq_data->chip_data) { 319 data = irq_data->chip_data; 320 e = &data->entry; 321 322 if (e->source == HV_DEVICE_TYPE_IOAPIC 323 && e->ioapic_rte.as_uint64) 324 hv_unmap_ioapic_interrupt(data->ioapic_id, 325 &data->entry); 326 327 kfree(data); 328 } 329 } 330 331 irq_domain_free_irqs_common(domain, virq, nr_irqs); 332 } 333 334 static const struct irq_domain_ops hyperv_root_ir_domain_ops = { 335 .select = hyperv_irq_remapping_select, 336 .alloc = hyperv_root_irq_remapping_alloc, 337 .free = hyperv_root_irq_remapping_free, 338 }; 339 340 #endif 341