1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (C) 2009-2010 Advanced Micro Devices, Inc. 4 * Author: Joerg Roedel <jroedel@suse.de> 5 */ 6 7 #ifndef AMD_IOMMU_H 8 #define AMD_IOMMU_H 9 10 #include <linux/iommu.h> 11 12 #include "amd_iommu_types.h" 13 14 extern int amd_iommu_get_num_iommus(void); 15 extern int amd_iommu_init_dma_ops(void); 16 extern int amd_iommu_init_passthrough(void); 17 extern irqreturn_t amd_iommu_int_thread(int irq, void *data); 18 extern irqreturn_t amd_iommu_int_handler(int irq, void *data); 19 extern void amd_iommu_apply_erratum_63(u16 devid); 20 extern void amd_iommu_reset_cmd_buffer(struct amd_iommu *iommu); 21 extern int amd_iommu_init_devices(void); 22 extern void amd_iommu_uninit_devices(void); 23 extern void amd_iommu_init_notifier(void); 24 extern int amd_iommu_init_api(void); 25 26 #ifdef CONFIG_AMD_IOMMU_DEBUGFS 27 void amd_iommu_debugfs_setup(struct amd_iommu *iommu); 28 #else 29 static inline void amd_iommu_debugfs_setup(struct amd_iommu *iommu) {} 30 #endif 31 32 /* Needed for interrupt remapping */ 33 extern int amd_iommu_prepare(void); 34 extern int amd_iommu_enable(void); 35 extern void amd_iommu_disable(void); 36 extern int amd_iommu_reenable(int); 37 extern int amd_iommu_enable_faulting(void); 38 extern int amd_iommu_guest_ir; 39 40 /* IOMMUv2 specific functions */ 41 struct iommu_domain; 42 43 extern bool amd_iommu_v2_supported(void); 44 extern struct amd_iommu *get_amd_iommu(unsigned int idx); 45 extern u8 amd_iommu_pc_get_max_banks(unsigned int idx); 46 extern bool amd_iommu_pc_supported(void); 47 extern u8 amd_iommu_pc_get_max_counters(unsigned int idx); 48 extern int amd_iommu_pc_get_reg(struct amd_iommu *iommu, u8 bank, u8 cntr, 49 u8 fxn, u64 *value); 50 extern int amd_iommu_pc_set_reg(struct amd_iommu *iommu, u8 bank, u8 cntr, 51 u8 fxn, u64 *value); 52 53 extern int amd_iommu_register_ppr_notifier(struct notifier_block *nb); 54 extern int amd_iommu_unregister_ppr_notifier(struct notifier_block *nb); 55 extern void amd_iommu_domain_direct_map(struct iommu_domain *dom); 56 extern int amd_iommu_domain_enable_v2(struct iommu_domain *dom, int pasids); 57 extern int amd_iommu_flush_page(struct iommu_domain *dom, u32 pasid, 58 u64 address); 59 extern int amd_iommu_flush_tlb(struct iommu_domain *dom, u32 pasid); 60 extern int amd_iommu_domain_set_gcr3(struct iommu_domain *dom, u32 pasid, 61 unsigned long cr3); 62 extern int amd_iommu_domain_clear_gcr3(struct iommu_domain *dom, u32 pasid); 63 extern struct iommu_domain *amd_iommu_get_v2_domain(struct pci_dev *pdev); 64 65 #ifdef CONFIG_IRQ_REMAP 66 extern int amd_iommu_create_irq_domain(struct amd_iommu *iommu); 67 #else 68 static inline int amd_iommu_create_irq_domain(struct amd_iommu *iommu) 69 { 70 return 0; 71 } 72 #endif 73 74 #define PPR_SUCCESS 0x0 75 #define PPR_INVALID 0x1 76 #define PPR_FAILURE 0xf 77 78 extern int amd_iommu_complete_ppr(struct pci_dev *pdev, u32 pasid, 79 int status, int tag); 80 81 static inline bool is_rd890_iommu(struct pci_dev *pdev) 82 { 83 return (pdev->vendor == PCI_VENDOR_ID_ATI) && 84 (pdev->device == PCI_DEVICE_ID_RD890_IOMMU); 85 } 86 87 static inline bool iommu_feature(struct amd_iommu *iommu, u64 f) 88 { 89 if (!(iommu->cap & (1 << IOMMU_CAP_EFR))) 90 return false; 91 92 return !!(iommu->features & f); 93 } 94 95 static inline u64 iommu_virt_to_phys(void *vaddr) 96 { 97 return (u64)__sme_set(virt_to_phys(vaddr)); 98 } 99 100 static inline void *iommu_phys_to_virt(unsigned long paddr) 101 { 102 return phys_to_virt(__sme_clr(paddr)); 103 } 104 105 extern bool translation_pre_enabled(struct amd_iommu *iommu); 106 extern bool amd_iommu_is_attach_deferred(struct iommu_domain *domain, 107 struct device *dev); 108 extern int __init add_special_device(u8 type, u8 id, u16 *devid, 109 bool cmd_line); 110 111 #ifdef CONFIG_DMI 112 void amd_iommu_apply_ivrs_quirks(void); 113 #else 114 static inline void amd_iommu_apply_ivrs_quirks(void) { } 115 #endif 116 117 #endif 118