1# IOMMU_API always gets selected by whoever wants it. 2config IOMMU_API 3 bool 4 5menuconfig IOMMU_SUPPORT 6 bool "IOMMU Hardware Support" 7 default y 8 ---help--- 9 Say Y here if you want to compile device drivers for IO Memory 10 Management Units into the kernel. These devices usually allow to 11 remap DMA requests and/or remap interrupts from other devices on the 12 system. 13 14if IOMMU_SUPPORT 15 16config OF_IOMMU 17 def_bool y 18 depends on OF 19 20config FSL_PAMU 21 bool "Freescale IOMMU support" 22 depends on PPC_E500MC 23 select IOMMU_API 24 select GENERIC_ALLOCATOR 25 help 26 Freescale PAMU support. PAMU is the IOMMU present on Freescale QorIQ platforms. 27 PAMU can authorize memory access, remap the memory address, and remap I/O 28 transaction types. 29 30# MSM IOMMU support 31config MSM_IOMMU 32 bool "MSM IOMMU Support" 33 depends on ARCH_MSM8X60 || ARCH_MSM8960 34 select IOMMU_API 35 help 36 Support for the IOMMUs found on certain Qualcomm SOCs. 37 These IOMMUs allow virtualization of the address space used by most 38 cores within the multimedia subsystem. 39 40 If unsure, say N here. 41 42config IOMMU_PGTABLES_L2 43 def_bool y 44 depends on MSM_IOMMU && MMU && SMP && CPU_DCACHE_DISABLE=n 45 46# AMD IOMMU support 47config AMD_IOMMU 48 bool "AMD IOMMU support" 49 select SWIOTLB 50 select PCI_MSI 51 select PCI_ATS 52 select PCI_PRI 53 select PCI_PASID 54 select IOMMU_API 55 depends on X86_64 && PCI && ACPI 56 ---help--- 57 With this option you can enable support for AMD IOMMU hardware in 58 your system. An IOMMU is a hardware component which provides 59 remapping of DMA memory accesses from devices. With an AMD IOMMU you 60 can isolate the DMA memory of different devices and protect the 61 system from misbehaving device drivers or hardware. 62 63 You can find out if your system has an AMD IOMMU if you look into 64 your BIOS for an option to enable it or if you have an IVRS ACPI 65 table. 66 67config AMD_IOMMU_STATS 68 bool "Export AMD IOMMU statistics to debugfs" 69 depends on AMD_IOMMU 70 select DEBUG_FS 71 ---help--- 72 This option enables code in the AMD IOMMU driver to collect various 73 statistics about whats happening in the driver and exports that 74 information to userspace via debugfs. 75 If unsure, say N. 76 77config AMD_IOMMU_V2 78 tristate "AMD IOMMU Version 2 driver" 79 depends on AMD_IOMMU && PROFILING 80 select MMU_NOTIFIER 81 ---help--- 82 This option enables support for the AMD IOMMUv2 features of the IOMMU 83 hardware. Select this option if you want to use devices that support 84 the PCI PRI and PASID interface. 85 86# Intel IOMMU support 87config DMAR_TABLE 88 bool 89 90config INTEL_IOMMU 91 bool "Support for Intel IOMMU using DMA Remapping Devices" 92 depends on PCI_MSI && ACPI && (X86 || IA64_GENERIC) 93 select IOMMU_API 94 select DMAR_TABLE 95 help 96 DMA remapping (DMAR) devices support enables independent address 97 translations for Direct Memory Access (DMA) from devices. 98 These DMA remapping devices are reported via ACPI tables 99 and include PCI device scope covered by these DMA 100 remapping devices. 101 102config INTEL_IOMMU_DEFAULT_ON 103 def_bool y 104 prompt "Enable Intel DMA Remapping Devices by default" 105 depends on INTEL_IOMMU 106 help 107 Selecting this option will enable a DMAR device at boot time if 108 one is found. If this option is not selected, DMAR support can 109 be enabled by passing intel_iommu=on to the kernel. 110 111config INTEL_IOMMU_BROKEN_GFX_WA 112 bool "Workaround broken graphics drivers (going away soon)" 113 depends on INTEL_IOMMU && BROKEN && X86 114 ---help--- 115 Current Graphics drivers tend to use physical address 116 for DMA and avoid using DMA APIs. Setting this config 117 option permits the IOMMU driver to set a unity map for 118 all the OS-visible memory. Hence the driver can continue 119 to use physical addresses for DMA, at least until this 120 option is removed in the 2.6.32 kernel. 121 122config INTEL_IOMMU_FLOPPY_WA 123 def_bool y 124 depends on INTEL_IOMMU && X86 125 ---help--- 126 Floppy disk drivers are known to bypass DMA API calls 127 thereby failing to work when IOMMU is enabled. This 128 workaround will setup a 1:1 mapping for the first 129 16MiB to make floppy (an ISA device) work. 130 131config IRQ_REMAP 132 bool "Support for Interrupt Remapping" 133 depends on X86_64 && X86_IO_APIC && PCI_MSI && ACPI 134 select DMAR_TABLE 135 ---help--- 136 Supports Interrupt remapping for IO-APIC and MSI devices. 137 To use x2apic mode in the CPU's which support x2APIC enhancements or 138 to support platforms with CPU's having > 8 bit APIC ID, say Y. 139 140# OMAP IOMMU support 141config OMAP_IOMMU 142 bool "OMAP IOMMU Support" 143 depends on ARCH_OMAP2PLUS 144 select IOMMU_API 145 146config OMAP_IOVMM 147 tristate "OMAP IO Virtual Memory Manager Support" 148 depends on OMAP_IOMMU 149 150config OMAP_IOMMU_DEBUG 151 tristate "Export OMAP IOMMU/IOVMM internals in DebugFS" 152 depends on OMAP_IOVMM && DEBUG_FS 153 help 154 Select this to see extensive information about 155 the internal state of OMAP IOMMU/IOVMM in debugfs. 156 157 Say N unless you know you need this. 158 159config TEGRA_IOMMU_GART 160 bool "Tegra GART IOMMU Support" 161 depends on ARCH_TEGRA_2x_SOC 162 select IOMMU_API 163 help 164 Enables support for remapping discontiguous physical memory 165 shared with the operating system into contiguous I/O virtual 166 space through the GART (Graphics Address Relocation Table) 167 hardware included on Tegra SoCs. 168 169config TEGRA_IOMMU_SMMU 170 bool "Tegra SMMU IOMMU Support" 171 depends on ARCH_TEGRA && TEGRA_AHB 172 select IOMMU_API 173 help 174 Enables support for remapping discontiguous physical memory 175 shared with the operating system into contiguous I/O virtual 176 space through the SMMU (System Memory Management Unit) 177 hardware included on Tegra SoCs. 178 179config EXYNOS_IOMMU 180 bool "Exynos IOMMU Support" 181 depends on ARCH_EXYNOS && EXYNOS_DEV_SYSMMU 182 select IOMMU_API 183 help 184 Support for the IOMMU(System MMU) of Samsung Exynos application 185 processor family. This enables H/W multimedia accellerators to see 186 non-linear physical memory chunks as a linear memory in their 187 address spaces 188 189 If unsure, say N here. 190 191config EXYNOS_IOMMU_DEBUG 192 bool "Debugging log for Exynos IOMMU" 193 depends on EXYNOS_IOMMU 194 help 195 Select this to see the detailed log message that shows what 196 happens in the IOMMU driver 197 198 Say N unless you need kernel log message for IOMMU debugging 199 200config SHMOBILE_IPMMU 201 bool 202 203config SHMOBILE_IPMMU_TLB 204 bool 205 206config SHMOBILE_IOMMU 207 bool "IOMMU for Renesas IPMMU/IPMMUI" 208 default n 209 depends on ARM 210 depends on ARCH_SHMOBILE || COMPILE_TEST 211 select IOMMU_API 212 select ARM_DMA_USE_IOMMU 213 select SHMOBILE_IPMMU 214 select SHMOBILE_IPMMU_TLB 215 help 216 Support for Renesas IPMMU/IPMMUI. This option enables 217 remapping of DMA memory accesses from all of the IP blocks 218 on the ICB. 219 220 Warning: Drivers (including userspace drivers of UIO 221 devices) of the IP blocks on the ICB *must* use addresses 222 allocated from the IPMMU (iova) for DMA with this option 223 enabled. 224 225 If unsure, say N. 226 227choice 228 prompt "IPMMU/IPMMUI address space size" 229 default SHMOBILE_IOMMU_ADDRSIZE_2048MB 230 depends on SHMOBILE_IOMMU 231 help 232 This option sets IPMMU/IPMMUI address space size by 233 adjusting the 1st level page table size. The page table size 234 is calculated as follows: 235 236 page table size = number of page table entries * 4 bytes 237 number of page table entries = address space size / 1 MiB 238 239 For example, when the address space size is 2048 MiB, the 240 1st level page table size is 8192 bytes. 241 242 config SHMOBILE_IOMMU_ADDRSIZE_2048MB 243 bool "2 GiB" 244 245 config SHMOBILE_IOMMU_ADDRSIZE_1024MB 246 bool "1 GiB" 247 248 config SHMOBILE_IOMMU_ADDRSIZE_512MB 249 bool "512 MiB" 250 251 config SHMOBILE_IOMMU_ADDRSIZE_256MB 252 bool "256 MiB" 253 254 config SHMOBILE_IOMMU_ADDRSIZE_128MB 255 bool "128 MiB" 256 257 config SHMOBILE_IOMMU_ADDRSIZE_64MB 258 bool "64 MiB" 259 260 config SHMOBILE_IOMMU_ADDRSIZE_32MB 261 bool "32 MiB" 262 263endchoice 264 265config SHMOBILE_IOMMU_L1SIZE 266 int 267 default 8192 if SHMOBILE_IOMMU_ADDRSIZE_2048MB 268 default 4096 if SHMOBILE_IOMMU_ADDRSIZE_1024MB 269 default 2048 if SHMOBILE_IOMMU_ADDRSIZE_512MB 270 default 1024 if SHMOBILE_IOMMU_ADDRSIZE_256MB 271 default 512 if SHMOBILE_IOMMU_ADDRSIZE_128MB 272 default 256 if SHMOBILE_IOMMU_ADDRSIZE_64MB 273 default 128 if SHMOBILE_IOMMU_ADDRSIZE_32MB 274 275config SPAPR_TCE_IOMMU 276 bool "sPAPR TCE IOMMU Support" 277 depends on PPC_POWERNV || PPC_PSERIES 278 select IOMMU_API 279 help 280 Enables bits of IOMMU API required by VFIO. The iommu_ops 281 is not implemented as it is not necessary for VFIO. 282 283config ARM_SMMU 284 bool "ARM Ltd. System MMU (SMMU) Support" 285 depends on ARM64 || (ARM_LPAE && OF) 286 select IOMMU_API 287 select ARM_DMA_USE_IOMMU if ARM 288 help 289 Support for implementations of the ARM System MMU architecture 290 versions 1 and 2. The driver supports both v7l and v8l table 291 formats with 4k and 64k page sizes. 292 293 Say Y here if your SoC includes an IOMMU device implementing 294 the ARM SMMU architecture. 295 296endif # IOMMU_SUPPORT 297