xref: /openbmc/linux/drivers/iommu/Kconfig (revision e1d3c0fd)
1ab493a0fSOhad Ben-Cohen# IOMMU_API always gets selected by whoever wants it.
2ab493a0fSOhad Ben-Cohenconfig IOMMU_API
3ab493a0fSOhad Ben-Cohen	bool
4b10f127eSOhad Ben-Cohen
568255b62SJoerg Roedelmenuconfig IOMMU_SUPPORT
668255b62SJoerg Roedel	bool "IOMMU Hardware Support"
768255b62SJoerg Roedel	default y
868255b62SJoerg Roedel	---help---
968255b62SJoerg Roedel	  Say Y here if you want to compile device drivers for IO Memory
1068255b62SJoerg Roedel	  Management Units into the kernel. These devices usually allow to
1168255b62SJoerg Roedel	  remap DMA requests and/or remap interrupts from other devices on the
1268255b62SJoerg Roedel	  system.
1368255b62SJoerg Roedel
1468255b62SJoerg Roedelif IOMMU_SUPPORT
1568255b62SJoerg Roedel
16fdb1d7beSWill Deaconmenu "Generic IOMMU Pagetable Support"
17fdb1d7beSWill Deacon
18fdb1d7beSWill Deacon# Selected by the actual pagetable implementations
19fdb1d7beSWill Deaconconfig IOMMU_IO_PGTABLE
20fdb1d7beSWill Deacon	bool
21fdb1d7beSWill Deacon
22e1d3c0fdSWill Deaconconfig IOMMU_IO_PGTABLE_LPAE
23e1d3c0fdSWill Deacon	bool "ARMv7/v8 Long Descriptor Format"
24e1d3c0fdSWill Deacon	select IOMMU_IO_PGTABLE
25e1d3c0fdSWill Deacon	help
26e1d3c0fdSWill Deacon	  Enable support for the ARM long descriptor pagetable format.
27e1d3c0fdSWill Deacon	  This allocator supports 4K/2M/1G, 16K/32M and 64K/512M page
28e1d3c0fdSWill Deacon	  sizes at both stage-1 and stage-2, as well as address spaces
29e1d3c0fdSWill Deacon	  up to 48-bits in size.
30e1d3c0fdSWill Deacon
31fdb1d7beSWill Deaconendmenu
32fdb1d7beSWill Deacon
334e0ee78fSHiroshi Doyuconfig OF_IOMMU
344e0ee78fSHiroshi Doyu       def_bool y
357eba1d51SWill Deacon       depends on OF && IOMMU_API
364e0ee78fSHiroshi Doyu
37695093e3SVarun Sethiconfig FSL_PAMU
38695093e3SVarun Sethi	bool "Freescale IOMMU support"
39695093e3SVarun Sethi	depends on PPC_E500MC
40695093e3SVarun Sethi	select IOMMU_API
41695093e3SVarun Sethi	select GENERIC_ALLOCATOR
42695093e3SVarun Sethi	help
43695093e3SVarun Sethi	  Freescale PAMU support. PAMU is the IOMMU present on Freescale QorIQ platforms.
44695093e3SVarun Sethi	  PAMU can authorize memory access, remap the memory address, and remap I/O
45695093e3SVarun Sethi	  transaction types.
46695093e3SVarun Sethi
47b10f127eSOhad Ben-Cohen# MSM IOMMU support
48b10f127eSOhad Ben-Cohenconfig MSM_IOMMU
49b10f127eSOhad Ben-Cohen	bool "MSM IOMMU Support"
50b10f127eSOhad Ben-Cohen	depends on ARCH_MSM8X60 || ARCH_MSM8960
51b10f127eSOhad Ben-Cohen	select IOMMU_API
52b10f127eSOhad Ben-Cohen	help
53b10f127eSOhad Ben-Cohen	  Support for the IOMMUs found on certain Qualcomm SOCs.
54b10f127eSOhad Ben-Cohen	  These IOMMUs allow virtualization of the address space used by most
55b10f127eSOhad Ben-Cohen	  cores within the multimedia subsystem.
56b10f127eSOhad Ben-Cohen
57b10f127eSOhad Ben-Cohen	  If unsure, say N here.
58b10f127eSOhad Ben-Cohen
59b10f127eSOhad Ben-Cohenconfig IOMMU_PGTABLES_L2
60b10f127eSOhad Ben-Cohen	def_bool y
61b10f127eSOhad Ben-Cohen	depends on MSM_IOMMU && MMU && SMP && CPU_DCACHE_DISABLE=n
6229b68415SOhad Ben-Cohen
6329b68415SOhad Ben-Cohen# AMD IOMMU support
6429b68415SOhad Ben-Cohenconfig AMD_IOMMU
6529b68415SOhad Ben-Cohen	bool "AMD IOMMU support"
6629b68415SOhad Ben-Cohen	select SWIOTLB
6729b68415SOhad Ben-Cohen	select PCI_MSI
6852815b75SJoerg Roedel	select PCI_ATS
6952815b75SJoerg Roedel	select PCI_PRI
7052815b75SJoerg Roedel	select PCI_PASID
7129b68415SOhad Ben-Cohen	select IOMMU_API
720dbc6078SThomas Petazzoni	depends on X86_64 && PCI && ACPI
7329b68415SOhad Ben-Cohen	---help---
7429b68415SOhad Ben-Cohen	  With this option you can enable support for AMD IOMMU hardware in
7529b68415SOhad Ben-Cohen	  your system. An IOMMU is a hardware component which provides
7629b68415SOhad Ben-Cohen	  remapping of DMA memory accesses from devices. With an AMD IOMMU you
7759bf8964SMasanari Iida	  can isolate the DMA memory of different devices and protect the
7829b68415SOhad Ben-Cohen	  system from misbehaving device drivers or hardware.
7929b68415SOhad Ben-Cohen
8029b68415SOhad Ben-Cohen	  You can find out if your system has an AMD IOMMU if you look into
8129b68415SOhad Ben-Cohen	  your BIOS for an option to enable it or if you have an IVRS ACPI
8229b68415SOhad Ben-Cohen	  table.
8329b68415SOhad Ben-Cohen
8429b68415SOhad Ben-Cohenconfig AMD_IOMMU_STATS
8529b68415SOhad Ben-Cohen	bool "Export AMD IOMMU statistics to debugfs"
8629b68415SOhad Ben-Cohen	depends on AMD_IOMMU
8729b68415SOhad Ben-Cohen	select DEBUG_FS
8829b68415SOhad Ben-Cohen	---help---
8929b68415SOhad Ben-Cohen	  This option enables code in the AMD IOMMU driver to collect various
9029b68415SOhad Ben-Cohen	  statistics about whats happening in the driver and exports that
9129b68415SOhad Ben-Cohen	  information to userspace via debugfs.
9229b68415SOhad Ben-Cohen	  If unsure, say N.
93166e9278SOhad Ben-Cohen
94e3c495c7SJoerg Roedelconfig AMD_IOMMU_V2
95a446e219SKees Cook	tristate "AMD IOMMU Version 2 driver"
96e5cac32cSBorislav Petkov	depends on AMD_IOMMU
978736b2c3SJoerg Roedel	select MMU_NOTIFIER
98e3c495c7SJoerg Roedel	---help---
99e3c495c7SJoerg Roedel	  This option enables support for the AMD IOMMUv2 features of the IOMMU
100e3c495c7SJoerg Roedel	  hardware. Select this option if you want to use devices that support
10159bf8964SMasanari Iida	  the PCI PRI and PASID interface.
102e3c495c7SJoerg Roedel
103166e9278SOhad Ben-Cohen# Intel IOMMU support
104d3f13810SSuresh Siddhaconfig DMAR_TABLE
105d3f13810SSuresh Siddha	bool
106d3f13810SSuresh Siddha
107d3f13810SSuresh Siddhaconfig INTEL_IOMMU
108d3f13810SSuresh Siddha	bool "Support for Intel IOMMU using DMA Remapping Devices"
109166e9278SOhad Ben-Cohen	depends on PCI_MSI && ACPI && (X86 || IA64_GENERIC)
110166e9278SOhad Ben-Cohen	select IOMMU_API
111d3f13810SSuresh Siddha	select DMAR_TABLE
112166e9278SOhad Ben-Cohen	help
113166e9278SOhad Ben-Cohen	  DMA remapping (DMAR) devices support enables independent address
114166e9278SOhad Ben-Cohen	  translations for Direct Memory Access (DMA) from devices.
115166e9278SOhad Ben-Cohen	  These DMA remapping devices are reported via ACPI tables
116166e9278SOhad Ben-Cohen	  and include PCI device scope covered by these DMA
117166e9278SOhad Ben-Cohen	  remapping devices.
118166e9278SOhad Ben-Cohen
119d3f13810SSuresh Siddhaconfig INTEL_IOMMU_DEFAULT_ON
120166e9278SOhad Ben-Cohen	def_bool y
121d3f13810SSuresh Siddha	prompt "Enable Intel DMA Remapping Devices by default"
122d3f13810SSuresh Siddha	depends on INTEL_IOMMU
123166e9278SOhad Ben-Cohen	help
124166e9278SOhad Ben-Cohen	  Selecting this option will enable a DMAR device at boot time if
125166e9278SOhad Ben-Cohen	  one is found. If this option is not selected, DMAR support can
126166e9278SOhad Ben-Cohen	  be enabled by passing intel_iommu=on to the kernel.
127166e9278SOhad Ben-Cohen
128d3f13810SSuresh Siddhaconfig INTEL_IOMMU_BROKEN_GFX_WA
129166e9278SOhad Ben-Cohen	bool "Workaround broken graphics drivers (going away soon)"
130d3f13810SSuresh Siddha	depends on INTEL_IOMMU && BROKEN && X86
131166e9278SOhad Ben-Cohen	---help---
132166e9278SOhad Ben-Cohen	  Current Graphics drivers tend to use physical address
133166e9278SOhad Ben-Cohen	  for DMA and avoid using DMA APIs. Setting this config
134166e9278SOhad Ben-Cohen	  option permits the IOMMU driver to set a unity map for
135166e9278SOhad Ben-Cohen	  all the OS-visible memory. Hence the driver can continue
136166e9278SOhad Ben-Cohen	  to use physical addresses for DMA, at least until this
137166e9278SOhad Ben-Cohen	  option is removed in the 2.6.32 kernel.
138166e9278SOhad Ben-Cohen
139d3f13810SSuresh Siddhaconfig INTEL_IOMMU_FLOPPY_WA
140166e9278SOhad Ben-Cohen	def_bool y
141d3f13810SSuresh Siddha	depends on INTEL_IOMMU && X86
142166e9278SOhad Ben-Cohen	---help---
143166e9278SOhad Ben-Cohen	  Floppy disk drivers are known to bypass DMA API calls
144166e9278SOhad Ben-Cohen	  thereby failing to work when IOMMU is enabled. This
145166e9278SOhad Ben-Cohen	  workaround will setup a 1:1 mapping for the first
146166e9278SOhad Ben-Cohen	  16MiB to make floppy (an ISA device) work.
147166e9278SOhad Ben-Cohen
148d3f13810SSuresh Siddhaconfig IRQ_REMAP
149a446e219SKees Cook	bool "Support for Interrupt Remapping"
150a446e219SKees Cook	depends on X86_64 && X86_IO_APIC && PCI_MSI && ACPI
151d3f13810SSuresh Siddha	select DMAR_TABLE
152166e9278SOhad Ben-Cohen	---help---
153166e9278SOhad Ben-Cohen	  Supports Interrupt remapping for IO-APIC and MSI devices.
154166e9278SOhad Ben-Cohen	  To use x2apic mode in the CPU's which support x2APIC enhancements or
155166e9278SOhad Ben-Cohen	  to support platforms with CPU's having > 8 bit APIC ID, say Y.
15668255b62SJoerg Roedel
157fcf3a6efSOhad Ben-Cohen# OMAP IOMMU support
158fcf3a6efSOhad Ben-Cohenconfig OMAP_IOMMU
159fcf3a6efSOhad Ben-Cohen	bool "OMAP IOMMU Support"
160ae191589SArnd Bergmann	depends on ARCH_OMAP2PLUS
161fcf3a6efSOhad Ben-Cohen	select IOMMU_API
162fcf3a6efSOhad Ben-Cohen
163fcf3a6efSOhad Ben-Cohenconfig OMAP_IOMMU_DEBUG
16461c75352SSuman Anna	bool "Export OMAP IOMMU internals in DebugFS"
165baaa7b5dSLaurent Pinchart	depends on OMAP_IOMMU && DEBUG_FS
16661c75352SSuman Anna	---help---
167fcf3a6efSOhad Ben-Cohen	  Select this to see extensive information about
168baaa7b5dSLaurent Pinchart	  the internal state of OMAP IOMMU in debugfs.
169fcf3a6efSOhad Ben-Cohen
170fcf3a6efSOhad Ben-Cohen	  Say N unless you know you need this.
171fcf3a6efSOhad Ben-Cohen
172c68a2921SDaniel Kurtzconfig ROCKCHIP_IOMMU
173c68a2921SDaniel Kurtz	bool "Rockchip IOMMU Support"
17411175886SJoerg Roedel	depends on ARM
17511175886SJoerg Roedel	depends on ARCH_ROCKCHIP || COMPILE_TEST
176c68a2921SDaniel Kurtz	select IOMMU_API
177c68a2921SDaniel Kurtz	select ARM_DMA_USE_IOMMU
178c68a2921SDaniel Kurtz	help
179c68a2921SDaniel Kurtz	  Support for IOMMUs found on Rockchip rk32xx SOCs.
180c68a2921SDaniel Kurtz	  These IOMMUs allow virtualization of the address space used by most
181c68a2921SDaniel Kurtz	  cores within the multimedia subsystem.
182c68a2921SDaniel Kurtz	  Say Y here if you are using a Rockchip SoC that includes an IOMMU
183c68a2921SDaniel Kurtz	  device.
184c68a2921SDaniel Kurtz
185d53e54b4SHiroshi DOYUconfig TEGRA_IOMMU_GART
186d53e54b4SHiroshi DOYU	bool "Tegra GART IOMMU Support"
187d53e54b4SHiroshi DOYU	depends on ARCH_TEGRA_2x_SOC
188d53e54b4SHiroshi DOYU	select IOMMU_API
189d53e54b4SHiroshi DOYU	help
190d53e54b4SHiroshi DOYU	  Enables support for remapping discontiguous physical memory
191d53e54b4SHiroshi DOYU	  shared with the operating system into contiguous I/O virtual
192d53e54b4SHiroshi DOYU	  space through the GART (Graphics Address Relocation Table)
193d53e54b4SHiroshi DOYU	  hardware included on Tegra SoCs.
194d53e54b4SHiroshi DOYU
1957a31f6f4SHiroshi DOYUconfig TEGRA_IOMMU_SMMU
19689184651SThierry Reding	bool "NVIDIA Tegra SMMU Support"
19789184651SThierry Reding	depends on ARCH_TEGRA
19889184651SThierry Reding	depends on TEGRA_AHB
19989184651SThierry Reding	depends on TEGRA_MC
2007a31f6f4SHiroshi DOYU	select IOMMU_API
2017a31f6f4SHiroshi DOYU	help
20289184651SThierry Reding	  This driver supports the IOMMU hardware (SMMU) found on NVIDIA Tegra
20389184651SThierry Reding	  SoCs (Tegra30 up to Tegra124).
2047a31f6f4SHiroshi DOYU
2052a96536eSKyongHo Choconfig EXYNOS_IOMMU
2062a96536eSKyongHo Cho	bool "Exynos IOMMU Support"
20720911ce6SMark Brown	depends on ARCH_EXYNOS && ARM
2082a96536eSKyongHo Cho	select IOMMU_API
2094802c1d0STushar Behera	select ARM_DMA_USE_IOMMU
2102a96536eSKyongHo Cho	help
2112a96536eSKyongHo Cho	  Support for the IOMMU (System MMU) of Samsung Exynos application
2125455d700SSachin Kamat	  processor family. This enables H/W multimedia accelerators to see
2135455d700SSachin Kamat	  non-linear physical memory chunks as linear memory in their
2145455d700SSachin Kamat	  address space.
2152a96536eSKyongHo Cho
2162a96536eSKyongHo Cho	  If unsure, say N here.
2172a96536eSKyongHo Cho
2182a96536eSKyongHo Choconfig EXYNOS_IOMMU_DEBUG
2192a96536eSKyongHo Cho	bool "Debugging log for Exynos IOMMU"
2202a96536eSKyongHo Cho	depends on EXYNOS_IOMMU
2212a96536eSKyongHo Cho	help
2222a96536eSKyongHo Cho	  Select this to see the detailed log message that shows what
2235455d700SSachin Kamat	  happens in the IOMMU driver.
2242a96536eSKyongHo Cho
2255455d700SSachin Kamat	  Say N unless you need kernel log message for IOMMU debugging.
2262a96536eSKyongHo Cho
227c2c460f7SHideki EIRAKUconfig SHMOBILE_IPMMU
228c2c460f7SHideki EIRAKU	bool
229c2c460f7SHideki EIRAKU
230c2c460f7SHideki EIRAKUconfig SHMOBILE_IPMMU_TLB
231c2c460f7SHideki EIRAKU	bool
232c2c460f7SHideki EIRAKU
233c2c460f7SHideki EIRAKUconfig SHMOBILE_IOMMU
234c2c460f7SHideki EIRAKU	bool "IOMMU for Renesas IPMMU/IPMMUI"
235c2c460f7SHideki EIRAKU	default n
236f63c4824SLinus Torvalds	depends on ARM
237b8354439SPaul Bolle	depends on ARCH_SHMOBILE || COMPILE_TEST
238c2c460f7SHideki EIRAKU	select IOMMU_API
239c2c460f7SHideki EIRAKU	select ARM_DMA_USE_IOMMU
240c2c460f7SHideki EIRAKU	select SHMOBILE_IPMMU
241c2c460f7SHideki EIRAKU	select SHMOBILE_IPMMU_TLB
242c2c460f7SHideki EIRAKU	help
243c2c460f7SHideki EIRAKU	  Support for Renesas IPMMU/IPMMUI. This option enables
244c2c460f7SHideki EIRAKU	  remapping of DMA memory accesses from all of the IP blocks
245c2c460f7SHideki EIRAKU	  on the ICB.
246c2c460f7SHideki EIRAKU
247c2c460f7SHideki EIRAKU	  Warning: Drivers (including userspace drivers of UIO
248c2c460f7SHideki EIRAKU	  devices) of the IP blocks on the ICB *must* use addresses
249c2c460f7SHideki EIRAKU	  allocated from the IPMMU (iova) for DMA with this option
250c2c460f7SHideki EIRAKU	  enabled.
251c2c460f7SHideki EIRAKU
252c2c460f7SHideki EIRAKU	  If unsure, say N.
253c2c460f7SHideki EIRAKU
254c2c460f7SHideki EIRAKUchoice
255c2c460f7SHideki EIRAKU	prompt "IPMMU/IPMMUI address space size"
256c2c460f7SHideki EIRAKU	default SHMOBILE_IOMMU_ADDRSIZE_2048MB
257c2c460f7SHideki EIRAKU	depends on SHMOBILE_IOMMU
258c2c460f7SHideki EIRAKU	help
259c2c460f7SHideki EIRAKU	  This option sets IPMMU/IPMMUI address space size by
260c2c460f7SHideki EIRAKU	  adjusting the 1st level page table size. The page table size
261c2c460f7SHideki EIRAKU	  is calculated as follows:
262c2c460f7SHideki EIRAKU
263c2c460f7SHideki EIRAKU	      page table size = number of page table entries * 4 bytes
264c2c460f7SHideki EIRAKU	      number of page table entries = address space size / 1 MiB
265c2c460f7SHideki EIRAKU
266c2c460f7SHideki EIRAKU	  For example, when the address space size is 2048 MiB, the
267c2c460f7SHideki EIRAKU	  1st level page table size is 8192 bytes.
268c2c460f7SHideki EIRAKU
269c2c460f7SHideki EIRAKU	config SHMOBILE_IOMMU_ADDRSIZE_2048MB
270c2c460f7SHideki EIRAKU		bool "2 GiB"
271c2c460f7SHideki EIRAKU
272c2c460f7SHideki EIRAKU	config SHMOBILE_IOMMU_ADDRSIZE_1024MB
273c2c460f7SHideki EIRAKU		bool "1 GiB"
274c2c460f7SHideki EIRAKU
275c2c460f7SHideki EIRAKU	config SHMOBILE_IOMMU_ADDRSIZE_512MB
276c2c460f7SHideki EIRAKU		bool "512 MiB"
277c2c460f7SHideki EIRAKU
278c2c460f7SHideki EIRAKU	config SHMOBILE_IOMMU_ADDRSIZE_256MB
279c2c460f7SHideki EIRAKU		bool "256 MiB"
280c2c460f7SHideki EIRAKU
281c2c460f7SHideki EIRAKU	config SHMOBILE_IOMMU_ADDRSIZE_128MB
282c2c460f7SHideki EIRAKU		bool "128 MiB"
283c2c460f7SHideki EIRAKU
284c2c460f7SHideki EIRAKU	config SHMOBILE_IOMMU_ADDRSIZE_64MB
285c2c460f7SHideki EIRAKU		bool "64 MiB"
286c2c460f7SHideki EIRAKU
287c2c460f7SHideki EIRAKU	config SHMOBILE_IOMMU_ADDRSIZE_32MB
288c2c460f7SHideki EIRAKU		bool "32 MiB"
289c2c460f7SHideki EIRAKU
290c2c460f7SHideki EIRAKUendchoice
291c2c460f7SHideki EIRAKU
292c2c460f7SHideki EIRAKUconfig SHMOBILE_IOMMU_L1SIZE
293c2c460f7SHideki EIRAKU	int
294c2c460f7SHideki EIRAKU	default 8192 if SHMOBILE_IOMMU_ADDRSIZE_2048MB
295c2c460f7SHideki EIRAKU	default 4096 if SHMOBILE_IOMMU_ADDRSIZE_1024MB
296c2c460f7SHideki EIRAKU	default 2048 if SHMOBILE_IOMMU_ADDRSIZE_512MB
297c2c460f7SHideki EIRAKU	default 1024 if SHMOBILE_IOMMU_ADDRSIZE_256MB
298c2c460f7SHideki EIRAKU	default 512 if SHMOBILE_IOMMU_ADDRSIZE_128MB
299c2c460f7SHideki EIRAKU	default 256 if SHMOBILE_IOMMU_ADDRSIZE_64MB
300c2c460f7SHideki EIRAKU	default 128 if SHMOBILE_IOMMU_ADDRSIZE_32MB
301c2c460f7SHideki EIRAKU
302d25a2a16SLaurent Pinchartconfig IPMMU_VMSA
303d25a2a16SLaurent Pinchart	bool "Renesas VMSA-compatible IPMMU"
304d25a2a16SLaurent Pinchart	depends on ARM_LPAE
305d25a2a16SLaurent Pinchart	depends on ARCH_SHMOBILE || COMPILE_TEST
306d25a2a16SLaurent Pinchart	select IOMMU_API
307d25a2a16SLaurent Pinchart	select ARM_DMA_USE_IOMMU
308d25a2a16SLaurent Pinchart	help
309d25a2a16SLaurent Pinchart	  Support for the Renesas VMSA-compatible IPMMU Renesas found in the
310d25a2a16SLaurent Pinchart	  R-Mobile APE6 and R-Car H2/M2 SoCs.
311d25a2a16SLaurent Pinchart
312d25a2a16SLaurent Pinchart	  If unsure, say N.
313d25a2a16SLaurent Pinchart
3144e13c1acSAlexey Kardashevskiyconfig SPAPR_TCE_IOMMU
3154e13c1acSAlexey Kardashevskiy	bool "sPAPR TCE IOMMU Support"
3165b25199eSAlexey Kardashevskiy	depends on PPC_POWERNV || PPC_PSERIES
3174e13c1acSAlexey Kardashevskiy	select IOMMU_API
3184e13c1acSAlexey Kardashevskiy	help
3194e13c1acSAlexey Kardashevskiy	  Enables bits of IOMMU API required by VFIO. The iommu_ops
3204e13c1acSAlexey Kardashevskiy	  is not implemented as it is not necessary for VFIO.
3214e13c1acSAlexey Kardashevskiy
32245ae7cffSWill Deaconconfig ARM_SMMU
32345ae7cffSWill Deacon	bool "ARM Ltd. System MMU (SMMU) Support"
32445ae7cffSWill Deacon	depends on ARM64 || (ARM_LPAE && OF)
32545ae7cffSWill Deacon	select IOMMU_API
32645ae7cffSWill Deacon	select ARM_DMA_USE_IOMMU if ARM
32745ae7cffSWill Deacon	help
32845ae7cffSWill Deacon	  Support for implementations of the ARM System MMU architecture
32945ae7cffSWill Deacon	  versions 1 and 2. The driver supports both v7l and v8l table
33045ae7cffSWill Deacon	  formats with 4k and 64k page sizes.
33145ae7cffSWill Deacon
33245ae7cffSWill Deacon	  Say Y here if your SoC includes an IOMMU device implementing
33345ae7cffSWill Deacon	  the ARM SMMU architecture.
33445ae7cffSWill Deacon
33568255b62SJoerg Roedelendif # IOMMU_SUPPORT
336