1ab493a0fSOhad Ben-Cohen# IOMMU_API always gets selected by whoever wants it. 2ab493a0fSOhad Ben-Cohenconfig IOMMU_API 3ab493a0fSOhad Ben-Cohen bool 4b10f127eSOhad Ben-Cohen 568255b62SJoerg Roedelmenuconfig IOMMU_SUPPORT 668255b62SJoerg Roedel bool "IOMMU Hardware Support" 768255b62SJoerg Roedel default y 868255b62SJoerg Roedel ---help--- 968255b62SJoerg Roedel Say Y here if you want to compile device drivers for IO Memory 1068255b62SJoerg Roedel Management Units into the kernel. These devices usually allow to 1168255b62SJoerg Roedel remap DMA requests and/or remap interrupts from other devices on the 1268255b62SJoerg Roedel system. 1368255b62SJoerg Roedel 1468255b62SJoerg Roedelif IOMMU_SUPPORT 1568255b62SJoerg Roedel 164e0ee78fSHiroshi Doyuconfig OF_IOMMU 174e0ee78fSHiroshi Doyu def_bool y 184e0ee78fSHiroshi Doyu depends on OF 194e0ee78fSHiroshi Doyu 20b10f127eSOhad Ben-Cohen# MSM IOMMU support 21b10f127eSOhad Ben-Cohenconfig MSM_IOMMU 22b10f127eSOhad Ben-Cohen bool "MSM IOMMU Support" 23b10f127eSOhad Ben-Cohen depends on ARCH_MSM8X60 || ARCH_MSM8960 24b10f127eSOhad Ben-Cohen select IOMMU_API 25b10f127eSOhad Ben-Cohen help 26b10f127eSOhad Ben-Cohen Support for the IOMMUs found on certain Qualcomm SOCs. 27b10f127eSOhad Ben-Cohen These IOMMUs allow virtualization of the address space used by most 28b10f127eSOhad Ben-Cohen cores within the multimedia subsystem. 29b10f127eSOhad Ben-Cohen 30b10f127eSOhad Ben-Cohen If unsure, say N here. 31b10f127eSOhad Ben-Cohen 32b10f127eSOhad Ben-Cohenconfig IOMMU_PGTABLES_L2 33b10f127eSOhad Ben-Cohen def_bool y 34b10f127eSOhad Ben-Cohen depends on MSM_IOMMU && MMU && SMP && CPU_DCACHE_DISABLE=n 3529b68415SOhad Ben-Cohen 3629b68415SOhad Ben-Cohen# AMD IOMMU support 3729b68415SOhad Ben-Cohenconfig AMD_IOMMU 3829b68415SOhad Ben-Cohen bool "AMD IOMMU support" 3929b68415SOhad Ben-Cohen select SWIOTLB 4029b68415SOhad Ben-Cohen select PCI_MSI 4152815b75SJoerg Roedel select PCI_ATS 4252815b75SJoerg Roedel select PCI_PRI 4352815b75SJoerg Roedel select PCI_PASID 4429b68415SOhad Ben-Cohen select IOMMU_API 45eb1eb7aeSJoerg Roedel depends on X86_64 && PCI && ACPI && X86_IO_APIC 4629b68415SOhad Ben-Cohen ---help--- 4729b68415SOhad Ben-Cohen With this option you can enable support for AMD IOMMU hardware in 4829b68415SOhad Ben-Cohen your system. An IOMMU is a hardware component which provides 4929b68415SOhad Ben-Cohen remapping of DMA memory accesses from devices. With an AMD IOMMU you 5059bf8964SMasanari Iida can isolate the DMA memory of different devices and protect the 5129b68415SOhad Ben-Cohen system from misbehaving device drivers or hardware. 5229b68415SOhad Ben-Cohen 5329b68415SOhad Ben-Cohen You can find out if your system has an AMD IOMMU if you look into 5429b68415SOhad Ben-Cohen your BIOS for an option to enable it or if you have an IVRS ACPI 5529b68415SOhad Ben-Cohen table. 5629b68415SOhad Ben-Cohen 5729b68415SOhad Ben-Cohenconfig AMD_IOMMU_STATS 5829b68415SOhad Ben-Cohen bool "Export AMD IOMMU statistics to debugfs" 5929b68415SOhad Ben-Cohen depends on AMD_IOMMU 6029b68415SOhad Ben-Cohen select DEBUG_FS 6129b68415SOhad Ben-Cohen ---help--- 6229b68415SOhad Ben-Cohen This option enables code in the AMD IOMMU driver to collect various 6329b68415SOhad Ben-Cohen statistics about whats happening in the driver and exports that 6429b68415SOhad Ben-Cohen information to userspace via debugfs. 6529b68415SOhad Ben-Cohen If unsure, say N. 66166e9278SOhad Ben-Cohen 67e3c495c7SJoerg Roedelconfig AMD_IOMMU_V2 68e3c495c7SJoerg Roedel tristate "AMD IOMMU Version 2 driver (EXPERIMENTAL)" 698736b2c3SJoerg Roedel depends on AMD_IOMMU && PROFILING && EXPERIMENTAL 708736b2c3SJoerg Roedel select MMU_NOTIFIER 71e3c495c7SJoerg Roedel ---help--- 72e3c495c7SJoerg Roedel This option enables support for the AMD IOMMUv2 features of the IOMMU 73e3c495c7SJoerg Roedel hardware. Select this option if you want to use devices that support 7459bf8964SMasanari Iida the PCI PRI and PASID interface. 75e3c495c7SJoerg Roedel 76166e9278SOhad Ben-Cohen# Intel IOMMU support 77d3f13810SSuresh Siddhaconfig DMAR_TABLE 78d3f13810SSuresh Siddha bool 79d3f13810SSuresh Siddha 80d3f13810SSuresh Siddhaconfig INTEL_IOMMU 81d3f13810SSuresh Siddha bool "Support for Intel IOMMU using DMA Remapping Devices" 82166e9278SOhad Ben-Cohen depends on PCI_MSI && ACPI && (X86 || IA64_GENERIC) 83166e9278SOhad Ben-Cohen select IOMMU_API 84d3f13810SSuresh Siddha select DMAR_TABLE 85166e9278SOhad Ben-Cohen help 86166e9278SOhad Ben-Cohen DMA remapping (DMAR) devices support enables independent address 87166e9278SOhad Ben-Cohen translations for Direct Memory Access (DMA) from devices. 88166e9278SOhad Ben-Cohen These DMA remapping devices are reported via ACPI tables 89166e9278SOhad Ben-Cohen and include PCI device scope covered by these DMA 90166e9278SOhad Ben-Cohen remapping devices. 91166e9278SOhad Ben-Cohen 92d3f13810SSuresh Siddhaconfig INTEL_IOMMU_DEFAULT_ON 93166e9278SOhad Ben-Cohen def_bool y 94d3f13810SSuresh Siddha prompt "Enable Intel DMA Remapping Devices by default" 95d3f13810SSuresh Siddha depends on INTEL_IOMMU 96166e9278SOhad Ben-Cohen help 97166e9278SOhad Ben-Cohen Selecting this option will enable a DMAR device at boot time if 98166e9278SOhad Ben-Cohen one is found. If this option is not selected, DMAR support can 99166e9278SOhad Ben-Cohen be enabled by passing intel_iommu=on to the kernel. 100166e9278SOhad Ben-Cohen 101d3f13810SSuresh Siddhaconfig INTEL_IOMMU_BROKEN_GFX_WA 102166e9278SOhad Ben-Cohen bool "Workaround broken graphics drivers (going away soon)" 103d3f13810SSuresh Siddha depends on INTEL_IOMMU && BROKEN && X86 104166e9278SOhad Ben-Cohen ---help--- 105166e9278SOhad Ben-Cohen Current Graphics drivers tend to use physical address 106166e9278SOhad Ben-Cohen for DMA and avoid using DMA APIs. Setting this config 107166e9278SOhad Ben-Cohen option permits the IOMMU driver to set a unity map for 108166e9278SOhad Ben-Cohen all the OS-visible memory. Hence the driver can continue 109166e9278SOhad Ben-Cohen to use physical addresses for DMA, at least until this 110166e9278SOhad Ben-Cohen option is removed in the 2.6.32 kernel. 111166e9278SOhad Ben-Cohen 112d3f13810SSuresh Siddhaconfig INTEL_IOMMU_FLOPPY_WA 113166e9278SOhad Ben-Cohen def_bool y 114d3f13810SSuresh Siddha depends on INTEL_IOMMU && X86 115166e9278SOhad Ben-Cohen ---help--- 116166e9278SOhad Ben-Cohen Floppy disk drivers are known to bypass DMA API calls 117166e9278SOhad Ben-Cohen thereby failing to work when IOMMU is enabled. This 118166e9278SOhad Ben-Cohen workaround will setup a 1:1 mapping for the first 119166e9278SOhad Ben-Cohen 16MiB to make floppy (an ISA device) work. 120166e9278SOhad Ben-Cohen 121d3f13810SSuresh Siddhaconfig IRQ_REMAP 122166e9278SOhad Ben-Cohen bool "Support for Interrupt Remapping (EXPERIMENTAL)" 123166e9278SOhad Ben-Cohen depends on X86_64 && X86_IO_APIC && PCI_MSI && ACPI && EXPERIMENTAL 124d3f13810SSuresh Siddha select DMAR_TABLE 125166e9278SOhad Ben-Cohen ---help--- 126166e9278SOhad Ben-Cohen Supports Interrupt remapping for IO-APIC and MSI devices. 127166e9278SOhad Ben-Cohen To use x2apic mode in the CPU's which support x2APIC enhancements or 128166e9278SOhad Ben-Cohen to support platforms with CPU's having > 8 bit APIC ID, say Y. 12968255b62SJoerg Roedel 130fcf3a6efSOhad Ben-Cohen# OMAP IOMMU support 131fcf3a6efSOhad Ben-Cohenconfig OMAP_IOMMU 132fcf3a6efSOhad Ben-Cohen bool "OMAP IOMMU Support" 133024ae884SOhad Ben-Cohen depends on ARCH_OMAP 134fcf3a6efSOhad Ben-Cohen select IOMMU_API 135fcf3a6efSOhad Ben-Cohen 136fcf3a6efSOhad Ben-Cohenconfig OMAP_IOVMM 1377b6d45f1SJoerg Roedel tristate "OMAP IO Virtual Memory Manager Support" 1387b6d45f1SJoerg Roedel depends on OMAP_IOMMU 139fcf3a6efSOhad Ben-Cohen 140fcf3a6efSOhad Ben-Cohenconfig OMAP_IOMMU_DEBUG 141fcf3a6efSOhad Ben-Cohen tristate "Export OMAP IOMMU/IOVMM internals in DebugFS" 142fcf3a6efSOhad Ben-Cohen depends on OMAP_IOVMM && DEBUG_FS 143fcf3a6efSOhad Ben-Cohen help 144fcf3a6efSOhad Ben-Cohen Select this to see extensive information about 145fcf3a6efSOhad Ben-Cohen the internal state of OMAP IOMMU/IOVMM in debugfs. 146fcf3a6efSOhad Ben-Cohen 147fcf3a6efSOhad Ben-Cohen Say N unless you know you need this. 148fcf3a6efSOhad Ben-Cohen 149d53e54b4SHiroshi DOYUconfig TEGRA_IOMMU_GART 150d53e54b4SHiroshi DOYU bool "Tegra GART IOMMU Support" 151d53e54b4SHiroshi DOYU depends on ARCH_TEGRA_2x_SOC 152d53e54b4SHiroshi DOYU select IOMMU_API 153d53e54b4SHiroshi DOYU help 154d53e54b4SHiroshi DOYU Enables support for remapping discontiguous physical memory 155d53e54b4SHiroshi DOYU shared with the operating system into contiguous I/O virtual 156d53e54b4SHiroshi DOYU space through the GART (Graphics Address Relocation Table) 157d53e54b4SHiroshi DOYU hardware included on Tegra SoCs. 158d53e54b4SHiroshi DOYU 1597a31f6f4SHiroshi DOYUconfig TEGRA_IOMMU_SMMU 1607a31f6f4SHiroshi DOYU bool "Tegra SMMU IOMMU Support" 1610760e8faSHiroshi Doyu depends on ARCH_TEGRA_3x_SOC && TEGRA_AHB 1627a31f6f4SHiroshi DOYU select IOMMU_API 1637a31f6f4SHiroshi DOYU help 1647a31f6f4SHiroshi DOYU Enables support for remapping discontiguous physical memory 1657a31f6f4SHiroshi DOYU shared with the operating system into contiguous I/O virtual 1667a31f6f4SHiroshi DOYU space through the SMMU (System Memory Management Unit) 1677a31f6f4SHiroshi DOYU hardware included on Tegra SoCs. 1687a31f6f4SHiroshi DOYU 1692a96536eSKyongHo Choconfig EXYNOS_IOMMU 1702a96536eSKyongHo Cho bool "Exynos IOMMU Support" 1712a96536eSKyongHo Cho depends on ARCH_EXYNOS && EXYNOS_DEV_SYSMMU 1722a96536eSKyongHo Cho select IOMMU_API 1732a96536eSKyongHo Cho help 1742a96536eSKyongHo Cho Support for the IOMMU(System MMU) of Samsung Exynos application 1752a96536eSKyongHo Cho processor family. This enables H/W multimedia accellerators to see 1762a96536eSKyongHo Cho non-linear physical memory chunks as a linear memory in their 1772a96536eSKyongHo Cho address spaces 1782a96536eSKyongHo Cho 1792a96536eSKyongHo Cho If unsure, say N here. 1802a96536eSKyongHo Cho 1812a96536eSKyongHo Choconfig EXYNOS_IOMMU_DEBUG 1822a96536eSKyongHo Cho bool "Debugging log for Exynos IOMMU" 1832a96536eSKyongHo Cho depends on EXYNOS_IOMMU 1842a96536eSKyongHo Cho help 1852a96536eSKyongHo Cho Select this to see the detailed log message that shows what 1862a96536eSKyongHo Cho happens in the IOMMU driver 1872a96536eSKyongHo Cho 1882a96536eSKyongHo Cho Say N unless you need kernel log message for IOMMU debugging 1892a96536eSKyongHo Cho 190c2c460f7SHideki EIRAKUconfig SHMOBILE_IPMMU 191c2c460f7SHideki EIRAKU bool 192c2c460f7SHideki EIRAKU 193c2c460f7SHideki EIRAKUconfig SHMOBILE_IPMMU_TLB 194c2c460f7SHideki EIRAKU bool 195c2c460f7SHideki EIRAKU 196c2c460f7SHideki EIRAKUconfig SHMOBILE_IOMMU 197c2c460f7SHideki EIRAKU bool "IOMMU for Renesas IPMMU/IPMMUI" 198c2c460f7SHideki EIRAKU default n 199c2c460f7SHideki EIRAKU depends on (ARM && ARCH_SHMOBILE) 200c2c460f7SHideki EIRAKU select IOMMU_API 201c2c460f7SHideki EIRAKU select ARM_DMA_USE_IOMMU 202c2c460f7SHideki EIRAKU select SHMOBILE_IPMMU 203c2c460f7SHideki EIRAKU select SHMOBILE_IPMMU_TLB 204c2c460f7SHideki EIRAKU help 205c2c460f7SHideki EIRAKU Support for Renesas IPMMU/IPMMUI. This option enables 206c2c460f7SHideki EIRAKU remapping of DMA memory accesses from all of the IP blocks 207c2c460f7SHideki EIRAKU on the ICB. 208c2c460f7SHideki EIRAKU 209c2c460f7SHideki EIRAKU Warning: Drivers (including userspace drivers of UIO 210c2c460f7SHideki EIRAKU devices) of the IP blocks on the ICB *must* use addresses 211c2c460f7SHideki EIRAKU allocated from the IPMMU (iova) for DMA with this option 212c2c460f7SHideki EIRAKU enabled. 213c2c460f7SHideki EIRAKU 214c2c460f7SHideki EIRAKU If unsure, say N. 215c2c460f7SHideki EIRAKU 216c2c460f7SHideki EIRAKUchoice 217c2c460f7SHideki EIRAKU prompt "IPMMU/IPMMUI address space size" 218c2c460f7SHideki EIRAKU default SHMOBILE_IOMMU_ADDRSIZE_2048MB 219c2c460f7SHideki EIRAKU depends on SHMOBILE_IOMMU 220c2c460f7SHideki EIRAKU help 221c2c460f7SHideki EIRAKU This option sets IPMMU/IPMMUI address space size by 222c2c460f7SHideki EIRAKU adjusting the 1st level page table size. The page table size 223c2c460f7SHideki EIRAKU is calculated as follows: 224c2c460f7SHideki EIRAKU 225c2c460f7SHideki EIRAKU page table size = number of page table entries * 4 bytes 226c2c460f7SHideki EIRAKU number of page table entries = address space size / 1 MiB 227c2c460f7SHideki EIRAKU 228c2c460f7SHideki EIRAKU For example, when the address space size is 2048 MiB, the 229c2c460f7SHideki EIRAKU 1st level page table size is 8192 bytes. 230c2c460f7SHideki EIRAKU 231c2c460f7SHideki EIRAKU config SHMOBILE_IOMMU_ADDRSIZE_2048MB 232c2c460f7SHideki EIRAKU bool "2 GiB" 233c2c460f7SHideki EIRAKU 234c2c460f7SHideki EIRAKU config SHMOBILE_IOMMU_ADDRSIZE_1024MB 235c2c460f7SHideki EIRAKU bool "1 GiB" 236c2c460f7SHideki EIRAKU 237c2c460f7SHideki EIRAKU config SHMOBILE_IOMMU_ADDRSIZE_512MB 238c2c460f7SHideki EIRAKU bool "512 MiB" 239c2c460f7SHideki EIRAKU 240c2c460f7SHideki EIRAKU config SHMOBILE_IOMMU_ADDRSIZE_256MB 241c2c460f7SHideki EIRAKU bool "256 MiB" 242c2c460f7SHideki EIRAKU 243c2c460f7SHideki EIRAKU config SHMOBILE_IOMMU_ADDRSIZE_128MB 244c2c460f7SHideki EIRAKU bool "128 MiB" 245c2c460f7SHideki EIRAKU 246c2c460f7SHideki EIRAKU config SHMOBILE_IOMMU_ADDRSIZE_64MB 247c2c460f7SHideki EIRAKU bool "64 MiB" 248c2c460f7SHideki EIRAKU 249c2c460f7SHideki EIRAKU config SHMOBILE_IOMMU_ADDRSIZE_32MB 250c2c460f7SHideki EIRAKU bool "32 MiB" 251c2c460f7SHideki EIRAKU 252c2c460f7SHideki EIRAKUendchoice 253c2c460f7SHideki EIRAKU 254c2c460f7SHideki EIRAKUconfig SHMOBILE_IOMMU_L1SIZE 255c2c460f7SHideki EIRAKU int 256c2c460f7SHideki EIRAKU default 8192 if SHMOBILE_IOMMU_ADDRSIZE_2048MB 257c2c460f7SHideki EIRAKU default 4096 if SHMOBILE_IOMMU_ADDRSIZE_1024MB 258c2c460f7SHideki EIRAKU default 2048 if SHMOBILE_IOMMU_ADDRSIZE_512MB 259c2c460f7SHideki EIRAKU default 1024 if SHMOBILE_IOMMU_ADDRSIZE_256MB 260c2c460f7SHideki EIRAKU default 512 if SHMOBILE_IOMMU_ADDRSIZE_128MB 261c2c460f7SHideki EIRAKU default 256 if SHMOBILE_IOMMU_ADDRSIZE_64MB 262c2c460f7SHideki EIRAKU default 128 if SHMOBILE_IOMMU_ADDRSIZE_32MB 263c2c460f7SHideki EIRAKU 26468255b62SJoerg Roedelendif # IOMMU_SUPPORT 265