xref: /openbmc/linux/drivers/iommu/Kconfig (revision 114150d8)
1ab493a0fSOhad Ben-Cohen# IOMMU_API always gets selected by whoever wants it.
2ab493a0fSOhad Ben-Cohenconfig IOMMU_API
3ab493a0fSOhad Ben-Cohen	bool
4b10f127eSOhad Ben-Cohen
568255b62SJoerg Roedelmenuconfig IOMMU_SUPPORT
668255b62SJoerg Roedel	bool "IOMMU Hardware Support"
768255b62SJoerg Roedel	default y
868255b62SJoerg Roedel	---help---
968255b62SJoerg Roedel	  Say Y here if you want to compile device drivers for IO Memory
1068255b62SJoerg Roedel	  Management Units into the kernel. These devices usually allow to
1168255b62SJoerg Roedel	  remap DMA requests and/or remap interrupts from other devices on the
1268255b62SJoerg Roedel	  system.
1368255b62SJoerg Roedel
1468255b62SJoerg Roedelif IOMMU_SUPPORT
1568255b62SJoerg Roedel
16114150d8SRobin Murphyconfig IOMMU_IOVA
17114150d8SRobin Murphy	bool
18114150d8SRobin Murphy
194e0ee78fSHiroshi Doyuconfig OF_IOMMU
204e0ee78fSHiroshi Doyu       def_bool y
217eba1d51SWill Deacon       depends on OF && IOMMU_API
224e0ee78fSHiroshi Doyu
23695093e3SVarun Sethiconfig FSL_PAMU
24695093e3SVarun Sethi	bool "Freescale IOMMU support"
25695093e3SVarun Sethi	depends on PPC_E500MC
26695093e3SVarun Sethi	select IOMMU_API
27695093e3SVarun Sethi	select GENERIC_ALLOCATOR
28695093e3SVarun Sethi	help
29695093e3SVarun Sethi	  Freescale PAMU support. PAMU is the IOMMU present on Freescale QorIQ platforms.
30695093e3SVarun Sethi	  PAMU can authorize memory access, remap the memory address, and remap I/O
31695093e3SVarun Sethi	  transaction types.
32695093e3SVarun Sethi
33b10f127eSOhad Ben-Cohen# MSM IOMMU support
34b10f127eSOhad Ben-Cohenconfig MSM_IOMMU
35b10f127eSOhad Ben-Cohen	bool "MSM IOMMU Support"
36b10f127eSOhad Ben-Cohen	depends on ARCH_MSM8X60 || ARCH_MSM8960
37b10f127eSOhad Ben-Cohen	select IOMMU_API
38b10f127eSOhad Ben-Cohen	help
39b10f127eSOhad Ben-Cohen	  Support for the IOMMUs found on certain Qualcomm SOCs.
40b10f127eSOhad Ben-Cohen	  These IOMMUs allow virtualization of the address space used by most
41b10f127eSOhad Ben-Cohen	  cores within the multimedia subsystem.
42b10f127eSOhad Ben-Cohen
43b10f127eSOhad Ben-Cohen	  If unsure, say N here.
44b10f127eSOhad Ben-Cohen
45b10f127eSOhad Ben-Cohenconfig IOMMU_PGTABLES_L2
46b10f127eSOhad Ben-Cohen	def_bool y
47b10f127eSOhad Ben-Cohen	depends on MSM_IOMMU && MMU && SMP && CPU_DCACHE_DISABLE=n
4829b68415SOhad Ben-Cohen
4929b68415SOhad Ben-Cohen# AMD IOMMU support
5029b68415SOhad Ben-Cohenconfig AMD_IOMMU
5129b68415SOhad Ben-Cohen	bool "AMD IOMMU support"
5229b68415SOhad Ben-Cohen	select SWIOTLB
5329b68415SOhad Ben-Cohen	select PCI_MSI
5452815b75SJoerg Roedel	select PCI_ATS
5552815b75SJoerg Roedel	select PCI_PRI
5652815b75SJoerg Roedel	select PCI_PASID
5729b68415SOhad Ben-Cohen	select IOMMU_API
580dbc6078SThomas Petazzoni	depends on X86_64 && PCI && ACPI
5929b68415SOhad Ben-Cohen	---help---
6029b68415SOhad Ben-Cohen	  With this option you can enable support for AMD IOMMU hardware in
6129b68415SOhad Ben-Cohen	  your system. An IOMMU is a hardware component which provides
6229b68415SOhad Ben-Cohen	  remapping of DMA memory accesses from devices. With an AMD IOMMU you
6359bf8964SMasanari Iida	  can isolate the DMA memory of different devices and protect the
6429b68415SOhad Ben-Cohen	  system from misbehaving device drivers or hardware.
6529b68415SOhad Ben-Cohen
6629b68415SOhad Ben-Cohen	  You can find out if your system has an AMD IOMMU if you look into
6729b68415SOhad Ben-Cohen	  your BIOS for an option to enable it or if you have an IVRS ACPI
6829b68415SOhad Ben-Cohen	  table.
6929b68415SOhad Ben-Cohen
7029b68415SOhad Ben-Cohenconfig AMD_IOMMU_STATS
7129b68415SOhad Ben-Cohen	bool "Export AMD IOMMU statistics to debugfs"
7229b68415SOhad Ben-Cohen	depends on AMD_IOMMU
7329b68415SOhad Ben-Cohen	select DEBUG_FS
7429b68415SOhad Ben-Cohen	---help---
7529b68415SOhad Ben-Cohen	  This option enables code in the AMD IOMMU driver to collect various
7629b68415SOhad Ben-Cohen	  statistics about whats happening in the driver and exports that
7729b68415SOhad Ben-Cohen	  information to userspace via debugfs.
7829b68415SOhad Ben-Cohen	  If unsure, say N.
79166e9278SOhad Ben-Cohen
80e3c495c7SJoerg Roedelconfig AMD_IOMMU_V2
81a446e219SKees Cook	tristate "AMD IOMMU Version 2 driver"
82e5cac32cSBorislav Petkov	depends on AMD_IOMMU
838736b2c3SJoerg Roedel	select MMU_NOTIFIER
84e3c495c7SJoerg Roedel	---help---
85e3c495c7SJoerg Roedel	  This option enables support for the AMD IOMMUv2 features of the IOMMU
86e3c495c7SJoerg Roedel	  hardware. Select this option if you want to use devices that support
8759bf8964SMasanari Iida	  the PCI PRI and PASID interface.
88e3c495c7SJoerg Roedel
89166e9278SOhad Ben-Cohen# Intel IOMMU support
90d3f13810SSuresh Siddhaconfig DMAR_TABLE
91d3f13810SSuresh Siddha	bool
92d3f13810SSuresh Siddha
93d3f13810SSuresh Siddhaconfig INTEL_IOMMU
94d3f13810SSuresh Siddha	bool "Support for Intel IOMMU using DMA Remapping Devices"
95166e9278SOhad Ben-Cohen	depends on PCI_MSI && ACPI && (X86 || IA64_GENERIC)
96166e9278SOhad Ben-Cohen	select IOMMU_API
97114150d8SRobin Murphy	select IOMMU_IOVA
98d3f13810SSuresh Siddha	select DMAR_TABLE
99166e9278SOhad Ben-Cohen	help
100166e9278SOhad Ben-Cohen	  DMA remapping (DMAR) devices support enables independent address
101166e9278SOhad Ben-Cohen	  translations for Direct Memory Access (DMA) from devices.
102166e9278SOhad Ben-Cohen	  These DMA remapping devices are reported via ACPI tables
103166e9278SOhad Ben-Cohen	  and include PCI device scope covered by these DMA
104166e9278SOhad Ben-Cohen	  remapping devices.
105166e9278SOhad Ben-Cohen
106d3f13810SSuresh Siddhaconfig INTEL_IOMMU_DEFAULT_ON
107166e9278SOhad Ben-Cohen	def_bool y
108d3f13810SSuresh Siddha	prompt "Enable Intel DMA Remapping Devices by default"
109d3f13810SSuresh Siddha	depends on INTEL_IOMMU
110166e9278SOhad Ben-Cohen	help
111166e9278SOhad Ben-Cohen	  Selecting this option will enable a DMAR device at boot time if
112166e9278SOhad Ben-Cohen	  one is found. If this option is not selected, DMAR support can
113166e9278SOhad Ben-Cohen	  be enabled by passing intel_iommu=on to the kernel.
114166e9278SOhad Ben-Cohen
115d3f13810SSuresh Siddhaconfig INTEL_IOMMU_BROKEN_GFX_WA
116166e9278SOhad Ben-Cohen	bool "Workaround broken graphics drivers (going away soon)"
117d3f13810SSuresh Siddha	depends on INTEL_IOMMU && BROKEN && X86
118166e9278SOhad Ben-Cohen	---help---
119166e9278SOhad Ben-Cohen	  Current Graphics drivers tend to use physical address
120166e9278SOhad Ben-Cohen	  for DMA and avoid using DMA APIs. Setting this config
121166e9278SOhad Ben-Cohen	  option permits the IOMMU driver to set a unity map for
122166e9278SOhad Ben-Cohen	  all the OS-visible memory. Hence the driver can continue
123166e9278SOhad Ben-Cohen	  to use physical addresses for DMA, at least until this
124166e9278SOhad Ben-Cohen	  option is removed in the 2.6.32 kernel.
125166e9278SOhad Ben-Cohen
126d3f13810SSuresh Siddhaconfig INTEL_IOMMU_FLOPPY_WA
127166e9278SOhad Ben-Cohen	def_bool y
128d3f13810SSuresh Siddha	depends on INTEL_IOMMU && X86
129166e9278SOhad Ben-Cohen	---help---
130166e9278SOhad Ben-Cohen	  Floppy disk drivers are known to bypass DMA API calls
131166e9278SOhad Ben-Cohen	  thereby failing to work when IOMMU is enabled. This
132166e9278SOhad Ben-Cohen	  workaround will setup a 1:1 mapping for the first
133166e9278SOhad Ben-Cohen	  16MiB to make floppy (an ISA device) work.
134166e9278SOhad Ben-Cohen
135d3f13810SSuresh Siddhaconfig IRQ_REMAP
136a446e219SKees Cook	bool "Support for Interrupt Remapping"
137a446e219SKees Cook	depends on X86_64 && X86_IO_APIC && PCI_MSI && ACPI
138d3f13810SSuresh Siddha	select DMAR_TABLE
139166e9278SOhad Ben-Cohen	---help---
140166e9278SOhad Ben-Cohen	  Supports Interrupt remapping for IO-APIC and MSI devices.
141166e9278SOhad Ben-Cohen	  To use x2apic mode in the CPU's which support x2APIC enhancements or
142166e9278SOhad Ben-Cohen	  to support platforms with CPU's having > 8 bit APIC ID, say Y.
14368255b62SJoerg Roedel
144fcf3a6efSOhad Ben-Cohen# OMAP IOMMU support
145fcf3a6efSOhad Ben-Cohenconfig OMAP_IOMMU
146fcf3a6efSOhad Ben-Cohen	bool "OMAP IOMMU Support"
147ae191589SArnd Bergmann	depends on ARCH_OMAP2PLUS
148fcf3a6efSOhad Ben-Cohen	select IOMMU_API
149fcf3a6efSOhad Ben-Cohen
150fcf3a6efSOhad Ben-Cohenconfig OMAP_IOMMU_DEBUG
15161c75352SSuman Anna	bool "Export OMAP IOMMU internals in DebugFS"
152baaa7b5dSLaurent Pinchart	depends on OMAP_IOMMU && DEBUG_FS
15361c75352SSuman Anna	---help---
154fcf3a6efSOhad Ben-Cohen	  Select this to see extensive information about
155baaa7b5dSLaurent Pinchart	  the internal state of OMAP IOMMU in debugfs.
156fcf3a6efSOhad Ben-Cohen
157fcf3a6efSOhad Ben-Cohen	  Say N unless you know you need this.
158fcf3a6efSOhad Ben-Cohen
159c68a2921SDaniel Kurtzconfig ROCKCHIP_IOMMU
160c68a2921SDaniel Kurtz	bool "Rockchip IOMMU Support"
16111175886SJoerg Roedel	depends on ARM
16211175886SJoerg Roedel	depends on ARCH_ROCKCHIP || COMPILE_TEST
163c68a2921SDaniel Kurtz	select IOMMU_API
164c68a2921SDaniel Kurtz	select ARM_DMA_USE_IOMMU
165c68a2921SDaniel Kurtz	help
166c68a2921SDaniel Kurtz	  Support for IOMMUs found on Rockchip rk32xx SOCs.
167c68a2921SDaniel Kurtz	  These IOMMUs allow virtualization of the address space used by most
168c68a2921SDaniel Kurtz	  cores within the multimedia subsystem.
169c68a2921SDaniel Kurtz	  Say Y here if you are using a Rockchip SoC that includes an IOMMU
170c68a2921SDaniel Kurtz	  device.
171c68a2921SDaniel Kurtz
172d53e54b4SHiroshi DOYUconfig TEGRA_IOMMU_GART
173d53e54b4SHiroshi DOYU	bool "Tegra GART IOMMU Support"
174d53e54b4SHiroshi DOYU	depends on ARCH_TEGRA_2x_SOC
175d53e54b4SHiroshi DOYU	select IOMMU_API
176d53e54b4SHiroshi DOYU	help
177d53e54b4SHiroshi DOYU	  Enables support for remapping discontiguous physical memory
178d53e54b4SHiroshi DOYU	  shared with the operating system into contiguous I/O virtual
179d53e54b4SHiroshi DOYU	  space through the GART (Graphics Address Relocation Table)
180d53e54b4SHiroshi DOYU	  hardware included on Tegra SoCs.
181d53e54b4SHiroshi DOYU
1827a31f6f4SHiroshi DOYUconfig TEGRA_IOMMU_SMMU
18389184651SThierry Reding	bool "NVIDIA Tegra SMMU Support"
18489184651SThierry Reding	depends on ARCH_TEGRA
18589184651SThierry Reding	depends on TEGRA_AHB
18689184651SThierry Reding	depends on TEGRA_MC
1877a31f6f4SHiroshi DOYU	select IOMMU_API
1887a31f6f4SHiroshi DOYU	help
18989184651SThierry Reding	  This driver supports the IOMMU hardware (SMMU) found on NVIDIA Tegra
19089184651SThierry Reding	  SoCs (Tegra30 up to Tegra124).
1917a31f6f4SHiroshi DOYU
1922a96536eSKyongHo Choconfig EXYNOS_IOMMU
1932a96536eSKyongHo Cho	bool "Exynos IOMMU Support"
19420911ce6SMark Brown	depends on ARCH_EXYNOS && ARM
1952a96536eSKyongHo Cho	select IOMMU_API
1964802c1d0STushar Behera	select ARM_DMA_USE_IOMMU
1972a96536eSKyongHo Cho	help
1982a96536eSKyongHo Cho	  Support for the IOMMU (System MMU) of Samsung Exynos application
1995455d700SSachin Kamat	  processor family. This enables H/W multimedia accelerators to see
2005455d700SSachin Kamat	  non-linear physical memory chunks as linear memory in their
2015455d700SSachin Kamat	  address space.
2022a96536eSKyongHo Cho
2032a96536eSKyongHo Cho	  If unsure, say N here.
2042a96536eSKyongHo Cho
2052a96536eSKyongHo Choconfig EXYNOS_IOMMU_DEBUG
2062a96536eSKyongHo Cho	bool "Debugging log for Exynos IOMMU"
2072a96536eSKyongHo Cho	depends on EXYNOS_IOMMU
2082a96536eSKyongHo Cho	help
2092a96536eSKyongHo Cho	  Select this to see the detailed log message that shows what
2105455d700SSachin Kamat	  happens in the IOMMU driver.
2112a96536eSKyongHo Cho
2125455d700SSachin Kamat	  Say N unless you need kernel log message for IOMMU debugging.
2132a96536eSKyongHo Cho
214c2c460f7SHideki EIRAKUconfig SHMOBILE_IPMMU
215c2c460f7SHideki EIRAKU	bool
216c2c460f7SHideki EIRAKU
217c2c460f7SHideki EIRAKUconfig SHMOBILE_IPMMU_TLB
218c2c460f7SHideki EIRAKU	bool
219c2c460f7SHideki EIRAKU
220c2c460f7SHideki EIRAKUconfig SHMOBILE_IOMMU
221c2c460f7SHideki EIRAKU	bool "IOMMU for Renesas IPMMU/IPMMUI"
222c2c460f7SHideki EIRAKU	default n
223f63c4824SLinus Torvalds	depends on ARM
224b8354439SPaul Bolle	depends on ARCH_SHMOBILE || COMPILE_TEST
225c2c460f7SHideki EIRAKU	select IOMMU_API
226c2c460f7SHideki EIRAKU	select ARM_DMA_USE_IOMMU
227c2c460f7SHideki EIRAKU	select SHMOBILE_IPMMU
228c2c460f7SHideki EIRAKU	select SHMOBILE_IPMMU_TLB
229c2c460f7SHideki EIRAKU	help
230c2c460f7SHideki EIRAKU	  Support for Renesas IPMMU/IPMMUI. This option enables
231c2c460f7SHideki EIRAKU	  remapping of DMA memory accesses from all of the IP blocks
232c2c460f7SHideki EIRAKU	  on the ICB.
233c2c460f7SHideki EIRAKU
234c2c460f7SHideki EIRAKU	  Warning: Drivers (including userspace drivers of UIO
235c2c460f7SHideki EIRAKU	  devices) of the IP blocks on the ICB *must* use addresses
236c2c460f7SHideki EIRAKU	  allocated from the IPMMU (iova) for DMA with this option
237c2c460f7SHideki EIRAKU	  enabled.
238c2c460f7SHideki EIRAKU
239c2c460f7SHideki EIRAKU	  If unsure, say N.
240c2c460f7SHideki EIRAKU
241c2c460f7SHideki EIRAKUchoice
242c2c460f7SHideki EIRAKU	prompt "IPMMU/IPMMUI address space size"
243c2c460f7SHideki EIRAKU	default SHMOBILE_IOMMU_ADDRSIZE_2048MB
244c2c460f7SHideki EIRAKU	depends on SHMOBILE_IOMMU
245c2c460f7SHideki EIRAKU	help
246c2c460f7SHideki EIRAKU	  This option sets IPMMU/IPMMUI address space size by
247c2c460f7SHideki EIRAKU	  adjusting the 1st level page table size. The page table size
248c2c460f7SHideki EIRAKU	  is calculated as follows:
249c2c460f7SHideki EIRAKU
250c2c460f7SHideki EIRAKU	      page table size = number of page table entries * 4 bytes
251c2c460f7SHideki EIRAKU	      number of page table entries = address space size / 1 MiB
252c2c460f7SHideki EIRAKU
253c2c460f7SHideki EIRAKU	  For example, when the address space size is 2048 MiB, the
254c2c460f7SHideki EIRAKU	  1st level page table size is 8192 bytes.
255c2c460f7SHideki EIRAKU
256c2c460f7SHideki EIRAKU	config SHMOBILE_IOMMU_ADDRSIZE_2048MB
257c2c460f7SHideki EIRAKU		bool "2 GiB"
258c2c460f7SHideki EIRAKU
259c2c460f7SHideki EIRAKU	config SHMOBILE_IOMMU_ADDRSIZE_1024MB
260c2c460f7SHideki EIRAKU		bool "1 GiB"
261c2c460f7SHideki EIRAKU
262c2c460f7SHideki EIRAKU	config SHMOBILE_IOMMU_ADDRSIZE_512MB
263c2c460f7SHideki EIRAKU		bool "512 MiB"
264c2c460f7SHideki EIRAKU
265c2c460f7SHideki EIRAKU	config SHMOBILE_IOMMU_ADDRSIZE_256MB
266c2c460f7SHideki EIRAKU		bool "256 MiB"
267c2c460f7SHideki EIRAKU
268c2c460f7SHideki EIRAKU	config SHMOBILE_IOMMU_ADDRSIZE_128MB
269c2c460f7SHideki EIRAKU		bool "128 MiB"
270c2c460f7SHideki EIRAKU
271c2c460f7SHideki EIRAKU	config SHMOBILE_IOMMU_ADDRSIZE_64MB
272c2c460f7SHideki EIRAKU		bool "64 MiB"
273c2c460f7SHideki EIRAKU
274c2c460f7SHideki EIRAKU	config SHMOBILE_IOMMU_ADDRSIZE_32MB
275c2c460f7SHideki EIRAKU		bool "32 MiB"
276c2c460f7SHideki EIRAKU
277c2c460f7SHideki EIRAKUendchoice
278c2c460f7SHideki EIRAKU
279c2c460f7SHideki EIRAKUconfig SHMOBILE_IOMMU_L1SIZE
280c2c460f7SHideki EIRAKU	int
281c2c460f7SHideki EIRAKU	default 8192 if SHMOBILE_IOMMU_ADDRSIZE_2048MB
282c2c460f7SHideki EIRAKU	default 4096 if SHMOBILE_IOMMU_ADDRSIZE_1024MB
283c2c460f7SHideki EIRAKU	default 2048 if SHMOBILE_IOMMU_ADDRSIZE_512MB
284c2c460f7SHideki EIRAKU	default 1024 if SHMOBILE_IOMMU_ADDRSIZE_256MB
285c2c460f7SHideki EIRAKU	default 512 if SHMOBILE_IOMMU_ADDRSIZE_128MB
286c2c460f7SHideki EIRAKU	default 256 if SHMOBILE_IOMMU_ADDRSIZE_64MB
287c2c460f7SHideki EIRAKU	default 128 if SHMOBILE_IOMMU_ADDRSIZE_32MB
288c2c460f7SHideki EIRAKU
289d25a2a16SLaurent Pinchartconfig IPMMU_VMSA
290d25a2a16SLaurent Pinchart	bool "Renesas VMSA-compatible IPMMU"
291d25a2a16SLaurent Pinchart	depends on ARM_LPAE
292d25a2a16SLaurent Pinchart	depends on ARCH_SHMOBILE || COMPILE_TEST
293d25a2a16SLaurent Pinchart	select IOMMU_API
294d25a2a16SLaurent Pinchart	select ARM_DMA_USE_IOMMU
295d25a2a16SLaurent Pinchart	help
296d25a2a16SLaurent Pinchart	  Support for the Renesas VMSA-compatible IPMMU Renesas found in the
297d25a2a16SLaurent Pinchart	  R-Mobile APE6 and R-Car H2/M2 SoCs.
298d25a2a16SLaurent Pinchart
299d25a2a16SLaurent Pinchart	  If unsure, say N.
300d25a2a16SLaurent Pinchart
3014e13c1acSAlexey Kardashevskiyconfig SPAPR_TCE_IOMMU
3024e13c1acSAlexey Kardashevskiy	bool "sPAPR TCE IOMMU Support"
3035b25199eSAlexey Kardashevskiy	depends on PPC_POWERNV || PPC_PSERIES
3044e13c1acSAlexey Kardashevskiy	select IOMMU_API
3054e13c1acSAlexey Kardashevskiy	help
3064e13c1acSAlexey Kardashevskiy	  Enables bits of IOMMU API required by VFIO. The iommu_ops
3074e13c1acSAlexey Kardashevskiy	  is not implemented as it is not necessary for VFIO.
3084e13c1acSAlexey Kardashevskiy
30945ae7cffSWill Deaconconfig ARM_SMMU
31045ae7cffSWill Deacon	bool "ARM Ltd. System MMU (SMMU) Support"
31145ae7cffSWill Deacon	depends on ARM64 || (ARM_LPAE && OF)
31245ae7cffSWill Deacon	select IOMMU_API
31345ae7cffSWill Deacon	select ARM_DMA_USE_IOMMU if ARM
31445ae7cffSWill Deacon	help
31545ae7cffSWill Deacon	  Support for implementations of the ARM System MMU architecture
31645ae7cffSWill Deacon	  versions 1 and 2. The driver supports both v7l and v8l table
31745ae7cffSWill Deacon	  formats with 4k and 64k page sizes.
31845ae7cffSWill Deacon
31945ae7cffSWill Deacon	  Say Y here if your SoC includes an IOMMU device implementing
32045ae7cffSWill Deacon	  the ARM SMMU architecture.
32145ae7cffSWill Deacon
32268255b62SJoerg Roedelendif # IOMMU_SUPPORT
323