1ab493a0fSOhad Ben-Cohen# IOMMU_API always gets selected by whoever wants it. 2ab493a0fSOhad Ben-Cohenconfig IOMMU_API 3ab493a0fSOhad Ben-Cohen bool 4b10f127eSOhad Ben-Cohen 568255b62SJoerg Roedelmenuconfig IOMMU_SUPPORT 668255b62SJoerg Roedel bool "IOMMU Hardware Support" 7e5144c93SArnd Bergmann depends on MMU 868255b62SJoerg Roedel default y 968255b62SJoerg Roedel ---help--- 1068255b62SJoerg Roedel Say Y here if you want to compile device drivers for IO Memory 1168255b62SJoerg Roedel Management Units into the kernel. These devices usually allow to 1268255b62SJoerg Roedel remap DMA requests and/or remap interrupts from other devices on the 1368255b62SJoerg Roedel system. 1468255b62SJoerg Roedel 1568255b62SJoerg Roedelif IOMMU_SUPPORT 1668255b62SJoerg Roedel 17fdb1d7beSWill Deaconmenu "Generic IOMMU Pagetable Support" 18fdb1d7beSWill Deacon 19fdb1d7beSWill Deacon# Selected by the actual pagetable implementations 20fdb1d7beSWill Deaconconfig IOMMU_IO_PGTABLE 21fdb1d7beSWill Deacon bool 22fdb1d7beSWill Deacon 23e1d3c0fdSWill Deaconconfig IOMMU_IO_PGTABLE_LPAE 24e1d3c0fdSWill Deacon bool "ARMv7/v8 Long Descriptor Format" 25e1d3c0fdSWill Deacon select IOMMU_IO_PGTABLE 26f8d54961SRobin Murphy # SWIOTLB guarantees a dma_to_phys() implementation 27f8d54961SRobin Murphy depends on ARM || ARM64 || (COMPILE_TEST && SWIOTLB) 28e1d3c0fdSWill Deacon help 29e1d3c0fdSWill Deacon Enable support for the ARM long descriptor pagetable format. 30e1d3c0fdSWill Deacon This allocator supports 4K/2M/1G, 16K/32M and 64K/512M page 31e1d3c0fdSWill Deacon sizes at both stage-1 and stage-2, as well as address spaces 32e1d3c0fdSWill Deacon up to 48-bits in size. 33e1d3c0fdSWill Deacon 34fe4b991dSWill Deaconconfig IOMMU_IO_PGTABLE_LPAE_SELFTEST 35fe4b991dSWill Deacon bool "LPAE selftests" 36fe4b991dSWill Deacon depends on IOMMU_IO_PGTABLE_LPAE 37fe4b991dSWill Deacon help 38fe4b991dSWill Deacon Enable self-tests for LPAE page table allocator. This performs 39fe4b991dSWill Deacon a series of page-table consistency checks during boot. 40fe4b991dSWill Deacon 41fe4b991dSWill Deacon If unsure, say N here. 42fe4b991dSWill Deacon 43fdb1d7beSWill Deaconendmenu 44fdb1d7beSWill Deacon 45114150d8SRobin Murphyconfig IOMMU_IOVA 4615bbdec3SSakari Ailus tristate 47114150d8SRobin Murphy 484e0ee78fSHiroshi Doyuconfig OF_IOMMU 494e0ee78fSHiroshi Doyu def_bool y 507eba1d51SWill Deacon depends on OF && IOMMU_API 514e0ee78fSHiroshi Doyu 520db2e5d1SRobin Murphy# IOMMU-agnostic DMA-mapping layer 530db2e5d1SRobin Murphyconfig IOMMU_DMA 540db2e5d1SRobin Murphy bool 550db2e5d1SRobin Murphy depends on NEED_SG_DMA_LENGTH 560db2e5d1SRobin Murphy select IOMMU_API 570db2e5d1SRobin Murphy select IOMMU_IOVA 580db2e5d1SRobin Murphy 59695093e3SVarun Sethiconfig FSL_PAMU 60695093e3SVarun Sethi bool "Freescale IOMMU support" 61477ab7a1SJoerg Roedel depends on PPC32 62477ab7a1SJoerg Roedel depends on PPC_E500MC || COMPILE_TEST 63695093e3SVarun Sethi select IOMMU_API 64695093e3SVarun Sethi select GENERIC_ALLOCATOR 65695093e3SVarun Sethi help 66695093e3SVarun Sethi Freescale PAMU support. PAMU is the IOMMU present on Freescale QorIQ platforms. 67695093e3SVarun Sethi PAMU can authorize memory access, remap the memory address, and remap I/O 68695093e3SVarun Sethi transaction types. 69695093e3SVarun Sethi 70b10f127eSOhad Ben-Cohen# MSM IOMMU support 71b10f127eSOhad Ben-Cohenconfig MSM_IOMMU 72b10f127eSOhad Ben-Cohen bool "MSM IOMMU Support" 73477ab7a1SJoerg Roedel depends on ARM 74477ab7a1SJoerg Roedel depends on ARCH_MSM8X60 || ARCH_MSM8960 || COMPILE_TEST 75a3f447a4SThierry Reding depends on BROKEN 76b10f127eSOhad Ben-Cohen select IOMMU_API 77b10f127eSOhad Ben-Cohen help 78b10f127eSOhad Ben-Cohen Support for the IOMMUs found on certain Qualcomm SOCs. 79b10f127eSOhad Ben-Cohen These IOMMUs allow virtualization of the address space used by most 80b10f127eSOhad Ben-Cohen cores within the multimedia subsystem. 81b10f127eSOhad Ben-Cohen 82b10f127eSOhad Ben-Cohen If unsure, say N here. 83b10f127eSOhad Ben-Cohen 84b10f127eSOhad Ben-Cohenconfig IOMMU_PGTABLES_L2 85b10f127eSOhad Ben-Cohen def_bool y 86b10f127eSOhad Ben-Cohen depends on MSM_IOMMU && MMU && SMP && CPU_DCACHE_DISABLE=n 8729b68415SOhad Ben-Cohen 8829b68415SOhad Ben-Cohen# AMD IOMMU support 8929b68415SOhad Ben-Cohenconfig AMD_IOMMU 9029b68415SOhad Ben-Cohen bool "AMD IOMMU support" 9129b68415SOhad Ben-Cohen select SWIOTLB 9229b68415SOhad Ben-Cohen select PCI_MSI 9352815b75SJoerg Roedel select PCI_ATS 9452815b75SJoerg Roedel select PCI_PRI 9552815b75SJoerg Roedel select PCI_PASID 9629b68415SOhad Ben-Cohen select IOMMU_API 970dbc6078SThomas Petazzoni depends on X86_64 && PCI && ACPI 9829b68415SOhad Ben-Cohen ---help--- 9929b68415SOhad Ben-Cohen With this option you can enable support for AMD IOMMU hardware in 10029b68415SOhad Ben-Cohen your system. An IOMMU is a hardware component which provides 10129b68415SOhad Ben-Cohen remapping of DMA memory accesses from devices. With an AMD IOMMU you 10259bf8964SMasanari Iida can isolate the DMA memory of different devices and protect the 10329b68415SOhad Ben-Cohen system from misbehaving device drivers or hardware. 10429b68415SOhad Ben-Cohen 10529b68415SOhad Ben-Cohen You can find out if your system has an AMD IOMMU if you look into 10629b68415SOhad Ben-Cohen your BIOS for an option to enable it or if you have an IVRS ACPI 10729b68415SOhad Ben-Cohen table. 10829b68415SOhad Ben-Cohen 10929b68415SOhad Ben-Cohenconfig AMD_IOMMU_STATS 11029b68415SOhad Ben-Cohen bool "Export AMD IOMMU statistics to debugfs" 11129b68415SOhad Ben-Cohen depends on AMD_IOMMU 11229b68415SOhad Ben-Cohen select DEBUG_FS 11329b68415SOhad Ben-Cohen ---help--- 11429b68415SOhad Ben-Cohen This option enables code in the AMD IOMMU driver to collect various 11529b68415SOhad Ben-Cohen statistics about whats happening in the driver and exports that 11629b68415SOhad Ben-Cohen information to userspace via debugfs. 11729b68415SOhad Ben-Cohen If unsure, say N. 118166e9278SOhad Ben-Cohen 119e3c495c7SJoerg Roedelconfig AMD_IOMMU_V2 120a446e219SKees Cook tristate "AMD IOMMU Version 2 driver" 121e5cac32cSBorislav Petkov depends on AMD_IOMMU 1228736b2c3SJoerg Roedel select MMU_NOTIFIER 123e3c495c7SJoerg Roedel ---help--- 124e3c495c7SJoerg Roedel This option enables support for the AMD IOMMUv2 features of the IOMMU 125e3c495c7SJoerg Roedel hardware. Select this option if you want to use devices that support 12659bf8964SMasanari Iida the PCI PRI and PASID interface. 127e3c495c7SJoerg Roedel 128166e9278SOhad Ben-Cohen# Intel IOMMU support 129d3f13810SSuresh Siddhaconfig DMAR_TABLE 130d3f13810SSuresh Siddha bool 131d3f13810SSuresh Siddha 132d3f13810SSuresh Siddhaconfig INTEL_IOMMU 133d3f13810SSuresh Siddha bool "Support for Intel IOMMU using DMA Remapping Devices" 134166e9278SOhad Ben-Cohen depends on PCI_MSI && ACPI && (X86 || IA64_GENERIC) 135166e9278SOhad Ben-Cohen select IOMMU_API 136114150d8SRobin Murphy select IOMMU_IOVA 137d3f13810SSuresh Siddha select DMAR_TABLE 138166e9278SOhad Ben-Cohen help 139166e9278SOhad Ben-Cohen DMA remapping (DMAR) devices support enables independent address 140166e9278SOhad Ben-Cohen translations for Direct Memory Access (DMA) from devices. 141166e9278SOhad Ben-Cohen These DMA remapping devices are reported via ACPI tables 142166e9278SOhad Ben-Cohen and include PCI device scope covered by these DMA 143166e9278SOhad Ben-Cohen remapping devices. 144166e9278SOhad Ben-Cohen 145d3f13810SSuresh Siddhaconfig INTEL_IOMMU_DEFAULT_ON 146166e9278SOhad Ben-Cohen def_bool y 147d3f13810SSuresh Siddha prompt "Enable Intel DMA Remapping Devices by default" 148d3f13810SSuresh Siddha depends on INTEL_IOMMU 149166e9278SOhad Ben-Cohen help 150166e9278SOhad Ben-Cohen Selecting this option will enable a DMAR device at boot time if 151166e9278SOhad Ben-Cohen one is found. If this option is not selected, DMAR support can 152166e9278SOhad Ben-Cohen be enabled by passing intel_iommu=on to the kernel. 153166e9278SOhad Ben-Cohen 154d3f13810SSuresh Siddhaconfig INTEL_IOMMU_BROKEN_GFX_WA 155166e9278SOhad Ben-Cohen bool "Workaround broken graphics drivers (going away soon)" 156d3f13810SSuresh Siddha depends on INTEL_IOMMU && BROKEN && X86 157166e9278SOhad Ben-Cohen ---help--- 158166e9278SOhad Ben-Cohen Current Graphics drivers tend to use physical address 159166e9278SOhad Ben-Cohen for DMA and avoid using DMA APIs. Setting this config 160166e9278SOhad Ben-Cohen option permits the IOMMU driver to set a unity map for 161166e9278SOhad Ben-Cohen all the OS-visible memory. Hence the driver can continue 162166e9278SOhad Ben-Cohen to use physical addresses for DMA, at least until this 163166e9278SOhad Ben-Cohen option is removed in the 2.6.32 kernel. 164166e9278SOhad Ben-Cohen 165d3f13810SSuresh Siddhaconfig INTEL_IOMMU_FLOPPY_WA 166166e9278SOhad Ben-Cohen def_bool y 167d3f13810SSuresh Siddha depends on INTEL_IOMMU && X86 168166e9278SOhad Ben-Cohen ---help--- 169166e9278SOhad Ben-Cohen Floppy disk drivers are known to bypass DMA API calls 170166e9278SOhad Ben-Cohen thereby failing to work when IOMMU is enabled. This 171166e9278SOhad Ben-Cohen workaround will setup a 1:1 mapping for the first 172166e9278SOhad Ben-Cohen 16MiB to make floppy (an ISA device) work. 173166e9278SOhad Ben-Cohen 174d3f13810SSuresh Siddhaconfig IRQ_REMAP 175a446e219SKees Cook bool "Support for Interrupt Remapping" 176a446e219SKees Cook depends on X86_64 && X86_IO_APIC && PCI_MSI && ACPI 177d3f13810SSuresh Siddha select DMAR_TABLE 178166e9278SOhad Ben-Cohen ---help--- 179166e9278SOhad Ben-Cohen Supports Interrupt remapping for IO-APIC and MSI devices. 180166e9278SOhad Ben-Cohen To use x2apic mode in the CPU's which support x2APIC enhancements or 181166e9278SOhad Ben-Cohen to support platforms with CPU's having > 8 bit APIC ID, say Y. 18268255b62SJoerg Roedel 183fcf3a6efSOhad Ben-Cohen# OMAP IOMMU support 184fcf3a6efSOhad Ben-Cohenconfig OMAP_IOMMU 185fcf3a6efSOhad Ben-Cohen bool "OMAP IOMMU Support" 186477ab7a1SJoerg Roedel depends on ARM && MMU 187477ab7a1SJoerg Roedel depends on ARCH_OMAP2PLUS || COMPILE_TEST 188fcf3a6efSOhad Ben-Cohen select IOMMU_API 18906b718c0SGerd Hoffmann ---help--- 19006b718c0SGerd Hoffmann The OMAP3 media platform drivers depend on iommu support, 19106b718c0SGerd Hoffmann if you need them say Y here. 192fcf3a6efSOhad Ben-Cohen 193fcf3a6efSOhad Ben-Cohenconfig OMAP_IOMMU_DEBUG 19461c75352SSuman Anna bool "Export OMAP IOMMU internals in DebugFS" 195baaa7b5dSLaurent Pinchart depends on OMAP_IOMMU && DEBUG_FS 19661c75352SSuman Anna ---help--- 197fcf3a6efSOhad Ben-Cohen Select this to see extensive information about 198baaa7b5dSLaurent Pinchart the internal state of OMAP IOMMU in debugfs. 199fcf3a6efSOhad Ben-Cohen 200fcf3a6efSOhad Ben-Cohen Say N unless you know you need this. 201fcf3a6efSOhad Ben-Cohen 202c68a2921SDaniel Kurtzconfig ROCKCHIP_IOMMU 203c68a2921SDaniel Kurtz bool "Rockchip IOMMU Support" 20411175886SJoerg Roedel depends on ARM 20511175886SJoerg Roedel depends on ARCH_ROCKCHIP || COMPILE_TEST 206c68a2921SDaniel Kurtz select IOMMU_API 207c68a2921SDaniel Kurtz select ARM_DMA_USE_IOMMU 208c68a2921SDaniel Kurtz help 209c68a2921SDaniel Kurtz Support for IOMMUs found on Rockchip rk32xx SOCs. 210c68a2921SDaniel Kurtz These IOMMUs allow virtualization of the address space used by most 211c68a2921SDaniel Kurtz cores within the multimedia subsystem. 212c68a2921SDaniel Kurtz Say Y here if you are using a Rockchip SoC that includes an IOMMU 213c68a2921SDaniel Kurtz device. 214c68a2921SDaniel Kurtz 215d53e54b4SHiroshi DOYUconfig TEGRA_IOMMU_GART 216d53e54b4SHiroshi DOYU bool "Tegra GART IOMMU Support" 217d53e54b4SHiroshi DOYU depends on ARCH_TEGRA_2x_SOC 218d53e54b4SHiroshi DOYU select IOMMU_API 219d53e54b4SHiroshi DOYU help 220d53e54b4SHiroshi DOYU Enables support for remapping discontiguous physical memory 221d53e54b4SHiroshi DOYU shared with the operating system into contiguous I/O virtual 222d53e54b4SHiroshi DOYU space through the GART (Graphics Address Relocation Table) 223d53e54b4SHiroshi DOYU hardware included on Tegra SoCs. 224d53e54b4SHiroshi DOYU 2257a31f6f4SHiroshi DOYUconfig TEGRA_IOMMU_SMMU 22689184651SThierry Reding bool "NVIDIA Tegra SMMU Support" 22789184651SThierry Reding depends on ARCH_TEGRA 22889184651SThierry Reding depends on TEGRA_AHB 22989184651SThierry Reding depends on TEGRA_MC 2307a31f6f4SHiroshi DOYU select IOMMU_API 2317a31f6f4SHiroshi DOYU help 23289184651SThierry Reding This driver supports the IOMMU hardware (SMMU) found on NVIDIA Tegra 233588c43a7SThierry Reding SoCs (Tegra30 up to Tegra210). 2347a31f6f4SHiroshi DOYU 2352a96536eSKyongHo Choconfig EXYNOS_IOMMU 2362a96536eSKyongHo Cho bool "Exynos IOMMU Support" 237e5144c93SArnd Bergmann depends on ARCH_EXYNOS && ARM && MMU 2382a96536eSKyongHo Cho select IOMMU_API 2394802c1d0STushar Behera select ARM_DMA_USE_IOMMU 2402a96536eSKyongHo Cho help 2412a96536eSKyongHo Cho Support for the IOMMU (System MMU) of Samsung Exynos application 2425455d700SSachin Kamat processor family. This enables H/W multimedia accelerators to see 2435455d700SSachin Kamat non-linear physical memory chunks as linear memory in their 2445455d700SSachin Kamat address space. 2452a96536eSKyongHo Cho 2462a96536eSKyongHo Cho If unsure, say N here. 2472a96536eSKyongHo Cho 2482a96536eSKyongHo Choconfig EXYNOS_IOMMU_DEBUG 2492a96536eSKyongHo Cho bool "Debugging log for Exynos IOMMU" 2502a96536eSKyongHo Cho depends on EXYNOS_IOMMU 2512a96536eSKyongHo Cho help 2522a96536eSKyongHo Cho Select this to see the detailed log message that shows what 2535455d700SSachin Kamat happens in the IOMMU driver. 2542a96536eSKyongHo Cho 2555455d700SSachin Kamat Say N unless you need kernel log message for IOMMU debugging. 2562a96536eSKyongHo Cho 257c2c460f7SHideki EIRAKUconfig SHMOBILE_IPMMU 258c2c460f7SHideki EIRAKU bool 259c2c460f7SHideki EIRAKU 260c2c460f7SHideki EIRAKUconfig SHMOBILE_IPMMU_TLB 261c2c460f7SHideki EIRAKU bool 262c2c460f7SHideki EIRAKU 263c2c460f7SHideki EIRAKUconfig SHMOBILE_IOMMU 264c2c460f7SHideki EIRAKU bool "IOMMU for Renesas IPMMU/IPMMUI" 265c2c460f7SHideki EIRAKU default n 266e5144c93SArnd Bergmann depends on ARM && MMU 267b8354439SPaul Bolle depends on ARCH_SHMOBILE || COMPILE_TEST 268c2c460f7SHideki EIRAKU select IOMMU_API 269c2c460f7SHideki EIRAKU select ARM_DMA_USE_IOMMU 270c2c460f7SHideki EIRAKU select SHMOBILE_IPMMU 271c2c460f7SHideki EIRAKU select SHMOBILE_IPMMU_TLB 272c2c460f7SHideki EIRAKU help 273c2c460f7SHideki EIRAKU Support for Renesas IPMMU/IPMMUI. This option enables 274c2c460f7SHideki EIRAKU remapping of DMA memory accesses from all of the IP blocks 275c2c460f7SHideki EIRAKU on the ICB. 276c2c460f7SHideki EIRAKU 277c2c460f7SHideki EIRAKU Warning: Drivers (including userspace drivers of UIO 278c2c460f7SHideki EIRAKU devices) of the IP blocks on the ICB *must* use addresses 279c2c460f7SHideki EIRAKU allocated from the IPMMU (iova) for DMA with this option 280c2c460f7SHideki EIRAKU enabled. 281c2c460f7SHideki EIRAKU 282c2c460f7SHideki EIRAKU If unsure, say N. 283c2c460f7SHideki EIRAKU 284c2c460f7SHideki EIRAKUchoice 285c2c460f7SHideki EIRAKU prompt "IPMMU/IPMMUI address space size" 286c2c460f7SHideki EIRAKU default SHMOBILE_IOMMU_ADDRSIZE_2048MB 287c2c460f7SHideki EIRAKU depends on SHMOBILE_IOMMU 288c2c460f7SHideki EIRAKU help 289c2c460f7SHideki EIRAKU This option sets IPMMU/IPMMUI address space size by 290c2c460f7SHideki EIRAKU adjusting the 1st level page table size. The page table size 291c2c460f7SHideki EIRAKU is calculated as follows: 292c2c460f7SHideki EIRAKU 293c2c460f7SHideki EIRAKU page table size = number of page table entries * 4 bytes 294c2c460f7SHideki EIRAKU number of page table entries = address space size / 1 MiB 295c2c460f7SHideki EIRAKU 296c2c460f7SHideki EIRAKU For example, when the address space size is 2048 MiB, the 297c2c460f7SHideki EIRAKU 1st level page table size is 8192 bytes. 298c2c460f7SHideki EIRAKU 299c2c460f7SHideki EIRAKU config SHMOBILE_IOMMU_ADDRSIZE_2048MB 300c2c460f7SHideki EIRAKU bool "2 GiB" 301c2c460f7SHideki EIRAKU 302c2c460f7SHideki EIRAKU config SHMOBILE_IOMMU_ADDRSIZE_1024MB 303c2c460f7SHideki EIRAKU bool "1 GiB" 304c2c460f7SHideki EIRAKU 305c2c460f7SHideki EIRAKU config SHMOBILE_IOMMU_ADDRSIZE_512MB 306c2c460f7SHideki EIRAKU bool "512 MiB" 307c2c460f7SHideki EIRAKU 308c2c460f7SHideki EIRAKU config SHMOBILE_IOMMU_ADDRSIZE_256MB 309c2c460f7SHideki EIRAKU bool "256 MiB" 310c2c460f7SHideki EIRAKU 311c2c460f7SHideki EIRAKU config SHMOBILE_IOMMU_ADDRSIZE_128MB 312c2c460f7SHideki EIRAKU bool "128 MiB" 313c2c460f7SHideki EIRAKU 314c2c460f7SHideki EIRAKU config SHMOBILE_IOMMU_ADDRSIZE_64MB 315c2c460f7SHideki EIRAKU bool "64 MiB" 316c2c460f7SHideki EIRAKU 317c2c460f7SHideki EIRAKU config SHMOBILE_IOMMU_ADDRSIZE_32MB 318c2c460f7SHideki EIRAKU bool "32 MiB" 319c2c460f7SHideki EIRAKU 320c2c460f7SHideki EIRAKUendchoice 321c2c460f7SHideki EIRAKU 322c2c460f7SHideki EIRAKUconfig SHMOBILE_IOMMU_L1SIZE 323c2c460f7SHideki EIRAKU int 324c2c460f7SHideki EIRAKU default 8192 if SHMOBILE_IOMMU_ADDRSIZE_2048MB 325c2c460f7SHideki EIRAKU default 4096 if SHMOBILE_IOMMU_ADDRSIZE_1024MB 326c2c460f7SHideki EIRAKU default 2048 if SHMOBILE_IOMMU_ADDRSIZE_512MB 327c2c460f7SHideki EIRAKU default 1024 if SHMOBILE_IOMMU_ADDRSIZE_256MB 328c2c460f7SHideki EIRAKU default 512 if SHMOBILE_IOMMU_ADDRSIZE_128MB 329c2c460f7SHideki EIRAKU default 256 if SHMOBILE_IOMMU_ADDRSIZE_64MB 330c2c460f7SHideki EIRAKU default 128 if SHMOBILE_IOMMU_ADDRSIZE_32MB 331c2c460f7SHideki EIRAKU 332d25a2a16SLaurent Pinchartconfig IPMMU_VMSA 333d25a2a16SLaurent Pinchart bool "Renesas VMSA-compatible IPMMU" 334d25a2a16SLaurent Pinchart depends on ARM_LPAE 335d25a2a16SLaurent Pinchart depends on ARCH_SHMOBILE || COMPILE_TEST 336d25a2a16SLaurent Pinchart select IOMMU_API 337f20ed39fSLaurent Pinchart select IOMMU_IO_PGTABLE_LPAE 338d25a2a16SLaurent Pinchart select ARM_DMA_USE_IOMMU 339d25a2a16SLaurent Pinchart help 340d25a2a16SLaurent Pinchart Support for the Renesas VMSA-compatible IPMMU Renesas found in the 341d25a2a16SLaurent Pinchart R-Mobile APE6 and R-Car H2/M2 SoCs. 342d25a2a16SLaurent Pinchart 343d25a2a16SLaurent Pinchart If unsure, say N. 344d25a2a16SLaurent Pinchart 3454e13c1acSAlexey Kardashevskiyconfig SPAPR_TCE_IOMMU 3464e13c1acSAlexey Kardashevskiy bool "sPAPR TCE IOMMU Support" 3475b25199eSAlexey Kardashevskiy depends on PPC_POWERNV || PPC_PSERIES 3484e13c1acSAlexey Kardashevskiy select IOMMU_API 3494e13c1acSAlexey Kardashevskiy help 3504e13c1acSAlexey Kardashevskiy Enables bits of IOMMU API required by VFIO. The iommu_ops 3514e13c1acSAlexey Kardashevskiy is not implemented as it is not necessary for VFIO. 3524e13c1acSAlexey Kardashevskiy 35348ec83bcSWill Deacon# ARM IOMMU support 35445ae7cffSWill Deaconconfig ARM_SMMU 35545ae7cffSWill Deacon bool "ARM Ltd. System MMU (SMMU) Support" 356a20cc76bSJoerg Roedel depends on (ARM64 || ARM) && MMU 35745ae7cffSWill Deacon select IOMMU_API 358518f7136SWill Deacon select IOMMU_IO_PGTABLE_LPAE 35945ae7cffSWill Deacon select ARM_DMA_USE_IOMMU if ARM 36045ae7cffSWill Deacon help 36145ae7cffSWill Deacon Support for implementations of the ARM System MMU architecture 362518f7136SWill Deacon versions 1 and 2. 36345ae7cffSWill Deacon 36445ae7cffSWill Deacon Say Y here if your SoC includes an IOMMU device implementing 36545ae7cffSWill Deacon the ARM SMMU architecture. 36645ae7cffSWill Deacon 36748ec83bcSWill Deaconconfig ARM_SMMU_V3 36848ec83bcSWill Deacon bool "ARM Ltd. System MMU Version 3 (SMMUv3) Support" 36948ec83bcSWill Deacon depends on ARM64 && PCI 37048ec83bcSWill Deacon select IOMMU_API 37148ec83bcSWill Deacon select IOMMU_IO_PGTABLE_LPAE 37248ec83bcSWill Deacon help 37348ec83bcSWill Deacon Support for implementations of the ARM System MMU architecture 37448ec83bcSWill Deacon version 3 providing translation support to a PCIe root complex. 37548ec83bcSWill Deacon 37648ec83bcSWill Deacon Say Y here if your system includes an IOMMU device implementing 37748ec83bcSWill Deacon the ARM SMMUv3 architecture. 37848ec83bcSWill Deacon 37968255b62SJoerg Roedelendif # IOMMU_SUPPORT 380