1*d26a5667SVinod Koul /* SPDX-License-Identifier: GPL-2.0 */
2*d26a5667SVinod Koul /*
3*d26a5667SVinod Koul  * Qualcomm SM8350 interconnect IDs
4*d26a5667SVinod Koul  *
5*d26a5667SVinod Koul  * Copyright (c) 2021, Linaro Limited
6*d26a5667SVinod Koul  */
7*d26a5667SVinod Koul 
8*d26a5667SVinod Koul #ifndef __DRIVERS_INTERCONNECT_QCOM_SM8350_H
9*d26a5667SVinod Koul #define __DRIVERS_INTERCONNECT_QCOM_SM8350_H
10*d26a5667SVinod Koul 
11*d26a5667SVinod Koul #define SM8350_MASTER_GPU_TCU				0
12*d26a5667SVinod Koul #define SM8350_MASTER_SYS_TCU				1
13*d26a5667SVinod Koul #define SM8350_MASTER_APPSS_PROC			2
14*d26a5667SVinod Koul #define SM8350_MASTER_LLCC				3
15*d26a5667SVinod Koul #define SM8350_MASTER_CNOC_LPASS_AG_NOC			4
16*d26a5667SVinod Koul #define SM8350_MASTER_CDSP_NOC_CFG			5
17*d26a5667SVinod Koul #define SM8350_MASTER_QDSS_BAM				6
18*d26a5667SVinod Koul #define SM8350_MASTER_QSPI_0				7
19*d26a5667SVinod Koul #define SM8350_MASTER_QUP_0				8
20*d26a5667SVinod Koul #define SM8350_MASTER_QUP_1				9
21*d26a5667SVinod Koul #define SM8350_MASTER_QUP_2				10
22*d26a5667SVinod Koul #define SM8350_MASTER_A1NOC_CFG				11
23*d26a5667SVinod Koul #define SM8350_MASTER_A2NOC_CFG				12
24*d26a5667SVinod Koul #define SM8350_MASTER_A1NOC_SNOC			13
25*d26a5667SVinod Koul #define SM8350_MASTER_A2NOC_SNOC			14
26*d26a5667SVinod Koul #define SM8350_MASTER_CAMNOC_HF				15
27*d26a5667SVinod Koul #define SM8350_MASTER_CAMNOC_ICP			16
28*d26a5667SVinod Koul #define SM8350_MASTER_CAMNOC_SF				17
29*d26a5667SVinod Koul #define SM8350_MASTER_COMPUTE_NOC			18
30*d26a5667SVinod Koul #define SM8350_MASTER_CNOC_DC_NOC			19
31*d26a5667SVinod Koul #define SM8350_MASTER_GEM_NOC_CFG			20
32*d26a5667SVinod Koul #define SM8350_MASTER_GEM_NOC_CNOC			21
33*d26a5667SVinod Koul #define SM8350_MASTER_GEM_NOC_PCIE_SNOC			22
34*d26a5667SVinod Koul #define SM8350_MASTER_GFX3D				23
35*d26a5667SVinod Koul #define SM8350_MASTER_CNOC_MNOC_CFG			24
36*d26a5667SVinod Koul #define SM8350_MASTER_MNOC_HF_MEM_NOC			25
37*d26a5667SVinod Koul #define SM8350_MASTER_MNOC_SF_MEM_NOC			26
38*d26a5667SVinod Koul #define SM8350_MASTER_ANOC_PCIE_GEM_NOC			27
39*d26a5667SVinod Koul #define SM8350_MASTER_SNOC_CFG				28
40*d26a5667SVinod Koul #define SM8350_MASTER_SNOC_GC_MEM_NOC			29
41*d26a5667SVinod Koul #define SM8350_MASTER_SNOC_SF_MEM_NOC			30
42*d26a5667SVinod Koul #define SM8350_MASTER_VIDEO_P0				31
43*d26a5667SVinod Koul #define SM8350_MASTER_VIDEO_P1				32
44*d26a5667SVinod Koul #define SM8350_MASTER_VIDEO_PROC			33
45*d26a5667SVinod Koul #define SM8350_MASTER_QUP_CORE_0			34
46*d26a5667SVinod Koul #define SM8350_MASTER_QUP_CORE_1			35
47*d26a5667SVinod Koul #define SM8350_MASTER_QUP_CORE_2			36
48*d26a5667SVinod Koul #define SM8350_MASTER_CRYPTO				37
49*d26a5667SVinod Koul #define SM8350_MASTER_IPA				38
50*d26a5667SVinod Koul #define SM8350_MASTER_MDP0				39
51*d26a5667SVinod Koul #define SM8350_MASTER_MDP1				40
52*d26a5667SVinod Koul #define SM8350_MASTER_CDSP_PROC				41
53*d26a5667SVinod Koul #define SM8350_MASTER_PIMEM				42
54*d26a5667SVinod Koul #define SM8350_MASTER_ROTATOR				43
55*d26a5667SVinod Koul #define SM8350_MASTER_GIC				44
56*d26a5667SVinod Koul #define SM8350_MASTER_PCIE_0				45
57*d26a5667SVinod Koul #define SM8350_MASTER_PCIE_1				46
58*d26a5667SVinod Koul #define SM8350_MASTER_QDSS_DAP				47
59*d26a5667SVinod Koul #define SM8350_MASTER_QDSS_ETR				48
60*d26a5667SVinod Koul #define SM8350_MASTER_SDCC_2				49
61*d26a5667SVinod Koul #define SM8350_MASTER_SDCC_4				50
62*d26a5667SVinod Koul #define SM8350_MASTER_UFS_CARD				51
63*d26a5667SVinod Koul #define SM8350_MASTER_UFS_MEM				52
64*d26a5667SVinod Koul #define SM8350_MASTER_USB3_0				53
65*d26a5667SVinod Koul #define SM8350_MASTER_USB3_1				54
66*d26a5667SVinod Koul #define SM8350_SLAVE_EBI1				55
67*d26a5667SVinod Koul #define SM8350_SLAVE_AHB2PHY_SOUTH			56
68*d26a5667SVinod Koul #define SM8350_SLAVE_AHB2PHY_NORTH			57
69*d26a5667SVinod Koul #define SM8350_SLAVE_AOSS				58
70*d26a5667SVinod Koul #define SM8350_SLAVE_APPSS				59
71*d26a5667SVinod Koul #define SM8350_SLAVE_CAMERA_CFG				60
72*d26a5667SVinod Koul #define SM8350_SLAVE_CLK_CTL				61
73*d26a5667SVinod Koul #define SM8350_SLAVE_CDSP_CFG				62
74*d26a5667SVinod Koul #define SM8350_SLAVE_RBCPR_CX_CFG			63
75*d26a5667SVinod Koul #define SM8350_SLAVE_RBCPR_MMCX_CFG			64
76*d26a5667SVinod Koul #define SM8350_SLAVE_RBCPR_MX_CFG			65
77*d26a5667SVinod Koul #define SM8350_SLAVE_CRYPTO_0_CFG			66
78*d26a5667SVinod Koul #define SM8350_SLAVE_CX_RDPM				67
79*d26a5667SVinod Koul #define SM8350_SLAVE_DCC_CFG				68
80*d26a5667SVinod Koul #define SM8350_SLAVE_DISPLAY_CFG			69
81*d26a5667SVinod Koul #define SM8350_SLAVE_GFX3D_CFG				70
82*d26a5667SVinod Koul #define SM8350_SLAVE_HWKM				71
83*d26a5667SVinod Koul #define SM8350_SLAVE_IMEM_CFG				72
84*d26a5667SVinod Koul #define SM8350_SLAVE_IPA_CFG				73
85*d26a5667SVinod Koul #define SM8350_SLAVE_IPC_ROUTER_CFG			74
86*d26a5667SVinod Koul #define SM8350_SLAVE_LLCC_CFG				75
87*d26a5667SVinod Koul #define SM8350_SLAVE_LPASS				76
88*d26a5667SVinod Koul #define SM8350_SLAVE_LPASS_CORE_CFG			77
89*d26a5667SVinod Koul #define SM8350_SLAVE_LPASS_LPI_CFG			78
90*d26a5667SVinod Koul #define SM8350_SLAVE_LPASS_MPU_CFG			79
91*d26a5667SVinod Koul #define SM8350_SLAVE_LPASS_TOP_CFG			80
92*d26a5667SVinod Koul #define SM8350_SLAVE_MSS_PROC_MS_MPU_CFG		81
93*d26a5667SVinod Koul #define SM8350_SLAVE_MCDMA_MS_MPU_CFG			82
94*d26a5667SVinod Koul #define SM8350_SLAVE_CNOC_MSS				83
95*d26a5667SVinod Koul #define SM8350_SLAVE_MX_RDPM				84
96*d26a5667SVinod Koul #define SM8350_SLAVE_PCIE_0_CFG				85
97*d26a5667SVinod Koul #define SM8350_SLAVE_PCIE_1_CFG				86
98*d26a5667SVinod Koul #define SM8350_SLAVE_PDM				87
99*d26a5667SVinod Koul #define SM8350_SLAVE_PIMEM_CFG				88
100*d26a5667SVinod Koul #define SM8350_SLAVE_PKA_WRAPPER_CFG			89
101*d26a5667SVinod Koul #define SM8350_SLAVE_PMU_WRAPPER_CFG			90
102*d26a5667SVinod Koul #define SM8350_SLAVE_QDSS_CFG				91
103*d26a5667SVinod Koul #define SM8350_SLAVE_QSPI_0				92
104*d26a5667SVinod Koul #define SM8350_SLAVE_QUP_0				93
105*d26a5667SVinod Koul #define SM8350_SLAVE_QUP_1				94
106*d26a5667SVinod Koul #define SM8350_SLAVE_QUP_2				95
107*d26a5667SVinod Koul #define SM8350_SLAVE_SDCC_2				96
108*d26a5667SVinod Koul #define SM8350_SLAVE_SDCC_4				97
109*d26a5667SVinod Koul #define SM8350_SLAVE_SECURITY				98
110*d26a5667SVinod Koul #define SM8350_SLAVE_SPSS_CFG				99
111*d26a5667SVinod Koul #define SM8350_SLAVE_TCSR				100
112*d26a5667SVinod Koul #define SM8350_SLAVE_TLMM				101
113*d26a5667SVinod Koul #define SM8350_SLAVE_UFS_CARD_CFG			102
114*d26a5667SVinod Koul #define SM8350_SLAVE_UFS_MEM_CFG			103
115*d26a5667SVinod Koul #define SM8350_SLAVE_USB3_0				104
116*d26a5667SVinod Koul #define SM8350_SLAVE_USB3_1				105
117*d26a5667SVinod Koul #define SM8350_SLAVE_VENUS_CFG				106
118*d26a5667SVinod Koul #define SM8350_SLAVE_VSENSE_CTRL_CFG			107
119*d26a5667SVinod Koul #define SM8350_SLAVE_A1NOC_CFG				108
120*d26a5667SVinod Koul #define SM8350_SLAVE_A1NOC_SNOC				109
121*d26a5667SVinod Koul #define SM8350_SLAVE_A2NOC_CFG				110
122*d26a5667SVinod Koul #define SM8350_SLAVE_A2NOC_SNOC				111
123*d26a5667SVinod Koul #define SM8350_SLAVE_DDRSS_CFG				112
124*d26a5667SVinod Koul #define SM8350_SLAVE_GEM_NOC_CNOC			113
125*d26a5667SVinod Koul #define SM8350_SLAVE_GEM_NOC_CFG			114
126*d26a5667SVinod Koul #define SM8350_SLAVE_SNOC_GEM_NOC_GC			115
127*d26a5667SVinod Koul #define SM8350_SLAVE_SNOC_GEM_NOC_SF			116
128*d26a5667SVinod Koul #define SM8350_SLAVE_LLCC				117
129*d26a5667SVinod Koul #define SM8350_SLAVE_MNOC_HF_MEM_NOC			118
130*d26a5667SVinod Koul #define SM8350_SLAVE_MNOC_SF_MEM_NOC			119
131*d26a5667SVinod Koul #define SM8350_SLAVE_CNOC_MNOC_CFG			120
132*d26a5667SVinod Koul #define SM8350_SLAVE_CDSP_MEM_NOC			121
133*d26a5667SVinod Koul #define SM8350_SLAVE_MEM_NOC_PCIE_SNOC			122
134*d26a5667SVinod Koul #define SM8350_SLAVE_ANOC_PCIE_GEM_NOC			123
135*d26a5667SVinod Koul #define SM8350_SLAVE_SNOC_CFG				124
136*d26a5667SVinod Koul #define SM8350_SLAVE_QUP_CORE_0				125
137*d26a5667SVinod Koul #define SM8350_SLAVE_QUP_CORE_1				126
138*d26a5667SVinod Koul #define SM8350_SLAVE_QUP_CORE_2				127
139*d26a5667SVinod Koul #define SM8350_SLAVE_BOOT_IMEM				128
140*d26a5667SVinod Koul #define SM8350_SLAVE_IMEM				129
141*d26a5667SVinod Koul #define SM8350_SLAVE_PIMEM				130
142*d26a5667SVinod Koul #define SM8350_SLAVE_SERVICE_NSP_NOC			131
143*d26a5667SVinod Koul #define SM8350_SLAVE_SERVICE_A1NOC			132
144*d26a5667SVinod Koul #define SM8350_SLAVE_SERVICE_A2NOC			133
145*d26a5667SVinod Koul #define SM8350_SLAVE_SERVICE_CNOC			134
146*d26a5667SVinod Koul #define SM8350_SLAVE_SERVICE_GEM_NOC_1			135
147*d26a5667SVinod Koul #define SM8350_SLAVE_SERVICE_MNOC			136
148*d26a5667SVinod Koul #define SM8350_SLAVE_SERVICES_LPASS_AML_NOC		137
149*d26a5667SVinod Koul #define SM8350_SLAVE_SERVICE_LPASS_AG_NOC		138
150*d26a5667SVinod Koul #define SM8350_SLAVE_SERVICE_GEM_NOC_2			139
151*d26a5667SVinod Koul #define SM8350_SLAVE_SERVICE_SNOC			140
152*d26a5667SVinod Koul #define SM8350_SLAVE_SERVICE_GEM_NOC			141
153*d26a5667SVinod Koul #define SM8350_SLAVE_PCIE_0				142
154*d26a5667SVinod Koul #define SM8350_SLAVE_PCIE_1				143
155*d26a5667SVinod Koul #define SM8350_SLAVE_QDSS_STM				144
156*d26a5667SVinod Koul #define SM8350_SLAVE_TCU				145
157*d26a5667SVinod Koul #define SM8350_MASTER_LLCC_DISP				146
158*d26a5667SVinod Koul #define SM8350_MASTER_MNOC_HF_MEM_NOC_DISP		147
159*d26a5667SVinod Koul #define SM8350_MASTER_MNOC_SF_MEM_NOC_DISP		148
160*d26a5667SVinod Koul #define SM8350_MASTER_MDP0_DISP				149
161*d26a5667SVinod Koul #define SM8350_MASTER_MDP1_DISP				150
162*d26a5667SVinod Koul #define SM8350_MASTER_ROTATOR_DISP			151
163*d26a5667SVinod Koul #define SM8350_SLAVE_EBI1_DISP				152
164*d26a5667SVinod Koul #define SM8350_SLAVE_LLCC_DISP				153
165*d26a5667SVinod Koul #define SM8350_SLAVE_MNOC_HF_MEM_NOC_DISP		154
166*d26a5667SVinod Koul #define SM8350_SLAVE_MNOC_SF_MEM_NOC_DISP		155
167*d26a5667SVinod Koul 
168*d26a5667SVinod Koul #endif
169