1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (C) 2020 Linaro Ltd 4 * Author: Jun Nie <jun.nie@linaro.org> 5 * With reference of msm8916 interconnect driver of Georgi Djakov. 6 */ 7 8 #include <linux/clk.h> 9 #include <linux/device.h> 10 #include <linux/interconnect-provider.h> 11 #include <linux/io.h> 12 #include <linux/module.h> 13 #include <linux/platform_device.h> 14 #include <linux/of_device.h> 15 16 #include <dt-bindings/interconnect/qcom,msm8939.h> 17 18 #include "smd-rpm.h" 19 #include "icc-rpm.h" 20 21 enum { 22 MSM8939_BIMC_SNOC_MAS = 1, 23 MSM8939_BIMC_SNOC_SLV, 24 MSM8939_MASTER_AMPSS_M0, 25 MSM8939_MASTER_LPASS, 26 MSM8939_MASTER_BLSP_1, 27 MSM8939_MASTER_DEHR, 28 MSM8939_MASTER_GRAPHICS_3D, 29 MSM8939_MASTER_JPEG, 30 MSM8939_MASTER_MDP_PORT0, 31 MSM8939_MASTER_MDP_PORT1, 32 MSM8939_MASTER_CPP, 33 MSM8939_MASTER_CRYPTO_CORE0, 34 MSM8939_MASTER_SDCC_1, 35 MSM8939_MASTER_SDCC_2, 36 MSM8939_MASTER_QDSS_BAM, 37 MSM8939_MASTER_QDSS_ETR, 38 MSM8939_MASTER_SNOC_CFG, 39 MSM8939_MASTER_SPDM, 40 MSM8939_MASTER_TCU0, 41 MSM8939_MASTER_USB_HS1, 42 MSM8939_MASTER_USB_HS2, 43 MSM8939_MASTER_VFE, 44 MSM8939_MASTER_VIDEO_P0, 45 MSM8939_SNOC_MM_INT_0, 46 MSM8939_SNOC_MM_INT_1, 47 MSM8939_SNOC_MM_INT_2, 48 MSM8939_PNOC_INT_0, 49 MSM8939_PNOC_INT_1, 50 MSM8939_PNOC_MAS_0, 51 MSM8939_PNOC_MAS_1, 52 MSM8939_PNOC_SLV_0, 53 MSM8939_PNOC_SLV_1, 54 MSM8939_PNOC_SLV_2, 55 MSM8939_PNOC_SLV_3, 56 MSM8939_PNOC_SLV_4, 57 MSM8939_PNOC_SLV_8, 58 MSM8939_PNOC_SLV_9, 59 MSM8939_PNOC_SNOC_MAS, 60 MSM8939_PNOC_SNOC_SLV, 61 MSM8939_SNOC_QDSS_INT, 62 MSM8939_SLAVE_AMPSS_L2, 63 MSM8939_SLAVE_APSS, 64 MSM8939_SLAVE_LPASS, 65 MSM8939_SLAVE_BIMC_CFG, 66 MSM8939_SLAVE_BLSP_1, 67 MSM8939_SLAVE_BOOT_ROM, 68 MSM8939_SLAVE_CAMERA_CFG, 69 MSM8939_SLAVE_CATS_128, 70 MSM8939_SLAVE_OCMEM_64, 71 MSM8939_SLAVE_CLK_CTL, 72 MSM8939_SLAVE_CRYPTO_0_CFG, 73 MSM8939_SLAVE_DEHR_CFG, 74 MSM8939_SLAVE_DISPLAY_CFG, 75 MSM8939_SLAVE_EBI_CH0, 76 MSM8939_SLAVE_GRAPHICS_3D_CFG, 77 MSM8939_SLAVE_IMEM_CFG, 78 MSM8939_SLAVE_IMEM, 79 MSM8939_SLAVE_MPM, 80 MSM8939_SLAVE_MSG_RAM, 81 MSM8939_SLAVE_MSS, 82 MSM8939_SLAVE_PDM, 83 MSM8939_SLAVE_PMIC_ARB, 84 MSM8939_SLAVE_PNOC_CFG, 85 MSM8939_SLAVE_PRNG, 86 MSM8939_SLAVE_QDSS_CFG, 87 MSM8939_SLAVE_QDSS_STM, 88 MSM8939_SLAVE_RBCPR_CFG, 89 MSM8939_SLAVE_SDCC_1, 90 MSM8939_SLAVE_SDCC_2, 91 MSM8939_SLAVE_SECURITY, 92 MSM8939_SLAVE_SNOC_CFG, 93 MSM8939_SLAVE_SPDM, 94 MSM8939_SLAVE_SRVC_SNOC, 95 MSM8939_SLAVE_TCSR, 96 MSM8939_SLAVE_TLMM, 97 MSM8939_SLAVE_USB_HS1, 98 MSM8939_SLAVE_USB_HS2, 99 MSM8939_SLAVE_VENUS_CFG, 100 MSM8939_SNOC_BIMC_0_MAS, 101 MSM8939_SNOC_BIMC_0_SLV, 102 MSM8939_SNOC_BIMC_1_MAS, 103 MSM8939_SNOC_BIMC_1_SLV, 104 MSM8939_SNOC_BIMC_2_MAS, 105 MSM8939_SNOC_BIMC_2_SLV, 106 MSM8939_SNOC_INT_0, 107 MSM8939_SNOC_INT_1, 108 MSM8939_SNOC_INT_BIMC, 109 MSM8939_SNOC_PNOC_MAS, 110 MSM8939_SNOC_PNOC_SLV, 111 }; 112 113 static const struct clk_bulk_data msm8939_bus_clocks[] = { 114 { .id = "bus" }, 115 { .id = "bus_a" }, 116 }; 117 118 DEFINE_QNODE(bimc_snoc_mas, MSM8939_BIMC_SNOC_MAS, 8, -1, -1, MSM8939_BIMC_SNOC_SLV); 119 DEFINE_QNODE(bimc_snoc_slv, MSM8939_BIMC_SNOC_SLV, 16, -1, 2, MSM8939_SNOC_INT_0, MSM8939_SNOC_INT_1); 120 DEFINE_QNODE(mas_apss, MSM8939_MASTER_AMPSS_M0, 16, -1, -1, MSM8939_SLAVE_EBI_CH0, MSM8939_BIMC_SNOC_MAS, MSM8939_SLAVE_AMPSS_L2); 121 DEFINE_QNODE(mas_audio, MSM8939_MASTER_LPASS, 4, -1, -1, MSM8939_PNOC_MAS_0); 122 DEFINE_QNODE(mas_blsp_1, MSM8939_MASTER_BLSP_1, 4, -1, -1, MSM8939_PNOC_MAS_1); 123 DEFINE_QNODE(mas_dehr, MSM8939_MASTER_DEHR, 4, -1, -1, MSM8939_PNOC_MAS_0); 124 DEFINE_QNODE(mas_gfx, MSM8939_MASTER_GRAPHICS_3D, 16, -1, -1, MSM8939_SLAVE_EBI_CH0, MSM8939_BIMC_SNOC_MAS, MSM8939_SLAVE_AMPSS_L2); 125 DEFINE_QNODE(mas_jpeg, MSM8939_MASTER_JPEG, 16, -1, -1, MSM8939_SNOC_MM_INT_0, MSM8939_SNOC_MM_INT_2); 126 DEFINE_QNODE(mas_mdp0, MSM8939_MASTER_MDP_PORT0, 16, -1, -1, MSM8939_SNOC_MM_INT_1, MSM8939_SNOC_MM_INT_2); 127 DEFINE_QNODE(mas_mdp1, MSM8939_MASTER_MDP_PORT1, 16, -1, -1, MSM8939_SNOC_MM_INT_0, MSM8939_SNOC_MM_INT_2); 128 DEFINE_QNODE(mas_cpp, MSM8939_MASTER_CPP, 16, -1, -1, MSM8939_SNOC_MM_INT_0, MSM8939_SNOC_MM_INT_2); 129 DEFINE_QNODE(mas_pcnoc_crypto_0, MSM8939_MASTER_CRYPTO_CORE0, 8, -1, -1, MSM8939_PNOC_INT_1); 130 DEFINE_QNODE(mas_pcnoc_sdcc_1, MSM8939_MASTER_SDCC_1, 8, -1, -1, MSM8939_PNOC_INT_1); 131 DEFINE_QNODE(mas_pcnoc_sdcc_2, MSM8939_MASTER_SDCC_2, 8, -1, -1, MSM8939_PNOC_INT_1); 132 DEFINE_QNODE(mas_qdss_bam, MSM8939_MASTER_QDSS_BAM, 8, -1, -1, MSM8939_SNOC_QDSS_INT); 133 DEFINE_QNODE(mas_qdss_etr, MSM8939_MASTER_QDSS_ETR, 8, -1, -1, MSM8939_SNOC_QDSS_INT); 134 DEFINE_QNODE(mas_snoc_cfg, MSM8939_MASTER_SNOC_CFG, 4, 20, -1, MSM8939_SLAVE_SRVC_SNOC); 135 DEFINE_QNODE(mas_spdm, MSM8939_MASTER_SPDM, 4, -1, -1, MSM8939_PNOC_MAS_0); 136 DEFINE_QNODE(mas_tcu0, MSM8939_MASTER_TCU0, 16, -1, -1, MSM8939_SLAVE_EBI_CH0, MSM8939_BIMC_SNOC_MAS, MSM8939_SLAVE_AMPSS_L2); 137 DEFINE_QNODE(mas_usb_hs1, MSM8939_MASTER_USB_HS1, 4, -1, -1, MSM8939_PNOC_MAS_1); 138 DEFINE_QNODE(mas_usb_hs2, MSM8939_MASTER_USB_HS2, 4, -1, -1, MSM8939_PNOC_MAS_1); 139 DEFINE_QNODE(mas_vfe, MSM8939_MASTER_VFE, 16, -1, -1, MSM8939_SNOC_MM_INT_1, MSM8939_SNOC_MM_INT_2); 140 DEFINE_QNODE(mas_video, MSM8939_MASTER_VIDEO_P0, 16, -1, -1, MSM8939_SNOC_MM_INT_0, MSM8939_SNOC_MM_INT_2); 141 DEFINE_QNODE(mm_int_0, MSM8939_SNOC_MM_INT_0, 16, -1, -1, MSM8939_SNOC_BIMC_2_MAS); 142 DEFINE_QNODE(mm_int_1, MSM8939_SNOC_MM_INT_1, 16, -1, -1, MSM8939_SNOC_BIMC_1_MAS); 143 DEFINE_QNODE(mm_int_2, MSM8939_SNOC_MM_INT_2, 16, -1, -1, MSM8939_SNOC_INT_0); 144 DEFINE_QNODE(pcnoc_int_0, MSM8939_PNOC_INT_0, 8, -1, -1, MSM8939_PNOC_SNOC_MAS, MSM8939_PNOC_SLV_0, MSM8939_PNOC_SLV_1, MSM8939_PNOC_SLV_2, MSM8939_PNOC_SLV_3, MSM8939_PNOC_SLV_4, MSM8939_PNOC_SLV_8, MSM8939_PNOC_SLV_9); 145 DEFINE_QNODE(pcnoc_int_1, MSM8939_PNOC_INT_1, 8, -1, -1, MSM8939_PNOC_SNOC_MAS); 146 DEFINE_QNODE(pcnoc_m_0, MSM8939_PNOC_MAS_0, 8, -1, -1, MSM8939_PNOC_INT_0); 147 DEFINE_QNODE(pcnoc_m_1, MSM8939_PNOC_MAS_1, 8, -1, -1, MSM8939_PNOC_SNOC_MAS); 148 DEFINE_QNODE(pcnoc_s_0, MSM8939_PNOC_SLV_0, 4, -1, -1, MSM8939_SLAVE_CLK_CTL, MSM8939_SLAVE_TLMM, MSM8939_SLAVE_TCSR, MSM8939_SLAVE_SECURITY, MSM8939_SLAVE_MSS); 149 DEFINE_QNODE(pcnoc_s_1, MSM8939_PNOC_SLV_1, 4, -1, -1, MSM8939_SLAVE_IMEM_CFG, MSM8939_SLAVE_CRYPTO_0_CFG, MSM8939_SLAVE_MSG_RAM, MSM8939_SLAVE_PDM, MSM8939_SLAVE_PRNG); 150 DEFINE_QNODE(pcnoc_s_2, MSM8939_PNOC_SLV_2, 4, -1, -1, MSM8939_SLAVE_SPDM, MSM8939_SLAVE_BOOT_ROM, MSM8939_SLAVE_BIMC_CFG, MSM8939_SLAVE_PNOC_CFG, MSM8939_SLAVE_PMIC_ARB); 151 DEFINE_QNODE(pcnoc_s_3, MSM8939_PNOC_SLV_3, 4, -1, -1, MSM8939_SLAVE_MPM, MSM8939_SLAVE_SNOC_CFG, MSM8939_SLAVE_RBCPR_CFG, MSM8939_SLAVE_QDSS_CFG, MSM8939_SLAVE_DEHR_CFG); 152 DEFINE_QNODE(pcnoc_s_4, MSM8939_PNOC_SLV_4, 4, -1, -1, MSM8939_SLAVE_VENUS_CFG, MSM8939_SLAVE_CAMERA_CFG, MSM8939_SLAVE_DISPLAY_CFG); 153 DEFINE_QNODE(pcnoc_s_8, MSM8939_PNOC_SLV_8, 4, -1, -1, MSM8939_SLAVE_USB_HS1, MSM8939_SLAVE_SDCC_1, MSM8939_SLAVE_BLSP_1); 154 DEFINE_QNODE(pcnoc_s_9, MSM8939_PNOC_SLV_9, 4, -1, -1, MSM8939_SLAVE_SDCC_2, MSM8939_SLAVE_LPASS, MSM8939_SLAVE_USB_HS2); 155 DEFINE_QNODE(pcnoc_snoc_mas, MSM8939_PNOC_SNOC_MAS, 8, 29, -1, MSM8939_PNOC_SNOC_SLV); 156 DEFINE_QNODE(pcnoc_snoc_slv, MSM8939_PNOC_SNOC_SLV, 8, -1, 45, MSM8939_SNOC_INT_0, MSM8939_SNOC_INT_BIMC, MSM8939_SNOC_INT_1); 157 DEFINE_QNODE(qdss_int, MSM8939_SNOC_QDSS_INT, 8, -1, -1, MSM8939_SNOC_INT_0, MSM8939_SNOC_INT_BIMC); 158 DEFINE_QNODE(slv_apps_l2, MSM8939_SLAVE_AMPSS_L2, 16, -1, -1, 0); 159 DEFINE_QNODE(slv_apss, MSM8939_SLAVE_APSS, 4, -1, 20, 0); 160 DEFINE_QNODE(slv_audio, MSM8939_SLAVE_LPASS, 4, -1, -1, 0); 161 DEFINE_QNODE(slv_bimc_cfg, MSM8939_SLAVE_BIMC_CFG, 4, -1, -1, 0); 162 DEFINE_QNODE(slv_blsp_1, MSM8939_SLAVE_BLSP_1, 4, -1, -1, 0); 163 DEFINE_QNODE(slv_boot_rom, MSM8939_SLAVE_BOOT_ROM, 4, -1, -1, 0); 164 DEFINE_QNODE(slv_camera_cfg, MSM8939_SLAVE_CAMERA_CFG, 4, -1, -1, 0); 165 DEFINE_QNODE(slv_cats_0, MSM8939_SLAVE_CATS_128, 16, -1, 106, 0); 166 DEFINE_QNODE(slv_cats_1, MSM8939_SLAVE_OCMEM_64, 8, -1, 107, 0); 167 DEFINE_QNODE(slv_clk_ctl, MSM8939_SLAVE_CLK_CTL, 4, -1, -1, 0); 168 DEFINE_QNODE(slv_crypto_0_cfg, MSM8939_SLAVE_CRYPTO_0_CFG, 4, -1, -1, 0); 169 DEFINE_QNODE(slv_dehr_cfg, MSM8939_SLAVE_DEHR_CFG, 4, -1, -1, 0); 170 DEFINE_QNODE(slv_display_cfg, MSM8939_SLAVE_DISPLAY_CFG, 4, -1, -1, 0); 171 DEFINE_QNODE(slv_ebi_ch0, MSM8939_SLAVE_EBI_CH0, 16, -1, 0, 0); 172 DEFINE_QNODE(slv_gfx_cfg, MSM8939_SLAVE_GRAPHICS_3D_CFG, 4, -1, -1, 0); 173 DEFINE_QNODE(slv_imem_cfg, MSM8939_SLAVE_IMEM_CFG, 4, -1, -1, 0); 174 DEFINE_QNODE(slv_imem, MSM8939_SLAVE_IMEM, 8, -1, 26, 0); 175 DEFINE_QNODE(slv_mpm, MSM8939_SLAVE_MPM, 4, -1, -1, 0); 176 DEFINE_QNODE(slv_msg_ram, MSM8939_SLAVE_MSG_RAM, 4, -1, -1, 0); 177 DEFINE_QNODE(slv_mss, MSM8939_SLAVE_MSS, 4, -1, -1, 0); 178 DEFINE_QNODE(slv_pdm, MSM8939_SLAVE_PDM, 4, -1, -1, 0); 179 DEFINE_QNODE(slv_pmic_arb, MSM8939_SLAVE_PMIC_ARB, 4, -1, -1, 0); 180 DEFINE_QNODE(slv_pcnoc_cfg, MSM8939_SLAVE_PNOC_CFG, 4, -1, -1, 0); 181 DEFINE_QNODE(slv_prng, MSM8939_SLAVE_PRNG, 4, -1, -1, 0); 182 DEFINE_QNODE(slv_qdss_cfg, MSM8939_SLAVE_QDSS_CFG, 4, -1, -1, 0); 183 DEFINE_QNODE(slv_qdss_stm, MSM8939_SLAVE_QDSS_STM, 4, -1, 30, 0); 184 DEFINE_QNODE(slv_rbcpr_cfg, MSM8939_SLAVE_RBCPR_CFG, 4, -1, -1, 0); 185 DEFINE_QNODE(slv_sdcc_1, MSM8939_SLAVE_SDCC_1, 4, -1, -1, 0); 186 DEFINE_QNODE(slv_sdcc_2, MSM8939_SLAVE_SDCC_2, 4, -1, -1, 0); 187 DEFINE_QNODE(slv_security, MSM8939_SLAVE_SECURITY, 4, -1, -1, 0); 188 DEFINE_QNODE(slv_snoc_cfg, MSM8939_SLAVE_SNOC_CFG, 4, -1, -1, 0); 189 DEFINE_QNODE(slv_spdm, MSM8939_SLAVE_SPDM, 4, -1, -1, 0); 190 DEFINE_QNODE(slv_srvc_snoc, MSM8939_SLAVE_SRVC_SNOC, 8, -1, 29, 0); 191 DEFINE_QNODE(slv_tcsr, MSM8939_SLAVE_TCSR, 4, -1, -1, 0); 192 DEFINE_QNODE(slv_tlmm, MSM8939_SLAVE_TLMM, 4, -1, -1, 0); 193 DEFINE_QNODE(slv_usb_hs1, MSM8939_SLAVE_USB_HS1, 4, -1, -1, 0); 194 DEFINE_QNODE(slv_usb_hs2, MSM8939_SLAVE_USB_HS2, 4, -1, -1, 0); 195 DEFINE_QNODE(slv_venus_cfg, MSM8939_SLAVE_VENUS_CFG, 4, -1, -1, 0); 196 DEFINE_QNODE(snoc_bimc_0_mas, MSM8939_SNOC_BIMC_0_MAS, 16, 3, -1, MSM8939_SNOC_BIMC_0_SLV); 197 DEFINE_QNODE(snoc_bimc_0_slv, MSM8939_SNOC_BIMC_0_SLV, 16, -1, 24, MSM8939_SLAVE_EBI_CH0); 198 DEFINE_QNODE(snoc_bimc_1_mas, MSM8939_SNOC_BIMC_1_MAS, 16, 76, -1, MSM8939_SNOC_BIMC_1_SLV); 199 DEFINE_QNODE(snoc_bimc_1_slv, MSM8939_SNOC_BIMC_1_SLV, 16, -1, 104, MSM8939_SLAVE_EBI_CH0); 200 DEFINE_QNODE(snoc_bimc_2_mas, MSM8939_SNOC_BIMC_2_MAS, 16, -1, -1, MSM8939_SNOC_BIMC_2_SLV); 201 DEFINE_QNODE(snoc_bimc_2_slv, MSM8939_SNOC_BIMC_2_SLV, 16, -1, -1, MSM8939_SLAVE_EBI_CH0); 202 DEFINE_QNODE(snoc_int_0, MSM8939_SNOC_INT_0, 8, 99, 130, MSM8939_SLAVE_QDSS_STM, MSM8939_SLAVE_IMEM, MSM8939_SNOC_PNOC_MAS); 203 DEFINE_QNODE(snoc_int_1, MSM8939_SNOC_INT_1, 8, 100, 131, MSM8939_SLAVE_APSS, MSM8939_SLAVE_CATS_128, MSM8939_SLAVE_OCMEM_64); 204 DEFINE_QNODE(snoc_int_bimc, MSM8939_SNOC_INT_BIMC, 8, 101, 132, MSM8939_SNOC_BIMC_1_MAS); 205 DEFINE_QNODE(snoc_pcnoc_mas, MSM8939_SNOC_PNOC_MAS, 8, -1, -1, MSM8939_SNOC_PNOC_SLV); 206 DEFINE_QNODE(snoc_pcnoc_slv, MSM8939_SNOC_PNOC_SLV, 8, -1, -1, MSM8939_PNOC_INT_0); 207 208 static struct qcom_icc_node *msm8939_snoc_nodes[] = { 209 [BIMC_SNOC_SLV] = &bimc_snoc_slv, 210 [MASTER_QDSS_BAM] = &mas_qdss_bam, 211 [MASTER_QDSS_ETR] = &mas_qdss_etr, 212 [MASTER_SNOC_CFG] = &mas_snoc_cfg, 213 [PCNOC_SNOC_SLV] = &pcnoc_snoc_slv, 214 [SLAVE_APSS] = &slv_apss, 215 [SLAVE_CATS_128] = &slv_cats_0, 216 [SLAVE_OCMEM_64] = &slv_cats_1, 217 [SLAVE_IMEM] = &slv_imem, 218 [SLAVE_QDSS_STM] = &slv_qdss_stm, 219 [SLAVE_SRVC_SNOC] = &slv_srvc_snoc, 220 [SNOC_BIMC_0_MAS] = &snoc_bimc_0_mas, 221 [SNOC_BIMC_1_MAS] = &snoc_bimc_1_mas, 222 [SNOC_BIMC_2_MAS] = &snoc_bimc_2_mas, 223 [SNOC_INT_0] = &snoc_int_0, 224 [SNOC_INT_1] = &snoc_int_1, 225 [SNOC_INT_BIMC] = &snoc_int_bimc, 226 [SNOC_PCNOC_MAS] = &snoc_pcnoc_mas, 227 [SNOC_QDSS_INT] = &qdss_int, 228 }; 229 230 static struct qcom_icc_desc msm8939_snoc = { 231 .nodes = msm8939_snoc_nodes, 232 .num_nodes = ARRAY_SIZE(msm8939_snoc_nodes), 233 }; 234 235 static struct qcom_icc_node *msm8939_snoc_mm_nodes[] = { 236 [MASTER_VIDEO_P0] = &mas_video, 237 [MASTER_JPEG] = &mas_jpeg, 238 [MASTER_VFE] = &mas_vfe, 239 [MASTER_MDP_PORT0] = &mas_mdp0, 240 [MASTER_MDP_PORT1] = &mas_mdp1, 241 [MASTER_CPP] = &mas_cpp, 242 [SNOC_MM_INT_0] = &mm_int_0, 243 [SNOC_MM_INT_1] = &mm_int_1, 244 [SNOC_MM_INT_2] = &mm_int_2, 245 }; 246 247 static struct qcom_icc_desc msm8939_snoc_mm = { 248 .nodes = msm8939_snoc_mm_nodes, 249 .num_nodes = ARRAY_SIZE(msm8939_snoc_mm_nodes), 250 }; 251 252 static struct qcom_icc_node *msm8939_bimc_nodes[] = { 253 [BIMC_SNOC_MAS] = &bimc_snoc_mas, 254 [MASTER_AMPSS_M0] = &mas_apss, 255 [MASTER_GRAPHICS_3D] = &mas_gfx, 256 [MASTER_TCU0] = &mas_tcu0, 257 [SLAVE_AMPSS_L2] = &slv_apps_l2, 258 [SLAVE_EBI_CH0] = &slv_ebi_ch0, 259 [SNOC_BIMC_0_SLV] = &snoc_bimc_0_slv, 260 [SNOC_BIMC_1_SLV] = &snoc_bimc_1_slv, 261 [SNOC_BIMC_2_SLV] = &snoc_bimc_2_slv, 262 }; 263 264 static struct qcom_icc_desc msm8939_bimc = { 265 .nodes = msm8939_bimc_nodes, 266 .num_nodes = ARRAY_SIZE(msm8939_bimc_nodes), 267 }; 268 269 static struct qcom_icc_node *msm8939_pcnoc_nodes[] = { 270 [MASTER_BLSP_1] = &mas_blsp_1, 271 [MASTER_DEHR] = &mas_dehr, 272 [MASTER_LPASS] = &mas_audio, 273 [MASTER_CRYPTO_CORE0] = &mas_pcnoc_crypto_0, 274 [MASTER_SDCC_1] = &mas_pcnoc_sdcc_1, 275 [MASTER_SDCC_2] = &mas_pcnoc_sdcc_2, 276 [MASTER_SPDM] = &mas_spdm, 277 [MASTER_USB_HS1] = &mas_usb_hs1, 278 [MASTER_USB_HS2] = &mas_usb_hs2, 279 [PCNOC_INT_0] = &pcnoc_int_0, 280 [PCNOC_INT_1] = &pcnoc_int_1, 281 [PCNOC_MAS_0] = &pcnoc_m_0, 282 [PCNOC_MAS_1] = &pcnoc_m_1, 283 [PCNOC_SLV_0] = &pcnoc_s_0, 284 [PCNOC_SLV_1] = &pcnoc_s_1, 285 [PCNOC_SLV_2] = &pcnoc_s_2, 286 [PCNOC_SLV_3] = &pcnoc_s_3, 287 [PCNOC_SLV_4] = &pcnoc_s_4, 288 [PCNOC_SLV_8] = &pcnoc_s_8, 289 [PCNOC_SLV_9] = &pcnoc_s_9, 290 [PCNOC_SNOC_MAS] = &pcnoc_snoc_mas, 291 [SLAVE_BIMC_CFG] = &slv_bimc_cfg, 292 [SLAVE_BLSP_1] = &slv_blsp_1, 293 [SLAVE_BOOT_ROM] = &slv_boot_rom, 294 [SLAVE_CAMERA_CFG] = &slv_camera_cfg, 295 [SLAVE_CLK_CTL] = &slv_clk_ctl, 296 [SLAVE_CRYPTO_0_CFG] = &slv_crypto_0_cfg, 297 [SLAVE_DEHR_CFG] = &slv_dehr_cfg, 298 [SLAVE_DISPLAY_CFG] = &slv_display_cfg, 299 [SLAVE_GRAPHICS_3D_CFG] = &slv_gfx_cfg, 300 [SLAVE_IMEM_CFG] = &slv_imem_cfg, 301 [SLAVE_LPASS] = &slv_audio, 302 [SLAVE_MPM] = &slv_mpm, 303 [SLAVE_MSG_RAM] = &slv_msg_ram, 304 [SLAVE_MSS] = &slv_mss, 305 [SLAVE_PDM] = &slv_pdm, 306 [SLAVE_PMIC_ARB] = &slv_pmic_arb, 307 [SLAVE_PCNOC_CFG] = &slv_pcnoc_cfg, 308 [SLAVE_PRNG] = &slv_prng, 309 [SLAVE_QDSS_CFG] = &slv_qdss_cfg, 310 [SLAVE_RBCPR_CFG] = &slv_rbcpr_cfg, 311 [SLAVE_SDCC_1] = &slv_sdcc_1, 312 [SLAVE_SDCC_2] = &slv_sdcc_2, 313 [SLAVE_SECURITY] = &slv_security, 314 [SLAVE_SNOC_CFG] = &slv_snoc_cfg, 315 [SLAVE_SPDM] = &slv_spdm, 316 [SLAVE_TCSR] = &slv_tcsr, 317 [SLAVE_TLMM] = &slv_tlmm, 318 [SLAVE_USB_HS1] = &slv_usb_hs1, 319 [SLAVE_USB_HS2] = &slv_usb_hs2, 320 [SLAVE_VENUS_CFG] = &slv_venus_cfg, 321 [SNOC_PCNOC_SLV] = &snoc_pcnoc_slv, 322 }; 323 324 static struct qcom_icc_desc msm8939_pcnoc = { 325 .nodes = msm8939_pcnoc_nodes, 326 .num_nodes = ARRAY_SIZE(msm8939_pcnoc_nodes), 327 }; 328 329 static int msm8939_qnoc_probe(struct platform_device *pdev) 330 { 331 return qnoc_probe(pdev, sizeof(msm8939_bus_clocks), 332 ARRAY_SIZE(msm8939_bus_clocks), msm8939_bus_clocks); 333 } 334 335 static const struct of_device_id msm8939_noc_of_match[] = { 336 { .compatible = "qcom,msm8939-bimc", .data = &msm8939_bimc }, 337 { .compatible = "qcom,msm8939-pcnoc", .data = &msm8939_pcnoc }, 338 { .compatible = "qcom,msm8939-snoc", .data = &msm8939_snoc }, 339 { .compatible = "qcom,msm8939-snoc-mm", .data = &msm8939_snoc_mm }, 340 { } 341 }; 342 MODULE_DEVICE_TABLE(of, msm8939_noc_of_match); 343 344 static struct platform_driver msm8939_noc_driver = { 345 .probe = msm8939_qnoc_probe, 346 .remove = qnoc_remove, 347 .driver = { 348 .name = "qnoc-msm8939", 349 .of_match_table = msm8939_noc_of_match, 350 }, 351 }; 352 module_platform_driver(msm8939_noc_driver); 353 MODULE_AUTHOR("Jun Nie <jun.nie@linaro.org>"); 354 MODULE_DESCRIPTION("Qualcomm MSM8939 NoC driver"); 355 MODULE_LICENSE("GPL v2"); 356