162feb14eSJun Nie /* SPDX-License-Identifier: GPL-2.0 */ 262feb14eSJun Nie /* 362feb14eSJun Nie * Copyright (C) 2020 Linaro Ltd 462feb14eSJun Nie */ 562feb14eSJun Nie 662feb14eSJun Nie #ifndef __DRIVERS_INTERCONNECT_QCOM_ICC_RPM_H 762feb14eSJun Nie #define __DRIVERS_INTERCONNECT_QCOM_ICC_RPM_H 862feb14eSJun Nie 962feb14eSJun Nie #define RPM_BUS_MASTER_REQ 0x73616d62 1062feb14eSJun Nie #define RPM_BUS_SLAVE_REQ 0x766c7362 1162feb14eSJun Nie 1262feb14eSJun Nie #define to_qcom_provider(_provider) \ 1362feb14eSJun Nie container_of(_provider, struct qcom_icc_provider, provider) 1462feb14eSJun Nie 15*e9d54c26SShawn Guo enum qcom_icc_type { 16*e9d54c26SShawn Guo QCOM_ICC_NOC, 17*e9d54c26SShawn Guo QCOM_ICC_BIMC, 18*e9d54c26SShawn Guo }; 19*e9d54c26SShawn Guo 2062feb14eSJun Nie /** 2162feb14eSJun Nie * struct qcom_icc_provider - Qualcomm specific interconnect provider 2262feb14eSJun Nie * @provider: generic interconnect provider 2362feb14eSJun Nie * @bus_clks: the clk_bulk_data table of bus clocks 2462feb14eSJun Nie * @num_clks: the total number of clk_bulk_data entries 25*e9d54c26SShawn Guo * @type: the ICC provider type 260788f4d5SDmitry Baryshkov * @qos_offset: offset to QoS registers 272b6c7d64SDmitry Baryshkov * @regmap: regmap for QoS registers read/write access 2862feb14eSJun Nie */ 2962feb14eSJun Nie struct qcom_icc_provider { 3062feb14eSJun Nie struct icc_provider provider; 3162feb14eSJun Nie int num_clks; 32*e9d54c26SShawn Guo enum qcom_icc_type type; 332b6c7d64SDmitry Baryshkov struct regmap *regmap; 340788f4d5SDmitry Baryshkov unsigned int qos_offset; 3563e8ab61SDmitry Baryshkov struct clk_bulk_data bus_clks[]; 3662feb14eSJun Nie }; 3762feb14eSJun Nie 3862feb14eSJun Nie /** 392b6c7d64SDmitry Baryshkov * struct qcom_icc_qos - Qualcomm specific interconnect QoS parameters 402b6c7d64SDmitry Baryshkov * @areq_prio: node requests priority 412b6c7d64SDmitry Baryshkov * @prio_level: priority level for bus communication 422b6c7d64SDmitry Baryshkov * @limit_commands: activate/deactivate limiter mode during runtime 432b6c7d64SDmitry Baryshkov * @ap_owned: indicates if the node is owned by the AP or by the RPM 442b6c7d64SDmitry Baryshkov * @qos_mode: default qos mode for this node 452b6c7d64SDmitry Baryshkov * @qos_port: qos port number for finding qos registers of this node 462b6c7d64SDmitry Baryshkov */ 472b6c7d64SDmitry Baryshkov struct qcom_icc_qos { 482b6c7d64SDmitry Baryshkov u32 areq_prio; 492b6c7d64SDmitry Baryshkov u32 prio_level; 502b6c7d64SDmitry Baryshkov bool limit_commands; 512b6c7d64SDmitry Baryshkov bool ap_owned; 522b6c7d64SDmitry Baryshkov int qos_mode; 532b6c7d64SDmitry Baryshkov int qos_port; 542b6c7d64SDmitry Baryshkov }; 552b6c7d64SDmitry Baryshkov 562b6c7d64SDmitry Baryshkov /** 5762feb14eSJun Nie * struct qcom_icc_node - Qualcomm specific interconnect nodes 5862feb14eSJun Nie * @name: the node name used in debugfs 5962feb14eSJun Nie * @id: a unique node identifier 6062feb14eSJun Nie * @links: an array of nodes where we can go next while traversing 6162feb14eSJun Nie * @num_links: the total number of @links 6262feb14eSJun Nie * @buswidth: width of the interconnect between a node and the bus (bytes) 6362feb14eSJun Nie * @mas_rpm_id: RPM id for devices that are bus masters 6462feb14eSJun Nie * @slv_rpm_id: RPM id for devices that are bus slaves 652b6c7d64SDmitry Baryshkov * @qos: NoC QoS setting parameters 6662feb14eSJun Nie * @rate: current bus clock rate in Hz 6762feb14eSJun Nie */ 6862feb14eSJun Nie struct qcom_icc_node { 6962feb14eSJun Nie unsigned char *name; 7062feb14eSJun Nie u16 id; 712b6c7d64SDmitry Baryshkov const u16 *links; 7262feb14eSJun Nie u16 num_links; 7362feb14eSJun Nie u16 buswidth; 7462feb14eSJun Nie int mas_rpm_id; 7562feb14eSJun Nie int slv_rpm_id; 762b6c7d64SDmitry Baryshkov struct qcom_icc_qos qos; 7762feb14eSJun Nie u64 rate; 7862feb14eSJun Nie }; 7962feb14eSJun Nie 8062feb14eSJun Nie struct qcom_icc_desc { 8162feb14eSJun Nie struct qcom_icc_node **nodes; 8262feb14eSJun Nie size_t num_nodes; 832b6c7d64SDmitry Baryshkov const char * const *clocks; 842b6c7d64SDmitry Baryshkov size_t num_clocks; 857de109c0SYassine Oudjana bool has_bus_pd; 86*e9d54c26SShawn Guo enum qcom_icc_type type; 872b6c7d64SDmitry Baryshkov const struct regmap_config *regmap_cfg; 880788f4d5SDmitry Baryshkov unsigned int qos_offset; 8962feb14eSJun Nie }; 9062feb14eSJun Nie 912b6c7d64SDmitry Baryshkov /* Valid for both NoC and BIMC */ 922b6c7d64SDmitry Baryshkov #define NOC_QOS_MODE_INVALID -1 932b6c7d64SDmitry Baryshkov #define NOC_QOS_MODE_FIXED 0x0 942b6c7d64SDmitry Baryshkov #define NOC_QOS_MODE_BYPASS 0x2 9562feb14eSJun Nie 9663e8ab61SDmitry Baryshkov int qnoc_probe(struct platform_device *pdev); 9762feb14eSJun Nie int qnoc_remove(struct platform_device *pdev); 9862feb14eSJun Nie 9962feb14eSJun Nie #endif 100