162feb14eSJun Nie /* SPDX-License-Identifier: GPL-2.0 */ 262feb14eSJun Nie /* 362feb14eSJun Nie * Copyright (C) 2020 Linaro Ltd 462feb14eSJun Nie */ 562feb14eSJun Nie 662feb14eSJun Nie #ifndef __DRIVERS_INTERCONNECT_QCOM_ICC_RPM_H 762feb14eSJun Nie #define __DRIVERS_INTERCONNECT_QCOM_ICC_RPM_H 862feb14eSJun Nie 9dcbce7b0SLeo Yan #include <dt-bindings/interconnect/qcom,icc.h> 10dcbce7b0SLeo Yan 1162feb14eSJun Nie #define RPM_BUS_MASTER_REQ 0x73616d62 1262feb14eSJun Nie #define RPM_BUS_SLAVE_REQ 0x766c7362 1362feb14eSJun Nie 1462feb14eSJun Nie #define to_qcom_provider(_provider) \ 1562feb14eSJun Nie container_of(_provider, struct qcom_icc_provider, provider) 1662feb14eSJun Nie 17e9d54c26SShawn Guo enum qcom_icc_type { 18e9d54c26SShawn Guo QCOM_ICC_NOC, 19e9d54c26SShawn Guo QCOM_ICC_BIMC, 2008c59040SShawn Guo QCOM_ICC_QNOC, 21e9d54c26SShawn Guo }; 22e9d54c26SShawn Guo 232e2113c8SKonrad Dybcio #define NUM_BUS_CLKS 2 242e2113c8SKonrad Dybcio 2562feb14eSJun Nie /** 2662feb14eSJun Nie * struct qcom_icc_provider - Qualcomm specific interconnect provider 2762feb14eSJun Nie * @provider: generic interconnect provider 28a867cf9bSKonrad Dybcio * @num_bus_clks: the total number of bus_clks clk_bulk_data entries (0 or 2) 292e2113c8SKonrad Dybcio * @num_intf_clks: the total number of intf_clks clk_bulk_data entries 30e9d54c26SShawn Guo * @type: the ICC provider type 312b6c7d64SDmitry Baryshkov * @regmap: regmap for QoS registers read/write access 3282a4b285SKonrad Dybcio * @qos_offset: offset to QoS registers 3365fac3b3SLeo Yan * @bus_clk_rate: bus clock rate in Hz 3482a4b285SKonrad Dybcio * @bus_clks: the clk_bulk_data table of bus clocks 352e2113c8SKonrad Dybcio * @intf_clks: a clk_bulk_data array of interface clocks 36*b979049cSKonrad Dybcio * @keep_alive: whether to always keep a minimum vote on the bus clocks 372e2113c8SKonrad Dybcio * @is_on: whether the bus is powered on 3862feb14eSJun Nie */ 3962feb14eSJun Nie struct qcom_icc_provider { 4062feb14eSJun Nie struct icc_provider provider; 411a12928eSKonrad Dybcio int num_bus_clks; 422e2113c8SKonrad Dybcio int num_intf_clks; 43e9d54c26SShawn Guo enum qcom_icc_type type; 442b6c7d64SDmitry Baryshkov struct regmap *regmap; 450788f4d5SDmitry Baryshkov unsigned int qos_offset; 462e2113c8SKonrad Dybcio u64 bus_clk_rate[NUM_BUS_CLKS]; 472e2113c8SKonrad Dybcio struct clk_bulk_data bus_clks[NUM_BUS_CLKS]; 482e2113c8SKonrad Dybcio struct clk_bulk_data *intf_clks; 49*b979049cSKonrad Dybcio bool keep_alive; 502e2113c8SKonrad Dybcio bool is_on; 5162feb14eSJun Nie }; 5262feb14eSJun Nie 5362feb14eSJun Nie /** 542b6c7d64SDmitry Baryshkov * struct qcom_icc_qos - Qualcomm specific interconnect QoS parameters 552b6c7d64SDmitry Baryshkov * @areq_prio: node requests priority 562b6c7d64SDmitry Baryshkov * @prio_level: priority level for bus communication 572b6c7d64SDmitry Baryshkov * @limit_commands: activate/deactivate limiter mode during runtime 582b6c7d64SDmitry Baryshkov * @ap_owned: indicates if the node is owned by the AP or by the RPM 592b6c7d64SDmitry Baryshkov * @qos_mode: default qos mode for this node 602b6c7d64SDmitry Baryshkov * @qos_port: qos port number for finding qos registers of this node 6108c59040SShawn Guo * @urg_fwd_en: enable urgent forwarding 622b6c7d64SDmitry Baryshkov */ 632b6c7d64SDmitry Baryshkov struct qcom_icc_qos { 642b6c7d64SDmitry Baryshkov u32 areq_prio; 652b6c7d64SDmitry Baryshkov u32 prio_level; 662b6c7d64SDmitry Baryshkov bool limit_commands; 672b6c7d64SDmitry Baryshkov bool ap_owned; 682b6c7d64SDmitry Baryshkov int qos_mode; 692b6c7d64SDmitry Baryshkov int qos_port; 7008c59040SShawn Guo bool urg_fwd_en; 712b6c7d64SDmitry Baryshkov }; 722b6c7d64SDmitry Baryshkov 732b6c7d64SDmitry Baryshkov /** 7462feb14eSJun Nie * struct qcom_icc_node - Qualcomm specific interconnect nodes 7562feb14eSJun Nie * @name: the node name used in debugfs 7662feb14eSJun Nie * @id: a unique node identifier 7762feb14eSJun Nie * @links: an array of nodes where we can go next while traversing 7862feb14eSJun Nie * @num_links: the total number of @links 7902819953SKonrad Dybcio * @channels: number of channels at this node (e.g. DDR channels) 8062feb14eSJun Nie * @buswidth: width of the interconnect between a node and the bus (bytes) 81dcbce7b0SLeo Yan * @sum_avg: current sum aggregate value of all avg bw requests 82dcbce7b0SLeo Yan * @max_peak: current max aggregate value of all peak bw requests 8362feb14eSJun Nie * @mas_rpm_id: RPM id for devices that are bus masters 8462feb14eSJun Nie * @slv_rpm_id: RPM id for devices that are bus slaves 852b6c7d64SDmitry Baryshkov * @qos: NoC QoS setting parameters 8662feb14eSJun Nie */ 8762feb14eSJun Nie struct qcom_icc_node { 8862feb14eSJun Nie unsigned char *name; 8962feb14eSJun Nie u16 id; 902b6c7d64SDmitry Baryshkov const u16 *links; 9162feb14eSJun Nie u16 num_links; 9202819953SKonrad Dybcio u16 channels; 9362feb14eSJun Nie u16 buswidth; 94dcbce7b0SLeo Yan u64 sum_avg[QCOM_ICC_NUM_BUCKETS]; 95dcbce7b0SLeo Yan u64 max_peak[QCOM_ICC_NUM_BUCKETS]; 9662feb14eSJun Nie int mas_rpm_id; 9762feb14eSJun Nie int slv_rpm_id; 982b6c7d64SDmitry Baryshkov struct qcom_icc_qos qos; 9962feb14eSJun Nie }; 10062feb14eSJun Nie 10162feb14eSJun Nie struct qcom_icc_desc { 1022ccf33c0SKrzysztof Kozlowski struct qcom_icc_node * const *nodes; 10362feb14eSJun Nie size_t num_nodes; 1046643b532SKonrad Dybcio const char * const *bus_clocks; 1052e2113c8SKonrad Dybcio const char * const *intf_clocks; 1062e2113c8SKonrad Dybcio size_t num_intf_clocks; 107*b979049cSKonrad Dybcio bool keep_alive; 108a867cf9bSKonrad Dybcio bool no_clk_scaling; 109e9d54c26SShawn Guo enum qcom_icc_type type; 1102b6c7d64SDmitry Baryshkov const struct regmap_config *regmap_cfg; 1110788f4d5SDmitry Baryshkov unsigned int qos_offset; 11262feb14eSJun Nie }; 11362feb14eSJun Nie 1141d779317SKonrad Dybcio /* Valid for all bus types */ 1151d779317SKonrad Dybcio enum qos_mode { 1161d779317SKonrad Dybcio NOC_QOS_MODE_INVALID = 0, 1171d779317SKonrad Dybcio NOC_QOS_MODE_FIXED, 1181d779317SKonrad Dybcio NOC_QOS_MODE_BYPASS, 1191d779317SKonrad Dybcio }; 12062feb14eSJun Nie 12163e8ab61SDmitry Baryshkov int qnoc_probe(struct platform_device *pdev); 12262feb14eSJun Nie int qnoc_remove(struct platform_device *pdev); 12362feb14eSJun Nie 12462feb14eSJun Nie #endif 125