162feb14eSJun Nie /* SPDX-License-Identifier: GPL-2.0 */ 262feb14eSJun Nie /* 362feb14eSJun Nie * Copyright (C) 2020 Linaro Ltd 462feb14eSJun Nie */ 562feb14eSJun Nie 662feb14eSJun Nie #ifndef __DRIVERS_INTERCONNECT_QCOM_ICC_RPM_H 762feb14eSJun Nie #define __DRIVERS_INTERCONNECT_QCOM_ICC_RPM_H 862feb14eSJun Nie 9*19ced2aeSKonrad Dybcio #include <linux/soc/qcom/smd-rpm.h> 10*19ced2aeSKonrad Dybcio 11dcbce7b0SLeo Yan #include <dt-bindings/interconnect/qcom,icc.h> 1240cdeed6SKonrad Dybcio #include <linux/clk.h> 1340cdeed6SKonrad Dybcio #include <linux/interconnect-provider.h> 1440cdeed6SKonrad Dybcio #include <linux/platform_device.h> 15dcbce7b0SLeo Yan 1662feb14eSJun Nie #define RPM_BUS_MASTER_REQ 0x73616d62 1762feb14eSJun Nie #define RPM_BUS_SLAVE_REQ 0x766c7362 1862feb14eSJun Nie 1962feb14eSJun Nie #define to_qcom_provider(_provider) \ 2062feb14eSJun Nie container_of(_provider, struct qcom_icc_provider, provider) 2162feb14eSJun Nie 22e9d54c26SShawn Guo enum qcom_icc_type { 23e9d54c26SShawn Guo QCOM_ICC_NOC, 24e9d54c26SShawn Guo QCOM_ICC_BIMC, 2508c59040SShawn Guo QCOM_ICC_QNOC, 26e9d54c26SShawn Guo }; 27e9d54c26SShawn Guo 282e2113c8SKonrad Dybcio #define NUM_BUS_CLKS 2 292e2113c8SKonrad Dybcio 3062feb14eSJun Nie /** 3162feb14eSJun Nie * struct qcom_icc_provider - Qualcomm specific interconnect provider 3262feb14eSJun Nie * @provider: generic interconnect provider 33a867cf9bSKonrad Dybcio * @num_bus_clks: the total number of bus_clks clk_bulk_data entries (0 or 2) 342e2113c8SKonrad Dybcio * @num_intf_clks: the total number of intf_clks clk_bulk_data entries 35e9d54c26SShawn Guo * @type: the ICC provider type 362b6c7d64SDmitry Baryshkov * @regmap: regmap for QoS registers read/write access 3782a4b285SKonrad Dybcio * @qos_offset: offset to QoS registers 3865fac3b3SLeo Yan * @bus_clk_rate: bus clock rate in Hz 3982a4b285SKonrad Dybcio * @bus_clks: the clk_bulk_data table of bus clocks 402e2113c8SKonrad Dybcio * @intf_clks: a clk_bulk_data array of interface clocks 41b979049cSKonrad Dybcio * @keep_alive: whether to always keep a minimum vote on the bus clocks 422e2113c8SKonrad Dybcio * @is_on: whether the bus is powered on 4362feb14eSJun Nie */ 4462feb14eSJun Nie struct qcom_icc_provider { 4562feb14eSJun Nie struct icc_provider provider; 461a12928eSKonrad Dybcio int num_bus_clks; 472e2113c8SKonrad Dybcio int num_intf_clks; 48e9d54c26SShawn Guo enum qcom_icc_type type; 492b6c7d64SDmitry Baryshkov struct regmap *regmap; 500788f4d5SDmitry Baryshkov unsigned int qos_offset; 512e2113c8SKonrad Dybcio u64 bus_clk_rate[NUM_BUS_CLKS]; 522e2113c8SKonrad Dybcio struct clk_bulk_data bus_clks[NUM_BUS_CLKS]; 532e2113c8SKonrad Dybcio struct clk_bulk_data *intf_clks; 54b979049cSKonrad Dybcio bool keep_alive; 552e2113c8SKonrad Dybcio bool is_on; 5662feb14eSJun Nie }; 5762feb14eSJun Nie 5862feb14eSJun Nie /** 592b6c7d64SDmitry Baryshkov * struct qcom_icc_qos - Qualcomm specific interconnect QoS parameters 602b6c7d64SDmitry Baryshkov * @areq_prio: node requests priority 612b6c7d64SDmitry Baryshkov * @prio_level: priority level for bus communication 622b6c7d64SDmitry Baryshkov * @limit_commands: activate/deactivate limiter mode during runtime 632b6c7d64SDmitry Baryshkov * @ap_owned: indicates if the node is owned by the AP or by the RPM 642b6c7d64SDmitry Baryshkov * @qos_mode: default qos mode for this node 652b6c7d64SDmitry Baryshkov * @qos_port: qos port number for finding qos registers of this node 6608c59040SShawn Guo * @urg_fwd_en: enable urgent forwarding 672b6c7d64SDmitry Baryshkov */ 682b6c7d64SDmitry Baryshkov struct qcom_icc_qos { 692b6c7d64SDmitry Baryshkov u32 areq_prio; 702b6c7d64SDmitry Baryshkov u32 prio_level; 712b6c7d64SDmitry Baryshkov bool limit_commands; 722b6c7d64SDmitry Baryshkov bool ap_owned; 732b6c7d64SDmitry Baryshkov int qos_mode; 742b6c7d64SDmitry Baryshkov int qos_port; 7508c59040SShawn Guo bool urg_fwd_en; 762b6c7d64SDmitry Baryshkov }; 772b6c7d64SDmitry Baryshkov 782b6c7d64SDmitry Baryshkov /** 7962feb14eSJun Nie * struct qcom_icc_node - Qualcomm specific interconnect nodes 8062feb14eSJun Nie * @name: the node name used in debugfs 8162feb14eSJun Nie * @id: a unique node identifier 8262feb14eSJun Nie * @links: an array of nodes where we can go next while traversing 8362feb14eSJun Nie * @num_links: the total number of @links 8402819953SKonrad Dybcio * @channels: number of channels at this node (e.g. DDR channels) 8562feb14eSJun Nie * @buswidth: width of the interconnect between a node and the bus (bytes) 86dcbce7b0SLeo Yan * @sum_avg: current sum aggregate value of all avg bw requests 87dcbce7b0SLeo Yan * @max_peak: current max aggregate value of all peak bw requests 8862feb14eSJun Nie * @mas_rpm_id: RPM id for devices that are bus masters 8962feb14eSJun Nie * @slv_rpm_id: RPM id for devices that are bus slaves 902b6c7d64SDmitry Baryshkov * @qos: NoC QoS setting parameters 9162feb14eSJun Nie */ 9262feb14eSJun Nie struct qcom_icc_node { 9362feb14eSJun Nie unsigned char *name; 9462feb14eSJun Nie u16 id; 952b6c7d64SDmitry Baryshkov const u16 *links; 9662feb14eSJun Nie u16 num_links; 9702819953SKonrad Dybcio u16 channels; 9862feb14eSJun Nie u16 buswidth; 99dcbce7b0SLeo Yan u64 sum_avg[QCOM_ICC_NUM_BUCKETS]; 100dcbce7b0SLeo Yan u64 max_peak[QCOM_ICC_NUM_BUCKETS]; 10162feb14eSJun Nie int mas_rpm_id; 10262feb14eSJun Nie int slv_rpm_id; 1032b6c7d64SDmitry Baryshkov struct qcom_icc_qos qos; 10462feb14eSJun Nie }; 10562feb14eSJun Nie 10662feb14eSJun Nie struct qcom_icc_desc { 1072ccf33c0SKrzysztof Kozlowski struct qcom_icc_node * const *nodes; 10862feb14eSJun Nie size_t num_nodes; 1096643b532SKonrad Dybcio const char * const *bus_clocks; 1102e2113c8SKonrad Dybcio const char * const *intf_clocks; 1112e2113c8SKonrad Dybcio size_t num_intf_clocks; 112b979049cSKonrad Dybcio bool keep_alive; 113a867cf9bSKonrad Dybcio bool no_clk_scaling; 114e9d54c26SShawn Guo enum qcom_icc_type type; 1152b6c7d64SDmitry Baryshkov const struct regmap_config *regmap_cfg; 1160788f4d5SDmitry Baryshkov unsigned int qos_offset; 11762feb14eSJun Nie }; 11862feb14eSJun Nie 1191d779317SKonrad Dybcio /* Valid for all bus types */ 1201d779317SKonrad Dybcio enum qos_mode { 1211d779317SKonrad Dybcio NOC_QOS_MODE_INVALID = 0, 1221d779317SKonrad Dybcio NOC_QOS_MODE_FIXED, 1231d779317SKonrad Dybcio NOC_QOS_MODE_BYPASS, 1241d779317SKonrad Dybcio }; 12562feb14eSJun Nie 12663e8ab61SDmitry Baryshkov int qnoc_probe(struct platform_device *pdev); 12762feb14eSJun Nie int qnoc_remove(struct platform_device *pdev); 12862feb14eSJun Nie 129*19ced2aeSKonrad Dybcio bool qcom_icc_rpm_smd_available(void); 130*19ced2aeSKonrad Dybcio int qcom_icc_rpm_smd_send(int ctx, int rsc_type, int id, u32 val); 131*19ced2aeSKonrad Dybcio 13262feb14eSJun Nie #endif 133