1c942fddfSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later
26decea7cSHans de Goede /*
36decea7cSHans de Goede  * Allwinner sunxi resistive touchscreen controller driver
46decea7cSHans de Goede  *
56decea7cSHans de Goede  * Copyright (C) 2013 - 2014 Hans de Goede <hdegoede@redhat.com>
66decea7cSHans de Goede  *
7f09f98d3SHans de Goede  * The hwmon parts are based on work by Corentin LABBE which is:
8f09f98d3SHans de Goede  * Copyright (C) 2013 Corentin LABBE <clabbe.montjoie@gmail.com>
96decea7cSHans de Goede  */
106decea7cSHans de Goede 
116decea7cSHans de Goede /*
126decea7cSHans de Goede  * The sun4i-ts controller is capable of detecting a second touch, but when a
136decea7cSHans de Goede  * second touch is present then the accuracy becomes so bad the reported touch
146decea7cSHans de Goede  * location is not useable.
156decea7cSHans de Goede  *
166decea7cSHans de Goede  * The original android driver contains some complicated heuristics using the
176decea7cSHans de Goede  * aprox. distance between the 2 touches to see if the user is making a pinch
186decea7cSHans de Goede  * open / close movement, and then reports emulated multi-touch events around
196decea7cSHans de Goede  * the last touch coordinate (as the dual-touch coordinates are worthless).
206decea7cSHans de Goede  *
216decea7cSHans de Goede  * These kinds of heuristics are just asking for trouble (and don't belong
226decea7cSHans de Goede  * in the kernel). So this driver offers straight forward, reliable single
236decea7cSHans de Goede  * touch functionality only.
244ed0e032SJens Thiele  *
25*173cb655SJonathan Corbet  * s.a. A20 User Manual "1.15 TP" (Documentation/arch/arm/sunxi.rst)
264ed0e032SJens Thiele  * (looks like the description in the A20 User Manual v1.3 is better
274ed0e032SJens Thiele  * than the one in the A10 User Manual v.1.5)
286decea7cSHans de Goede  */
296decea7cSHans de Goede 
306decea7cSHans de Goede #include <linux/err.h>
31f09f98d3SHans de Goede #include <linux/hwmon.h>
3222369710SChen-Yu Tsai #include <linux/thermal.h>
336decea7cSHans de Goede #include <linux/init.h>
346decea7cSHans de Goede #include <linux/input.h>
356decea7cSHans de Goede #include <linux/interrupt.h>
366decea7cSHans de Goede #include <linux/io.h>
376decea7cSHans de Goede #include <linux/module.h>
386decea7cSHans de Goede #include <linux/of_platform.h>
396decea7cSHans de Goede #include <linux/platform_device.h>
406decea7cSHans de Goede #include <linux/slab.h>
416decea7cSHans de Goede 
426decea7cSHans de Goede #define TP_CTRL0		0x00
436decea7cSHans de Goede #define TP_CTRL1		0x04
446decea7cSHans de Goede #define TP_CTRL2		0x08
456decea7cSHans de Goede #define TP_CTRL3		0x0c
466decea7cSHans de Goede #define TP_INT_FIFOC		0x10
476decea7cSHans de Goede #define TP_INT_FIFOS		0x14
486decea7cSHans de Goede #define TP_TPR			0x18
496decea7cSHans de Goede #define TP_CDAT			0x1c
506decea7cSHans de Goede #define TEMP_DATA		0x20
516decea7cSHans de Goede #define TP_DATA			0x24
526decea7cSHans de Goede 
536decea7cSHans de Goede /* TP_CTRL0 bits */
546decea7cSHans de Goede #define ADC_FIRST_DLY(x)	((x) << 24) /* 8 bits */
556decea7cSHans de Goede #define ADC_FIRST_DLY_MODE(x)	((x) << 23)
566decea7cSHans de Goede #define ADC_CLK_SEL(x)		((x) << 22)
576decea7cSHans de Goede #define ADC_CLK_DIV(x)		((x) << 20) /* 3 bits */
586decea7cSHans de Goede #define FS_DIV(x)		((x) << 16) /* 4 bits */
596decea7cSHans de Goede #define T_ACQ(x)		((x) << 0) /* 16 bits */
606decea7cSHans de Goede 
616decea7cSHans de Goede /* TP_CTRL1 bits */
626decea7cSHans de Goede #define STYLUS_UP_DEBOUN(x)	((x) << 12) /* 8 bits */
636decea7cSHans de Goede #define STYLUS_UP_DEBOUN_EN(x)	((x) << 9)
646decea7cSHans de Goede #define TOUCH_PAN_CALI_EN(x)	((x) << 6)
656decea7cSHans de Goede #define TP_DUAL_EN(x)		((x) << 5)
666decea7cSHans de Goede #define TP_MODE_EN(x)		((x) << 4)
676decea7cSHans de Goede #define TP_ADC_SELECT(x)	((x) << 3)
686decea7cSHans de Goede #define ADC_CHAN_SELECT(x)	((x) << 0)  /* 3 bits */
696decea7cSHans de Goede 
7043c0e223SChen-Yu Tsai /* on sun6i, bits 3~6 are left shifted by 1 to 4~7 */
7143c0e223SChen-Yu Tsai #define SUN6I_TP_MODE_EN(x)	((x) << 5)
7243c0e223SChen-Yu Tsai 
736decea7cSHans de Goede /* TP_CTRL2 bits */
746decea7cSHans de Goede #define TP_SENSITIVE_ADJUST(x)	((x) << 28) /* 4 bits */
756decea7cSHans de Goede #define TP_MODE_SELECT(x)	((x) << 26) /* 2 bits */
766decea7cSHans de Goede #define PRE_MEA_EN(x)		((x) << 24)
776decea7cSHans de Goede #define PRE_MEA_THRE_CNT(x)	((x) << 0) /* 24 bits */
786decea7cSHans de Goede 
796decea7cSHans de Goede /* TP_CTRL3 bits */
806decea7cSHans de Goede #define FILTER_EN(x)		((x) << 2)
816decea7cSHans de Goede #define FILTER_TYPE(x)		((x) << 0)  /* 2 bits */
826decea7cSHans de Goede 
836decea7cSHans de Goede /* TP_INT_FIFOC irq and fifo mask / control bits */
846decea7cSHans de Goede #define TEMP_IRQ_EN(x)		((x) << 18)
856decea7cSHans de Goede #define OVERRUN_IRQ_EN(x)	((x) << 17)
866decea7cSHans de Goede #define DATA_IRQ_EN(x)		((x) << 16)
876decea7cSHans de Goede #define TP_DATA_XY_CHANGE(x)	((x) << 13)
886decea7cSHans de Goede #define FIFO_TRIG(x)		((x) << 8)  /* 5 bits */
896decea7cSHans de Goede #define DATA_DRQ_EN(x)		((x) << 7)
906decea7cSHans de Goede #define FIFO_FLUSH(x)		((x) << 4)
916decea7cSHans de Goede #define TP_UP_IRQ_EN(x)		((x) << 1)
926decea7cSHans de Goede #define TP_DOWN_IRQ_EN(x)	((x) << 0)
936decea7cSHans de Goede 
946decea7cSHans de Goede /* TP_INT_FIFOS irq and fifo status bits */
956decea7cSHans de Goede #define TEMP_DATA_PENDING	BIT(18)
966decea7cSHans de Goede #define FIFO_OVERRUN_PENDING	BIT(17)
976decea7cSHans de Goede #define FIFO_DATA_PENDING	BIT(16)
986decea7cSHans de Goede #define TP_IDLE_FLG		BIT(2)
996decea7cSHans de Goede #define TP_UP_PENDING		BIT(1)
1006decea7cSHans de Goede #define TP_DOWN_PENDING		BIT(0)
1016decea7cSHans de Goede 
1026decea7cSHans de Goede /* TP_TPR bits */
1036decea7cSHans de Goede #define TEMP_ENABLE(x)		((x) << 16)
1046decea7cSHans de Goede #define TEMP_PERIOD(x)		((x) << 0)  /* t = x * 256 * 16 / clkin */
1056decea7cSHans de Goede 
1066decea7cSHans de Goede struct sun4i_ts_data {
1076decea7cSHans de Goede 	struct device *dev;
1086decea7cSHans de Goede 	struct input_dev *input;
1096decea7cSHans de Goede 	void __iomem *base;
1106decea7cSHans de Goede 	unsigned int irq;
1116decea7cSHans de Goede 	bool ignore_fifo_data;
112f09f98d3SHans de Goede 	int temp_data;
11343c0e223SChen-Yu Tsai 	int temp_offset;
11443c0e223SChen-Yu Tsai 	int temp_step;
1156decea7cSHans de Goede };
1166decea7cSHans de Goede 
sun4i_ts_irq_handle_input(struct sun4i_ts_data * ts,u32 reg_val)117f09f98d3SHans de Goede static void sun4i_ts_irq_handle_input(struct sun4i_ts_data *ts, u32 reg_val)
1186decea7cSHans de Goede {
119f09f98d3SHans de Goede 	u32 x, y;
1206decea7cSHans de Goede 
1216decea7cSHans de Goede 	if (reg_val & FIFO_DATA_PENDING) {
1226decea7cSHans de Goede 		x = readl(ts->base + TP_DATA);
1236decea7cSHans de Goede 		y = readl(ts->base + TP_DATA);
1246decea7cSHans de Goede 		/* The 1st location reported after an up event is unreliable */
1256decea7cSHans de Goede 		if (!ts->ignore_fifo_data) {
1266decea7cSHans de Goede 			input_report_abs(ts->input, ABS_X, x);
1276decea7cSHans de Goede 			input_report_abs(ts->input, ABS_Y, y);
1286decea7cSHans de Goede 			/*
1296decea7cSHans de Goede 			 * The hardware has a separate down status bit, but
1306decea7cSHans de Goede 			 * that gets set before we get the first location,
1316decea7cSHans de Goede 			 * resulting in reporting a click on the old location.
1326decea7cSHans de Goede 			 */
1336decea7cSHans de Goede 			input_report_key(ts->input, BTN_TOUCH, 1);
1346decea7cSHans de Goede 			input_sync(ts->input);
1356decea7cSHans de Goede 		} else {
1366decea7cSHans de Goede 			ts->ignore_fifo_data = false;
1376decea7cSHans de Goede 		}
1386decea7cSHans de Goede 	}
1396decea7cSHans de Goede 
1406decea7cSHans de Goede 	if (reg_val & TP_UP_PENDING) {
1416decea7cSHans de Goede 		ts->ignore_fifo_data = true;
1426decea7cSHans de Goede 		input_report_key(ts->input, BTN_TOUCH, 0);
1436decea7cSHans de Goede 		input_sync(ts->input);
1446decea7cSHans de Goede 	}
145f09f98d3SHans de Goede }
146f09f98d3SHans de Goede 
sun4i_ts_irq(int irq,void * dev_id)147f09f98d3SHans de Goede static irqreturn_t sun4i_ts_irq(int irq, void *dev_id)
148f09f98d3SHans de Goede {
149f09f98d3SHans de Goede 	struct sun4i_ts_data *ts = dev_id;
150f09f98d3SHans de Goede 	u32 reg_val;
151f09f98d3SHans de Goede 
152f09f98d3SHans de Goede 	reg_val  = readl(ts->base + TP_INT_FIFOS);
153f09f98d3SHans de Goede 
154f09f98d3SHans de Goede 	if (reg_val & TEMP_DATA_PENDING)
155f09f98d3SHans de Goede 		ts->temp_data = readl(ts->base + TEMP_DATA);
156f09f98d3SHans de Goede 
157f09f98d3SHans de Goede 	if (ts->input)
158f09f98d3SHans de Goede 		sun4i_ts_irq_handle_input(ts, reg_val);
1596decea7cSHans de Goede 
1606decea7cSHans de Goede 	writel(reg_val, ts->base + TP_INT_FIFOS);
1616decea7cSHans de Goede 
1626decea7cSHans de Goede 	return IRQ_HANDLED;
1636decea7cSHans de Goede }
1646decea7cSHans de Goede 
sun4i_ts_open(struct input_dev * dev)1656decea7cSHans de Goede static int sun4i_ts_open(struct input_dev *dev)
1666decea7cSHans de Goede {
1676decea7cSHans de Goede 	struct sun4i_ts_data *ts = input_get_drvdata(dev);
1686decea7cSHans de Goede 
169f09f98d3SHans de Goede 	/* Flush, set trig level to 1, enable temp, data and up irqs */
170f09f98d3SHans de Goede 	writel(TEMP_IRQ_EN(1) | DATA_IRQ_EN(1) | FIFO_TRIG(1) | FIFO_FLUSH(1) |
171f09f98d3SHans de Goede 		TP_UP_IRQ_EN(1), ts->base + TP_INT_FIFOC);
1726decea7cSHans de Goede 
1736decea7cSHans de Goede 	return 0;
1746decea7cSHans de Goede }
1756decea7cSHans de Goede 
sun4i_ts_close(struct input_dev * dev)1766decea7cSHans de Goede static void sun4i_ts_close(struct input_dev *dev)
1776decea7cSHans de Goede {
1786decea7cSHans de Goede 	struct sun4i_ts_data *ts = input_get_drvdata(dev);
1796decea7cSHans de Goede 
180f09f98d3SHans de Goede 	/* Deactivate all input IRQs */
181f09f98d3SHans de Goede 	writel(TEMP_IRQ_EN(1), ts->base + TP_INT_FIFOC);
1826decea7cSHans de Goede }
1836decea7cSHans de Goede 
sun4i_get_temp(const struct sun4i_ts_data * ts,int * temp)18417e8351aSSascha Hauer static int sun4i_get_temp(const struct sun4i_ts_data *ts, int *temp)
185f09f98d3SHans de Goede {
186f09f98d3SHans de Goede 	/* No temp_data until the first irq */
187f09f98d3SHans de Goede 	if (ts->temp_data == -1)
188f09f98d3SHans de Goede 		return -EAGAIN;
189f09f98d3SHans de Goede 
190877bef7dSHans de Goede 	*temp = ts->temp_data * ts->temp_step - ts->temp_offset;
19122369710SChen-Yu Tsai 
19222369710SChen-Yu Tsai 	return 0;
19322369710SChen-Yu Tsai }
19422369710SChen-Yu Tsai 
sun4i_get_tz_temp(struct thermal_zone_device * tz,int * temp)195ad662b1dSDaniel Lezcano static int sun4i_get_tz_temp(struct thermal_zone_device *tz, int *temp)
19622369710SChen-Yu Tsai {
1973d4e1badSDaniel Lezcano 	return sun4i_get_temp(thermal_zone_device_priv(tz), temp);
19822369710SChen-Yu Tsai }
19922369710SChen-Yu Tsai 
200ad662b1dSDaniel Lezcano static const struct thermal_zone_device_ops sun4i_ts_tz_ops = {
20122369710SChen-Yu Tsai 	.get_temp = sun4i_get_tz_temp,
20222369710SChen-Yu Tsai };
20322369710SChen-Yu Tsai 
show_temp(struct device * dev,struct device_attribute * devattr,char * buf)20422369710SChen-Yu Tsai static ssize_t show_temp(struct device *dev, struct device_attribute *devattr,
20522369710SChen-Yu Tsai 			 char *buf)
20622369710SChen-Yu Tsai {
20722369710SChen-Yu Tsai 	struct sun4i_ts_data *ts = dev_get_drvdata(dev);
20817e8351aSSascha Hauer 	int temp;
20922369710SChen-Yu Tsai 	int error;
21022369710SChen-Yu Tsai 
21122369710SChen-Yu Tsai 	error = sun4i_get_temp(ts, &temp);
21222369710SChen-Yu Tsai 	if (error)
21322369710SChen-Yu Tsai 		return error;
21422369710SChen-Yu Tsai 
21517e8351aSSascha Hauer 	return sprintf(buf, "%d\n", temp);
216f09f98d3SHans de Goede }
217f09f98d3SHans de Goede 
show_temp_label(struct device * dev,struct device_attribute * devattr,char * buf)218f09f98d3SHans de Goede static ssize_t show_temp_label(struct device *dev,
219f09f98d3SHans de Goede 			      struct device_attribute *devattr, char *buf)
220f09f98d3SHans de Goede {
221f09f98d3SHans de Goede 	return sprintf(buf, "SoC temperature\n");
222f09f98d3SHans de Goede }
223f09f98d3SHans de Goede 
224f09f98d3SHans de Goede static DEVICE_ATTR(temp1_input, S_IRUGO, show_temp, NULL);
225f09f98d3SHans de Goede static DEVICE_ATTR(temp1_label, S_IRUGO, show_temp_label, NULL);
226f09f98d3SHans de Goede 
227f09f98d3SHans de Goede static struct attribute *sun4i_ts_attrs[] = {
228f09f98d3SHans de Goede 	&dev_attr_temp1_input.attr,
229f09f98d3SHans de Goede 	&dev_attr_temp1_label.attr,
230f09f98d3SHans de Goede 	NULL
231f09f98d3SHans de Goede };
232f09f98d3SHans de Goede ATTRIBUTE_GROUPS(sun4i_ts);
233f09f98d3SHans de Goede 
sun4i_ts_probe(struct platform_device * pdev)2346decea7cSHans de Goede static int sun4i_ts_probe(struct platform_device *pdev)
2356decea7cSHans de Goede {
2366decea7cSHans de Goede 	struct sun4i_ts_data *ts;
2376decea7cSHans de Goede 	struct device *dev = &pdev->dev;
238f09f98d3SHans de Goede 	struct device_node *np = dev->of_node;
239f09f98d3SHans de Goede 	struct device *hwmon;
24097e24b09SChuhong Yuan 	struct thermal_zone_device *thermal;
2416decea7cSHans de Goede 	int error;
24243c0e223SChen-Yu Tsai 	u32 reg;
243f09f98d3SHans de Goede 	bool ts_attached;
2444ed0e032SJens Thiele 	u32 tp_sensitive_adjust = 15;
2454ed0e032SJens Thiele 	u32 filter_type = 1;
2466decea7cSHans de Goede 
2476decea7cSHans de Goede 	ts = devm_kzalloc(dev, sizeof(struct sun4i_ts_data), GFP_KERNEL);
2486decea7cSHans de Goede 	if (!ts)
2496decea7cSHans de Goede 		return -ENOMEM;
2506decea7cSHans de Goede 
2516decea7cSHans de Goede 	ts->dev = dev;
2526decea7cSHans de Goede 	ts->ignore_fifo_data = true;
253f09f98d3SHans de Goede 	ts->temp_data = -1;
25443c0e223SChen-Yu Tsai 	if (of_device_is_compatible(np, "allwinner,sun6i-a31-ts")) {
255877bef7dSHans de Goede 		/* Allwinner SDK has temperature (C) = (value / 6) - 271 */
256877bef7dSHans de Goede 		ts->temp_offset = 271000;
25743c0e223SChen-Yu Tsai 		ts->temp_step = 167;
25891c68a7cSHans de Goede 	} else if (of_device_is_compatible(np, "allwinner,sun4i-a10-ts")) {
25991c68a7cSHans de Goede 		/*
26091c68a7cSHans de Goede 		 * The A10 temperature sensor has quite a wide spread, these
26191c68a7cSHans de Goede 		 * parameters are based on the averaging of the calibration
26291c68a7cSHans de Goede 		 * results of 4 completely different boards, with a spread of
263877bef7dSHans de Goede 		 * temp_step from 0.096 - 0.170 and temp_offset from 176 - 331.
26491c68a7cSHans de Goede 		 */
265877bef7dSHans de Goede 		ts->temp_offset = 257000;
26691c68a7cSHans de Goede 		ts->temp_step = 133;
26743c0e223SChen-Yu Tsai 	} else {
26843c0e223SChen-Yu Tsai 		/*
26943c0e223SChen-Yu Tsai 		 * The user manuals do not contain the formula for calculating
27043c0e223SChen-Yu Tsai 		 * the temperature. The formula used here is from the AXP209,
27143c0e223SChen-Yu Tsai 		 * which is designed by X-Powers, an affiliate of Allwinner:
27243c0e223SChen-Yu Tsai 		 *
273877bef7dSHans de Goede 		 *     temperature (C) = (value * 0.1) - 144.7
27443c0e223SChen-Yu Tsai 		 *
27543c0e223SChen-Yu Tsai 		 * Allwinner does not have any documentation whatsoever for
27643c0e223SChen-Yu Tsai 		 * this hardware. Moreover, it is claimed that the sensor
27743c0e223SChen-Yu Tsai 		 * is inaccurate and cannot work properly.
27843c0e223SChen-Yu Tsai 		 */
279877bef7dSHans de Goede 		ts->temp_offset = 144700;
28043c0e223SChen-Yu Tsai 		ts->temp_step = 100;
28143c0e223SChen-Yu Tsai 	}
2826decea7cSHans de Goede 
283f09f98d3SHans de Goede 	ts_attached = of_property_read_bool(np, "allwinner,ts-attached");
284f09f98d3SHans de Goede 	if (ts_attached) {
2856decea7cSHans de Goede 		ts->input = devm_input_allocate_device(dev);
2866decea7cSHans de Goede 		if (!ts->input)
2876decea7cSHans de Goede 			return -ENOMEM;
2886decea7cSHans de Goede 
2896decea7cSHans de Goede 		ts->input->name = pdev->name;
2906decea7cSHans de Goede 		ts->input->phys = "sun4i_ts/input0";
2916decea7cSHans de Goede 		ts->input->open = sun4i_ts_open;
2926decea7cSHans de Goede 		ts->input->close = sun4i_ts_close;
2936decea7cSHans de Goede 		ts->input->id.bustype = BUS_HOST;
2946decea7cSHans de Goede 		ts->input->id.vendor = 0x0001;
2956decea7cSHans de Goede 		ts->input->id.product = 0x0001;
2966decea7cSHans de Goede 		ts->input->id.version = 0x0100;
2976decea7cSHans de Goede 		ts->input->evbit[0] =  BIT(EV_SYN) | BIT(EV_KEY) | BIT(EV_ABS);
2986decea7cSHans de Goede 		__set_bit(BTN_TOUCH, ts->input->keybit);
2996decea7cSHans de Goede 		input_set_abs_params(ts->input, ABS_X, 0, 4095, 0, 0);
3006decea7cSHans de Goede 		input_set_abs_params(ts->input, ABS_Y, 0, 4095, 0, 0);
3016decea7cSHans de Goede 		input_set_drvdata(ts->input, ts);
302f09f98d3SHans de Goede 	}
3036decea7cSHans de Goede 
3049601fa8fSMukesh Ojha 	ts->base = devm_platform_ioremap_resource(pdev, 0);
3056decea7cSHans de Goede 	if (IS_ERR(ts->base))
3066decea7cSHans de Goede 		return PTR_ERR(ts->base);
3076decea7cSHans de Goede 
3086decea7cSHans de Goede 	ts->irq = platform_get_irq(pdev, 0);
3096decea7cSHans de Goede 	error = devm_request_irq(dev, ts->irq, sun4i_ts_irq, 0, "sun4i-ts", ts);
3106decea7cSHans de Goede 	if (error)
3116decea7cSHans de Goede 		return error;
3126decea7cSHans de Goede 
3136decea7cSHans de Goede 	/*
3146decea7cSHans de Goede 	 * Select HOSC clk, clkin = clk / 6, adc samplefreq = clkin / 8192,
3156decea7cSHans de Goede 	 * t_acq = clkin / (16 * 64)
3166decea7cSHans de Goede 	 */
3176decea7cSHans de Goede 	writel(ADC_CLK_SEL(0) | ADC_CLK_DIV(2) | FS_DIV(7) | T_ACQ(63),
3186decea7cSHans de Goede 	       ts->base + TP_CTRL0);
3196decea7cSHans de Goede 
3206decea7cSHans de Goede 	/*
3214ed0e032SJens Thiele 	 * tp_sensitive_adjust is an optional property
3226decea7cSHans de Goede 	 * tp_mode = 0 : only x and y coordinates, as we don't use dual touch
3236decea7cSHans de Goede 	 */
3244ed0e032SJens Thiele 	of_property_read_u32(np, "allwinner,tp-sensitive-adjust",
3254ed0e032SJens Thiele 			     &tp_sensitive_adjust);
3264ed0e032SJens Thiele 	writel(TP_SENSITIVE_ADJUST(tp_sensitive_adjust) | TP_MODE_SELECT(0),
3276decea7cSHans de Goede 	       ts->base + TP_CTRL2);
3286decea7cSHans de Goede 
3294ed0e032SJens Thiele 	/*
3304ed0e032SJens Thiele 	 * Enable median and averaging filter, optional property for
3314ed0e032SJens Thiele 	 * filter type.
3324ed0e032SJens Thiele 	 */
3334ed0e032SJens Thiele 	of_property_read_u32(np, "allwinner,filter-type", &filter_type);
3344ed0e032SJens Thiele 	writel(FILTER_EN(1) | FILTER_TYPE(filter_type), ts->base + TP_CTRL3);
3356decea7cSHans de Goede 
3366decea7cSHans de Goede 	/* Enable temperature measurement, period 1953 (2 seconds) */
3376decea7cSHans de Goede 	writel(TEMP_ENABLE(1) | TEMP_PERIOD(1953), ts->base + TP_TPR);
3386decea7cSHans de Goede 
3396decea7cSHans de Goede 	/*
3406decea7cSHans de Goede 	 * Set stylus up debounce to aprox 10 ms, enable debounce, and
3416decea7cSHans de Goede 	 * finally enable tp mode.
3426decea7cSHans de Goede 	 */
34343c0e223SChen-Yu Tsai 	reg = STYLUS_UP_DEBOUN(5) | STYLUS_UP_DEBOUN_EN(1);
34491c68a7cSHans de Goede 	if (of_device_is_compatible(np, "allwinner,sun6i-a31-ts"))
34543c0e223SChen-Yu Tsai 		reg |= SUN6I_TP_MODE_EN(1);
34691c68a7cSHans de Goede 	else
34791c68a7cSHans de Goede 		reg |= TP_MODE_EN(1);
34843c0e223SChen-Yu Tsai 	writel(reg, ts->base + TP_CTRL1);
3496decea7cSHans de Goede 
35022369710SChen-Yu Tsai 	/*
35122369710SChen-Yu Tsai 	 * The thermal core does not register hwmon devices for DT-based
35222369710SChen-Yu Tsai 	 * thermal zone sensors, such as this one.
35322369710SChen-Yu Tsai 	 */
354f09f98d3SHans de Goede 	hwmon = devm_hwmon_device_register_with_groups(ts->dev, "sun4i_ts",
355f09f98d3SHans de Goede 						       ts, sun4i_ts_groups);
356f09f98d3SHans de Goede 	if (IS_ERR(hwmon))
357f09f98d3SHans de Goede 		return PTR_ERR(hwmon);
358f09f98d3SHans de Goede 
359ad662b1dSDaniel Lezcano 	thermal = devm_thermal_of_zone_register(ts->dev, 0, ts,
36097e24b09SChuhong Yuan 						&sun4i_ts_tz_ops);
36197e24b09SChuhong Yuan 	if (IS_ERR(thermal))
36297e24b09SChuhong Yuan 		return PTR_ERR(thermal);
36322369710SChen-Yu Tsai 
364f09f98d3SHans de Goede 	writel(TEMP_IRQ_EN(1), ts->base + TP_INT_FIFOC);
365f09f98d3SHans de Goede 
366f09f98d3SHans de Goede 	if (ts_attached) {
3676decea7cSHans de Goede 		error = input_register_device(ts->input);
368f09f98d3SHans de Goede 		if (error) {
369f09f98d3SHans de Goede 			writel(0, ts->base + TP_INT_FIFOC);
3706decea7cSHans de Goede 			return error;
371f09f98d3SHans de Goede 		}
372f09f98d3SHans de Goede 	}
3736decea7cSHans de Goede 
3746decea7cSHans de Goede 	platform_set_drvdata(pdev, ts);
3756decea7cSHans de Goede 	return 0;
3766decea7cSHans de Goede }
3776decea7cSHans de Goede 
sun4i_ts_remove(struct platform_device * pdev)378f09f98d3SHans de Goede static int sun4i_ts_remove(struct platform_device *pdev)
379f09f98d3SHans de Goede {
380f09f98d3SHans de Goede 	struct sun4i_ts_data *ts = platform_get_drvdata(pdev);
381f09f98d3SHans de Goede 
382f09f98d3SHans de Goede 	/* Explicit unregister to avoid open/close changing the imask later */
383f09f98d3SHans de Goede 	if (ts->input)
384f09f98d3SHans de Goede 		input_unregister_device(ts->input);
385f09f98d3SHans de Goede 
386f09f98d3SHans de Goede 	/* Deactivate all IRQs */
387f09f98d3SHans de Goede 	writel(0, ts->base + TP_INT_FIFOC);
388f09f98d3SHans de Goede 
389f09f98d3SHans de Goede 	return 0;
390f09f98d3SHans de Goede }
391f09f98d3SHans de Goede 
3926decea7cSHans de Goede static const struct of_device_id sun4i_ts_of_match[] = {
3936decea7cSHans de Goede 	{ .compatible = "allwinner,sun4i-a10-ts", },
39491c68a7cSHans de Goede 	{ .compatible = "allwinner,sun5i-a13-ts", },
39543c0e223SChen-Yu Tsai 	{ .compatible = "allwinner,sun6i-a31-ts", },
3966decea7cSHans de Goede 	{ /* sentinel */ }
3976decea7cSHans de Goede };
3986decea7cSHans de Goede MODULE_DEVICE_TABLE(of, sun4i_ts_of_match);
3996decea7cSHans de Goede 
4006decea7cSHans de Goede static struct platform_driver sun4i_ts_driver = {
4016decea7cSHans de Goede 	.driver = {
4026decea7cSHans de Goede 		.name	= "sun4i-ts",
403f92dd6d0SKrzysztof Kozlowski 		.of_match_table = sun4i_ts_of_match,
4046decea7cSHans de Goede 	},
4056decea7cSHans de Goede 	.probe	= sun4i_ts_probe,
406f09f98d3SHans de Goede 	.remove	= sun4i_ts_remove,
4076decea7cSHans de Goede };
4086decea7cSHans de Goede 
4096decea7cSHans de Goede module_platform_driver(sun4i_ts_driver);
4106decea7cSHans de Goede 
4116decea7cSHans de Goede MODULE_DESCRIPTION("Allwinner sun4i resistive touchscreen controller driver");
4126decea7cSHans de Goede MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>");
4136decea7cSHans de Goede MODULE_LICENSE("GPL");
414