17268a4f8SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only 2842ff286SAnthony Kim /* 3842ff286SAnthony Kim * Copyright (C) 2012-2017 Hideep, Inc. 4842ff286SAnthony Kim */ 5842ff286SAnthony Kim 6842ff286SAnthony Kim #include <linux/module.h> 7842ff286SAnthony Kim #include <linux/of.h> 8842ff286SAnthony Kim #include <linux/firmware.h> 9842ff286SAnthony Kim #include <linux/delay.h> 108b7e9d9eSAnthony Kim #include <linux/gpio/consumer.h> 11842ff286SAnthony Kim #include <linux/i2c.h> 12842ff286SAnthony Kim #include <linux/acpi.h> 13842ff286SAnthony Kim #include <linux/interrupt.h> 14842ff286SAnthony Kim #include <linux/regmap.h> 15842ff286SAnthony Kim #include <linux/sysfs.h> 16842ff286SAnthony Kim #include <linux/input.h> 17842ff286SAnthony Kim #include <linux/input/mt.h> 18842ff286SAnthony Kim #include <linux/input/touchscreen.h> 19842ff286SAnthony Kim #include <linux/regulator/consumer.h> 20842ff286SAnthony Kim #include <asm/unaligned.h> 21842ff286SAnthony Kim 22842ff286SAnthony Kim #define HIDEEP_TS_NAME "HiDeep Touchscreen" 23842ff286SAnthony Kim #define HIDEEP_I2C_NAME "hideep_ts" 24842ff286SAnthony Kim 25842ff286SAnthony Kim #define HIDEEP_MT_MAX 10 26842ff286SAnthony Kim #define HIDEEP_KEY_MAX 3 27842ff286SAnthony Kim 28842ff286SAnthony Kim /* count(2) + touch data(100) + key data(6) */ 29842ff286SAnthony Kim #define HIDEEP_MAX_EVENT 108UL 30842ff286SAnthony Kim 31842ff286SAnthony Kim #define HIDEEP_TOUCH_EVENT_INDEX 2 32842ff286SAnthony Kim #define HIDEEP_KEY_EVENT_INDEX 102 33842ff286SAnthony Kim 34842ff286SAnthony Kim /* Touch & key event */ 35842ff286SAnthony Kim #define HIDEEP_EVENT_ADDR 0x240 36842ff286SAnthony Kim 37842ff286SAnthony Kim /* command list */ 38842ff286SAnthony Kim #define HIDEEP_RESET_CMD 0x9800 39842ff286SAnthony Kim 40842ff286SAnthony Kim /* event bit */ 41842ff286SAnthony Kim #define HIDEEP_MT_RELEASED BIT(4) 42842ff286SAnthony Kim #define HIDEEP_KEY_PRESSED BIT(7) 43842ff286SAnthony Kim #define HIDEEP_KEY_FIRST_PRESSED BIT(8) 44842ff286SAnthony Kim #define HIDEEP_KEY_PRESSED_MASK (HIDEEP_KEY_PRESSED | \ 45842ff286SAnthony Kim HIDEEP_KEY_FIRST_PRESSED) 46842ff286SAnthony Kim 47842ff286SAnthony Kim #define HIDEEP_KEY_IDX_MASK 0x0f 48842ff286SAnthony Kim 49842ff286SAnthony Kim /* For NVM */ 50842ff286SAnthony Kim #define HIDEEP_YRAM_BASE 0x40000000 51842ff286SAnthony Kim #define HIDEEP_PERIPHERAL_BASE 0x50000000 52842ff286SAnthony Kim #define HIDEEP_ESI_BASE (HIDEEP_PERIPHERAL_BASE + 0x00000000) 53842ff286SAnthony Kim #define HIDEEP_FLASH_BASE (HIDEEP_PERIPHERAL_BASE + 0x01000000) 54842ff286SAnthony Kim #define HIDEEP_SYSCON_BASE (HIDEEP_PERIPHERAL_BASE + 0x02000000) 55842ff286SAnthony Kim 56842ff286SAnthony Kim #define HIDEEP_SYSCON_MOD_CON (HIDEEP_SYSCON_BASE + 0x0000) 57842ff286SAnthony Kim #define HIDEEP_SYSCON_SPC_CON (HIDEEP_SYSCON_BASE + 0x0004) 58842ff286SAnthony Kim #define HIDEEP_SYSCON_CLK_CON (HIDEEP_SYSCON_BASE + 0x0008) 59842ff286SAnthony Kim #define HIDEEP_SYSCON_CLK_ENA (HIDEEP_SYSCON_BASE + 0x000C) 60842ff286SAnthony Kim #define HIDEEP_SYSCON_RST_CON (HIDEEP_SYSCON_BASE + 0x0010) 61842ff286SAnthony Kim #define HIDEEP_SYSCON_WDT_CON (HIDEEP_SYSCON_BASE + 0x0014) 62842ff286SAnthony Kim #define HIDEEP_SYSCON_WDT_CNT (HIDEEP_SYSCON_BASE + 0x0018) 63842ff286SAnthony Kim #define HIDEEP_SYSCON_PWR_CON (HIDEEP_SYSCON_BASE + 0x0020) 64842ff286SAnthony Kim #define HIDEEP_SYSCON_PGM_ID (HIDEEP_SYSCON_BASE + 0x00F4) 65842ff286SAnthony Kim 66842ff286SAnthony Kim #define HIDEEP_FLASH_CON (HIDEEP_FLASH_BASE + 0x0000) 67842ff286SAnthony Kim #define HIDEEP_FLASH_STA (HIDEEP_FLASH_BASE + 0x0004) 68842ff286SAnthony Kim #define HIDEEP_FLASH_CFG (HIDEEP_FLASH_BASE + 0x0008) 69842ff286SAnthony Kim #define HIDEEP_FLASH_TIM (HIDEEP_FLASH_BASE + 0x000C) 70842ff286SAnthony Kim #define HIDEEP_FLASH_CACHE_CFG (HIDEEP_FLASH_BASE + 0x0010) 71842ff286SAnthony Kim #define HIDEEP_FLASH_PIO_SIG (HIDEEP_FLASH_BASE + 0x400000) 72842ff286SAnthony Kim 73842ff286SAnthony Kim #define HIDEEP_ESI_TX_INVALID (HIDEEP_ESI_BASE + 0x0008) 74842ff286SAnthony Kim 75842ff286SAnthony Kim #define HIDEEP_PERASE 0x00040000 76842ff286SAnthony Kim #define HIDEEP_WRONLY 0x00100000 77842ff286SAnthony Kim 78842ff286SAnthony Kim #define HIDEEP_NVM_MASK_OFS 0x0000000C 79842ff286SAnthony Kim #define HIDEEP_NVM_DEFAULT_PAGE 0 80842ff286SAnthony Kim #define HIDEEP_NVM_SFR_WPAGE 1 81842ff286SAnthony Kim #define HIDEEP_NVM_SFR_RPAGE 2 82842ff286SAnthony Kim 83842ff286SAnthony Kim #define HIDEEP_PIO_SIG 0x00400000 84842ff286SAnthony Kim #define HIDEEP_PROT_MODE 0x03400000 85842ff286SAnthony Kim 86842ff286SAnthony Kim #define HIDEEP_NVM_PAGE_SIZE 128 87842ff286SAnthony Kim 88842ff286SAnthony Kim #define HIDEEP_DWZ_INFO 0x000002C0 89842ff286SAnthony Kim 90842ff286SAnthony Kim struct hideep_event { 91842ff286SAnthony Kim __le16 x; 92842ff286SAnthony Kim __le16 y; 93842ff286SAnthony Kim __le16 z; 94842ff286SAnthony Kim u8 w; 95842ff286SAnthony Kim u8 flag; 96842ff286SAnthony Kim u8 type; 97842ff286SAnthony Kim u8 index; 98842ff286SAnthony Kim }; 99842ff286SAnthony Kim 100842ff286SAnthony Kim struct dwz_info { 101842ff286SAnthony Kim __be32 code_start; 102842ff286SAnthony Kim u8 code_crc[12]; 103842ff286SAnthony Kim 104842ff286SAnthony Kim __be32 c_code_start; 105842ff286SAnthony Kim __be16 gen_ver; 106842ff286SAnthony Kim __be16 c_code_len; 107842ff286SAnthony Kim 108842ff286SAnthony Kim __be32 vr_start; 109842ff286SAnthony Kim __be16 rsv0; 110842ff286SAnthony Kim __be16 vr_len; 111842ff286SAnthony Kim 112842ff286SAnthony Kim __be32 ft_start; 113842ff286SAnthony Kim __be16 vr_version; 114842ff286SAnthony Kim __be16 ft_len; 115842ff286SAnthony Kim 116842ff286SAnthony Kim __be16 core_ver; 117842ff286SAnthony Kim __be16 boot_ver; 118842ff286SAnthony Kim 119842ff286SAnthony Kim __be16 release_ver; 120842ff286SAnthony Kim __be16 custom_ver; 121842ff286SAnthony Kim 122842ff286SAnthony Kim u8 factory_id; 123842ff286SAnthony Kim u8 panel_type; 124842ff286SAnthony Kim u8 model_name[6]; 125842ff286SAnthony Kim 126842ff286SAnthony Kim __be16 extra_option; 127842ff286SAnthony Kim __be16 product_code; 128842ff286SAnthony Kim 129842ff286SAnthony Kim __be16 vendor_id; 130842ff286SAnthony Kim __be16 product_id; 131842ff286SAnthony Kim }; 132842ff286SAnthony Kim 133842ff286SAnthony Kim struct pgm_packet { 134842ff286SAnthony Kim struct { 135842ff286SAnthony Kim u8 unused[3]; 136842ff286SAnthony Kim u8 len; 137842ff286SAnthony Kim __be32 addr; 138842ff286SAnthony Kim } header; 139842ff286SAnthony Kim __be32 payload[HIDEEP_NVM_PAGE_SIZE / sizeof(__be32)]; 140842ff286SAnthony Kim }; 141842ff286SAnthony Kim 142842ff286SAnthony Kim #define HIDEEP_XFER_BUF_SIZE sizeof(struct pgm_packet) 143842ff286SAnthony Kim 144842ff286SAnthony Kim struct hideep_ts { 145842ff286SAnthony Kim struct i2c_client *client; 146842ff286SAnthony Kim struct input_dev *input_dev; 147842ff286SAnthony Kim struct regmap *reg; 148842ff286SAnthony Kim 149842ff286SAnthony Kim struct touchscreen_properties prop; 150842ff286SAnthony Kim 151842ff286SAnthony Kim struct gpio_desc *reset_gpio; 152842ff286SAnthony Kim 153842ff286SAnthony Kim struct regulator *vcc_vdd; 154842ff286SAnthony Kim struct regulator *vcc_vid; 155842ff286SAnthony Kim 156842ff286SAnthony Kim struct mutex dev_mutex; 157842ff286SAnthony Kim 158842ff286SAnthony Kim u32 tch_count; 159842ff286SAnthony Kim u32 lpm_count; 160842ff286SAnthony Kim 161842ff286SAnthony Kim /* 162842ff286SAnthony Kim * Data buffer to read packet from the device (contacts and key 163842ff286SAnthony Kim * states). We align it on double-word boundary to keep word-sized 164842ff286SAnthony Kim * fields in contact data and double-word-sized fields in program 165842ff286SAnthony Kim * packet aligned. 166842ff286SAnthony Kim */ 167842ff286SAnthony Kim u8 xfer_buf[HIDEEP_XFER_BUF_SIZE] __aligned(4); 168842ff286SAnthony Kim 169842ff286SAnthony Kim int key_num; 170842ff286SAnthony Kim u32 key_codes[HIDEEP_KEY_MAX]; 171842ff286SAnthony Kim 172842ff286SAnthony Kim struct dwz_info dwz_info; 173842ff286SAnthony Kim 174842ff286SAnthony Kim unsigned int fw_size; 175842ff286SAnthony Kim u32 nvm_mask; 176842ff286SAnthony Kim }; 177842ff286SAnthony Kim 178842ff286SAnthony Kim static int hideep_pgm_w_mem(struct hideep_ts *ts, u32 addr, 179842ff286SAnthony Kim const __be32 *data, size_t count) 180842ff286SAnthony Kim { 181842ff286SAnthony Kim struct pgm_packet *packet = (void *)ts->xfer_buf; 182842ff286SAnthony Kim size_t len = count * sizeof(*data); 183842ff286SAnthony Kim struct i2c_msg msg = { 184842ff286SAnthony Kim .addr = ts->client->addr, 185842ff286SAnthony Kim .len = len + sizeof(packet->header.len) + 186842ff286SAnthony Kim sizeof(packet->header.addr), 187842ff286SAnthony Kim .buf = &packet->header.len, 188842ff286SAnthony Kim }; 189842ff286SAnthony Kim int ret; 190842ff286SAnthony Kim 191842ff286SAnthony Kim if (len > HIDEEP_NVM_PAGE_SIZE) 192842ff286SAnthony Kim return -EINVAL; 193842ff286SAnthony Kim 194842ff286SAnthony Kim packet->header.len = 0x80 | (count - 1); 195842ff286SAnthony Kim packet->header.addr = cpu_to_be32(addr); 196842ff286SAnthony Kim memcpy(packet->payload, data, len); 197842ff286SAnthony Kim 198842ff286SAnthony Kim ret = i2c_transfer(ts->client->adapter, &msg, 1); 199842ff286SAnthony Kim if (ret != 1) 200842ff286SAnthony Kim return ret < 0 ? ret : -EIO; 201842ff286SAnthony Kim 202842ff286SAnthony Kim return 0; 203842ff286SAnthony Kim } 204842ff286SAnthony Kim 205842ff286SAnthony Kim static int hideep_pgm_r_mem(struct hideep_ts *ts, u32 addr, 206842ff286SAnthony Kim __be32 *data, size_t count) 207842ff286SAnthony Kim { 208842ff286SAnthony Kim struct pgm_packet *packet = (void *)ts->xfer_buf; 209842ff286SAnthony Kim size_t len = count * sizeof(*data); 210842ff286SAnthony Kim struct i2c_msg msg[] = { 211842ff286SAnthony Kim { 212842ff286SAnthony Kim .addr = ts->client->addr, 213842ff286SAnthony Kim .len = sizeof(packet->header.len) + 214842ff286SAnthony Kim sizeof(packet->header.addr), 215842ff286SAnthony Kim .buf = &packet->header.len, 216842ff286SAnthony Kim }, 217842ff286SAnthony Kim { 218842ff286SAnthony Kim .addr = ts->client->addr, 219842ff286SAnthony Kim .flags = I2C_M_RD, 220842ff286SAnthony Kim .len = len, 221842ff286SAnthony Kim .buf = (u8 *)data, 222842ff286SAnthony Kim }, 223842ff286SAnthony Kim }; 224842ff286SAnthony Kim int ret; 225842ff286SAnthony Kim 226842ff286SAnthony Kim if (len > HIDEEP_NVM_PAGE_SIZE) 227842ff286SAnthony Kim return -EINVAL; 228842ff286SAnthony Kim 229842ff286SAnthony Kim packet->header.len = count - 1; 230842ff286SAnthony Kim packet->header.addr = cpu_to_be32(addr); 231842ff286SAnthony Kim 232842ff286SAnthony Kim ret = i2c_transfer(ts->client->adapter, msg, ARRAY_SIZE(msg)); 233842ff286SAnthony Kim if (ret != ARRAY_SIZE(msg)) 234842ff286SAnthony Kim return ret < 0 ? ret : -EIO; 235842ff286SAnthony Kim 236842ff286SAnthony Kim return 0; 237842ff286SAnthony Kim } 238842ff286SAnthony Kim 239842ff286SAnthony Kim static int hideep_pgm_r_reg(struct hideep_ts *ts, u32 addr, u32 *val) 240842ff286SAnthony Kim { 241842ff286SAnthony Kim __be32 data; 242842ff286SAnthony Kim int error; 243842ff286SAnthony Kim 244842ff286SAnthony Kim error = hideep_pgm_r_mem(ts, addr, &data, 1); 245842ff286SAnthony Kim if (error) { 246842ff286SAnthony Kim dev_err(&ts->client->dev, 247842ff286SAnthony Kim "read of register %#08x failed: %d\n", 248842ff286SAnthony Kim addr, error); 249842ff286SAnthony Kim return error; 250842ff286SAnthony Kim } 251842ff286SAnthony Kim 252842ff286SAnthony Kim *val = be32_to_cpu(data); 253842ff286SAnthony Kim return 0; 254842ff286SAnthony Kim } 255842ff286SAnthony Kim 256842ff286SAnthony Kim static int hideep_pgm_w_reg(struct hideep_ts *ts, u32 addr, u32 val) 257842ff286SAnthony Kim { 258842ff286SAnthony Kim __be32 data = cpu_to_be32(val); 259842ff286SAnthony Kim int error; 260842ff286SAnthony Kim 261842ff286SAnthony Kim error = hideep_pgm_w_mem(ts, addr, &data, 1); 262842ff286SAnthony Kim if (error) { 263842ff286SAnthony Kim dev_err(&ts->client->dev, 264842ff286SAnthony Kim "write to register %#08x (%#08x) failed: %d\n", 265842ff286SAnthony Kim addr, val, error); 266842ff286SAnthony Kim return error; 267842ff286SAnthony Kim } 268842ff286SAnthony Kim 269842ff286SAnthony Kim return 0; 270842ff286SAnthony Kim } 271842ff286SAnthony Kim 272842ff286SAnthony Kim #define SW_RESET_IN_PGM(clk) \ 273842ff286SAnthony Kim { \ 274*10b0a455SHans de Goede __be32 data = cpu_to_be32(0x01); \ 275842ff286SAnthony Kim hideep_pgm_w_reg(ts, HIDEEP_SYSCON_WDT_CNT, (clk)); \ 276842ff286SAnthony Kim hideep_pgm_w_reg(ts, HIDEEP_SYSCON_WDT_CON, 0x03); \ 277*10b0a455SHans de Goede /* \ 278*10b0a455SHans de Goede * The first write may already cause a reset, use a raw \ 279*10b0a455SHans de Goede * write for the second write to avoid error logging. \ 280*10b0a455SHans de Goede */ \ 281*10b0a455SHans de Goede hideep_pgm_w_mem(ts, HIDEEP_SYSCON_WDT_CON, &data, 1); \ 282842ff286SAnthony Kim } 283842ff286SAnthony Kim 284842ff286SAnthony Kim #define SET_FLASH_PIO(ce) \ 285842ff286SAnthony Kim hideep_pgm_w_reg(ts, HIDEEP_FLASH_CON, \ 286842ff286SAnthony Kim 0x01 | ((ce) << 1)) 287842ff286SAnthony Kim 288842ff286SAnthony Kim #define SET_PIO_SIG(x, y) \ 289842ff286SAnthony Kim hideep_pgm_w_reg(ts, HIDEEP_FLASH_PIO_SIG + (x), (y)) 290842ff286SAnthony Kim 291842ff286SAnthony Kim #define SET_FLASH_HWCONTROL() \ 292842ff286SAnthony Kim hideep_pgm_w_reg(ts, HIDEEP_FLASH_CON, 0x00) 293842ff286SAnthony Kim 294842ff286SAnthony Kim #define NVM_W_SFR(x, y) \ 295842ff286SAnthony Kim { \ 296842ff286SAnthony Kim SET_FLASH_PIO(1); \ 297842ff286SAnthony Kim SET_PIO_SIG(x, y); \ 298842ff286SAnthony Kim SET_FLASH_PIO(0); \ 299842ff286SAnthony Kim } 300842ff286SAnthony Kim 301842ff286SAnthony Kim static void hideep_pgm_set(struct hideep_ts *ts) 302842ff286SAnthony Kim { 303842ff286SAnthony Kim hideep_pgm_w_reg(ts, HIDEEP_SYSCON_WDT_CON, 0x00); 304842ff286SAnthony Kim hideep_pgm_w_reg(ts, HIDEEP_SYSCON_SPC_CON, 0x00); 305842ff286SAnthony Kim hideep_pgm_w_reg(ts, HIDEEP_SYSCON_CLK_ENA, 0xFF); 306842ff286SAnthony Kim hideep_pgm_w_reg(ts, HIDEEP_SYSCON_CLK_CON, 0x01); 307842ff286SAnthony Kim hideep_pgm_w_reg(ts, HIDEEP_SYSCON_PWR_CON, 0x01); 308842ff286SAnthony Kim hideep_pgm_w_reg(ts, HIDEEP_FLASH_TIM, 0x03); 309842ff286SAnthony Kim hideep_pgm_w_reg(ts, HIDEEP_FLASH_CACHE_CFG, 0x00); 310842ff286SAnthony Kim } 311842ff286SAnthony Kim 312842ff286SAnthony Kim static int hideep_pgm_get_pattern(struct hideep_ts *ts, u32 *pattern) 313842ff286SAnthony Kim { 314842ff286SAnthony Kim u16 p1 = 0xAF39; 315842ff286SAnthony Kim u16 p2 = 0xDF9D; 316842ff286SAnthony Kim int error; 317842ff286SAnthony Kim 318842ff286SAnthony Kim error = regmap_bulk_write(ts->reg, p1, &p2, 1); 319842ff286SAnthony Kim if (error) { 320842ff286SAnthony Kim dev_err(&ts->client->dev, 321842ff286SAnthony Kim "%s: regmap_bulk_write() failed with %d\n", 322842ff286SAnthony Kim __func__, error); 323842ff286SAnthony Kim return error; 324842ff286SAnthony Kim } 325842ff286SAnthony Kim 326842ff286SAnthony Kim usleep_range(1000, 1100); 327842ff286SAnthony Kim 328842ff286SAnthony Kim /* flush invalid Tx load register */ 329842ff286SAnthony Kim error = hideep_pgm_w_reg(ts, HIDEEP_ESI_TX_INVALID, 0x01); 330842ff286SAnthony Kim if (error) 331842ff286SAnthony Kim return error; 332842ff286SAnthony Kim 333842ff286SAnthony Kim error = hideep_pgm_r_reg(ts, HIDEEP_SYSCON_PGM_ID, pattern); 334842ff286SAnthony Kim if (error) 335842ff286SAnthony Kim return error; 336842ff286SAnthony Kim 337842ff286SAnthony Kim return 0; 338842ff286SAnthony Kim } 339842ff286SAnthony Kim 340842ff286SAnthony Kim static int hideep_enter_pgm(struct hideep_ts *ts) 341842ff286SAnthony Kim { 342842ff286SAnthony Kim int retry_count = 10; 343842ff286SAnthony Kim u32 pattern; 344842ff286SAnthony Kim int error; 345842ff286SAnthony Kim 346842ff286SAnthony Kim while (retry_count--) { 347842ff286SAnthony Kim error = hideep_pgm_get_pattern(ts, &pattern); 348842ff286SAnthony Kim if (error) { 349842ff286SAnthony Kim dev_err(&ts->client->dev, 350842ff286SAnthony Kim "hideep_pgm_get_pattern failed: %d\n", error); 351842ff286SAnthony Kim } else if (pattern != 0x39AF9DDF) { 352842ff286SAnthony Kim dev_err(&ts->client->dev, "%s: bad pattern: %#08x\n", 353842ff286SAnthony Kim __func__, pattern); 354842ff286SAnthony Kim } else { 355842ff286SAnthony Kim dev_dbg(&ts->client->dev, "found magic code"); 356842ff286SAnthony Kim 357842ff286SAnthony Kim hideep_pgm_set(ts); 358842ff286SAnthony Kim usleep_range(1000, 1100); 359842ff286SAnthony Kim 360842ff286SAnthony Kim return 0; 361842ff286SAnthony Kim } 362842ff286SAnthony Kim } 363842ff286SAnthony Kim 364842ff286SAnthony Kim dev_err(&ts->client->dev, "failed to enter pgm mode\n"); 365842ff286SAnthony Kim SW_RESET_IN_PGM(1000); 366842ff286SAnthony Kim return -EIO; 367842ff286SAnthony Kim } 368842ff286SAnthony Kim 369cac7100dSYizhuo Zhai static int hideep_nvm_unlock(struct hideep_ts *ts) 370842ff286SAnthony Kim { 371842ff286SAnthony Kim u32 unmask_code; 372cac7100dSYizhuo Zhai int error; 373842ff286SAnthony Kim 374842ff286SAnthony Kim hideep_pgm_w_reg(ts, HIDEEP_FLASH_CFG, HIDEEP_NVM_SFR_RPAGE); 375cac7100dSYizhuo Zhai error = hideep_pgm_r_reg(ts, 0x0000000C, &unmask_code); 376842ff286SAnthony Kim hideep_pgm_w_reg(ts, HIDEEP_FLASH_CFG, HIDEEP_NVM_DEFAULT_PAGE); 377cac7100dSYizhuo Zhai if (error) 378cac7100dSYizhuo Zhai return error; 379842ff286SAnthony Kim 380842ff286SAnthony Kim /* make it unprotected code */ 381842ff286SAnthony Kim unmask_code &= ~HIDEEP_PROT_MODE; 382842ff286SAnthony Kim 383842ff286SAnthony Kim /* compare unmask code */ 384842ff286SAnthony Kim if (unmask_code != ts->nvm_mask) 385842ff286SAnthony Kim dev_warn(&ts->client->dev, 386842ff286SAnthony Kim "read mask code different %#08x vs %#08x", 387842ff286SAnthony Kim unmask_code, ts->nvm_mask); 388842ff286SAnthony Kim 389842ff286SAnthony Kim hideep_pgm_w_reg(ts, HIDEEP_FLASH_CFG, HIDEEP_NVM_SFR_WPAGE); 390842ff286SAnthony Kim SET_FLASH_PIO(0); 391842ff286SAnthony Kim 392842ff286SAnthony Kim NVM_W_SFR(HIDEEP_NVM_MASK_OFS, ts->nvm_mask); 393842ff286SAnthony Kim SET_FLASH_HWCONTROL(); 394842ff286SAnthony Kim hideep_pgm_w_reg(ts, HIDEEP_FLASH_CFG, HIDEEP_NVM_DEFAULT_PAGE); 395cac7100dSYizhuo Zhai 396cac7100dSYizhuo Zhai return 0; 397842ff286SAnthony Kim } 398842ff286SAnthony Kim 399842ff286SAnthony Kim static int hideep_check_status(struct hideep_ts *ts) 400842ff286SAnthony Kim { 401842ff286SAnthony Kim int time_out = 100; 402842ff286SAnthony Kim int status; 403842ff286SAnthony Kim int error; 404842ff286SAnthony Kim 405842ff286SAnthony Kim while (time_out--) { 406842ff286SAnthony Kim error = hideep_pgm_r_reg(ts, HIDEEP_FLASH_STA, &status); 407842ff286SAnthony Kim if (!error && status) 408842ff286SAnthony Kim return 0; 409842ff286SAnthony Kim 410842ff286SAnthony Kim usleep_range(1000, 1100); 411842ff286SAnthony Kim } 412842ff286SAnthony Kim 413842ff286SAnthony Kim return -ETIMEDOUT; 414842ff286SAnthony Kim } 415842ff286SAnthony Kim 416842ff286SAnthony Kim static int hideep_program_page(struct hideep_ts *ts, u32 addr, 417842ff286SAnthony Kim const __be32 *ucode, size_t xfer_count) 418842ff286SAnthony Kim { 419842ff286SAnthony Kim u32 val; 420842ff286SAnthony Kim int error; 421842ff286SAnthony Kim 422842ff286SAnthony Kim error = hideep_check_status(ts); 423842ff286SAnthony Kim if (error) 424842ff286SAnthony Kim return -EBUSY; 425842ff286SAnthony Kim 426842ff286SAnthony Kim addr &= ~(HIDEEP_NVM_PAGE_SIZE - 1); 427842ff286SAnthony Kim 428842ff286SAnthony Kim SET_FLASH_PIO(0); 429842ff286SAnthony Kim SET_FLASH_PIO(1); 430842ff286SAnthony Kim 431842ff286SAnthony Kim /* erase page */ 432842ff286SAnthony Kim SET_PIO_SIG(HIDEEP_PERASE | addr, 0xFFFFFFFF); 433842ff286SAnthony Kim 434842ff286SAnthony Kim SET_FLASH_PIO(0); 435842ff286SAnthony Kim 436842ff286SAnthony Kim error = hideep_check_status(ts); 437842ff286SAnthony Kim if (error) 438842ff286SAnthony Kim return -EBUSY; 439842ff286SAnthony Kim 440842ff286SAnthony Kim /* write page */ 441842ff286SAnthony Kim SET_FLASH_PIO(1); 442842ff286SAnthony Kim 443842ff286SAnthony Kim val = be32_to_cpu(ucode[0]); 444842ff286SAnthony Kim SET_PIO_SIG(HIDEEP_WRONLY | addr, val); 445842ff286SAnthony Kim 446842ff286SAnthony Kim hideep_pgm_w_mem(ts, HIDEEP_FLASH_PIO_SIG | HIDEEP_WRONLY, 447842ff286SAnthony Kim ucode, xfer_count); 448842ff286SAnthony Kim 449842ff286SAnthony Kim val = be32_to_cpu(ucode[xfer_count - 1]); 450842ff286SAnthony Kim SET_PIO_SIG(124, val); 451842ff286SAnthony Kim 452842ff286SAnthony Kim SET_FLASH_PIO(0); 453842ff286SAnthony Kim 454842ff286SAnthony Kim usleep_range(1000, 1100); 455842ff286SAnthony Kim 456842ff286SAnthony Kim error = hideep_check_status(ts); 457842ff286SAnthony Kim if (error) 458842ff286SAnthony Kim return -EBUSY; 459842ff286SAnthony Kim 460842ff286SAnthony Kim SET_FLASH_HWCONTROL(); 461842ff286SAnthony Kim 462842ff286SAnthony Kim return 0; 463842ff286SAnthony Kim } 464842ff286SAnthony Kim 465842ff286SAnthony Kim static int hideep_program_nvm(struct hideep_ts *ts, 466842ff286SAnthony Kim const __be32 *ucode, size_t ucode_len) 467842ff286SAnthony Kim { 468842ff286SAnthony Kim struct pgm_packet *packet_r = (void *)ts->xfer_buf; 469842ff286SAnthony Kim __be32 *current_ucode = packet_r->payload; 470842ff286SAnthony Kim size_t xfer_len; 471842ff286SAnthony Kim size_t xfer_count; 472842ff286SAnthony Kim u32 addr = 0; 473842ff286SAnthony Kim int error; 474842ff286SAnthony Kim 475cac7100dSYizhuo Zhai error = hideep_nvm_unlock(ts); 476cac7100dSYizhuo Zhai if (error) 477cac7100dSYizhuo Zhai return error; 478842ff286SAnthony Kim 479842ff286SAnthony Kim while (ucode_len > 0) { 480842ff286SAnthony Kim xfer_len = min_t(size_t, ucode_len, HIDEEP_NVM_PAGE_SIZE); 481842ff286SAnthony Kim xfer_count = xfer_len / sizeof(*ucode); 482842ff286SAnthony Kim 483842ff286SAnthony Kim error = hideep_pgm_r_mem(ts, 0x00000000 + addr, 484842ff286SAnthony Kim current_ucode, xfer_count); 485842ff286SAnthony Kim if (error) { 486842ff286SAnthony Kim dev_err(&ts->client->dev, 487842ff286SAnthony Kim "%s: failed to read page at offset %#08x: %d\n", 488842ff286SAnthony Kim __func__, addr, error); 489842ff286SAnthony Kim return error; 490842ff286SAnthony Kim } 491842ff286SAnthony Kim 492842ff286SAnthony Kim /* See if the page needs updating */ 493842ff286SAnthony Kim if (memcmp(ucode, current_ucode, xfer_len)) { 494842ff286SAnthony Kim error = hideep_program_page(ts, addr, 495842ff286SAnthony Kim ucode, xfer_count); 496842ff286SAnthony Kim if (error) { 497842ff286SAnthony Kim dev_err(&ts->client->dev, 498842ff286SAnthony Kim "%s: iwrite failure @%#08x: %d\n", 499842ff286SAnthony Kim __func__, addr, error); 500842ff286SAnthony Kim return error; 501842ff286SAnthony Kim } 502842ff286SAnthony Kim 503842ff286SAnthony Kim usleep_range(1000, 1100); 504842ff286SAnthony Kim } 505842ff286SAnthony Kim 506842ff286SAnthony Kim ucode += xfer_count; 507842ff286SAnthony Kim addr += xfer_len; 508842ff286SAnthony Kim ucode_len -= xfer_len; 509842ff286SAnthony Kim } 510842ff286SAnthony Kim 511842ff286SAnthony Kim return 0; 512842ff286SAnthony Kim } 513842ff286SAnthony Kim 514842ff286SAnthony Kim static int hideep_verify_nvm(struct hideep_ts *ts, 515842ff286SAnthony Kim const __be32 *ucode, size_t ucode_len) 516842ff286SAnthony Kim { 517842ff286SAnthony Kim struct pgm_packet *packet_r = (void *)ts->xfer_buf; 518842ff286SAnthony Kim __be32 *current_ucode = packet_r->payload; 519842ff286SAnthony Kim size_t xfer_len; 520842ff286SAnthony Kim size_t xfer_count; 521842ff286SAnthony Kim u32 addr = 0; 522842ff286SAnthony Kim int i; 523842ff286SAnthony Kim int error; 524842ff286SAnthony Kim 525842ff286SAnthony Kim while (ucode_len > 0) { 526842ff286SAnthony Kim xfer_len = min_t(size_t, ucode_len, HIDEEP_NVM_PAGE_SIZE); 527842ff286SAnthony Kim xfer_count = xfer_len / sizeof(*ucode); 528842ff286SAnthony Kim 529842ff286SAnthony Kim error = hideep_pgm_r_mem(ts, 0x00000000 + addr, 530842ff286SAnthony Kim current_ucode, xfer_count); 531842ff286SAnthony Kim if (error) { 532842ff286SAnthony Kim dev_err(&ts->client->dev, 533842ff286SAnthony Kim "%s: failed to read page at offset %#08x: %d\n", 534842ff286SAnthony Kim __func__, addr, error); 535842ff286SAnthony Kim return error; 536842ff286SAnthony Kim } 537842ff286SAnthony Kim 538842ff286SAnthony Kim if (memcmp(ucode, current_ucode, xfer_len)) { 539842ff286SAnthony Kim const u8 *ucode_bytes = (const u8 *)ucode; 540842ff286SAnthony Kim const u8 *current_bytes = (const u8 *)current_ucode; 541842ff286SAnthony Kim 542842ff286SAnthony Kim for (i = 0; i < xfer_len; i++) 543842ff286SAnthony Kim if (ucode_bytes[i] != current_bytes[i]) 544842ff286SAnthony Kim dev_err(&ts->client->dev, 545842ff286SAnthony Kim "%s: mismatch @%#08x: (%#02x vs %#02x)\n", 546842ff286SAnthony Kim __func__, addr + i, 547842ff286SAnthony Kim ucode_bytes[i], 548842ff286SAnthony Kim current_bytes[i]); 549842ff286SAnthony Kim 550842ff286SAnthony Kim return -EIO; 551842ff286SAnthony Kim } 552842ff286SAnthony Kim 553842ff286SAnthony Kim ucode += xfer_count; 554842ff286SAnthony Kim addr += xfer_len; 555842ff286SAnthony Kim ucode_len -= xfer_len; 556842ff286SAnthony Kim } 557842ff286SAnthony Kim 558842ff286SAnthony Kim return 0; 559842ff286SAnthony Kim } 560842ff286SAnthony Kim 561842ff286SAnthony Kim static int hideep_load_dwz(struct hideep_ts *ts) 562842ff286SAnthony Kim { 563842ff286SAnthony Kim u16 product_code; 564842ff286SAnthony Kim int error; 565842ff286SAnthony Kim 566842ff286SAnthony Kim error = hideep_enter_pgm(ts); 567842ff286SAnthony Kim if (error) 568842ff286SAnthony Kim return error; 569842ff286SAnthony Kim 570842ff286SAnthony Kim msleep(50); 571842ff286SAnthony Kim 572842ff286SAnthony Kim error = hideep_pgm_r_mem(ts, HIDEEP_DWZ_INFO, 573842ff286SAnthony Kim (void *)&ts->dwz_info, 574842ff286SAnthony Kim sizeof(ts->dwz_info) / sizeof(__be32)); 575842ff286SAnthony Kim 576842ff286SAnthony Kim SW_RESET_IN_PGM(10); 577842ff286SAnthony Kim msleep(50); 578842ff286SAnthony Kim 579842ff286SAnthony Kim if (error) { 580842ff286SAnthony Kim dev_err(&ts->client->dev, 581842ff286SAnthony Kim "failed to fetch DWZ data: %d\n", error); 582842ff286SAnthony Kim return error; 583842ff286SAnthony Kim } 584842ff286SAnthony Kim 585842ff286SAnthony Kim product_code = be16_to_cpu(ts->dwz_info.product_code); 586842ff286SAnthony Kim 587842ff286SAnthony Kim switch (product_code & 0xF0) { 588842ff286SAnthony Kim case 0x40: 589842ff286SAnthony Kim dev_dbg(&ts->client->dev, "used crimson IC"); 590842ff286SAnthony Kim ts->fw_size = 1024 * 48; 591842ff286SAnthony Kim ts->nvm_mask = 0x00310000; 592842ff286SAnthony Kim break; 593842ff286SAnthony Kim case 0x60: 594842ff286SAnthony Kim dev_dbg(&ts->client->dev, "used lime IC"); 595842ff286SAnthony Kim ts->fw_size = 1024 * 64; 596842ff286SAnthony Kim ts->nvm_mask = 0x0030027B; 597842ff286SAnthony Kim break; 598842ff286SAnthony Kim default: 599842ff286SAnthony Kim dev_err(&ts->client->dev, "product code is wrong: %#04x", 600842ff286SAnthony Kim product_code); 601842ff286SAnthony Kim return -EINVAL; 602842ff286SAnthony Kim } 603842ff286SAnthony Kim 604842ff286SAnthony Kim dev_dbg(&ts->client->dev, "firmware release version: %#04x", 605842ff286SAnthony Kim be16_to_cpu(ts->dwz_info.release_ver)); 606842ff286SAnthony Kim 607842ff286SAnthony Kim return 0; 608842ff286SAnthony Kim } 609842ff286SAnthony Kim 610842ff286SAnthony Kim static int hideep_flash_firmware(struct hideep_ts *ts, 611842ff286SAnthony Kim const __be32 *ucode, size_t ucode_len) 612842ff286SAnthony Kim { 613842ff286SAnthony Kim int retry_cnt = 3; 614842ff286SAnthony Kim int error; 615842ff286SAnthony Kim 616842ff286SAnthony Kim while (retry_cnt--) { 617842ff286SAnthony Kim error = hideep_program_nvm(ts, ucode, ucode_len); 618842ff286SAnthony Kim if (!error) { 619842ff286SAnthony Kim error = hideep_verify_nvm(ts, ucode, ucode_len); 620842ff286SAnthony Kim if (!error) 621842ff286SAnthony Kim return 0; 622842ff286SAnthony Kim } 623842ff286SAnthony Kim } 624842ff286SAnthony Kim 625842ff286SAnthony Kim return error; 626842ff286SAnthony Kim } 627842ff286SAnthony Kim 628842ff286SAnthony Kim static int hideep_update_firmware(struct hideep_ts *ts, 629842ff286SAnthony Kim const __be32 *ucode, size_t ucode_len) 630842ff286SAnthony Kim { 631842ff286SAnthony Kim int error, error2; 632842ff286SAnthony Kim 633842ff286SAnthony Kim dev_dbg(&ts->client->dev, "starting firmware update"); 634842ff286SAnthony Kim 635842ff286SAnthony Kim /* enter program mode */ 636842ff286SAnthony Kim error = hideep_enter_pgm(ts); 637842ff286SAnthony Kim if (error) 638842ff286SAnthony Kim return error; 639842ff286SAnthony Kim 640842ff286SAnthony Kim error = hideep_flash_firmware(ts, ucode, ucode_len); 641842ff286SAnthony Kim if (error) 642842ff286SAnthony Kim dev_err(&ts->client->dev, 643842ff286SAnthony Kim "firmware update failed: %d\n", error); 644842ff286SAnthony Kim else 645842ff286SAnthony Kim dev_dbg(&ts->client->dev, "firmware updated successfully\n"); 646842ff286SAnthony Kim 647842ff286SAnthony Kim SW_RESET_IN_PGM(1000); 648842ff286SAnthony Kim 649842ff286SAnthony Kim error2 = hideep_load_dwz(ts); 650842ff286SAnthony Kim if (error2) 651842ff286SAnthony Kim dev_err(&ts->client->dev, 652842ff286SAnthony Kim "failed to load dwz after firmware update: %d\n", 653842ff286SAnthony Kim error2); 654842ff286SAnthony Kim 655842ff286SAnthony Kim return error ?: error2; 656842ff286SAnthony Kim } 657842ff286SAnthony Kim 658842ff286SAnthony Kim static int hideep_power_on(struct hideep_ts *ts) 659842ff286SAnthony Kim { 660842ff286SAnthony Kim int error = 0; 661842ff286SAnthony Kim 662842ff286SAnthony Kim error = regulator_enable(ts->vcc_vdd); 663842ff286SAnthony Kim if (error) 664842ff286SAnthony Kim dev_err(&ts->client->dev, 665842ff286SAnthony Kim "failed to enable 'vdd' regulator: %d", error); 666842ff286SAnthony Kim 667842ff286SAnthony Kim usleep_range(999, 1000); 668842ff286SAnthony Kim 669842ff286SAnthony Kim error = regulator_enable(ts->vcc_vid); 670842ff286SAnthony Kim if (error) 671842ff286SAnthony Kim dev_err(&ts->client->dev, 672842ff286SAnthony Kim "failed to enable 'vcc_vid' regulator: %d", 673842ff286SAnthony Kim error); 674842ff286SAnthony Kim 675842ff286SAnthony Kim msleep(30); 676842ff286SAnthony Kim 677842ff286SAnthony Kim if (ts->reset_gpio) { 678842ff286SAnthony Kim gpiod_set_value_cansleep(ts->reset_gpio, 0); 679842ff286SAnthony Kim } else { 680842ff286SAnthony Kim error = regmap_write(ts->reg, HIDEEP_RESET_CMD, 0x01); 681842ff286SAnthony Kim if (error) 682842ff286SAnthony Kim dev_err(&ts->client->dev, 683842ff286SAnthony Kim "failed to send 'reset' command: %d\n", error); 684842ff286SAnthony Kim } 685842ff286SAnthony Kim 686842ff286SAnthony Kim msleep(50); 687842ff286SAnthony Kim 688842ff286SAnthony Kim return error; 689842ff286SAnthony Kim } 690842ff286SAnthony Kim 691842ff286SAnthony Kim static void hideep_power_off(void *data) 692842ff286SAnthony Kim { 693842ff286SAnthony Kim struct hideep_ts *ts = data; 694842ff286SAnthony Kim 695842ff286SAnthony Kim if (ts->reset_gpio) 696842ff286SAnthony Kim gpiod_set_value(ts->reset_gpio, 1); 697842ff286SAnthony Kim 698842ff286SAnthony Kim regulator_disable(ts->vcc_vid); 699842ff286SAnthony Kim regulator_disable(ts->vcc_vdd); 700842ff286SAnthony Kim } 701842ff286SAnthony Kim 702842ff286SAnthony Kim #define __GET_MT_TOOL_TYPE(type) ((type) == 0x01 ? MT_TOOL_FINGER : MT_TOOL_PEN) 703842ff286SAnthony Kim 704842ff286SAnthony Kim static void hideep_report_slot(struct input_dev *input, 705842ff286SAnthony Kim const struct hideep_event *event) 706842ff286SAnthony Kim { 707842ff286SAnthony Kim input_mt_slot(input, event->index & 0x0f); 708842ff286SAnthony Kim input_mt_report_slot_state(input, 709842ff286SAnthony Kim __GET_MT_TOOL_TYPE(event->type), 710842ff286SAnthony Kim !(event->flag & HIDEEP_MT_RELEASED)); 711842ff286SAnthony Kim if (!(event->flag & HIDEEP_MT_RELEASED)) { 712842ff286SAnthony Kim input_report_abs(input, ABS_MT_POSITION_X, 713842ff286SAnthony Kim le16_to_cpup(&event->x)); 714842ff286SAnthony Kim input_report_abs(input, ABS_MT_POSITION_Y, 715842ff286SAnthony Kim le16_to_cpup(&event->y)); 716842ff286SAnthony Kim input_report_abs(input, ABS_MT_PRESSURE, 717842ff286SAnthony Kim le16_to_cpup(&event->z)); 718842ff286SAnthony Kim input_report_abs(input, ABS_MT_TOUCH_MAJOR, event->w); 719842ff286SAnthony Kim } 720842ff286SAnthony Kim } 721842ff286SAnthony Kim 722842ff286SAnthony Kim static void hideep_parse_and_report(struct hideep_ts *ts) 723842ff286SAnthony Kim { 724842ff286SAnthony Kim const struct hideep_event *events = 725842ff286SAnthony Kim (void *)&ts->xfer_buf[HIDEEP_TOUCH_EVENT_INDEX]; 726842ff286SAnthony Kim const u8 *keys = &ts->xfer_buf[HIDEEP_KEY_EVENT_INDEX]; 727842ff286SAnthony Kim int touch_count = ts->xfer_buf[0]; 728842ff286SAnthony Kim int key_count = ts->xfer_buf[1] & 0x0f; 729842ff286SAnthony Kim int lpm_count = ts->xfer_buf[1] & 0xf0; 730842ff286SAnthony Kim int i; 731842ff286SAnthony Kim 732842ff286SAnthony Kim /* get touch event count */ 733842ff286SAnthony Kim dev_dbg(&ts->client->dev, "mt = %d, key = %d, lpm = %02x", 734842ff286SAnthony Kim touch_count, key_count, lpm_count); 735842ff286SAnthony Kim 736842ff286SAnthony Kim touch_count = min(touch_count, HIDEEP_MT_MAX); 737842ff286SAnthony Kim for (i = 0; i < touch_count; i++) 738842ff286SAnthony Kim hideep_report_slot(ts->input_dev, events + i); 739842ff286SAnthony Kim 740842ff286SAnthony Kim key_count = min(key_count, HIDEEP_KEY_MAX); 741842ff286SAnthony Kim for (i = 0; i < key_count; i++) { 742842ff286SAnthony Kim u8 key_data = keys[i * 2]; 743842ff286SAnthony Kim 744842ff286SAnthony Kim input_report_key(ts->input_dev, 745842ff286SAnthony Kim ts->key_codes[key_data & HIDEEP_KEY_IDX_MASK], 746842ff286SAnthony Kim key_data & HIDEEP_KEY_PRESSED_MASK); 747842ff286SAnthony Kim } 748842ff286SAnthony Kim 749842ff286SAnthony Kim input_mt_sync_frame(ts->input_dev); 750842ff286SAnthony Kim input_sync(ts->input_dev); 751842ff286SAnthony Kim } 752842ff286SAnthony Kim 753842ff286SAnthony Kim static irqreturn_t hideep_irq(int irq, void *handle) 754842ff286SAnthony Kim { 755842ff286SAnthony Kim struct hideep_ts *ts = handle; 756842ff286SAnthony Kim int error; 757842ff286SAnthony Kim 758842ff286SAnthony Kim BUILD_BUG_ON(HIDEEP_MAX_EVENT > HIDEEP_XFER_BUF_SIZE); 759842ff286SAnthony Kim 760842ff286SAnthony Kim error = regmap_bulk_read(ts->reg, HIDEEP_EVENT_ADDR, 761842ff286SAnthony Kim ts->xfer_buf, HIDEEP_MAX_EVENT / 2); 762842ff286SAnthony Kim if (error) { 763842ff286SAnthony Kim dev_err(&ts->client->dev, "failed to read events: %d\n", error); 764842ff286SAnthony Kim goto out; 765842ff286SAnthony Kim } 766842ff286SAnthony Kim 767842ff286SAnthony Kim hideep_parse_and_report(ts); 768842ff286SAnthony Kim 769842ff286SAnthony Kim out: 770842ff286SAnthony Kim return IRQ_HANDLED; 771842ff286SAnthony Kim } 772842ff286SAnthony Kim 773842ff286SAnthony Kim static int hideep_get_axis_info(struct hideep_ts *ts) 774842ff286SAnthony Kim { 775842ff286SAnthony Kim __le16 val[2]; 776842ff286SAnthony Kim int error; 777842ff286SAnthony Kim 778842ff286SAnthony Kim error = regmap_bulk_read(ts->reg, 0x28, val, ARRAY_SIZE(val)); 779842ff286SAnthony Kim if (error) 780842ff286SAnthony Kim return error; 781842ff286SAnthony Kim 782842ff286SAnthony Kim ts->prop.max_x = le16_to_cpup(val); 783842ff286SAnthony Kim ts->prop.max_y = le16_to_cpup(val + 1); 784842ff286SAnthony Kim 785842ff286SAnthony Kim dev_dbg(&ts->client->dev, "X: %d, Y: %d", 786842ff286SAnthony Kim ts->prop.max_x, ts->prop.max_y); 787842ff286SAnthony Kim 788842ff286SAnthony Kim return 0; 789842ff286SAnthony Kim } 790842ff286SAnthony Kim 791842ff286SAnthony Kim static int hideep_init_input(struct hideep_ts *ts) 792842ff286SAnthony Kim { 793842ff286SAnthony Kim struct device *dev = &ts->client->dev; 794842ff286SAnthony Kim int i; 795842ff286SAnthony Kim int error; 796842ff286SAnthony Kim 797842ff286SAnthony Kim ts->input_dev = devm_input_allocate_device(dev); 798842ff286SAnthony Kim if (!ts->input_dev) { 799842ff286SAnthony Kim dev_err(dev, "failed to allocate input device\n"); 800842ff286SAnthony Kim return -ENOMEM; 801842ff286SAnthony Kim } 802842ff286SAnthony Kim 803842ff286SAnthony Kim ts->input_dev->name = HIDEEP_TS_NAME; 804842ff286SAnthony Kim ts->input_dev->id.bustype = BUS_I2C; 805842ff286SAnthony Kim input_set_drvdata(ts->input_dev, ts); 806842ff286SAnthony Kim 807842ff286SAnthony Kim input_set_capability(ts->input_dev, EV_ABS, ABS_MT_POSITION_X); 808842ff286SAnthony Kim input_set_capability(ts->input_dev, EV_ABS, ABS_MT_POSITION_Y); 809842ff286SAnthony Kim input_set_abs_params(ts->input_dev, ABS_MT_PRESSURE, 0, 65535, 0, 0); 810842ff286SAnthony Kim input_set_abs_params(ts->input_dev, ABS_MT_TOUCH_MAJOR, 0, 255, 0, 0); 811842ff286SAnthony Kim input_set_abs_params(ts->input_dev, ABS_MT_TOOL_TYPE, 812842ff286SAnthony Kim 0, MT_TOOL_MAX, 0, 0); 813842ff286SAnthony Kim touchscreen_parse_properties(ts->input_dev, true, &ts->prop); 814842ff286SAnthony Kim 815842ff286SAnthony Kim if (ts->prop.max_x == 0 || ts->prop.max_y == 0) { 816842ff286SAnthony Kim error = hideep_get_axis_info(ts); 817842ff286SAnthony Kim if (error) 818842ff286SAnthony Kim return error; 819842ff286SAnthony Kim } 820842ff286SAnthony Kim 821842ff286SAnthony Kim error = input_mt_init_slots(ts->input_dev, HIDEEP_MT_MAX, 822842ff286SAnthony Kim INPUT_MT_DIRECT); 823842ff286SAnthony Kim if (error) 824842ff286SAnthony Kim return error; 825842ff286SAnthony Kim 826104c995fSAndy Shevchenko ts->key_num = device_property_count_u32(dev, "linux,keycodes"); 827842ff286SAnthony Kim if (ts->key_num > HIDEEP_KEY_MAX) { 828842ff286SAnthony Kim dev_err(dev, "too many keys defined: %d\n", 829842ff286SAnthony Kim ts->key_num); 830842ff286SAnthony Kim return -EINVAL; 831842ff286SAnthony Kim } 832842ff286SAnthony Kim 833842ff286SAnthony Kim if (ts->key_num <= 0) { 834842ff286SAnthony Kim dev_dbg(dev, 835842ff286SAnthony Kim "missing or malformed 'linux,keycodes' property\n"); 836842ff286SAnthony Kim } else { 837842ff286SAnthony Kim error = device_property_read_u32_array(dev, "linux,keycodes", 838842ff286SAnthony Kim ts->key_codes, 839842ff286SAnthony Kim ts->key_num); 840842ff286SAnthony Kim if (error) { 841842ff286SAnthony Kim dev_dbg(dev, "failed to read keymap: %d", error); 842842ff286SAnthony Kim return error; 843842ff286SAnthony Kim } 844842ff286SAnthony Kim 845842ff286SAnthony Kim if (ts->key_num) { 846842ff286SAnthony Kim ts->input_dev->keycode = ts->key_codes; 847842ff286SAnthony Kim ts->input_dev->keycodesize = sizeof(ts->key_codes[0]); 848842ff286SAnthony Kim ts->input_dev->keycodemax = ts->key_num; 849842ff286SAnthony Kim 850842ff286SAnthony Kim for (i = 0; i < ts->key_num; i++) 851842ff286SAnthony Kim input_set_capability(ts->input_dev, EV_KEY, 852842ff286SAnthony Kim ts->key_codes[i]); 853842ff286SAnthony Kim } 854842ff286SAnthony Kim } 855842ff286SAnthony Kim 856842ff286SAnthony Kim error = input_register_device(ts->input_dev); 857842ff286SAnthony Kim if (error) { 858842ff286SAnthony Kim dev_err(dev, "failed to register input device: %d", error); 859842ff286SAnthony Kim return error; 860842ff286SAnthony Kim } 861842ff286SAnthony Kim 862842ff286SAnthony Kim return 0; 863842ff286SAnthony Kim } 864842ff286SAnthony Kim 865842ff286SAnthony Kim static ssize_t hideep_update_fw(struct device *dev, 866842ff286SAnthony Kim struct device_attribute *attr, 867842ff286SAnthony Kim const char *buf, size_t count) 868842ff286SAnthony Kim { 869842ff286SAnthony Kim struct i2c_client *client = to_i2c_client(dev); 870842ff286SAnthony Kim struct hideep_ts *ts = i2c_get_clientdata(client); 871842ff286SAnthony Kim const struct firmware *fw_entry; 872842ff286SAnthony Kim char *fw_name; 873842ff286SAnthony Kim int mode; 874842ff286SAnthony Kim int error; 875842ff286SAnthony Kim 876842ff286SAnthony Kim error = kstrtoint(buf, 0, &mode); 877842ff286SAnthony Kim if (error) 878842ff286SAnthony Kim return error; 879842ff286SAnthony Kim 880842ff286SAnthony Kim fw_name = kasprintf(GFP_KERNEL, "hideep_ts_%04x.bin", 881842ff286SAnthony Kim be16_to_cpu(ts->dwz_info.product_id)); 882842ff286SAnthony Kim if (!fw_name) 883842ff286SAnthony Kim return -ENOMEM; 884842ff286SAnthony Kim 885842ff286SAnthony Kim error = request_firmware(&fw_entry, fw_name, dev); 886842ff286SAnthony Kim if (error) { 887842ff286SAnthony Kim dev_err(dev, "failed to request firmware %s: %d", 888842ff286SAnthony Kim fw_name, error); 889842ff286SAnthony Kim goto out_free_fw_name; 890842ff286SAnthony Kim } 891842ff286SAnthony Kim 892842ff286SAnthony Kim if (fw_entry->size % sizeof(__be32)) { 893842ff286SAnthony Kim dev_err(dev, "invalid firmware size %zu\n", fw_entry->size); 894842ff286SAnthony Kim error = -EINVAL; 895842ff286SAnthony Kim goto out_release_fw; 896842ff286SAnthony Kim } 897842ff286SAnthony Kim 898842ff286SAnthony Kim if (fw_entry->size > ts->fw_size) { 899842ff286SAnthony Kim dev_err(dev, "fw size (%zu) is too big (memory size %d)\n", 900842ff286SAnthony Kim fw_entry->size, ts->fw_size); 901842ff286SAnthony Kim error = -EFBIG; 902842ff286SAnthony Kim goto out_release_fw; 903842ff286SAnthony Kim } 904842ff286SAnthony Kim 905842ff286SAnthony Kim mutex_lock(&ts->dev_mutex); 906842ff286SAnthony Kim disable_irq(client->irq); 907842ff286SAnthony Kim 908842ff286SAnthony Kim error = hideep_update_firmware(ts, (const __be32 *)fw_entry->data, 909842ff286SAnthony Kim fw_entry->size); 910842ff286SAnthony Kim 911842ff286SAnthony Kim enable_irq(client->irq); 912842ff286SAnthony Kim mutex_unlock(&ts->dev_mutex); 913842ff286SAnthony Kim 914842ff286SAnthony Kim out_release_fw: 915842ff286SAnthony Kim release_firmware(fw_entry); 916842ff286SAnthony Kim out_free_fw_name: 917842ff286SAnthony Kim kfree(fw_name); 918842ff286SAnthony Kim 919842ff286SAnthony Kim return error ?: count; 920842ff286SAnthony Kim } 921842ff286SAnthony Kim 922842ff286SAnthony Kim static ssize_t hideep_fw_version_show(struct device *dev, 923842ff286SAnthony Kim struct device_attribute *attr, char *buf) 924842ff286SAnthony Kim { 925842ff286SAnthony Kim struct i2c_client *client = to_i2c_client(dev); 926842ff286SAnthony Kim struct hideep_ts *ts = i2c_get_clientdata(client); 927842ff286SAnthony Kim ssize_t len; 928842ff286SAnthony Kim 929842ff286SAnthony Kim mutex_lock(&ts->dev_mutex); 930842ff286SAnthony Kim len = scnprintf(buf, PAGE_SIZE, "%04x\n", 931842ff286SAnthony Kim be16_to_cpu(ts->dwz_info.release_ver)); 932842ff286SAnthony Kim mutex_unlock(&ts->dev_mutex); 933842ff286SAnthony Kim 934842ff286SAnthony Kim return len; 935842ff286SAnthony Kim } 936842ff286SAnthony Kim 937842ff286SAnthony Kim static ssize_t hideep_product_id_show(struct device *dev, 938842ff286SAnthony Kim struct device_attribute *attr, char *buf) 939842ff286SAnthony Kim { 940842ff286SAnthony Kim struct i2c_client *client = to_i2c_client(dev); 941842ff286SAnthony Kim struct hideep_ts *ts = i2c_get_clientdata(client); 942842ff286SAnthony Kim ssize_t len; 943842ff286SAnthony Kim 944842ff286SAnthony Kim mutex_lock(&ts->dev_mutex); 945842ff286SAnthony Kim len = scnprintf(buf, PAGE_SIZE, "%04x\n", 946842ff286SAnthony Kim be16_to_cpu(ts->dwz_info.product_id)); 947842ff286SAnthony Kim mutex_unlock(&ts->dev_mutex); 948842ff286SAnthony Kim 949842ff286SAnthony Kim return len; 950842ff286SAnthony Kim } 951842ff286SAnthony Kim 952842ff286SAnthony Kim static DEVICE_ATTR(version, 0664, hideep_fw_version_show, NULL); 953842ff286SAnthony Kim static DEVICE_ATTR(product_id, 0664, hideep_product_id_show, NULL); 954842ff286SAnthony Kim static DEVICE_ATTR(update_fw, 0664, NULL, hideep_update_fw); 955842ff286SAnthony Kim 956842ff286SAnthony Kim static struct attribute *hideep_ts_sysfs_entries[] = { 957842ff286SAnthony Kim &dev_attr_version.attr, 958842ff286SAnthony Kim &dev_attr_product_id.attr, 959842ff286SAnthony Kim &dev_attr_update_fw.attr, 960842ff286SAnthony Kim NULL, 961842ff286SAnthony Kim }; 962842ff286SAnthony Kim 963842ff286SAnthony Kim static const struct attribute_group hideep_ts_attr_group = { 964842ff286SAnthony Kim .attrs = hideep_ts_sysfs_entries, 965842ff286SAnthony Kim }; 966842ff286SAnthony Kim 967311fd6b0SJonathan Cameron static int hideep_suspend(struct device *dev) 968842ff286SAnthony Kim { 969842ff286SAnthony Kim struct i2c_client *client = to_i2c_client(dev); 970842ff286SAnthony Kim struct hideep_ts *ts = i2c_get_clientdata(client); 971842ff286SAnthony Kim 972842ff286SAnthony Kim disable_irq(client->irq); 973842ff286SAnthony Kim hideep_power_off(ts); 974842ff286SAnthony Kim 975842ff286SAnthony Kim return 0; 976842ff286SAnthony Kim } 977842ff286SAnthony Kim 978311fd6b0SJonathan Cameron static int hideep_resume(struct device *dev) 979842ff286SAnthony Kim { 980842ff286SAnthony Kim struct i2c_client *client = to_i2c_client(dev); 981842ff286SAnthony Kim struct hideep_ts *ts = i2c_get_clientdata(client); 982842ff286SAnthony Kim int error; 983842ff286SAnthony Kim 984842ff286SAnthony Kim error = hideep_power_on(ts); 985842ff286SAnthony Kim if (error) { 986842ff286SAnthony Kim dev_err(&client->dev, "power on failed"); 987842ff286SAnthony Kim return error; 988842ff286SAnthony Kim } 989842ff286SAnthony Kim 990842ff286SAnthony Kim enable_irq(client->irq); 991842ff286SAnthony Kim 992842ff286SAnthony Kim return 0; 993842ff286SAnthony Kim } 994842ff286SAnthony Kim 995311fd6b0SJonathan Cameron static DEFINE_SIMPLE_DEV_PM_OPS(hideep_pm_ops, hideep_suspend, hideep_resume); 996842ff286SAnthony Kim 997842ff286SAnthony Kim static const struct regmap_config hideep_regmap_config = { 998842ff286SAnthony Kim .reg_bits = 16, 999842ff286SAnthony Kim .reg_format_endian = REGMAP_ENDIAN_LITTLE, 1000842ff286SAnthony Kim .val_bits = 16, 1001842ff286SAnthony Kim .val_format_endian = REGMAP_ENDIAN_LITTLE, 1002842ff286SAnthony Kim .max_register = 0xffff, 1003842ff286SAnthony Kim }; 1004842ff286SAnthony Kim 1005d4be9206SUwe Kleine-König static int hideep_probe(struct i2c_client *client) 1006842ff286SAnthony Kim { 1007842ff286SAnthony Kim struct hideep_ts *ts; 1008842ff286SAnthony Kim int error; 1009842ff286SAnthony Kim 1010842ff286SAnthony Kim /* check i2c bus */ 1011842ff286SAnthony Kim if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) { 1012842ff286SAnthony Kim dev_err(&client->dev, "check i2c device error"); 1013842ff286SAnthony Kim return -ENODEV; 1014842ff286SAnthony Kim } 1015842ff286SAnthony Kim 1016842ff286SAnthony Kim if (client->irq <= 0) { 1017842ff286SAnthony Kim dev_err(&client->dev, "missing irq: %d\n", client->irq); 1018842ff286SAnthony Kim return -EINVAL; 1019842ff286SAnthony Kim } 1020842ff286SAnthony Kim 1021842ff286SAnthony Kim ts = devm_kzalloc(&client->dev, sizeof(*ts), GFP_KERNEL); 1022842ff286SAnthony Kim if (!ts) 1023842ff286SAnthony Kim return -ENOMEM; 1024842ff286SAnthony Kim 1025842ff286SAnthony Kim ts->client = client; 1026842ff286SAnthony Kim i2c_set_clientdata(client, ts); 1027842ff286SAnthony Kim mutex_init(&ts->dev_mutex); 1028842ff286SAnthony Kim 1029842ff286SAnthony Kim ts->reg = devm_regmap_init_i2c(client, &hideep_regmap_config); 1030842ff286SAnthony Kim if (IS_ERR(ts->reg)) { 1031842ff286SAnthony Kim error = PTR_ERR(ts->reg); 1032842ff286SAnthony Kim dev_err(&client->dev, 1033842ff286SAnthony Kim "failed to initialize regmap: %d\n", error); 1034842ff286SAnthony Kim return error; 1035842ff286SAnthony Kim } 1036842ff286SAnthony Kim 1037842ff286SAnthony Kim ts->vcc_vdd = devm_regulator_get(&client->dev, "vdd"); 1038842ff286SAnthony Kim if (IS_ERR(ts->vcc_vdd)) 1039842ff286SAnthony Kim return PTR_ERR(ts->vcc_vdd); 1040842ff286SAnthony Kim 1041842ff286SAnthony Kim ts->vcc_vid = devm_regulator_get(&client->dev, "vid"); 1042842ff286SAnthony Kim if (IS_ERR(ts->vcc_vid)) 1043842ff286SAnthony Kim return PTR_ERR(ts->vcc_vid); 1044842ff286SAnthony Kim 1045842ff286SAnthony Kim ts->reset_gpio = devm_gpiod_get_optional(&client->dev, 1046842ff286SAnthony Kim "reset", GPIOD_OUT_HIGH); 1047842ff286SAnthony Kim if (IS_ERR(ts->reset_gpio)) 1048842ff286SAnthony Kim return PTR_ERR(ts->reset_gpio); 1049842ff286SAnthony Kim 1050842ff286SAnthony Kim error = hideep_power_on(ts); 1051842ff286SAnthony Kim if (error) { 1052842ff286SAnthony Kim dev_err(&client->dev, "power on failed: %d\n", error); 1053842ff286SAnthony Kim return error; 1054842ff286SAnthony Kim } 1055842ff286SAnthony Kim 1056842ff286SAnthony Kim error = devm_add_action_or_reset(&client->dev, hideep_power_off, ts); 1057842ff286SAnthony Kim if (error) 1058842ff286SAnthony Kim return error; 1059842ff286SAnthony Kim 1060842ff286SAnthony Kim error = hideep_load_dwz(ts); 1061842ff286SAnthony Kim if (error) { 1062842ff286SAnthony Kim dev_err(&client->dev, "failed to load dwz: %d", error); 1063842ff286SAnthony Kim return error; 1064842ff286SAnthony Kim } 1065842ff286SAnthony Kim 1066842ff286SAnthony Kim error = hideep_init_input(ts); 1067842ff286SAnthony Kim if (error) 1068842ff286SAnthony Kim return error; 1069842ff286SAnthony Kim 1070842ff286SAnthony Kim error = devm_request_threaded_irq(&client->dev, client->irq, 1071842ff286SAnthony Kim NULL, hideep_irq, IRQF_ONESHOT, 1072842ff286SAnthony Kim client->name, ts); 1073842ff286SAnthony Kim if (error) { 1074842ff286SAnthony Kim dev_err(&client->dev, "failed to request irq %d: %d\n", 1075842ff286SAnthony Kim client->irq, error); 1076842ff286SAnthony Kim return error; 1077842ff286SAnthony Kim } 1078842ff286SAnthony Kim 1079842ff286SAnthony Kim error = devm_device_add_group(&client->dev, &hideep_ts_attr_group); 1080842ff286SAnthony Kim if (error) { 1081842ff286SAnthony Kim dev_err(&client->dev, 1082842ff286SAnthony Kim "failed to add sysfs attributes: %d\n", error); 1083842ff286SAnthony Kim return error; 1084842ff286SAnthony Kim } 1085842ff286SAnthony Kim 1086842ff286SAnthony Kim return 0; 1087842ff286SAnthony Kim } 1088842ff286SAnthony Kim 1089842ff286SAnthony Kim static const struct i2c_device_id hideep_i2c_id[] = { 1090842ff286SAnthony Kim { HIDEEP_I2C_NAME, 0 }, 1091842ff286SAnthony Kim { } 1092842ff286SAnthony Kim }; 1093842ff286SAnthony Kim MODULE_DEVICE_TABLE(i2c, hideep_i2c_id); 1094842ff286SAnthony Kim 1095842ff286SAnthony Kim #ifdef CONFIG_ACPI 1096842ff286SAnthony Kim static const struct acpi_device_id hideep_acpi_id[] = { 1097842ff286SAnthony Kim { "HIDP0001", 0 }, 1098842ff286SAnthony Kim { } 1099842ff286SAnthony Kim }; 1100842ff286SAnthony Kim MODULE_DEVICE_TABLE(acpi, hideep_acpi_id); 1101842ff286SAnthony Kim #endif 1102842ff286SAnthony Kim 1103842ff286SAnthony Kim #ifdef CONFIG_OF 1104842ff286SAnthony Kim static const struct of_device_id hideep_match_table[] = { 1105842ff286SAnthony Kim { .compatible = "hideep,hideep-ts" }, 1106842ff286SAnthony Kim { } 1107842ff286SAnthony Kim }; 1108842ff286SAnthony Kim MODULE_DEVICE_TABLE(of, hideep_match_table); 1109842ff286SAnthony Kim #endif 1110842ff286SAnthony Kim 1111842ff286SAnthony Kim static struct i2c_driver hideep_driver = { 1112842ff286SAnthony Kim .driver = { 1113842ff286SAnthony Kim .name = HIDEEP_I2C_NAME, 1114842ff286SAnthony Kim .of_match_table = of_match_ptr(hideep_match_table), 1115842ff286SAnthony Kim .acpi_match_table = ACPI_PTR(hideep_acpi_id), 1116311fd6b0SJonathan Cameron .pm = pm_sleep_ptr(&hideep_pm_ops), 1117842ff286SAnthony Kim }, 1118842ff286SAnthony Kim .id_table = hideep_i2c_id, 1119d4be9206SUwe Kleine-König .probe_new = hideep_probe, 1120842ff286SAnthony Kim }; 1121842ff286SAnthony Kim 1122842ff286SAnthony Kim module_i2c_driver(hideep_driver); 1123842ff286SAnthony Kim 1124842ff286SAnthony Kim MODULE_DESCRIPTION("Driver for HiDeep Touchscreen Controller"); 1125842ff286SAnthony Kim MODULE_AUTHOR("anthony.kim@hideep.com"); 1126842ff286SAnthony Kim MODULE_LICENSE("GPL v2"); 1127