17268a4f8SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only 2842ff286SAnthony Kim /* 3842ff286SAnthony Kim * Copyright (C) 2012-2017 Hideep, Inc. 4842ff286SAnthony Kim */ 5842ff286SAnthony Kim 6842ff286SAnthony Kim #include <linux/module.h> 7842ff286SAnthony Kim #include <linux/of.h> 8842ff286SAnthony Kim #include <linux/firmware.h> 9842ff286SAnthony Kim #include <linux/delay.h> 108b7e9d9eSAnthony Kim #include <linux/gpio/consumer.h> 11842ff286SAnthony Kim #include <linux/i2c.h> 12842ff286SAnthony Kim #include <linux/acpi.h> 13842ff286SAnthony Kim #include <linux/interrupt.h> 14842ff286SAnthony Kim #include <linux/regmap.h> 15842ff286SAnthony Kim #include <linux/sysfs.h> 16842ff286SAnthony Kim #include <linux/input.h> 17842ff286SAnthony Kim #include <linux/input/mt.h> 18842ff286SAnthony Kim #include <linux/input/touchscreen.h> 19842ff286SAnthony Kim #include <linux/regulator/consumer.h> 20842ff286SAnthony Kim #include <asm/unaligned.h> 21842ff286SAnthony Kim 22842ff286SAnthony Kim #define HIDEEP_TS_NAME "HiDeep Touchscreen" 23842ff286SAnthony Kim #define HIDEEP_I2C_NAME "hideep_ts" 24842ff286SAnthony Kim 25842ff286SAnthony Kim #define HIDEEP_MT_MAX 10 26842ff286SAnthony Kim #define HIDEEP_KEY_MAX 3 27842ff286SAnthony Kim 28842ff286SAnthony Kim /* count(2) + touch data(100) + key data(6) */ 29842ff286SAnthony Kim #define HIDEEP_MAX_EVENT 108UL 30842ff286SAnthony Kim 31842ff286SAnthony Kim #define HIDEEP_TOUCH_EVENT_INDEX 2 32842ff286SAnthony Kim #define HIDEEP_KEY_EVENT_INDEX 102 33842ff286SAnthony Kim 34842ff286SAnthony Kim /* Touch & key event */ 35842ff286SAnthony Kim #define HIDEEP_EVENT_ADDR 0x240 36842ff286SAnthony Kim 37842ff286SAnthony Kim /* command list */ 38*007e50ebSHans de Goede #define HIDEEP_WORK_MODE 0x081e 39842ff286SAnthony Kim #define HIDEEP_RESET_CMD 0x9800 40842ff286SAnthony Kim 41842ff286SAnthony Kim /* event bit */ 42842ff286SAnthony Kim #define HIDEEP_MT_RELEASED BIT(4) 43842ff286SAnthony Kim #define HIDEEP_KEY_PRESSED BIT(7) 44842ff286SAnthony Kim #define HIDEEP_KEY_FIRST_PRESSED BIT(8) 45842ff286SAnthony Kim #define HIDEEP_KEY_PRESSED_MASK (HIDEEP_KEY_PRESSED | \ 46842ff286SAnthony Kim HIDEEP_KEY_FIRST_PRESSED) 47842ff286SAnthony Kim 48842ff286SAnthony Kim #define HIDEEP_KEY_IDX_MASK 0x0f 49842ff286SAnthony Kim 50842ff286SAnthony Kim /* For NVM */ 51842ff286SAnthony Kim #define HIDEEP_YRAM_BASE 0x40000000 52842ff286SAnthony Kim #define HIDEEP_PERIPHERAL_BASE 0x50000000 53842ff286SAnthony Kim #define HIDEEP_ESI_BASE (HIDEEP_PERIPHERAL_BASE + 0x00000000) 54842ff286SAnthony Kim #define HIDEEP_FLASH_BASE (HIDEEP_PERIPHERAL_BASE + 0x01000000) 55842ff286SAnthony Kim #define HIDEEP_SYSCON_BASE (HIDEEP_PERIPHERAL_BASE + 0x02000000) 56842ff286SAnthony Kim 57842ff286SAnthony Kim #define HIDEEP_SYSCON_MOD_CON (HIDEEP_SYSCON_BASE + 0x0000) 58842ff286SAnthony Kim #define HIDEEP_SYSCON_SPC_CON (HIDEEP_SYSCON_BASE + 0x0004) 59842ff286SAnthony Kim #define HIDEEP_SYSCON_CLK_CON (HIDEEP_SYSCON_BASE + 0x0008) 60842ff286SAnthony Kim #define HIDEEP_SYSCON_CLK_ENA (HIDEEP_SYSCON_BASE + 0x000C) 61842ff286SAnthony Kim #define HIDEEP_SYSCON_RST_CON (HIDEEP_SYSCON_BASE + 0x0010) 62842ff286SAnthony Kim #define HIDEEP_SYSCON_WDT_CON (HIDEEP_SYSCON_BASE + 0x0014) 63842ff286SAnthony Kim #define HIDEEP_SYSCON_WDT_CNT (HIDEEP_SYSCON_BASE + 0x0018) 64842ff286SAnthony Kim #define HIDEEP_SYSCON_PWR_CON (HIDEEP_SYSCON_BASE + 0x0020) 65842ff286SAnthony Kim #define HIDEEP_SYSCON_PGM_ID (HIDEEP_SYSCON_BASE + 0x00F4) 66842ff286SAnthony Kim 67842ff286SAnthony Kim #define HIDEEP_FLASH_CON (HIDEEP_FLASH_BASE + 0x0000) 68842ff286SAnthony Kim #define HIDEEP_FLASH_STA (HIDEEP_FLASH_BASE + 0x0004) 69842ff286SAnthony Kim #define HIDEEP_FLASH_CFG (HIDEEP_FLASH_BASE + 0x0008) 70842ff286SAnthony Kim #define HIDEEP_FLASH_TIM (HIDEEP_FLASH_BASE + 0x000C) 71842ff286SAnthony Kim #define HIDEEP_FLASH_CACHE_CFG (HIDEEP_FLASH_BASE + 0x0010) 72842ff286SAnthony Kim #define HIDEEP_FLASH_PIO_SIG (HIDEEP_FLASH_BASE + 0x400000) 73842ff286SAnthony Kim 74842ff286SAnthony Kim #define HIDEEP_ESI_TX_INVALID (HIDEEP_ESI_BASE + 0x0008) 75842ff286SAnthony Kim 76842ff286SAnthony Kim #define HIDEEP_PERASE 0x00040000 77842ff286SAnthony Kim #define HIDEEP_WRONLY 0x00100000 78842ff286SAnthony Kim 79842ff286SAnthony Kim #define HIDEEP_NVM_MASK_OFS 0x0000000C 80842ff286SAnthony Kim #define HIDEEP_NVM_DEFAULT_PAGE 0 81842ff286SAnthony Kim #define HIDEEP_NVM_SFR_WPAGE 1 82842ff286SAnthony Kim #define HIDEEP_NVM_SFR_RPAGE 2 83842ff286SAnthony Kim 84842ff286SAnthony Kim #define HIDEEP_PIO_SIG 0x00400000 85842ff286SAnthony Kim #define HIDEEP_PROT_MODE 0x03400000 86842ff286SAnthony Kim 87842ff286SAnthony Kim #define HIDEEP_NVM_PAGE_SIZE 128 88842ff286SAnthony Kim 89842ff286SAnthony Kim #define HIDEEP_DWZ_INFO 0x000002C0 90842ff286SAnthony Kim 91842ff286SAnthony Kim struct hideep_event { 92842ff286SAnthony Kim __le16 x; 93842ff286SAnthony Kim __le16 y; 94842ff286SAnthony Kim __le16 z; 95842ff286SAnthony Kim u8 w; 96842ff286SAnthony Kim u8 flag; 97842ff286SAnthony Kim u8 type; 98842ff286SAnthony Kim u8 index; 99842ff286SAnthony Kim }; 100842ff286SAnthony Kim 101842ff286SAnthony Kim struct dwz_info { 102842ff286SAnthony Kim __be32 code_start; 103842ff286SAnthony Kim u8 code_crc[12]; 104842ff286SAnthony Kim 105842ff286SAnthony Kim __be32 c_code_start; 106842ff286SAnthony Kim __be16 gen_ver; 107842ff286SAnthony Kim __be16 c_code_len; 108842ff286SAnthony Kim 109842ff286SAnthony Kim __be32 vr_start; 110842ff286SAnthony Kim __be16 rsv0; 111842ff286SAnthony Kim __be16 vr_len; 112842ff286SAnthony Kim 113842ff286SAnthony Kim __be32 ft_start; 114842ff286SAnthony Kim __be16 vr_version; 115842ff286SAnthony Kim __be16 ft_len; 116842ff286SAnthony Kim 117842ff286SAnthony Kim __be16 core_ver; 118842ff286SAnthony Kim __be16 boot_ver; 119842ff286SAnthony Kim 120842ff286SAnthony Kim __be16 release_ver; 121842ff286SAnthony Kim __be16 custom_ver; 122842ff286SAnthony Kim 123842ff286SAnthony Kim u8 factory_id; 124842ff286SAnthony Kim u8 panel_type; 125842ff286SAnthony Kim u8 model_name[6]; 126842ff286SAnthony Kim 127842ff286SAnthony Kim __be16 extra_option; 128842ff286SAnthony Kim __be16 product_code; 129842ff286SAnthony Kim 130842ff286SAnthony Kim __be16 vendor_id; 131842ff286SAnthony Kim __be16 product_id; 132842ff286SAnthony Kim }; 133842ff286SAnthony Kim 134842ff286SAnthony Kim struct pgm_packet { 135842ff286SAnthony Kim struct { 136842ff286SAnthony Kim u8 unused[3]; 137842ff286SAnthony Kim u8 len; 138842ff286SAnthony Kim __be32 addr; 139842ff286SAnthony Kim } header; 140842ff286SAnthony Kim __be32 payload[HIDEEP_NVM_PAGE_SIZE / sizeof(__be32)]; 141842ff286SAnthony Kim }; 142842ff286SAnthony Kim 143842ff286SAnthony Kim #define HIDEEP_XFER_BUF_SIZE sizeof(struct pgm_packet) 144842ff286SAnthony Kim 145842ff286SAnthony Kim struct hideep_ts { 146842ff286SAnthony Kim struct i2c_client *client; 147842ff286SAnthony Kim struct input_dev *input_dev; 148842ff286SAnthony Kim struct regmap *reg; 149842ff286SAnthony Kim 150842ff286SAnthony Kim struct touchscreen_properties prop; 151842ff286SAnthony Kim 152842ff286SAnthony Kim struct gpio_desc *reset_gpio; 153842ff286SAnthony Kim 154842ff286SAnthony Kim struct regulator *vcc_vdd; 155842ff286SAnthony Kim struct regulator *vcc_vid; 156842ff286SAnthony Kim 157842ff286SAnthony Kim struct mutex dev_mutex; 158842ff286SAnthony Kim 159842ff286SAnthony Kim u32 tch_count; 160842ff286SAnthony Kim u32 lpm_count; 161842ff286SAnthony Kim 162842ff286SAnthony Kim /* 163842ff286SAnthony Kim * Data buffer to read packet from the device (contacts and key 164842ff286SAnthony Kim * states). We align it on double-word boundary to keep word-sized 165842ff286SAnthony Kim * fields in contact data and double-word-sized fields in program 166842ff286SAnthony Kim * packet aligned. 167842ff286SAnthony Kim */ 168842ff286SAnthony Kim u8 xfer_buf[HIDEEP_XFER_BUF_SIZE] __aligned(4); 169842ff286SAnthony Kim 170842ff286SAnthony Kim int key_num; 171842ff286SAnthony Kim u32 key_codes[HIDEEP_KEY_MAX]; 172842ff286SAnthony Kim 173842ff286SAnthony Kim struct dwz_info dwz_info; 174842ff286SAnthony Kim 175842ff286SAnthony Kim unsigned int fw_size; 176842ff286SAnthony Kim u32 nvm_mask; 177842ff286SAnthony Kim }; 178842ff286SAnthony Kim 179842ff286SAnthony Kim static int hideep_pgm_w_mem(struct hideep_ts *ts, u32 addr, 180842ff286SAnthony Kim const __be32 *data, size_t count) 181842ff286SAnthony Kim { 182842ff286SAnthony Kim struct pgm_packet *packet = (void *)ts->xfer_buf; 183842ff286SAnthony Kim size_t len = count * sizeof(*data); 184842ff286SAnthony Kim struct i2c_msg msg = { 185842ff286SAnthony Kim .addr = ts->client->addr, 186842ff286SAnthony Kim .len = len + sizeof(packet->header.len) + 187842ff286SAnthony Kim sizeof(packet->header.addr), 188842ff286SAnthony Kim .buf = &packet->header.len, 189842ff286SAnthony Kim }; 190842ff286SAnthony Kim int ret; 191842ff286SAnthony Kim 192842ff286SAnthony Kim if (len > HIDEEP_NVM_PAGE_SIZE) 193842ff286SAnthony Kim return -EINVAL; 194842ff286SAnthony Kim 195842ff286SAnthony Kim packet->header.len = 0x80 | (count - 1); 196842ff286SAnthony Kim packet->header.addr = cpu_to_be32(addr); 197842ff286SAnthony Kim memcpy(packet->payload, data, len); 198842ff286SAnthony Kim 199842ff286SAnthony Kim ret = i2c_transfer(ts->client->adapter, &msg, 1); 200842ff286SAnthony Kim if (ret != 1) 201842ff286SAnthony Kim return ret < 0 ? ret : -EIO; 202842ff286SAnthony Kim 203842ff286SAnthony Kim return 0; 204842ff286SAnthony Kim } 205842ff286SAnthony Kim 206842ff286SAnthony Kim static int hideep_pgm_r_mem(struct hideep_ts *ts, u32 addr, 207842ff286SAnthony Kim __be32 *data, size_t count) 208842ff286SAnthony Kim { 209842ff286SAnthony Kim struct pgm_packet *packet = (void *)ts->xfer_buf; 210842ff286SAnthony Kim size_t len = count * sizeof(*data); 211842ff286SAnthony Kim struct i2c_msg msg[] = { 212842ff286SAnthony Kim { 213842ff286SAnthony Kim .addr = ts->client->addr, 214842ff286SAnthony Kim .len = sizeof(packet->header.len) + 215842ff286SAnthony Kim sizeof(packet->header.addr), 216842ff286SAnthony Kim .buf = &packet->header.len, 217842ff286SAnthony Kim }, 218842ff286SAnthony Kim { 219842ff286SAnthony Kim .addr = ts->client->addr, 220842ff286SAnthony Kim .flags = I2C_M_RD, 221842ff286SAnthony Kim .len = len, 222842ff286SAnthony Kim .buf = (u8 *)data, 223842ff286SAnthony Kim }, 224842ff286SAnthony Kim }; 225842ff286SAnthony Kim int ret; 226842ff286SAnthony Kim 227842ff286SAnthony Kim if (len > HIDEEP_NVM_PAGE_SIZE) 228842ff286SAnthony Kim return -EINVAL; 229842ff286SAnthony Kim 230842ff286SAnthony Kim packet->header.len = count - 1; 231842ff286SAnthony Kim packet->header.addr = cpu_to_be32(addr); 232842ff286SAnthony Kim 233842ff286SAnthony Kim ret = i2c_transfer(ts->client->adapter, msg, ARRAY_SIZE(msg)); 234842ff286SAnthony Kim if (ret != ARRAY_SIZE(msg)) 235842ff286SAnthony Kim return ret < 0 ? ret : -EIO; 236842ff286SAnthony Kim 237842ff286SAnthony Kim return 0; 238842ff286SAnthony Kim } 239842ff286SAnthony Kim 240842ff286SAnthony Kim static int hideep_pgm_r_reg(struct hideep_ts *ts, u32 addr, u32 *val) 241842ff286SAnthony Kim { 242842ff286SAnthony Kim __be32 data; 243842ff286SAnthony Kim int error; 244842ff286SAnthony Kim 245842ff286SAnthony Kim error = hideep_pgm_r_mem(ts, addr, &data, 1); 246842ff286SAnthony Kim if (error) { 247842ff286SAnthony Kim dev_err(&ts->client->dev, 248842ff286SAnthony Kim "read of register %#08x failed: %d\n", 249842ff286SAnthony Kim addr, error); 250842ff286SAnthony Kim return error; 251842ff286SAnthony Kim } 252842ff286SAnthony Kim 253842ff286SAnthony Kim *val = be32_to_cpu(data); 254842ff286SAnthony Kim return 0; 255842ff286SAnthony Kim } 256842ff286SAnthony Kim 257842ff286SAnthony Kim static int hideep_pgm_w_reg(struct hideep_ts *ts, u32 addr, u32 val) 258842ff286SAnthony Kim { 259842ff286SAnthony Kim __be32 data = cpu_to_be32(val); 260842ff286SAnthony Kim int error; 261842ff286SAnthony Kim 262842ff286SAnthony Kim error = hideep_pgm_w_mem(ts, addr, &data, 1); 263842ff286SAnthony Kim if (error) { 264842ff286SAnthony Kim dev_err(&ts->client->dev, 265842ff286SAnthony Kim "write to register %#08x (%#08x) failed: %d\n", 266842ff286SAnthony Kim addr, val, error); 267842ff286SAnthony Kim return error; 268842ff286SAnthony Kim } 269842ff286SAnthony Kim 270842ff286SAnthony Kim return 0; 271842ff286SAnthony Kim } 272842ff286SAnthony Kim 273842ff286SAnthony Kim #define SW_RESET_IN_PGM(clk) \ 274842ff286SAnthony Kim { \ 27510b0a455SHans de Goede __be32 data = cpu_to_be32(0x01); \ 276842ff286SAnthony Kim hideep_pgm_w_reg(ts, HIDEEP_SYSCON_WDT_CNT, (clk)); \ 277842ff286SAnthony Kim hideep_pgm_w_reg(ts, HIDEEP_SYSCON_WDT_CON, 0x03); \ 27810b0a455SHans de Goede /* \ 27910b0a455SHans de Goede * The first write may already cause a reset, use a raw \ 28010b0a455SHans de Goede * write for the second write to avoid error logging. \ 28110b0a455SHans de Goede */ \ 28210b0a455SHans de Goede hideep_pgm_w_mem(ts, HIDEEP_SYSCON_WDT_CON, &data, 1); \ 283842ff286SAnthony Kim } 284842ff286SAnthony Kim 285842ff286SAnthony Kim #define SET_FLASH_PIO(ce) \ 286842ff286SAnthony Kim hideep_pgm_w_reg(ts, HIDEEP_FLASH_CON, \ 287842ff286SAnthony Kim 0x01 | ((ce) << 1)) 288842ff286SAnthony Kim 289842ff286SAnthony Kim #define SET_PIO_SIG(x, y) \ 290842ff286SAnthony Kim hideep_pgm_w_reg(ts, HIDEEP_FLASH_PIO_SIG + (x), (y)) 291842ff286SAnthony Kim 292842ff286SAnthony Kim #define SET_FLASH_HWCONTROL() \ 293842ff286SAnthony Kim hideep_pgm_w_reg(ts, HIDEEP_FLASH_CON, 0x00) 294842ff286SAnthony Kim 295842ff286SAnthony Kim #define NVM_W_SFR(x, y) \ 296842ff286SAnthony Kim { \ 297842ff286SAnthony Kim SET_FLASH_PIO(1); \ 298842ff286SAnthony Kim SET_PIO_SIG(x, y); \ 299842ff286SAnthony Kim SET_FLASH_PIO(0); \ 300842ff286SAnthony Kim } 301842ff286SAnthony Kim 302842ff286SAnthony Kim static void hideep_pgm_set(struct hideep_ts *ts) 303842ff286SAnthony Kim { 304842ff286SAnthony Kim hideep_pgm_w_reg(ts, HIDEEP_SYSCON_WDT_CON, 0x00); 305842ff286SAnthony Kim hideep_pgm_w_reg(ts, HIDEEP_SYSCON_SPC_CON, 0x00); 306842ff286SAnthony Kim hideep_pgm_w_reg(ts, HIDEEP_SYSCON_CLK_ENA, 0xFF); 307842ff286SAnthony Kim hideep_pgm_w_reg(ts, HIDEEP_SYSCON_CLK_CON, 0x01); 308842ff286SAnthony Kim hideep_pgm_w_reg(ts, HIDEEP_SYSCON_PWR_CON, 0x01); 309842ff286SAnthony Kim hideep_pgm_w_reg(ts, HIDEEP_FLASH_TIM, 0x03); 310842ff286SAnthony Kim hideep_pgm_w_reg(ts, HIDEEP_FLASH_CACHE_CFG, 0x00); 311842ff286SAnthony Kim } 312842ff286SAnthony Kim 313842ff286SAnthony Kim static int hideep_pgm_get_pattern(struct hideep_ts *ts, u32 *pattern) 314842ff286SAnthony Kim { 315842ff286SAnthony Kim u16 p1 = 0xAF39; 316842ff286SAnthony Kim u16 p2 = 0xDF9D; 317842ff286SAnthony Kim int error; 318842ff286SAnthony Kim 319842ff286SAnthony Kim error = regmap_bulk_write(ts->reg, p1, &p2, 1); 320842ff286SAnthony Kim if (error) { 321842ff286SAnthony Kim dev_err(&ts->client->dev, 322842ff286SAnthony Kim "%s: regmap_bulk_write() failed with %d\n", 323842ff286SAnthony Kim __func__, error); 324842ff286SAnthony Kim return error; 325842ff286SAnthony Kim } 326842ff286SAnthony Kim 327842ff286SAnthony Kim usleep_range(1000, 1100); 328842ff286SAnthony Kim 329842ff286SAnthony Kim /* flush invalid Tx load register */ 330842ff286SAnthony Kim error = hideep_pgm_w_reg(ts, HIDEEP_ESI_TX_INVALID, 0x01); 331842ff286SAnthony Kim if (error) 332842ff286SAnthony Kim return error; 333842ff286SAnthony Kim 334842ff286SAnthony Kim error = hideep_pgm_r_reg(ts, HIDEEP_SYSCON_PGM_ID, pattern); 335842ff286SAnthony Kim if (error) 336842ff286SAnthony Kim return error; 337842ff286SAnthony Kim 338842ff286SAnthony Kim return 0; 339842ff286SAnthony Kim } 340842ff286SAnthony Kim 341842ff286SAnthony Kim static int hideep_enter_pgm(struct hideep_ts *ts) 342842ff286SAnthony Kim { 343842ff286SAnthony Kim int retry_count = 10; 344842ff286SAnthony Kim u32 pattern; 345842ff286SAnthony Kim int error; 346842ff286SAnthony Kim 347842ff286SAnthony Kim while (retry_count--) { 348842ff286SAnthony Kim error = hideep_pgm_get_pattern(ts, &pattern); 349842ff286SAnthony Kim if (error) { 350842ff286SAnthony Kim dev_err(&ts->client->dev, 351842ff286SAnthony Kim "hideep_pgm_get_pattern failed: %d\n", error); 352842ff286SAnthony Kim } else if (pattern != 0x39AF9DDF) { 353842ff286SAnthony Kim dev_err(&ts->client->dev, "%s: bad pattern: %#08x\n", 354842ff286SAnthony Kim __func__, pattern); 355842ff286SAnthony Kim } else { 356842ff286SAnthony Kim dev_dbg(&ts->client->dev, "found magic code"); 357842ff286SAnthony Kim 358842ff286SAnthony Kim hideep_pgm_set(ts); 359842ff286SAnthony Kim usleep_range(1000, 1100); 360842ff286SAnthony Kim 361842ff286SAnthony Kim return 0; 362842ff286SAnthony Kim } 363842ff286SAnthony Kim } 364842ff286SAnthony Kim 365842ff286SAnthony Kim dev_err(&ts->client->dev, "failed to enter pgm mode\n"); 366842ff286SAnthony Kim SW_RESET_IN_PGM(1000); 367842ff286SAnthony Kim return -EIO; 368842ff286SAnthony Kim } 369842ff286SAnthony Kim 370cac7100dSYizhuo Zhai static int hideep_nvm_unlock(struct hideep_ts *ts) 371842ff286SAnthony Kim { 372842ff286SAnthony Kim u32 unmask_code; 373cac7100dSYizhuo Zhai int error; 374842ff286SAnthony Kim 375842ff286SAnthony Kim hideep_pgm_w_reg(ts, HIDEEP_FLASH_CFG, HIDEEP_NVM_SFR_RPAGE); 376cac7100dSYizhuo Zhai error = hideep_pgm_r_reg(ts, 0x0000000C, &unmask_code); 377842ff286SAnthony Kim hideep_pgm_w_reg(ts, HIDEEP_FLASH_CFG, HIDEEP_NVM_DEFAULT_PAGE); 378cac7100dSYizhuo Zhai if (error) 379cac7100dSYizhuo Zhai return error; 380842ff286SAnthony Kim 381842ff286SAnthony Kim /* make it unprotected code */ 382842ff286SAnthony Kim unmask_code &= ~HIDEEP_PROT_MODE; 383842ff286SAnthony Kim 384842ff286SAnthony Kim /* compare unmask code */ 385842ff286SAnthony Kim if (unmask_code != ts->nvm_mask) 386842ff286SAnthony Kim dev_warn(&ts->client->dev, 387842ff286SAnthony Kim "read mask code different %#08x vs %#08x", 388842ff286SAnthony Kim unmask_code, ts->nvm_mask); 389842ff286SAnthony Kim 390842ff286SAnthony Kim hideep_pgm_w_reg(ts, HIDEEP_FLASH_CFG, HIDEEP_NVM_SFR_WPAGE); 391842ff286SAnthony Kim SET_FLASH_PIO(0); 392842ff286SAnthony Kim 393842ff286SAnthony Kim NVM_W_SFR(HIDEEP_NVM_MASK_OFS, ts->nvm_mask); 394842ff286SAnthony Kim SET_FLASH_HWCONTROL(); 395842ff286SAnthony Kim hideep_pgm_w_reg(ts, HIDEEP_FLASH_CFG, HIDEEP_NVM_DEFAULT_PAGE); 396cac7100dSYizhuo Zhai 397cac7100dSYizhuo Zhai return 0; 398842ff286SAnthony Kim } 399842ff286SAnthony Kim 400842ff286SAnthony Kim static int hideep_check_status(struct hideep_ts *ts) 401842ff286SAnthony Kim { 402842ff286SAnthony Kim int time_out = 100; 403842ff286SAnthony Kim int status; 404842ff286SAnthony Kim int error; 405842ff286SAnthony Kim 406842ff286SAnthony Kim while (time_out--) { 407842ff286SAnthony Kim error = hideep_pgm_r_reg(ts, HIDEEP_FLASH_STA, &status); 408842ff286SAnthony Kim if (!error && status) 409842ff286SAnthony Kim return 0; 410842ff286SAnthony Kim 411842ff286SAnthony Kim usleep_range(1000, 1100); 412842ff286SAnthony Kim } 413842ff286SAnthony Kim 414842ff286SAnthony Kim return -ETIMEDOUT; 415842ff286SAnthony Kim } 416842ff286SAnthony Kim 417842ff286SAnthony Kim static int hideep_program_page(struct hideep_ts *ts, u32 addr, 418842ff286SAnthony Kim const __be32 *ucode, size_t xfer_count) 419842ff286SAnthony Kim { 420842ff286SAnthony Kim u32 val; 421842ff286SAnthony Kim int error; 422842ff286SAnthony Kim 423842ff286SAnthony Kim error = hideep_check_status(ts); 424842ff286SAnthony Kim if (error) 425842ff286SAnthony Kim return -EBUSY; 426842ff286SAnthony Kim 427842ff286SAnthony Kim addr &= ~(HIDEEP_NVM_PAGE_SIZE - 1); 428842ff286SAnthony Kim 429842ff286SAnthony Kim SET_FLASH_PIO(0); 430842ff286SAnthony Kim SET_FLASH_PIO(1); 431842ff286SAnthony Kim 432842ff286SAnthony Kim /* erase page */ 433842ff286SAnthony Kim SET_PIO_SIG(HIDEEP_PERASE | addr, 0xFFFFFFFF); 434842ff286SAnthony Kim 435842ff286SAnthony Kim SET_FLASH_PIO(0); 436842ff286SAnthony Kim 437842ff286SAnthony Kim error = hideep_check_status(ts); 438842ff286SAnthony Kim if (error) 439842ff286SAnthony Kim return -EBUSY; 440842ff286SAnthony Kim 441842ff286SAnthony Kim /* write page */ 442842ff286SAnthony Kim SET_FLASH_PIO(1); 443842ff286SAnthony Kim 444842ff286SAnthony Kim val = be32_to_cpu(ucode[0]); 445842ff286SAnthony Kim SET_PIO_SIG(HIDEEP_WRONLY | addr, val); 446842ff286SAnthony Kim 447842ff286SAnthony Kim hideep_pgm_w_mem(ts, HIDEEP_FLASH_PIO_SIG | HIDEEP_WRONLY, 448842ff286SAnthony Kim ucode, xfer_count); 449842ff286SAnthony Kim 450842ff286SAnthony Kim val = be32_to_cpu(ucode[xfer_count - 1]); 451842ff286SAnthony Kim SET_PIO_SIG(124, val); 452842ff286SAnthony Kim 453842ff286SAnthony Kim SET_FLASH_PIO(0); 454842ff286SAnthony Kim 455842ff286SAnthony Kim usleep_range(1000, 1100); 456842ff286SAnthony Kim 457842ff286SAnthony Kim error = hideep_check_status(ts); 458842ff286SAnthony Kim if (error) 459842ff286SAnthony Kim return -EBUSY; 460842ff286SAnthony Kim 461842ff286SAnthony Kim SET_FLASH_HWCONTROL(); 462842ff286SAnthony Kim 463842ff286SAnthony Kim return 0; 464842ff286SAnthony Kim } 465842ff286SAnthony Kim 466842ff286SAnthony Kim static int hideep_program_nvm(struct hideep_ts *ts, 467842ff286SAnthony Kim const __be32 *ucode, size_t ucode_len) 468842ff286SAnthony Kim { 469842ff286SAnthony Kim struct pgm_packet *packet_r = (void *)ts->xfer_buf; 470842ff286SAnthony Kim __be32 *current_ucode = packet_r->payload; 471842ff286SAnthony Kim size_t xfer_len; 472842ff286SAnthony Kim size_t xfer_count; 473842ff286SAnthony Kim u32 addr = 0; 474842ff286SAnthony Kim int error; 475842ff286SAnthony Kim 476cac7100dSYizhuo Zhai error = hideep_nvm_unlock(ts); 477cac7100dSYizhuo Zhai if (error) 478cac7100dSYizhuo Zhai return error; 479842ff286SAnthony Kim 480842ff286SAnthony Kim while (ucode_len > 0) { 481842ff286SAnthony Kim xfer_len = min_t(size_t, ucode_len, HIDEEP_NVM_PAGE_SIZE); 482842ff286SAnthony Kim xfer_count = xfer_len / sizeof(*ucode); 483842ff286SAnthony Kim 484842ff286SAnthony Kim error = hideep_pgm_r_mem(ts, 0x00000000 + addr, 485842ff286SAnthony Kim current_ucode, xfer_count); 486842ff286SAnthony Kim if (error) { 487842ff286SAnthony Kim dev_err(&ts->client->dev, 488842ff286SAnthony Kim "%s: failed to read page at offset %#08x: %d\n", 489842ff286SAnthony Kim __func__, addr, error); 490842ff286SAnthony Kim return error; 491842ff286SAnthony Kim } 492842ff286SAnthony Kim 493842ff286SAnthony Kim /* See if the page needs updating */ 494842ff286SAnthony Kim if (memcmp(ucode, current_ucode, xfer_len)) { 495842ff286SAnthony Kim error = hideep_program_page(ts, addr, 496842ff286SAnthony Kim ucode, xfer_count); 497842ff286SAnthony Kim if (error) { 498842ff286SAnthony Kim dev_err(&ts->client->dev, 499842ff286SAnthony Kim "%s: iwrite failure @%#08x: %d\n", 500842ff286SAnthony Kim __func__, addr, error); 501842ff286SAnthony Kim return error; 502842ff286SAnthony Kim } 503842ff286SAnthony Kim 504842ff286SAnthony Kim usleep_range(1000, 1100); 505842ff286SAnthony Kim } 506842ff286SAnthony Kim 507842ff286SAnthony Kim ucode += xfer_count; 508842ff286SAnthony Kim addr += xfer_len; 509842ff286SAnthony Kim ucode_len -= xfer_len; 510842ff286SAnthony Kim } 511842ff286SAnthony Kim 512842ff286SAnthony Kim return 0; 513842ff286SAnthony Kim } 514842ff286SAnthony Kim 515842ff286SAnthony Kim static int hideep_verify_nvm(struct hideep_ts *ts, 516842ff286SAnthony Kim const __be32 *ucode, size_t ucode_len) 517842ff286SAnthony Kim { 518842ff286SAnthony Kim struct pgm_packet *packet_r = (void *)ts->xfer_buf; 519842ff286SAnthony Kim __be32 *current_ucode = packet_r->payload; 520842ff286SAnthony Kim size_t xfer_len; 521842ff286SAnthony Kim size_t xfer_count; 522842ff286SAnthony Kim u32 addr = 0; 523842ff286SAnthony Kim int i; 524842ff286SAnthony Kim int error; 525842ff286SAnthony Kim 526842ff286SAnthony Kim while (ucode_len > 0) { 527842ff286SAnthony Kim xfer_len = min_t(size_t, ucode_len, HIDEEP_NVM_PAGE_SIZE); 528842ff286SAnthony Kim xfer_count = xfer_len / sizeof(*ucode); 529842ff286SAnthony Kim 530842ff286SAnthony Kim error = hideep_pgm_r_mem(ts, 0x00000000 + addr, 531842ff286SAnthony Kim current_ucode, xfer_count); 532842ff286SAnthony Kim if (error) { 533842ff286SAnthony Kim dev_err(&ts->client->dev, 534842ff286SAnthony Kim "%s: failed to read page at offset %#08x: %d\n", 535842ff286SAnthony Kim __func__, addr, error); 536842ff286SAnthony Kim return error; 537842ff286SAnthony Kim } 538842ff286SAnthony Kim 539842ff286SAnthony Kim if (memcmp(ucode, current_ucode, xfer_len)) { 540842ff286SAnthony Kim const u8 *ucode_bytes = (const u8 *)ucode; 541842ff286SAnthony Kim const u8 *current_bytes = (const u8 *)current_ucode; 542842ff286SAnthony Kim 543842ff286SAnthony Kim for (i = 0; i < xfer_len; i++) 544842ff286SAnthony Kim if (ucode_bytes[i] != current_bytes[i]) 545842ff286SAnthony Kim dev_err(&ts->client->dev, 546842ff286SAnthony Kim "%s: mismatch @%#08x: (%#02x vs %#02x)\n", 547842ff286SAnthony Kim __func__, addr + i, 548842ff286SAnthony Kim ucode_bytes[i], 549842ff286SAnthony Kim current_bytes[i]); 550842ff286SAnthony Kim 551842ff286SAnthony Kim return -EIO; 552842ff286SAnthony Kim } 553842ff286SAnthony Kim 554842ff286SAnthony Kim ucode += xfer_count; 555842ff286SAnthony Kim addr += xfer_len; 556842ff286SAnthony Kim ucode_len -= xfer_len; 557842ff286SAnthony Kim } 558842ff286SAnthony Kim 559842ff286SAnthony Kim return 0; 560842ff286SAnthony Kim } 561842ff286SAnthony Kim 562842ff286SAnthony Kim static int hideep_load_dwz(struct hideep_ts *ts) 563842ff286SAnthony Kim { 564842ff286SAnthony Kim u16 product_code; 565842ff286SAnthony Kim int error; 566842ff286SAnthony Kim 567842ff286SAnthony Kim error = hideep_enter_pgm(ts); 568842ff286SAnthony Kim if (error) 569842ff286SAnthony Kim return error; 570842ff286SAnthony Kim 571842ff286SAnthony Kim msleep(50); 572842ff286SAnthony Kim 573842ff286SAnthony Kim error = hideep_pgm_r_mem(ts, HIDEEP_DWZ_INFO, 574842ff286SAnthony Kim (void *)&ts->dwz_info, 575842ff286SAnthony Kim sizeof(ts->dwz_info) / sizeof(__be32)); 576842ff286SAnthony Kim 577842ff286SAnthony Kim SW_RESET_IN_PGM(10); 578842ff286SAnthony Kim msleep(50); 579842ff286SAnthony Kim 580842ff286SAnthony Kim if (error) { 581842ff286SAnthony Kim dev_err(&ts->client->dev, 582842ff286SAnthony Kim "failed to fetch DWZ data: %d\n", error); 583842ff286SAnthony Kim return error; 584842ff286SAnthony Kim } 585842ff286SAnthony Kim 586842ff286SAnthony Kim product_code = be16_to_cpu(ts->dwz_info.product_code); 587842ff286SAnthony Kim 588842ff286SAnthony Kim switch (product_code & 0xF0) { 589842ff286SAnthony Kim case 0x40: 590842ff286SAnthony Kim dev_dbg(&ts->client->dev, "used crimson IC"); 591842ff286SAnthony Kim ts->fw_size = 1024 * 48; 592842ff286SAnthony Kim ts->nvm_mask = 0x00310000; 593842ff286SAnthony Kim break; 594842ff286SAnthony Kim case 0x60: 595842ff286SAnthony Kim dev_dbg(&ts->client->dev, "used lime IC"); 596842ff286SAnthony Kim ts->fw_size = 1024 * 64; 597842ff286SAnthony Kim ts->nvm_mask = 0x0030027B; 598842ff286SAnthony Kim break; 599842ff286SAnthony Kim default: 600842ff286SAnthony Kim dev_err(&ts->client->dev, "product code is wrong: %#04x", 601842ff286SAnthony Kim product_code); 602842ff286SAnthony Kim return -EINVAL; 603842ff286SAnthony Kim } 604842ff286SAnthony Kim 605842ff286SAnthony Kim dev_dbg(&ts->client->dev, "firmware release version: %#04x", 606842ff286SAnthony Kim be16_to_cpu(ts->dwz_info.release_ver)); 607842ff286SAnthony Kim 608842ff286SAnthony Kim return 0; 609842ff286SAnthony Kim } 610842ff286SAnthony Kim 611842ff286SAnthony Kim static int hideep_flash_firmware(struct hideep_ts *ts, 612842ff286SAnthony Kim const __be32 *ucode, size_t ucode_len) 613842ff286SAnthony Kim { 614842ff286SAnthony Kim int retry_cnt = 3; 615842ff286SAnthony Kim int error; 616842ff286SAnthony Kim 617842ff286SAnthony Kim while (retry_cnt--) { 618842ff286SAnthony Kim error = hideep_program_nvm(ts, ucode, ucode_len); 619842ff286SAnthony Kim if (!error) { 620842ff286SAnthony Kim error = hideep_verify_nvm(ts, ucode, ucode_len); 621842ff286SAnthony Kim if (!error) 622842ff286SAnthony Kim return 0; 623842ff286SAnthony Kim } 624842ff286SAnthony Kim } 625842ff286SAnthony Kim 626842ff286SAnthony Kim return error; 627842ff286SAnthony Kim } 628842ff286SAnthony Kim 629842ff286SAnthony Kim static int hideep_update_firmware(struct hideep_ts *ts, 630842ff286SAnthony Kim const __be32 *ucode, size_t ucode_len) 631842ff286SAnthony Kim { 632842ff286SAnthony Kim int error, error2; 633842ff286SAnthony Kim 634842ff286SAnthony Kim dev_dbg(&ts->client->dev, "starting firmware update"); 635842ff286SAnthony Kim 636842ff286SAnthony Kim /* enter program mode */ 637842ff286SAnthony Kim error = hideep_enter_pgm(ts); 638842ff286SAnthony Kim if (error) 639842ff286SAnthony Kim return error; 640842ff286SAnthony Kim 641842ff286SAnthony Kim error = hideep_flash_firmware(ts, ucode, ucode_len); 642842ff286SAnthony Kim if (error) 643842ff286SAnthony Kim dev_err(&ts->client->dev, 644842ff286SAnthony Kim "firmware update failed: %d\n", error); 645842ff286SAnthony Kim else 646842ff286SAnthony Kim dev_dbg(&ts->client->dev, "firmware updated successfully\n"); 647842ff286SAnthony Kim 648842ff286SAnthony Kim SW_RESET_IN_PGM(1000); 649842ff286SAnthony Kim 650842ff286SAnthony Kim error2 = hideep_load_dwz(ts); 651842ff286SAnthony Kim if (error2) 652842ff286SAnthony Kim dev_err(&ts->client->dev, 653842ff286SAnthony Kim "failed to load dwz after firmware update: %d\n", 654842ff286SAnthony Kim error2); 655842ff286SAnthony Kim 656842ff286SAnthony Kim return error ?: error2; 657842ff286SAnthony Kim } 658842ff286SAnthony Kim 659842ff286SAnthony Kim static int hideep_power_on(struct hideep_ts *ts) 660842ff286SAnthony Kim { 661842ff286SAnthony Kim int error = 0; 662842ff286SAnthony Kim 663842ff286SAnthony Kim error = regulator_enable(ts->vcc_vdd); 664842ff286SAnthony Kim if (error) 665842ff286SAnthony Kim dev_err(&ts->client->dev, 666842ff286SAnthony Kim "failed to enable 'vdd' regulator: %d", error); 667842ff286SAnthony Kim 668842ff286SAnthony Kim usleep_range(999, 1000); 669842ff286SAnthony Kim 670842ff286SAnthony Kim error = regulator_enable(ts->vcc_vid); 671842ff286SAnthony Kim if (error) 672842ff286SAnthony Kim dev_err(&ts->client->dev, 673842ff286SAnthony Kim "failed to enable 'vcc_vid' regulator: %d", 674842ff286SAnthony Kim error); 675842ff286SAnthony Kim 676842ff286SAnthony Kim msleep(30); 677842ff286SAnthony Kim 678842ff286SAnthony Kim if (ts->reset_gpio) { 679842ff286SAnthony Kim gpiod_set_value_cansleep(ts->reset_gpio, 0); 680842ff286SAnthony Kim } else { 681842ff286SAnthony Kim error = regmap_write(ts->reg, HIDEEP_RESET_CMD, 0x01); 682842ff286SAnthony Kim if (error) 683842ff286SAnthony Kim dev_err(&ts->client->dev, 684842ff286SAnthony Kim "failed to send 'reset' command: %d\n", error); 685842ff286SAnthony Kim } 686842ff286SAnthony Kim 687842ff286SAnthony Kim msleep(50); 688842ff286SAnthony Kim 689842ff286SAnthony Kim return error; 690842ff286SAnthony Kim } 691842ff286SAnthony Kim 692842ff286SAnthony Kim static void hideep_power_off(void *data) 693842ff286SAnthony Kim { 694842ff286SAnthony Kim struct hideep_ts *ts = data; 695842ff286SAnthony Kim 696842ff286SAnthony Kim if (ts->reset_gpio) 697842ff286SAnthony Kim gpiod_set_value(ts->reset_gpio, 1); 698842ff286SAnthony Kim 699842ff286SAnthony Kim regulator_disable(ts->vcc_vid); 700842ff286SAnthony Kim regulator_disable(ts->vcc_vdd); 701842ff286SAnthony Kim } 702842ff286SAnthony Kim 703842ff286SAnthony Kim #define __GET_MT_TOOL_TYPE(type) ((type) == 0x01 ? MT_TOOL_FINGER : MT_TOOL_PEN) 704842ff286SAnthony Kim 705842ff286SAnthony Kim static void hideep_report_slot(struct input_dev *input, 706842ff286SAnthony Kim const struct hideep_event *event) 707842ff286SAnthony Kim { 708842ff286SAnthony Kim input_mt_slot(input, event->index & 0x0f); 709842ff286SAnthony Kim input_mt_report_slot_state(input, 710842ff286SAnthony Kim __GET_MT_TOOL_TYPE(event->type), 711842ff286SAnthony Kim !(event->flag & HIDEEP_MT_RELEASED)); 712842ff286SAnthony Kim if (!(event->flag & HIDEEP_MT_RELEASED)) { 713842ff286SAnthony Kim input_report_abs(input, ABS_MT_POSITION_X, 714842ff286SAnthony Kim le16_to_cpup(&event->x)); 715842ff286SAnthony Kim input_report_abs(input, ABS_MT_POSITION_Y, 716842ff286SAnthony Kim le16_to_cpup(&event->y)); 717842ff286SAnthony Kim input_report_abs(input, ABS_MT_PRESSURE, 718842ff286SAnthony Kim le16_to_cpup(&event->z)); 719842ff286SAnthony Kim input_report_abs(input, ABS_MT_TOUCH_MAJOR, event->w); 720842ff286SAnthony Kim } 721842ff286SAnthony Kim } 722842ff286SAnthony Kim 723842ff286SAnthony Kim static void hideep_parse_and_report(struct hideep_ts *ts) 724842ff286SAnthony Kim { 725842ff286SAnthony Kim const struct hideep_event *events = 726842ff286SAnthony Kim (void *)&ts->xfer_buf[HIDEEP_TOUCH_EVENT_INDEX]; 727842ff286SAnthony Kim const u8 *keys = &ts->xfer_buf[HIDEEP_KEY_EVENT_INDEX]; 728842ff286SAnthony Kim int touch_count = ts->xfer_buf[0]; 729842ff286SAnthony Kim int key_count = ts->xfer_buf[1] & 0x0f; 730842ff286SAnthony Kim int lpm_count = ts->xfer_buf[1] & 0xf0; 731842ff286SAnthony Kim int i; 732842ff286SAnthony Kim 733842ff286SAnthony Kim /* get touch event count */ 734842ff286SAnthony Kim dev_dbg(&ts->client->dev, "mt = %d, key = %d, lpm = %02x", 735842ff286SAnthony Kim touch_count, key_count, lpm_count); 736842ff286SAnthony Kim 737842ff286SAnthony Kim touch_count = min(touch_count, HIDEEP_MT_MAX); 738842ff286SAnthony Kim for (i = 0; i < touch_count; i++) 739842ff286SAnthony Kim hideep_report_slot(ts->input_dev, events + i); 740842ff286SAnthony Kim 741842ff286SAnthony Kim key_count = min(key_count, HIDEEP_KEY_MAX); 742842ff286SAnthony Kim for (i = 0; i < key_count; i++) { 743842ff286SAnthony Kim u8 key_data = keys[i * 2]; 744842ff286SAnthony Kim 745842ff286SAnthony Kim input_report_key(ts->input_dev, 746842ff286SAnthony Kim ts->key_codes[key_data & HIDEEP_KEY_IDX_MASK], 747842ff286SAnthony Kim key_data & HIDEEP_KEY_PRESSED_MASK); 748842ff286SAnthony Kim } 749842ff286SAnthony Kim 750842ff286SAnthony Kim input_mt_sync_frame(ts->input_dev); 751842ff286SAnthony Kim input_sync(ts->input_dev); 752842ff286SAnthony Kim } 753842ff286SAnthony Kim 754842ff286SAnthony Kim static irqreturn_t hideep_irq(int irq, void *handle) 755842ff286SAnthony Kim { 756842ff286SAnthony Kim struct hideep_ts *ts = handle; 757842ff286SAnthony Kim int error; 758842ff286SAnthony Kim 759842ff286SAnthony Kim BUILD_BUG_ON(HIDEEP_MAX_EVENT > HIDEEP_XFER_BUF_SIZE); 760842ff286SAnthony Kim 761842ff286SAnthony Kim error = regmap_bulk_read(ts->reg, HIDEEP_EVENT_ADDR, 762842ff286SAnthony Kim ts->xfer_buf, HIDEEP_MAX_EVENT / 2); 763842ff286SAnthony Kim if (error) { 764842ff286SAnthony Kim dev_err(&ts->client->dev, "failed to read events: %d\n", error); 765842ff286SAnthony Kim goto out; 766842ff286SAnthony Kim } 767842ff286SAnthony Kim 768842ff286SAnthony Kim hideep_parse_and_report(ts); 769842ff286SAnthony Kim 770842ff286SAnthony Kim out: 771842ff286SAnthony Kim return IRQ_HANDLED; 772842ff286SAnthony Kim } 773842ff286SAnthony Kim 774842ff286SAnthony Kim static int hideep_get_axis_info(struct hideep_ts *ts) 775842ff286SAnthony Kim { 776842ff286SAnthony Kim __le16 val[2]; 777842ff286SAnthony Kim int error; 778842ff286SAnthony Kim 779842ff286SAnthony Kim error = regmap_bulk_read(ts->reg, 0x28, val, ARRAY_SIZE(val)); 780842ff286SAnthony Kim if (error) 781842ff286SAnthony Kim return error; 782842ff286SAnthony Kim 783842ff286SAnthony Kim ts->prop.max_x = le16_to_cpup(val); 784842ff286SAnthony Kim ts->prop.max_y = le16_to_cpup(val + 1); 785842ff286SAnthony Kim 786842ff286SAnthony Kim dev_dbg(&ts->client->dev, "X: %d, Y: %d", 787842ff286SAnthony Kim ts->prop.max_x, ts->prop.max_y); 788842ff286SAnthony Kim 789842ff286SAnthony Kim return 0; 790842ff286SAnthony Kim } 791842ff286SAnthony Kim 792842ff286SAnthony Kim static int hideep_init_input(struct hideep_ts *ts) 793842ff286SAnthony Kim { 794842ff286SAnthony Kim struct device *dev = &ts->client->dev; 795842ff286SAnthony Kim int i; 796842ff286SAnthony Kim int error; 797842ff286SAnthony Kim 798842ff286SAnthony Kim ts->input_dev = devm_input_allocate_device(dev); 799842ff286SAnthony Kim if (!ts->input_dev) { 800842ff286SAnthony Kim dev_err(dev, "failed to allocate input device\n"); 801842ff286SAnthony Kim return -ENOMEM; 802842ff286SAnthony Kim } 803842ff286SAnthony Kim 804842ff286SAnthony Kim ts->input_dev->name = HIDEEP_TS_NAME; 805842ff286SAnthony Kim ts->input_dev->id.bustype = BUS_I2C; 806842ff286SAnthony Kim input_set_drvdata(ts->input_dev, ts); 807842ff286SAnthony Kim 808842ff286SAnthony Kim input_set_capability(ts->input_dev, EV_ABS, ABS_MT_POSITION_X); 809842ff286SAnthony Kim input_set_capability(ts->input_dev, EV_ABS, ABS_MT_POSITION_Y); 810842ff286SAnthony Kim input_set_abs_params(ts->input_dev, ABS_MT_PRESSURE, 0, 65535, 0, 0); 811842ff286SAnthony Kim input_set_abs_params(ts->input_dev, ABS_MT_TOUCH_MAJOR, 0, 255, 0, 0); 812842ff286SAnthony Kim input_set_abs_params(ts->input_dev, ABS_MT_TOOL_TYPE, 813842ff286SAnthony Kim 0, MT_TOOL_MAX, 0, 0); 814842ff286SAnthony Kim touchscreen_parse_properties(ts->input_dev, true, &ts->prop); 815842ff286SAnthony Kim 816842ff286SAnthony Kim if (ts->prop.max_x == 0 || ts->prop.max_y == 0) { 817842ff286SAnthony Kim error = hideep_get_axis_info(ts); 818842ff286SAnthony Kim if (error) 819842ff286SAnthony Kim return error; 820842ff286SAnthony Kim } 821842ff286SAnthony Kim 822842ff286SAnthony Kim error = input_mt_init_slots(ts->input_dev, HIDEEP_MT_MAX, 823842ff286SAnthony Kim INPUT_MT_DIRECT); 824842ff286SAnthony Kim if (error) 825842ff286SAnthony Kim return error; 826842ff286SAnthony Kim 827104c995fSAndy Shevchenko ts->key_num = device_property_count_u32(dev, "linux,keycodes"); 828842ff286SAnthony Kim if (ts->key_num > HIDEEP_KEY_MAX) { 829842ff286SAnthony Kim dev_err(dev, "too many keys defined: %d\n", 830842ff286SAnthony Kim ts->key_num); 831842ff286SAnthony Kim return -EINVAL; 832842ff286SAnthony Kim } 833842ff286SAnthony Kim 834842ff286SAnthony Kim if (ts->key_num <= 0) { 835842ff286SAnthony Kim dev_dbg(dev, 836842ff286SAnthony Kim "missing or malformed 'linux,keycodes' property\n"); 837842ff286SAnthony Kim } else { 838842ff286SAnthony Kim error = device_property_read_u32_array(dev, "linux,keycodes", 839842ff286SAnthony Kim ts->key_codes, 840842ff286SAnthony Kim ts->key_num); 841842ff286SAnthony Kim if (error) { 842842ff286SAnthony Kim dev_dbg(dev, "failed to read keymap: %d", error); 843842ff286SAnthony Kim return error; 844842ff286SAnthony Kim } 845842ff286SAnthony Kim 846842ff286SAnthony Kim if (ts->key_num) { 847842ff286SAnthony Kim ts->input_dev->keycode = ts->key_codes; 848842ff286SAnthony Kim ts->input_dev->keycodesize = sizeof(ts->key_codes[0]); 849842ff286SAnthony Kim ts->input_dev->keycodemax = ts->key_num; 850842ff286SAnthony Kim 851842ff286SAnthony Kim for (i = 0; i < ts->key_num; i++) 852842ff286SAnthony Kim input_set_capability(ts->input_dev, EV_KEY, 853842ff286SAnthony Kim ts->key_codes[i]); 854842ff286SAnthony Kim } 855842ff286SAnthony Kim } 856842ff286SAnthony Kim 857842ff286SAnthony Kim error = input_register_device(ts->input_dev); 858842ff286SAnthony Kim if (error) { 859842ff286SAnthony Kim dev_err(dev, "failed to register input device: %d", error); 860842ff286SAnthony Kim return error; 861842ff286SAnthony Kim } 862842ff286SAnthony Kim 863842ff286SAnthony Kim return 0; 864842ff286SAnthony Kim } 865842ff286SAnthony Kim 866842ff286SAnthony Kim static ssize_t hideep_update_fw(struct device *dev, 867842ff286SAnthony Kim struct device_attribute *attr, 868842ff286SAnthony Kim const char *buf, size_t count) 869842ff286SAnthony Kim { 870842ff286SAnthony Kim struct i2c_client *client = to_i2c_client(dev); 871842ff286SAnthony Kim struct hideep_ts *ts = i2c_get_clientdata(client); 872842ff286SAnthony Kim const struct firmware *fw_entry; 873842ff286SAnthony Kim char *fw_name; 874842ff286SAnthony Kim int mode; 875842ff286SAnthony Kim int error; 876842ff286SAnthony Kim 877842ff286SAnthony Kim error = kstrtoint(buf, 0, &mode); 878842ff286SAnthony Kim if (error) 879842ff286SAnthony Kim return error; 880842ff286SAnthony Kim 881842ff286SAnthony Kim fw_name = kasprintf(GFP_KERNEL, "hideep_ts_%04x.bin", 882842ff286SAnthony Kim be16_to_cpu(ts->dwz_info.product_id)); 883842ff286SAnthony Kim if (!fw_name) 884842ff286SAnthony Kim return -ENOMEM; 885842ff286SAnthony Kim 886842ff286SAnthony Kim error = request_firmware(&fw_entry, fw_name, dev); 887842ff286SAnthony Kim if (error) { 888842ff286SAnthony Kim dev_err(dev, "failed to request firmware %s: %d", 889842ff286SAnthony Kim fw_name, error); 890842ff286SAnthony Kim goto out_free_fw_name; 891842ff286SAnthony Kim } 892842ff286SAnthony Kim 893842ff286SAnthony Kim if (fw_entry->size % sizeof(__be32)) { 894842ff286SAnthony Kim dev_err(dev, "invalid firmware size %zu\n", fw_entry->size); 895842ff286SAnthony Kim error = -EINVAL; 896842ff286SAnthony Kim goto out_release_fw; 897842ff286SAnthony Kim } 898842ff286SAnthony Kim 899842ff286SAnthony Kim if (fw_entry->size > ts->fw_size) { 900842ff286SAnthony Kim dev_err(dev, "fw size (%zu) is too big (memory size %d)\n", 901842ff286SAnthony Kim fw_entry->size, ts->fw_size); 902842ff286SAnthony Kim error = -EFBIG; 903842ff286SAnthony Kim goto out_release_fw; 904842ff286SAnthony Kim } 905842ff286SAnthony Kim 906842ff286SAnthony Kim mutex_lock(&ts->dev_mutex); 907842ff286SAnthony Kim disable_irq(client->irq); 908842ff286SAnthony Kim 909842ff286SAnthony Kim error = hideep_update_firmware(ts, (const __be32 *)fw_entry->data, 910842ff286SAnthony Kim fw_entry->size); 911842ff286SAnthony Kim 912842ff286SAnthony Kim enable_irq(client->irq); 913842ff286SAnthony Kim mutex_unlock(&ts->dev_mutex); 914842ff286SAnthony Kim 915842ff286SAnthony Kim out_release_fw: 916842ff286SAnthony Kim release_firmware(fw_entry); 917842ff286SAnthony Kim out_free_fw_name: 918842ff286SAnthony Kim kfree(fw_name); 919842ff286SAnthony Kim 920842ff286SAnthony Kim return error ?: count; 921842ff286SAnthony Kim } 922842ff286SAnthony Kim 923842ff286SAnthony Kim static ssize_t hideep_fw_version_show(struct device *dev, 924842ff286SAnthony Kim struct device_attribute *attr, char *buf) 925842ff286SAnthony Kim { 926842ff286SAnthony Kim struct i2c_client *client = to_i2c_client(dev); 927842ff286SAnthony Kim struct hideep_ts *ts = i2c_get_clientdata(client); 928842ff286SAnthony Kim ssize_t len; 929842ff286SAnthony Kim 930842ff286SAnthony Kim mutex_lock(&ts->dev_mutex); 931842ff286SAnthony Kim len = scnprintf(buf, PAGE_SIZE, "%04x\n", 932842ff286SAnthony Kim be16_to_cpu(ts->dwz_info.release_ver)); 933842ff286SAnthony Kim mutex_unlock(&ts->dev_mutex); 934842ff286SAnthony Kim 935842ff286SAnthony Kim return len; 936842ff286SAnthony Kim } 937842ff286SAnthony Kim 938842ff286SAnthony Kim static ssize_t hideep_product_id_show(struct device *dev, 939842ff286SAnthony Kim struct device_attribute *attr, char *buf) 940842ff286SAnthony Kim { 941842ff286SAnthony Kim struct i2c_client *client = to_i2c_client(dev); 942842ff286SAnthony Kim struct hideep_ts *ts = i2c_get_clientdata(client); 943842ff286SAnthony Kim ssize_t len; 944842ff286SAnthony Kim 945842ff286SAnthony Kim mutex_lock(&ts->dev_mutex); 946842ff286SAnthony Kim len = scnprintf(buf, PAGE_SIZE, "%04x\n", 947842ff286SAnthony Kim be16_to_cpu(ts->dwz_info.product_id)); 948842ff286SAnthony Kim mutex_unlock(&ts->dev_mutex); 949842ff286SAnthony Kim 950842ff286SAnthony Kim return len; 951842ff286SAnthony Kim } 952842ff286SAnthony Kim 953842ff286SAnthony Kim static DEVICE_ATTR(version, 0664, hideep_fw_version_show, NULL); 954842ff286SAnthony Kim static DEVICE_ATTR(product_id, 0664, hideep_product_id_show, NULL); 955842ff286SAnthony Kim static DEVICE_ATTR(update_fw, 0664, NULL, hideep_update_fw); 956842ff286SAnthony Kim 957842ff286SAnthony Kim static struct attribute *hideep_ts_sysfs_entries[] = { 958842ff286SAnthony Kim &dev_attr_version.attr, 959842ff286SAnthony Kim &dev_attr_product_id.attr, 960842ff286SAnthony Kim &dev_attr_update_fw.attr, 961842ff286SAnthony Kim NULL, 962842ff286SAnthony Kim }; 963842ff286SAnthony Kim 964842ff286SAnthony Kim static const struct attribute_group hideep_ts_attr_group = { 965842ff286SAnthony Kim .attrs = hideep_ts_sysfs_entries, 966842ff286SAnthony Kim }; 967842ff286SAnthony Kim 968*007e50ebSHans de Goede static void hideep_set_work_mode(struct hideep_ts *ts) 969*007e50ebSHans de Goede { 970*007e50ebSHans de Goede /* 971*007e50ebSHans de Goede * Reset touch report format to the native HiDeep 20 protocol if requested. 972*007e50ebSHans de Goede * This is necessary to make touchscreens which come up in I2C-HID mode 973*007e50ebSHans de Goede * work with this driver. 974*007e50ebSHans de Goede * 975*007e50ebSHans de Goede * Note this is a kernel internal device-property set by x86 platform code, 976*007e50ebSHans de Goede * this MUST not be used in devicetree files without first adding it to 977*007e50ebSHans de Goede * the DT bindings. 978*007e50ebSHans de Goede */ 979*007e50ebSHans de Goede if (device_property_read_bool(&ts->client->dev, "hideep,force-native-protocol")) 980*007e50ebSHans de Goede regmap_write(ts->reg, HIDEEP_WORK_MODE, 0x00); 981*007e50ebSHans de Goede } 982*007e50ebSHans de Goede 983311fd6b0SJonathan Cameron static int hideep_suspend(struct device *dev) 984842ff286SAnthony Kim { 985842ff286SAnthony Kim struct i2c_client *client = to_i2c_client(dev); 986842ff286SAnthony Kim struct hideep_ts *ts = i2c_get_clientdata(client); 987842ff286SAnthony Kim 988842ff286SAnthony Kim disable_irq(client->irq); 989842ff286SAnthony Kim hideep_power_off(ts); 990842ff286SAnthony Kim 991842ff286SAnthony Kim return 0; 992842ff286SAnthony Kim } 993842ff286SAnthony Kim 994311fd6b0SJonathan Cameron static int hideep_resume(struct device *dev) 995842ff286SAnthony Kim { 996842ff286SAnthony Kim struct i2c_client *client = to_i2c_client(dev); 997842ff286SAnthony Kim struct hideep_ts *ts = i2c_get_clientdata(client); 998842ff286SAnthony Kim int error; 999842ff286SAnthony Kim 1000842ff286SAnthony Kim error = hideep_power_on(ts); 1001842ff286SAnthony Kim if (error) { 1002842ff286SAnthony Kim dev_err(&client->dev, "power on failed"); 1003842ff286SAnthony Kim return error; 1004842ff286SAnthony Kim } 1005842ff286SAnthony Kim 1006*007e50ebSHans de Goede hideep_set_work_mode(ts); 1007*007e50ebSHans de Goede 1008842ff286SAnthony Kim enable_irq(client->irq); 1009842ff286SAnthony Kim 1010842ff286SAnthony Kim return 0; 1011842ff286SAnthony Kim } 1012842ff286SAnthony Kim 1013311fd6b0SJonathan Cameron static DEFINE_SIMPLE_DEV_PM_OPS(hideep_pm_ops, hideep_suspend, hideep_resume); 1014842ff286SAnthony Kim 1015842ff286SAnthony Kim static const struct regmap_config hideep_regmap_config = { 1016842ff286SAnthony Kim .reg_bits = 16, 1017842ff286SAnthony Kim .reg_format_endian = REGMAP_ENDIAN_LITTLE, 1018842ff286SAnthony Kim .val_bits = 16, 1019842ff286SAnthony Kim .val_format_endian = REGMAP_ENDIAN_LITTLE, 1020842ff286SAnthony Kim .max_register = 0xffff, 1021842ff286SAnthony Kim }; 1022842ff286SAnthony Kim 1023d4be9206SUwe Kleine-König static int hideep_probe(struct i2c_client *client) 1024842ff286SAnthony Kim { 1025842ff286SAnthony Kim struct hideep_ts *ts; 1026842ff286SAnthony Kim int error; 1027842ff286SAnthony Kim 1028842ff286SAnthony Kim /* check i2c bus */ 1029842ff286SAnthony Kim if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) { 1030842ff286SAnthony Kim dev_err(&client->dev, "check i2c device error"); 1031842ff286SAnthony Kim return -ENODEV; 1032842ff286SAnthony Kim } 1033842ff286SAnthony Kim 1034842ff286SAnthony Kim if (client->irq <= 0) { 1035842ff286SAnthony Kim dev_err(&client->dev, "missing irq: %d\n", client->irq); 1036842ff286SAnthony Kim return -EINVAL; 1037842ff286SAnthony Kim } 1038842ff286SAnthony Kim 1039842ff286SAnthony Kim ts = devm_kzalloc(&client->dev, sizeof(*ts), GFP_KERNEL); 1040842ff286SAnthony Kim if (!ts) 1041842ff286SAnthony Kim return -ENOMEM; 1042842ff286SAnthony Kim 1043842ff286SAnthony Kim ts->client = client; 1044842ff286SAnthony Kim i2c_set_clientdata(client, ts); 1045842ff286SAnthony Kim mutex_init(&ts->dev_mutex); 1046842ff286SAnthony Kim 1047842ff286SAnthony Kim ts->reg = devm_regmap_init_i2c(client, &hideep_regmap_config); 1048842ff286SAnthony Kim if (IS_ERR(ts->reg)) { 1049842ff286SAnthony Kim error = PTR_ERR(ts->reg); 1050842ff286SAnthony Kim dev_err(&client->dev, 1051842ff286SAnthony Kim "failed to initialize regmap: %d\n", error); 1052842ff286SAnthony Kim return error; 1053842ff286SAnthony Kim } 1054842ff286SAnthony Kim 1055842ff286SAnthony Kim ts->vcc_vdd = devm_regulator_get(&client->dev, "vdd"); 1056842ff286SAnthony Kim if (IS_ERR(ts->vcc_vdd)) 1057842ff286SAnthony Kim return PTR_ERR(ts->vcc_vdd); 1058842ff286SAnthony Kim 1059842ff286SAnthony Kim ts->vcc_vid = devm_regulator_get(&client->dev, "vid"); 1060842ff286SAnthony Kim if (IS_ERR(ts->vcc_vid)) 1061842ff286SAnthony Kim return PTR_ERR(ts->vcc_vid); 1062842ff286SAnthony Kim 1063842ff286SAnthony Kim ts->reset_gpio = devm_gpiod_get_optional(&client->dev, 1064842ff286SAnthony Kim "reset", GPIOD_OUT_HIGH); 1065842ff286SAnthony Kim if (IS_ERR(ts->reset_gpio)) 1066842ff286SAnthony Kim return PTR_ERR(ts->reset_gpio); 1067842ff286SAnthony Kim 1068842ff286SAnthony Kim error = hideep_power_on(ts); 1069842ff286SAnthony Kim if (error) { 1070842ff286SAnthony Kim dev_err(&client->dev, "power on failed: %d\n", error); 1071842ff286SAnthony Kim return error; 1072842ff286SAnthony Kim } 1073842ff286SAnthony Kim 1074842ff286SAnthony Kim error = devm_add_action_or_reset(&client->dev, hideep_power_off, ts); 1075842ff286SAnthony Kim if (error) 1076842ff286SAnthony Kim return error; 1077842ff286SAnthony Kim 1078842ff286SAnthony Kim error = hideep_load_dwz(ts); 1079842ff286SAnthony Kim if (error) { 1080842ff286SAnthony Kim dev_err(&client->dev, "failed to load dwz: %d", error); 1081842ff286SAnthony Kim return error; 1082842ff286SAnthony Kim } 1083842ff286SAnthony Kim 1084*007e50ebSHans de Goede hideep_set_work_mode(ts); 1085*007e50ebSHans de Goede 1086842ff286SAnthony Kim error = hideep_init_input(ts); 1087842ff286SAnthony Kim if (error) 1088842ff286SAnthony Kim return error; 1089842ff286SAnthony Kim 1090842ff286SAnthony Kim error = devm_request_threaded_irq(&client->dev, client->irq, 1091842ff286SAnthony Kim NULL, hideep_irq, IRQF_ONESHOT, 1092842ff286SAnthony Kim client->name, ts); 1093842ff286SAnthony Kim if (error) { 1094842ff286SAnthony Kim dev_err(&client->dev, "failed to request irq %d: %d\n", 1095842ff286SAnthony Kim client->irq, error); 1096842ff286SAnthony Kim return error; 1097842ff286SAnthony Kim } 1098842ff286SAnthony Kim 1099842ff286SAnthony Kim error = devm_device_add_group(&client->dev, &hideep_ts_attr_group); 1100842ff286SAnthony Kim if (error) { 1101842ff286SAnthony Kim dev_err(&client->dev, 1102842ff286SAnthony Kim "failed to add sysfs attributes: %d\n", error); 1103842ff286SAnthony Kim return error; 1104842ff286SAnthony Kim } 1105842ff286SAnthony Kim 1106842ff286SAnthony Kim return 0; 1107842ff286SAnthony Kim } 1108842ff286SAnthony Kim 1109842ff286SAnthony Kim static const struct i2c_device_id hideep_i2c_id[] = { 1110842ff286SAnthony Kim { HIDEEP_I2C_NAME, 0 }, 1111842ff286SAnthony Kim { } 1112842ff286SAnthony Kim }; 1113842ff286SAnthony Kim MODULE_DEVICE_TABLE(i2c, hideep_i2c_id); 1114842ff286SAnthony Kim 1115842ff286SAnthony Kim #ifdef CONFIG_ACPI 1116842ff286SAnthony Kim static const struct acpi_device_id hideep_acpi_id[] = { 1117842ff286SAnthony Kim { "HIDP0001", 0 }, 1118842ff286SAnthony Kim { } 1119842ff286SAnthony Kim }; 1120842ff286SAnthony Kim MODULE_DEVICE_TABLE(acpi, hideep_acpi_id); 1121842ff286SAnthony Kim #endif 1122842ff286SAnthony Kim 1123842ff286SAnthony Kim #ifdef CONFIG_OF 1124842ff286SAnthony Kim static const struct of_device_id hideep_match_table[] = { 1125842ff286SAnthony Kim { .compatible = "hideep,hideep-ts" }, 1126842ff286SAnthony Kim { } 1127842ff286SAnthony Kim }; 1128842ff286SAnthony Kim MODULE_DEVICE_TABLE(of, hideep_match_table); 1129842ff286SAnthony Kim #endif 1130842ff286SAnthony Kim 1131842ff286SAnthony Kim static struct i2c_driver hideep_driver = { 1132842ff286SAnthony Kim .driver = { 1133842ff286SAnthony Kim .name = HIDEEP_I2C_NAME, 1134842ff286SAnthony Kim .of_match_table = of_match_ptr(hideep_match_table), 1135842ff286SAnthony Kim .acpi_match_table = ACPI_PTR(hideep_acpi_id), 1136311fd6b0SJonathan Cameron .pm = pm_sleep_ptr(&hideep_pm_ops), 1137842ff286SAnthony Kim }, 1138842ff286SAnthony Kim .id_table = hideep_i2c_id, 1139d4be9206SUwe Kleine-König .probe_new = hideep_probe, 1140842ff286SAnthony Kim }; 1141842ff286SAnthony Kim 1142842ff286SAnthony Kim module_i2c_driver(hideep_driver); 1143842ff286SAnthony Kim 1144842ff286SAnthony Kim MODULE_DESCRIPTION("Driver for HiDeep Touchscreen Controller"); 1145842ff286SAnthony Kim MODULE_AUTHOR("anthony.kim@hideep.com"); 1146842ff286SAnthony Kim MODULE_LICENSE("GPL v2"); 1147