1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * i8042 keyboard and mouse controller driver for Linux 4 * 5 * Copyright (c) 1999-2004 Vojtech Pavlik 6 */ 7 8 9 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 10 11 #include <linux/types.h> 12 #include <linux/delay.h> 13 #include <linux/module.h> 14 #include <linux/interrupt.h> 15 #include <linux/ioport.h> 16 #include <linux/init.h> 17 #include <linux/serio.h> 18 #include <linux/err.h> 19 #include <linux/rcupdate.h> 20 #include <linux/platform_device.h> 21 #include <linux/i8042.h> 22 #include <linux/slab.h> 23 #include <linux/suspend.h> 24 25 #include <asm/io.h> 26 27 MODULE_AUTHOR("Vojtech Pavlik <vojtech@suse.cz>"); 28 MODULE_DESCRIPTION("i8042 keyboard and mouse controller driver"); 29 MODULE_LICENSE("GPL"); 30 31 static bool i8042_nokbd; 32 module_param_named(nokbd, i8042_nokbd, bool, 0); 33 MODULE_PARM_DESC(nokbd, "Do not probe or use KBD port."); 34 35 static bool i8042_noaux; 36 module_param_named(noaux, i8042_noaux, bool, 0); 37 MODULE_PARM_DESC(noaux, "Do not probe or use AUX (mouse) port."); 38 39 static bool i8042_nomux; 40 module_param_named(nomux, i8042_nomux, bool, 0); 41 MODULE_PARM_DESC(nomux, "Do not check whether an active multiplexing controller is present."); 42 43 static bool i8042_unlock; 44 module_param_named(unlock, i8042_unlock, bool, 0); 45 MODULE_PARM_DESC(unlock, "Ignore keyboard lock."); 46 47 enum i8042_controller_reset_mode { 48 I8042_RESET_NEVER, 49 I8042_RESET_ALWAYS, 50 I8042_RESET_ON_S2RAM, 51 #define I8042_RESET_DEFAULT I8042_RESET_ON_S2RAM 52 }; 53 static enum i8042_controller_reset_mode i8042_reset = I8042_RESET_DEFAULT; 54 static int i8042_set_reset(const char *val, const struct kernel_param *kp) 55 { 56 enum i8042_controller_reset_mode *arg = kp->arg; 57 int error; 58 bool reset; 59 60 if (val) { 61 error = kstrtobool(val, &reset); 62 if (error) 63 return error; 64 } else { 65 reset = true; 66 } 67 68 *arg = reset ? I8042_RESET_ALWAYS : I8042_RESET_NEVER; 69 return 0; 70 } 71 72 static const struct kernel_param_ops param_ops_reset_param = { 73 .flags = KERNEL_PARAM_OPS_FL_NOARG, 74 .set = i8042_set_reset, 75 }; 76 #define param_check_reset_param(name, p) \ 77 __param_check(name, p, enum i8042_controller_reset_mode) 78 module_param_named(reset, i8042_reset, reset_param, 0); 79 MODULE_PARM_DESC(reset, "Reset controller on resume, cleanup or both"); 80 81 static bool i8042_direct; 82 module_param_named(direct, i8042_direct, bool, 0); 83 MODULE_PARM_DESC(direct, "Put keyboard port into non-translated mode."); 84 85 static bool i8042_dumbkbd; 86 module_param_named(dumbkbd, i8042_dumbkbd, bool, 0); 87 MODULE_PARM_DESC(dumbkbd, "Pretend that controller can only read data from keyboard"); 88 89 static bool i8042_noloop; 90 module_param_named(noloop, i8042_noloop, bool, 0); 91 MODULE_PARM_DESC(noloop, "Disable the AUX Loopback command while probing for the AUX port"); 92 93 static bool i8042_notimeout; 94 module_param_named(notimeout, i8042_notimeout, bool, 0); 95 MODULE_PARM_DESC(notimeout, "Ignore timeouts signalled by i8042"); 96 97 static bool i8042_kbdreset; 98 module_param_named(kbdreset, i8042_kbdreset, bool, 0); 99 MODULE_PARM_DESC(kbdreset, "Reset device connected to KBD port"); 100 101 #ifdef CONFIG_X86 102 static bool i8042_dritek; 103 module_param_named(dritek, i8042_dritek, bool, 0); 104 MODULE_PARM_DESC(dritek, "Force enable the Dritek keyboard extension"); 105 #endif 106 107 #ifdef CONFIG_PNP 108 static bool i8042_nopnp; 109 module_param_named(nopnp, i8042_nopnp, bool, 0); 110 MODULE_PARM_DESC(nopnp, "Do not use PNP to detect controller settings"); 111 #endif 112 113 #define DEBUG 114 #ifdef DEBUG 115 static bool i8042_debug; 116 module_param_named(debug, i8042_debug, bool, 0600); 117 MODULE_PARM_DESC(debug, "Turn i8042 debugging mode on and off"); 118 119 static bool i8042_unmask_kbd_data; 120 module_param_named(unmask_kbd_data, i8042_unmask_kbd_data, bool, 0600); 121 MODULE_PARM_DESC(unmask_kbd_data, "Unconditional enable (may reveal sensitive data) of normally sanitize-filtered kbd data traffic debug log [pre-condition: i8042.debug=1 enabled]"); 122 #endif 123 124 static bool i8042_bypass_aux_irq_test; 125 static char i8042_kbd_firmware_id[128]; 126 static char i8042_aux_firmware_id[128]; 127 128 #include "i8042.h" 129 130 /* 131 * i8042_lock protects serialization between i8042_command and 132 * the interrupt handler. 133 */ 134 static DEFINE_SPINLOCK(i8042_lock); 135 136 /* 137 * Writers to AUX and KBD ports as well as users issuing i8042_command 138 * directly should acquire i8042_mutex (by means of calling 139 * i8042_lock_chip() and i8042_unlock_ship() helpers) to ensure that 140 * they do not disturb each other (unfortunately in many i8042 141 * implementations write to one of the ports will immediately abort 142 * command that is being processed by another port). 143 */ 144 static DEFINE_MUTEX(i8042_mutex); 145 146 struct i8042_port { 147 struct serio *serio; 148 int irq; 149 bool exists; 150 bool driver_bound; 151 signed char mux; 152 }; 153 154 #define I8042_KBD_PORT_NO 0 155 #define I8042_AUX_PORT_NO 1 156 #define I8042_MUX_PORT_NO 2 157 #define I8042_NUM_PORTS (I8042_NUM_MUX_PORTS + 2) 158 159 static struct i8042_port i8042_ports[I8042_NUM_PORTS]; 160 161 static unsigned char i8042_initial_ctr; 162 static unsigned char i8042_ctr; 163 static bool i8042_mux_present; 164 static bool i8042_kbd_irq_registered; 165 static bool i8042_aux_irq_registered; 166 static unsigned char i8042_suppress_kbd_ack; 167 static struct platform_device *i8042_platform_device; 168 static struct notifier_block i8042_kbd_bind_notifier_block; 169 170 static irqreturn_t i8042_interrupt(int irq, void *dev_id); 171 static bool (*i8042_platform_filter)(unsigned char data, unsigned char str, 172 struct serio *serio); 173 174 void i8042_lock_chip(void) 175 { 176 mutex_lock(&i8042_mutex); 177 } 178 EXPORT_SYMBOL(i8042_lock_chip); 179 180 void i8042_unlock_chip(void) 181 { 182 mutex_unlock(&i8042_mutex); 183 } 184 EXPORT_SYMBOL(i8042_unlock_chip); 185 186 int i8042_install_filter(bool (*filter)(unsigned char data, unsigned char str, 187 struct serio *serio)) 188 { 189 unsigned long flags; 190 int ret = 0; 191 192 spin_lock_irqsave(&i8042_lock, flags); 193 194 if (i8042_platform_filter) { 195 ret = -EBUSY; 196 goto out; 197 } 198 199 i8042_platform_filter = filter; 200 201 out: 202 spin_unlock_irqrestore(&i8042_lock, flags); 203 return ret; 204 } 205 EXPORT_SYMBOL(i8042_install_filter); 206 207 int i8042_remove_filter(bool (*filter)(unsigned char data, unsigned char str, 208 struct serio *port)) 209 { 210 unsigned long flags; 211 int ret = 0; 212 213 spin_lock_irqsave(&i8042_lock, flags); 214 215 if (i8042_platform_filter != filter) { 216 ret = -EINVAL; 217 goto out; 218 } 219 220 i8042_platform_filter = NULL; 221 222 out: 223 spin_unlock_irqrestore(&i8042_lock, flags); 224 return ret; 225 } 226 EXPORT_SYMBOL(i8042_remove_filter); 227 228 /* 229 * The i8042_wait_read() and i8042_wait_write functions wait for the i8042 to 230 * be ready for reading values from it / writing values to it. 231 * Called always with i8042_lock held. 232 */ 233 234 static int i8042_wait_read(void) 235 { 236 int i = 0; 237 238 while ((~i8042_read_status() & I8042_STR_OBF) && (i < I8042_CTL_TIMEOUT)) { 239 udelay(50); 240 i++; 241 } 242 return -(i == I8042_CTL_TIMEOUT); 243 } 244 245 static int i8042_wait_write(void) 246 { 247 int i = 0; 248 249 while ((i8042_read_status() & I8042_STR_IBF) && (i < I8042_CTL_TIMEOUT)) { 250 udelay(50); 251 i++; 252 } 253 return -(i == I8042_CTL_TIMEOUT); 254 } 255 256 /* 257 * i8042_flush() flushes all data that may be in the keyboard and mouse buffers 258 * of the i8042 down the toilet. 259 */ 260 261 static int i8042_flush(void) 262 { 263 unsigned long flags; 264 unsigned char data, str; 265 int count = 0; 266 int retval = 0; 267 268 spin_lock_irqsave(&i8042_lock, flags); 269 270 while ((str = i8042_read_status()) & I8042_STR_OBF) { 271 if (count++ < I8042_BUFFER_SIZE) { 272 udelay(50); 273 data = i8042_read_data(); 274 dbg("%02x <- i8042 (flush, %s)\n", 275 data, str & I8042_STR_AUXDATA ? "aux" : "kbd"); 276 } else { 277 retval = -EIO; 278 break; 279 } 280 } 281 282 spin_unlock_irqrestore(&i8042_lock, flags); 283 284 return retval; 285 } 286 287 /* 288 * i8042_command() executes a command on the i8042. It also sends the input 289 * parameter(s) of the commands to it, and receives the output value(s). The 290 * parameters are to be stored in the param array, and the output is placed 291 * into the same array. The number of the parameters and output values is 292 * encoded in bits 8-11 of the command number. 293 */ 294 295 static int __i8042_command(unsigned char *param, int command) 296 { 297 int i, error; 298 299 if (i8042_noloop && command == I8042_CMD_AUX_LOOP) 300 return -1; 301 302 error = i8042_wait_write(); 303 if (error) 304 return error; 305 306 dbg("%02x -> i8042 (command)\n", command & 0xff); 307 i8042_write_command(command & 0xff); 308 309 for (i = 0; i < ((command >> 12) & 0xf); i++) { 310 error = i8042_wait_write(); 311 if (error) { 312 dbg(" -- i8042 (wait write timeout)\n"); 313 return error; 314 } 315 dbg("%02x -> i8042 (parameter)\n", param[i]); 316 i8042_write_data(param[i]); 317 } 318 319 for (i = 0; i < ((command >> 8) & 0xf); i++) { 320 error = i8042_wait_read(); 321 if (error) { 322 dbg(" -- i8042 (wait read timeout)\n"); 323 return error; 324 } 325 326 if (command == I8042_CMD_AUX_LOOP && 327 !(i8042_read_status() & I8042_STR_AUXDATA)) { 328 dbg(" -- i8042 (auxerr)\n"); 329 return -1; 330 } 331 332 param[i] = i8042_read_data(); 333 dbg("%02x <- i8042 (return)\n", param[i]); 334 } 335 336 return 0; 337 } 338 339 int i8042_command(unsigned char *param, int command) 340 { 341 unsigned long flags; 342 int retval; 343 344 spin_lock_irqsave(&i8042_lock, flags); 345 retval = __i8042_command(param, command); 346 spin_unlock_irqrestore(&i8042_lock, flags); 347 348 return retval; 349 } 350 EXPORT_SYMBOL(i8042_command); 351 352 /* 353 * i8042_kbd_write() sends a byte out through the keyboard interface. 354 */ 355 356 static int i8042_kbd_write(struct serio *port, unsigned char c) 357 { 358 unsigned long flags; 359 int retval = 0; 360 361 spin_lock_irqsave(&i8042_lock, flags); 362 363 if (!(retval = i8042_wait_write())) { 364 dbg("%02x -> i8042 (kbd-data)\n", c); 365 i8042_write_data(c); 366 } 367 368 spin_unlock_irqrestore(&i8042_lock, flags); 369 370 return retval; 371 } 372 373 /* 374 * i8042_aux_write() sends a byte out through the aux interface. 375 */ 376 377 static int i8042_aux_write(struct serio *serio, unsigned char c) 378 { 379 struct i8042_port *port = serio->port_data; 380 381 return i8042_command(&c, port->mux == -1 ? 382 I8042_CMD_AUX_SEND : 383 I8042_CMD_MUX_SEND + port->mux); 384 } 385 386 387 /* 388 * i8042_port_close attempts to clear AUX or KBD port state by disabling 389 * and then re-enabling it. 390 */ 391 392 static void i8042_port_close(struct serio *serio) 393 { 394 int irq_bit; 395 int disable_bit; 396 const char *port_name; 397 398 if (serio == i8042_ports[I8042_AUX_PORT_NO].serio) { 399 irq_bit = I8042_CTR_AUXINT; 400 disable_bit = I8042_CTR_AUXDIS; 401 port_name = "AUX"; 402 } else { 403 irq_bit = I8042_CTR_KBDINT; 404 disable_bit = I8042_CTR_KBDDIS; 405 port_name = "KBD"; 406 } 407 408 i8042_ctr &= ~irq_bit; 409 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) 410 pr_warn("Can't write CTR while closing %s port\n", port_name); 411 412 udelay(50); 413 414 i8042_ctr &= ~disable_bit; 415 i8042_ctr |= irq_bit; 416 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) 417 pr_err("Can't reactivate %s port\n", port_name); 418 419 /* 420 * See if there is any data appeared while we were messing with 421 * port state. 422 */ 423 i8042_interrupt(0, NULL); 424 } 425 426 /* 427 * i8042_start() is called by serio core when port is about to finish 428 * registering. It will mark port as existing so i8042_interrupt can 429 * start sending data through it. 430 */ 431 static int i8042_start(struct serio *serio) 432 { 433 struct i8042_port *port = serio->port_data; 434 435 spin_lock_irq(&i8042_lock); 436 port->exists = true; 437 spin_unlock_irq(&i8042_lock); 438 439 return 0; 440 } 441 442 /* 443 * i8042_stop() marks serio port as non-existing so i8042_interrupt 444 * will not try to send data to the port that is about to go away. 445 * The function is called by serio core as part of unregister procedure. 446 */ 447 static void i8042_stop(struct serio *serio) 448 { 449 struct i8042_port *port = serio->port_data; 450 451 spin_lock_irq(&i8042_lock); 452 port->exists = false; 453 port->serio = NULL; 454 spin_unlock_irq(&i8042_lock); 455 456 /* 457 * We need to make sure that interrupt handler finishes using 458 * our serio port before we return from this function. 459 * We synchronize with both AUX and KBD IRQs because there is 460 * a (very unlikely) chance that AUX IRQ is raised for KBD port 461 * and vice versa. 462 */ 463 synchronize_irq(I8042_AUX_IRQ); 464 synchronize_irq(I8042_KBD_IRQ); 465 } 466 467 /* 468 * i8042_filter() filters out unwanted bytes from the input data stream. 469 * It is called from i8042_interrupt and thus is running with interrupts 470 * off and i8042_lock held. 471 */ 472 static bool i8042_filter(unsigned char data, unsigned char str, 473 struct serio *serio) 474 { 475 if (unlikely(i8042_suppress_kbd_ack)) { 476 if ((~str & I8042_STR_AUXDATA) && 477 (data == 0xfa || data == 0xfe)) { 478 i8042_suppress_kbd_ack--; 479 dbg("Extra keyboard ACK - filtered out\n"); 480 return true; 481 } 482 } 483 484 if (i8042_platform_filter && i8042_platform_filter(data, str, serio)) { 485 dbg("Filtered out by platform filter\n"); 486 return true; 487 } 488 489 return false; 490 } 491 492 /* 493 * i8042_interrupt() is the most important function in this driver - 494 * it handles the interrupts from the i8042, and sends incoming bytes 495 * to the upper layers. 496 */ 497 498 static irqreturn_t i8042_interrupt(int irq, void *dev_id) 499 { 500 struct i8042_port *port; 501 struct serio *serio; 502 unsigned long flags; 503 unsigned char str, data; 504 unsigned int dfl; 505 unsigned int port_no; 506 bool filtered; 507 int ret = 1; 508 509 spin_lock_irqsave(&i8042_lock, flags); 510 511 str = i8042_read_status(); 512 if (unlikely(~str & I8042_STR_OBF)) { 513 spin_unlock_irqrestore(&i8042_lock, flags); 514 if (irq) 515 dbg("Interrupt %d, without any data\n", irq); 516 ret = 0; 517 goto out; 518 } 519 520 data = i8042_read_data(); 521 522 if (i8042_mux_present && (str & I8042_STR_AUXDATA)) { 523 static unsigned long last_transmit; 524 static unsigned char last_str; 525 526 dfl = 0; 527 if (str & I8042_STR_MUXERR) { 528 dbg("MUX error, status is %02x, data is %02x\n", 529 str, data); 530 /* 531 * When MUXERR condition is signalled the data register can only contain 532 * 0xfd, 0xfe or 0xff if implementation follows the spec. Unfortunately 533 * it is not always the case. Some KBCs also report 0xfc when there is 534 * nothing connected to the port while others sometimes get confused which 535 * port the data came from and signal error leaving the data intact. They 536 * _do not_ revert to legacy mode (actually I've never seen KBC reverting 537 * to legacy mode yet, when we see one we'll add proper handling). 538 * Anyway, we process 0xfc, 0xfd, 0xfe and 0xff as timeouts, and for the 539 * rest assume that the data came from the same serio last byte 540 * was transmitted (if transmission happened not too long ago). 541 */ 542 543 switch (data) { 544 default: 545 if (time_before(jiffies, last_transmit + HZ/10)) { 546 str = last_str; 547 break; 548 } 549 /* fall through - report timeout */ 550 case 0xfc: 551 case 0xfd: 552 case 0xfe: dfl = SERIO_TIMEOUT; data = 0xfe; break; 553 case 0xff: dfl = SERIO_PARITY; data = 0xfe; break; 554 } 555 } 556 557 port_no = I8042_MUX_PORT_NO + ((str >> 6) & 3); 558 last_str = str; 559 last_transmit = jiffies; 560 } else { 561 562 dfl = ((str & I8042_STR_PARITY) ? SERIO_PARITY : 0) | 563 ((str & I8042_STR_TIMEOUT && !i8042_notimeout) ? SERIO_TIMEOUT : 0); 564 565 port_no = (str & I8042_STR_AUXDATA) ? 566 I8042_AUX_PORT_NO : I8042_KBD_PORT_NO; 567 } 568 569 port = &i8042_ports[port_no]; 570 serio = port->exists ? port->serio : NULL; 571 572 filter_dbg(port->driver_bound, data, "<- i8042 (interrupt, %d, %d%s%s)\n", 573 port_no, irq, 574 dfl & SERIO_PARITY ? ", bad parity" : "", 575 dfl & SERIO_TIMEOUT ? ", timeout" : ""); 576 577 filtered = i8042_filter(data, str, serio); 578 579 spin_unlock_irqrestore(&i8042_lock, flags); 580 581 if (likely(serio && !filtered)) 582 serio_interrupt(serio, data, dfl); 583 584 out: 585 return IRQ_RETVAL(ret); 586 } 587 588 /* 589 * i8042_enable_kbd_port enables keyboard port on chip 590 */ 591 592 static int i8042_enable_kbd_port(void) 593 { 594 i8042_ctr &= ~I8042_CTR_KBDDIS; 595 i8042_ctr |= I8042_CTR_KBDINT; 596 597 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) { 598 i8042_ctr &= ~I8042_CTR_KBDINT; 599 i8042_ctr |= I8042_CTR_KBDDIS; 600 pr_err("Failed to enable KBD port\n"); 601 return -EIO; 602 } 603 604 return 0; 605 } 606 607 /* 608 * i8042_enable_aux_port enables AUX (mouse) port on chip 609 */ 610 611 static int i8042_enable_aux_port(void) 612 { 613 i8042_ctr &= ~I8042_CTR_AUXDIS; 614 i8042_ctr |= I8042_CTR_AUXINT; 615 616 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) { 617 i8042_ctr &= ~I8042_CTR_AUXINT; 618 i8042_ctr |= I8042_CTR_AUXDIS; 619 pr_err("Failed to enable AUX port\n"); 620 return -EIO; 621 } 622 623 return 0; 624 } 625 626 /* 627 * i8042_enable_mux_ports enables 4 individual AUX ports after 628 * the controller has been switched into Multiplexed mode 629 */ 630 631 static int i8042_enable_mux_ports(void) 632 { 633 unsigned char param; 634 int i; 635 636 for (i = 0; i < I8042_NUM_MUX_PORTS; i++) { 637 i8042_command(¶m, I8042_CMD_MUX_PFX + i); 638 i8042_command(¶m, I8042_CMD_AUX_ENABLE); 639 } 640 641 return i8042_enable_aux_port(); 642 } 643 644 /* 645 * i8042_set_mux_mode checks whether the controller has an 646 * active multiplexor and puts the chip into Multiplexed (true) 647 * or Legacy (false) mode. 648 */ 649 650 static int i8042_set_mux_mode(bool multiplex, unsigned char *mux_version) 651 { 652 653 unsigned char param, val; 654 /* 655 * Get rid of bytes in the queue. 656 */ 657 658 i8042_flush(); 659 660 /* 661 * Internal loopback test - send three bytes, they should come back from the 662 * mouse interface, the last should be version. 663 */ 664 665 param = val = 0xf0; 666 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != val) 667 return -1; 668 param = val = multiplex ? 0x56 : 0xf6; 669 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != val) 670 return -1; 671 param = val = multiplex ? 0xa4 : 0xa5; 672 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param == val) 673 return -1; 674 675 /* 676 * Workaround for interference with USB Legacy emulation 677 * that causes a v10.12 MUX to be found. 678 */ 679 if (param == 0xac) 680 return -1; 681 682 if (mux_version) 683 *mux_version = param; 684 685 return 0; 686 } 687 688 /* 689 * i8042_check_mux() checks whether the controller supports the PS/2 Active 690 * Multiplexing specification by Synaptics, Phoenix, Insyde and 691 * LCS/Telegraphics. 692 */ 693 694 static int __init i8042_check_mux(void) 695 { 696 unsigned char mux_version; 697 698 if (i8042_set_mux_mode(true, &mux_version)) 699 return -1; 700 701 pr_info("Detected active multiplexing controller, rev %d.%d\n", 702 (mux_version >> 4) & 0xf, mux_version & 0xf); 703 704 /* 705 * Disable all muxed ports by disabling AUX. 706 */ 707 i8042_ctr |= I8042_CTR_AUXDIS; 708 i8042_ctr &= ~I8042_CTR_AUXINT; 709 710 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) { 711 pr_err("Failed to disable AUX port, can't use MUX\n"); 712 return -EIO; 713 } 714 715 i8042_mux_present = true; 716 717 return 0; 718 } 719 720 /* 721 * The following is used to test AUX IRQ delivery. 722 */ 723 static struct completion i8042_aux_irq_delivered __initdata; 724 static bool i8042_irq_being_tested __initdata; 725 726 static irqreturn_t __init i8042_aux_test_irq(int irq, void *dev_id) 727 { 728 unsigned long flags; 729 unsigned char str, data; 730 int ret = 0; 731 732 spin_lock_irqsave(&i8042_lock, flags); 733 str = i8042_read_status(); 734 if (str & I8042_STR_OBF) { 735 data = i8042_read_data(); 736 dbg("%02x <- i8042 (aux_test_irq, %s)\n", 737 data, str & I8042_STR_AUXDATA ? "aux" : "kbd"); 738 if (i8042_irq_being_tested && 739 data == 0xa5 && (str & I8042_STR_AUXDATA)) 740 complete(&i8042_aux_irq_delivered); 741 ret = 1; 742 } 743 spin_unlock_irqrestore(&i8042_lock, flags); 744 745 return IRQ_RETVAL(ret); 746 } 747 748 /* 749 * i8042_toggle_aux - enables or disables AUX port on i8042 via command and 750 * verifies success by readinng CTR. Used when testing for presence of AUX 751 * port. 752 */ 753 static int __init i8042_toggle_aux(bool on) 754 { 755 unsigned char param; 756 int i; 757 758 if (i8042_command(¶m, 759 on ? I8042_CMD_AUX_ENABLE : I8042_CMD_AUX_DISABLE)) 760 return -1; 761 762 /* some chips need some time to set the I8042_CTR_AUXDIS bit */ 763 for (i = 0; i < 100; i++) { 764 udelay(50); 765 766 if (i8042_command(¶m, I8042_CMD_CTL_RCTR)) 767 return -1; 768 769 if (!(param & I8042_CTR_AUXDIS) == on) 770 return 0; 771 } 772 773 return -1; 774 } 775 776 /* 777 * i8042_check_aux() applies as much paranoia as it can at detecting 778 * the presence of an AUX interface. 779 */ 780 781 static int __init i8042_check_aux(void) 782 { 783 int retval = -1; 784 bool irq_registered = false; 785 bool aux_loop_broken = false; 786 unsigned long flags; 787 unsigned char param; 788 789 /* 790 * Get rid of bytes in the queue. 791 */ 792 793 i8042_flush(); 794 795 /* 796 * Internal loopback test - filters out AT-type i8042's. Unfortunately 797 * SiS screwed up and their 5597 doesn't support the LOOP command even 798 * though it has an AUX port. 799 */ 800 801 param = 0x5a; 802 retval = i8042_command(¶m, I8042_CMD_AUX_LOOP); 803 if (retval || param != 0x5a) { 804 805 /* 806 * External connection test - filters out AT-soldered PS/2 i8042's 807 * 0x00 - no error, 0x01-0x03 - clock/data stuck, 0xff - general error 808 * 0xfa - no error on some notebooks which ignore the spec 809 * Because it's common for chipsets to return error on perfectly functioning 810 * AUX ports, we test for this only when the LOOP command failed. 811 */ 812 813 if (i8042_command(¶m, I8042_CMD_AUX_TEST) || 814 (param && param != 0xfa && param != 0xff)) 815 return -1; 816 817 /* 818 * If AUX_LOOP completed without error but returned unexpected data 819 * mark it as broken 820 */ 821 if (!retval) 822 aux_loop_broken = true; 823 } 824 825 /* 826 * Bit assignment test - filters out PS/2 i8042's in AT mode 827 */ 828 829 if (i8042_toggle_aux(false)) { 830 pr_warn("Failed to disable AUX port, but continuing anyway... Is this a SiS?\n"); 831 pr_warn("If AUX port is really absent please use the 'i8042.noaux' option\n"); 832 } 833 834 if (i8042_toggle_aux(true)) 835 return -1; 836 837 /* 838 * Reset keyboard (needed on some laptops to successfully detect 839 * touchpad, e.g., some Gigabyte laptop models with Elantech 840 * touchpads). 841 */ 842 if (i8042_kbdreset) { 843 pr_warn("Attempting to reset device connected to KBD port\n"); 844 i8042_kbd_write(NULL, (unsigned char) 0xff); 845 } 846 847 /* 848 * Test AUX IRQ delivery to make sure BIOS did not grab the IRQ and 849 * used it for a PCI card or somethig else. 850 */ 851 852 if (i8042_noloop || i8042_bypass_aux_irq_test || aux_loop_broken) { 853 /* 854 * Without LOOP command we can't test AUX IRQ delivery. Assume the port 855 * is working and hope we are right. 856 */ 857 retval = 0; 858 goto out; 859 } 860 861 if (request_irq(I8042_AUX_IRQ, i8042_aux_test_irq, IRQF_SHARED, 862 "i8042", i8042_platform_device)) 863 goto out; 864 865 irq_registered = true; 866 867 if (i8042_enable_aux_port()) 868 goto out; 869 870 spin_lock_irqsave(&i8042_lock, flags); 871 872 init_completion(&i8042_aux_irq_delivered); 873 i8042_irq_being_tested = true; 874 875 param = 0xa5; 876 retval = __i8042_command(¶m, I8042_CMD_AUX_LOOP & 0xf0ff); 877 878 spin_unlock_irqrestore(&i8042_lock, flags); 879 880 if (retval) 881 goto out; 882 883 if (wait_for_completion_timeout(&i8042_aux_irq_delivered, 884 msecs_to_jiffies(250)) == 0) { 885 /* 886 * AUX IRQ was never delivered so we need to flush the controller to 887 * get rid of the byte we put there; otherwise keyboard may not work. 888 */ 889 dbg(" -- i8042 (aux irq test timeout)\n"); 890 i8042_flush(); 891 retval = -1; 892 } 893 894 out: 895 896 /* 897 * Disable the interface. 898 */ 899 900 i8042_ctr |= I8042_CTR_AUXDIS; 901 i8042_ctr &= ~I8042_CTR_AUXINT; 902 903 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) 904 retval = -1; 905 906 if (irq_registered) 907 free_irq(I8042_AUX_IRQ, i8042_platform_device); 908 909 return retval; 910 } 911 912 static int i8042_controller_check(void) 913 { 914 if (i8042_flush()) { 915 pr_info("No controller found\n"); 916 return -ENODEV; 917 } 918 919 return 0; 920 } 921 922 static int i8042_controller_selftest(void) 923 { 924 unsigned char param; 925 int i = 0; 926 927 /* 928 * We try this 5 times; on some really fragile systems this does not 929 * take the first time... 930 */ 931 do { 932 933 if (i8042_command(¶m, I8042_CMD_CTL_TEST)) { 934 pr_err("i8042 controller selftest timeout\n"); 935 return -ENODEV; 936 } 937 938 if (param == I8042_RET_CTL_TEST) 939 return 0; 940 941 dbg("i8042 controller selftest: %#x != %#x\n", 942 param, I8042_RET_CTL_TEST); 943 msleep(50); 944 } while (i++ < 5); 945 946 #ifdef CONFIG_X86 947 /* 948 * On x86, we don't fail entire i8042 initialization if controller 949 * reset fails in hopes that keyboard port will still be functional 950 * and user will still get a working keyboard. This is especially 951 * important on netbooks. On other arches we trust hardware more. 952 */ 953 pr_info("giving up on controller selftest, continuing anyway...\n"); 954 return 0; 955 #else 956 pr_err("i8042 controller selftest failed\n"); 957 return -EIO; 958 #endif 959 } 960 961 /* 962 * i8042_controller init initializes the i8042 controller, and, 963 * most importantly, sets it into non-xlated mode if that's 964 * desired. 965 */ 966 967 static int i8042_controller_init(void) 968 { 969 unsigned long flags; 970 int n = 0; 971 unsigned char ctr[2]; 972 973 /* 974 * Save the CTR for restore on unload / reboot. 975 */ 976 977 do { 978 if (n >= 10) { 979 pr_err("Unable to get stable CTR read\n"); 980 return -EIO; 981 } 982 983 if (n != 0) 984 udelay(50); 985 986 if (i8042_command(&ctr[n++ % 2], I8042_CMD_CTL_RCTR)) { 987 pr_err("Can't read CTR while initializing i8042\n"); 988 return -EIO; 989 } 990 991 } while (n < 2 || ctr[0] != ctr[1]); 992 993 i8042_initial_ctr = i8042_ctr = ctr[0]; 994 995 /* 996 * Disable the keyboard interface and interrupt. 997 */ 998 999 i8042_ctr |= I8042_CTR_KBDDIS; 1000 i8042_ctr &= ~I8042_CTR_KBDINT; 1001 1002 /* 1003 * Handle keylock. 1004 */ 1005 1006 spin_lock_irqsave(&i8042_lock, flags); 1007 if (~i8042_read_status() & I8042_STR_KEYLOCK) { 1008 if (i8042_unlock) 1009 i8042_ctr |= I8042_CTR_IGNKEYLOCK; 1010 else 1011 pr_warn("Warning: Keylock active\n"); 1012 } 1013 spin_unlock_irqrestore(&i8042_lock, flags); 1014 1015 /* 1016 * If the chip is configured into nontranslated mode by the BIOS, don't 1017 * bother enabling translating and be happy. 1018 */ 1019 1020 if (~i8042_ctr & I8042_CTR_XLATE) 1021 i8042_direct = true; 1022 1023 /* 1024 * Set nontranslated mode for the kbd interface if requested by an option. 1025 * After this the kbd interface becomes a simple serial in/out, like the aux 1026 * interface is. We don't do this by default, since it can confuse notebook 1027 * BIOSes. 1028 */ 1029 1030 if (i8042_direct) 1031 i8042_ctr &= ~I8042_CTR_XLATE; 1032 1033 /* 1034 * Write CTR back. 1035 */ 1036 1037 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) { 1038 pr_err("Can't write CTR while initializing i8042\n"); 1039 return -EIO; 1040 } 1041 1042 /* 1043 * Flush whatever accumulated while we were disabling keyboard port. 1044 */ 1045 1046 i8042_flush(); 1047 1048 return 0; 1049 } 1050 1051 1052 /* 1053 * Reset the controller and reset CRT to the original value set by BIOS. 1054 */ 1055 1056 static void i8042_controller_reset(bool s2r_wants_reset) 1057 { 1058 i8042_flush(); 1059 1060 /* 1061 * Disable both KBD and AUX interfaces so they don't get in the way 1062 */ 1063 1064 i8042_ctr |= I8042_CTR_KBDDIS | I8042_CTR_AUXDIS; 1065 i8042_ctr &= ~(I8042_CTR_KBDINT | I8042_CTR_AUXINT); 1066 1067 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) 1068 pr_warn("Can't write CTR while resetting\n"); 1069 1070 /* 1071 * Disable MUX mode if present. 1072 */ 1073 1074 if (i8042_mux_present) 1075 i8042_set_mux_mode(false, NULL); 1076 1077 /* 1078 * Reset the controller if requested. 1079 */ 1080 1081 if (i8042_reset == I8042_RESET_ALWAYS || 1082 (i8042_reset == I8042_RESET_ON_S2RAM && s2r_wants_reset)) { 1083 i8042_controller_selftest(); 1084 } 1085 1086 /* 1087 * Restore the original control register setting. 1088 */ 1089 1090 if (i8042_command(&i8042_initial_ctr, I8042_CMD_CTL_WCTR)) 1091 pr_warn("Can't restore CTR\n"); 1092 } 1093 1094 1095 /* 1096 * i8042_panic_blink() will turn the keyboard LEDs on or off and is called 1097 * when kernel panics. Flashing LEDs is useful for users running X who may 1098 * not see the console and will help distinguishing panics from "real" 1099 * lockups. 1100 * 1101 * Note that DELAY has a limit of 10ms so we will not get stuck here 1102 * waiting for KBC to free up even if KBD interrupt is off 1103 */ 1104 1105 #define DELAY do { mdelay(1); if (++delay > 10) return delay; } while(0) 1106 1107 static long i8042_panic_blink(int state) 1108 { 1109 long delay = 0; 1110 char led; 1111 1112 led = (state) ? 0x01 | 0x04 : 0; 1113 while (i8042_read_status() & I8042_STR_IBF) 1114 DELAY; 1115 dbg("%02x -> i8042 (panic blink)\n", 0xed); 1116 i8042_suppress_kbd_ack = 2; 1117 i8042_write_data(0xed); /* set leds */ 1118 DELAY; 1119 while (i8042_read_status() & I8042_STR_IBF) 1120 DELAY; 1121 DELAY; 1122 dbg("%02x -> i8042 (panic blink)\n", led); 1123 i8042_write_data(led); 1124 DELAY; 1125 return delay; 1126 } 1127 1128 #undef DELAY 1129 1130 #ifdef CONFIG_X86 1131 static void i8042_dritek_enable(void) 1132 { 1133 unsigned char param = 0x90; 1134 int error; 1135 1136 error = i8042_command(¶m, 0x1059); 1137 if (error) 1138 pr_warn("Failed to enable DRITEK extension: %d\n", error); 1139 } 1140 #endif 1141 1142 #ifdef CONFIG_PM 1143 1144 /* 1145 * Here we try to reset everything back to a state we had 1146 * before suspending. 1147 */ 1148 1149 static int i8042_controller_resume(bool s2r_wants_reset) 1150 { 1151 int error; 1152 1153 error = i8042_controller_check(); 1154 if (error) 1155 return error; 1156 1157 if (i8042_reset == I8042_RESET_ALWAYS || 1158 (i8042_reset == I8042_RESET_ON_S2RAM && s2r_wants_reset)) { 1159 error = i8042_controller_selftest(); 1160 if (error) 1161 return error; 1162 } 1163 1164 /* 1165 * Restore original CTR value and disable all ports 1166 */ 1167 1168 i8042_ctr = i8042_initial_ctr; 1169 if (i8042_direct) 1170 i8042_ctr &= ~I8042_CTR_XLATE; 1171 i8042_ctr |= I8042_CTR_AUXDIS | I8042_CTR_KBDDIS; 1172 i8042_ctr &= ~(I8042_CTR_AUXINT | I8042_CTR_KBDINT); 1173 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) { 1174 pr_warn("Can't write CTR to resume, retrying...\n"); 1175 msleep(50); 1176 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) { 1177 pr_err("CTR write retry failed\n"); 1178 return -EIO; 1179 } 1180 } 1181 1182 1183 #ifdef CONFIG_X86 1184 if (i8042_dritek) 1185 i8042_dritek_enable(); 1186 #endif 1187 1188 if (i8042_mux_present) { 1189 if (i8042_set_mux_mode(true, NULL) || i8042_enable_mux_ports()) 1190 pr_warn("failed to resume active multiplexor, mouse won't work\n"); 1191 } else if (i8042_ports[I8042_AUX_PORT_NO].serio) 1192 i8042_enable_aux_port(); 1193 1194 if (i8042_ports[I8042_KBD_PORT_NO].serio) 1195 i8042_enable_kbd_port(); 1196 1197 i8042_interrupt(0, NULL); 1198 1199 return 0; 1200 } 1201 1202 /* 1203 * Here we try to restore the original BIOS settings to avoid 1204 * upsetting it. 1205 */ 1206 1207 static int i8042_pm_suspend(struct device *dev) 1208 { 1209 int i; 1210 1211 if (pm_suspend_via_firmware()) 1212 i8042_controller_reset(true); 1213 1214 /* Set up serio interrupts for system wakeup. */ 1215 for (i = 0; i < I8042_NUM_PORTS; i++) { 1216 struct serio *serio = i8042_ports[i].serio; 1217 1218 if (serio && device_may_wakeup(&serio->dev)) 1219 enable_irq_wake(i8042_ports[i].irq); 1220 } 1221 1222 return 0; 1223 } 1224 1225 static int i8042_pm_resume_noirq(struct device *dev) 1226 { 1227 if (!pm_resume_via_firmware()) 1228 i8042_interrupt(0, NULL); 1229 1230 return 0; 1231 } 1232 1233 static int i8042_pm_resume(struct device *dev) 1234 { 1235 bool want_reset; 1236 int i; 1237 1238 for (i = 0; i < I8042_NUM_PORTS; i++) { 1239 struct serio *serio = i8042_ports[i].serio; 1240 1241 if (serio && device_may_wakeup(&serio->dev)) 1242 disable_irq_wake(i8042_ports[i].irq); 1243 } 1244 1245 /* 1246 * If platform firmware was not going to be involved in suspend, we did 1247 * not restore the controller state to whatever it had been at boot 1248 * time, so we do not need to do anything. 1249 */ 1250 if (!pm_suspend_via_firmware()) 1251 return 0; 1252 1253 /* 1254 * We only need to reset the controller if we are resuming after handing 1255 * off control to the platform firmware, otherwise we can simply restore 1256 * the mode. 1257 */ 1258 want_reset = pm_resume_via_firmware(); 1259 1260 return i8042_controller_resume(want_reset); 1261 } 1262 1263 static int i8042_pm_thaw(struct device *dev) 1264 { 1265 i8042_interrupt(0, NULL); 1266 1267 return 0; 1268 } 1269 1270 static int i8042_pm_reset(struct device *dev) 1271 { 1272 i8042_controller_reset(false); 1273 1274 return 0; 1275 } 1276 1277 static int i8042_pm_restore(struct device *dev) 1278 { 1279 return i8042_controller_resume(false); 1280 } 1281 1282 static const struct dev_pm_ops i8042_pm_ops = { 1283 .suspend = i8042_pm_suspend, 1284 .resume_noirq = i8042_pm_resume_noirq, 1285 .resume = i8042_pm_resume, 1286 .thaw = i8042_pm_thaw, 1287 .poweroff = i8042_pm_reset, 1288 .restore = i8042_pm_restore, 1289 }; 1290 1291 #endif /* CONFIG_PM */ 1292 1293 /* 1294 * We need to reset the 8042 back to original mode on system shutdown, 1295 * because otherwise BIOSes will be confused. 1296 */ 1297 1298 static void i8042_shutdown(struct platform_device *dev) 1299 { 1300 i8042_controller_reset(false); 1301 } 1302 1303 static int __init i8042_create_kbd_port(void) 1304 { 1305 struct serio *serio; 1306 struct i8042_port *port = &i8042_ports[I8042_KBD_PORT_NO]; 1307 1308 serio = kzalloc(sizeof(struct serio), GFP_KERNEL); 1309 if (!serio) 1310 return -ENOMEM; 1311 1312 serio->id.type = i8042_direct ? SERIO_8042 : SERIO_8042_XL; 1313 serio->write = i8042_dumbkbd ? NULL : i8042_kbd_write; 1314 serio->start = i8042_start; 1315 serio->stop = i8042_stop; 1316 serio->close = i8042_port_close; 1317 serio->ps2_cmd_mutex = &i8042_mutex; 1318 serio->port_data = port; 1319 serio->dev.parent = &i8042_platform_device->dev; 1320 strlcpy(serio->name, "i8042 KBD port", sizeof(serio->name)); 1321 strlcpy(serio->phys, I8042_KBD_PHYS_DESC, sizeof(serio->phys)); 1322 strlcpy(serio->firmware_id, i8042_kbd_firmware_id, 1323 sizeof(serio->firmware_id)); 1324 1325 port->serio = serio; 1326 port->irq = I8042_KBD_IRQ; 1327 1328 return 0; 1329 } 1330 1331 static int __init i8042_create_aux_port(int idx) 1332 { 1333 struct serio *serio; 1334 int port_no = idx < 0 ? I8042_AUX_PORT_NO : I8042_MUX_PORT_NO + idx; 1335 struct i8042_port *port = &i8042_ports[port_no]; 1336 1337 serio = kzalloc(sizeof(struct serio), GFP_KERNEL); 1338 if (!serio) 1339 return -ENOMEM; 1340 1341 serio->id.type = SERIO_8042; 1342 serio->write = i8042_aux_write; 1343 serio->start = i8042_start; 1344 serio->stop = i8042_stop; 1345 serio->ps2_cmd_mutex = &i8042_mutex; 1346 serio->port_data = port; 1347 serio->dev.parent = &i8042_platform_device->dev; 1348 if (idx < 0) { 1349 strlcpy(serio->name, "i8042 AUX port", sizeof(serio->name)); 1350 strlcpy(serio->phys, I8042_AUX_PHYS_DESC, sizeof(serio->phys)); 1351 strlcpy(serio->firmware_id, i8042_aux_firmware_id, 1352 sizeof(serio->firmware_id)); 1353 serio->close = i8042_port_close; 1354 } else { 1355 snprintf(serio->name, sizeof(serio->name), "i8042 AUX%d port", idx); 1356 snprintf(serio->phys, sizeof(serio->phys), I8042_MUX_PHYS_DESC, idx + 1); 1357 strlcpy(serio->firmware_id, i8042_aux_firmware_id, 1358 sizeof(serio->firmware_id)); 1359 } 1360 1361 port->serio = serio; 1362 port->mux = idx; 1363 port->irq = I8042_AUX_IRQ; 1364 1365 return 0; 1366 } 1367 1368 static void __init i8042_free_kbd_port(void) 1369 { 1370 kfree(i8042_ports[I8042_KBD_PORT_NO].serio); 1371 i8042_ports[I8042_KBD_PORT_NO].serio = NULL; 1372 } 1373 1374 static void __init i8042_free_aux_ports(void) 1375 { 1376 int i; 1377 1378 for (i = I8042_AUX_PORT_NO; i < I8042_NUM_PORTS; i++) { 1379 kfree(i8042_ports[i].serio); 1380 i8042_ports[i].serio = NULL; 1381 } 1382 } 1383 1384 static void __init i8042_register_ports(void) 1385 { 1386 int i; 1387 1388 for (i = 0; i < I8042_NUM_PORTS; i++) { 1389 struct serio *serio = i8042_ports[i].serio; 1390 1391 if (!serio) 1392 continue; 1393 1394 printk(KERN_INFO "serio: %s at %#lx,%#lx irq %d\n", 1395 serio->name, 1396 (unsigned long) I8042_DATA_REG, 1397 (unsigned long) I8042_COMMAND_REG, 1398 i8042_ports[i].irq); 1399 serio_register_port(serio); 1400 device_set_wakeup_capable(&serio->dev, true); 1401 1402 /* 1403 * On platforms using suspend-to-idle, allow the keyboard to 1404 * wake up the system from sleep by enabling keyboard wakeups 1405 * by default. This is consistent with keyboard wakeup 1406 * behavior on many platforms using suspend-to-RAM (ACPI S3) 1407 * by default. 1408 */ 1409 if (pm_suspend_default_s2idle() && i == I8042_KBD_PORT_NO) 1410 device_set_wakeup_enable(&serio->dev, true); 1411 } 1412 } 1413 1414 static void i8042_unregister_ports(void) 1415 { 1416 int i; 1417 1418 for (i = 0; i < I8042_NUM_PORTS; i++) { 1419 if (i8042_ports[i].serio) { 1420 serio_unregister_port(i8042_ports[i].serio); 1421 i8042_ports[i].serio = NULL; 1422 } 1423 } 1424 } 1425 1426 static void i8042_free_irqs(void) 1427 { 1428 if (i8042_aux_irq_registered) 1429 free_irq(I8042_AUX_IRQ, i8042_platform_device); 1430 if (i8042_kbd_irq_registered) 1431 free_irq(I8042_KBD_IRQ, i8042_platform_device); 1432 1433 i8042_aux_irq_registered = i8042_kbd_irq_registered = false; 1434 } 1435 1436 static int __init i8042_setup_aux(void) 1437 { 1438 int (*aux_enable)(void); 1439 int error; 1440 int i; 1441 1442 if (i8042_check_aux()) 1443 return -ENODEV; 1444 1445 if (i8042_nomux || i8042_check_mux()) { 1446 error = i8042_create_aux_port(-1); 1447 if (error) 1448 goto err_free_ports; 1449 aux_enable = i8042_enable_aux_port; 1450 } else { 1451 for (i = 0; i < I8042_NUM_MUX_PORTS; i++) { 1452 error = i8042_create_aux_port(i); 1453 if (error) 1454 goto err_free_ports; 1455 } 1456 aux_enable = i8042_enable_mux_ports; 1457 } 1458 1459 error = request_irq(I8042_AUX_IRQ, i8042_interrupt, IRQF_SHARED, 1460 "i8042", i8042_platform_device); 1461 if (error) 1462 goto err_free_ports; 1463 1464 if (aux_enable()) 1465 goto err_free_irq; 1466 1467 i8042_aux_irq_registered = true; 1468 return 0; 1469 1470 err_free_irq: 1471 free_irq(I8042_AUX_IRQ, i8042_platform_device); 1472 err_free_ports: 1473 i8042_free_aux_ports(); 1474 return error; 1475 } 1476 1477 static int __init i8042_setup_kbd(void) 1478 { 1479 int error; 1480 1481 error = i8042_create_kbd_port(); 1482 if (error) 1483 return error; 1484 1485 error = request_irq(I8042_KBD_IRQ, i8042_interrupt, IRQF_SHARED, 1486 "i8042", i8042_platform_device); 1487 if (error) 1488 goto err_free_port; 1489 1490 error = i8042_enable_kbd_port(); 1491 if (error) 1492 goto err_free_irq; 1493 1494 i8042_kbd_irq_registered = true; 1495 return 0; 1496 1497 err_free_irq: 1498 free_irq(I8042_KBD_IRQ, i8042_platform_device); 1499 err_free_port: 1500 i8042_free_kbd_port(); 1501 return error; 1502 } 1503 1504 static int i8042_kbd_bind_notifier(struct notifier_block *nb, 1505 unsigned long action, void *data) 1506 { 1507 struct device *dev = data; 1508 struct serio *serio = to_serio_port(dev); 1509 struct i8042_port *port = serio->port_data; 1510 1511 if (serio != i8042_ports[I8042_KBD_PORT_NO].serio) 1512 return 0; 1513 1514 switch (action) { 1515 case BUS_NOTIFY_BOUND_DRIVER: 1516 port->driver_bound = true; 1517 break; 1518 1519 case BUS_NOTIFY_UNBIND_DRIVER: 1520 port->driver_bound = false; 1521 break; 1522 } 1523 1524 return 0; 1525 } 1526 1527 static int __init i8042_probe(struct platform_device *dev) 1528 { 1529 int error; 1530 1531 i8042_platform_device = dev; 1532 1533 if (i8042_reset == I8042_RESET_ALWAYS) { 1534 error = i8042_controller_selftest(); 1535 if (error) 1536 return error; 1537 } 1538 1539 error = i8042_controller_init(); 1540 if (error) 1541 return error; 1542 1543 #ifdef CONFIG_X86 1544 if (i8042_dritek) 1545 i8042_dritek_enable(); 1546 #endif 1547 1548 if (!i8042_noaux) { 1549 error = i8042_setup_aux(); 1550 if (error && error != -ENODEV && error != -EBUSY) 1551 goto out_fail; 1552 } 1553 1554 if (!i8042_nokbd) { 1555 error = i8042_setup_kbd(); 1556 if (error) 1557 goto out_fail; 1558 } 1559 /* 1560 * Ok, everything is ready, let's register all serio ports 1561 */ 1562 i8042_register_ports(); 1563 1564 return 0; 1565 1566 out_fail: 1567 i8042_free_aux_ports(); /* in case KBD failed but AUX not */ 1568 i8042_free_irqs(); 1569 i8042_controller_reset(false); 1570 i8042_platform_device = NULL; 1571 1572 return error; 1573 } 1574 1575 static int i8042_remove(struct platform_device *dev) 1576 { 1577 i8042_unregister_ports(); 1578 i8042_free_irqs(); 1579 i8042_controller_reset(false); 1580 i8042_platform_device = NULL; 1581 1582 return 0; 1583 } 1584 1585 static struct platform_driver i8042_driver = { 1586 .driver = { 1587 .name = "i8042", 1588 #ifdef CONFIG_PM 1589 .pm = &i8042_pm_ops, 1590 #endif 1591 }, 1592 .remove = i8042_remove, 1593 .shutdown = i8042_shutdown, 1594 }; 1595 1596 static struct notifier_block i8042_kbd_bind_notifier_block = { 1597 .notifier_call = i8042_kbd_bind_notifier, 1598 }; 1599 1600 static int __init i8042_init(void) 1601 { 1602 struct platform_device *pdev; 1603 int err; 1604 1605 dbg_init(); 1606 1607 err = i8042_platform_init(); 1608 if (err) 1609 return err; 1610 1611 err = i8042_controller_check(); 1612 if (err) 1613 goto err_platform_exit; 1614 1615 pdev = platform_create_bundle(&i8042_driver, i8042_probe, NULL, 0, NULL, 0); 1616 if (IS_ERR(pdev)) { 1617 err = PTR_ERR(pdev); 1618 goto err_platform_exit; 1619 } 1620 1621 bus_register_notifier(&serio_bus, &i8042_kbd_bind_notifier_block); 1622 panic_blink = i8042_panic_blink; 1623 1624 return 0; 1625 1626 err_platform_exit: 1627 i8042_platform_exit(); 1628 return err; 1629 } 1630 1631 static void __exit i8042_exit(void) 1632 { 1633 platform_device_unregister(i8042_platform_device); 1634 platform_driver_unregister(&i8042_driver); 1635 i8042_platform_exit(); 1636 1637 bus_unregister_notifier(&serio_bus, &i8042_kbd_bind_notifier_block); 1638 panic_blink = NULL; 1639 } 1640 1641 module_init(i8042_init); 1642 module_exit(i8042_exit); 1643