1 /* 2 * i8042 keyboard and mouse controller driver for Linux 3 * 4 * Copyright (c) 1999-2004 Vojtech Pavlik 5 */ 6 7 /* 8 * This program is free software; you can redistribute it and/or modify it 9 * under the terms of the GNU General Public License version 2 as published by 10 * the Free Software Foundation. 11 */ 12 13 #include <linux/delay.h> 14 #include <linux/module.h> 15 #include <linux/interrupt.h> 16 #include <linux/ioport.h> 17 #include <linux/init.h> 18 #include <linux/serio.h> 19 #include <linux/err.h> 20 #include <linux/rcupdate.h> 21 #include <linux/platform_device.h> 22 #include <linux/i8042.h> 23 24 #include <asm/io.h> 25 26 MODULE_AUTHOR("Vojtech Pavlik <vojtech@suse.cz>"); 27 MODULE_DESCRIPTION("i8042 keyboard and mouse controller driver"); 28 MODULE_LICENSE("GPL"); 29 30 static unsigned int i8042_nokbd; 31 module_param_named(nokbd, i8042_nokbd, bool, 0); 32 MODULE_PARM_DESC(nokbd, "Do not probe or use KBD port."); 33 34 static unsigned int i8042_noaux; 35 module_param_named(noaux, i8042_noaux, bool, 0); 36 MODULE_PARM_DESC(noaux, "Do not probe or use AUX (mouse) port."); 37 38 static unsigned int i8042_nomux; 39 module_param_named(nomux, i8042_nomux, bool, 0); 40 MODULE_PARM_DESC(nomux, "Do not check whether an active multiplexing conrtoller is present."); 41 42 static unsigned int i8042_unlock; 43 module_param_named(unlock, i8042_unlock, bool, 0); 44 MODULE_PARM_DESC(unlock, "Ignore keyboard lock."); 45 46 static unsigned int i8042_reset; 47 module_param_named(reset, i8042_reset, bool, 0); 48 MODULE_PARM_DESC(reset, "Reset controller during init and cleanup."); 49 50 static unsigned int i8042_direct; 51 module_param_named(direct, i8042_direct, bool, 0); 52 MODULE_PARM_DESC(direct, "Put keyboard port into non-translated mode."); 53 54 static unsigned int i8042_dumbkbd; 55 module_param_named(dumbkbd, i8042_dumbkbd, bool, 0); 56 MODULE_PARM_DESC(dumbkbd, "Pretend that controller can only read data from keyboard"); 57 58 static unsigned int i8042_noloop; 59 module_param_named(noloop, i8042_noloop, bool, 0); 60 MODULE_PARM_DESC(noloop, "Disable the AUX Loopback command while probing for the AUX port"); 61 62 static unsigned int i8042_blink_frequency = 500; 63 module_param_named(panicblink, i8042_blink_frequency, uint, 0600); 64 MODULE_PARM_DESC(panicblink, "Frequency with which keyboard LEDs should blink when kernel panics"); 65 66 #ifdef CONFIG_X86 67 static unsigned int i8042_dritek; 68 module_param_named(dritek, i8042_dritek, bool, 0); 69 MODULE_PARM_DESC(dritek, "Force enable the Dritek keyboard extension"); 70 #endif 71 72 #ifdef CONFIG_PNP 73 static int i8042_nopnp; 74 module_param_named(nopnp, i8042_nopnp, bool, 0); 75 MODULE_PARM_DESC(nopnp, "Do not use PNP to detect controller settings"); 76 #endif 77 78 #define DEBUG 79 #ifdef DEBUG 80 static int i8042_debug; 81 module_param_named(debug, i8042_debug, bool, 0600); 82 MODULE_PARM_DESC(debug, "Turn i8042 debugging mode on and off"); 83 #endif 84 85 #include "i8042.h" 86 87 static DEFINE_SPINLOCK(i8042_lock); 88 89 struct i8042_port { 90 struct serio *serio; 91 int irq; 92 unsigned char exists; 93 signed char mux; 94 }; 95 96 #define I8042_KBD_PORT_NO 0 97 #define I8042_AUX_PORT_NO 1 98 #define I8042_MUX_PORT_NO 2 99 #define I8042_NUM_PORTS (I8042_NUM_MUX_PORTS + 2) 100 101 static struct i8042_port i8042_ports[I8042_NUM_PORTS]; 102 103 static unsigned char i8042_initial_ctr; 104 static unsigned char i8042_ctr; 105 static unsigned char i8042_mux_present; 106 static unsigned char i8042_kbd_irq_registered; 107 static unsigned char i8042_aux_irq_registered; 108 static unsigned char i8042_suppress_kbd_ack; 109 static struct platform_device *i8042_platform_device; 110 111 static irqreturn_t i8042_interrupt(int irq, void *dev_id); 112 113 /* 114 * The i8042_wait_read() and i8042_wait_write functions wait for the i8042 to 115 * be ready for reading values from it / writing values to it. 116 * Called always with i8042_lock held. 117 */ 118 119 static int i8042_wait_read(void) 120 { 121 int i = 0; 122 123 while ((~i8042_read_status() & I8042_STR_OBF) && (i < I8042_CTL_TIMEOUT)) { 124 udelay(50); 125 i++; 126 } 127 return -(i == I8042_CTL_TIMEOUT); 128 } 129 130 static int i8042_wait_write(void) 131 { 132 int i = 0; 133 134 while ((i8042_read_status() & I8042_STR_IBF) && (i < I8042_CTL_TIMEOUT)) { 135 udelay(50); 136 i++; 137 } 138 return -(i == I8042_CTL_TIMEOUT); 139 } 140 141 /* 142 * i8042_flush() flushes all data that may be in the keyboard and mouse buffers 143 * of the i8042 down the toilet. 144 */ 145 146 static int i8042_flush(void) 147 { 148 unsigned long flags; 149 unsigned char data, str; 150 int i = 0; 151 152 spin_lock_irqsave(&i8042_lock, flags); 153 154 while (((str = i8042_read_status()) & I8042_STR_OBF) && (i < I8042_BUFFER_SIZE)) { 155 udelay(50); 156 data = i8042_read_data(); 157 i++; 158 dbg("%02x <- i8042 (flush, %s)", data, 159 str & I8042_STR_AUXDATA ? "aux" : "kbd"); 160 } 161 162 spin_unlock_irqrestore(&i8042_lock, flags); 163 164 return i; 165 } 166 167 /* 168 * i8042_command() executes a command on the i8042. It also sends the input 169 * parameter(s) of the commands to it, and receives the output value(s). The 170 * parameters are to be stored in the param array, and the output is placed 171 * into the same array. The number of the parameters and output values is 172 * encoded in bits 8-11 of the command number. 173 */ 174 175 static int __i8042_command(unsigned char *param, int command) 176 { 177 int i, error; 178 179 if (i8042_noloop && command == I8042_CMD_AUX_LOOP) 180 return -1; 181 182 error = i8042_wait_write(); 183 if (error) 184 return error; 185 186 dbg("%02x -> i8042 (command)", command & 0xff); 187 i8042_write_command(command & 0xff); 188 189 for (i = 0; i < ((command >> 12) & 0xf); i++) { 190 error = i8042_wait_write(); 191 if (error) 192 return error; 193 dbg("%02x -> i8042 (parameter)", param[i]); 194 i8042_write_data(param[i]); 195 } 196 197 for (i = 0; i < ((command >> 8) & 0xf); i++) { 198 error = i8042_wait_read(); 199 if (error) { 200 dbg(" -- i8042 (timeout)"); 201 return error; 202 } 203 204 if (command == I8042_CMD_AUX_LOOP && 205 !(i8042_read_status() & I8042_STR_AUXDATA)) { 206 dbg(" -- i8042 (auxerr)"); 207 return -1; 208 } 209 210 param[i] = i8042_read_data(); 211 dbg("%02x <- i8042 (return)", param[i]); 212 } 213 214 return 0; 215 } 216 217 int i8042_command(unsigned char *param, int command) 218 { 219 unsigned long flags; 220 int retval; 221 222 spin_lock_irqsave(&i8042_lock, flags); 223 retval = __i8042_command(param, command); 224 spin_unlock_irqrestore(&i8042_lock, flags); 225 226 return retval; 227 } 228 EXPORT_SYMBOL(i8042_command); 229 230 /* 231 * i8042_kbd_write() sends a byte out through the keyboard interface. 232 */ 233 234 static int i8042_kbd_write(struct serio *port, unsigned char c) 235 { 236 unsigned long flags; 237 int retval = 0; 238 239 spin_lock_irqsave(&i8042_lock, flags); 240 241 if (!(retval = i8042_wait_write())) { 242 dbg("%02x -> i8042 (kbd-data)", c); 243 i8042_write_data(c); 244 } 245 246 spin_unlock_irqrestore(&i8042_lock, flags); 247 248 return retval; 249 } 250 251 /* 252 * i8042_aux_write() sends a byte out through the aux interface. 253 */ 254 255 static int i8042_aux_write(struct serio *serio, unsigned char c) 256 { 257 struct i8042_port *port = serio->port_data; 258 259 return i8042_command(&c, port->mux == -1 ? 260 I8042_CMD_AUX_SEND : 261 I8042_CMD_MUX_SEND + port->mux); 262 } 263 264 /* 265 * i8042_start() is called by serio core when port is about to finish 266 * registering. It will mark port as existing so i8042_interrupt can 267 * start sending data through it. 268 */ 269 static int i8042_start(struct serio *serio) 270 { 271 struct i8042_port *port = serio->port_data; 272 273 port->exists = 1; 274 mb(); 275 return 0; 276 } 277 278 /* 279 * i8042_stop() marks serio port as non-existing so i8042_interrupt 280 * will not try to send data to the port that is about to go away. 281 * The function is called by serio core as part of unregister procedure. 282 */ 283 static void i8042_stop(struct serio *serio) 284 { 285 struct i8042_port *port = serio->port_data; 286 287 port->exists = 0; 288 289 /* 290 * We synchronize with both AUX and KBD IRQs because there is 291 * a (very unlikely) chance that AUX IRQ is raised for KBD port 292 * and vice versa. 293 */ 294 synchronize_irq(I8042_AUX_IRQ); 295 synchronize_irq(I8042_KBD_IRQ); 296 port->serio = NULL; 297 } 298 299 /* 300 * i8042_interrupt() is the most important function in this driver - 301 * it handles the interrupts from the i8042, and sends incoming bytes 302 * to the upper layers. 303 */ 304 305 static irqreturn_t i8042_interrupt(int irq, void *dev_id) 306 { 307 struct i8042_port *port; 308 unsigned long flags; 309 unsigned char str, data; 310 unsigned int dfl; 311 unsigned int port_no; 312 int ret = 1; 313 314 spin_lock_irqsave(&i8042_lock, flags); 315 str = i8042_read_status(); 316 if (unlikely(~str & I8042_STR_OBF)) { 317 spin_unlock_irqrestore(&i8042_lock, flags); 318 if (irq) dbg("Interrupt %d, without any data", irq); 319 ret = 0; 320 goto out; 321 } 322 data = i8042_read_data(); 323 spin_unlock_irqrestore(&i8042_lock, flags); 324 325 if (i8042_mux_present && (str & I8042_STR_AUXDATA)) { 326 static unsigned long last_transmit; 327 static unsigned char last_str; 328 329 dfl = 0; 330 if (str & I8042_STR_MUXERR) { 331 dbg("MUX error, status is %02x, data is %02x", str, data); 332 /* 333 * When MUXERR condition is signalled the data register can only contain 334 * 0xfd, 0xfe or 0xff if implementation follows the spec. Unfortunately 335 * it is not always the case. Some KBCs also report 0xfc when there is 336 * nothing connected to the port while others sometimes get confused which 337 * port the data came from and signal error leaving the data intact. They 338 * _do not_ revert to legacy mode (actually I've never seen KBC reverting 339 * to legacy mode yet, when we see one we'll add proper handling). 340 * Anyway, we process 0xfc, 0xfd, 0xfe and 0xff as timeouts, and for the 341 * rest assume that the data came from the same serio last byte 342 * was transmitted (if transmission happened not too long ago). 343 */ 344 345 switch (data) { 346 default: 347 if (time_before(jiffies, last_transmit + HZ/10)) { 348 str = last_str; 349 break; 350 } 351 /* fall through - report timeout */ 352 case 0xfc: 353 case 0xfd: 354 case 0xfe: dfl = SERIO_TIMEOUT; data = 0xfe; break; 355 case 0xff: dfl = SERIO_PARITY; data = 0xfe; break; 356 } 357 } 358 359 port_no = I8042_MUX_PORT_NO + ((str >> 6) & 3); 360 last_str = str; 361 last_transmit = jiffies; 362 } else { 363 364 dfl = ((str & I8042_STR_PARITY) ? SERIO_PARITY : 0) | 365 ((str & I8042_STR_TIMEOUT) ? SERIO_TIMEOUT : 0); 366 367 port_no = (str & I8042_STR_AUXDATA) ? 368 I8042_AUX_PORT_NO : I8042_KBD_PORT_NO; 369 } 370 371 port = &i8042_ports[port_no]; 372 373 dbg("%02x <- i8042 (interrupt, %d, %d%s%s)", 374 data, port_no, irq, 375 dfl & SERIO_PARITY ? ", bad parity" : "", 376 dfl & SERIO_TIMEOUT ? ", timeout" : ""); 377 378 if (unlikely(i8042_suppress_kbd_ack)) 379 if (port_no == I8042_KBD_PORT_NO && 380 (data == 0xfa || data == 0xfe)) { 381 i8042_suppress_kbd_ack--; 382 goto out; 383 } 384 385 if (likely(port->exists)) 386 serio_interrupt(port->serio, data, dfl); 387 388 out: 389 return IRQ_RETVAL(ret); 390 } 391 392 /* 393 * i8042_enable_kbd_port enables keybaord port on chip 394 */ 395 396 static int i8042_enable_kbd_port(void) 397 { 398 i8042_ctr &= ~I8042_CTR_KBDDIS; 399 i8042_ctr |= I8042_CTR_KBDINT; 400 401 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) { 402 i8042_ctr &= ~I8042_CTR_KBDINT; 403 i8042_ctr |= I8042_CTR_KBDDIS; 404 printk(KERN_ERR "i8042.c: Failed to enable KBD port.\n"); 405 return -EIO; 406 } 407 408 return 0; 409 } 410 411 /* 412 * i8042_enable_aux_port enables AUX (mouse) port on chip 413 */ 414 415 static int i8042_enable_aux_port(void) 416 { 417 i8042_ctr &= ~I8042_CTR_AUXDIS; 418 i8042_ctr |= I8042_CTR_AUXINT; 419 420 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) { 421 i8042_ctr &= ~I8042_CTR_AUXINT; 422 i8042_ctr |= I8042_CTR_AUXDIS; 423 printk(KERN_ERR "i8042.c: Failed to enable AUX port.\n"); 424 return -EIO; 425 } 426 427 return 0; 428 } 429 430 /* 431 * i8042_enable_mux_ports enables 4 individual AUX ports after 432 * the controller has been switched into Multiplexed mode 433 */ 434 435 static int i8042_enable_mux_ports(void) 436 { 437 unsigned char param; 438 int i; 439 440 for (i = 0; i < I8042_NUM_MUX_PORTS; i++) { 441 i8042_command(¶m, I8042_CMD_MUX_PFX + i); 442 i8042_command(¶m, I8042_CMD_AUX_ENABLE); 443 } 444 445 return i8042_enable_aux_port(); 446 } 447 448 /* 449 * i8042_set_mux_mode checks whether the controller has an active 450 * multiplexor and puts the chip into Multiplexed (1) or Legacy (0) mode. 451 */ 452 453 static int i8042_set_mux_mode(unsigned int mode, unsigned char *mux_version) 454 { 455 456 unsigned char param; 457 /* 458 * Get rid of bytes in the queue. 459 */ 460 461 i8042_flush(); 462 463 /* 464 * Internal loopback test - send three bytes, they should come back from the 465 * mouse interface, the last should be version. 466 */ 467 468 param = 0xf0; 469 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != 0xf0) 470 return -1; 471 param = mode ? 0x56 : 0xf6; 472 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != (mode ? 0x56 : 0xf6)) 473 return -1; 474 param = mode ? 0xa4 : 0xa5; 475 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param == (mode ? 0xa4 : 0xa5)) 476 return -1; 477 478 if (mux_version) 479 *mux_version = param; 480 481 return 0; 482 } 483 484 /* 485 * i8042_check_mux() checks whether the controller supports the PS/2 Active 486 * Multiplexing specification by Synaptics, Phoenix, Insyde and 487 * LCS/Telegraphics. 488 */ 489 490 static int __devinit i8042_check_mux(void) 491 { 492 unsigned char mux_version; 493 494 if (i8042_set_mux_mode(1, &mux_version)) 495 return -1; 496 497 /* 498 * Workaround for interference with USB Legacy emulation 499 * that causes a v10.12 MUX to be found. 500 */ 501 if (mux_version == 0xAC) 502 return -1; 503 504 printk(KERN_INFO "i8042.c: Detected active multiplexing controller, rev %d.%d.\n", 505 (mux_version >> 4) & 0xf, mux_version & 0xf); 506 507 /* 508 * Disable all muxed ports by disabling AUX. 509 */ 510 i8042_ctr |= I8042_CTR_AUXDIS; 511 i8042_ctr &= ~I8042_CTR_AUXINT; 512 513 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) { 514 printk(KERN_ERR "i8042.c: Failed to disable AUX port, can't use MUX.\n"); 515 return -EIO; 516 } 517 518 i8042_mux_present = 1; 519 520 return 0; 521 } 522 523 /* 524 * The following is used to test AUX IRQ delivery. 525 */ 526 static struct completion i8042_aux_irq_delivered __devinitdata; 527 static int i8042_irq_being_tested __devinitdata; 528 529 static irqreturn_t __devinit i8042_aux_test_irq(int irq, void *dev_id) 530 { 531 unsigned long flags; 532 unsigned char str, data; 533 int ret = 0; 534 535 spin_lock_irqsave(&i8042_lock, flags); 536 str = i8042_read_status(); 537 if (str & I8042_STR_OBF) { 538 data = i8042_read_data(); 539 if (i8042_irq_being_tested && 540 data == 0xa5 && (str & I8042_STR_AUXDATA)) 541 complete(&i8042_aux_irq_delivered); 542 ret = 1; 543 } 544 spin_unlock_irqrestore(&i8042_lock, flags); 545 546 return IRQ_RETVAL(ret); 547 } 548 549 /* 550 * i8042_toggle_aux - enables or disables AUX port on i8042 via command and 551 * verifies success by readinng CTR. Used when testing for presence of AUX 552 * port. 553 */ 554 static int __devinit i8042_toggle_aux(int on) 555 { 556 unsigned char param; 557 int i; 558 559 if (i8042_command(¶m, 560 on ? I8042_CMD_AUX_ENABLE : I8042_CMD_AUX_DISABLE)) 561 return -1; 562 563 /* some chips need some time to set the I8042_CTR_AUXDIS bit */ 564 for (i = 0; i < 100; i++) { 565 udelay(50); 566 567 if (i8042_command(¶m, I8042_CMD_CTL_RCTR)) 568 return -1; 569 570 if (!(param & I8042_CTR_AUXDIS) == on) 571 return 0; 572 } 573 574 return -1; 575 } 576 577 /* 578 * i8042_check_aux() applies as much paranoia as it can at detecting 579 * the presence of an AUX interface. 580 */ 581 582 static int __devinit i8042_check_aux(void) 583 { 584 int retval = -1; 585 int irq_registered = 0; 586 int aux_loop_broken = 0; 587 unsigned long flags; 588 unsigned char param; 589 590 /* 591 * Get rid of bytes in the queue. 592 */ 593 594 i8042_flush(); 595 596 /* 597 * Internal loopback test - filters out AT-type i8042's. Unfortunately 598 * SiS screwed up and their 5597 doesn't support the LOOP command even 599 * though it has an AUX port. 600 */ 601 602 param = 0x5a; 603 retval = i8042_command(¶m, I8042_CMD_AUX_LOOP); 604 if (retval || param != 0x5a) { 605 606 /* 607 * External connection test - filters out AT-soldered PS/2 i8042's 608 * 0x00 - no error, 0x01-0x03 - clock/data stuck, 0xff - general error 609 * 0xfa - no error on some notebooks which ignore the spec 610 * Because it's common for chipsets to return error on perfectly functioning 611 * AUX ports, we test for this only when the LOOP command failed. 612 */ 613 614 if (i8042_command(¶m, I8042_CMD_AUX_TEST) || 615 (param && param != 0xfa && param != 0xff)) 616 return -1; 617 618 /* 619 * If AUX_LOOP completed without error but returned unexpected data 620 * mark it as broken 621 */ 622 if (!retval) 623 aux_loop_broken = 1; 624 } 625 626 /* 627 * Bit assignment test - filters out PS/2 i8042's in AT mode 628 */ 629 630 if (i8042_toggle_aux(0)) { 631 printk(KERN_WARNING "Failed to disable AUX port, but continuing anyway... Is this a SiS?\n"); 632 printk(KERN_WARNING "If AUX port is really absent please use the 'i8042.noaux' option.\n"); 633 } 634 635 if (i8042_toggle_aux(1)) 636 return -1; 637 638 /* 639 * Test AUX IRQ delivery to make sure BIOS did not grab the IRQ and 640 * used it for a PCI card or somethig else. 641 */ 642 643 if (i8042_noloop || aux_loop_broken) { 644 /* 645 * Without LOOP command we can't test AUX IRQ delivery. Assume the port 646 * is working and hope we are right. 647 */ 648 retval = 0; 649 goto out; 650 } 651 652 if (request_irq(I8042_AUX_IRQ, i8042_aux_test_irq, IRQF_SHARED, 653 "i8042", i8042_platform_device)) 654 goto out; 655 656 irq_registered = 1; 657 658 if (i8042_enable_aux_port()) 659 goto out; 660 661 spin_lock_irqsave(&i8042_lock, flags); 662 663 init_completion(&i8042_aux_irq_delivered); 664 i8042_irq_being_tested = 1; 665 666 param = 0xa5; 667 retval = __i8042_command(¶m, I8042_CMD_AUX_LOOP & 0xf0ff); 668 669 spin_unlock_irqrestore(&i8042_lock, flags); 670 671 if (retval) 672 goto out; 673 674 if (wait_for_completion_timeout(&i8042_aux_irq_delivered, 675 msecs_to_jiffies(250)) == 0) { 676 /* 677 * AUX IRQ was never delivered so we need to flush the controller to 678 * get rid of the byte we put there; otherwise keyboard may not work. 679 */ 680 i8042_flush(); 681 retval = -1; 682 } 683 684 out: 685 686 /* 687 * Disable the interface. 688 */ 689 690 i8042_ctr |= I8042_CTR_AUXDIS; 691 i8042_ctr &= ~I8042_CTR_AUXINT; 692 693 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) 694 retval = -1; 695 696 if (irq_registered) 697 free_irq(I8042_AUX_IRQ, i8042_platform_device); 698 699 return retval; 700 } 701 702 static int i8042_controller_check(void) 703 { 704 if (i8042_flush() == I8042_BUFFER_SIZE) { 705 printk(KERN_ERR "i8042.c: No controller found.\n"); 706 return -ENODEV; 707 } 708 709 return 0; 710 } 711 712 static int i8042_controller_selftest(void) 713 { 714 unsigned char param; 715 int i = 0; 716 717 if (!i8042_reset) 718 return 0; 719 720 /* 721 * We try this 5 times; on some really fragile systems this does not 722 * take the first time... 723 */ 724 do { 725 726 if (i8042_command(¶m, I8042_CMD_CTL_TEST)) { 727 printk(KERN_ERR "i8042.c: i8042 controller self test timeout.\n"); 728 return -ENODEV; 729 } 730 731 if (param == I8042_RET_CTL_TEST) 732 return 0; 733 734 printk(KERN_ERR "i8042.c: i8042 controller selftest failed. (%#x != %#x)\n", 735 param, I8042_RET_CTL_TEST); 736 msleep(50); 737 } while (i++ < 5); 738 739 #ifdef CONFIG_X86 740 /* 741 * On x86, we don't fail entire i8042 initialization if controller 742 * reset fails in hopes that keyboard port will still be functional 743 * and user will still get a working keyboard. This is especially 744 * important on netbooks. On other arches we trust hardware more. 745 */ 746 printk(KERN_INFO 747 "i8042: giving up on controller selftest, continuing anyway...\n"); 748 return 0; 749 #else 750 return -EIO; 751 #endif 752 } 753 754 /* 755 * i8042_controller init initializes the i8042 controller, and, 756 * most importantly, sets it into non-xlated mode if that's 757 * desired. 758 */ 759 760 static int i8042_controller_init(void) 761 { 762 unsigned long flags; 763 764 /* 765 * Save the CTR for restoral on unload / reboot. 766 */ 767 768 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_RCTR)) { 769 printk(KERN_ERR "i8042.c: Can't read CTR while initializing i8042.\n"); 770 return -EIO; 771 } 772 773 i8042_initial_ctr = i8042_ctr; 774 775 /* 776 * Disable the keyboard interface and interrupt. 777 */ 778 779 i8042_ctr |= I8042_CTR_KBDDIS; 780 i8042_ctr &= ~I8042_CTR_KBDINT; 781 782 /* 783 * Handle keylock. 784 */ 785 786 spin_lock_irqsave(&i8042_lock, flags); 787 if (~i8042_read_status() & I8042_STR_KEYLOCK) { 788 if (i8042_unlock) 789 i8042_ctr |= I8042_CTR_IGNKEYLOCK; 790 else 791 printk(KERN_WARNING "i8042.c: Warning: Keylock active.\n"); 792 } 793 spin_unlock_irqrestore(&i8042_lock, flags); 794 795 /* 796 * If the chip is configured into nontranslated mode by the BIOS, don't 797 * bother enabling translating and be happy. 798 */ 799 800 if (~i8042_ctr & I8042_CTR_XLATE) 801 i8042_direct = 1; 802 803 /* 804 * Set nontranslated mode for the kbd interface if requested by an option. 805 * After this the kbd interface becomes a simple serial in/out, like the aux 806 * interface is. We don't do this by default, since it can confuse notebook 807 * BIOSes. 808 */ 809 810 if (i8042_direct) 811 i8042_ctr &= ~I8042_CTR_XLATE; 812 813 /* 814 * Write CTR back. 815 */ 816 817 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) { 818 printk(KERN_ERR "i8042.c: Can't write CTR while initializing i8042.\n"); 819 return -EIO; 820 } 821 822 return 0; 823 } 824 825 826 /* 827 * Reset the controller and reset CRT to the original value set by BIOS. 828 */ 829 830 static void i8042_controller_reset(void) 831 { 832 i8042_flush(); 833 834 /* 835 * Disable both KBD and AUX interfaces so they don't get in the way 836 */ 837 838 i8042_ctr |= I8042_CTR_KBDDIS | I8042_CTR_AUXDIS; 839 i8042_ctr &= ~(I8042_CTR_KBDINT | I8042_CTR_AUXINT); 840 841 /* 842 * Disable MUX mode if present. 843 */ 844 845 if (i8042_mux_present) 846 i8042_set_mux_mode(0, NULL); 847 848 /* 849 * Reset the controller if requested. 850 */ 851 852 i8042_controller_selftest(); 853 854 /* 855 * Restore the original control register setting. 856 */ 857 858 if (i8042_command(&i8042_initial_ctr, I8042_CMD_CTL_WCTR)) 859 printk(KERN_WARNING "i8042.c: Can't restore CTR.\n"); 860 } 861 862 863 /* 864 * i8042_panic_blink() will flash the keyboard LEDs and is called when 865 * kernel panics. Flashing LEDs is useful for users running X who may 866 * not see the console and will help distingushing panics from "real" 867 * lockups. 868 * 869 * Note that DELAY has a limit of 10ms so we will not get stuck here 870 * waiting for KBC to free up even if KBD interrupt is off 871 */ 872 873 #define DELAY do { mdelay(1); if (++delay > 10) return delay; } while(0) 874 875 static long i8042_panic_blink(long count) 876 { 877 long delay = 0; 878 static long last_blink; 879 static char led; 880 881 /* 882 * We expect frequency to be about 1/2s. KDB uses about 1s. 883 * Make sure they are different. 884 */ 885 if (!i8042_blink_frequency) 886 return 0; 887 if (count - last_blink < i8042_blink_frequency) 888 return 0; 889 890 led ^= 0x01 | 0x04; 891 while (i8042_read_status() & I8042_STR_IBF) 892 DELAY; 893 dbg("%02x -> i8042 (panic blink)", 0xed); 894 i8042_suppress_kbd_ack = 2; 895 i8042_write_data(0xed); /* set leds */ 896 DELAY; 897 while (i8042_read_status() & I8042_STR_IBF) 898 DELAY; 899 DELAY; 900 dbg("%02x -> i8042 (panic blink)", led); 901 i8042_write_data(led); 902 DELAY; 903 last_blink = count; 904 return delay; 905 } 906 907 #undef DELAY 908 909 #ifdef CONFIG_X86 910 static void i8042_dritek_enable(void) 911 { 912 char param = 0x90; 913 int error; 914 915 error = i8042_command(¶m, 0x1059); 916 if (error) 917 printk(KERN_WARNING 918 "Failed to enable DRITEK extension: %d\n", 919 error); 920 } 921 #endif 922 923 #ifdef CONFIG_PM 924 /* 925 * Here we try to restore the original BIOS settings. We only want to 926 * do that once, when we really suspend, not when we taking memory 927 * snapshot for swsusp (in this case we'll perform required cleanup 928 * as part of shutdown process). 929 */ 930 931 static int i8042_suspend(struct platform_device *dev, pm_message_t state) 932 { 933 if (dev->dev.power.power_state.event != state.event) { 934 if (state.event == PM_EVENT_SUSPEND) 935 i8042_controller_reset(); 936 937 dev->dev.power.power_state = state; 938 } 939 940 return 0; 941 } 942 943 944 /* 945 * Here we try to reset everything back to a state in which suspended 946 */ 947 948 static int i8042_resume(struct platform_device *dev) 949 { 950 int error; 951 952 /* 953 * Do not bother with restoring state if we haven't suspened yet 954 */ 955 if (dev->dev.power.power_state.event == PM_EVENT_ON) 956 return 0; 957 958 error = i8042_controller_check(); 959 if (error) 960 return error; 961 962 error = i8042_controller_selftest(); 963 if (error) 964 return error; 965 966 /* 967 * Restore original CTR value and disable all ports 968 */ 969 970 i8042_ctr = i8042_initial_ctr; 971 if (i8042_direct) 972 i8042_ctr &= ~I8042_CTR_XLATE; 973 i8042_ctr |= I8042_CTR_AUXDIS | I8042_CTR_KBDDIS; 974 i8042_ctr &= ~(I8042_CTR_AUXINT | I8042_CTR_KBDINT); 975 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) { 976 printk(KERN_WARNING "i8042: Can't write CTR to resume, retrying...\n"); 977 msleep(50); 978 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) { 979 printk(KERN_ERR "i8042: CTR write retry failed\n"); 980 return -EIO; 981 } 982 } 983 984 985 #ifdef CONFIG_X86 986 if (i8042_dritek) 987 i8042_dritek_enable(); 988 #endif 989 990 if (i8042_mux_present) { 991 if (i8042_set_mux_mode(1, NULL) || i8042_enable_mux_ports()) 992 printk(KERN_WARNING 993 "i8042: failed to resume active multiplexor, " 994 "mouse won't work.\n"); 995 } else if (i8042_ports[I8042_AUX_PORT_NO].serio) 996 i8042_enable_aux_port(); 997 998 if (i8042_ports[I8042_KBD_PORT_NO].serio) 999 i8042_enable_kbd_port(); 1000 1001 i8042_interrupt(0, NULL); 1002 1003 dev->dev.power.power_state = PMSG_ON; 1004 1005 return 0; 1006 } 1007 #endif /* CONFIG_PM */ 1008 1009 /* 1010 * We need to reset the 8042 back to original mode on system shutdown, 1011 * because otherwise BIOSes will be confused. 1012 */ 1013 1014 static void i8042_shutdown(struct platform_device *dev) 1015 { 1016 i8042_controller_reset(); 1017 } 1018 1019 static int __devinit i8042_create_kbd_port(void) 1020 { 1021 struct serio *serio; 1022 struct i8042_port *port = &i8042_ports[I8042_KBD_PORT_NO]; 1023 1024 serio = kzalloc(sizeof(struct serio), GFP_KERNEL); 1025 if (!serio) 1026 return -ENOMEM; 1027 1028 serio->id.type = i8042_direct ? SERIO_8042 : SERIO_8042_XL; 1029 serio->write = i8042_dumbkbd ? NULL : i8042_kbd_write; 1030 serio->start = i8042_start; 1031 serio->stop = i8042_stop; 1032 serio->port_data = port; 1033 serio->dev.parent = &i8042_platform_device->dev; 1034 strlcpy(serio->name, "i8042 KBD port", sizeof(serio->name)); 1035 strlcpy(serio->phys, I8042_KBD_PHYS_DESC, sizeof(serio->phys)); 1036 1037 port->serio = serio; 1038 port->irq = I8042_KBD_IRQ; 1039 1040 return 0; 1041 } 1042 1043 static int __devinit i8042_create_aux_port(int idx) 1044 { 1045 struct serio *serio; 1046 int port_no = idx < 0 ? I8042_AUX_PORT_NO : I8042_MUX_PORT_NO + idx; 1047 struct i8042_port *port = &i8042_ports[port_no]; 1048 1049 serio = kzalloc(sizeof(struct serio), GFP_KERNEL); 1050 if (!serio) 1051 return -ENOMEM; 1052 1053 serio->id.type = SERIO_8042; 1054 serio->write = i8042_aux_write; 1055 serio->start = i8042_start; 1056 serio->stop = i8042_stop; 1057 serio->port_data = port; 1058 serio->dev.parent = &i8042_platform_device->dev; 1059 if (idx < 0) { 1060 strlcpy(serio->name, "i8042 AUX port", sizeof(serio->name)); 1061 strlcpy(serio->phys, I8042_AUX_PHYS_DESC, sizeof(serio->phys)); 1062 } else { 1063 snprintf(serio->name, sizeof(serio->name), "i8042 AUX%d port", idx); 1064 snprintf(serio->phys, sizeof(serio->phys), I8042_MUX_PHYS_DESC, idx + 1); 1065 } 1066 1067 port->serio = serio; 1068 port->mux = idx; 1069 port->irq = I8042_AUX_IRQ; 1070 1071 return 0; 1072 } 1073 1074 static void __devinit i8042_free_kbd_port(void) 1075 { 1076 kfree(i8042_ports[I8042_KBD_PORT_NO].serio); 1077 i8042_ports[I8042_KBD_PORT_NO].serio = NULL; 1078 } 1079 1080 static void __devinit i8042_free_aux_ports(void) 1081 { 1082 int i; 1083 1084 for (i = I8042_AUX_PORT_NO; i < I8042_NUM_PORTS; i++) { 1085 kfree(i8042_ports[i].serio); 1086 i8042_ports[i].serio = NULL; 1087 } 1088 } 1089 1090 static void __devinit i8042_register_ports(void) 1091 { 1092 int i; 1093 1094 for (i = 0; i < I8042_NUM_PORTS; i++) { 1095 if (i8042_ports[i].serio) { 1096 printk(KERN_INFO "serio: %s at %#lx,%#lx irq %d\n", 1097 i8042_ports[i].serio->name, 1098 (unsigned long) I8042_DATA_REG, 1099 (unsigned long) I8042_COMMAND_REG, 1100 i8042_ports[i].irq); 1101 serio_register_port(i8042_ports[i].serio); 1102 } 1103 } 1104 } 1105 1106 static void __devexit i8042_unregister_ports(void) 1107 { 1108 int i; 1109 1110 for (i = 0; i < I8042_NUM_PORTS; i++) { 1111 if (i8042_ports[i].serio) { 1112 serio_unregister_port(i8042_ports[i].serio); 1113 i8042_ports[i].serio = NULL; 1114 } 1115 } 1116 } 1117 1118 static void i8042_free_irqs(void) 1119 { 1120 if (i8042_aux_irq_registered) 1121 free_irq(I8042_AUX_IRQ, i8042_platform_device); 1122 if (i8042_kbd_irq_registered) 1123 free_irq(I8042_KBD_IRQ, i8042_platform_device); 1124 1125 i8042_aux_irq_registered = i8042_kbd_irq_registered = 0; 1126 } 1127 1128 static int __devinit i8042_setup_aux(void) 1129 { 1130 int (*aux_enable)(void); 1131 int error; 1132 int i; 1133 1134 if (i8042_check_aux()) 1135 return -ENODEV; 1136 1137 if (i8042_nomux || i8042_check_mux()) { 1138 error = i8042_create_aux_port(-1); 1139 if (error) 1140 goto err_free_ports; 1141 aux_enable = i8042_enable_aux_port; 1142 } else { 1143 for (i = 0; i < I8042_NUM_MUX_PORTS; i++) { 1144 error = i8042_create_aux_port(i); 1145 if (error) 1146 goto err_free_ports; 1147 } 1148 aux_enable = i8042_enable_mux_ports; 1149 } 1150 1151 error = request_irq(I8042_AUX_IRQ, i8042_interrupt, IRQF_SHARED, 1152 "i8042", i8042_platform_device); 1153 if (error) 1154 goto err_free_ports; 1155 1156 if (aux_enable()) 1157 goto err_free_irq; 1158 1159 i8042_aux_irq_registered = 1; 1160 return 0; 1161 1162 err_free_irq: 1163 free_irq(I8042_AUX_IRQ, i8042_platform_device); 1164 err_free_ports: 1165 i8042_free_aux_ports(); 1166 return error; 1167 } 1168 1169 static int __devinit i8042_setup_kbd(void) 1170 { 1171 int error; 1172 1173 error = i8042_create_kbd_port(); 1174 if (error) 1175 return error; 1176 1177 error = request_irq(I8042_KBD_IRQ, i8042_interrupt, IRQF_SHARED, 1178 "i8042", i8042_platform_device); 1179 if (error) 1180 goto err_free_port; 1181 1182 error = i8042_enable_kbd_port(); 1183 if (error) 1184 goto err_free_irq; 1185 1186 i8042_kbd_irq_registered = 1; 1187 return 0; 1188 1189 err_free_irq: 1190 free_irq(I8042_KBD_IRQ, i8042_platform_device); 1191 err_free_port: 1192 i8042_free_kbd_port(); 1193 return error; 1194 } 1195 1196 static int __devinit i8042_probe(struct platform_device *dev) 1197 { 1198 int error; 1199 1200 error = i8042_controller_selftest(); 1201 if (error) 1202 return error; 1203 1204 error = i8042_controller_init(); 1205 if (error) 1206 return error; 1207 1208 #ifdef CONFIG_X86 1209 if (i8042_dritek) 1210 i8042_dritek_enable(); 1211 #endif 1212 1213 if (!i8042_noaux) { 1214 error = i8042_setup_aux(); 1215 if (error && error != -ENODEV && error != -EBUSY) 1216 goto out_fail; 1217 } 1218 1219 if (!i8042_nokbd) { 1220 error = i8042_setup_kbd(); 1221 if (error) 1222 goto out_fail; 1223 } 1224 /* 1225 * Ok, everything is ready, let's register all serio ports 1226 */ 1227 i8042_register_ports(); 1228 1229 return 0; 1230 1231 out_fail: 1232 i8042_free_aux_ports(); /* in case KBD failed but AUX not */ 1233 i8042_free_irqs(); 1234 i8042_controller_reset(); 1235 1236 return error; 1237 } 1238 1239 static int __devexit i8042_remove(struct platform_device *dev) 1240 { 1241 i8042_unregister_ports(); 1242 i8042_free_irqs(); 1243 i8042_controller_reset(); 1244 1245 return 0; 1246 } 1247 1248 static struct platform_driver i8042_driver = { 1249 .driver = { 1250 .name = "i8042", 1251 .owner = THIS_MODULE, 1252 }, 1253 .probe = i8042_probe, 1254 .remove = __devexit_p(i8042_remove), 1255 .shutdown = i8042_shutdown, 1256 #ifdef CONFIG_PM 1257 .suspend = i8042_suspend, 1258 .resume = i8042_resume, 1259 #endif 1260 }; 1261 1262 static int __init i8042_init(void) 1263 { 1264 int err; 1265 1266 dbg_init(); 1267 1268 err = i8042_platform_init(); 1269 if (err) 1270 return err; 1271 1272 err = i8042_controller_check(); 1273 if (err) 1274 goto err_platform_exit; 1275 1276 err = platform_driver_register(&i8042_driver); 1277 if (err) 1278 goto err_platform_exit; 1279 1280 i8042_platform_device = platform_device_alloc("i8042", -1); 1281 if (!i8042_platform_device) { 1282 err = -ENOMEM; 1283 goto err_unregister_driver; 1284 } 1285 1286 err = platform_device_add(i8042_platform_device); 1287 if (err) 1288 goto err_free_device; 1289 1290 panic_blink = i8042_panic_blink; 1291 1292 return 0; 1293 1294 err_free_device: 1295 platform_device_put(i8042_platform_device); 1296 err_unregister_driver: 1297 platform_driver_unregister(&i8042_driver); 1298 err_platform_exit: 1299 i8042_platform_exit(); 1300 1301 return err; 1302 } 1303 1304 static void __exit i8042_exit(void) 1305 { 1306 platform_device_unregister(i8042_platform_device); 1307 platform_driver_unregister(&i8042_driver); 1308 i8042_platform_exit(); 1309 1310 panic_blink = NULL; 1311 } 1312 1313 module_init(i8042_init); 1314 module_exit(i8042_exit); 1315