1 /* 2 * Cypress APA trackpad with I2C interface 3 * 4 * Author: Dudley Du <dudl@cypress.com> 5 * Further cleanup and restructuring by: 6 * Daniel Kurtz <djkurtz@chromium.org> 7 * Benson Leung <bleung@chromium.org> 8 * 9 * Copyright (C) 2011-2014 Cypress Semiconductor, Inc. 10 * Copyright (C) 2011-2012 Google, Inc. 11 * 12 * This file is subject to the terms and conditions of the GNU General Public 13 * License. See the file COPYING in the main directory of this archive for 14 * more details. 15 */ 16 17 #include <linux/delay.h> 18 #include <linux/i2c.h> 19 #include <linux/input.h> 20 #include <linux/input/mt.h> 21 #include <linux/module.h> 22 #include <linux/slab.h> 23 #include <asm/unaligned.h> 24 #include "cyapa.h" 25 26 27 #define GEN3_MAX_FINGERS 5 28 #define GEN3_FINGER_NUM(x) (((x) >> 4) & 0x07) 29 30 #define BLK_HEAD_BYTES 32 31 32 /* Macro for register map group offset. */ 33 #define PRODUCT_ID_SIZE 16 34 #define QUERY_DATA_SIZE 27 35 #define REG_PROTOCOL_GEN_QUERY_OFFSET 20 36 37 #define REG_OFFSET_DATA_BASE 0x0000 38 #define REG_OFFSET_COMMAND_BASE 0x0028 39 #define REG_OFFSET_QUERY_BASE 0x002a 40 41 #define CYAPA_OFFSET_SOFT_RESET REG_OFFSET_COMMAND_BASE 42 #define OP_RECALIBRATION_MASK 0x80 43 #define OP_REPORT_BASELINE_MASK 0x40 44 #define REG_OFFSET_MAX_BASELINE 0x0026 45 #define REG_OFFSET_MIN_BASELINE 0x0027 46 47 #define REG_OFFSET_POWER_MODE (REG_OFFSET_COMMAND_BASE + 1) 48 #define SET_POWER_MODE_DELAY 10000 /* Unit: us */ 49 #define SET_POWER_MODE_TRIES 5 50 51 #define GEN3_BL_CMD_CHECKSUM_SEED 0xff 52 #define GEN3_BL_CMD_INITIATE_BL 0x38 53 #define GEN3_BL_CMD_WRITE_BLOCK 0x39 54 #define GEN3_BL_CMD_VERIFY_BLOCK 0x3a 55 #define GEN3_BL_CMD_TERMINATE_BL 0x3b 56 #define GEN3_BL_CMD_LAUNCH_APP 0xa5 57 58 /* 59 * CYAPA trackpad device states. 60 * Used in register 0x00, bit1-0, DeviceStatus field. 61 * Other values indicate device is in an abnormal state and must be reset. 62 */ 63 #define CYAPA_DEV_NORMAL 0x03 64 #define CYAPA_DEV_BUSY 0x01 65 66 #define CYAPA_FW_BLOCK_SIZE 64 67 #define CYAPA_FW_READ_SIZE 16 68 #define CYAPA_FW_HDR_START 0x0780 69 #define CYAPA_FW_HDR_BLOCK_COUNT 2 70 #define CYAPA_FW_HDR_BLOCK_START (CYAPA_FW_HDR_START / CYAPA_FW_BLOCK_SIZE) 71 #define CYAPA_FW_HDR_SIZE (CYAPA_FW_HDR_BLOCK_COUNT * \ 72 CYAPA_FW_BLOCK_SIZE) 73 #define CYAPA_FW_DATA_START 0x0800 74 #define CYAPA_FW_DATA_BLOCK_COUNT 480 75 #define CYAPA_FW_DATA_BLOCK_START (CYAPA_FW_DATA_START / CYAPA_FW_BLOCK_SIZE) 76 #define CYAPA_FW_DATA_SIZE (CYAPA_FW_DATA_BLOCK_COUNT * \ 77 CYAPA_FW_BLOCK_SIZE) 78 #define CYAPA_FW_SIZE (CYAPA_FW_HDR_SIZE + CYAPA_FW_DATA_SIZE) 79 #define CYAPA_CMD_LEN 16 80 81 #define GEN3_BL_IDLE_FW_MAJ_VER_OFFSET 0x0b 82 #define GEN3_BL_IDLE_FW_MIN_VER_OFFSET (GEN3_BL_IDLE_FW_MAJ_VER_OFFSET + 1) 83 84 85 struct cyapa_touch { 86 /* 87 * high bits or x/y position value 88 * bit 7 - 4: high 4 bits of x position value 89 * bit 3 - 0: high 4 bits of y position value 90 */ 91 u8 xy_hi; 92 u8 x_lo; /* low 8 bits of x position value. */ 93 u8 y_lo; /* low 8 bits of y position value. */ 94 u8 pressure; 95 /* id range is 1 - 15. It is incremented with every new touch. */ 96 u8 id; 97 } __packed; 98 99 struct cyapa_reg_data { 100 /* 101 * bit 0 - 1: device status 102 * bit 3 - 2: power mode 103 * bit 6 - 4: reserved 104 * bit 7: interrupt valid bit 105 */ 106 u8 device_status; 107 /* 108 * bit 7 - 4: number of fingers currently touching pad 109 * bit 3: valid data check bit 110 * bit 2: middle mechanism button state if exists 111 * bit 1: right mechanism button state if exists 112 * bit 0: left mechanism button state if exists 113 */ 114 u8 finger_btn; 115 /* CYAPA reports up to 5 touches per packet. */ 116 struct cyapa_touch touches[5]; 117 } __packed; 118 119 struct gen3_write_block_cmd { 120 u8 checksum_seed; /* Always be 0xff */ 121 u8 cmd_code; /* command code: 0x39 */ 122 u8 key[8]; /* 8-byte security key */ 123 __be16 block_num; 124 u8 block_data[CYAPA_FW_BLOCK_SIZE]; 125 u8 block_checksum; /* Calculated using bytes 12 - 75 */ 126 u8 cmd_checksum; /* Calculated using bytes 0-76 */ 127 } __packed; 128 129 static const u8 security_key[] = { 130 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07 }; 131 static const u8 bl_activate[] = { 0x00, 0xff, 0x38, 0x00, 0x01, 0x02, 0x03, 132 0x04, 0x05, 0x06, 0x07 }; 133 static const u8 bl_deactivate[] = { 0x00, 0xff, 0x3b, 0x00, 0x01, 0x02, 0x03, 134 0x04, 0x05, 0x06, 0x07 }; 135 static const u8 bl_exit[] = { 0x00, 0xff, 0xa5, 0x00, 0x01, 0x02, 0x03, 0x04, 136 0x05, 0x06, 0x07 }; 137 138 139 /* for byte read/write command */ 140 #define CMD_RESET 0 141 #define CMD_POWER_MODE 1 142 #define CMD_DEV_STATUS 2 143 #define CMD_REPORT_MAX_BASELINE 3 144 #define CMD_REPORT_MIN_BASELINE 4 145 #define SMBUS_BYTE_CMD(cmd) (((cmd) & 0x3f) << 1) 146 #define CYAPA_SMBUS_RESET SMBUS_BYTE_CMD(CMD_RESET) 147 #define CYAPA_SMBUS_POWER_MODE SMBUS_BYTE_CMD(CMD_POWER_MODE) 148 #define CYAPA_SMBUS_DEV_STATUS SMBUS_BYTE_CMD(CMD_DEV_STATUS) 149 #define CYAPA_SMBUS_MAX_BASELINE SMBUS_BYTE_CMD(CMD_REPORT_MAX_BASELINE) 150 #define CYAPA_SMBUS_MIN_BASELINE SMBUS_BYTE_CMD(CMD_REPORT_MIN_BASELINE) 151 152 /* for group registers read/write command */ 153 #define REG_GROUP_DATA 0 154 #define REG_GROUP_CMD 2 155 #define REG_GROUP_QUERY 3 156 #define SMBUS_GROUP_CMD(grp) (0x80 | (((grp) & 0x07) << 3)) 157 #define CYAPA_SMBUS_GROUP_DATA SMBUS_GROUP_CMD(REG_GROUP_DATA) 158 #define CYAPA_SMBUS_GROUP_CMD SMBUS_GROUP_CMD(REG_GROUP_CMD) 159 #define CYAPA_SMBUS_GROUP_QUERY SMBUS_GROUP_CMD(REG_GROUP_QUERY) 160 161 /* for register block read/write command */ 162 #define CMD_BL_STATUS 0 163 #define CMD_BL_HEAD 1 164 #define CMD_BL_CMD 2 165 #define CMD_BL_DATA 3 166 #define CMD_BL_ALL 4 167 #define CMD_BLK_PRODUCT_ID 5 168 #define CMD_BLK_HEAD 6 169 #define SMBUS_BLOCK_CMD(cmd) (0xc0 | (((cmd) & 0x1f) << 1)) 170 171 /* register block read/write command in bootloader mode */ 172 #define CYAPA_SMBUS_BL_STATUS SMBUS_BLOCK_CMD(CMD_BL_STATUS) 173 #define CYAPA_SMBUS_BL_HEAD SMBUS_BLOCK_CMD(CMD_BL_HEAD) 174 #define CYAPA_SMBUS_BL_CMD SMBUS_BLOCK_CMD(CMD_BL_CMD) 175 #define CYAPA_SMBUS_BL_DATA SMBUS_BLOCK_CMD(CMD_BL_DATA) 176 #define CYAPA_SMBUS_BL_ALL SMBUS_BLOCK_CMD(CMD_BL_ALL) 177 178 /* register block read/write command in operational mode */ 179 #define CYAPA_SMBUS_BLK_PRODUCT_ID SMBUS_BLOCK_CMD(CMD_BLK_PRODUCT_ID) 180 #define CYAPA_SMBUS_BLK_HEAD SMBUS_BLOCK_CMD(CMD_BLK_HEAD) 181 182 /* for byte read/write command */ 183 #define CMD_RESET 0 184 #define CMD_POWER_MODE 1 185 #define CMD_DEV_STATUS 2 186 #define CMD_REPORT_MAX_BASELINE 3 187 #define CMD_REPORT_MIN_BASELINE 4 188 #define SMBUS_BYTE_CMD(cmd) (((cmd) & 0x3f) << 1) 189 #define CYAPA_SMBUS_RESET SMBUS_BYTE_CMD(CMD_RESET) 190 #define CYAPA_SMBUS_POWER_MODE SMBUS_BYTE_CMD(CMD_POWER_MODE) 191 #define CYAPA_SMBUS_DEV_STATUS SMBUS_BYTE_CMD(CMD_DEV_STATUS) 192 #define CYAPA_SMBUS_MAX_BASELINE SMBUS_BYTE_CMD(CMD_REPORT_MAX_BASELINE) 193 #define CYAPA_SMBUS_MIN_BASELINE SMBUS_BYTE_CMD(CMD_REPORT_MIN_BASELINE) 194 195 /* for group registers read/write command */ 196 #define REG_GROUP_DATA 0 197 #define REG_GROUP_CMD 2 198 #define REG_GROUP_QUERY 3 199 #define SMBUS_GROUP_CMD(grp) (0x80 | (((grp) & 0x07) << 3)) 200 #define CYAPA_SMBUS_GROUP_DATA SMBUS_GROUP_CMD(REG_GROUP_DATA) 201 #define CYAPA_SMBUS_GROUP_CMD SMBUS_GROUP_CMD(REG_GROUP_CMD) 202 #define CYAPA_SMBUS_GROUP_QUERY SMBUS_GROUP_CMD(REG_GROUP_QUERY) 203 204 /* for register block read/write command */ 205 #define CMD_BL_STATUS 0 206 #define CMD_BL_HEAD 1 207 #define CMD_BL_CMD 2 208 #define CMD_BL_DATA 3 209 #define CMD_BL_ALL 4 210 #define CMD_BLK_PRODUCT_ID 5 211 #define CMD_BLK_HEAD 6 212 #define SMBUS_BLOCK_CMD(cmd) (0xc0 | (((cmd) & 0x1f) << 1)) 213 214 /* register block read/write command in bootloader mode */ 215 #define CYAPA_SMBUS_BL_STATUS SMBUS_BLOCK_CMD(CMD_BL_STATUS) 216 #define CYAPA_SMBUS_BL_HEAD SMBUS_BLOCK_CMD(CMD_BL_HEAD) 217 #define CYAPA_SMBUS_BL_CMD SMBUS_BLOCK_CMD(CMD_BL_CMD) 218 #define CYAPA_SMBUS_BL_DATA SMBUS_BLOCK_CMD(CMD_BL_DATA) 219 #define CYAPA_SMBUS_BL_ALL SMBUS_BLOCK_CMD(CMD_BL_ALL) 220 221 /* register block read/write command in operational mode */ 222 #define CYAPA_SMBUS_BLK_PRODUCT_ID SMBUS_BLOCK_CMD(CMD_BLK_PRODUCT_ID) 223 #define CYAPA_SMBUS_BLK_HEAD SMBUS_BLOCK_CMD(CMD_BLK_HEAD) 224 225 struct cyapa_cmd_len { 226 u8 cmd; 227 u8 len; 228 }; 229 230 /* maps generic CYAPA_CMD_* code to the I2C equivalent */ 231 static const struct cyapa_cmd_len cyapa_i2c_cmds[] = { 232 { CYAPA_OFFSET_SOFT_RESET, 1 }, /* CYAPA_CMD_SOFT_RESET */ 233 { REG_OFFSET_COMMAND_BASE + 1, 1 }, /* CYAPA_CMD_POWER_MODE */ 234 { REG_OFFSET_DATA_BASE, 1 }, /* CYAPA_CMD_DEV_STATUS */ 235 { REG_OFFSET_DATA_BASE, sizeof(struct cyapa_reg_data) }, 236 /* CYAPA_CMD_GROUP_DATA */ 237 { REG_OFFSET_COMMAND_BASE, 0 }, /* CYAPA_CMD_GROUP_CMD */ 238 { REG_OFFSET_QUERY_BASE, QUERY_DATA_SIZE }, /* CYAPA_CMD_GROUP_QUERY */ 239 { BL_HEAD_OFFSET, 3 }, /* CYAPA_CMD_BL_STATUS */ 240 { BL_HEAD_OFFSET, 16 }, /* CYAPA_CMD_BL_HEAD */ 241 { BL_HEAD_OFFSET, 16 }, /* CYAPA_CMD_BL_CMD */ 242 { BL_DATA_OFFSET, 16 }, /* CYAPA_CMD_BL_DATA */ 243 { BL_HEAD_OFFSET, 32 }, /* CYAPA_CMD_BL_ALL */ 244 { REG_OFFSET_QUERY_BASE, PRODUCT_ID_SIZE }, 245 /* CYAPA_CMD_BLK_PRODUCT_ID */ 246 { REG_OFFSET_DATA_BASE, 32 }, /* CYAPA_CMD_BLK_HEAD */ 247 { REG_OFFSET_MAX_BASELINE, 1 }, /* CYAPA_CMD_MAX_BASELINE */ 248 { REG_OFFSET_MIN_BASELINE, 1 }, /* CYAPA_CMD_MIN_BASELINE */ 249 }; 250 251 static const struct cyapa_cmd_len cyapa_smbus_cmds[] = { 252 { CYAPA_SMBUS_RESET, 1 }, /* CYAPA_CMD_SOFT_RESET */ 253 { CYAPA_SMBUS_POWER_MODE, 1 }, /* CYAPA_CMD_POWER_MODE */ 254 { CYAPA_SMBUS_DEV_STATUS, 1 }, /* CYAPA_CMD_DEV_STATUS */ 255 { CYAPA_SMBUS_GROUP_DATA, sizeof(struct cyapa_reg_data) }, 256 /* CYAPA_CMD_GROUP_DATA */ 257 { CYAPA_SMBUS_GROUP_CMD, 2 }, /* CYAPA_CMD_GROUP_CMD */ 258 { CYAPA_SMBUS_GROUP_QUERY, QUERY_DATA_SIZE }, 259 /* CYAPA_CMD_GROUP_QUERY */ 260 { CYAPA_SMBUS_BL_STATUS, 3 }, /* CYAPA_CMD_BL_STATUS */ 261 { CYAPA_SMBUS_BL_HEAD, 16 }, /* CYAPA_CMD_BL_HEAD */ 262 { CYAPA_SMBUS_BL_CMD, 16 }, /* CYAPA_CMD_BL_CMD */ 263 { CYAPA_SMBUS_BL_DATA, 16 }, /* CYAPA_CMD_BL_DATA */ 264 { CYAPA_SMBUS_BL_ALL, 32 }, /* CYAPA_CMD_BL_ALL */ 265 { CYAPA_SMBUS_BLK_PRODUCT_ID, PRODUCT_ID_SIZE }, 266 /* CYAPA_CMD_BLK_PRODUCT_ID */ 267 { CYAPA_SMBUS_BLK_HEAD, 16 }, /* CYAPA_CMD_BLK_HEAD */ 268 { CYAPA_SMBUS_MAX_BASELINE, 1 }, /* CYAPA_CMD_MAX_BASELINE */ 269 { CYAPA_SMBUS_MIN_BASELINE, 1 }, /* CYAPA_CMD_MIN_BASELINE */ 270 }; 271 272 273 /* 274 * cyapa_smbus_read_block - perform smbus block read command 275 * @cyapa - private data structure of the driver 276 * @cmd - the properly encoded smbus command 277 * @len - expected length of smbus command result 278 * @values - buffer to store smbus command result 279 * 280 * Returns negative errno, else the number of bytes written. 281 * 282 * Note: 283 * In trackpad device, the memory block allocated for I2C register map 284 * is 256 bytes, so the max read block for I2C bus is 256 bytes. 285 */ 286 ssize_t cyapa_smbus_read_block(struct cyapa *cyapa, u8 cmd, size_t len, 287 u8 *values) 288 { 289 ssize_t ret; 290 u8 index; 291 u8 smbus_cmd; 292 u8 *buf; 293 struct i2c_client *client = cyapa->client; 294 295 if (!(SMBUS_BYTE_BLOCK_CMD_MASK & cmd)) 296 return -EINVAL; 297 298 if (SMBUS_GROUP_BLOCK_CMD_MASK & cmd) { 299 /* read specific block registers command. */ 300 smbus_cmd = SMBUS_ENCODE_RW(cmd, SMBUS_READ); 301 ret = i2c_smbus_read_block_data(client, smbus_cmd, values); 302 goto out; 303 } 304 305 ret = 0; 306 for (index = 0; index * I2C_SMBUS_BLOCK_MAX < len; index++) { 307 smbus_cmd = SMBUS_ENCODE_IDX(cmd, index); 308 smbus_cmd = SMBUS_ENCODE_RW(smbus_cmd, SMBUS_READ); 309 buf = values + I2C_SMBUS_BLOCK_MAX * index; 310 ret = i2c_smbus_read_block_data(client, smbus_cmd, buf); 311 if (ret < 0) 312 goto out; 313 } 314 315 out: 316 return ret > 0 ? len : ret; 317 } 318 319 static s32 cyapa_read_byte(struct cyapa *cyapa, u8 cmd_idx) 320 { 321 u8 cmd; 322 323 if (cyapa->smbus) { 324 cmd = cyapa_smbus_cmds[cmd_idx].cmd; 325 cmd = SMBUS_ENCODE_RW(cmd, SMBUS_READ); 326 } else { 327 cmd = cyapa_i2c_cmds[cmd_idx].cmd; 328 } 329 return i2c_smbus_read_byte_data(cyapa->client, cmd); 330 } 331 332 static s32 cyapa_write_byte(struct cyapa *cyapa, u8 cmd_idx, u8 value) 333 { 334 u8 cmd; 335 336 if (cyapa->smbus) { 337 cmd = cyapa_smbus_cmds[cmd_idx].cmd; 338 cmd = SMBUS_ENCODE_RW(cmd, SMBUS_WRITE); 339 } else { 340 cmd = cyapa_i2c_cmds[cmd_idx].cmd; 341 } 342 return i2c_smbus_write_byte_data(cyapa->client, cmd, value); 343 } 344 345 ssize_t cyapa_i2c_reg_read_block(struct cyapa *cyapa, u8 reg, size_t len, 346 u8 *values) 347 { 348 return i2c_smbus_read_i2c_block_data(cyapa->client, reg, len, values); 349 } 350 351 static ssize_t cyapa_i2c_reg_write_block(struct cyapa *cyapa, u8 reg, 352 size_t len, const u8 *values) 353 { 354 return i2c_smbus_write_i2c_block_data(cyapa->client, reg, len, values); 355 } 356 357 ssize_t cyapa_read_block(struct cyapa *cyapa, u8 cmd_idx, u8 *values) 358 { 359 u8 cmd; 360 size_t len; 361 362 if (cyapa->smbus) { 363 cmd = cyapa_smbus_cmds[cmd_idx].cmd; 364 len = cyapa_smbus_cmds[cmd_idx].len; 365 return cyapa_smbus_read_block(cyapa, cmd, len, values); 366 } 367 cmd = cyapa_i2c_cmds[cmd_idx].cmd; 368 len = cyapa_i2c_cmds[cmd_idx].len; 369 return cyapa_i2c_reg_read_block(cyapa, cmd, len, values); 370 } 371 372 /* 373 * Determine the Gen3 trackpad device's current operating state. 374 * 375 */ 376 static int cyapa_gen3_state_parse(struct cyapa *cyapa, u8 *reg_data, int len) 377 { 378 cyapa->state = CYAPA_STATE_NO_DEVICE; 379 380 /* Parse based on Gen3 characteristic registers and bits */ 381 if (reg_data[REG_BL_FILE] == BL_FILE && 382 reg_data[REG_BL_ERROR] == BL_ERROR_NO_ERR_IDLE && 383 (reg_data[REG_BL_STATUS] == 384 (BL_STATUS_RUNNING | BL_STATUS_CSUM_VALID) || 385 reg_data[REG_BL_STATUS] == BL_STATUS_RUNNING)) { 386 /* 387 * Normal state after power on or reset, 388 * REG_BL_STATUS == 0x11, firmware image checksum is valid. 389 * REG_BL_STATUS == 0x10, firmware image checksum is invalid. 390 */ 391 cyapa->gen = CYAPA_GEN3; 392 cyapa->state = CYAPA_STATE_BL_IDLE; 393 } else if (reg_data[REG_BL_FILE] == BL_FILE && 394 (reg_data[REG_BL_STATUS] & BL_STATUS_RUNNING) == 395 BL_STATUS_RUNNING) { 396 cyapa->gen = CYAPA_GEN3; 397 if (reg_data[REG_BL_STATUS] & BL_STATUS_BUSY) { 398 cyapa->state = CYAPA_STATE_BL_BUSY; 399 } else { 400 if ((reg_data[REG_BL_ERROR] & BL_ERROR_BOOTLOADING) == 401 BL_ERROR_BOOTLOADING) 402 cyapa->state = CYAPA_STATE_BL_ACTIVE; 403 else 404 cyapa->state = CYAPA_STATE_BL_IDLE; 405 } 406 } else if ((reg_data[REG_OP_STATUS] & OP_STATUS_SRC) && 407 (reg_data[REG_OP_DATA1] & OP_DATA_VALID)) { 408 /* 409 * Normal state when running in operational mode, 410 * may also not in full power state or 411 * busying in command process. 412 */ 413 if (GEN3_FINGER_NUM(reg_data[REG_OP_DATA1]) <= 414 GEN3_MAX_FINGERS) { 415 /* Finger number data is valid. */ 416 cyapa->gen = CYAPA_GEN3; 417 cyapa->state = CYAPA_STATE_OP; 418 } 419 } else if (reg_data[REG_OP_STATUS] == 0x0C && 420 reg_data[REG_OP_DATA1] == 0x08) { 421 /* Op state when first two registers overwritten with 0x00 */ 422 cyapa->gen = CYAPA_GEN3; 423 cyapa->state = CYAPA_STATE_OP; 424 } else if (reg_data[REG_BL_STATUS] & 425 (BL_STATUS_RUNNING | BL_STATUS_BUSY)) { 426 cyapa->gen = CYAPA_GEN3; 427 cyapa->state = CYAPA_STATE_BL_BUSY; 428 } 429 430 if (cyapa->gen == CYAPA_GEN3 && (cyapa->state == CYAPA_STATE_OP || 431 cyapa->state == CYAPA_STATE_BL_IDLE || 432 cyapa->state == CYAPA_STATE_BL_ACTIVE || 433 cyapa->state == CYAPA_STATE_BL_BUSY)) 434 return 0; 435 436 return -EAGAIN; 437 } 438 439 /* 440 * Enter bootloader by soft resetting the device. 441 * 442 * If device is already in the bootloader, the function just returns. 443 * Otherwise, reset the device; after reset, device enters bootloader idle 444 * state immediately. 445 * 446 * Returns: 447 * 0 on success 448 * -EAGAIN device was reset, but is not now in bootloader idle state 449 * < 0 if the device never responds within the timeout 450 */ 451 static int cyapa_gen3_bl_enter(struct cyapa *cyapa) 452 { 453 int error; 454 int waiting_time; 455 456 error = cyapa_poll_state(cyapa, 500); 457 if (error) 458 return error; 459 if (cyapa->state == CYAPA_STATE_BL_IDLE) { 460 /* Already in BL_IDLE. Skipping reset. */ 461 return 0; 462 } 463 464 if (cyapa->state != CYAPA_STATE_OP) 465 return -EAGAIN; 466 467 cyapa->operational = false; 468 cyapa->state = CYAPA_STATE_NO_DEVICE; 469 error = cyapa_write_byte(cyapa, CYAPA_CMD_SOFT_RESET, 0x01); 470 if (error) 471 return -EIO; 472 473 usleep_range(25000, 50000); 474 waiting_time = 2000; /* For some shipset, max waiting time is 1~2s. */ 475 do { 476 error = cyapa_poll_state(cyapa, 500); 477 if (error) { 478 if (error == -ETIMEDOUT) { 479 waiting_time -= 500; 480 continue; 481 } 482 return error; 483 } 484 485 if ((cyapa->state == CYAPA_STATE_BL_IDLE) && 486 !(cyapa->status[REG_BL_STATUS] & BL_STATUS_WATCHDOG)) 487 break; 488 489 msleep(100); 490 waiting_time -= 100; 491 } while (waiting_time > 0); 492 493 if ((cyapa->state != CYAPA_STATE_BL_IDLE) || 494 (cyapa->status[REG_BL_STATUS] & BL_STATUS_WATCHDOG)) 495 return -EAGAIN; 496 497 return 0; 498 } 499 500 static int cyapa_gen3_bl_activate(struct cyapa *cyapa) 501 { 502 int error; 503 504 error = cyapa_i2c_reg_write_block(cyapa, 0, sizeof(bl_activate), 505 bl_activate); 506 if (error) 507 return error; 508 509 /* Wait for bootloader to activate; takes between 2 and 12 seconds */ 510 msleep(2000); 511 error = cyapa_poll_state(cyapa, 11000); 512 if (error) 513 return error; 514 if (cyapa->state != CYAPA_STATE_BL_ACTIVE) 515 return -EAGAIN; 516 517 return 0; 518 } 519 520 static int cyapa_gen3_bl_deactivate(struct cyapa *cyapa) 521 { 522 int error; 523 524 error = cyapa_i2c_reg_write_block(cyapa, 0, sizeof(bl_deactivate), 525 bl_deactivate); 526 if (error) 527 return error; 528 529 /* Wait for bootloader to switch to idle state; should take < 100ms */ 530 msleep(100); 531 error = cyapa_poll_state(cyapa, 500); 532 if (error) 533 return error; 534 if (cyapa->state != CYAPA_STATE_BL_IDLE) 535 return -EAGAIN; 536 return 0; 537 } 538 539 /* 540 * Exit bootloader 541 * 542 * Send bl_exit command, then wait 50 - 100 ms to let device transition to 543 * operational mode. If this is the first time the device's firmware is 544 * running, it can take up to 2 seconds to calibrate its sensors. So, poll 545 * the device's new state for up to 2 seconds. 546 * 547 * Returns: 548 * -EIO failure while reading from device 549 * -EAGAIN device is stuck in bootloader, b/c it has invalid firmware 550 * 0 device is supported and in operational mode 551 */ 552 static int cyapa_gen3_bl_exit(struct cyapa *cyapa) 553 { 554 int error; 555 556 error = cyapa_i2c_reg_write_block(cyapa, 0, sizeof(bl_exit), bl_exit); 557 if (error) 558 return error; 559 560 /* 561 * Wait for bootloader to exit, and operation mode to start. 562 * Normally, this takes at least 50 ms. 563 */ 564 usleep_range(50000, 100000); 565 /* 566 * In addition, when a device boots for the first time after being 567 * updated to new firmware, it must first calibrate its sensors, which 568 * can take up to an additional 2 seconds. If the device power is 569 * running low, this may take even longer. 570 */ 571 error = cyapa_poll_state(cyapa, 4000); 572 if (error < 0) 573 return error; 574 if (cyapa->state != CYAPA_STATE_OP) 575 return -EAGAIN; 576 577 return 0; 578 } 579 580 static u16 cyapa_gen3_csum(const u8 *buf, size_t count) 581 { 582 int i; 583 u16 csum = 0; 584 585 for (i = 0; i < count; i++) 586 csum += buf[i]; 587 588 return csum; 589 } 590 591 /* 592 * Verify the integrity of a CYAPA firmware image file. 593 * 594 * The firmware image file is 30848 bytes, composed of 482 64-byte blocks. 595 * 596 * The first 2 blocks are the firmware header. 597 * The next 480 blocks are the firmware image. 598 * 599 * The first two bytes of the header hold the header checksum, computed by 600 * summing the other 126 bytes of the header. 601 * The last two bytes of the header hold the firmware image checksum, computed 602 * by summing the 30720 bytes of the image modulo 0xffff. 603 * 604 * Both checksums are stored little-endian. 605 */ 606 static int cyapa_gen3_check_fw(struct cyapa *cyapa, const struct firmware *fw) 607 { 608 struct device *dev = &cyapa->client->dev; 609 u16 csum; 610 u16 csum_expected; 611 612 /* Firmware must match exact 30848 bytes = 482 64-byte blocks. */ 613 if (fw->size != CYAPA_FW_SIZE) { 614 dev_err(dev, "invalid firmware size = %zu, expected %u.\n", 615 fw->size, CYAPA_FW_SIZE); 616 return -EINVAL; 617 } 618 619 /* Verify header block */ 620 csum_expected = (fw->data[0] << 8) | fw->data[1]; 621 csum = cyapa_gen3_csum(&fw->data[2], CYAPA_FW_HDR_SIZE - 2); 622 if (csum != csum_expected) { 623 dev_err(dev, "%s %04x, expected: %04x\n", 624 "invalid firmware header checksum = ", 625 csum, csum_expected); 626 return -EINVAL; 627 } 628 629 /* Verify firmware image */ 630 csum_expected = (fw->data[CYAPA_FW_HDR_SIZE - 2] << 8) | 631 fw->data[CYAPA_FW_HDR_SIZE - 1]; 632 csum = cyapa_gen3_csum(&fw->data[CYAPA_FW_HDR_SIZE], 633 CYAPA_FW_DATA_SIZE); 634 if (csum != csum_expected) { 635 dev_err(dev, "%s %04x, expected: %04x\n", 636 "invalid firmware header checksum = ", 637 csum, csum_expected); 638 return -EINVAL; 639 } 640 return 0; 641 } 642 643 /* 644 * Write a |len| byte long buffer |buf| to the device, by chopping it up into a 645 * sequence of smaller |CYAPA_CMD_LEN|-length write commands. 646 * 647 * The data bytes for a write command are prepended with the 1-byte offset 648 * of the data relative to the start of |buf|. 649 */ 650 static int cyapa_gen3_write_buffer(struct cyapa *cyapa, 651 const u8 *buf, size_t len) 652 { 653 int error; 654 size_t i; 655 unsigned char cmd[CYAPA_CMD_LEN + 1]; 656 size_t cmd_len; 657 658 for (i = 0; i < len; i += CYAPA_CMD_LEN) { 659 const u8 *payload = &buf[i]; 660 661 cmd_len = (len - i >= CYAPA_CMD_LEN) ? CYAPA_CMD_LEN : len - i; 662 cmd[0] = i; 663 memcpy(&cmd[1], payload, cmd_len); 664 665 error = cyapa_i2c_reg_write_block(cyapa, 0, cmd_len + 1, cmd); 666 if (error) 667 return error; 668 } 669 return 0; 670 } 671 672 /* 673 * A firmware block write command writes 64 bytes of data to a single flash 674 * page in the device. The 78-byte block write command has the format: 675 * <0xff> <CMD> <Key> <Start> <Data> <Data-Checksum> <CMD Checksum> 676 * 677 * <0xff> - every command starts with 0xff 678 * <CMD> - the write command value is 0x39 679 * <Key> - write commands include an 8-byte key: { 00 01 02 03 04 05 06 07 } 680 * <Block> - Memory Block number (address / 64) (16-bit, big-endian) 681 * <Data> - 64 bytes of firmware image data 682 * <Data Checksum> - sum of 64 <Data> bytes, modulo 0xff 683 * <CMD Checksum> - sum of 77 bytes, from 0xff to <Data Checksum> 684 * 685 * Each write command is split into 5 i2c write transactions of up to 16 bytes. 686 * Each transaction starts with an i2c register offset: (00, 10, 20, 30, 40). 687 */ 688 static int cyapa_gen3_write_fw_block(struct cyapa *cyapa, 689 u16 block, const u8 *data) 690 { 691 int ret; 692 struct gen3_write_block_cmd write_block_cmd; 693 u8 status[BL_STATUS_SIZE]; 694 int tries; 695 u8 bl_status, bl_error; 696 697 /* Set write command and security key bytes. */ 698 write_block_cmd.checksum_seed = GEN3_BL_CMD_CHECKSUM_SEED; 699 write_block_cmd.cmd_code = GEN3_BL_CMD_WRITE_BLOCK; 700 memcpy(write_block_cmd.key, security_key, sizeof(security_key)); 701 put_unaligned_be16(block, &write_block_cmd.block_num); 702 memcpy(write_block_cmd.block_data, data, CYAPA_FW_BLOCK_SIZE); 703 write_block_cmd.block_checksum = cyapa_gen3_csum( 704 write_block_cmd.block_data, CYAPA_FW_BLOCK_SIZE); 705 write_block_cmd.cmd_checksum = cyapa_gen3_csum((u8 *)&write_block_cmd, 706 sizeof(write_block_cmd) - 1); 707 708 ret = cyapa_gen3_write_buffer(cyapa, (u8 *)&write_block_cmd, 709 sizeof(write_block_cmd)); 710 if (ret) 711 return ret; 712 713 /* Wait for write to finish */ 714 tries = 11; /* Programming for one block can take about 100ms. */ 715 do { 716 usleep_range(10000, 20000); 717 718 /* Check block write command result status. */ 719 ret = cyapa_i2c_reg_read_block(cyapa, BL_HEAD_OFFSET, 720 BL_STATUS_SIZE, status); 721 if (ret != BL_STATUS_SIZE) 722 return (ret < 0) ? ret : -EIO; 723 } while ((status[REG_BL_STATUS] & BL_STATUS_BUSY) && --tries); 724 725 /* Ignore WATCHDOG bit and reserved bits. */ 726 bl_status = status[REG_BL_STATUS] & ~BL_STATUS_REV_MASK; 727 bl_error = status[REG_BL_ERROR] & ~BL_ERROR_RESERVED; 728 729 if (bl_status & BL_STATUS_BUSY) 730 ret = -ETIMEDOUT; 731 else if (bl_status != BL_STATUS_RUNNING || 732 bl_error != BL_ERROR_BOOTLOADING) 733 ret = -EIO; 734 else 735 ret = 0; 736 737 return ret; 738 } 739 740 static int cyapa_gen3_write_blocks(struct cyapa *cyapa, 741 size_t start_block, size_t block_count, 742 const u8 *image_data) 743 { 744 int error; 745 int i; 746 747 for (i = 0; i < block_count; i++) { 748 size_t block = start_block + i; 749 size_t addr = i * CYAPA_FW_BLOCK_SIZE; 750 const u8 *data = &image_data[addr]; 751 752 error = cyapa_gen3_write_fw_block(cyapa, block, data); 753 if (error) 754 return error; 755 } 756 return 0; 757 } 758 759 static int cyapa_gen3_do_fw_update(struct cyapa *cyapa, 760 const struct firmware *fw) 761 { 762 struct device *dev = &cyapa->client->dev; 763 int error; 764 765 /* First write data, starting at byte 128 of fw->data */ 766 error = cyapa_gen3_write_blocks(cyapa, 767 CYAPA_FW_DATA_BLOCK_START, CYAPA_FW_DATA_BLOCK_COUNT, 768 &fw->data[CYAPA_FW_HDR_BLOCK_COUNT * CYAPA_FW_BLOCK_SIZE]); 769 if (error) { 770 dev_err(dev, "FW update aborted, write image: %d\n", error); 771 return error; 772 } 773 774 /* Then write checksum */ 775 error = cyapa_gen3_write_blocks(cyapa, 776 CYAPA_FW_HDR_BLOCK_START, CYAPA_FW_HDR_BLOCK_COUNT, 777 &fw->data[0]); 778 if (error) { 779 dev_err(dev, "FW update aborted, write checksum: %d\n", error); 780 return error; 781 } 782 783 return 0; 784 } 785 786 static ssize_t cyapa_gen3_do_calibrate(struct device *dev, 787 struct device_attribute *attr, 788 const char *buf, size_t count) 789 { 790 struct cyapa *cyapa = dev_get_drvdata(dev); 791 int tries; 792 int ret; 793 794 ret = cyapa_read_byte(cyapa, CYAPA_CMD_DEV_STATUS); 795 if (ret < 0) { 796 dev_err(dev, "Error reading dev status: %d\n", ret); 797 goto out; 798 } 799 if ((ret & CYAPA_DEV_NORMAL) != CYAPA_DEV_NORMAL) { 800 dev_warn(dev, "Trackpad device is busy, device state: 0x%02x\n", 801 ret); 802 ret = -EAGAIN; 803 goto out; 804 } 805 806 ret = cyapa_write_byte(cyapa, CYAPA_CMD_SOFT_RESET, 807 OP_RECALIBRATION_MASK); 808 if (ret < 0) { 809 dev_err(dev, "Failed to send calibrate command: %d\n", 810 ret); 811 goto out; 812 } 813 814 tries = 20; /* max recalibration timeout 2s. */ 815 do { 816 /* 817 * For this recalibration, the max time will not exceed 2s. 818 * The average time is approximately 500 - 700 ms, and we 819 * will check the status every 100 - 200ms. 820 */ 821 usleep_range(100000, 200000); 822 823 ret = cyapa_read_byte(cyapa, CYAPA_CMD_DEV_STATUS); 824 if (ret < 0) { 825 dev_err(dev, "Error reading dev status: %d\n", 826 ret); 827 goto out; 828 } 829 if ((ret & CYAPA_DEV_NORMAL) == CYAPA_DEV_NORMAL) 830 break; 831 } while (--tries); 832 833 if (tries == 0) { 834 dev_err(dev, "Failed to calibrate. Timeout.\n"); 835 ret = -ETIMEDOUT; 836 goto out; 837 } 838 dev_dbg(dev, "Calibration successful.\n"); 839 840 out: 841 return ret < 0 ? ret : count; 842 } 843 844 static ssize_t cyapa_gen3_show_baseline(struct device *dev, 845 struct device_attribute *attr, char *buf) 846 { 847 struct cyapa *cyapa = dev_get_drvdata(dev); 848 int max_baseline, min_baseline; 849 int tries; 850 int ret; 851 852 ret = cyapa_read_byte(cyapa, CYAPA_CMD_DEV_STATUS); 853 if (ret < 0) { 854 dev_err(dev, "Error reading dev status. err = %d\n", ret); 855 goto out; 856 } 857 if ((ret & CYAPA_DEV_NORMAL) != CYAPA_DEV_NORMAL) { 858 dev_warn(dev, "Trackpad device is busy. device state = 0x%x\n", 859 ret); 860 ret = -EAGAIN; 861 goto out; 862 } 863 864 ret = cyapa_write_byte(cyapa, CYAPA_CMD_SOFT_RESET, 865 OP_REPORT_BASELINE_MASK); 866 if (ret < 0) { 867 dev_err(dev, "Failed to send report baseline command. %d\n", 868 ret); 869 goto out; 870 } 871 872 tries = 3; /* Try for 30 to 60 ms */ 873 do { 874 usleep_range(10000, 20000); 875 876 ret = cyapa_read_byte(cyapa, CYAPA_CMD_DEV_STATUS); 877 if (ret < 0) { 878 dev_err(dev, "Error reading dev status. err = %d\n", 879 ret); 880 goto out; 881 } 882 if ((ret & CYAPA_DEV_NORMAL) == CYAPA_DEV_NORMAL) 883 break; 884 } while (--tries); 885 886 if (tries == 0) { 887 dev_err(dev, "Device timed out going to Normal state.\n"); 888 ret = -ETIMEDOUT; 889 goto out; 890 } 891 892 ret = cyapa_read_byte(cyapa, CYAPA_CMD_MAX_BASELINE); 893 if (ret < 0) { 894 dev_err(dev, "Failed to read max baseline. err = %d\n", ret); 895 goto out; 896 } 897 max_baseline = ret; 898 899 ret = cyapa_read_byte(cyapa, CYAPA_CMD_MIN_BASELINE); 900 if (ret < 0) { 901 dev_err(dev, "Failed to read min baseline. err = %d\n", ret); 902 goto out; 903 } 904 min_baseline = ret; 905 906 dev_dbg(dev, "Baseline report successful. Max: %d Min: %d\n", 907 max_baseline, min_baseline); 908 ret = scnprintf(buf, PAGE_SIZE, "%d %d\n", max_baseline, min_baseline); 909 910 out: 911 return ret; 912 } 913 914 /* 915 * cyapa_get_wait_time_for_pwr_cmd 916 * 917 * Compute the amount of time we need to wait after updating the touchpad 918 * power mode. The touchpad needs to consume the incoming power mode set 919 * command at the current clock rate. 920 */ 921 922 static u16 cyapa_get_wait_time_for_pwr_cmd(u8 pwr_mode) 923 { 924 switch (pwr_mode) { 925 case PWR_MODE_FULL_ACTIVE: return 20; 926 case PWR_MODE_BTN_ONLY: return 20; 927 case PWR_MODE_OFF: return 20; 928 default: return cyapa_pwr_cmd_to_sleep_time(pwr_mode) + 50; 929 } 930 } 931 932 /* 933 * Set device power mode 934 * 935 * Write to the field to configure power state. Power states include : 936 * Full : Max scans and report rate. 937 * Idle : Report rate set by user specified time. 938 * ButtonOnly : No scans for fingers. When the button is triggered, 939 * a slave interrupt is asserted to notify host to wake up. 940 * Off : Only awake for i2c commands from host. No function for button 941 * or touch sensors. 942 * 943 * The power_mode command should conform to the following : 944 * Full : 0x3f 945 * Idle : Configurable from 20 to 1000ms. See note below for 946 * cyapa_sleep_time_to_pwr_cmd and cyapa_pwr_cmd_to_sleep_time 947 * ButtonOnly : 0x01 948 * Off : 0x00 949 * 950 * Device power mode can only be set when device is in operational mode. 951 */ 952 static int cyapa_gen3_set_power_mode(struct cyapa *cyapa, u8 power_mode, 953 u16 always_unused) 954 { 955 int ret; 956 u8 power; 957 int tries; 958 u16 sleep_time; 959 960 always_unused = 0; 961 if (cyapa->state != CYAPA_STATE_OP) 962 return 0; 963 964 tries = SET_POWER_MODE_TRIES; 965 while (tries--) { 966 ret = cyapa_read_byte(cyapa, CYAPA_CMD_POWER_MODE); 967 if (ret >= 0) 968 break; 969 usleep_range(SET_POWER_MODE_DELAY, 2 * SET_POWER_MODE_DELAY); 970 } 971 if (ret < 0) 972 return ret; 973 974 /* 975 * Return early if the power mode to set is the same as the current 976 * one. 977 */ 978 if ((ret & PWR_MODE_MASK) == power_mode) 979 return 0; 980 981 sleep_time = cyapa_get_wait_time_for_pwr_cmd(ret & PWR_MODE_MASK); 982 power = ret; 983 power &= ~PWR_MODE_MASK; 984 power |= power_mode & PWR_MODE_MASK; 985 tries = SET_POWER_MODE_TRIES; 986 while (tries--) { 987 ret = cyapa_write_byte(cyapa, CYAPA_CMD_POWER_MODE, power); 988 if (!ret) 989 break; 990 usleep_range(SET_POWER_MODE_DELAY, 2 * SET_POWER_MODE_DELAY); 991 } 992 993 /* 994 * Wait for the newly set power command to go in at the previous 995 * clock speed (scanrate) used by the touchpad firmware. Not 996 * doing so before issuing the next command may result in errors 997 * depending on the command's content. 998 */ 999 msleep(sleep_time); 1000 return ret; 1001 } 1002 1003 static int cyapa_gen3_get_query_data(struct cyapa *cyapa) 1004 { 1005 u8 query_data[QUERY_DATA_SIZE]; 1006 int ret; 1007 1008 if (cyapa->state != CYAPA_STATE_OP) 1009 return -EBUSY; 1010 1011 ret = cyapa_read_block(cyapa, CYAPA_CMD_GROUP_QUERY, query_data); 1012 if (ret != QUERY_DATA_SIZE) 1013 return (ret < 0) ? ret : -EIO; 1014 1015 memcpy(&cyapa->product_id[0], &query_data[0], 5); 1016 cyapa->product_id[5] = '-'; 1017 memcpy(&cyapa->product_id[6], &query_data[5], 6); 1018 cyapa->product_id[12] = '-'; 1019 memcpy(&cyapa->product_id[13], &query_data[11], 2); 1020 cyapa->product_id[15] = '\0'; 1021 1022 cyapa->fw_maj_ver = query_data[15]; 1023 cyapa->fw_min_ver = query_data[16]; 1024 1025 cyapa->btn_capability = query_data[19] & CAPABILITY_BTN_MASK; 1026 1027 cyapa->gen = query_data[20] & 0x0f; 1028 1029 cyapa->max_abs_x = ((query_data[21] & 0xf0) << 4) | query_data[22]; 1030 cyapa->max_abs_y = ((query_data[21] & 0x0f) << 8) | query_data[23]; 1031 1032 cyapa->physical_size_x = 1033 ((query_data[24] & 0xf0) << 4) | query_data[25]; 1034 cyapa->physical_size_y = 1035 ((query_data[24] & 0x0f) << 8) | query_data[26]; 1036 1037 cyapa->max_z = 255; 1038 1039 return 0; 1040 } 1041 1042 static int cyapa_gen3_bl_query_data(struct cyapa *cyapa) 1043 { 1044 u8 bl_data[CYAPA_CMD_LEN]; 1045 int ret; 1046 1047 ret = cyapa_i2c_reg_read_block(cyapa, 0, CYAPA_CMD_LEN, bl_data); 1048 if (ret != CYAPA_CMD_LEN) 1049 return (ret < 0) ? ret : -EIO; 1050 1051 /* 1052 * This value will be updated again when entered application mode. 1053 * If TP failed to enter application mode, this fw version values 1054 * can be used as a reference. 1055 * This firmware version valid when fw image checksum is valid. 1056 */ 1057 if (bl_data[REG_BL_STATUS] == 1058 (BL_STATUS_RUNNING | BL_STATUS_CSUM_VALID)) { 1059 cyapa->fw_maj_ver = bl_data[GEN3_BL_IDLE_FW_MAJ_VER_OFFSET]; 1060 cyapa->fw_min_ver = bl_data[GEN3_BL_IDLE_FW_MIN_VER_OFFSET]; 1061 } 1062 1063 return 0; 1064 } 1065 1066 /* 1067 * Check if device is operational. 1068 * 1069 * An operational device is responding, has exited bootloader, and has 1070 * firmware supported by this driver. 1071 * 1072 * Returns: 1073 * -EBUSY no device or in bootloader 1074 * -EIO failure while reading from device 1075 * -EAGAIN device is still in bootloader 1076 * if ->state = CYAPA_STATE_BL_IDLE, device has invalid firmware 1077 * -EINVAL device is in operational mode, but not supported by this driver 1078 * 0 device is supported 1079 */ 1080 static int cyapa_gen3_do_operational_check(struct cyapa *cyapa) 1081 { 1082 struct device *dev = &cyapa->client->dev; 1083 int error; 1084 1085 switch (cyapa->state) { 1086 case CYAPA_STATE_BL_ACTIVE: 1087 error = cyapa_gen3_bl_deactivate(cyapa); 1088 if (error) { 1089 dev_err(dev, "failed to bl_deactivate: %d\n", error); 1090 return error; 1091 } 1092 1093 /* Fallthrough state */ 1094 case CYAPA_STATE_BL_IDLE: 1095 /* Try to get firmware version in bootloader mode. */ 1096 cyapa_gen3_bl_query_data(cyapa); 1097 1098 error = cyapa_gen3_bl_exit(cyapa); 1099 if (error) { 1100 dev_err(dev, "failed to bl_exit: %d\n", error); 1101 return error; 1102 } 1103 1104 /* Fallthrough state */ 1105 case CYAPA_STATE_OP: 1106 /* 1107 * Reading query data before going back to the full mode 1108 * may cause problems, so we set the power mode first here. 1109 */ 1110 error = cyapa_gen3_set_power_mode(cyapa, 1111 PWR_MODE_FULL_ACTIVE, 0); 1112 if (error) 1113 dev_err(dev, "%s: set full power mode failed: %d\n", 1114 __func__, error); 1115 error = cyapa_gen3_get_query_data(cyapa); 1116 if (error < 0) 1117 return error; 1118 1119 /* Only support firmware protocol gen3 */ 1120 if (cyapa->gen != CYAPA_GEN3) { 1121 dev_err(dev, "unsupported protocol version (%d)", 1122 cyapa->gen); 1123 return -EINVAL; 1124 } 1125 1126 /* Only support product ID starting with CYTRA */ 1127 if (memcmp(cyapa->product_id, product_id, 1128 strlen(product_id)) != 0) { 1129 dev_err(dev, "unsupported product ID (%s)\n", 1130 cyapa->product_id); 1131 return -EINVAL; 1132 } 1133 1134 return 0; 1135 1136 default: 1137 return -EIO; 1138 } 1139 return 0; 1140 } 1141 1142 /* 1143 * Return false, do not continue process 1144 * Return true, continue process. 1145 */ 1146 static bool cyapa_gen3_irq_cmd_handler(struct cyapa *cyapa) 1147 { 1148 /* Not gen3 irq command response, skip for continue. */ 1149 if (cyapa->gen != CYAPA_GEN3) 1150 return true; 1151 1152 if (cyapa->operational) 1153 return true; 1154 1155 /* 1156 * Driver in detecting or other interface function processing, 1157 * so, stop cyapa_gen3_irq_handler to continue process to 1158 * avoid unwanted to error detecting and processing. 1159 * 1160 * And also, avoid the periodicly accerted interrupts to be processed 1161 * as touch inputs when gen3 failed to launch into application mode, 1162 * which will cause gen3 stays in bootloader mode. 1163 */ 1164 return false; 1165 } 1166 1167 static int cyapa_gen3_irq_handler(struct cyapa *cyapa) 1168 { 1169 struct input_dev *input = cyapa->input; 1170 struct device *dev = &cyapa->client->dev; 1171 struct cyapa_reg_data data; 1172 int num_fingers; 1173 int ret; 1174 int i; 1175 1176 ret = cyapa_read_block(cyapa, CYAPA_CMD_GROUP_DATA, (u8 *)&data); 1177 if (ret != sizeof(data)) { 1178 dev_err(dev, "failed to read report data, (%d)\n", ret); 1179 return -EINVAL; 1180 } 1181 1182 if ((data.device_status & OP_STATUS_SRC) != OP_STATUS_SRC || 1183 (data.device_status & OP_STATUS_DEV) != CYAPA_DEV_NORMAL || 1184 (data.finger_btn & OP_DATA_VALID) != OP_DATA_VALID) { 1185 dev_err(dev, "invalid device state bytes, %02x %02x\n", 1186 data.device_status, data.finger_btn); 1187 return -EINVAL; 1188 } 1189 1190 num_fingers = (data.finger_btn >> 4) & 0x0f; 1191 for (i = 0; i < num_fingers; i++) { 1192 const struct cyapa_touch *touch = &data.touches[i]; 1193 /* Note: touch->id range is 1 to 15; slots are 0 to 14. */ 1194 int slot = touch->id - 1; 1195 1196 input_mt_slot(input, slot); 1197 input_mt_report_slot_state(input, MT_TOOL_FINGER, true); 1198 input_report_abs(input, ABS_MT_POSITION_X, 1199 ((touch->xy_hi & 0xf0) << 4) | touch->x_lo); 1200 input_report_abs(input, ABS_MT_POSITION_Y, 1201 ((touch->xy_hi & 0x0f) << 8) | touch->y_lo); 1202 input_report_abs(input, ABS_MT_PRESSURE, touch->pressure); 1203 } 1204 1205 input_mt_sync_frame(input); 1206 1207 if (cyapa->btn_capability & CAPABILITY_LEFT_BTN_MASK) 1208 input_report_key(input, BTN_LEFT, 1209 !!(data.finger_btn & OP_DATA_LEFT_BTN)); 1210 if (cyapa->btn_capability & CAPABILITY_MIDDLE_BTN_MASK) 1211 input_report_key(input, BTN_MIDDLE, 1212 !!(data.finger_btn & OP_DATA_MIDDLE_BTN)); 1213 if (cyapa->btn_capability & CAPABILITY_RIGHT_BTN_MASK) 1214 input_report_key(input, BTN_RIGHT, 1215 !!(data.finger_btn & OP_DATA_RIGHT_BTN)); 1216 input_sync(input); 1217 1218 return 0; 1219 } 1220 1221 static int cyapa_gen3_initialize(struct cyapa *cyapa) { return 0; } 1222 static int cyapa_gen3_bl_initiate(struct cyapa *cyapa, 1223 const struct firmware *fw) { return 0; } 1224 static int cyapa_gen3_empty_output_data(struct cyapa *cyapa, 1225 u8 *buf, int *len, cb_sort func) { return 0; } 1226 1227 const struct cyapa_dev_ops cyapa_gen3_ops = { 1228 .check_fw = cyapa_gen3_check_fw, 1229 .bl_enter = cyapa_gen3_bl_enter, 1230 .bl_activate = cyapa_gen3_bl_activate, 1231 .update_fw = cyapa_gen3_do_fw_update, 1232 .bl_deactivate = cyapa_gen3_bl_deactivate, 1233 .bl_initiate = cyapa_gen3_bl_initiate, 1234 1235 .show_baseline = cyapa_gen3_show_baseline, 1236 .calibrate_store = cyapa_gen3_do_calibrate, 1237 1238 .initialize = cyapa_gen3_initialize, 1239 1240 .state_parse = cyapa_gen3_state_parse, 1241 .operational_check = cyapa_gen3_do_operational_check, 1242 1243 .irq_handler = cyapa_gen3_irq_handler, 1244 .irq_cmd_handler = cyapa_gen3_irq_cmd_handler, 1245 .sort_empty_output_data = cyapa_gen3_empty_output_data, 1246 .set_power_mode = cyapa_gen3_set_power_mode, 1247 }; 1248