1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Azoteq IQS626A Capacitive Touch Controller 4 * 5 * Copyright (C) 2020 Jeff LaBundy <jeff@labundy.com> 6 * 7 * This driver registers up to 2 input devices: one representing capacitive or 8 * inductive keys as well as Hall-effect switches, and one for a trackpad that 9 * can express various gestures. 10 */ 11 12 #include <linux/bits.h> 13 #include <linux/completion.h> 14 #include <linux/delay.h> 15 #include <linux/device.h> 16 #include <linux/err.h> 17 #include <linux/i2c.h> 18 #include <linux/input.h> 19 #include <linux/input/touchscreen.h> 20 #include <linux/interrupt.h> 21 #include <linux/kernel.h> 22 #include <linux/module.h> 23 #include <linux/of_device.h> 24 #include <linux/property.h> 25 #include <linux/regmap.h> 26 #include <linux/slab.h> 27 28 #define IQS626_VER_INFO 0x00 29 #define IQS626_VER_INFO_PROD_NUM 0x51 30 31 #define IQS626_SYS_FLAGS 0x02 32 #define IQS626_SYS_FLAGS_SHOW_RESET BIT(15) 33 #define IQS626_SYS_FLAGS_IN_ATI BIT(12) 34 #define IQS626_SYS_FLAGS_PWR_MODE_MASK GENMASK(9, 8) 35 #define IQS626_SYS_FLAGS_PWR_MODE_SHIFT 8 36 37 #define IQS626_HALL_OUTPUT 0x23 38 39 #define IQS626_SYS_SETTINGS 0x80 40 #define IQS626_SYS_SETTINGS_CLK_DIV BIT(15) 41 #define IQS626_SYS_SETTINGS_ULP_AUTO BIT(14) 42 #define IQS626_SYS_SETTINGS_DIS_AUTO BIT(13) 43 #define IQS626_SYS_SETTINGS_PWR_MODE_MASK GENMASK(12, 11) 44 #define IQS626_SYS_SETTINGS_PWR_MODE_SHIFT 11 45 #define IQS626_SYS_SETTINGS_PWR_MODE_MAX 3 46 #define IQS626_SYS_SETTINGS_ULP_UPDATE_MASK GENMASK(10, 8) 47 #define IQS626_SYS_SETTINGS_ULP_UPDATE_SHIFT 8 48 #define IQS626_SYS_SETTINGS_ULP_UPDATE_MAX 7 49 #define IQS626_SYS_SETTINGS_EVENT_MODE BIT(5) 50 #define IQS626_SYS_SETTINGS_EVENT_MODE_LP BIT(4) 51 #define IQS626_SYS_SETTINGS_REDO_ATI BIT(2) 52 #define IQS626_SYS_SETTINGS_ACK_RESET BIT(0) 53 54 #define IQS626_MISC_A_ATI_BAND_DISABLE BIT(7) 55 #define IQS626_MISC_A_TPx_LTA_UPDATE_MASK GENMASK(6, 4) 56 #define IQS626_MISC_A_TPx_LTA_UPDATE_SHIFT 4 57 #define IQS626_MISC_A_TPx_LTA_UPDATE_MAX 7 58 #define IQS626_MISC_A_ATI_LP_ONLY BIT(3) 59 #define IQS626_MISC_A_GPIO3_SELECT_MASK GENMASK(2, 0) 60 #define IQS626_MISC_A_GPIO3_SELECT_MAX 7 61 62 #define IQS626_EVENT_MASK_SYS BIT(6) 63 #define IQS626_EVENT_MASK_GESTURE BIT(3) 64 #define IQS626_EVENT_MASK_DEEP BIT(2) 65 #define IQS626_EVENT_MASK_TOUCH BIT(1) 66 #define IQS626_EVENT_MASK_PROX BIT(0) 67 68 #define IQS626_RATE_NP_MS_MAX 255 69 #define IQS626_RATE_LP_MS_MAX 255 70 #define IQS626_RATE_ULP_MS_MAX 4080 71 #define IQS626_TIMEOUT_PWR_MS_MAX 130560 72 #define IQS626_TIMEOUT_LTA_MS_MAX 130560 73 74 #define IQS626_MISC_B_RESEED_UI_SEL_MASK GENMASK(7, 6) 75 #define IQS626_MISC_B_RESEED_UI_SEL_SHIFT 6 76 #define IQS626_MISC_B_RESEED_UI_SEL_MAX 3 77 #define IQS626_MISC_B_THRESH_EXTEND BIT(5) 78 #define IQS626_MISC_B_TRACKING_UI_ENABLE BIT(4) 79 #define IQS626_MISC_B_TPx_SWIPE BIT(3) 80 #define IQS626_MISC_B_RESEED_OFFSET BIT(2) 81 #define IQS626_MISC_B_FILT_STR_TPx GENMASK(1, 0) 82 83 #define IQS626_THRESH_SWIPE_MAX 255 84 #define IQS626_TIMEOUT_TAP_MS_MAX 4080 85 #define IQS626_TIMEOUT_SWIPE_MS_MAX 4080 86 87 #define IQS626_CHx_ENG_0_MEAS_CAP_SIZE BIT(7) 88 #define IQS626_CHx_ENG_0_RX_TERM_VSS BIT(5) 89 #define IQS626_CHx_ENG_0_LINEARIZE BIT(4) 90 #define IQS626_CHx_ENG_0_DUAL_DIR BIT(3) 91 #define IQS626_CHx_ENG_0_FILT_DISABLE BIT(2) 92 #define IQS626_CHx_ENG_0_ATI_MODE_MASK GENMASK(1, 0) 93 #define IQS626_CHx_ENG_0_ATI_MODE_MAX 3 94 95 #define IQS626_CHx_ENG_1_CCT_HIGH_1 BIT(7) 96 #define IQS626_CHx_ENG_1_CCT_HIGH_0 BIT(6) 97 #define IQS626_CHx_ENG_1_PROJ_BIAS_MASK GENMASK(5, 4) 98 #define IQS626_CHx_ENG_1_PROJ_BIAS_SHIFT 4 99 #define IQS626_CHx_ENG_1_PROJ_BIAS_MAX 3 100 #define IQS626_CHx_ENG_1_CCT_ENABLE BIT(3) 101 #define IQS626_CHx_ENG_1_SENSE_FREQ_MASK GENMASK(2, 1) 102 #define IQS626_CHx_ENG_1_SENSE_FREQ_SHIFT 1 103 #define IQS626_CHx_ENG_1_SENSE_FREQ_MAX 3 104 #define IQS626_CHx_ENG_1_ATI_BAND_TIGHTEN BIT(0) 105 106 #define IQS626_CHx_ENG_2_LOCAL_CAP_MASK GENMASK(7, 6) 107 #define IQS626_CHx_ENG_2_LOCAL_CAP_SHIFT 6 108 #define IQS626_CHx_ENG_2_LOCAL_CAP_MAX 3 109 #define IQS626_CHx_ENG_2_LOCAL_CAP_ENABLE BIT(5) 110 #define IQS626_CHx_ENG_2_SENSE_MODE_MASK GENMASK(3, 0) 111 #define IQS626_CHx_ENG_2_SENSE_MODE_MAX 15 112 113 #define IQS626_CHx_ENG_3_TX_FREQ_MASK GENMASK(5, 4) 114 #define IQS626_CHx_ENG_3_TX_FREQ_SHIFT 4 115 #define IQS626_CHx_ENG_3_TX_FREQ_MAX 3 116 #define IQS626_CHx_ENG_3_INV_LOGIC BIT(0) 117 118 #define IQS626_CHx_ENG_4_RX_TERM_VREG BIT(6) 119 #define IQS626_CHx_ENG_4_CCT_LOW_1 BIT(5) 120 #define IQS626_CHx_ENG_4_CCT_LOW_0 BIT(4) 121 #define IQS626_CHx_ENG_4_COMP_DISABLE BIT(1) 122 #define IQS626_CHx_ENG_4_STATIC_ENABLE BIT(0) 123 124 #define IQS626_TPx_ATI_BASE_MIN 45 125 #define IQS626_TPx_ATI_BASE_MAX 300 126 #define IQS626_CHx_ATI_BASE_MASK GENMASK(7, 6) 127 #define IQS626_CHx_ATI_BASE_75 0x00 128 #define IQS626_CHx_ATI_BASE_100 0x40 129 #define IQS626_CHx_ATI_BASE_150 0x80 130 #define IQS626_CHx_ATI_BASE_200 0xC0 131 #define IQS626_CHx_ATI_TARGET_MASK GENMASK(5, 0) 132 #define IQS626_CHx_ATI_TARGET_MAX 2016 133 134 #define IQS626_CHx_THRESH_MAX 255 135 #define IQS626_CHx_HYST_DEEP_MASK GENMASK(7, 4) 136 #define IQS626_CHx_HYST_DEEP_SHIFT 4 137 #define IQS626_CHx_HYST_TOUCH_MASK GENMASK(3, 0) 138 #define IQS626_CHx_HYST_MAX 15 139 140 #define IQS626_FILT_STR_NP_TPx_MASK GENMASK(7, 6) 141 #define IQS626_FILT_STR_NP_TPx_SHIFT 6 142 #define IQS626_FILT_STR_LP_TPx_MASK GENMASK(5, 4) 143 #define IQS626_FILT_STR_LP_TPx_SHIFT 4 144 145 #define IQS626_FILT_STR_NP_CNT_MASK GENMASK(7, 6) 146 #define IQS626_FILT_STR_NP_CNT_SHIFT 6 147 #define IQS626_FILT_STR_LP_CNT_MASK GENMASK(5, 4) 148 #define IQS626_FILT_STR_LP_CNT_SHIFT 4 149 #define IQS626_FILT_STR_NP_LTA_MASK GENMASK(3, 2) 150 #define IQS626_FILT_STR_NP_LTA_SHIFT 2 151 #define IQS626_FILT_STR_LP_LTA_MASK GENMASK(1, 0) 152 #define IQS626_FILT_STR_MAX 3 153 154 #define IQS626_ULP_PROJ_ENABLE BIT(4) 155 #define IQS626_GEN_WEIGHT_MAX 255 156 157 #define IQS626_MAX_REG 0xFF 158 159 #define IQS626_NUM_CH_TP_3 9 160 #define IQS626_NUM_CH_TP_2 6 161 #define IQS626_NUM_CH_GEN 3 162 #define IQS626_NUM_CRx_TX 8 163 164 #define IQS626_PWR_MODE_POLL_SLEEP_US 50000 165 #define IQS626_PWR_MODE_POLL_TIMEOUT_US 500000 166 167 #define iqs626_irq_wait() usleep_range(350, 400) 168 169 enum iqs626_ch_id { 170 IQS626_CH_ULP_0, 171 IQS626_CH_TP_2, 172 IQS626_CH_TP_3, 173 IQS626_CH_GEN_0, 174 IQS626_CH_GEN_1, 175 IQS626_CH_GEN_2, 176 IQS626_CH_HALL, 177 }; 178 179 enum iqs626_rx_inactive { 180 IQS626_RX_INACTIVE_VSS, 181 IQS626_RX_INACTIVE_FLOAT, 182 IQS626_RX_INACTIVE_VREG, 183 }; 184 185 enum iqs626_st_offs { 186 IQS626_ST_OFFS_PROX, 187 IQS626_ST_OFFS_DIR, 188 IQS626_ST_OFFS_TOUCH, 189 IQS626_ST_OFFS_DEEP, 190 }; 191 192 enum iqs626_th_offs { 193 IQS626_TH_OFFS_PROX, 194 IQS626_TH_OFFS_TOUCH, 195 IQS626_TH_OFFS_DEEP, 196 }; 197 198 enum iqs626_event_id { 199 IQS626_EVENT_PROX_DN, 200 IQS626_EVENT_PROX_UP, 201 IQS626_EVENT_TOUCH_DN, 202 IQS626_EVENT_TOUCH_UP, 203 IQS626_EVENT_DEEP_DN, 204 IQS626_EVENT_DEEP_UP, 205 }; 206 207 enum iqs626_gesture_id { 208 IQS626_GESTURE_FLICK_X_POS, 209 IQS626_GESTURE_FLICK_X_NEG, 210 IQS626_GESTURE_FLICK_Y_POS, 211 IQS626_GESTURE_FLICK_Y_NEG, 212 IQS626_GESTURE_TAP, 213 IQS626_GESTURE_HOLD, 214 IQS626_NUM_GESTURES, 215 }; 216 217 struct iqs626_event_desc { 218 const char *name; 219 enum iqs626_st_offs st_offs; 220 enum iqs626_th_offs th_offs; 221 bool dir_up; 222 u8 mask; 223 }; 224 225 static const struct iqs626_event_desc iqs626_events[] = { 226 [IQS626_EVENT_PROX_DN] = { 227 .name = "event-prox", 228 .st_offs = IQS626_ST_OFFS_PROX, 229 .th_offs = IQS626_TH_OFFS_PROX, 230 .mask = IQS626_EVENT_MASK_PROX, 231 }, 232 [IQS626_EVENT_PROX_UP] = { 233 .name = "event-prox-alt", 234 .st_offs = IQS626_ST_OFFS_PROX, 235 .th_offs = IQS626_TH_OFFS_PROX, 236 .dir_up = true, 237 .mask = IQS626_EVENT_MASK_PROX, 238 }, 239 [IQS626_EVENT_TOUCH_DN] = { 240 .name = "event-touch", 241 .st_offs = IQS626_ST_OFFS_TOUCH, 242 .th_offs = IQS626_TH_OFFS_TOUCH, 243 .mask = IQS626_EVENT_MASK_TOUCH, 244 }, 245 [IQS626_EVENT_TOUCH_UP] = { 246 .name = "event-touch-alt", 247 .st_offs = IQS626_ST_OFFS_TOUCH, 248 .th_offs = IQS626_TH_OFFS_TOUCH, 249 .dir_up = true, 250 .mask = IQS626_EVENT_MASK_TOUCH, 251 }, 252 [IQS626_EVENT_DEEP_DN] = { 253 .name = "event-deep", 254 .st_offs = IQS626_ST_OFFS_DEEP, 255 .th_offs = IQS626_TH_OFFS_DEEP, 256 .mask = IQS626_EVENT_MASK_DEEP, 257 }, 258 [IQS626_EVENT_DEEP_UP] = { 259 .name = "event-deep-alt", 260 .st_offs = IQS626_ST_OFFS_DEEP, 261 .th_offs = IQS626_TH_OFFS_DEEP, 262 .dir_up = true, 263 .mask = IQS626_EVENT_MASK_DEEP, 264 }, 265 }; 266 267 struct iqs626_ver_info { 268 u8 prod_num; 269 u8 sw_num; 270 u8 hw_num; 271 u8 padding; 272 } __packed; 273 274 struct iqs626_flags { 275 __be16 system; 276 u8 gesture; 277 u8 padding_a; 278 u8 states[4]; 279 u8 ref_active; 280 u8 padding_b; 281 u8 comp_min; 282 u8 comp_max; 283 u8 trackpad_x; 284 u8 trackpad_y; 285 } __packed; 286 287 struct iqs626_ch_reg_ulp { 288 u8 thresh[2]; 289 u8 hyst; 290 u8 filter; 291 u8 engine[2]; 292 u8 ati_target; 293 u8 padding; 294 __be16 ati_comp; 295 u8 rx_enable; 296 u8 tx_enable; 297 } __packed; 298 299 struct iqs626_ch_reg_tp { 300 u8 thresh; 301 u8 ati_base; 302 __be16 ati_comp; 303 } __packed; 304 305 struct iqs626_tp_grp_reg { 306 u8 hyst; 307 u8 ati_target; 308 u8 engine[2]; 309 struct iqs626_ch_reg_tp ch_reg_tp[IQS626_NUM_CH_TP_3]; 310 } __packed; 311 312 struct iqs626_ch_reg_gen { 313 u8 thresh[3]; 314 u8 padding; 315 u8 hyst; 316 u8 ati_target; 317 __be16 ati_comp; 318 u8 engine[5]; 319 u8 filter; 320 u8 rx_enable; 321 u8 tx_enable; 322 u8 assoc_select; 323 u8 assoc_weight; 324 } __packed; 325 326 struct iqs626_ch_reg_hall { 327 u8 engine; 328 u8 thresh; 329 u8 hyst; 330 u8 ati_target; 331 __be16 ati_comp; 332 } __packed; 333 334 struct iqs626_sys_reg { 335 __be16 general; 336 u8 misc_a; 337 u8 event_mask; 338 u8 active; 339 u8 reseed; 340 u8 rate_np; 341 u8 rate_lp; 342 u8 rate_ulp; 343 u8 timeout_pwr; 344 u8 timeout_rdy; 345 u8 timeout_lta; 346 u8 misc_b; 347 u8 thresh_swipe; 348 u8 timeout_tap; 349 u8 timeout_swipe; 350 u8 redo_ati; 351 u8 padding; 352 struct iqs626_ch_reg_ulp ch_reg_ulp; 353 struct iqs626_tp_grp_reg tp_grp_reg; 354 struct iqs626_ch_reg_gen ch_reg_gen[IQS626_NUM_CH_GEN]; 355 struct iqs626_ch_reg_hall ch_reg_hall; 356 } __packed; 357 358 struct iqs626_channel_desc { 359 const char *name; 360 int num_ch; 361 u8 active; 362 bool events[ARRAY_SIZE(iqs626_events)]; 363 }; 364 365 static const struct iqs626_channel_desc iqs626_channels[] = { 366 [IQS626_CH_ULP_0] = { 367 .name = "ulp-0", 368 .num_ch = 1, 369 .active = BIT(0), 370 .events = { 371 [IQS626_EVENT_PROX_DN] = true, 372 [IQS626_EVENT_PROX_UP] = true, 373 [IQS626_EVENT_TOUCH_DN] = true, 374 [IQS626_EVENT_TOUCH_UP] = true, 375 }, 376 }, 377 [IQS626_CH_TP_2] = { 378 .name = "trackpad-3x2", 379 .num_ch = IQS626_NUM_CH_TP_2, 380 .active = BIT(1), 381 .events = { 382 [IQS626_EVENT_TOUCH_DN] = true, 383 }, 384 }, 385 [IQS626_CH_TP_3] = { 386 .name = "trackpad-3x3", 387 .num_ch = IQS626_NUM_CH_TP_3, 388 .active = BIT(2) | BIT(1), 389 .events = { 390 [IQS626_EVENT_TOUCH_DN] = true, 391 }, 392 }, 393 [IQS626_CH_GEN_0] = { 394 .name = "generic-0", 395 .num_ch = 1, 396 .active = BIT(4), 397 .events = { 398 [IQS626_EVENT_PROX_DN] = true, 399 [IQS626_EVENT_PROX_UP] = true, 400 [IQS626_EVENT_TOUCH_DN] = true, 401 [IQS626_EVENT_TOUCH_UP] = true, 402 [IQS626_EVENT_DEEP_DN] = true, 403 [IQS626_EVENT_DEEP_UP] = true, 404 }, 405 }, 406 [IQS626_CH_GEN_1] = { 407 .name = "generic-1", 408 .num_ch = 1, 409 .active = BIT(5), 410 .events = { 411 [IQS626_EVENT_PROX_DN] = true, 412 [IQS626_EVENT_PROX_UP] = true, 413 [IQS626_EVENT_TOUCH_DN] = true, 414 [IQS626_EVENT_TOUCH_UP] = true, 415 [IQS626_EVENT_DEEP_DN] = true, 416 [IQS626_EVENT_DEEP_UP] = true, 417 }, 418 }, 419 [IQS626_CH_GEN_2] = { 420 .name = "generic-2", 421 .num_ch = 1, 422 .active = BIT(6), 423 .events = { 424 [IQS626_EVENT_PROX_DN] = true, 425 [IQS626_EVENT_PROX_UP] = true, 426 [IQS626_EVENT_TOUCH_DN] = true, 427 [IQS626_EVENT_TOUCH_UP] = true, 428 [IQS626_EVENT_DEEP_DN] = true, 429 [IQS626_EVENT_DEEP_UP] = true, 430 }, 431 }, 432 [IQS626_CH_HALL] = { 433 .name = "hall", 434 .num_ch = 1, 435 .active = BIT(7), 436 .events = { 437 [IQS626_EVENT_TOUCH_DN] = true, 438 [IQS626_EVENT_TOUCH_UP] = true, 439 }, 440 }, 441 }; 442 443 struct iqs626_private { 444 struct i2c_client *client; 445 struct regmap *regmap; 446 struct iqs626_sys_reg sys_reg; 447 struct completion ati_done; 448 struct input_dev *keypad; 449 struct input_dev *trackpad; 450 struct touchscreen_properties prop; 451 unsigned int kp_type[ARRAY_SIZE(iqs626_channels)] 452 [ARRAY_SIZE(iqs626_events)]; 453 unsigned int kp_code[ARRAY_SIZE(iqs626_channels)] 454 [ARRAY_SIZE(iqs626_events)]; 455 unsigned int tp_code[IQS626_NUM_GESTURES]; 456 unsigned int suspend_mode; 457 }; 458 459 static int iqs626_parse_events(struct iqs626_private *iqs626, 460 const struct fwnode_handle *ch_node, 461 enum iqs626_ch_id ch_id) 462 { 463 struct iqs626_sys_reg *sys_reg = &iqs626->sys_reg; 464 struct i2c_client *client = iqs626->client; 465 const struct fwnode_handle *ev_node; 466 const char *ev_name; 467 u8 *thresh, *hyst; 468 unsigned int thresh_tp[IQS626_NUM_CH_TP_3]; 469 unsigned int val; 470 int num_ch = iqs626_channels[ch_id].num_ch; 471 int error, i, j; 472 473 switch (ch_id) { 474 case IQS626_CH_ULP_0: 475 thresh = sys_reg->ch_reg_ulp.thresh; 476 hyst = &sys_reg->ch_reg_ulp.hyst; 477 break; 478 479 case IQS626_CH_TP_2: 480 case IQS626_CH_TP_3: 481 thresh = &sys_reg->tp_grp_reg.ch_reg_tp[0].thresh; 482 hyst = &sys_reg->tp_grp_reg.hyst; 483 break; 484 485 case IQS626_CH_GEN_0: 486 case IQS626_CH_GEN_1: 487 case IQS626_CH_GEN_2: 488 i = ch_id - IQS626_CH_GEN_0; 489 thresh = sys_reg->ch_reg_gen[i].thresh; 490 hyst = &sys_reg->ch_reg_gen[i].hyst; 491 break; 492 493 case IQS626_CH_HALL: 494 thresh = &sys_reg->ch_reg_hall.thresh; 495 hyst = &sys_reg->ch_reg_hall.hyst; 496 break; 497 498 default: 499 return -EINVAL; 500 } 501 502 for (i = 0; i < ARRAY_SIZE(iqs626_events); i++) { 503 if (!iqs626_channels[ch_id].events[i]) 504 continue; 505 506 if (ch_id == IQS626_CH_TP_2 || ch_id == IQS626_CH_TP_3) { 507 /* 508 * Trackpad touch events are simply described under the 509 * trackpad child node. 510 */ 511 ev_node = ch_node; 512 } else { 513 ev_name = iqs626_events[i].name; 514 ev_node = fwnode_get_named_child_node(ch_node, ev_name); 515 if (!ev_node) 516 continue; 517 518 if (!fwnode_property_read_u32(ev_node, "linux,code", 519 &val)) { 520 iqs626->kp_code[ch_id][i] = val; 521 522 if (fwnode_property_read_u32(ev_node, 523 "linux,input-type", 524 &val)) { 525 if (ch_id == IQS626_CH_HALL) 526 val = EV_SW; 527 else 528 val = EV_KEY; 529 } 530 531 if (val != EV_KEY && val != EV_SW) { 532 dev_err(&client->dev, 533 "Invalid input type: %u\n", 534 val); 535 return -EINVAL; 536 } 537 538 iqs626->kp_type[ch_id][i] = val; 539 540 sys_reg->event_mask &= ~iqs626_events[i].mask; 541 } 542 } 543 544 if (!fwnode_property_read_u32(ev_node, "azoteq,hyst", &val)) { 545 if (val > IQS626_CHx_HYST_MAX) { 546 dev_err(&client->dev, 547 "Invalid %s channel hysteresis: %u\n", 548 fwnode_get_name(ch_node), val); 549 return -EINVAL; 550 } 551 552 if (i == IQS626_EVENT_DEEP_DN || 553 i == IQS626_EVENT_DEEP_UP) { 554 *hyst &= ~IQS626_CHx_HYST_DEEP_MASK; 555 *hyst |= (val << IQS626_CHx_HYST_DEEP_SHIFT); 556 } else if (i == IQS626_EVENT_TOUCH_DN || 557 i == IQS626_EVENT_TOUCH_UP) { 558 *hyst &= ~IQS626_CHx_HYST_TOUCH_MASK; 559 *hyst |= val; 560 } 561 } 562 563 if (ch_id != IQS626_CH_TP_2 && ch_id != IQS626_CH_TP_3 && 564 !fwnode_property_read_u32(ev_node, "azoteq,thresh", &val)) { 565 if (val > IQS626_CHx_THRESH_MAX) { 566 dev_err(&client->dev, 567 "Invalid %s channel threshold: %u\n", 568 fwnode_get_name(ch_node), val); 569 return -EINVAL; 570 } 571 572 if (ch_id == IQS626_CH_HALL) 573 *thresh = val; 574 else 575 *(thresh + iqs626_events[i].th_offs) = val; 576 577 continue; 578 } 579 580 if (!fwnode_property_present(ev_node, "azoteq,thresh")) 581 continue; 582 583 error = fwnode_property_read_u32_array(ev_node, "azoteq,thresh", 584 thresh_tp, num_ch); 585 if (error) { 586 dev_err(&client->dev, 587 "Failed to read %s channel thresholds: %d\n", 588 fwnode_get_name(ch_node), error); 589 return error; 590 } 591 592 for (j = 0; j < num_ch; j++) { 593 if (thresh_tp[j] > IQS626_CHx_THRESH_MAX) { 594 dev_err(&client->dev, 595 "Invalid %s channel threshold: %u\n", 596 fwnode_get_name(ch_node), thresh_tp[j]); 597 return -EINVAL; 598 } 599 600 sys_reg->tp_grp_reg.ch_reg_tp[j].thresh = thresh_tp[j]; 601 } 602 } 603 604 return 0; 605 } 606 607 static int iqs626_parse_ati_target(struct iqs626_private *iqs626, 608 const struct fwnode_handle *ch_node, 609 enum iqs626_ch_id ch_id) 610 { 611 struct iqs626_sys_reg *sys_reg = &iqs626->sys_reg; 612 struct i2c_client *client = iqs626->client; 613 unsigned int ati_base[IQS626_NUM_CH_TP_3]; 614 unsigned int val; 615 u8 *ati_target; 616 int num_ch = iqs626_channels[ch_id].num_ch; 617 int error, i; 618 619 switch (ch_id) { 620 case IQS626_CH_ULP_0: 621 ati_target = &sys_reg->ch_reg_ulp.ati_target; 622 break; 623 624 case IQS626_CH_TP_2: 625 case IQS626_CH_TP_3: 626 ati_target = &sys_reg->tp_grp_reg.ati_target; 627 break; 628 629 case IQS626_CH_GEN_0: 630 case IQS626_CH_GEN_1: 631 case IQS626_CH_GEN_2: 632 i = ch_id - IQS626_CH_GEN_0; 633 ati_target = &sys_reg->ch_reg_gen[i].ati_target; 634 break; 635 636 case IQS626_CH_HALL: 637 ati_target = &sys_reg->ch_reg_hall.ati_target; 638 break; 639 640 default: 641 return -EINVAL; 642 } 643 644 if (!fwnode_property_read_u32(ch_node, "azoteq,ati-target", &val)) { 645 if (val > IQS626_CHx_ATI_TARGET_MAX) { 646 dev_err(&client->dev, 647 "Invalid %s channel ATI target: %u\n", 648 fwnode_get_name(ch_node), val); 649 return -EINVAL; 650 } 651 652 *ati_target &= ~IQS626_CHx_ATI_TARGET_MASK; 653 *ati_target |= (val / 32); 654 } 655 656 if (ch_id != IQS626_CH_TP_2 && ch_id != IQS626_CH_TP_3 && 657 !fwnode_property_read_u32(ch_node, "azoteq,ati-base", &val)) { 658 switch (val) { 659 case 75: 660 val = IQS626_CHx_ATI_BASE_75; 661 break; 662 663 case 100: 664 val = IQS626_CHx_ATI_BASE_100; 665 break; 666 667 case 150: 668 val = IQS626_CHx_ATI_BASE_150; 669 break; 670 671 case 200: 672 val = IQS626_CHx_ATI_BASE_200; 673 break; 674 675 default: 676 dev_err(&client->dev, 677 "Invalid %s channel ATI base: %u\n", 678 fwnode_get_name(ch_node), val); 679 return -EINVAL; 680 } 681 682 *ati_target &= ~IQS626_CHx_ATI_BASE_MASK; 683 *ati_target |= val; 684 685 return 0; 686 } 687 688 if (!fwnode_property_present(ch_node, "azoteq,ati-base")) 689 return 0; 690 691 error = fwnode_property_read_u32_array(ch_node, "azoteq,ati-base", 692 ati_base, num_ch); 693 if (error) { 694 dev_err(&client->dev, 695 "Failed to read %s channel ATI bases: %d\n", 696 fwnode_get_name(ch_node), error); 697 return error; 698 } 699 700 for (i = 0; i < num_ch; i++) { 701 if (ati_base[i] < IQS626_TPx_ATI_BASE_MIN || 702 ati_base[i] > IQS626_TPx_ATI_BASE_MAX) { 703 dev_err(&client->dev, 704 "Invalid %s channel ATI base: %u\n", 705 fwnode_get_name(ch_node), ati_base[i]); 706 return -EINVAL; 707 } 708 709 ati_base[i] -= IQS626_TPx_ATI_BASE_MIN; 710 sys_reg->tp_grp_reg.ch_reg_tp[i].ati_base = ati_base[i]; 711 } 712 713 return 0; 714 } 715 716 static int iqs626_parse_pins(struct iqs626_private *iqs626, 717 const struct fwnode_handle *ch_node, 718 const char *propname, u8 *enable) 719 { 720 struct i2c_client *client = iqs626->client; 721 unsigned int val[IQS626_NUM_CRx_TX]; 722 int error, count, i; 723 724 if (!fwnode_property_present(ch_node, propname)) 725 return 0; 726 727 count = fwnode_property_count_u32(ch_node, propname); 728 if (count > IQS626_NUM_CRx_TX) { 729 dev_err(&client->dev, 730 "Too many %s channel CRX/TX pins present\n", 731 fwnode_get_name(ch_node)); 732 return -EINVAL; 733 } else if (count < 0) { 734 dev_err(&client->dev, 735 "Failed to count %s channel CRX/TX pins: %d\n", 736 fwnode_get_name(ch_node), count); 737 return count; 738 } 739 740 error = fwnode_property_read_u32_array(ch_node, propname, val, count); 741 if (error) { 742 dev_err(&client->dev, 743 "Failed to read %s channel CRX/TX pins: %d\n", 744 fwnode_get_name(ch_node), error); 745 return error; 746 } 747 748 *enable = 0; 749 750 for (i = 0; i < count; i++) { 751 if (val[i] >= IQS626_NUM_CRx_TX) { 752 dev_err(&client->dev, 753 "Invalid %s channel CRX/TX pin: %u\n", 754 fwnode_get_name(ch_node), val[i]); 755 return -EINVAL; 756 } 757 758 *enable |= BIT(val[i]); 759 } 760 761 return 0; 762 } 763 764 static int iqs626_parse_trackpad(struct iqs626_private *iqs626, 765 const struct fwnode_handle *ch_node) 766 { 767 struct iqs626_sys_reg *sys_reg = &iqs626->sys_reg; 768 struct i2c_client *client = iqs626->client; 769 u8 *hyst = &sys_reg->tp_grp_reg.hyst; 770 unsigned int val; 771 int error, count; 772 773 if (!fwnode_property_read_u32(ch_node, "azoteq,lta-update", &val)) { 774 if (val > IQS626_MISC_A_TPx_LTA_UPDATE_MAX) { 775 dev_err(&client->dev, 776 "Invalid %s channel update rate: %u\n", 777 fwnode_get_name(ch_node), val); 778 return -EINVAL; 779 } 780 781 sys_reg->misc_a &= ~IQS626_MISC_A_TPx_LTA_UPDATE_MASK; 782 sys_reg->misc_a |= (val << IQS626_MISC_A_TPx_LTA_UPDATE_SHIFT); 783 } 784 785 if (!fwnode_property_read_u32(ch_node, "azoteq,filt-str-trackpad", 786 &val)) { 787 if (val > IQS626_FILT_STR_MAX) { 788 dev_err(&client->dev, 789 "Invalid %s channel filter strength: %u\n", 790 fwnode_get_name(ch_node), val); 791 return -EINVAL; 792 } 793 794 sys_reg->misc_b &= ~IQS626_MISC_B_FILT_STR_TPx; 795 sys_reg->misc_b |= val; 796 } 797 798 if (!fwnode_property_read_u32(ch_node, "azoteq,filt-str-np-cnt", 799 &val)) { 800 if (val > IQS626_FILT_STR_MAX) { 801 dev_err(&client->dev, 802 "Invalid %s channel filter strength: %u\n", 803 fwnode_get_name(ch_node), val); 804 return -EINVAL; 805 } 806 807 *hyst &= ~IQS626_FILT_STR_NP_TPx_MASK; 808 *hyst |= (val << IQS626_FILT_STR_NP_TPx_SHIFT); 809 } 810 811 if (!fwnode_property_read_u32(ch_node, "azoteq,filt-str-lp-cnt", 812 &val)) { 813 if (val > IQS626_FILT_STR_MAX) { 814 dev_err(&client->dev, 815 "Invalid %s channel filter strength: %u\n", 816 fwnode_get_name(ch_node), val); 817 return -EINVAL; 818 } 819 820 *hyst &= ~IQS626_FILT_STR_LP_TPx_MASK; 821 *hyst |= (val << IQS626_FILT_STR_LP_TPx_SHIFT); 822 } 823 824 if (!fwnode_property_present(ch_node, "linux,keycodes")) 825 return 0; 826 827 count = fwnode_property_count_u32(ch_node, "linux,keycodes"); 828 if (count > IQS626_NUM_GESTURES) { 829 dev_err(&client->dev, "Too many keycodes present\n"); 830 return -EINVAL; 831 } else if (count < 0) { 832 dev_err(&client->dev, "Failed to count keycodes: %d\n", count); 833 return count; 834 } 835 836 error = fwnode_property_read_u32_array(ch_node, "linux,keycodes", 837 iqs626->tp_code, count); 838 if (error) { 839 dev_err(&client->dev, "Failed to read keycodes: %d\n", error); 840 return error; 841 } 842 843 sys_reg->misc_b &= ~IQS626_MISC_B_TPx_SWIPE; 844 if (fwnode_property_present(ch_node, "azoteq,gesture-swipe")) 845 sys_reg->misc_b |= IQS626_MISC_B_TPx_SWIPE; 846 847 if (!fwnode_property_read_u32(ch_node, "azoteq,timeout-tap-ms", 848 &val)) { 849 if (val > IQS626_TIMEOUT_TAP_MS_MAX) { 850 dev_err(&client->dev, 851 "Invalid %s channel timeout: %u\n", 852 fwnode_get_name(ch_node), val); 853 return -EINVAL; 854 } 855 856 sys_reg->timeout_tap = val / 16; 857 } 858 859 if (!fwnode_property_read_u32(ch_node, "azoteq,timeout-swipe-ms", 860 &val)) { 861 if (val > IQS626_TIMEOUT_SWIPE_MS_MAX) { 862 dev_err(&client->dev, 863 "Invalid %s channel timeout: %u\n", 864 fwnode_get_name(ch_node), val); 865 return -EINVAL; 866 } 867 868 sys_reg->timeout_swipe = val / 16; 869 } 870 871 if (!fwnode_property_read_u32(ch_node, "azoteq,thresh-swipe", 872 &val)) { 873 if (val > IQS626_THRESH_SWIPE_MAX) { 874 dev_err(&client->dev, 875 "Invalid %s channel threshold: %u\n", 876 fwnode_get_name(ch_node), val); 877 return -EINVAL; 878 } 879 880 sys_reg->thresh_swipe = val; 881 } 882 883 sys_reg->event_mask &= ~IQS626_EVENT_MASK_GESTURE; 884 885 return 0; 886 } 887 888 static int iqs626_parse_channel(struct iqs626_private *iqs626, 889 const struct fwnode_handle *ch_node, 890 enum iqs626_ch_id ch_id) 891 { 892 struct iqs626_sys_reg *sys_reg = &iqs626->sys_reg; 893 struct i2c_client *client = iqs626->client; 894 u8 *engine, *filter, *rx_enable, *tx_enable; 895 u8 *assoc_select, *assoc_weight; 896 unsigned int val; 897 int error, i; 898 899 switch (ch_id) { 900 case IQS626_CH_ULP_0: 901 engine = sys_reg->ch_reg_ulp.engine; 902 break; 903 904 case IQS626_CH_TP_2: 905 case IQS626_CH_TP_3: 906 engine = sys_reg->tp_grp_reg.engine; 907 break; 908 909 case IQS626_CH_GEN_0: 910 case IQS626_CH_GEN_1: 911 case IQS626_CH_GEN_2: 912 i = ch_id - IQS626_CH_GEN_0; 913 engine = sys_reg->ch_reg_gen[i].engine; 914 break; 915 916 case IQS626_CH_HALL: 917 engine = &sys_reg->ch_reg_hall.engine; 918 break; 919 920 default: 921 return -EINVAL; 922 } 923 924 *engine |= IQS626_CHx_ENG_0_MEAS_CAP_SIZE; 925 if (fwnode_property_present(ch_node, "azoteq,meas-cap-decrease")) 926 *engine &= ~IQS626_CHx_ENG_0_MEAS_CAP_SIZE; 927 928 *engine |= IQS626_CHx_ENG_0_RX_TERM_VSS; 929 if (!fwnode_property_read_u32(ch_node, "azoteq,rx-inactive", &val)) { 930 switch (val) { 931 case IQS626_RX_INACTIVE_VSS: 932 break; 933 934 case IQS626_RX_INACTIVE_FLOAT: 935 *engine &= ~IQS626_CHx_ENG_0_RX_TERM_VSS; 936 if (ch_id == IQS626_CH_GEN_0 || 937 ch_id == IQS626_CH_GEN_1 || 938 ch_id == IQS626_CH_GEN_2) 939 *(engine + 4) &= ~IQS626_CHx_ENG_4_RX_TERM_VREG; 940 break; 941 942 case IQS626_RX_INACTIVE_VREG: 943 if (ch_id == IQS626_CH_GEN_0 || 944 ch_id == IQS626_CH_GEN_1 || 945 ch_id == IQS626_CH_GEN_2) { 946 *engine &= ~IQS626_CHx_ENG_0_RX_TERM_VSS; 947 *(engine + 4) |= IQS626_CHx_ENG_4_RX_TERM_VREG; 948 break; 949 } 950 fallthrough; 951 952 default: 953 dev_err(&client->dev, 954 "Invalid %s channel CRX pin termination: %u\n", 955 fwnode_get_name(ch_node), val); 956 return -EINVAL; 957 } 958 } 959 960 *engine &= ~IQS626_CHx_ENG_0_LINEARIZE; 961 if (fwnode_property_present(ch_node, "azoteq,linearize")) 962 *engine |= IQS626_CHx_ENG_0_LINEARIZE; 963 964 *engine &= ~IQS626_CHx_ENG_0_DUAL_DIR; 965 if (fwnode_property_present(ch_node, "azoteq,dual-direction")) 966 *engine |= IQS626_CHx_ENG_0_DUAL_DIR; 967 968 *engine &= ~IQS626_CHx_ENG_0_FILT_DISABLE; 969 if (fwnode_property_present(ch_node, "azoteq,filt-disable")) 970 *engine |= IQS626_CHx_ENG_0_FILT_DISABLE; 971 972 if (!fwnode_property_read_u32(ch_node, "azoteq,ati-mode", &val)) { 973 if (val > IQS626_CHx_ENG_0_ATI_MODE_MAX) { 974 dev_err(&client->dev, 975 "Invalid %s channel ATI mode: %u\n", 976 fwnode_get_name(ch_node), val); 977 return -EINVAL; 978 } 979 980 *engine &= ~IQS626_CHx_ENG_0_ATI_MODE_MASK; 981 *engine |= val; 982 } 983 984 if (ch_id == IQS626_CH_HALL) 985 return 0; 986 987 *(engine + 1) &= ~IQS626_CHx_ENG_1_CCT_ENABLE; 988 if (!fwnode_property_read_u32(ch_node, "azoteq,cct-increase", 989 &val) && val) { 990 unsigned int orig_val = val--; 991 992 /* 993 * In the case of the generic channels, the charge cycle time 994 * field doubles in size and straddles two separate registers. 995 */ 996 if (ch_id == IQS626_CH_GEN_0 || 997 ch_id == IQS626_CH_GEN_1 || 998 ch_id == IQS626_CH_GEN_2) { 999 *(engine + 4) &= ~IQS626_CHx_ENG_4_CCT_LOW_1; 1000 if (val & BIT(1)) 1001 *(engine + 4) |= IQS626_CHx_ENG_4_CCT_LOW_1; 1002 1003 *(engine + 4) &= ~IQS626_CHx_ENG_4_CCT_LOW_0; 1004 if (val & BIT(0)) 1005 *(engine + 4) |= IQS626_CHx_ENG_4_CCT_LOW_0; 1006 1007 val >>= 2; 1008 } 1009 1010 if (val & ~GENMASK(1, 0)) { 1011 dev_err(&client->dev, 1012 "Invalid %s channel charge cycle time: %u\n", 1013 fwnode_get_name(ch_node), orig_val); 1014 return -EINVAL; 1015 } 1016 1017 *(engine + 1) &= ~IQS626_CHx_ENG_1_CCT_HIGH_1; 1018 if (val & BIT(1)) 1019 *(engine + 1) |= IQS626_CHx_ENG_1_CCT_HIGH_1; 1020 1021 *(engine + 1) &= ~IQS626_CHx_ENG_1_CCT_HIGH_0; 1022 if (val & BIT(0)) 1023 *(engine + 1) |= IQS626_CHx_ENG_1_CCT_HIGH_0; 1024 1025 *(engine + 1) |= IQS626_CHx_ENG_1_CCT_ENABLE; 1026 } 1027 1028 if (!fwnode_property_read_u32(ch_node, "azoteq,proj-bias", &val)) { 1029 if (val > IQS626_CHx_ENG_1_PROJ_BIAS_MAX) { 1030 dev_err(&client->dev, 1031 "Invalid %s channel bias current: %u\n", 1032 fwnode_get_name(ch_node), val); 1033 return -EINVAL; 1034 } 1035 1036 *(engine + 1) &= ~IQS626_CHx_ENG_1_PROJ_BIAS_MASK; 1037 *(engine + 1) |= (val << IQS626_CHx_ENG_1_PROJ_BIAS_SHIFT); 1038 } 1039 1040 if (!fwnode_property_read_u32(ch_node, "azoteq,sense-freq", &val)) { 1041 if (val > IQS626_CHx_ENG_1_SENSE_FREQ_MAX) { 1042 dev_err(&client->dev, 1043 "Invalid %s channel sensing frequency: %u\n", 1044 fwnode_get_name(ch_node), val); 1045 return -EINVAL; 1046 } 1047 1048 *(engine + 1) &= ~IQS626_CHx_ENG_1_SENSE_FREQ_MASK; 1049 *(engine + 1) |= (val << IQS626_CHx_ENG_1_SENSE_FREQ_SHIFT); 1050 } 1051 1052 *(engine + 1) &= ~IQS626_CHx_ENG_1_ATI_BAND_TIGHTEN; 1053 if (fwnode_property_present(ch_node, "azoteq,ati-band-tighten")) 1054 *(engine + 1) |= IQS626_CHx_ENG_1_ATI_BAND_TIGHTEN; 1055 1056 if (ch_id == IQS626_CH_TP_2 || ch_id == IQS626_CH_TP_3) 1057 return iqs626_parse_trackpad(iqs626, ch_node); 1058 1059 if (ch_id == IQS626_CH_ULP_0) { 1060 sys_reg->ch_reg_ulp.hyst &= ~IQS626_ULP_PROJ_ENABLE; 1061 if (fwnode_property_present(ch_node, "azoteq,proj-enable")) 1062 sys_reg->ch_reg_ulp.hyst |= IQS626_ULP_PROJ_ENABLE; 1063 1064 filter = &sys_reg->ch_reg_ulp.filter; 1065 1066 rx_enable = &sys_reg->ch_reg_ulp.rx_enable; 1067 tx_enable = &sys_reg->ch_reg_ulp.tx_enable; 1068 } else { 1069 i = ch_id - IQS626_CH_GEN_0; 1070 filter = &sys_reg->ch_reg_gen[i].filter; 1071 1072 rx_enable = &sys_reg->ch_reg_gen[i].rx_enable; 1073 tx_enable = &sys_reg->ch_reg_gen[i].tx_enable; 1074 } 1075 1076 if (!fwnode_property_read_u32(ch_node, "azoteq,filt-str-np-cnt", 1077 &val)) { 1078 if (val > IQS626_FILT_STR_MAX) { 1079 dev_err(&client->dev, 1080 "Invalid %s channel filter strength: %u\n", 1081 fwnode_get_name(ch_node), val); 1082 return -EINVAL; 1083 } 1084 1085 *filter &= ~IQS626_FILT_STR_NP_CNT_MASK; 1086 *filter |= (val << IQS626_FILT_STR_NP_CNT_SHIFT); 1087 } 1088 1089 if (!fwnode_property_read_u32(ch_node, "azoteq,filt-str-lp-cnt", 1090 &val)) { 1091 if (val > IQS626_FILT_STR_MAX) { 1092 dev_err(&client->dev, 1093 "Invalid %s channel filter strength: %u\n", 1094 fwnode_get_name(ch_node), val); 1095 return -EINVAL; 1096 } 1097 1098 *filter &= ~IQS626_FILT_STR_LP_CNT_MASK; 1099 *filter |= (val << IQS626_FILT_STR_LP_CNT_SHIFT); 1100 } 1101 1102 if (!fwnode_property_read_u32(ch_node, "azoteq,filt-str-np-lta", 1103 &val)) { 1104 if (val > IQS626_FILT_STR_MAX) { 1105 dev_err(&client->dev, 1106 "Invalid %s channel filter strength: %u\n", 1107 fwnode_get_name(ch_node), val); 1108 return -EINVAL; 1109 } 1110 1111 *filter &= ~IQS626_FILT_STR_NP_LTA_MASK; 1112 *filter |= (val << IQS626_FILT_STR_NP_LTA_SHIFT); 1113 } 1114 1115 if (!fwnode_property_read_u32(ch_node, "azoteq,filt-str-lp-lta", 1116 &val)) { 1117 if (val > IQS626_FILT_STR_MAX) { 1118 dev_err(&client->dev, 1119 "Invalid %s channel filter strength: %u\n", 1120 fwnode_get_name(ch_node), val); 1121 return -EINVAL; 1122 } 1123 1124 *filter &= ~IQS626_FILT_STR_LP_LTA_MASK; 1125 *filter |= val; 1126 } 1127 1128 error = iqs626_parse_pins(iqs626, ch_node, "azoteq,rx-enable", 1129 rx_enable); 1130 if (error) 1131 return error; 1132 1133 error = iqs626_parse_pins(iqs626, ch_node, "azoteq,tx-enable", 1134 tx_enable); 1135 if (error) 1136 return error; 1137 1138 if (ch_id == IQS626_CH_ULP_0) 1139 return 0; 1140 1141 *(engine + 2) &= ~IQS626_CHx_ENG_2_LOCAL_CAP_ENABLE; 1142 if (!fwnode_property_read_u32(ch_node, "azoteq,local-cap-size", 1143 &val) && val) { 1144 unsigned int orig_val = val--; 1145 1146 if (val > IQS626_CHx_ENG_2_LOCAL_CAP_MAX) { 1147 dev_err(&client->dev, 1148 "Invalid %s channel local cap. size: %u\n", 1149 fwnode_get_name(ch_node), orig_val); 1150 return -EINVAL; 1151 } 1152 1153 *(engine + 2) &= ~IQS626_CHx_ENG_2_LOCAL_CAP_MASK; 1154 *(engine + 2) |= (val << IQS626_CHx_ENG_2_LOCAL_CAP_SHIFT); 1155 1156 *(engine + 2) |= IQS626_CHx_ENG_2_LOCAL_CAP_ENABLE; 1157 } 1158 1159 if (!fwnode_property_read_u32(ch_node, "azoteq,sense-mode", &val)) { 1160 if (val > IQS626_CHx_ENG_2_SENSE_MODE_MAX) { 1161 dev_err(&client->dev, 1162 "Invalid %s channel sensing mode: %u\n", 1163 fwnode_get_name(ch_node), val); 1164 return -EINVAL; 1165 } 1166 1167 *(engine + 2) &= ~IQS626_CHx_ENG_2_SENSE_MODE_MASK; 1168 *(engine + 2) |= val; 1169 } 1170 1171 if (!fwnode_property_read_u32(ch_node, "azoteq,tx-freq", &val)) { 1172 if (val > IQS626_CHx_ENG_3_TX_FREQ_MAX) { 1173 dev_err(&client->dev, 1174 "Invalid %s channel excitation frequency: %u\n", 1175 fwnode_get_name(ch_node), val); 1176 return -EINVAL; 1177 } 1178 1179 *(engine + 3) &= ~IQS626_CHx_ENG_3_TX_FREQ_MASK; 1180 *(engine + 3) |= (val << IQS626_CHx_ENG_3_TX_FREQ_SHIFT); 1181 } 1182 1183 *(engine + 3) &= ~IQS626_CHx_ENG_3_INV_LOGIC; 1184 if (fwnode_property_present(ch_node, "azoteq,invert-enable")) 1185 *(engine + 3) |= IQS626_CHx_ENG_3_INV_LOGIC; 1186 1187 *(engine + 4) &= ~IQS626_CHx_ENG_4_COMP_DISABLE; 1188 if (fwnode_property_present(ch_node, "azoteq,comp-disable")) 1189 *(engine + 4) |= IQS626_CHx_ENG_4_COMP_DISABLE; 1190 1191 *(engine + 4) &= ~IQS626_CHx_ENG_4_STATIC_ENABLE; 1192 if (fwnode_property_present(ch_node, "azoteq,static-enable")) 1193 *(engine + 4) |= IQS626_CHx_ENG_4_STATIC_ENABLE; 1194 1195 i = ch_id - IQS626_CH_GEN_0; 1196 assoc_select = &sys_reg->ch_reg_gen[i].assoc_select; 1197 assoc_weight = &sys_reg->ch_reg_gen[i].assoc_weight; 1198 1199 *assoc_select = 0; 1200 if (!fwnode_property_present(ch_node, "azoteq,assoc-select")) 1201 return 0; 1202 1203 for (i = 0; i < ARRAY_SIZE(iqs626_channels); i++) { 1204 if (fwnode_property_match_string(ch_node, "azoteq,assoc-select", 1205 iqs626_channels[i].name) < 0) 1206 continue; 1207 1208 *assoc_select |= iqs626_channels[i].active; 1209 } 1210 1211 if (fwnode_property_read_u32(ch_node, "azoteq,assoc-weight", &val)) 1212 return 0; 1213 1214 if (val > IQS626_GEN_WEIGHT_MAX) { 1215 dev_err(&client->dev, 1216 "Invalid %s channel associated weight: %u\n", 1217 fwnode_get_name(ch_node), val); 1218 return -EINVAL; 1219 } 1220 1221 *assoc_weight = val; 1222 1223 return 0; 1224 } 1225 1226 static int iqs626_parse_prop(struct iqs626_private *iqs626) 1227 { 1228 struct iqs626_sys_reg *sys_reg = &iqs626->sys_reg; 1229 struct i2c_client *client = iqs626->client; 1230 struct fwnode_handle *ch_node; 1231 unsigned int val; 1232 int error, i; 1233 u16 general; 1234 1235 if (!device_property_read_u32(&client->dev, "azoteq,suspend-mode", 1236 &val)) { 1237 if (val > IQS626_SYS_SETTINGS_PWR_MODE_MAX) { 1238 dev_err(&client->dev, "Invalid suspend mode: %u\n", 1239 val); 1240 return -EINVAL; 1241 } 1242 1243 iqs626->suspend_mode = val; 1244 } 1245 1246 error = regmap_raw_read(iqs626->regmap, IQS626_SYS_SETTINGS, sys_reg, 1247 sizeof(*sys_reg)); 1248 if (error) 1249 return error; 1250 1251 general = be16_to_cpu(sys_reg->general); 1252 general &= IQS626_SYS_SETTINGS_ULP_UPDATE_MASK; 1253 1254 if (device_property_present(&client->dev, "azoteq,clk-div")) 1255 general |= IQS626_SYS_SETTINGS_CLK_DIV; 1256 1257 if (device_property_present(&client->dev, "azoteq,ulp-enable")) 1258 general |= IQS626_SYS_SETTINGS_ULP_AUTO; 1259 1260 if (!device_property_read_u32(&client->dev, "azoteq,ulp-update", 1261 &val)) { 1262 if (val > IQS626_SYS_SETTINGS_ULP_UPDATE_MAX) { 1263 dev_err(&client->dev, "Invalid update rate: %u\n", val); 1264 return -EINVAL; 1265 } 1266 1267 general &= ~IQS626_SYS_SETTINGS_ULP_UPDATE_MASK; 1268 general |= (val << IQS626_SYS_SETTINGS_ULP_UPDATE_SHIFT); 1269 } 1270 1271 sys_reg->misc_a &= ~IQS626_MISC_A_ATI_BAND_DISABLE; 1272 if (device_property_present(&client->dev, "azoteq,ati-band-disable")) 1273 sys_reg->misc_a |= IQS626_MISC_A_ATI_BAND_DISABLE; 1274 1275 sys_reg->misc_a &= ~IQS626_MISC_A_ATI_LP_ONLY; 1276 if (device_property_present(&client->dev, "azoteq,ati-lp-only")) 1277 sys_reg->misc_a |= IQS626_MISC_A_ATI_LP_ONLY; 1278 1279 if (!device_property_read_u32(&client->dev, "azoteq,gpio3-select", 1280 &val)) { 1281 if (val > IQS626_MISC_A_GPIO3_SELECT_MAX) { 1282 dev_err(&client->dev, "Invalid GPIO3 selection: %u\n", 1283 val); 1284 return -EINVAL; 1285 } 1286 1287 sys_reg->misc_a &= ~IQS626_MISC_A_GPIO3_SELECT_MASK; 1288 sys_reg->misc_a |= val; 1289 } 1290 1291 if (!device_property_read_u32(&client->dev, "azoteq,reseed-select", 1292 &val)) { 1293 if (val > IQS626_MISC_B_RESEED_UI_SEL_MAX) { 1294 dev_err(&client->dev, "Invalid reseed selection: %u\n", 1295 val); 1296 return -EINVAL; 1297 } 1298 1299 sys_reg->misc_b &= ~IQS626_MISC_B_RESEED_UI_SEL_MASK; 1300 sys_reg->misc_b |= (val << IQS626_MISC_B_RESEED_UI_SEL_SHIFT); 1301 } 1302 1303 sys_reg->misc_b &= ~IQS626_MISC_B_THRESH_EXTEND; 1304 if (device_property_present(&client->dev, "azoteq,thresh-extend")) 1305 sys_reg->misc_b |= IQS626_MISC_B_THRESH_EXTEND; 1306 1307 sys_reg->misc_b &= ~IQS626_MISC_B_TRACKING_UI_ENABLE; 1308 if (device_property_present(&client->dev, "azoteq,tracking-enable")) 1309 sys_reg->misc_b |= IQS626_MISC_B_TRACKING_UI_ENABLE; 1310 1311 sys_reg->misc_b &= ~IQS626_MISC_B_RESEED_OFFSET; 1312 if (device_property_present(&client->dev, "azoteq,reseed-offset")) 1313 sys_reg->misc_b |= IQS626_MISC_B_RESEED_OFFSET; 1314 1315 if (!device_property_read_u32(&client->dev, "azoteq,rate-np-ms", 1316 &val)) { 1317 if (val > IQS626_RATE_NP_MS_MAX) { 1318 dev_err(&client->dev, "Invalid report rate: %u\n", val); 1319 return -EINVAL; 1320 } 1321 1322 sys_reg->rate_np = val; 1323 } 1324 1325 if (!device_property_read_u32(&client->dev, "azoteq,rate-lp-ms", 1326 &val)) { 1327 if (val > IQS626_RATE_LP_MS_MAX) { 1328 dev_err(&client->dev, "Invalid report rate: %u\n", val); 1329 return -EINVAL; 1330 } 1331 1332 sys_reg->rate_lp = val; 1333 } 1334 1335 if (!device_property_read_u32(&client->dev, "azoteq,rate-ulp-ms", 1336 &val)) { 1337 if (val > IQS626_RATE_ULP_MS_MAX) { 1338 dev_err(&client->dev, "Invalid report rate: %u\n", val); 1339 return -EINVAL; 1340 } 1341 1342 sys_reg->rate_ulp = val / 16; 1343 } 1344 1345 if (!device_property_read_u32(&client->dev, "azoteq,timeout-pwr-ms", 1346 &val)) { 1347 if (val > IQS626_TIMEOUT_PWR_MS_MAX) { 1348 dev_err(&client->dev, "Invalid timeout: %u\n", val); 1349 return -EINVAL; 1350 } 1351 1352 sys_reg->timeout_pwr = val / 512; 1353 } 1354 1355 if (!device_property_read_u32(&client->dev, "azoteq,timeout-lta-ms", 1356 &val)) { 1357 if (val > IQS626_TIMEOUT_LTA_MS_MAX) { 1358 dev_err(&client->dev, "Invalid timeout: %u\n", val); 1359 return -EINVAL; 1360 } 1361 1362 sys_reg->timeout_lta = val / 512; 1363 } 1364 1365 sys_reg->event_mask = ~((u8)IQS626_EVENT_MASK_SYS); 1366 sys_reg->redo_ati = 0; 1367 1368 sys_reg->reseed = 0; 1369 sys_reg->active = 0; 1370 1371 for (i = 0; i < ARRAY_SIZE(iqs626_channels); i++) { 1372 ch_node = device_get_named_child_node(&client->dev, 1373 iqs626_channels[i].name); 1374 if (!ch_node) 1375 continue; 1376 1377 error = iqs626_parse_channel(iqs626, ch_node, i); 1378 if (error) 1379 return error; 1380 1381 error = iqs626_parse_ati_target(iqs626, ch_node, i); 1382 if (error) 1383 return error; 1384 1385 error = iqs626_parse_events(iqs626, ch_node, i); 1386 if (error) 1387 return error; 1388 1389 if (!fwnode_property_present(ch_node, "azoteq,ati-exclude")) 1390 sys_reg->redo_ati |= iqs626_channels[i].active; 1391 1392 if (!fwnode_property_present(ch_node, "azoteq,reseed-disable")) 1393 sys_reg->reseed |= iqs626_channels[i].active; 1394 1395 sys_reg->active |= iqs626_channels[i].active; 1396 } 1397 1398 general |= IQS626_SYS_SETTINGS_EVENT_MODE; 1399 1400 /* 1401 * Enable streaming during normal-power mode if the trackpad is used to 1402 * report raw coordinates instead of gestures. In that case, the device 1403 * returns to event mode during low-power mode. 1404 */ 1405 if (sys_reg->active & iqs626_channels[IQS626_CH_TP_2].active && 1406 sys_reg->event_mask & IQS626_EVENT_MASK_GESTURE) 1407 general |= IQS626_SYS_SETTINGS_EVENT_MODE_LP; 1408 1409 general |= IQS626_SYS_SETTINGS_REDO_ATI; 1410 general |= IQS626_SYS_SETTINGS_ACK_RESET; 1411 1412 sys_reg->general = cpu_to_be16(general); 1413 1414 error = regmap_raw_write(iqs626->regmap, IQS626_SYS_SETTINGS, 1415 &iqs626->sys_reg, sizeof(iqs626->sys_reg)); 1416 if (error) 1417 return error; 1418 1419 iqs626_irq_wait(); 1420 1421 return 0; 1422 } 1423 1424 static int iqs626_input_init(struct iqs626_private *iqs626) 1425 { 1426 struct iqs626_sys_reg *sys_reg = &iqs626->sys_reg; 1427 struct i2c_client *client = iqs626->client; 1428 int error, i, j; 1429 1430 iqs626->keypad = devm_input_allocate_device(&client->dev); 1431 if (!iqs626->keypad) 1432 return -ENOMEM; 1433 1434 iqs626->keypad->keycodemax = ARRAY_SIZE(iqs626->kp_code); 1435 iqs626->keypad->keycode = iqs626->kp_code; 1436 iqs626->keypad->keycodesize = sizeof(**iqs626->kp_code); 1437 1438 iqs626->keypad->name = "iqs626a_keypad"; 1439 iqs626->keypad->id.bustype = BUS_I2C; 1440 1441 for (i = 0; i < ARRAY_SIZE(iqs626_channels); i++) { 1442 if (!(sys_reg->active & iqs626_channels[i].active)) 1443 continue; 1444 1445 for (j = 0; j < ARRAY_SIZE(iqs626_events); j++) { 1446 if (!iqs626->kp_type[i][j]) 1447 continue; 1448 1449 input_set_capability(iqs626->keypad, 1450 iqs626->kp_type[i][j], 1451 iqs626->kp_code[i][j]); 1452 } 1453 } 1454 1455 if (!(sys_reg->active & iqs626_channels[IQS626_CH_TP_2].active)) 1456 return 0; 1457 1458 iqs626->trackpad = devm_input_allocate_device(&client->dev); 1459 if (!iqs626->trackpad) 1460 return -ENOMEM; 1461 1462 iqs626->trackpad->keycodemax = ARRAY_SIZE(iqs626->tp_code); 1463 iqs626->trackpad->keycode = iqs626->tp_code; 1464 iqs626->trackpad->keycodesize = sizeof(*iqs626->tp_code); 1465 1466 iqs626->trackpad->name = "iqs626a_trackpad"; 1467 iqs626->trackpad->id.bustype = BUS_I2C; 1468 1469 /* 1470 * Present the trackpad as a traditional pointing device if no gestures 1471 * have been mapped to a keycode. 1472 */ 1473 if (sys_reg->event_mask & IQS626_EVENT_MASK_GESTURE) { 1474 u8 tp_mask = iqs626_channels[IQS626_CH_TP_3].active; 1475 1476 input_set_capability(iqs626->trackpad, EV_KEY, BTN_TOUCH); 1477 input_set_abs_params(iqs626->trackpad, ABS_Y, 0, 255, 0, 0); 1478 1479 if ((sys_reg->active & tp_mask) == tp_mask) 1480 input_set_abs_params(iqs626->trackpad, 1481 ABS_X, 0, 255, 0, 0); 1482 else 1483 input_set_abs_params(iqs626->trackpad, 1484 ABS_X, 0, 128, 0, 0); 1485 1486 touchscreen_parse_properties(iqs626->trackpad, false, 1487 &iqs626->prop); 1488 } else { 1489 for (i = 0; i < IQS626_NUM_GESTURES; i++) 1490 if (iqs626->tp_code[i] != KEY_RESERVED) 1491 input_set_capability(iqs626->trackpad, EV_KEY, 1492 iqs626->tp_code[i]); 1493 } 1494 1495 error = input_register_device(iqs626->trackpad); 1496 if (error) 1497 dev_err(&client->dev, "Failed to register trackpad: %d\n", 1498 error); 1499 1500 return error; 1501 } 1502 1503 static int iqs626_report(struct iqs626_private *iqs626) 1504 { 1505 struct iqs626_sys_reg *sys_reg = &iqs626->sys_reg; 1506 struct i2c_client *client = iqs626->client; 1507 struct iqs626_flags flags; 1508 __le16 hall_output; 1509 int error, i, j; 1510 u8 state; 1511 u8 *dir_mask = &flags.states[IQS626_ST_OFFS_DIR]; 1512 1513 error = regmap_raw_read(iqs626->regmap, IQS626_SYS_FLAGS, &flags, 1514 sizeof(flags)); 1515 if (error) { 1516 dev_err(&client->dev, "Failed to read device status: %d\n", 1517 error); 1518 return error; 1519 } 1520 1521 /* 1522 * The device resets itself if its own watchdog bites, which can happen 1523 * in the event of an I2C communication error. In this case, the device 1524 * asserts a SHOW_RESET interrupt and all registers must be restored. 1525 */ 1526 if (be16_to_cpu(flags.system) & IQS626_SYS_FLAGS_SHOW_RESET) { 1527 dev_err(&client->dev, "Unexpected device reset\n"); 1528 1529 error = regmap_raw_write(iqs626->regmap, IQS626_SYS_SETTINGS, 1530 sys_reg, sizeof(*sys_reg)); 1531 if (error) 1532 dev_err(&client->dev, 1533 "Failed to re-initialize device: %d\n", error); 1534 1535 return error; 1536 } 1537 1538 if (be16_to_cpu(flags.system) & IQS626_SYS_FLAGS_IN_ATI) 1539 return 0; 1540 1541 /* 1542 * Unlike the ULP or generic channels, the Hall channel does not have a 1543 * direction flag. Instead, the direction (i.e. magnet polarity) can be 1544 * derived based on the sign of the 2's complement differential output. 1545 */ 1546 if (sys_reg->active & iqs626_channels[IQS626_CH_HALL].active) { 1547 error = regmap_raw_read(iqs626->regmap, IQS626_HALL_OUTPUT, 1548 &hall_output, sizeof(hall_output)); 1549 if (error) { 1550 dev_err(&client->dev, 1551 "Failed to read Hall output: %d\n", error); 1552 return error; 1553 } 1554 1555 *dir_mask &= ~iqs626_channels[IQS626_CH_HALL].active; 1556 if (le16_to_cpu(hall_output) < 0x8000) 1557 *dir_mask |= iqs626_channels[IQS626_CH_HALL].active; 1558 } 1559 1560 for (i = 0; i < ARRAY_SIZE(iqs626_channels); i++) { 1561 if (!(sys_reg->active & iqs626_channels[i].active)) 1562 continue; 1563 1564 for (j = 0; j < ARRAY_SIZE(iqs626_events); j++) { 1565 if (!iqs626->kp_type[i][j]) 1566 continue; 1567 1568 state = flags.states[iqs626_events[j].st_offs]; 1569 state &= iqs626_events[j].dir_up ? *dir_mask 1570 : ~(*dir_mask); 1571 state &= iqs626_channels[i].active; 1572 1573 input_event(iqs626->keypad, iqs626->kp_type[i][j], 1574 iqs626->kp_code[i][j], !!state); 1575 } 1576 } 1577 1578 input_sync(iqs626->keypad); 1579 1580 /* 1581 * The following completion signals that ATI has finished, any initial 1582 * switch states have been reported and the keypad can be registered. 1583 */ 1584 complete_all(&iqs626->ati_done); 1585 1586 if (!(sys_reg->active & iqs626_channels[IQS626_CH_TP_2].active)) 1587 return 0; 1588 1589 if (sys_reg->event_mask & IQS626_EVENT_MASK_GESTURE) { 1590 state = flags.states[IQS626_ST_OFFS_TOUCH]; 1591 state &= iqs626_channels[IQS626_CH_TP_2].active; 1592 1593 input_report_key(iqs626->trackpad, BTN_TOUCH, state); 1594 1595 if (state) 1596 touchscreen_report_pos(iqs626->trackpad, &iqs626->prop, 1597 flags.trackpad_x, 1598 flags.trackpad_y, false); 1599 } else { 1600 for (i = 0; i < IQS626_NUM_GESTURES; i++) 1601 input_report_key(iqs626->trackpad, iqs626->tp_code[i], 1602 flags.gesture & BIT(i)); 1603 1604 if (flags.gesture & GENMASK(IQS626_GESTURE_TAP, 0)) { 1605 input_sync(iqs626->trackpad); 1606 1607 /* 1608 * Momentary gestures are followed by a complementary 1609 * release cycle so as to emulate a full keystroke. 1610 */ 1611 for (i = 0; i < IQS626_GESTURE_HOLD; i++) 1612 input_report_key(iqs626->trackpad, 1613 iqs626->tp_code[i], 0); 1614 } 1615 } 1616 1617 input_sync(iqs626->trackpad); 1618 1619 return 0; 1620 } 1621 1622 static irqreturn_t iqs626_irq(int irq, void *context) 1623 { 1624 struct iqs626_private *iqs626 = context; 1625 1626 if (iqs626_report(iqs626)) 1627 return IRQ_NONE; 1628 1629 /* 1630 * The device does not deassert its interrupt (RDY) pin until shortly 1631 * after receiving an I2C stop condition; the following delay ensures 1632 * the interrupt handler does not return before this time. 1633 */ 1634 iqs626_irq_wait(); 1635 1636 return IRQ_HANDLED; 1637 } 1638 1639 static const struct regmap_config iqs626_regmap_config = { 1640 .reg_bits = 8, 1641 .val_bits = 16, 1642 .max_register = IQS626_MAX_REG, 1643 }; 1644 1645 static int iqs626_probe(struct i2c_client *client) 1646 { 1647 struct iqs626_ver_info ver_info; 1648 struct iqs626_private *iqs626; 1649 int error; 1650 1651 iqs626 = devm_kzalloc(&client->dev, sizeof(*iqs626), GFP_KERNEL); 1652 if (!iqs626) 1653 return -ENOMEM; 1654 1655 i2c_set_clientdata(client, iqs626); 1656 iqs626->client = client; 1657 1658 iqs626->regmap = devm_regmap_init_i2c(client, &iqs626_regmap_config); 1659 if (IS_ERR(iqs626->regmap)) { 1660 error = PTR_ERR(iqs626->regmap); 1661 dev_err(&client->dev, "Failed to initialize register map: %d\n", 1662 error); 1663 return error; 1664 } 1665 1666 init_completion(&iqs626->ati_done); 1667 1668 error = regmap_raw_read(iqs626->regmap, IQS626_VER_INFO, &ver_info, 1669 sizeof(ver_info)); 1670 if (error) 1671 return error; 1672 1673 if (ver_info.prod_num != IQS626_VER_INFO_PROD_NUM) { 1674 dev_err(&client->dev, "Unrecognized product number: 0x%02X\n", 1675 ver_info.prod_num); 1676 return -EINVAL; 1677 } 1678 1679 error = iqs626_parse_prop(iqs626); 1680 if (error) 1681 return error; 1682 1683 error = iqs626_input_init(iqs626); 1684 if (error) 1685 return error; 1686 1687 error = devm_request_threaded_irq(&client->dev, client->irq, 1688 NULL, iqs626_irq, IRQF_ONESHOT, 1689 client->name, iqs626); 1690 if (error) { 1691 dev_err(&client->dev, "Failed to request IRQ: %d\n", error); 1692 return error; 1693 } 1694 1695 if (!wait_for_completion_timeout(&iqs626->ati_done, 1696 msecs_to_jiffies(2000))) { 1697 dev_err(&client->dev, "Failed to complete ATI\n"); 1698 return -ETIMEDOUT; 1699 } 1700 1701 /* 1702 * The keypad may include one or more switches and is not registered 1703 * until ATI is complete and the initial switch states are read. 1704 */ 1705 error = input_register_device(iqs626->keypad); 1706 if (error) 1707 dev_err(&client->dev, "Failed to register keypad: %d\n", error); 1708 1709 return error; 1710 } 1711 1712 static int __maybe_unused iqs626_suspend(struct device *dev) 1713 { 1714 struct iqs626_private *iqs626 = dev_get_drvdata(dev); 1715 struct i2c_client *client = iqs626->client; 1716 unsigned int val; 1717 int error; 1718 1719 if (!iqs626->suspend_mode) 1720 return 0; 1721 1722 disable_irq(client->irq); 1723 1724 /* 1725 * Automatic power mode switching must be disabled before the device is 1726 * forced into any particular power mode. In this case, the device will 1727 * transition into normal-power mode. 1728 */ 1729 error = regmap_update_bits(iqs626->regmap, IQS626_SYS_SETTINGS, 1730 IQS626_SYS_SETTINGS_DIS_AUTO, ~0); 1731 if (error) 1732 goto err_irq; 1733 1734 /* 1735 * The following check ensures the device has completed its transition 1736 * into normal-power mode before a manual mode switch is performed. 1737 */ 1738 error = regmap_read_poll_timeout(iqs626->regmap, IQS626_SYS_FLAGS, val, 1739 !(val & IQS626_SYS_FLAGS_PWR_MODE_MASK), 1740 IQS626_PWR_MODE_POLL_SLEEP_US, 1741 IQS626_PWR_MODE_POLL_TIMEOUT_US); 1742 if (error) 1743 goto err_irq; 1744 1745 error = regmap_update_bits(iqs626->regmap, IQS626_SYS_SETTINGS, 1746 IQS626_SYS_SETTINGS_PWR_MODE_MASK, 1747 iqs626->suspend_mode << 1748 IQS626_SYS_SETTINGS_PWR_MODE_SHIFT); 1749 if (error) 1750 goto err_irq; 1751 1752 /* 1753 * This last check ensures the device has completed its transition into 1754 * the desired power mode to prevent any spurious interrupts from being 1755 * triggered after iqs626_suspend has already returned. 1756 */ 1757 error = regmap_read_poll_timeout(iqs626->regmap, IQS626_SYS_FLAGS, val, 1758 (val & IQS626_SYS_FLAGS_PWR_MODE_MASK) 1759 == (iqs626->suspend_mode << 1760 IQS626_SYS_FLAGS_PWR_MODE_SHIFT), 1761 IQS626_PWR_MODE_POLL_SLEEP_US, 1762 IQS626_PWR_MODE_POLL_TIMEOUT_US); 1763 1764 err_irq: 1765 iqs626_irq_wait(); 1766 enable_irq(client->irq); 1767 1768 return error; 1769 } 1770 1771 static int __maybe_unused iqs626_resume(struct device *dev) 1772 { 1773 struct iqs626_private *iqs626 = dev_get_drvdata(dev); 1774 struct i2c_client *client = iqs626->client; 1775 unsigned int val; 1776 int error; 1777 1778 if (!iqs626->suspend_mode) 1779 return 0; 1780 1781 disable_irq(client->irq); 1782 1783 error = regmap_update_bits(iqs626->regmap, IQS626_SYS_SETTINGS, 1784 IQS626_SYS_SETTINGS_PWR_MODE_MASK, 0); 1785 if (error) 1786 goto err_irq; 1787 1788 /* 1789 * This check ensures the device has returned to normal-power mode 1790 * before automatic power mode switching is re-enabled. 1791 */ 1792 error = regmap_read_poll_timeout(iqs626->regmap, IQS626_SYS_FLAGS, val, 1793 !(val & IQS626_SYS_FLAGS_PWR_MODE_MASK), 1794 IQS626_PWR_MODE_POLL_SLEEP_US, 1795 IQS626_PWR_MODE_POLL_TIMEOUT_US); 1796 if (error) 1797 goto err_irq; 1798 1799 error = regmap_update_bits(iqs626->regmap, IQS626_SYS_SETTINGS, 1800 IQS626_SYS_SETTINGS_DIS_AUTO, 0); 1801 if (error) 1802 goto err_irq; 1803 1804 /* 1805 * This step reports any events that may have been "swallowed" as a 1806 * result of polling PWR_MODE (which automatically acknowledges any 1807 * pending interrupts). 1808 */ 1809 error = iqs626_report(iqs626); 1810 1811 err_irq: 1812 iqs626_irq_wait(); 1813 enable_irq(client->irq); 1814 1815 return error; 1816 } 1817 1818 static SIMPLE_DEV_PM_OPS(iqs626_pm, iqs626_suspend, iqs626_resume); 1819 1820 static const struct of_device_id iqs626_of_match[] = { 1821 { .compatible = "azoteq,iqs626a" }, 1822 { } 1823 }; 1824 MODULE_DEVICE_TABLE(of, iqs626_of_match); 1825 1826 static struct i2c_driver iqs626_i2c_driver = { 1827 .driver = { 1828 .name = "iqs626a", 1829 .of_match_table = iqs626_of_match, 1830 .pm = &iqs626_pm, 1831 }, 1832 .probe_new = iqs626_probe, 1833 }; 1834 module_i2c_driver(iqs626_i2c_driver); 1835 1836 MODULE_AUTHOR("Jeff LaBundy <jeff@labundy.com>"); 1837 MODULE_DESCRIPTION("Azoteq IQS626A Capacitive Touch Controller"); 1838 MODULE_LICENSE("GPL"); 1839