1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Azoteq IQS626A Capacitive Touch Controller 4 * 5 * Copyright (C) 2020 Jeff LaBundy <jeff@labundy.com> 6 * 7 * This driver registers up to 2 input devices: one representing capacitive or 8 * inductive keys as well as Hall-effect switches, and one for a trackpad that 9 * can express various gestures. 10 */ 11 12 #include <linux/bits.h> 13 #include <linux/completion.h> 14 #include <linux/delay.h> 15 #include <linux/device.h> 16 #include <linux/err.h> 17 #include <linux/i2c.h> 18 #include <linux/input.h> 19 #include <linux/input/touchscreen.h> 20 #include <linux/interrupt.h> 21 #include <linux/kernel.h> 22 #include <linux/mod_devicetable.h> 23 #include <linux/module.h> 24 #include <linux/property.h> 25 #include <linux/regmap.h> 26 #include <linux/slab.h> 27 28 #define IQS626_VER_INFO 0x00 29 #define IQS626_VER_INFO_PROD_NUM 0x51 30 31 #define IQS626_SYS_FLAGS 0x02 32 #define IQS626_SYS_FLAGS_SHOW_RESET BIT(15) 33 #define IQS626_SYS_FLAGS_IN_ATI BIT(12) 34 #define IQS626_SYS_FLAGS_PWR_MODE_MASK GENMASK(9, 8) 35 #define IQS626_SYS_FLAGS_PWR_MODE_SHIFT 8 36 37 #define IQS626_HALL_OUTPUT 0x23 38 39 #define IQS626_SYS_SETTINGS 0x80 40 #define IQS626_SYS_SETTINGS_CLK_DIV BIT(15) 41 #define IQS626_SYS_SETTINGS_ULP_AUTO BIT(14) 42 #define IQS626_SYS_SETTINGS_DIS_AUTO BIT(13) 43 #define IQS626_SYS_SETTINGS_PWR_MODE_MASK GENMASK(12, 11) 44 #define IQS626_SYS_SETTINGS_PWR_MODE_SHIFT 11 45 #define IQS626_SYS_SETTINGS_PWR_MODE_MAX 3 46 #define IQS626_SYS_SETTINGS_ULP_UPDATE_MASK GENMASK(10, 8) 47 #define IQS626_SYS_SETTINGS_ULP_UPDATE_SHIFT 8 48 #define IQS626_SYS_SETTINGS_ULP_UPDATE_MAX 7 49 #define IQS626_SYS_SETTINGS_EVENT_MODE BIT(5) 50 #define IQS626_SYS_SETTINGS_EVENT_MODE_LP BIT(4) 51 #define IQS626_SYS_SETTINGS_REDO_ATI BIT(2) 52 #define IQS626_SYS_SETTINGS_ACK_RESET BIT(0) 53 54 #define IQS626_MISC_A_ATI_BAND_DISABLE BIT(7) 55 #define IQS626_MISC_A_TPx_LTA_UPDATE_MASK GENMASK(6, 4) 56 #define IQS626_MISC_A_TPx_LTA_UPDATE_SHIFT 4 57 #define IQS626_MISC_A_TPx_LTA_UPDATE_MAX 7 58 #define IQS626_MISC_A_ATI_LP_ONLY BIT(3) 59 #define IQS626_MISC_A_GPIO3_SELECT_MASK GENMASK(2, 0) 60 #define IQS626_MISC_A_GPIO3_SELECT_MAX 7 61 62 #define IQS626_EVENT_MASK_SYS BIT(6) 63 #define IQS626_EVENT_MASK_GESTURE BIT(3) 64 #define IQS626_EVENT_MASK_DEEP BIT(2) 65 #define IQS626_EVENT_MASK_TOUCH BIT(1) 66 #define IQS626_EVENT_MASK_PROX BIT(0) 67 68 #define IQS626_RATE_NP_MS_MAX 255 69 #define IQS626_RATE_LP_MS_MAX 255 70 #define IQS626_RATE_ULP_MS_MAX 4080 71 #define IQS626_TIMEOUT_PWR_MS_MAX 130560 72 #define IQS626_TIMEOUT_LTA_MS_MAX 130560 73 74 #define IQS626_MISC_B_RESEED_UI_SEL_MASK GENMASK(7, 6) 75 #define IQS626_MISC_B_RESEED_UI_SEL_SHIFT 6 76 #define IQS626_MISC_B_RESEED_UI_SEL_MAX 3 77 #define IQS626_MISC_B_THRESH_EXTEND BIT(5) 78 #define IQS626_MISC_B_TRACKING_UI_ENABLE BIT(4) 79 #define IQS626_MISC_B_TPx_SWIPE BIT(3) 80 #define IQS626_MISC_B_RESEED_OFFSET BIT(2) 81 #define IQS626_MISC_B_FILT_STR_TPx GENMASK(1, 0) 82 83 #define IQS626_THRESH_SWIPE_MAX 255 84 #define IQS626_TIMEOUT_TAP_MS_MAX 4080 85 #define IQS626_TIMEOUT_SWIPE_MS_MAX 4080 86 87 #define IQS626_CHx_ENG_0_MEAS_CAP_SIZE BIT(7) 88 #define IQS626_CHx_ENG_0_RX_TERM_VSS BIT(5) 89 #define IQS626_CHx_ENG_0_LINEARIZE BIT(4) 90 #define IQS626_CHx_ENG_0_DUAL_DIR BIT(3) 91 #define IQS626_CHx_ENG_0_FILT_DISABLE BIT(2) 92 #define IQS626_CHx_ENG_0_ATI_MODE_MASK GENMASK(1, 0) 93 #define IQS626_CHx_ENG_0_ATI_MODE_MAX 3 94 95 #define IQS626_CHx_ENG_1_CCT_HIGH_1 BIT(7) 96 #define IQS626_CHx_ENG_1_CCT_HIGH_0 BIT(6) 97 #define IQS626_CHx_ENG_1_PROJ_BIAS_MASK GENMASK(5, 4) 98 #define IQS626_CHx_ENG_1_PROJ_BIAS_SHIFT 4 99 #define IQS626_CHx_ENG_1_PROJ_BIAS_MAX 3 100 #define IQS626_CHx_ENG_1_CCT_ENABLE BIT(3) 101 #define IQS626_CHx_ENG_1_SENSE_FREQ_MASK GENMASK(2, 1) 102 #define IQS626_CHx_ENG_1_SENSE_FREQ_SHIFT 1 103 #define IQS626_CHx_ENG_1_SENSE_FREQ_MAX 3 104 #define IQS626_CHx_ENG_1_ATI_BAND_TIGHTEN BIT(0) 105 106 #define IQS626_CHx_ENG_2_LOCAL_CAP_MASK GENMASK(7, 6) 107 #define IQS626_CHx_ENG_2_LOCAL_CAP_SHIFT 6 108 #define IQS626_CHx_ENG_2_LOCAL_CAP_MAX 3 109 #define IQS626_CHx_ENG_2_LOCAL_CAP_ENABLE BIT(5) 110 #define IQS626_CHx_ENG_2_SENSE_MODE_MASK GENMASK(3, 0) 111 #define IQS626_CHx_ENG_2_SENSE_MODE_MAX 15 112 113 #define IQS626_CHx_ENG_3_TX_FREQ_MASK GENMASK(5, 4) 114 #define IQS626_CHx_ENG_3_TX_FREQ_SHIFT 4 115 #define IQS626_CHx_ENG_3_TX_FREQ_MAX 3 116 #define IQS626_CHx_ENG_3_INV_LOGIC BIT(0) 117 118 #define IQS626_CHx_ENG_4_RX_TERM_VREG BIT(6) 119 #define IQS626_CHx_ENG_4_CCT_LOW_1 BIT(5) 120 #define IQS626_CHx_ENG_4_CCT_LOW_0 BIT(4) 121 #define IQS626_CHx_ENG_4_COMP_DISABLE BIT(1) 122 #define IQS626_CHx_ENG_4_STATIC_ENABLE BIT(0) 123 124 #define IQS626_TPx_ATI_BASE_MIN 45 125 #define IQS626_TPx_ATI_BASE_MAX 300 126 #define IQS626_CHx_ATI_BASE_MASK GENMASK(7, 6) 127 #define IQS626_CHx_ATI_BASE_75 0x00 128 #define IQS626_CHx_ATI_BASE_100 0x40 129 #define IQS626_CHx_ATI_BASE_150 0x80 130 #define IQS626_CHx_ATI_BASE_200 0xC0 131 #define IQS626_CHx_ATI_TARGET_MASK GENMASK(5, 0) 132 #define IQS626_CHx_ATI_TARGET_MAX 2016 133 134 #define IQS626_CHx_THRESH_MAX 255 135 #define IQS626_CHx_HYST_DEEP_MASK GENMASK(7, 4) 136 #define IQS626_CHx_HYST_DEEP_SHIFT 4 137 #define IQS626_CHx_HYST_TOUCH_MASK GENMASK(3, 0) 138 #define IQS626_CHx_HYST_MAX 15 139 140 #define IQS626_FILT_STR_NP_TPx_MASK GENMASK(7, 6) 141 #define IQS626_FILT_STR_NP_TPx_SHIFT 6 142 #define IQS626_FILT_STR_LP_TPx_MASK GENMASK(5, 4) 143 #define IQS626_FILT_STR_LP_TPx_SHIFT 4 144 145 #define IQS626_FILT_STR_NP_CNT_MASK GENMASK(7, 6) 146 #define IQS626_FILT_STR_NP_CNT_SHIFT 6 147 #define IQS626_FILT_STR_LP_CNT_MASK GENMASK(5, 4) 148 #define IQS626_FILT_STR_LP_CNT_SHIFT 4 149 #define IQS626_FILT_STR_NP_LTA_MASK GENMASK(3, 2) 150 #define IQS626_FILT_STR_NP_LTA_SHIFT 2 151 #define IQS626_FILT_STR_LP_LTA_MASK GENMASK(1, 0) 152 #define IQS626_FILT_STR_MAX 3 153 154 #define IQS626_ULP_PROJ_ENABLE BIT(4) 155 #define IQS626_GEN_WEIGHT_MAX 255 156 157 #define IQS626_MAX_REG 0xFF 158 159 #define IQS626_NUM_CH_TP_3 9 160 #define IQS626_NUM_CH_TP_2 6 161 #define IQS626_NUM_CH_GEN 3 162 #define IQS626_NUM_CRx_TX 8 163 164 #define IQS626_PWR_MODE_POLL_SLEEP_US 50000 165 #define IQS626_PWR_MODE_POLL_TIMEOUT_US 500000 166 167 #define iqs626_irq_wait() usleep_range(350, 400) 168 169 enum iqs626_ch_id { 170 IQS626_CH_ULP_0, 171 IQS626_CH_TP_2, 172 IQS626_CH_TP_3, 173 IQS626_CH_GEN_0, 174 IQS626_CH_GEN_1, 175 IQS626_CH_GEN_2, 176 IQS626_CH_HALL, 177 }; 178 179 enum iqs626_rx_inactive { 180 IQS626_RX_INACTIVE_VSS, 181 IQS626_RX_INACTIVE_FLOAT, 182 IQS626_RX_INACTIVE_VREG, 183 }; 184 185 enum iqs626_st_offs { 186 IQS626_ST_OFFS_PROX, 187 IQS626_ST_OFFS_DIR, 188 IQS626_ST_OFFS_TOUCH, 189 IQS626_ST_OFFS_DEEP, 190 }; 191 192 enum iqs626_th_offs { 193 IQS626_TH_OFFS_PROX, 194 IQS626_TH_OFFS_TOUCH, 195 IQS626_TH_OFFS_DEEP, 196 }; 197 198 enum iqs626_event_id { 199 IQS626_EVENT_PROX_DN, 200 IQS626_EVENT_PROX_UP, 201 IQS626_EVENT_TOUCH_DN, 202 IQS626_EVENT_TOUCH_UP, 203 IQS626_EVENT_DEEP_DN, 204 IQS626_EVENT_DEEP_UP, 205 }; 206 207 enum iqs626_gesture_id { 208 IQS626_GESTURE_FLICK_X_POS, 209 IQS626_GESTURE_FLICK_X_NEG, 210 IQS626_GESTURE_FLICK_Y_POS, 211 IQS626_GESTURE_FLICK_Y_NEG, 212 IQS626_GESTURE_TAP, 213 IQS626_GESTURE_HOLD, 214 IQS626_NUM_GESTURES, 215 }; 216 217 struct iqs626_event_desc { 218 const char *name; 219 enum iqs626_st_offs st_offs; 220 enum iqs626_th_offs th_offs; 221 bool dir_up; 222 u8 mask; 223 }; 224 225 static const struct iqs626_event_desc iqs626_events[] = { 226 [IQS626_EVENT_PROX_DN] = { 227 .name = "event-prox", 228 .st_offs = IQS626_ST_OFFS_PROX, 229 .th_offs = IQS626_TH_OFFS_PROX, 230 .mask = IQS626_EVENT_MASK_PROX, 231 }, 232 [IQS626_EVENT_PROX_UP] = { 233 .name = "event-prox-alt", 234 .st_offs = IQS626_ST_OFFS_PROX, 235 .th_offs = IQS626_TH_OFFS_PROX, 236 .dir_up = true, 237 .mask = IQS626_EVENT_MASK_PROX, 238 }, 239 [IQS626_EVENT_TOUCH_DN] = { 240 .name = "event-touch", 241 .st_offs = IQS626_ST_OFFS_TOUCH, 242 .th_offs = IQS626_TH_OFFS_TOUCH, 243 .mask = IQS626_EVENT_MASK_TOUCH, 244 }, 245 [IQS626_EVENT_TOUCH_UP] = { 246 .name = "event-touch-alt", 247 .st_offs = IQS626_ST_OFFS_TOUCH, 248 .th_offs = IQS626_TH_OFFS_TOUCH, 249 .dir_up = true, 250 .mask = IQS626_EVENT_MASK_TOUCH, 251 }, 252 [IQS626_EVENT_DEEP_DN] = { 253 .name = "event-deep", 254 .st_offs = IQS626_ST_OFFS_DEEP, 255 .th_offs = IQS626_TH_OFFS_DEEP, 256 .mask = IQS626_EVENT_MASK_DEEP, 257 }, 258 [IQS626_EVENT_DEEP_UP] = { 259 .name = "event-deep-alt", 260 .st_offs = IQS626_ST_OFFS_DEEP, 261 .th_offs = IQS626_TH_OFFS_DEEP, 262 .dir_up = true, 263 .mask = IQS626_EVENT_MASK_DEEP, 264 }, 265 }; 266 267 struct iqs626_ver_info { 268 u8 prod_num; 269 u8 sw_num; 270 u8 hw_num; 271 u8 padding; 272 } __packed; 273 274 struct iqs626_flags { 275 __be16 system; 276 u8 gesture; 277 u8 padding_a; 278 u8 states[4]; 279 u8 ref_active; 280 u8 padding_b; 281 u8 comp_min; 282 u8 comp_max; 283 u8 trackpad_x; 284 u8 trackpad_y; 285 } __packed; 286 287 struct iqs626_ch_reg_ulp { 288 u8 thresh[2]; 289 u8 hyst; 290 u8 filter; 291 u8 engine[2]; 292 u8 ati_target; 293 u8 padding; 294 __be16 ati_comp; 295 u8 rx_enable; 296 u8 tx_enable; 297 } __packed; 298 299 struct iqs626_ch_reg_tp { 300 u8 thresh; 301 u8 ati_base; 302 __be16 ati_comp; 303 } __packed; 304 305 struct iqs626_tp_grp_reg { 306 u8 hyst; 307 u8 ati_target; 308 u8 engine[2]; 309 struct iqs626_ch_reg_tp ch_reg_tp[IQS626_NUM_CH_TP_3]; 310 } __packed; 311 312 struct iqs626_ch_reg_gen { 313 u8 thresh[3]; 314 u8 padding; 315 u8 hyst; 316 u8 ati_target; 317 __be16 ati_comp; 318 u8 engine[5]; 319 u8 filter; 320 u8 rx_enable; 321 u8 tx_enable; 322 u8 assoc_select; 323 u8 assoc_weight; 324 } __packed; 325 326 struct iqs626_ch_reg_hall { 327 u8 engine; 328 u8 thresh; 329 u8 hyst; 330 u8 ati_target; 331 __be16 ati_comp; 332 } __packed; 333 334 struct iqs626_sys_reg { 335 __be16 general; 336 u8 misc_a; 337 u8 event_mask; 338 u8 active; 339 u8 reseed; 340 u8 rate_np; 341 u8 rate_lp; 342 u8 rate_ulp; 343 u8 timeout_pwr; 344 u8 timeout_rdy; 345 u8 timeout_lta; 346 u8 misc_b; 347 u8 thresh_swipe; 348 u8 timeout_tap; 349 u8 timeout_swipe; 350 u8 redo_ati; 351 u8 padding; 352 struct iqs626_ch_reg_ulp ch_reg_ulp; 353 struct iqs626_tp_grp_reg tp_grp_reg; 354 struct iqs626_ch_reg_gen ch_reg_gen[IQS626_NUM_CH_GEN]; 355 struct iqs626_ch_reg_hall ch_reg_hall; 356 } __packed; 357 358 struct iqs626_channel_desc { 359 const char *name; 360 int num_ch; 361 u8 active; 362 bool events[ARRAY_SIZE(iqs626_events)]; 363 }; 364 365 static const struct iqs626_channel_desc iqs626_channels[] = { 366 [IQS626_CH_ULP_0] = { 367 .name = "ulp-0", 368 .num_ch = 1, 369 .active = BIT(0), 370 .events = { 371 [IQS626_EVENT_PROX_DN] = true, 372 [IQS626_EVENT_PROX_UP] = true, 373 [IQS626_EVENT_TOUCH_DN] = true, 374 [IQS626_EVENT_TOUCH_UP] = true, 375 }, 376 }, 377 [IQS626_CH_TP_2] = { 378 .name = "trackpad-3x2", 379 .num_ch = IQS626_NUM_CH_TP_2, 380 .active = BIT(1), 381 .events = { 382 [IQS626_EVENT_TOUCH_DN] = true, 383 }, 384 }, 385 [IQS626_CH_TP_3] = { 386 .name = "trackpad-3x3", 387 .num_ch = IQS626_NUM_CH_TP_3, 388 .active = BIT(2) | BIT(1), 389 .events = { 390 [IQS626_EVENT_TOUCH_DN] = true, 391 }, 392 }, 393 [IQS626_CH_GEN_0] = { 394 .name = "generic-0", 395 .num_ch = 1, 396 .active = BIT(4), 397 .events = { 398 [IQS626_EVENT_PROX_DN] = true, 399 [IQS626_EVENT_PROX_UP] = true, 400 [IQS626_EVENT_TOUCH_DN] = true, 401 [IQS626_EVENT_TOUCH_UP] = true, 402 [IQS626_EVENT_DEEP_DN] = true, 403 [IQS626_EVENT_DEEP_UP] = true, 404 }, 405 }, 406 [IQS626_CH_GEN_1] = { 407 .name = "generic-1", 408 .num_ch = 1, 409 .active = BIT(5), 410 .events = { 411 [IQS626_EVENT_PROX_DN] = true, 412 [IQS626_EVENT_PROX_UP] = true, 413 [IQS626_EVENT_TOUCH_DN] = true, 414 [IQS626_EVENT_TOUCH_UP] = true, 415 [IQS626_EVENT_DEEP_DN] = true, 416 [IQS626_EVENT_DEEP_UP] = true, 417 }, 418 }, 419 [IQS626_CH_GEN_2] = { 420 .name = "generic-2", 421 .num_ch = 1, 422 .active = BIT(6), 423 .events = { 424 [IQS626_EVENT_PROX_DN] = true, 425 [IQS626_EVENT_PROX_UP] = true, 426 [IQS626_EVENT_TOUCH_DN] = true, 427 [IQS626_EVENT_TOUCH_UP] = true, 428 [IQS626_EVENT_DEEP_DN] = true, 429 [IQS626_EVENT_DEEP_UP] = true, 430 }, 431 }, 432 [IQS626_CH_HALL] = { 433 .name = "hall", 434 .num_ch = 1, 435 .active = BIT(7), 436 .events = { 437 [IQS626_EVENT_TOUCH_DN] = true, 438 [IQS626_EVENT_TOUCH_UP] = true, 439 }, 440 }, 441 }; 442 443 struct iqs626_private { 444 struct i2c_client *client; 445 struct regmap *regmap; 446 struct iqs626_sys_reg sys_reg; 447 struct completion ati_done; 448 struct input_dev *keypad; 449 struct input_dev *trackpad; 450 struct touchscreen_properties prop; 451 unsigned int kp_type[ARRAY_SIZE(iqs626_channels)] 452 [ARRAY_SIZE(iqs626_events)]; 453 unsigned int kp_code[ARRAY_SIZE(iqs626_channels)] 454 [ARRAY_SIZE(iqs626_events)]; 455 unsigned int tp_code[IQS626_NUM_GESTURES]; 456 unsigned int suspend_mode; 457 }; 458 459 static noinline_for_stack int 460 iqs626_parse_events(struct iqs626_private *iqs626, 461 struct fwnode_handle *ch_node, enum iqs626_ch_id ch_id) 462 { 463 struct iqs626_sys_reg *sys_reg = &iqs626->sys_reg; 464 struct i2c_client *client = iqs626->client; 465 struct fwnode_handle *ev_node; 466 const char *ev_name; 467 u8 *thresh, *hyst; 468 unsigned int val; 469 int i; 470 471 switch (ch_id) { 472 case IQS626_CH_ULP_0: 473 thresh = sys_reg->ch_reg_ulp.thresh; 474 hyst = &sys_reg->ch_reg_ulp.hyst; 475 break; 476 477 case IQS626_CH_TP_2: 478 case IQS626_CH_TP_3: 479 thresh = &sys_reg->tp_grp_reg.ch_reg_tp[0].thresh; 480 hyst = &sys_reg->tp_grp_reg.hyst; 481 break; 482 483 case IQS626_CH_GEN_0: 484 case IQS626_CH_GEN_1: 485 case IQS626_CH_GEN_2: 486 i = ch_id - IQS626_CH_GEN_0; 487 thresh = sys_reg->ch_reg_gen[i].thresh; 488 hyst = &sys_reg->ch_reg_gen[i].hyst; 489 break; 490 491 case IQS626_CH_HALL: 492 thresh = &sys_reg->ch_reg_hall.thresh; 493 hyst = &sys_reg->ch_reg_hall.hyst; 494 break; 495 496 default: 497 return -EINVAL; 498 } 499 500 for (i = 0; i < ARRAY_SIZE(iqs626_events); i++) { 501 if (!iqs626_channels[ch_id].events[i]) 502 continue; 503 504 if (ch_id == IQS626_CH_TP_2 || ch_id == IQS626_CH_TP_3) { 505 /* 506 * Trackpad touch events are simply described under the 507 * trackpad child node. 508 */ 509 ev_node = fwnode_handle_get(ch_node); 510 } else { 511 ev_name = iqs626_events[i].name; 512 ev_node = fwnode_get_named_child_node(ch_node, ev_name); 513 if (!ev_node) 514 continue; 515 516 if (!fwnode_property_read_u32(ev_node, "linux,code", 517 &val)) { 518 iqs626->kp_code[ch_id][i] = val; 519 520 if (fwnode_property_read_u32(ev_node, 521 "linux,input-type", 522 &val)) { 523 if (ch_id == IQS626_CH_HALL) 524 val = EV_SW; 525 else 526 val = EV_KEY; 527 } 528 529 if (val != EV_KEY && val != EV_SW) { 530 dev_err(&client->dev, 531 "Invalid input type: %u\n", 532 val); 533 fwnode_handle_put(ev_node); 534 return -EINVAL; 535 } 536 537 iqs626->kp_type[ch_id][i] = val; 538 539 sys_reg->event_mask &= ~iqs626_events[i].mask; 540 } 541 } 542 543 if (!fwnode_property_read_u32(ev_node, "azoteq,hyst", &val)) { 544 if (val > IQS626_CHx_HYST_MAX) { 545 dev_err(&client->dev, 546 "Invalid %s channel hysteresis: %u\n", 547 fwnode_get_name(ch_node), val); 548 fwnode_handle_put(ev_node); 549 return -EINVAL; 550 } 551 552 if (i == IQS626_EVENT_DEEP_DN || 553 i == IQS626_EVENT_DEEP_UP) { 554 *hyst &= ~IQS626_CHx_HYST_DEEP_MASK; 555 *hyst |= (val << IQS626_CHx_HYST_DEEP_SHIFT); 556 } else if (i == IQS626_EVENT_TOUCH_DN || 557 i == IQS626_EVENT_TOUCH_UP) { 558 *hyst &= ~IQS626_CHx_HYST_TOUCH_MASK; 559 *hyst |= val; 560 } 561 } 562 563 if (ch_id != IQS626_CH_TP_2 && ch_id != IQS626_CH_TP_3 && 564 !fwnode_property_read_u32(ev_node, "azoteq,thresh", &val)) { 565 if (val > IQS626_CHx_THRESH_MAX) { 566 dev_err(&client->dev, 567 "Invalid %s channel threshold: %u\n", 568 fwnode_get_name(ch_node), val); 569 fwnode_handle_put(ev_node); 570 return -EINVAL; 571 } 572 573 if (ch_id == IQS626_CH_HALL) 574 *thresh = val; 575 else 576 *(thresh + iqs626_events[i].th_offs) = val; 577 } 578 579 fwnode_handle_put(ev_node); 580 } 581 582 return 0; 583 } 584 585 static noinline_for_stack int 586 iqs626_parse_ati_target(struct iqs626_private *iqs626, 587 struct fwnode_handle *ch_node, enum iqs626_ch_id ch_id) 588 { 589 struct iqs626_sys_reg *sys_reg = &iqs626->sys_reg; 590 struct i2c_client *client = iqs626->client; 591 unsigned int val; 592 u8 *ati_target; 593 int i; 594 595 switch (ch_id) { 596 case IQS626_CH_ULP_0: 597 ati_target = &sys_reg->ch_reg_ulp.ati_target; 598 break; 599 600 case IQS626_CH_TP_2: 601 case IQS626_CH_TP_3: 602 ati_target = &sys_reg->tp_grp_reg.ati_target; 603 break; 604 605 case IQS626_CH_GEN_0: 606 case IQS626_CH_GEN_1: 607 case IQS626_CH_GEN_2: 608 i = ch_id - IQS626_CH_GEN_0; 609 ati_target = &sys_reg->ch_reg_gen[i].ati_target; 610 break; 611 612 case IQS626_CH_HALL: 613 ati_target = &sys_reg->ch_reg_hall.ati_target; 614 break; 615 616 default: 617 return -EINVAL; 618 } 619 620 if (!fwnode_property_read_u32(ch_node, "azoteq,ati-target", &val)) { 621 if (val > IQS626_CHx_ATI_TARGET_MAX) { 622 dev_err(&client->dev, 623 "Invalid %s channel ATI target: %u\n", 624 fwnode_get_name(ch_node), val); 625 return -EINVAL; 626 } 627 628 *ati_target &= ~IQS626_CHx_ATI_TARGET_MASK; 629 *ati_target |= (val / 32); 630 } 631 632 if (ch_id != IQS626_CH_TP_2 && ch_id != IQS626_CH_TP_3 && 633 !fwnode_property_read_u32(ch_node, "azoteq,ati-base", &val)) { 634 switch (val) { 635 case 75: 636 val = IQS626_CHx_ATI_BASE_75; 637 break; 638 639 case 100: 640 val = IQS626_CHx_ATI_BASE_100; 641 break; 642 643 case 150: 644 val = IQS626_CHx_ATI_BASE_150; 645 break; 646 647 case 200: 648 val = IQS626_CHx_ATI_BASE_200; 649 break; 650 651 default: 652 dev_err(&client->dev, 653 "Invalid %s channel ATI base: %u\n", 654 fwnode_get_name(ch_node), val); 655 return -EINVAL; 656 } 657 658 *ati_target &= ~IQS626_CHx_ATI_BASE_MASK; 659 *ati_target |= val; 660 } 661 662 return 0; 663 } 664 665 static int iqs626_parse_pins(struct iqs626_private *iqs626, 666 struct fwnode_handle *ch_node, 667 const char *propname, u8 *enable) 668 { 669 struct i2c_client *client = iqs626->client; 670 unsigned int val[IQS626_NUM_CRx_TX]; 671 int error, count, i; 672 673 if (!fwnode_property_present(ch_node, propname)) 674 return 0; 675 676 count = fwnode_property_count_u32(ch_node, propname); 677 if (count > IQS626_NUM_CRx_TX) { 678 dev_err(&client->dev, 679 "Too many %s channel CRX/TX pins present\n", 680 fwnode_get_name(ch_node)); 681 return -EINVAL; 682 } else if (count < 0) { 683 dev_err(&client->dev, 684 "Failed to count %s channel CRX/TX pins: %d\n", 685 fwnode_get_name(ch_node), count); 686 return count; 687 } 688 689 error = fwnode_property_read_u32_array(ch_node, propname, val, count); 690 if (error) { 691 dev_err(&client->dev, 692 "Failed to read %s channel CRX/TX pins: %d\n", 693 fwnode_get_name(ch_node), error); 694 return error; 695 } 696 697 *enable = 0; 698 699 for (i = 0; i < count; i++) { 700 if (val[i] >= IQS626_NUM_CRx_TX) { 701 dev_err(&client->dev, 702 "Invalid %s channel CRX/TX pin: %u\n", 703 fwnode_get_name(ch_node), val[i]); 704 return -EINVAL; 705 } 706 707 *enable |= BIT(val[i]); 708 } 709 710 return 0; 711 } 712 713 static int iqs626_parse_trackpad(struct iqs626_private *iqs626, 714 struct fwnode_handle *ch_node, 715 enum iqs626_ch_id ch_id) 716 { 717 struct iqs626_sys_reg *sys_reg = &iqs626->sys_reg; 718 struct i2c_client *client = iqs626->client; 719 u8 *hyst = &sys_reg->tp_grp_reg.hyst; 720 int error, count, i; 721 unsigned int val; 722 723 if (!fwnode_property_read_u32(ch_node, "azoteq,lta-update", &val)) { 724 if (val > IQS626_MISC_A_TPx_LTA_UPDATE_MAX) { 725 dev_err(&client->dev, 726 "Invalid %s channel update rate: %u\n", 727 fwnode_get_name(ch_node), val); 728 return -EINVAL; 729 } 730 731 sys_reg->misc_a &= ~IQS626_MISC_A_TPx_LTA_UPDATE_MASK; 732 sys_reg->misc_a |= (val << IQS626_MISC_A_TPx_LTA_UPDATE_SHIFT); 733 } 734 735 if (!fwnode_property_read_u32(ch_node, "azoteq,filt-str-trackpad", 736 &val)) { 737 if (val > IQS626_FILT_STR_MAX) { 738 dev_err(&client->dev, 739 "Invalid %s channel filter strength: %u\n", 740 fwnode_get_name(ch_node), val); 741 return -EINVAL; 742 } 743 744 sys_reg->misc_b &= ~IQS626_MISC_B_FILT_STR_TPx; 745 sys_reg->misc_b |= val; 746 } 747 748 if (!fwnode_property_read_u32(ch_node, "azoteq,filt-str-np-cnt", 749 &val)) { 750 if (val > IQS626_FILT_STR_MAX) { 751 dev_err(&client->dev, 752 "Invalid %s channel filter strength: %u\n", 753 fwnode_get_name(ch_node), val); 754 return -EINVAL; 755 } 756 757 *hyst &= ~IQS626_FILT_STR_NP_TPx_MASK; 758 *hyst |= (val << IQS626_FILT_STR_NP_TPx_SHIFT); 759 } 760 761 if (!fwnode_property_read_u32(ch_node, "azoteq,filt-str-lp-cnt", 762 &val)) { 763 if (val > IQS626_FILT_STR_MAX) { 764 dev_err(&client->dev, 765 "Invalid %s channel filter strength: %u\n", 766 fwnode_get_name(ch_node), val); 767 return -EINVAL; 768 } 769 770 *hyst &= ~IQS626_FILT_STR_LP_TPx_MASK; 771 *hyst |= (val << IQS626_FILT_STR_LP_TPx_SHIFT); 772 } 773 774 for (i = 0; i < iqs626_channels[ch_id].num_ch; i++) { 775 u8 *ati_base = &sys_reg->tp_grp_reg.ch_reg_tp[i].ati_base; 776 u8 *thresh = &sys_reg->tp_grp_reg.ch_reg_tp[i].thresh; 777 struct fwnode_handle *tc_node; 778 char tc_name[10]; 779 780 snprintf(tc_name, sizeof(tc_name), "channel-%d", i); 781 782 tc_node = fwnode_get_named_child_node(ch_node, tc_name); 783 if (!tc_node) 784 continue; 785 786 if (!fwnode_property_read_u32(tc_node, "azoteq,ati-base", 787 &val)) { 788 if (val < IQS626_TPx_ATI_BASE_MIN || 789 val > IQS626_TPx_ATI_BASE_MAX) { 790 dev_err(&client->dev, 791 "Invalid %s %s ATI base: %u\n", 792 fwnode_get_name(ch_node), tc_name, val); 793 fwnode_handle_put(tc_node); 794 return -EINVAL; 795 } 796 797 *ati_base = val - IQS626_TPx_ATI_BASE_MIN; 798 } 799 800 if (!fwnode_property_read_u32(tc_node, "azoteq,thresh", 801 &val)) { 802 if (val > IQS626_CHx_THRESH_MAX) { 803 dev_err(&client->dev, 804 "Invalid %s %s threshold: %u\n", 805 fwnode_get_name(ch_node), tc_name, val); 806 fwnode_handle_put(tc_node); 807 return -EINVAL; 808 } 809 810 *thresh = val; 811 } 812 813 fwnode_handle_put(tc_node); 814 } 815 816 if (!fwnode_property_present(ch_node, "linux,keycodes")) 817 return 0; 818 819 count = fwnode_property_count_u32(ch_node, "linux,keycodes"); 820 if (count > IQS626_NUM_GESTURES) { 821 dev_err(&client->dev, "Too many keycodes present\n"); 822 return -EINVAL; 823 } else if (count < 0) { 824 dev_err(&client->dev, "Failed to count keycodes: %d\n", count); 825 return count; 826 } 827 828 error = fwnode_property_read_u32_array(ch_node, "linux,keycodes", 829 iqs626->tp_code, count); 830 if (error) { 831 dev_err(&client->dev, "Failed to read keycodes: %d\n", error); 832 return error; 833 } 834 835 sys_reg->misc_b &= ~IQS626_MISC_B_TPx_SWIPE; 836 if (fwnode_property_present(ch_node, "azoteq,gesture-swipe")) 837 sys_reg->misc_b |= IQS626_MISC_B_TPx_SWIPE; 838 839 if (!fwnode_property_read_u32(ch_node, "azoteq,timeout-tap-ms", 840 &val)) { 841 if (val > IQS626_TIMEOUT_TAP_MS_MAX) { 842 dev_err(&client->dev, 843 "Invalid %s channel timeout: %u\n", 844 fwnode_get_name(ch_node), val); 845 return -EINVAL; 846 } 847 848 sys_reg->timeout_tap = val / 16; 849 } 850 851 if (!fwnode_property_read_u32(ch_node, "azoteq,timeout-swipe-ms", 852 &val)) { 853 if (val > IQS626_TIMEOUT_SWIPE_MS_MAX) { 854 dev_err(&client->dev, 855 "Invalid %s channel timeout: %u\n", 856 fwnode_get_name(ch_node), val); 857 return -EINVAL; 858 } 859 860 sys_reg->timeout_swipe = val / 16; 861 } 862 863 if (!fwnode_property_read_u32(ch_node, "azoteq,thresh-swipe", 864 &val)) { 865 if (val > IQS626_THRESH_SWIPE_MAX) { 866 dev_err(&client->dev, 867 "Invalid %s channel threshold: %u\n", 868 fwnode_get_name(ch_node), val); 869 return -EINVAL; 870 } 871 872 sys_reg->thresh_swipe = val; 873 } 874 875 sys_reg->event_mask &= ~IQS626_EVENT_MASK_GESTURE; 876 877 return 0; 878 } 879 880 static noinline_for_stack int 881 iqs626_parse_channel(struct iqs626_private *iqs626, 882 struct fwnode_handle *ch_node, enum iqs626_ch_id ch_id) 883 { 884 struct iqs626_sys_reg *sys_reg = &iqs626->sys_reg; 885 struct i2c_client *client = iqs626->client; 886 u8 *engine, *filter, *rx_enable, *tx_enable; 887 u8 *assoc_select, *assoc_weight; 888 unsigned int val; 889 int error, i; 890 891 switch (ch_id) { 892 case IQS626_CH_ULP_0: 893 engine = sys_reg->ch_reg_ulp.engine; 894 break; 895 896 case IQS626_CH_TP_2: 897 case IQS626_CH_TP_3: 898 engine = sys_reg->tp_grp_reg.engine; 899 break; 900 901 case IQS626_CH_GEN_0: 902 case IQS626_CH_GEN_1: 903 case IQS626_CH_GEN_2: 904 i = ch_id - IQS626_CH_GEN_0; 905 engine = sys_reg->ch_reg_gen[i].engine; 906 break; 907 908 case IQS626_CH_HALL: 909 engine = &sys_reg->ch_reg_hall.engine; 910 break; 911 912 default: 913 return -EINVAL; 914 } 915 916 error = iqs626_parse_ati_target(iqs626, ch_node, ch_id); 917 if (error) 918 return error; 919 920 error = iqs626_parse_events(iqs626, ch_node, ch_id); 921 if (error) 922 return error; 923 924 if (!fwnode_property_present(ch_node, "azoteq,ati-exclude")) 925 sys_reg->redo_ati |= iqs626_channels[ch_id].active; 926 927 if (!fwnode_property_present(ch_node, "azoteq,reseed-disable")) 928 sys_reg->reseed |= iqs626_channels[ch_id].active; 929 930 *engine |= IQS626_CHx_ENG_0_MEAS_CAP_SIZE; 931 if (fwnode_property_present(ch_node, "azoteq,meas-cap-decrease")) 932 *engine &= ~IQS626_CHx_ENG_0_MEAS_CAP_SIZE; 933 934 *engine |= IQS626_CHx_ENG_0_RX_TERM_VSS; 935 if (!fwnode_property_read_u32(ch_node, "azoteq,rx-inactive", &val)) { 936 switch (val) { 937 case IQS626_RX_INACTIVE_VSS: 938 break; 939 940 case IQS626_RX_INACTIVE_FLOAT: 941 *engine &= ~IQS626_CHx_ENG_0_RX_TERM_VSS; 942 if (ch_id == IQS626_CH_GEN_0 || 943 ch_id == IQS626_CH_GEN_1 || 944 ch_id == IQS626_CH_GEN_2) 945 *(engine + 4) &= ~IQS626_CHx_ENG_4_RX_TERM_VREG; 946 break; 947 948 case IQS626_RX_INACTIVE_VREG: 949 if (ch_id == IQS626_CH_GEN_0 || 950 ch_id == IQS626_CH_GEN_1 || 951 ch_id == IQS626_CH_GEN_2) { 952 *engine &= ~IQS626_CHx_ENG_0_RX_TERM_VSS; 953 *(engine + 4) |= IQS626_CHx_ENG_4_RX_TERM_VREG; 954 break; 955 } 956 fallthrough; 957 958 default: 959 dev_err(&client->dev, 960 "Invalid %s channel CRX pin termination: %u\n", 961 fwnode_get_name(ch_node), val); 962 return -EINVAL; 963 } 964 } 965 966 *engine &= ~IQS626_CHx_ENG_0_LINEARIZE; 967 if (fwnode_property_present(ch_node, "azoteq,linearize")) 968 *engine |= IQS626_CHx_ENG_0_LINEARIZE; 969 970 *engine &= ~IQS626_CHx_ENG_0_DUAL_DIR; 971 if (fwnode_property_present(ch_node, "azoteq,dual-direction")) 972 *engine |= IQS626_CHx_ENG_0_DUAL_DIR; 973 974 *engine &= ~IQS626_CHx_ENG_0_FILT_DISABLE; 975 if (fwnode_property_present(ch_node, "azoteq,filt-disable")) 976 *engine |= IQS626_CHx_ENG_0_FILT_DISABLE; 977 978 if (!fwnode_property_read_u32(ch_node, "azoteq,ati-mode", &val)) { 979 if (val > IQS626_CHx_ENG_0_ATI_MODE_MAX) { 980 dev_err(&client->dev, 981 "Invalid %s channel ATI mode: %u\n", 982 fwnode_get_name(ch_node), val); 983 return -EINVAL; 984 } 985 986 *engine &= ~IQS626_CHx_ENG_0_ATI_MODE_MASK; 987 *engine |= val; 988 } 989 990 if (ch_id == IQS626_CH_HALL) 991 return 0; 992 993 *(engine + 1) &= ~IQS626_CHx_ENG_1_CCT_ENABLE; 994 if (!fwnode_property_read_u32(ch_node, "azoteq,cct-increase", 995 &val) && val) { 996 unsigned int orig_val = val--; 997 998 /* 999 * In the case of the generic channels, the charge cycle time 1000 * field doubles in size and straddles two separate registers. 1001 */ 1002 if (ch_id == IQS626_CH_GEN_0 || 1003 ch_id == IQS626_CH_GEN_1 || 1004 ch_id == IQS626_CH_GEN_2) { 1005 *(engine + 4) &= ~IQS626_CHx_ENG_4_CCT_LOW_1; 1006 if (val & BIT(1)) 1007 *(engine + 4) |= IQS626_CHx_ENG_4_CCT_LOW_1; 1008 1009 *(engine + 4) &= ~IQS626_CHx_ENG_4_CCT_LOW_0; 1010 if (val & BIT(0)) 1011 *(engine + 4) |= IQS626_CHx_ENG_4_CCT_LOW_0; 1012 1013 val >>= 2; 1014 } 1015 1016 if (val & ~GENMASK(1, 0)) { 1017 dev_err(&client->dev, 1018 "Invalid %s channel charge cycle time: %u\n", 1019 fwnode_get_name(ch_node), orig_val); 1020 return -EINVAL; 1021 } 1022 1023 *(engine + 1) &= ~IQS626_CHx_ENG_1_CCT_HIGH_1; 1024 if (val & BIT(1)) 1025 *(engine + 1) |= IQS626_CHx_ENG_1_CCT_HIGH_1; 1026 1027 *(engine + 1) &= ~IQS626_CHx_ENG_1_CCT_HIGH_0; 1028 if (val & BIT(0)) 1029 *(engine + 1) |= IQS626_CHx_ENG_1_CCT_HIGH_0; 1030 1031 *(engine + 1) |= IQS626_CHx_ENG_1_CCT_ENABLE; 1032 } 1033 1034 if (!fwnode_property_read_u32(ch_node, "azoteq,proj-bias", &val)) { 1035 if (val > IQS626_CHx_ENG_1_PROJ_BIAS_MAX) { 1036 dev_err(&client->dev, 1037 "Invalid %s channel bias current: %u\n", 1038 fwnode_get_name(ch_node), val); 1039 return -EINVAL; 1040 } 1041 1042 *(engine + 1) &= ~IQS626_CHx_ENG_1_PROJ_BIAS_MASK; 1043 *(engine + 1) |= (val << IQS626_CHx_ENG_1_PROJ_BIAS_SHIFT); 1044 } 1045 1046 if (!fwnode_property_read_u32(ch_node, "azoteq,sense-freq", &val)) { 1047 if (val > IQS626_CHx_ENG_1_SENSE_FREQ_MAX) { 1048 dev_err(&client->dev, 1049 "Invalid %s channel sensing frequency: %u\n", 1050 fwnode_get_name(ch_node), val); 1051 return -EINVAL; 1052 } 1053 1054 *(engine + 1) &= ~IQS626_CHx_ENG_1_SENSE_FREQ_MASK; 1055 *(engine + 1) |= (val << IQS626_CHx_ENG_1_SENSE_FREQ_SHIFT); 1056 } 1057 1058 *(engine + 1) &= ~IQS626_CHx_ENG_1_ATI_BAND_TIGHTEN; 1059 if (fwnode_property_present(ch_node, "azoteq,ati-band-tighten")) 1060 *(engine + 1) |= IQS626_CHx_ENG_1_ATI_BAND_TIGHTEN; 1061 1062 if (ch_id == IQS626_CH_TP_2 || ch_id == IQS626_CH_TP_3) 1063 return iqs626_parse_trackpad(iqs626, ch_node, ch_id); 1064 1065 if (ch_id == IQS626_CH_ULP_0) { 1066 sys_reg->ch_reg_ulp.hyst &= ~IQS626_ULP_PROJ_ENABLE; 1067 if (fwnode_property_present(ch_node, "azoteq,proj-enable")) 1068 sys_reg->ch_reg_ulp.hyst |= IQS626_ULP_PROJ_ENABLE; 1069 1070 filter = &sys_reg->ch_reg_ulp.filter; 1071 1072 rx_enable = &sys_reg->ch_reg_ulp.rx_enable; 1073 tx_enable = &sys_reg->ch_reg_ulp.tx_enable; 1074 } else { 1075 i = ch_id - IQS626_CH_GEN_0; 1076 filter = &sys_reg->ch_reg_gen[i].filter; 1077 1078 rx_enable = &sys_reg->ch_reg_gen[i].rx_enable; 1079 tx_enable = &sys_reg->ch_reg_gen[i].tx_enable; 1080 } 1081 1082 if (!fwnode_property_read_u32(ch_node, "azoteq,filt-str-np-cnt", 1083 &val)) { 1084 if (val > IQS626_FILT_STR_MAX) { 1085 dev_err(&client->dev, 1086 "Invalid %s channel filter strength: %u\n", 1087 fwnode_get_name(ch_node), val); 1088 return -EINVAL; 1089 } 1090 1091 *filter &= ~IQS626_FILT_STR_NP_CNT_MASK; 1092 *filter |= (val << IQS626_FILT_STR_NP_CNT_SHIFT); 1093 } 1094 1095 if (!fwnode_property_read_u32(ch_node, "azoteq,filt-str-lp-cnt", 1096 &val)) { 1097 if (val > IQS626_FILT_STR_MAX) { 1098 dev_err(&client->dev, 1099 "Invalid %s channel filter strength: %u\n", 1100 fwnode_get_name(ch_node), val); 1101 return -EINVAL; 1102 } 1103 1104 *filter &= ~IQS626_FILT_STR_LP_CNT_MASK; 1105 *filter |= (val << IQS626_FILT_STR_LP_CNT_SHIFT); 1106 } 1107 1108 if (!fwnode_property_read_u32(ch_node, "azoteq,filt-str-np-lta", 1109 &val)) { 1110 if (val > IQS626_FILT_STR_MAX) { 1111 dev_err(&client->dev, 1112 "Invalid %s channel filter strength: %u\n", 1113 fwnode_get_name(ch_node), val); 1114 return -EINVAL; 1115 } 1116 1117 *filter &= ~IQS626_FILT_STR_NP_LTA_MASK; 1118 *filter |= (val << IQS626_FILT_STR_NP_LTA_SHIFT); 1119 } 1120 1121 if (!fwnode_property_read_u32(ch_node, "azoteq,filt-str-lp-lta", 1122 &val)) { 1123 if (val > IQS626_FILT_STR_MAX) { 1124 dev_err(&client->dev, 1125 "Invalid %s channel filter strength: %u\n", 1126 fwnode_get_name(ch_node), val); 1127 return -EINVAL; 1128 } 1129 1130 *filter &= ~IQS626_FILT_STR_LP_LTA_MASK; 1131 *filter |= val; 1132 } 1133 1134 error = iqs626_parse_pins(iqs626, ch_node, "azoteq,rx-enable", 1135 rx_enable); 1136 if (error) 1137 return error; 1138 1139 error = iqs626_parse_pins(iqs626, ch_node, "azoteq,tx-enable", 1140 tx_enable); 1141 if (error) 1142 return error; 1143 1144 if (ch_id == IQS626_CH_ULP_0) 1145 return 0; 1146 1147 *(engine + 2) &= ~IQS626_CHx_ENG_2_LOCAL_CAP_ENABLE; 1148 if (!fwnode_property_read_u32(ch_node, "azoteq,local-cap-size", 1149 &val) && val) { 1150 unsigned int orig_val = val--; 1151 1152 if (val > IQS626_CHx_ENG_2_LOCAL_CAP_MAX) { 1153 dev_err(&client->dev, 1154 "Invalid %s channel local cap. size: %u\n", 1155 fwnode_get_name(ch_node), orig_val); 1156 return -EINVAL; 1157 } 1158 1159 *(engine + 2) &= ~IQS626_CHx_ENG_2_LOCAL_CAP_MASK; 1160 *(engine + 2) |= (val << IQS626_CHx_ENG_2_LOCAL_CAP_SHIFT); 1161 1162 *(engine + 2) |= IQS626_CHx_ENG_2_LOCAL_CAP_ENABLE; 1163 } 1164 1165 if (!fwnode_property_read_u32(ch_node, "azoteq,sense-mode", &val)) { 1166 if (val > IQS626_CHx_ENG_2_SENSE_MODE_MAX) { 1167 dev_err(&client->dev, 1168 "Invalid %s channel sensing mode: %u\n", 1169 fwnode_get_name(ch_node), val); 1170 return -EINVAL; 1171 } 1172 1173 *(engine + 2) &= ~IQS626_CHx_ENG_2_SENSE_MODE_MASK; 1174 *(engine + 2) |= val; 1175 } 1176 1177 if (!fwnode_property_read_u32(ch_node, "azoteq,tx-freq", &val)) { 1178 if (val > IQS626_CHx_ENG_3_TX_FREQ_MAX) { 1179 dev_err(&client->dev, 1180 "Invalid %s channel excitation frequency: %u\n", 1181 fwnode_get_name(ch_node), val); 1182 return -EINVAL; 1183 } 1184 1185 *(engine + 3) &= ~IQS626_CHx_ENG_3_TX_FREQ_MASK; 1186 *(engine + 3) |= (val << IQS626_CHx_ENG_3_TX_FREQ_SHIFT); 1187 } 1188 1189 *(engine + 3) &= ~IQS626_CHx_ENG_3_INV_LOGIC; 1190 if (fwnode_property_present(ch_node, "azoteq,invert-enable")) 1191 *(engine + 3) |= IQS626_CHx_ENG_3_INV_LOGIC; 1192 1193 *(engine + 4) &= ~IQS626_CHx_ENG_4_COMP_DISABLE; 1194 if (fwnode_property_present(ch_node, "azoteq,comp-disable")) 1195 *(engine + 4) |= IQS626_CHx_ENG_4_COMP_DISABLE; 1196 1197 *(engine + 4) &= ~IQS626_CHx_ENG_4_STATIC_ENABLE; 1198 if (fwnode_property_present(ch_node, "azoteq,static-enable")) 1199 *(engine + 4) |= IQS626_CHx_ENG_4_STATIC_ENABLE; 1200 1201 i = ch_id - IQS626_CH_GEN_0; 1202 assoc_select = &sys_reg->ch_reg_gen[i].assoc_select; 1203 assoc_weight = &sys_reg->ch_reg_gen[i].assoc_weight; 1204 1205 *assoc_select = 0; 1206 if (!fwnode_property_present(ch_node, "azoteq,assoc-select")) 1207 return 0; 1208 1209 for (i = 0; i < ARRAY_SIZE(iqs626_channels); i++) { 1210 if (fwnode_property_match_string(ch_node, "azoteq,assoc-select", 1211 iqs626_channels[i].name) < 0) 1212 continue; 1213 1214 *assoc_select |= iqs626_channels[i].active; 1215 } 1216 1217 if (fwnode_property_read_u32(ch_node, "azoteq,assoc-weight", &val)) 1218 return 0; 1219 1220 if (val > IQS626_GEN_WEIGHT_MAX) { 1221 dev_err(&client->dev, 1222 "Invalid %s channel associated weight: %u\n", 1223 fwnode_get_name(ch_node), val); 1224 return -EINVAL; 1225 } 1226 1227 *assoc_weight = val; 1228 1229 return 0; 1230 } 1231 1232 static int iqs626_parse_prop(struct iqs626_private *iqs626) 1233 { 1234 struct iqs626_sys_reg *sys_reg = &iqs626->sys_reg; 1235 struct i2c_client *client = iqs626->client; 1236 struct fwnode_handle *ch_node; 1237 unsigned int val; 1238 int error, i; 1239 u16 general; 1240 1241 if (!device_property_read_u32(&client->dev, "azoteq,suspend-mode", 1242 &val)) { 1243 if (val > IQS626_SYS_SETTINGS_PWR_MODE_MAX) { 1244 dev_err(&client->dev, "Invalid suspend mode: %u\n", 1245 val); 1246 return -EINVAL; 1247 } 1248 1249 iqs626->suspend_mode = val; 1250 } 1251 1252 error = regmap_raw_read(iqs626->regmap, IQS626_SYS_SETTINGS, sys_reg, 1253 sizeof(*sys_reg)); 1254 if (error) 1255 return error; 1256 1257 general = be16_to_cpu(sys_reg->general); 1258 general &= IQS626_SYS_SETTINGS_ULP_UPDATE_MASK; 1259 1260 if (device_property_present(&client->dev, "azoteq,clk-div")) 1261 general |= IQS626_SYS_SETTINGS_CLK_DIV; 1262 1263 if (device_property_present(&client->dev, "azoteq,ulp-enable")) 1264 general |= IQS626_SYS_SETTINGS_ULP_AUTO; 1265 1266 if (!device_property_read_u32(&client->dev, "azoteq,ulp-update", 1267 &val)) { 1268 if (val > IQS626_SYS_SETTINGS_ULP_UPDATE_MAX) { 1269 dev_err(&client->dev, "Invalid update rate: %u\n", val); 1270 return -EINVAL; 1271 } 1272 1273 general &= ~IQS626_SYS_SETTINGS_ULP_UPDATE_MASK; 1274 general |= (val << IQS626_SYS_SETTINGS_ULP_UPDATE_SHIFT); 1275 } 1276 1277 sys_reg->misc_a &= ~IQS626_MISC_A_ATI_BAND_DISABLE; 1278 if (device_property_present(&client->dev, "azoteq,ati-band-disable")) 1279 sys_reg->misc_a |= IQS626_MISC_A_ATI_BAND_DISABLE; 1280 1281 sys_reg->misc_a &= ~IQS626_MISC_A_ATI_LP_ONLY; 1282 if (device_property_present(&client->dev, "azoteq,ati-lp-only")) 1283 sys_reg->misc_a |= IQS626_MISC_A_ATI_LP_ONLY; 1284 1285 if (!device_property_read_u32(&client->dev, "azoteq,gpio3-select", 1286 &val)) { 1287 if (val > IQS626_MISC_A_GPIO3_SELECT_MAX) { 1288 dev_err(&client->dev, "Invalid GPIO3 selection: %u\n", 1289 val); 1290 return -EINVAL; 1291 } 1292 1293 sys_reg->misc_a &= ~IQS626_MISC_A_GPIO3_SELECT_MASK; 1294 sys_reg->misc_a |= val; 1295 } 1296 1297 if (!device_property_read_u32(&client->dev, "azoteq,reseed-select", 1298 &val)) { 1299 if (val > IQS626_MISC_B_RESEED_UI_SEL_MAX) { 1300 dev_err(&client->dev, "Invalid reseed selection: %u\n", 1301 val); 1302 return -EINVAL; 1303 } 1304 1305 sys_reg->misc_b &= ~IQS626_MISC_B_RESEED_UI_SEL_MASK; 1306 sys_reg->misc_b |= (val << IQS626_MISC_B_RESEED_UI_SEL_SHIFT); 1307 } 1308 1309 sys_reg->misc_b &= ~IQS626_MISC_B_THRESH_EXTEND; 1310 if (device_property_present(&client->dev, "azoteq,thresh-extend")) 1311 sys_reg->misc_b |= IQS626_MISC_B_THRESH_EXTEND; 1312 1313 sys_reg->misc_b &= ~IQS626_MISC_B_TRACKING_UI_ENABLE; 1314 if (device_property_present(&client->dev, "azoteq,tracking-enable")) 1315 sys_reg->misc_b |= IQS626_MISC_B_TRACKING_UI_ENABLE; 1316 1317 sys_reg->misc_b &= ~IQS626_MISC_B_RESEED_OFFSET; 1318 if (device_property_present(&client->dev, "azoteq,reseed-offset")) 1319 sys_reg->misc_b |= IQS626_MISC_B_RESEED_OFFSET; 1320 1321 if (!device_property_read_u32(&client->dev, "azoteq,rate-np-ms", 1322 &val)) { 1323 if (val > IQS626_RATE_NP_MS_MAX) { 1324 dev_err(&client->dev, "Invalid report rate: %u\n", val); 1325 return -EINVAL; 1326 } 1327 1328 sys_reg->rate_np = val; 1329 } 1330 1331 if (!device_property_read_u32(&client->dev, "azoteq,rate-lp-ms", 1332 &val)) { 1333 if (val > IQS626_RATE_LP_MS_MAX) { 1334 dev_err(&client->dev, "Invalid report rate: %u\n", val); 1335 return -EINVAL; 1336 } 1337 1338 sys_reg->rate_lp = val; 1339 } 1340 1341 if (!device_property_read_u32(&client->dev, "azoteq,rate-ulp-ms", 1342 &val)) { 1343 if (val > IQS626_RATE_ULP_MS_MAX) { 1344 dev_err(&client->dev, "Invalid report rate: %u\n", val); 1345 return -EINVAL; 1346 } 1347 1348 sys_reg->rate_ulp = val / 16; 1349 } 1350 1351 if (!device_property_read_u32(&client->dev, "azoteq,timeout-pwr-ms", 1352 &val)) { 1353 if (val > IQS626_TIMEOUT_PWR_MS_MAX) { 1354 dev_err(&client->dev, "Invalid timeout: %u\n", val); 1355 return -EINVAL; 1356 } 1357 1358 sys_reg->timeout_pwr = val / 512; 1359 } 1360 1361 if (!device_property_read_u32(&client->dev, "azoteq,timeout-lta-ms", 1362 &val)) { 1363 if (val > IQS626_TIMEOUT_LTA_MS_MAX) { 1364 dev_err(&client->dev, "Invalid timeout: %u\n", val); 1365 return -EINVAL; 1366 } 1367 1368 sys_reg->timeout_lta = val / 512; 1369 } 1370 1371 sys_reg->event_mask = ~((u8)IQS626_EVENT_MASK_SYS); 1372 sys_reg->redo_ati = 0; 1373 1374 sys_reg->reseed = 0; 1375 sys_reg->active = 0; 1376 1377 for (i = 0; i < ARRAY_SIZE(iqs626_channels); i++) { 1378 ch_node = device_get_named_child_node(&client->dev, 1379 iqs626_channels[i].name); 1380 if (!ch_node) 1381 continue; 1382 1383 error = iqs626_parse_channel(iqs626, ch_node, i); 1384 fwnode_handle_put(ch_node); 1385 if (error) 1386 return error; 1387 1388 sys_reg->active |= iqs626_channels[i].active; 1389 } 1390 1391 general |= IQS626_SYS_SETTINGS_EVENT_MODE; 1392 1393 /* 1394 * Enable streaming during normal-power mode if the trackpad is used to 1395 * report raw coordinates instead of gestures. In that case, the device 1396 * returns to event mode during low-power mode. 1397 */ 1398 if (sys_reg->active & iqs626_channels[IQS626_CH_TP_2].active && 1399 sys_reg->event_mask & IQS626_EVENT_MASK_GESTURE) 1400 general |= IQS626_SYS_SETTINGS_EVENT_MODE_LP; 1401 1402 general |= IQS626_SYS_SETTINGS_REDO_ATI; 1403 general |= IQS626_SYS_SETTINGS_ACK_RESET; 1404 1405 sys_reg->general = cpu_to_be16(general); 1406 1407 error = regmap_raw_write(iqs626->regmap, IQS626_SYS_SETTINGS, 1408 &iqs626->sys_reg, sizeof(iqs626->sys_reg)); 1409 if (error) 1410 return error; 1411 1412 iqs626_irq_wait(); 1413 1414 return 0; 1415 } 1416 1417 static int iqs626_input_init(struct iqs626_private *iqs626) 1418 { 1419 struct iqs626_sys_reg *sys_reg = &iqs626->sys_reg; 1420 struct i2c_client *client = iqs626->client; 1421 int error, i, j; 1422 1423 iqs626->keypad = devm_input_allocate_device(&client->dev); 1424 if (!iqs626->keypad) 1425 return -ENOMEM; 1426 1427 iqs626->keypad->keycodemax = ARRAY_SIZE(iqs626->kp_code); 1428 iqs626->keypad->keycode = iqs626->kp_code; 1429 iqs626->keypad->keycodesize = sizeof(**iqs626->kp_code); 1430 1431 iqs626->keypad->name = "iqs626a_keypad"; 1432 iqs626->keypad->id.bustype = BUS_I2C; 1433 1434 for (i = 0; i < ARRAY_SIZE(iqs626_channels); i++) { 1435 if (!(sys_reg->active & iqs626_channels[i].active)) 1436 continue; 1437 1438 for (j = 0; j < ARRAY_SIZE(iqs626_events); j++) { 1439 if (!iqs626->kp_type[i][j]) 1440 continue; 1441 1442 input_set_capability(iqs626->keypad, 1443 iqs626->kp_type[i][j], 1444 iqs626->kp_code[i][j]); 1445 } 1446 } 1447 1448 if (!(sys_reg->active & iqs626_channels[IQS626_CH_TP_2].active)) 1449 return 0; 1450 1451 iqs626->trackpad = devm_input_allocate_device(&client->dev); 1452 if (!iqs626->trackpad) 1453 return -ENOMEM; 1454 1455 iqs626->trackpad->keycodemax = ARRAY_SIZE(iqs626->tp_code); 1456 iqs626->trackpad->keycode = iqs626->tp_code; 1457 iqs626->trackpad->keycodesize = sizeof(*iqs626->tp_code); 1458 1459 iqs626->trackpad->name = "iqs626a_trackpad"; 1460 iqs626->trackpad->id.bustype = BUS_I2C; 1461 1462 /* 1463 * Present the trackpad as a traditional pointing device if no gestures 1464 * have been mapped to a keycode. 1465 */ 1466 if (sys_reg->event_mask & IQS626_EVENT_MASK_GESTURE) { 1467 u8 tp_mask = iqs626_channels[IQS626_CH_TP_3].active; 1468 1469 input_set_capability(iqs626->trackpad, EV_KEY, BTN_TOUCH); 1470 input_set_abs_params(iqs626->trackpad, ABS_Y, 0, 255, 0, 0); 1471 1472 if ((sys_reg->active & tp_mask) == tp_mask) 1473 input_set_abs_params(iqs626->trackpad, 1474 ABS_X, 0, 255, 0, 0); 1475 else 1476 input_set_abs_params(iqs626->trackpad, 1477 ABS_X, 0, 128, 0, 0); 1478 1479 touchscreen_parse_properties(iqs626->trackpad, false, 1480 &iqs626->prop); 1481 } else { 1482 for (i = 0; i < IQS626_NUM_GESTURES; i++) 1483 if (iqs626->tp_code[i] != KEY_RESERVED) 1484 input_set_capability(iqs626->trackpad, EV_KEY, 1485 iqs626->tp_code[i]); 1486 } 1487 1488 error = input_register_device(iqs626->trackpad); 1489 if (error) 1490 dev_err(&client->dev, "Failed to register trackpad: %d\n", 1491 error); 1492 1493 return error; 1494 } 1495 1496 static int iqs626_report(struct iqs626_private *iqs626) 1497 { 1498 struct iqs626_sys_reg *sys_reg = &iqs626->sys_reg; 1499 struct i2c_client *client = iqs626->client; 1500 struct iqs626_flags flags; 1501 __le16 hall_output; 1502 int error, i, j; 1503 u8 state; 1504 u8 *dir_mask = &flags.states[IQS626_ST_OFFS_DIR]; 1505 1506 error = regmap_raw_read(iqs626->regmap, IQS626_SYS_FLAGS, &flags, 1507 sizeof(flags)); 1508 if (error) { 1509 dev_err(&client->dev, "Failed to read device status: %d\n", 1510 error); 1511 return error; 1512 } 1513 1514 /* 1515 * The device resets itself if its own watchdog bites, which can happen 1516 * in the event of an I2C communication error. In this case, the device 1517 * asserts a SHOW_RESET interrupt and all registers must be restored. 1518 */ 1519 if (be16_to_cpu(flags.system) & IQS626_SYS_FLAGS_SHOW_RESET) { 1520 dev_err(&client->dev, "Unexpected device reset\n"); 1521 1522 error = regmap_raw_write(iqs626->regmap, IQS626_SYS_SETTINGS, 1523 sys_reg, sizeof(*sys_reg)); 1524 if (error) 1525 dev_err(&client->dev, 1526 "Failed to re-initialize device: %d\n", error); 1527 1528 return error; 1529 } 1530 1531 if (be16_to_cpu(flags.system) & IQS626_SYS_FLAGS_IN_ATI) 1532 return 0; 1533 1534 /* 1535 * Unlike the ULP or generic channels, the Hall channel does not have a 1536 * direction flag. Instead, the direction (i.e. magnet polarity) can be 1537 * derived based on the sign of the 2's complement differential output. 1538 */ 1539 if (sys_reg->active & iqs626_channels[IQS626_CH_HALL].active) { 1540 error = regmap_raw_read(iqs626->regmap, IQS626_HALL_OUTPUT, 1541 &hall_output, sizeof(hall_output)); 1542 if (error) { 1543 dev_err(&client->dev, 1544 "Failed to read Hall output: %d\n", error); 1545 return error; 1546 } 1547 1548 *dir_mask &= ~iqs626_channels[IQS626_CH_HALL].active; 1549 if (le16_to_cpu(hall_output) < 0x8000) 1550 *dir_mask |= iqs626_channels[IQS626_CH_HALL].active; 1551 } 1552 1553 for (i = 0; i < ARRAY_SIZE(iqs626_channels); i++) { 1554 if (!(sys_reg->active & iqs626_channels[i].active)) 1555 continue; 1556 1557 for (j = 0; j < ARRAY_SIZE(iqs626_events); j++) { 1558 if (!iqs626->kp_type[i][j]) 1559 continue; 1560 1561 state = flags.states[iqs626_events[j].st_offs]; 1562 state &= iqs626_events[j].dir_up ? *dir_mask 1563 : ~(*dir_mask); 1564 state &= iqs626_channels[i].active; 1565 1566 input_event(iqs626->keypad, iqs626->kp_type[i][j], 1567 iqs626->kp_code[i][j], !!state); 1568 } 1569 } 1570 1571 input_sync(iqs626->keypad); 1572 1573 /* 1574 * The following completion signals that ATI has finished, any initial 1575 * switch states have been reported and the keypad can be registered. 1576 */ 1577 complete_all(&iqs626->ati_done); 1578 1579 if (!(sys_reg->active & iqs626_channels[IQS626_CH_TP_2].active)) 1580 return 0; 1581 1582 if (sys_reg->event_mask & IQS626_EVENT_MASK_GESTURE) { 1583 state = flags.states[IQS626_ST_OFFS_TOUCH]; 1584 state &= iqs626_channels[IQS626_CH_TP_2].active; 1585 1586 input_report_key(iqs626->trackpad, BTN_TOUCH, state); 1587 1588 if (state) 1589 touchscreen_report_pos(iqs626->trackpad, &iqs626->prop, 1590 flags.trackpad_x, 1591 flags.trackpad_y, false); 1592 } else { 1593 for (i = 0; i < IQS626_NUM_GESTURES; i++) 1594 input_report_key(iqs626->trackpad, iqs626->tp_code[i], 1595 flags.gesture & BIT(i)); 1596 1597 if (flags.gesture & GENMASK(IQS626_GESTURE_TAP, 0)) { 1598 input_sync(iqs626->trackpad); 1599 1600 /* 1601 * Momentary gestures are followed by a complementary 1602 * release cycle so as to emulate a full keystroke. 1603 */ 1604 for (i = 0; i < IQS626_GESTURE_HOLD; i++) 1605 input_report_key(iqs626->trackpad, 1606 iqs626->tp_code[i], 0); 1607 } 1608 } 1609 1610 input_sync(iqs626->trackpad); 1611 1612 return 0; 1613 } 1614 1615 static irqreturn_t iqs626_irq(int irq, void *context) 1616 { 1617 struct iqs626_private *iqs626 = context; 1618 1619 if (iqs626_report(iqs626)) 1620 return IRQ_NONE; 1621 1622 /* 1623 * The device does not deassert its interrupt (RDY) pin until shortly 1624 * after receiving an I2C stop condition; the following delay ensures 1625 * the interrupt handler does not return before this time. 1626 */ 1627 iqs626_irq_wait(); 1628 1629 return IRQ_HANDLED; 1630 } 1631 1632 static const struct regmap_config iqs626_regmap_config = { 1633 .reg_bits = 8, 1634 .val_bits = 16, 1635 .max_register = IQS626_MAX_REG, 1636 }; 1637 1638 static int iqs626_probe(struct i2c_client *client) 1639 { 1640 struct iqs626_ver_info ver_info; 1641 struct iqs626_private *iqs626; 1642 int error; 1643 1644 iqs626 = devm_kzalloc(&client->dev, sizeof(*iqs626), GFP_KERNEL); 1645 if (!iqs626) 1646 return -ENOMEM; 1647 1648 i2c_set_clientdata(client, iqs626); 1649 iqs626->client = client; 1650 1651 iqs626->regmap = devm_regmap_init_i2c(client, &iqs626_regmap_config); 1652 if (IS_ERR(iqs626->regmap)) { 1653 error = PTR_ERR(iqs626->regmap); 1654 dev_err(&client->dev, "Failed to initialize register map: %d\n", 1655 error); 1656 return error; 1657 } 1658 1659 init_completion(&iqs626->ati_done); 1660 1661 error = regmap_raw_read(iqs626->regmap, IQS626_VER_INFO, &ver_info, 1662 sizeof(ver_info)); 1663 if (error) 1664 return error; 1665 1666 if (ver_info.prod_num != IQS626_VER_INFO_PROD_NUM) { 1667 dev_err(&client->dev, "Unrecognized product number: 0x%02X\n", 1668 ver_info.prod_num); 1669 return -EINVAL; 1670 } 1671 1672 error = iqs626_parse_prop(iqs626); 1673 if (error) 1674 return error; 1675 1676 error = iqs626_input_init(iqs626); 1677 if (error) 1678 return error; 1679 1680 error = devm_request_threaded_irq(&client->dev, client->irq, 1681 NULL, iqs626_irq, IRQF_ONESHOT, 1682 client->name, iqs626); 1683 if (error) { 1684 dev_err(&client->dev, "Failed to request IRQ: %d\n", error); 1685 return error; 1686 } 1687 1688 if (!wait_for_completion_timeout(&iqs626->ati_done, 1689 msecs_to_jiffies(2000))) { 1690 dev_err(&client->dev, "Failed to complete ATI\n"); 1691 return -ETIMEDOUT; 1692 } 1693 1694 /* 1695 * The keypad may include one or more switches and is not registered 1696 * until ATI is complete and the initial switch states are read. 1697 */ 1698 error = input_register_device(iqs626->keypad); 1699 if (error) 1700 dev_err(&client->dev, "Failed to register keypad: %d\n", error); 1701 1702 return error; 1703 } 1704 1705 static int iqs626_suspend(struct device *dev) 1706 { 1707 struct iqs626_private *iqs626 = dev_get_drvdata(dev); 1708 struct i2c_client *client = iqs626->client; 1709 unsigned int val; 1710 int error; 1711 1712 if (!iqs626->suspend_mode) 1713 return 0; 1714 1715 disable_irq(client->irq); 1716 1717 /* 1718 * Automatic power mode switching must be disabled before the device is 1719 * forced into any particular power mode. In this case, the device will 1720 * transition into normal-power mode. 1721 */ 1722 error = regmap_update_bits(iqs626->regmap, IQS626_SYS_SETTINGS, 1723 IQS626_SYS_SETTINGS_DIS_AUTO, ~0); 1724 if (error) 1725 goto err_irq; 1726 1727 /* 1728 * The following check ensures the device has completed its transition 1729 * into normal-power mode before a manual mode switch is performed. 1730 */ 1731 error = regmap_read_poll_timeout(iqs626->regmap, IQS626_SYS_FLAGS, val, 1732 !(val & IQS626_SYS_FLAGS_PWR_MODE_MASK), 1733 IQS626_PWR_MODE_POLL_SLEEP_US, 1734 IQS626_PWR_MODE_POLL_TIMEOUT_US); 1735 if (error) 1736 goto err_irq; 1737 1738 error = regmap_update_bits(iqs626->regmap, IQS626_SYS_SETTINGS, 1739 IQS626_SYS_SETTINGS_PWR_MODE_MASK, 1740 iqs626->suspend_mode << 1741 IQS626_SYS_SETTINGS_PWR_MODE_SHIFT); 1742 if (error) 1743 goto err_irq; 1744 1745 /* 1746 * This last check ensures the device has completed its transition into 1747 * the desired power mode to prevent any spurious interrupts from being 1748 * triggered after iqs626_suspend has already returned. 1749 */ 1750 error = regmap_read_poll_timeout(iqs626->regmap, IQS626_SYS_FLAGS, val, 1751 (val & IQS626_SYS_FLAGS_PWR_MODE_MASK) 1752 == (iqs626->suspend_mode << 1753 IQS626_SYS_FLAGS_PWR_MODE_SHIFT), 1754 IQS626_PWR_MODE_POLL_SLEEP_US, 1755 IQS626_PWR_MODE_POLL_TIMEOUT_US); 1756 1757 err_irq: 1758 iqs626_irq_wait(); 1759 enable_irq(client->irq); 1760 1761 return error; 1762 } 1763 1764 static int iqs626_resume(struct device *dev) 1765 { 1766 struct iqs626_private *iqs626 = dev_get_drvdata(dev); 1767 struct i2c_client *client = iqs626->client; 1768 unsigned int val; 1769 int error; 1770 1771 if (!iqs626->suspend_mode) 1772 return 0; 1773 1774 disable_irq(client->irq); 1775 1776 error = regmap_update_bits(iqs626->regmap, IQS626_SYS_SETTINGS, 1777 IQS626_SYS_SETTINGS_PWR_MODE_MASK, 0); 1778 if (error) 1779 goto err_irq; 1780 1781 /* 1782 * This check ensures the device has returned to normal-power mode 1783 * before automatic power mode switching is re-enabled. 1784 */ 1785 error = regmap_read_poll_timeout(iqs626->regmap, IQS626_SYS_FLAGS, val, 1786 !(val & IQS626_SYS_FLAGS_PWR_MODE_MASK), 1787 IQS626_PWR_MODE_POLL_SLEEP_US, 1788 IQS626_PWR_MODE_POLL_TIMEOUT_US); 1789 if (error) 1790 goto err_irq; 1791 1792 error = regmap_update_bits(iqs626->regmap, IQS626_SYS_SETTINGS, 1793 IQS626_SYS_SETTINGS_DIS_AUTO, 0); 1794 if (error) 1795 goto err_irq; 1796 1797 /* 1798 * This step reports any events that may have been "swallowed" as a 1799 * result of polling PWR_MODE (which automatically acknowledges any 1800 * pending interrupts). 1801 */ 1802 error = iqs626_report(iqs626); 1803 1804 err_irq: 1805 iqs626_irq_wait(); 1806 enable_irq(client->irq); 1807 1808 return error; 1809 } 1810 1811 static DEFINE_SIMPLE_DEV_PM_OPS(iqs626_pm, iqs626_suspend, iqs626_resume); 1812 1813 static const struct of_device_id iqs626_of_match[] = { 1814 { .compatible = "azoteq,iqs626a" }, 1815 { } 1816 }; 1817 MODULE_DEVICE_TABLE(of, iqs626_of_match); 1818 1819 static struct i2c_driver iqs626_i2c_driver = { 1820 .driver = { 1821 .name = "iqs626a", 1822 .of_match_table = iqs626_of_match, 1823 .pm = pm_sleep_ptr(&iqs626_pm), 1824 }, 1825 .probe = iqs626_probe, 1826 }; 1827 module_i2c_driver(iqs626_i2c_driver); 1828 1829 MODULE_AUTHOR("Jeff LaBundy <jeff@labundy.com>"); 1830 MODULE_DESCRIPTION("Azoteq IQS626A Capacitive Touch Controller"); 1831 MODULE_LICENSE("GPL"); 1832