1 /* 2 * HP i8042 SDC + MSM-58321 BBRTC driver. 3 * 4 * Copyright (c) 2001 Brian S. Julin 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions, and the following disclaimer, 12 * without modification. 13 * 2. The name of the author may not be used to endorse or promote products 14 * derived from this software without specific prior written permission. 15 * 16 * Alternatively, this software may be distributed under the terms of the 17 * GNU General Public License ("GPL"). 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * 29 * References: 30 * System Device Controller Microprocessor Firmware Theory of Operation 31 * for Part Number 1820-4784 Revision B. Dwg No. A-1820-4784-2 32 * efirtc.c by Stephane Eranian/Hewlett Packard 33 * 34 */ 35 36 #include <linux/hp_sdc.h> 37 #include <linux/errno.h> 38 #include <linux/types.h> 39 #include <linux/init.h> 40 #include <linux/module.h> 41 #include <linux/time.h> 42 #include <linux/miscdevice.h> 43 #include <linux/proc_fs.h> 44 #include <linux/seq_file.h> 45 #include <linux/poll.h> 46 #include <linux/rtc.h> 47 #include <linux/mutex.h> 48 #include <linux/semaphore.h> 49 50 MODULE_AUTHOR("Brian S. Julin <bri@calyx.com>"); 51 MODULE_DESCRIPTION("HP i8042 SDC + MSM-58321 RTC Driver"); 52 MODULE_LICENSE("Dual BSD/GPL"); 53 54 #define RTC_VERSION "1.10d" 55 56 static DEFINE_MUTEX(hp_sdc_rtc_mutex); 57 static unsigned long epoch = 2000; 58 59 static struct semaphore i8042tregs; 60 61 static hp_sdc_irqhook hp_sdc_rtc_isr; 62 63 static struct fasync_struct *hp_sdc_rtc_async_queue; 64 65 static DECLARE_WAIT_QUEUE_HEAD(hp_sdc_rtc_wait); 66 67 static ssize_t hp_sdc_rtc_read(struct file *file, char __user *buf, 68 size_t count, loff_t *ppos); 69 70 static long hp_sdc_rtc_unlocked_ioctl(struct file *file, 71 unsigned int cmd, unsigned long arg); 72 73 static unsigned int hp_sdc_rtc_poll(struct file *file, poll_table *wait); 74 75 static int hp_sdc_rtc_open(struct inode *inode, struct file *file); 76 static int hp_sdc_rtc_fasync (int fd, struct file *filp, int on); 77 78 static void hp_sdc_rtc_isr (int irq, void *dev_id, 79 uint8_t status, uint8_t data) 80 { 81 return; 82 } 83 84 static int hp_sdc_rtc_do_read_bbrtc (struct rtc_time *rtctm) 85 { 86 struct semaphore tsem; 87 hp_sdc_transaction t; 88 uint8_t tseq[91]; 89 int i; 90 91 i = 0; 92 while (i < 91) { 93 tseq[i++] = HP_SDC_ACT_DATAREG | 94 HP_SDC_ACT_POSTCMD | HP_SDC_ACT_DATAIN; 95 tseq[i++] = 0x01; /* write i8042[0x70] */ 96 tseq[i] = i / 7; /* BBRTC reg address */ 97 i++; 98 tseq[i++] = HP_SDC_CMD_DO_RTCR; /* Trigger command */ 99 tseq[i++] = 2; /* expect 1 stat/dat pair back. */ 100 i++; i++; /* buffer for stat/dat pair */ 101 } 102 tseq[84] |= HP_SDC_ACT_SEMAPHORE; 103 t.endidx = 91; 104 t.seq = tseq; 105 t.act.semaphore = &tsem; 106 sema_init(&tsem, 0); 107 108 if (hp_sdc_enqueue_transaction(&t)) return -1; 109 110 /* Put ourselves to sleep for results. */ 111 if (WARN_ON(down_interruptible(&tsem))) 112 return -1; 113 114 /* Check for nonpresence of BBRTC */ 115 if (!((tseq[83] | tseq[90] | tseq[69] | tseq[76] | 116 tseq[55] | tseq[62] | tseq[34] | tseq[41] | 117 tseq[20] | tseq[27] | tseq[6] | tseq[13]) & 0x0f)) 118 return -1; 119 120 memset(rtctm, 0, sizeof(struct rtc_time)); 121 rtctm->tm_year = (tseq[83] & 0x0f) + (tseq[90] & 0x0f) * 10; 122 rtctm->tm_mon = (tseq[69] & 0x0f) + (tseq[76] & 0x0f) * 10; 123 rtctm->tm_mday = (tseq[55] & 0x0f) + (tseq[62] & 0x0f) * 10; 124 rtctm->tm_wday = (tseq[48] & 0x0f); 125 rtctm->tm_hour = (tseq[34] & 0x0f) + (tseq[41] & 0x0f) * 10; 126 rtctm->tm_min = (tseq[20] & 0x0f) + (tseq[27] & 0x0f) * 10; 127 rtctm->tm_sec = (tseq[6] & 0x0f) + (tseq[13] & 0x0f) * 10; 128 129 return 0; 130 } 131 132 static int hp_sdc_rtc_read_bbrtc (struct rtc_time *rtctm) 133 { 134 struct rtc_time tm, tm_last; 135 int i = 0; 136 137 /* MSM-58321 has no read latch, so must read twice and compare. */ 138 139 if (hp_sdc_rtc_do_read_bbrtc(&tm_last)) return -1; 140 if (hp_sdc_rtc_do_read_bbrtc(&tm)) return -1; 141 142 while (memcmp(&tm, &tm_last, sizeof(struct rtc_time))) { 143 if (i++ > 4) return -1; 144 memcpy(&tm_last, &tm, sizeof(struct rtc_time)); 145 if (hp_sdc_rtc_do_read_bbrtc(&tm)) return -1; 146 } 147 148 memcpy(rtctm, &tm, sizeof(struct rtc_time)); 149 150 return 0; 151 } 152 153 154 static int64_t hp_sdc_rtc_read_i8042timer (uint8_t loadcmd, int numreg) 155 { 156 hp_sdc_transaction t; 157 uint8_t tseq[26] = { 158 HP_SDC_ACT_PRECMD | HP_SDC_ACT_POSTCMD | HP_SDC_ACT_DATAIN, 159 0, 160 HP_SDC_CMD_READ_T1, 2, 0, 0, 161 HP_SDC_ACT_POSTCMD | HP_SDC_ACT_DATAIN, 162 HP_SDC_CMD_READ_T2, 2, 0, 0, 163 HP_SDC_ACT_POSTCMD | HP_SDC_ACT_DATAIN, 164 HP_SDC_CMD_READ_T3, 2, 0, 0, 165 HP_SDC_ACT_POSTCMD | HP_SDC_ACT_DATAIN, 166 HP_SDC_CMD_READ_T4, 2, 0, 0, 167 HP_SDC_ACT_POSTCMD | HP_SDC_ACT_DATAIN, 168 HP_SDC_CMD_READ_T5, 2, 0, 0 169 }; 170 171 t.endidx = numreg * 5; 172 173 tseq[1] = loadcmd; 174 tseq[t.endidx - 4] |= HP_SDC_ACT_SEMAPHORE; /* numreg assumed > 1 */ 175 176 t.seq = tseq; 177 t.act.semaphore = &i8042tregs; 178 179 /* Sleep if output regs in use. */ 180 if (WARN_ON(down_interruptible(&i8042tregs))) 181 return -1; 182 183 if (hp_sdc_enqueue_transaction(&t)) return -1; 184 185 /* Sleep until results come back. */ 186 if (WARN_ON(down_interruptible(&i8042tregs))) 187 return -1; 188 189 up(&i8042tregs); 190 191 return (tseq[5] | 192 ((uint64_t)(tseq[10]) << 8) | ((uint64_t)(tseq[15]) << 16) | 193 ((uint64_t)(tseq[20]) << 24) | ((uint64_t)(tseq[25]) << 32)); 194 } 195 196 197 /* Read the i8042 real-time clock */ 198 static inline int hp_sdc_rtc_read_rt(struct timeval *res) { 199 int64_t raw; 200 uint32_t tenms; 201 unsigned int days; 202 203 raw = hp_sdc_rtc_read_i8042timer(HP_SDC_CMD_LOAD_RT, 5); 204 if (raw < 0) return -1; 205 206 tenms = (uint32_t)raw & 0xffffff; 207 days = (unsigned int)(raw >> 24) & 0xffff; 208 209 res->tv_usec = (suseconds_t)(tenms % 100) * 10000; 210 res->tv_sec = (time_t)(tenms / 100) + days * 86400; 211 212 return 0; 213 } 214 215 216 /* Read the i8042 fast handshake timer */ 217 static inline int hp_sdc_rtc_read_fhs(struct timeval *res) { 218 int64_t raw; 219 unsigned int tenms; 220 221 raw = hp_sdc_rtc_read_i8042timer(HP_SDC_CMD_LOAD_FHS, 2); 222 if (raw < 0) return -1; 223 224 tenms = (unsigned int)raw & 0xffff; 225 226 res->tv_usec = (suseconds_t)(tenms % 100) * 10000; 227 res->tv_sec = (time_t)(tenms / 100); 228 229 return 0; 230 } 231 232 233 /* Read the i8042 match timer (a.k.a. alarm) */ 234 static inline int hp_sdc_rtc_read_mt(struct timeval *res) { 235 int64_t raw; 236 uint32_t tenms; 237 238 raw = hp_sdc_rtc_read_i8042timer(HP_SDC_CMD_LOAD_MT, 3); 239 if (raw < 0) return -1; 240 241 tenms = (uint32_t)raw & 0xffffff; 242 243 res->tv_usec = (suseconds_t)(tenms % 100) * 10000; 244 res->tv_sec = (time_t)(tenms / 100); 245 246 return 0; 247 } 248 249 250 /* Read the i8042 delay timer */ 251 static inline int hp_sdc_rtc_read_dt(struct timeval *res) { 252 int64_t raw; 253 uint32_t tenms; 254 255 raw = hp_sdc_rtc_read_i8042timer(HP_SDC_CMD_LOAD_DT, 3); 256 if (raw < 0) return -1; 257 258 tenms = (uint32_t)raw & 0xffffff; 259 260 res->tv_usec = (suseconds_t)(tenms % 100) * 10000; 261 res->tv_sec = (time_t)(tenms / 100); 262 263 return 0; 264 } 265 266 267 /* Read the i8042 cycle timer (a.k.a. periodic) */ 268 static inline int hp_sdc_rtc_read_ct(struct timeval *res) { 269 int64_t raw; 270 uint32_t tenms; 271 272 raw = hp_sdc_rtc_read_i8042timer(HP_SDC_CMD_LOAD_CT, 3); 273 if (raw < 0) return -1; 274 275 tenms = (uint32_t)raw & 0xffffff; 276 277 res->tv_usec = (suseconds_t)(tenms % 100) * 10000; 278 res->tv_sec = (time_t)(tenms / 100); 279 280 return 0; 281 } 282 283 284 #if 0 /* not used yet */ 285 /* Set the i8042 real-time clock */ 286 static int hp_sdc_rtc_set_rt (struct timeval *setto) 287 { 288 uint32_t tenms; 289 unsigned int days; 290 hp_sdc_transaction t; 291 uint8_t tseq[11] = { 292 HP_SDC_ACT_PRECMD | HP_SDC_ACT_DATAOUT, 293 HP_SDC_CMD_SET_RTMS, 3, 0, 0, 0, 294 HP_SDC_ACT_PRECMD | HP_SDC_ACT_DATAOUT, 295 HP_SDC_CMD_SET_RTD, 2, 0, 0 296 }; 297 298 t.endidx = 10; 299 300 if (0xffff < setto->tv_sec / 86400) return -1; 301 days = setto->tv_sec / 86400; 302 if (0xffff < setto->tv_usec / 1000000 / 86400) return -1; 303 days += ((setto->tv_sec % 86400) + setto->tv_usec / 1000000) / 86400; 304 if (days > 0xffff) return -1; 305 306 if (0xffffff < setto->tv_sec) return -1; 307 tenms = setto->tv_sec * 100; 308 if (0xffffff < setto->tv_usec / 10000) return -1; 309 tenms += setto->tv_usec / 10000; 310 if (tenms > 0xffffff) return -1; 311 312 tseq[3] = (uint8_t)(tenms & 0xff); 313 tseq[4] = (uint8_t)((tenms >> 8) & 0xff); 314 tseq[5] = (uint8_t)((tenms >> 16) & 0xff); 315 316 tseq[9] = (uint8_t)(days & 0xff); 317 tseq[10] = (uint8_t)((days >> 8) & 0xff); 318 319 t.seq = tseq; 320 321 if (hp_sdc_enqueue_transaction(&t)) return -1; 322 return 0; 323 } 324 325 /* Set the i8042 fast handshake timer */ 326 static int hp_sdc_rtc_set_fhs (struct timeval *setto) 327 { 328 uint32_t tenms; 329 hp_sdc_transaction t; 330 uint8_t tseq[5] = { 331 HP_SDC_ACT_PRECMD | HP_SDC_ACT_DATAOUT, 332 HP_SDC_CMD_SET_FHS, 2, 0, 0 333 }; 334 335 t.endidx = 4; 336 337 if (0xffff < setto->tv_sec) return -1; 338 tenms = setto->tv_sec * 100; 339 if (0xffff < setto->tv_usec / 10000) return -1; 340 tenms += setto->tv_usec / 10000; 341 if (tenms > 0xffff) return -1; 342 343 tseq[3] = (uint8_t)(tenms & 0xff); 344 tseq[4] = (uint8_t)((tenms >> 8) & 0xff); 345 346 t.seq = tseq; 347 348 if (hp_sdc_enqueue_transaction(&t)) return -1; 349 return 0; 350 } 351 352 353 /* Set the i8042 match timer (a.k.a. alarm) */ 354 #define hp_sdc_rtc_set_mt (setto) \ 355 hp_sdc_rtc_set_i8042timer(setto, HP_SDC_CMD_SET_MT) 356 357 /* Set the i8042 delay timer */ 358 #define hp_sdc_rtc_set_dt (setto) \ 359 hp_sdc_rtc_set_i8042timer(setto, HP_SDC_CMD_SET_DT) 360 361 /* Set the i8042 cycle timer (a.k.a. periodic) */ 362 #define hp_sdc_rtc_set_ct (setto) \ 363 hp_sdc_rtc_set_i8042timer(setto, HP_SDC_CMD_SET_CT) 364 365 /* Set one of the i8042 3-byte wide timers */ 366 static int hp_sdc_rtc_set_i8042timer (struct timeval *setto, uint8_t setcmd) 367 { 368 uint32_t tenms; 369 hp_sdc_transaction t; 370 uint8_t tseq[6] = { 371 HP_SDC_ACT_PRECMD | HP_SDC_ACT_DATAOUT, 372 0, 3, 0, 0, 0 373 }; 374 375 t.endidx = 6; 376 377 if (0xffffff < setto->tv_sec) return -1; 378 tenms = setto->tv_sec * 100; 379 if (0xffffff < setto->tv_usec / 10000) return -1; 380 tenms += setto->tv_usec / 10000; 381 if (tenms > 0xffffff) return -1; 382 383 tseq[1] = setcmd; 384 tseq[3] = (uint8_t)(tenms & 0xff); 385 tseq[4] = (uint8_t)((tenms >> 8) & 0xff); 386 tseq[5] = (uint8_t)((tenms >> 16) & 0xff); 387 388 t.seq = tseq; 389 390 if (hp_sdc_enqueue_transaction(&t)) { 391 return -1; 392 } 393 return 0; 394 } 395 #endif 396 397 static ssize_t hp_sdc_rtc_read(struct file *file, char __user *buf, 398 size_t count, loff_t *ppos) { 399 ssize_t retval; 400 401 if (count < sizeof(unsigned long)) 402 return -EINVAL; 403 404 retval = put_user(68, (unsigned long __user *)buf); 405 return retval; 406 } 407 408 static unsigned int hp_sdc_rtc_poll(struct file *file, poll_table *wait) 409 { 410 unsigned long l; 411 412 l = 0; 413 if (l != 0) 414 return POLLIN | POLLRDNORM; 415 return 0; 416 } 417 418 static int hp_sdc_rtc_open(struct inode *inode, struct file *file) 419 { 420 return 0; 421 } 422 423 static int hp_sdc_rtc_fasync (int fd, struct file *filp, int on) 424 { 425 return fasync_helper (fd, filp, on, &hp_sdc_rtc_async_queue); 426 } 427 428 static int hp_sdc_rtc_proc_show(struct seq_file *m, void *v) 429 { 430 #define YN(bit) ("no") 431 #define NY(bit) ("yes") 432 struct rtc_time tm; 433 struct timeval tv; 434 435 memset(&tm, 0, sizeof(struct rtc_time)); 436 437 if (hp_sdc_rtc_read_bbrtc(&tm)) { 438 seq_puts(m, "BBRTC\t\t: READ FAILED!\n"); 439 } else { 440 seq_printf(m, 441 "rtc_time\t: %02d:%02d:%02d\n" 442 "rtc_date\t: %04d-%02d-%02d\n" 443 "rtc_epoch\t: %04lu\n", 444 tm.tm_hour, tm.tm_min, tm.tm_sec, 445 tm.tm_year + 1900, tm.tm_mon + 1, 446 tm.tm_mday, epoch); 447 } 448 449 if (hp_sdc_rtc_read_rt(&tv)) { 450 seq_puts(m, "i8042 rtc\t: READ FAILED!\n"); 451 } else { 452 seq_printf(m, "i8042 rtc\t: %ld.%02d seconds\n", 453 tv.tv_sec, (int)tv.tv_usec/1000); 454 } 455 456 if (hp_sdc_rtc_read_fhs(&tv)) { 457 seq_puts(m, "handshake\t: READ FAILED!\n"); 458 } else { 459 seq_printf(m, "handshake\t: %ld.%02d seconds\n", 460 tv.tv_sec, (int)tv.tv_usec/1000); 461 } 462 463 if (hp_sdc_rtc_read_mt(&tv)) { 464 seq_puts(m, "alarm\t\t: READ FAILED!\n"); 465 } else { 466 seq_printf(m, "alarm\t\t: %ld.%02d seconds\n", 467 tv.tv_sec, (int)tv.tv_usec/1000); 468 } 469 470 if (hp_sdc_rtc_read_dt(&tv)) { 471 seq_puts(m, "delay\t\t: READ FAILED!\n"); 472 } else { 473 seq_printf(m, "delay\t\t: %ld.%02d seconds\n", 474 tv.tv_sec, (int)tv.tv_usec/1000); 475 } 476 477 if (hp_sdc_rtc_read_ct(&tv)) { 478 seq_puts(m, "periodic\t: READ FAILED!\n"); 479 } else { 480 seq_printf(m, "periodic\t: %ld.%02d seconds\n", 481 tv.tv_sec, (int)tv.tv_usec/1000); 482 } 483 484 seq_printf(m, 485 "DST_enable\t: %s\n" 486 "BCD\t\t: %s\n" 487 "24hr\t\t: %s\n" 488 "square_wave\t: %s\n" 489 "alarm_IRQ\t: %s\n" 490 "update_IRQ\t: %s\n" 491 "periodic_IRQ\t: %s\n" 492 "periodic_freq\t: %ld\n" 493 "batt_status\t: %s\n", 494 YN(RTC_DST_EN), 495 NY(RTC_DM_BINARY), 496 YN(RTC_24H), 497 YN(RTC_SQWE), 498 YN(RTC_AIE), 499 YN(RTC_UIE), 500 YN(RTC_PIE), 501 1UL, 502 1 ? "okay" : "dead"); 503 504 return 0; 505 #undef YN 506 #undef NY 507 } 508 509 static int hp_sdc_rtc_proc_open(struct inode *inode, struct file *file) 510 { 511 return single_open(file, hp_sdc_rtc_proc_show, NULL); 512 } 513 514 static const struct file_operations hp_sdc_rtc_proc_fops = { 515 .open = hp_sdc_rtc_proc_open, 516 .read = seq_read, 517 .llseek = seq_lseek, 518 .release = single_release, 519 }; 520 521 static int hp_sdc_rtc_ioctl(struct file *file, 522 unsigned int cmd, unsigned long arg) 523 { 524 #if 1 525 return -EINVAL; 526 #else 527 528 struct rtc_time wtime; 529 struct timeval ttime; 530 int use_wtime = 0; 531 532 /* This needs major work. */ 533 534 switch (cmd) { 535 536 case RTC_AIE_OFF: /* Mask alarm int. enab. bit */ 537 case RTC_AIE_ON: /* Allow alarm interrupts. */ 538 case RTC_PIE_OFF: /* Mask periodic int. enab. bit */ 539 case RTC_PIE_ON: /* Allow periodic ints */ 540 case RTC_UIE_ON: /* Allow ints for RTC updates. */ 541 case RTC_UIE_OFF: /* Allow ints for RTC updates. */ 542 { 543 /* We cannot mask individual user timers and we 544 cannot tell them apart when they occur, so it 545 would be disingenuous to succeed these IOCTLs */ 546 return -EINVAL; 547 } 548 case RTC_ALM_READ: /* Read the present alarm time */ 549 { 550 if (hp_sdc_rtc_read_mt(&ttime)) return -EFAULT; 551 if (hp_sdc_rtc_read_bbrtc(&wtime)) return -EFAULT; 552 553 wtime.tm_hour = ttime.tv_sec / 3600; ttime.tv_sec %= 3600; 554 wtime.tm_min = ttime.tv_sec / 60; ttime.tv_sec %= 60; 555 wtime.tm_sec = ttime.tv_sec; 556 557 break; 558 } 559 case RTC_IRQP_READ: /* Read the periodic IRQ rate. */ 560 { 561 return put_user(hp_sdc_rtc_freq, (unsigned long *)arg); 562 } 563 case RTC_IRQP_SET: /* Set periodic IRQ rate. */ 564 { 565 /* 566 * The max we can do is 100Hz. 567 */ 568 569 if ((arg < 1) || (arg > 100)) return -EINVAL; 570 ttime.tv_sec = 0; 571 ttime.tv_usec = 1000000 / arg; 572 if (hp_sdc_rtc_set_ct(&ttime)) return -EFAULT; 573 hp_sdc_rtc_freq = arg; 574 return 0; 575 } 576 case RTC_ALM_SET: /* Store a time into the alarm */ 577 { 578 /* 579 * This expects a struct hp_sdc_rtc_time. Writing 0xff means 580 * "don't care" or "match all" for PC timers. The HP SDC 581 * does not support that perk, but it could be emulated fairly 582 * easily. Only the tm_hour, tm_min and tm_sec are used. 583 * We could do it with 10ms accuracy with the HP SDC, if the 584 * rtc interface left us a way to do that. 585 */ 586 struct hp_sdc_rtc_time alm_tm; 587 588 if (copy_from_user(&alm_tm, (struct hp_sdc_rtc_time*)arg, 589 sizeof(struct hp_sdc_rtc_time))) 590 return -EFAULT; 591 592 if (alm_tm.tm_hour > 23) return -EINVAL; 593 if (alm_tm.tm_min > 59) return -EINVAL; 594 if (alm_tm.tm_sec > 59) return -EINVAL; 595 596 ttime.sec = alm_tm.tm_hour * 3600 + 597 alm_tm.tm_min * 60 + alm_tm.tm_sec; 598 ttime.usec = 0; 599 if (hp_sdc_rtc_set_mt(&ttime)) return -EFAULT; 600 return 0; 601 } 602 case RTC_RD_TIME: /* Read the time/date from RTC */ 603 { 604 if (hp_sdc_rtc_read_bbrtc(&wtime)) return -EFAULT; 605 break; 606 } 607 case RTC_SET_TIME: /* Set the RTC */ 608 { 609 struct rtc_time hp_sdc_rtc_tm; 610 unsigned char mon, day, hrs, min, sec, leap_yr; 611 unsigned int yrs; 612 613 if (!capable(CAP_SYS_TIME)) 614 return -EACCES; 615 if (copy_from_user(&hp_sdc_rtc_tm, (struct rtc_time *)arg, 616 sizeof(struct rtc_time))) 617 return -EFAULT; 618 619 yrs = hp_sdc_rtc_tm.tm_year + 1900; 620 mon = hp_sdc_rtc_tm.tm_mon + 1; /* tm_mon starts at zero */ 621 day = hp_sdc_rtc_tm.tm_mday; 622 hrs = hp_sdc_rtc_tm.tm_hour; 623 min = hp_sdc_rtc_tm.tm_min; 624 sec = hp_sdc_rtc_tm.tm_sec; 625 626 if (yrs < 1970) 627 return -EINVAL; 628 629 leap_yr = ((!(yrs % 4) && (yrs % 100)) || !(yrs % 400)); 630 631 if ((mon > 12) || (day == 0)) 632 return -EINVAL; 633 if (day > (days_in_mo[mon] + ((mon == 2) && leap_yr))) 634 return -EINVAL; 635 if ((hrs >= 24) || (min >= 60) || (sec >= 60)) 636 return -EINVAL; 637 638 if ((yrs -= eH) > 255) /* They are unsigned */ 639 return -EINVAL; 640 641 642 return 0; 643 } 644 case RTC_EPOCH_READ: /* Read the epoch. */ 645 { 646 return put_user (epoch, (unsigned long *)arg); 647 } 648 case RTC_EPOCH_SET: /* Set the epoch. */ 649 { 650 /* 651 * There were no RTC clocks before 1900. 652 */ 653 if (arg < 1900) 654 return -EINVAL; 655 if (!capable(CAP_SYS_TIME)) 656 return -EACCES; 657 658 epoch = arg; 659 return 0; 660 } 661 default: 662 return -EINVAL; 663 } 664 return copy_to_user((void *)arg, &wtime, sizeof wtime) ? -EFAULT : 0; 665 #endif 666 } 667 668 static long hp_sdc_rtc_unlocked_ioctl(struct file *file, 669 unsigned int cmd, unsigned long arg) 670 { 671 int ret; 672 673 mutex_lock(&hp_sdc_rtc_mutex); 674 ret = hp_sdc_rtc_ioctl(file, cmd, arg); 675 mutex_unlock(&hp_sdc_rtc_mutex); 676 677 return ret; 678 } 679 680 681 static const struct file_operations hp_sdc_rtc_fops = { 682 .owner = THIS_MODULE, 683 .llseek = no_llseek, 684 .read = hp_sdc_rtc_read, 685 .poll = hp_sdc_rtc_poll, 686 .unlocked_ioctl = hp_sdc_rtc_unlocked_ioctl, 687 .open = hp_sdc_rtc_open, 688 .fasync = hp_sdc_rtc_fasync, 689 }; 690 691 static struct miscdevice hp_sdc_rtc_dev = { 692 .minor = RTC_MINOR, 693 .name = "rtc_HIL", 694 .fops = &hp_sdc_rtc_fops 695 }; 696 697 static int __init hp_sdc_rtc_init(void) 698 { 699 int ret; 700 701 #ifdef __mc68000__ 702 if (!MACH_IS_HP300) 703 return -ENODEV; 704 #endif 705 706 sema_init(&i8042tregs, 1); 707 708 if ((ret = hp_sdc_request_timer_irq(&hp_sdc_rtc_isr))) 709 return ret; 710 if (misc_register(&hp_sdc_rtc_dev) != 0) 711 printk(KERN_INFO "Could not register misc. dev for i8042 rtc\n"); 712 713 proc_create("driver/rtc", 0, NULL, &hp_sdc_rtc_proc_fops); 714 715 printk(KERN_INFO "HP i8042 SDC + MSM-58321 RTC support loaded " 716 "(RTC v " RTC_VERSION ")\n"); 717 718 return 0; 719 } 720 721 static void __exit hp_sdc_rtc_exit(void) 722 { 723 remove_proc_entry ("driver/rtc", NULL); 724 misc_deregister(&hp_sdc_rtc_dev); 725 hp_sdc_release_timer_irq(hp_sdc_rtc_isr); 726 printk(KERN_INFO "HP i8042 SDC + MSM-58321 RTC support unloaded\n"); 727 } 728 729 module_init(hp_sdc_rtc_init); 730 module_exit(hp_sdc_rtc_exit); 731