1 /* 2 * HP i8042 SDC + MSM-58321 BBRTC driver. 3 * 4 * Copyright (c) 2001 Brian S. Julin 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions, and the following disclaimer, 12 * without modification. 13 * 2. The name of the author may not be used to endorse or promote products 14 * derived from this software without specific prior written permission. 15 * 16 * Alternatively, this software may be distributed under the terms of the 17 * GNU General Public License ("GPL"). 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * 29 * References: 30 * System Device Controller Microprocessor Firmware Theory of Operation 31 * for Part Number 1820-4784 Revision B. Dwg No. A-1820-4784-2 32 * efirtc.c by Stephane Eranian/Hewlett Packard 33 * 34 */ 35 36 #include <linux/hp_sdc.h> 37 #include <linux/errno.h> 38 #include <linux/smp_lock.h> 39 #include <linux/types.h> 40 #include <linux/init.h> 41 #include <linux/module.h> 42 #include <linux/time.h> 43 #include <linux/miscdevice.h> 44 #include <linux/proc_fs.h> 45 #include <linux/poll.h> 46 #include <linux/rtc.h> 47 #include <linux/semaphore.h> 48 49 MODULE_AUTHOR("Brian S. Julin <bri@calyx.com>"); 50 MODULE_DESCRIPTION("HP i8042 SDC + MSM-58321 RTC Driver"); 51 MODULE_LICENSE("Dual BSD/GPL"); 52 53 #define RTC_VERSION "1.10d" 54 55 static unsigned long epoch = 2000; 56 57 static struct semaphore i8042tregs; 58 59 static hp_sdc_irqhook hp_sdc_rtc_isr; 60 61 static struct fasync_struct *hp_sdc_rtc_async_queue; 62 63 static DECLARE_WAIT_QUEUE_HEAD(hp_sdc_rtc_wait); 64 65 static ssize_t hp_sdc_rtc_read(struct file *file, char __user *buf, 66 size_t count, loff_t *ppos); 67 68 static int hp_sdc_rtc_ioctl(struct inode *inode, struct file *file, 69 unsigned int cmd, unsigned long arg); 70 71 static unsigned int hp_sdc_rtc_poll(struct file *file, poll_table *wait); 72 73 static int hp_sdc_rtc_open(struct inode *inode, struct file *file); 74 static int hp_sdc_rtc_release(struct inode *inode, struct file *file); 75 static int hp_sdc_rtc_fasync (int fd, struct file *filp, int on); 76 77 static int hp_sdc_rtc_read_proc(char *page, char **start, off_t off, 78 int count, int *eof, void *data); 79 80 static void hp_sdc_rtc_isr (int irq, void *dev_id, 81 uint8_t status, uint8_t data) 82 { 83 return; 84 } 85 86 static int hp_sdc_rtc_do_read_bbrtc (struct rtc_time *rtctm) 87 { 88 struct semaphore tsem; 89 hp_sdc_transaction t; 90 uint8_t tseq[91]; 91 int i; 92 93 i = 0; 94 while (i < 91) { 95 tseq[i++] = HP_SDC_ACT_DATAREG | 96 HP_SDC_ACT_POSTCMD | HP_SDC_ACT_DATAIN; 97 tseq[i++] = 0x01; /* write i8042[0x70] */ 98 tseq[i] = i / 7; /* BBRTC reg address */ 99 i++; 100 tseq[i++] = HP_SDC_CMD_DO_RTCR; /* Trigger command */ 101 tseq[i++] = 2; /* expect 1 stat/dat pair back. */ 102 i++; i++; /* buffer for stat/dat pair */ 103 } 104 tseq[84] |= HP_SDC_ACT_SEMAPHORE; 105 t.endidx = 91; 106 t.seq = tseq; 107 t.act.semaphore = &tsem; 108 init_MUTEX_LOCKED(&tsem); 109 110 if (hp_sdc_enqueue_transaction(&t)) return -1; 111 112 down_interruptible(&tsem); /* Put ourselves to sleep for results. */ 113 114 /* Check for nonpresence of BBRTC */ 115 if (!((tseq[83] | tseq[90] | tseq[69] | tseq[76] | 116 tseq[55] | tseq[62] | tseq[34] | tseq[41] | 117 tseq[20] | tseq[27] | tseq[6] | tseq[13]) & 0x0f)) 118 return -1; 119 120 memset(rtctm, 0, sizeof(struct rtc_time)); 121 rtctm->tm_year = (tseq[83] & 0x0f) + (tseq[90] & 0x0f) * 10; 122 rtctm->tm_mon = (tseq[69] & 0x0f) + (tseq[76] & 0x0f) * 10; 123 rtctm->tm_mday = (tseq[55] & 0x0f) + (tseq[62] & 0x0f) * 10; 124 rtctm->tm_wday = (tseq[48] & 0x0f); 125 rtctm->tm_hour = (tseq[34] & 0x0f) + (tseq[41] & 0x0f) * 10; 126 rtctm->tm_min = (tseq[20] & 0x0f) + (tseq[27] & 0x0f) * 10; 127 rtctm->tm_sec = (tseq[6] & 0x0f) + (tseq[13] & 0x0f) * 10; 128 129 return 0; 130 } 131 132 static int hp_sdc_rtc_read_bbrtc (struct rtc_time *rtctm) 133 { 134 struct rtc_time tm, tm_last; 135 int i = 0; 136 137 /* MSM-58321 has no read latch, so must read twice and compare. */ 138 139 if (hp_sdc_rtc_do_read_bbrtc(&tm_last)) return -1; 140 if (hp_sdc_rtc_do_read_bbrtc(&tm)) return -1; 141 142 while (memcmp(&tm, &tm_last, sizeof(struct rtc_time))) { 143 if (i++ > 4) return -1; 144 memcpy(&tm_last, &tm, sizeof(struct rtc_time)); 145 if (hp_sdc_rtc_do_read_bbrtc(&tm)) return -1; 146 } 147 148 memcpy(rtctm, &tm, sizeof(struct rtc_time)); 149 150 return 0; 151 } 152 153 154 static int64_t hp_sdc_rtc_read_i8042timer (uint8_t loadcmd, int numreg) 155 { 156 hp_sdc_transaction t; 157 uint8_t tseq[26] = { 158 HP_SDC_ACT_PRECMD | HP_SDC_ACT_POSTCMD | HP_SDC_ACT_DATAIN, 159 0, 160 HP_SDC_CMD_READ_T1, 2, 0, 0, 161 HP_SDC_ACT_POSTCMD | HP_SDC_ACT_DATAIN, 162 HP_SDC_CMD_READ_T2, 2, 0, 0, 163 HP_SDC_ACT_POSTCMD | HP_SDC_ACT_DATAIN, 164 HP_SDC_CMD_READ_T3, 2, 0, 0, 165 HP_SDC_ACT_POSTCMD | HP_SDC_ACT_DATAIN, 166 HP_SDC_CMD_READ_T4, 2, 0, 0, 167 HP_SDC_ACT_POSTCMD | HP_SDC_ACT_DATAIN, 168 HP_SDC_CMD_READ_T5, 2, 0, 0 169 }; 170 171 t.endidx = numreg * 5; 172 173 tseq[1] = loadcmd; 174 tseq[t.endidx - 4] |= HP_SDC_ACT_SEMAPHORE; /* numreg assumed > 1 */ 175 176 t.seq = tseq; 177 t.act.semaphore = &i8042tregs; 178 179 down_interruptible(&i8042tregs); /* Sleep if output regs in use. */ 180 181 if (hp_sdc_enqueue_transaction(&t)) return -1; 182 183 down_interruptible(&i8042tregs); /* Sleep until results come back. */ 184 up(&i8042tregs); 185 186 return (tseq[5] | 187 ((uint64_t)(tseq[10]) << 8) | ((uint64_t)(tseq[15]) << 16) | 188 ((uint64_t)(tseq[20]) << 24) | ((uint64_t)(tseq[25]) << 32)); 189 } 190 191 192 /* Read the i8042 real-time clock */ 193 static inline int hp_sdc_rtc_read_rt(struct timeval *res) { 194 int64_t raw; 195 uint32_t tenms; 196 unsigned int days; 197 198 raw = hp_sdc_rtc_read_i8042timer(HP_SDC_CMD_LOAD_RT, 5); 199 if (raw < 0) return -1; 200 201 tenms = (uint32_t)raw & 0xffffff; 202 days = (unsigned int)(raw >> 24) & 0xffff; 203 204 res->tv_usec = (suseconds_t)(tenms % 100) * 10000; 205 res->tv_sec = (time_t)(tenms / 100) + days * 86400; 206 207 return 0; 208 } 209 210 211 /* Read the i8042 fast handshake timer */ 212 static inline int hp_sdc_rtc_read_fhs(struct timeval *res) { 213 uint64_t raw; 214 unsigned int tenms; 215 216 raw = hp_sdc_rtc_read_i8042timer(HP_SDC_CMD_LOAD_FHS, 2); 217 if (raw < 0) return -1; 218 219 tenms = (unsigned int)raw & 0xffff; 220 221 res->tv_usec = (suseconds_t)(tenms % 100) * 10000; 222 res->tv_sec = (time_t)(tenms / 100); 223 224 return 0; 225 } 226 227 228 /* Read the i8042 match timer (a.k.a. alarm) */ 229 static inline int hp_sdc_rtc_read_mt(struct timeval *res) { 230 int64_t raw; 231 uint32_t tenms; 232 233 raw = hp_sdc_rtc_read_i8042timer(HP_SDC_CMD_LOAD_MT, 3); 234 if (raw < 0) return -1; 235 236 tenms = (uint32_t)raw & 0xffffff; 237 238 res->tv_usec = (suseconds_t)(tenms % 100) * 10000; 239 res->tv_sec = (time_t)(tenms / 100); 240 241 return 0; 242 } 243 244 245 /* Read the i8042 delay timer */ 246 static inline int hp_sdc_rtc_read_dt(struct timeval *res) { 247 int64_t raw; 248 uint32_t tenms; 249 250 raw = hp_sdc_rtc_read_i8042timer(HP_SDC_CMD_LOAD_DT, 3); 251 if (raw < 0) return -1; 252 253 tenms = (uint32_t)raw & 0xffffff; 254 255 res->tv_usec = (suseconds_t)(tenms % 100) * 10000; 256 res->tv_sec = (time_t)(tenms / 100); 257 258 return 0; 259 } 260 261 262 /* Read the i8042 cycle timer (a.k.a. periodic) */ 263 static inline int hp_sdc_rtc_read_ct(struct timeval *res) { 264 int64_t raw; 265 uint32_t tenms; 266 267 raw = hp_sdc_rtc_read_i8042timer(HP_SDC_CMD_LOAD_CT, 3); 268 if (raw < 0) return -1; 269 270 tenms = (uint32_t)raw & 0xffffff; 271 272 res->tv_usec = (suseconds_t)(tenms % 100) * 10000; 273 res->tv_sec = (time_t)(tenms / 100); 274 275 return 0; 276 } 277 278 279 /* Set the i8042 real-time clock */ 280 static int hp_sdc_rtc_set_rt (struct timeval *setto) 281 { 282 uint32_t tenms; 283 unsigned int days; 284 hp_sdc_transaction t; 285 uint8_t tseq[11] = { 286 HP_SDC_ACT_PRECMD | HP_SDC_ACT_DATAOUT, 287 HP_SDC_CMD_SET_RTMS, 3, 0, 0, 0, 288 HP_SDC_ACT_PRECMD | HP_SDC_ACT_DATAOUT, 289 HP_SDC_CMD_SET_RTD, 2, 0, 0 290 }; 291 292 t.endidx = 10; 293 294 if (0xffff < setto->tv_sec / 86400) return -1; 295 days = setto->tv_sec / 86400; 296 if (0xffff < setto->tv_usec / 1000000 / 86400) return -1; 297 days += ((setto->tv_sec % 86400) + setto->tv_usec / 1000000) / 86400; 298 if (days > 0xffff) return -1; 299 300 if (0xffffff < setto->tv_sec) return -1; 301 tenms = setto->tv_sec * 100; 302 if (0xffffff < setto->tv_usec / 10000) return -1; 303 tenms += setto->tv_usec / 10000; 304 if (tenms > 0xffffff) return -1; 305 306 tseq[3] = (uint8_t)(tenms & 0xff); 307 tseq[4] = (uint8_t)((tenms >> 8) & 0xff); 308 tseq[5] = (uint8_t)((tenms >> 16) & 0xff); 309 310 tseq[9] = (uint8_t)(days & 0xff); 311 tseq[10] = (uint8_t)((days >> 8) & 0xff); 312 313 t.seq = tseq; 314 315 if (hp_sdc_enqueue_transaction(&t)) return -1; 316 return 0; 317 } 318 319 /* Set the i8042 fast handshake timer */ 320 static int hp_sdc_rtc_set_fhs (struct timeval *setto) 321 { 322 uint32_t tenms; 323 hp_sdc_transaction t; 324 uint8_t tseq[5] = { 325 HP_SDC_ACT_PRECMD | HP_SDC_ACT_DATAOUT, 326 HP_SDC_CMD_SET_FHS, 2, 0, 0 327 }; 328 329 t.endidx = 4; 330 331 if (0xffff < setto->tv_sec) return -1; 332 tenms = setto->tv_sec * 100; 333 if (0xffff < setto->tv_usec / 10000) return -1; 334 tenms += setto->tv_usec / 10000; 335 if (tenms > 0xffff) return -1; 336 337 tseq[3] = (uint8_t)(tenms & 0xff); 338 tseq[4] = (uint8_t)((tenms >> 8) & 0xff); 339 340 t.seq = tseq; 341 342 if (hp_sdc_enqueue_transaction(&t)) return -1; 343 return 0; 344 } 345 346 347 /* Set the i8042 match timer (a.k.a. alarm) */ 348 #define hp_sdc_rtc_set_mt (setto) \ 349 hp_sdc_rtc_set_i8042timer(setto, HP_SDC_CMD_SET_MT) 350 351 /* Set the i8042 delay timer */ 352 #define hp_sdc_rtc_set_dt (setto) \ 353 hp_sdc_rtc_set_i8042timer(setto, HP_SDC_CMD_SET_DT) 354 355 /* Set the i8042 cycle timer (a.k.a. periodic) */ 356 #define hp_sdc_rtc_set_ct (setto) \ 357 hp_sdc_rtc_set_i8042timer(setto, HP_SDC_CMD_SET_CT) 358 359 /* Set one of the i8042 3-byte wide timers */ 360 static int hp_sdc_rtc_set_i8042timer (struct timeval *setto, uint8_t setcmd) 361 { 362 uint32_t tenms; 363 hp_sdc_transaction t; 364 uint8_t tseq[6] = { 365 HP_SDC_ACT_PRECMD | HP_SDC_ACT_DATAOUT, 366 0, 3, 0, 0, 0 367 }; 368 369 t.endidx = 6; 370 371 if (0xffffff < setto->tv_sec) return -1; 372 tenms = setto->tv_sec * 100; 373 if (0xffffff < setto->tv_usec / 10000) return -1; 374 tenms += setto->tv_usec / 10000; 375 if (tenms > 0xffffff) return -1; 376 377 tseq[1] = setcmd; 378 tseq[3] = (uint8_t)(tenms & 0xff); 379 tseq[4] = (uint8_t)((tenms >> 8) & 0xff); 380 tseq[5] = (uint8_t)((tenms >> 16) & 0xff); 381 382 t.seq = tseq; 383 384 if (hp_sdc_enqueue_transaction(&t)) { 385 return -1; 386 } 387 return 0; 388 } 389 390 static ssize_t hp_sdc_rtc_read(struct file *file, char __user *buf, 391 size_t count, loff_t *ppos) { 392 ssize_t retval; 393 394 if (count < sizeof(unsigned long)) 395 return -EINVAL; 396 397 retval = put_user(68, (unsigned long __user *)buf); 398 return retval; 399 } 400 401 static unsigned int hp_sdc_rtc_poll(struct file *file, poll_table *wait) 402 { 403 unsigned long l; 404 405 l = 0; 406 if (l != 0) 407 return POLLIN | POLLRDNORM; 408 return 0; 409 } 410 411 static int hp_sdc_rtc_open(struct inode *inode, struct file *file) 412 { 413 cycle_kernel_lock(); 414 return 0; 415 } 416 417 static int hp_sdc_rtc_release(struct inode *inode, struct file *file) 418 { 419 /* Turn off interrupts? */ 420 421 if (file->f_flags & FASYNC) { 422 hp_sdc_rtc_fasync (-1, file, 0); 423 } 424 425 return 0; 426 } 427 428 static int hp_sdc_rtc_fasync (int fd, struct file *filp, int on) 429 { 430 return fasync_helper (fd, filp, on, &hp_sdc_rtc_async_queue); 431 } 432 433 static int hp_sdc_rtc_proc_output (char *buf) 434 { 435 #define YN(bit) ("no") 436 #define NY(bit) ("yes") 437 char *p; 438 struct rtc_time tm; 439 struct timeval tv; 440 441 memset(&tm, 0, sizeof(struct rtc_time)); 442 443 p = buf; 444 445 if (hp_sdc_rtc_read_bbrtc(&tm)) { 446 p += sprintf(p, "BBRTC\t\t: READ FAILED!\n"); 447 } else { 448 p += sprintf(p, 449 "rtc_time\t: %02d:%02d:%02d\n" 450 "rtc_date\t: %04d-%02d-%02d\n" 451 "rtc_epoch\t: %04lu\n", 452 tm.tm_hour, tm.tm_min, tm.tm_sec, 453 tm.tm_year + 1900, tm.tm_mon + 1, 454 tm.tm_mday, epoch); 455 } 456 457 if (hp_sdc_rtc_read_rt(&tv)) { 458 p += sprintf(p, "i8042 rtc\t: READ FAILED!\n"); 459 } else { 460 p += sprintf(p, "i8042 rtc\t: %ld.%02d seconds\n", 461 tv.tv_sec, (int)tv.tv_usec/1000); 462 } 463 464 if (hp_sdc_rtc_read_fhs(&tv)) { 465 p += sprintf(p, "handshake\t: READ FAILED!\n"); 466 } else { 467 p += sprintf(p, "handshake\t: %ld.%02d seconds\n", 468 tv.tv_sec, (int)tv.tv_usec/1000); 469 } 470 471 if (hp_sdc_rtc_read_mt(&tv)) { 472 p += sprintf(p, "alarm\t\t: READ FAILED!\n"); 473 } else { 474 p += sprintf(p, "alarm\t\t: %ld.%02d seconds\n", 475 tv.tv_sec, (int)tv.tv_usec/1000); 476 } 477 478 if (hp_sdc_rtc_read_dt(&tv)) { 479 p += sprintf(p, "delay\t\t: READ FAILED!\n"); 480 } else { 481 p += sprintf(p, "delay\t\t: %ld.%02d seconds\n", 482 tv.tv_sec, (int)tv.tv_usec/1000); 483 } 484 485 if (hp_sdc_rtc_read_ct(&tv)) { 486 p += sprintf(p, "periodic\t: READ FAILED!\n"); 487 } else { 488 p += sprintf(p, "periodic\t: %ld.%02d seconds\n", 489 tv.tv_sec, (int)tv.tv_usec/1000); 490 } 491 492 p += sprintf(p, 493 "DST_enable\t: %s\n" 494 "BCD\t\t: %s\n" 495 "24hr\t\t: %s\n" 496 "square_wave\t: %s\n" 497 "alarm_IRQ\t: %s\n" 498 "update_IRQ\t: %s\n" 499 "periodic_IRQ\t: %s\n" 500 "periodic_freq\t: %ld\n" 501 "batt_status\t: %s\n", 502 YN(RTC_DST_EN), 503 NY(RTC_DM_BINARY), 504 YN(RTC_24H), 505 YN(RTC_SQWE), 506 YN(RTC_AIE), 507 YN(RTC_UIE), 508 YN(RTC_PIE), 509 1UL, 510 1 ? "okay" : "dead"); 511 512 return p - buf; 513 #undef YN 514 #undef NY 515 } 516 517 static int hp_sdc_rtc_read_proc(char *page, char **start, off_t off, 518 int count, int *eof, void *data) 519 { 520 int len = hp_sdc_rtc_proc_output (page); 521 if (len <= off+count) *eof = 1; 522 *start = page + off; 523 len -= off; 524 if (len>count) len = count; 525 if (len<0) len = 0; 526 return len; 527 } 528 529 static int hp_sdc_rtc_ioctl(struct inode *inode, struct file *file, 530 unsigned int cmd, unsigned long arg) 531 { 532 #if 1 533 return -EINVAL; 534 #else 535 536 struct rtc_time wtime; 537 struct timeval ttime; 538 int use_wtime = 0; 539 540 /* This needs major work. */ 541 542 switch (cmd) { 543 544 case RTC_AIE_OFF: /* Mask alarm int. enab. bit */ 545 case RTC_AIE_ON: /* Allow alarm interrupts. */ 546 case RTC_PIE_OFF: /* Mask periodic int. enab. bit */ 547 case RTC_PIE_ON: /* Allow periodic ints */ 548 case RTC_UIE_ON: /* Allow ints for RTC updates. */ 549 case RTC_UIE_OFF: /* Allow ints for RTC updates. */ 550 { 551 /* We cannot mask individual user timers and we 552 cannot tell them apart when they occur, so it 553 would be disingenuous to succeed these IOCTLs */ 554 return -EINVAL; 555 } 556 case RTC_ALM_READ: /* Read the present alarm time */ 557 { 558 if (hp_sdc_rtc_read_mt(&ttime)) return -EFAULT; 559 if (hp_sdc_rtc_read_bbrtc(&wtime)) return -EFAULT; 560 561 wtime.tm_hour = ttime.tv_sec / 3600; ttime.tv_sec %= 3600; 562 wtime.tm_min = ttime.tv_sec / 60; ttime.tv_sec %= 60; 563 wtime.tm_sec = ttime.tv_sec; 564 565 break; 566 } 567 case RTC_IRQP_READ: /* Read the periodic IRQ rate. */ 568 { 569 return put_user(hp_sdc_rtc_freq, (unsigned long *)arg); 570 } 571 case RTC_IRQP_SET: /* Set periodic IRQ rate. */ 572 { 573 /* 574 * The max we can do is 100Hz. 575 */ 576 577 if ((arg < 1) || (arg > 100)) return -EINVAL; 578 ttime.tv_sec = 0; 579 ttime.tv_usec = 1000000 / arg; 580 if (hp_sdc_rtc_set_ct(&ttime)) return -EFAULT; 581 hp_sdc_rtc_freq = arg; 582 return 0; 583 } 584 case RTC_ALM_SET: /* Store a time into the alarm */ 585 { 586 /* 587 * This expects a struct hp_sdc_rtc_time. Writing 0xff means 588 * "don't care" or "match all" for PC timers. The HP SDC 589 * does not support that perk, but it could be emulated fairly 590 * easily. Only the tm_hour, tm_min and tm_sec are used. 591 * We could do it with 10ms accuracy with the HP SDC, if the 592 * rtc interface left us a way to do that. 593 */ 594 struct hp_sdc_rtc_time alm_tm; 595 596 if (copy_from_user(&alm_tm, (struct hp_sdc_rtc_time*)arg, 597 sizeof(struct hp_sdc_rtc_time))) 598 return -EFAULT; 599 600 if (alm_tm.tm_hour > 23) return -EINVAL; 601 if (alm_tm.tm_min > 59) return -EINVAL; 602 if (alm_tm.tm_sec > 59) return -EINVAL; 603 604 ttime.sec = alm_tm.tm_hour * 3600 + 605 alm_tm.tm_min * 60 + alm_tm.tm_sec; 606 ttime.usec = 0; 607 if (hp_sdc_rtc_set_mt(&ttime)) return -EFAULT; 608 return 0; 609 } 610 case RTC_RD_TIME: /* Read the time/date from RTC */ 611 { 612 if (hp_sdc_rtc_read_bbrtc(&wtime)) return -EFAULT; 613 break; 614 } 615 case RTC_SET_TIME: /* Set the RTC */ 616 { 617 struct rtc_time hp_sdc_rtc_tm; 618 unsigned char mon, day, hrs, min, sec, leap_yr; 619 unsigned int yrs; 620 621 if (!capable(CAP_SYS_TIME)) 622 return -EACCES; 623 if (copy_from_user(&hp_sdc_rtc_tm, (struct rtc_time *)arg, 624 sizeof(struct rtc_time))) 625 return -EFAULT; 626 627 yrs = hp_sdc_rtc_tm.tm_year + 1900; 628 mon = hp_sdc_rtc_tm.tm_mon + 1; /* tm_mon starts at zero */ 629 day = hp_sdc_rtc_tm.tm_mday; 630 hrs = hp_sdc_rtc_tm.tm_hour; 631 min = hp_sdc_rtc_tm.tm_min; 632 sec = hp_sdc_rtc_tm.tm_sec; 633 634 if (yrs < 1970) 635 return -EINVAL; 636 637 leap_yr = ((!(yrs % 4) && (yrs % 100)) || !(yrs % 400)); 638 639 if ((mon > 12) || (day == 0)) 640 return -EINVAL; 641 if (day > (days_in_mo[mon] + ((mon == 2) && leap_yr))) 642 return -EINVAL; 643 if ((hrs >= 24) || (min >= 60) || (sec >= 60)) 644 return -EINVAL; 645 646 if ((yrs -= eH) > 255) /* They are unsigned */ 647 return -EINVAL; 648 649 650 return 0; 651 } 652 case RTC_EPOCH_READ: /* Read the epoch. */ 653 { 654 return put_user (epoch, (unsigned long *)arg); 655 } 656 case RTC_EPOCH_SET: /* Set the epoch. */ 657 { 658 /* 659 * There were no RTC clocks before 1900. 660 */ 661 if (arg < 1900) 662 return -EINVAL; 663 if (!capable(CAP_SYS_TIME)) 664 return -EACCES; 665 666 epoch = arg; 667 return 0; 668 } 669 default: 670 return -EINVAL; 671 } 672 return copy_to_user((void *)arg, &wtime, sizeof wtime) ? -EFAULT : 0; 673 #endif 674 } 675 676 static const struct file_operations hp_sdc_rtc_fops = { 677 .owner = THIS_MODULE, 678 .llseek = no_llseek, 679 .read = hp_sdc_rtc_read, 680 .poll = hp_sdc_rtc_poll, 681 .ioctl = hp_sdc_rtc_ioctl, 682 .open = hp_sdc_rtc_open, 683 .release = hp_sdc_rtc_release, 684 .fasync = hp_sdc_rtc_fasync, 685 }; 686 687 static struct miscdevice hp_sdc_rtc_dev = { 688 .minor = RTC_MINOR, 689 .name = "rtc_HIL", 690 .fops = &hp_sdc_rtc_fops 691 }; 692 693 static int __init hp_sdc_rtc_init(void) 694 { 695 int ret; 696 697 #ifdef __mc68000__ 698 if (!MACH_IS_HP300) 699 return -ENODEV; 700 #endif 701 702 init_MUTEX(&i8042tregs); 703 704 if ((ret = hp_sdc_request_timer_irq(&hp_sdc_rtc_isr))) 705 return ret; 706 if (misc_register(&hp_sdc_rtc_dev) != 0) 707 printk(KERN_INFO "Could not register misc. dev for i8042 rtc\n"); 708 709 create_proc_read_entry ("driver/rtc", 0, NULL, 710 hp_sdc_rtc_read_proc, NULL); 711 712 printk(KERN_INFO "HP i8042 SDC + MSM-58321 RTC support loaded " 713 "(RTC v " RTC_VERSION ")\n"); 714 715 return 0; 716 } 717 718 static void __exit hp_sdc_rtc_exit(void) 719 { 720 remove_proc_entry ("driver/rtc", NULL); 721 misc_deregister(&hp_sdc_rtc_dev); 722 hp_sdc_release_timer_irq(hp_sdc_rtc_isr); 723 printk(KERN_INFO "HP i8042 SDC + MSM-58321 RTC support unloaded\n"); 724 } 725 726 module_init(hp_sdc_rtc_init); 727 module_exit(hp_sdc_rtc_exit); 728