1aef9ec39SRoland Dreier /*
2aef9ec39SRoland Dreier  * Copyright (c) 2005 Cisco Systems.  All rights reserved.
3aef9ec39SRoland Dreier  *
4aef9ec39SRoland Dreier  * This software is available to you under a choice of one of two
5aef9ec39SRoland Dreier  * licenses.  You may choose to be licensed under the terms of the GNU
6aef9ec39SRoland Dreier  * General Public License (GPL) Version 2, available from the file
7aef9ec39SRoland Dreier  * COPYING in the main directory of this source tree, or the
8aef9ec39SRoland Dreier  * OpenIB.org BSD license below:
9aef9ec39SRoland Dreier  *
10aef9ec39SRoland Dreier  *     Redistribution and use in source and binary forms, with or
11aef9ec39SRoland Dreier  *     without modification, are permitted provided that the following
12aef9ec39SRoland Dreier  *     conditions are met:
13aef9ec39SRoland Dreier  *
14aef9ec39SRoland Dreier  *      - Redistributions of source code must retain the above
15aef9ec39SRoland Dreier  *        copyright notice, this list of conditions and the following
16aef9ec39SRoland Dreier  *        disclaimer.
17aef9ec39SRoland Dreier  *
18aef9ec39SRoland Dreier  *      - Redistributions in binary form must reproduce the above
19aef9ec39SRoland Dreier  *        copyright notice, this list of conditions and the following
20aef9ec39SRoland Dreier  *        disclaimer in the documentation and/or other materials
21aef9ec39SRoland Dreier  *        provided with the distribution.
22aef9ec39SRoland Dreier  *
23aef9ec39SRoland Dreier  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24aef9ec39SRoland Dreier  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25aef9ec39SRoland Dreier  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26aef9ec39SRoland Dreier  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27aef9ec39SRoland Dreier  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28aef9ec39SRoland Dreier  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29aef9ec39SRoland Dreier  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30aef9ec39SRoland Dreier  * SOFTWARE.
31aef9ec39SRoland Dreier  */
32aef9ec39SRoland Dreier 
33aef9ec39SRoland Dreier #ifndef IB_SRP_H
34aef9ec39SRoland Dreier #define IB_SRP_H
35aef9ec39SRoland Dreier 
36aef9ec39SRoland Dreier #include <linux/types.h>
37aef9ec39SRoland Dreier #include <linux/list.h>
388e9e5f4fSIngo Molnar #include <linux/mutex.h>
39cf368713SRoland Dreier #include <linux/scatterlist.h>
40aef9ec39SRoland Dreier 
41aef9ec39SRoland Dreier #include <scsi/scsi_host.h>
42aef9ec39SRoland Dreier #include <scsi/scsi_cmnd.h>
43aef9ec39SRoland Dreier 
44aef9ec39SRoland Dreier #include <rdma/ib_verbs.h>
45aef9ec39SRoland Dreier #include <rdma/ib_sa.h>
46aef9ec39SRoland Dreier #include <rdma/ib_cm.h>
47f5358a17SRoland Dreier #include <rdma/ib_fmr_pool.h>
48aef9ec39SRoland Dreier 
49aef9ec39SRoland Dreier enum {
50aef9ec39SRoland Dreier 	SRP_PATH_REC_TIMEOUT_MS	= 1000,
51aef9ec39SRoland Dreier 	SRP_ABORT_TIMEOUT_MS	= 5000,
52aef9ec39SRoland Dreier 
53aef9ec39SRoland Dreier 	SRP_PORT_REDIRECT	= 1,
54aef9ec39SRoland Dreier 	SRP_DLID_REDIRECT	= 2,
559fe4bcf4SDavid Dillow 	SRP_STALE_CONN		= 3,
56aef9ec39SRoland Dreier 
5774b0a15bSVu Pham 	SRP_DEF_SG_TABLESIZE	= 12,
58aef9ec39SRoland Dreier 
594d73f95fSBart Van Assche 	SRP_DEFAULT_QUEUE_SIZE	= 1 << 6,
60dd5e6e38SBart Van Assche 	SRP_RSP_SQ_SIZE		= 1,
61dd5e6e38SBart Van Assche 	SRP_TSK_MGMT_SQ_SIZE	= 1,
624d73f95fSBart Van Assche 	SRP_DEFAULT_CMD_SQ_SIZE = SRP_DEFAULT_QUEUE_SIZE - SRP_RSP_SQ_SIZE -
634d73f95fSBart Van Assche 				  SRP_TSK_MGMT_SQ_SIZE,
64aef9ec39SRoland Dreier 
65f8b6e31eSDavid Dillow 	SRP_TAG_NO_REQ		= ~0U,
66f8b6e31eSDavid Dillow 	SRP_TAG_TSK_MGMT	= 1U << 31,
67f5358a17SRoland Dreier 
6852ede08fSBart Van Assche 	SRP_MAX_PAGES_PER_MR	= 512,
698f26c9ffSDavid Dillow 
705cfb1782SBart Van Assche 	LOCAL_INV_WR_ID_MASK	= 1,
715cfb1782SBart Van Assche 	FAST_REG_WR_ID_MASK	= 2,
727dad6b2eSBart Van Assche 
737dad6b2eSBart Van Assche 	SRP_LAST_WR_ID		= 0xfffffffcU,
74aef9ec39SRoland Dreier };
75aef9ec39SRoland Dreier 
76aef9ec39SRoland Dreier enum srp_target_state {
7734aa654eSBart Van Assche 	SRP_TARGET_SCANNING,
78aef9ec39SRoland Dreier 	SRP_TARGET_LIVE,
79ef6c49d8SBart Van Assche 	SRP_TARGET_REMOVED,
80aef9ec39SRoland Dreier };
81aef9ec39SRoland Dreier 
82bb12588aSDavid Dillow enum srp_iu_type {
83bb12588aSDavid Dillow 	SRP_IU_CMD,
84bb12588aSDavid Dillow 	SRP_IU_TSK_MGMT,
85bb12588aSDavid Dillow 	SRP_IU_RSP,
868cba2077SDavid Dillow };
878cba2077SDavid Dillow 
885cfb1782SBart Van Assche /*
895cfb1782SBart Van Assche  * @mr_page_mask: HCA memory registration page mask.
905cfb1782SBart Van Assche  * @mr_page_size: HCA memory registration page size.
915cfb1782SBart Van Assche  * @mr_max_size: Maximum size in bytes of a single FMR / FR registration
925cfb1782SBart Van Assche  *   request.
935cfb1782SBart Van Assche  */
94f5358a17SRoland Dreier struct srp_device {
95f5358a17SRoland Dreier 	struct list_head	dev_list;
96aef9ec39SRoland Dreier 	struct ib_device       *dev;
97aef9ec39SRoland Dreier 	struct ib_pd	       *pd;
98aef9ec39SRoland Dreier 	struct ib_mr	       *mr;
9952ede08fSBart Van Assche 	u64			mr_page_mask;
10052ede08fSBart Van Assche 	int			mr_page_size;
10152ede08fSBart Van Assche 	int			mr_max_size;
10252ede08fSBart Van Assche 	int			max_pages_per_mr;
103d1b4289eSBart Van Assche 	bool			has_fmr;
1045cfb1782SBart Van Assche 	bool			has_fr;
1055cfb1782SBart Van Assche 	bool			use_fast_reg;
106f5358a17SRoland Dreier };
107f5358a17SRoland Dreier 
108f5358a17SRoland Dreier struct srp_host {
10905321937SGreg Kroah-Hartman 	struct srp_device      *srp_dev;
110f5358a17SRoland Dreier 	u8			port;
111ee959b00STony Jones 	struct device		dev;
112aef9ec39SRoland Dreier 	struct list_head	target_list;
113b3589fd4SMatthew Wilcox 	spinlock_t		target_lock;
114aef9ec39SRoland Dreier 	struct completion	released;
115aef9ec39SRoland Dreier 	struct list_head	list;
1162d7091bcSBart Van Assche 	struct mutex		add_target_mutex;
117aef9ec39SRoland Dreier };
118aef9ec39SRoland Dreier 
119aef9ec39SRoland Dreier struct srp_request {
120aef9ec39SRoland Dreier 	struct scsi_cmnd       *scmnd;
121aef9ec39SRoland Dreier 	struct srp_iu	       *cmd;
1225cfb1782SBart Van Assche 	union {
1238f26c9ffSDavid Dillow 		struct ib_pool_fmr **fmr_list;
1245cfb1782SBart Van Assche 		struct srp_fr_desc **fr_list;
1255cfb1782SBart Van Assche 	};
1268f26c9ffSDavid Dillow 	u64		       *map_page;
127c07d424dSDavid Dillow 	struct srp_direct_buf  *indirect_desc;
128c07d424dSDavid Dillow 	dma_addr_t		indirect_dma_addr;
12952ede08fSBart Van Assche 	short			nmdesc;
130aef9ec39SRoland Dreier };
131aef9ec39SRoland Dreier 
132509c07bcSBart Van Assche /**
133509c07bcSBart Van Assche  * struct srp_rdma_ch
134509c07bcSBart Van Assche  * @comp_vector: Completion vector used by this RDMA channel.
135509c07bcSBart Van Assche  */
136509c07bcSBart Van Assche struct srp_rdma_ch {
1379af76271SDavid Dillow 	/* These are RW in the hot path, and commonly used together */
1389af76271SDavid Dillow 	struct list_head	free_tx;
1399af76271SDavid Dillow 	spinlock_t		lock;
1409af76271SDavid Dillow 	s32			req_lim;
1419af76271SDavid Dillow 
1429af76271SDavid Dillow 	/* These are read-only in the hot path */
143509c07bcSBart Van Assche 	struct srp_target_port *target ____cacheline_aligned_in_smp;
144509c07bcSBart Van Assche 	struct ib_cq	       *send_cq;
1459af76271SDavid Dillow 	struct ib_cq	       *recv_cq;
1469af76271SDavid Dillow 	struct ib_qp	       *qp;
1475cfb1782SBart Van Assche 	union {
148d1b4289eSBart Van Assche 		struct ib_fmr_pool     *fmr_pool;
1495cfb1782SBart Van Assche 		struct srp_fr_pool     *fr_pool;
1505cfb1782SBart Van Assche 	};
151509c07bcSBart Van Assche 
152509c07bcSBart Van Assche 	/* Everything above this point is used in the hot path of
153509c07bcSBart Van Assche 	 * command processing. Try to keep them packed into cachelines.
154509c07bcSBart Van Assche 	 */
155509c07bcSBart Van Assche 
156509c07bcSBart Van Assche 	struct completion	done;
157509c07bcSBart Van Assche 	int			status;
158509c07bcSBart Van Assche 
159509c07bcSBart Van Assche 	struct ib_sa_path_rec	path;
160509c07bcSBart Van Assche 	struct ib_sa_query     *path_query;
161509c07bcSBart Van Assche 	int			path_query_id;
162509c07bcSBart Van Assche 
163509c07bcSBart Van Assche 	struct ib_cm_id	       *cm_id;
164509c07bcSBart Van Assche 	struct srp_iu	      **tx_ring;
165509c07bcSBart Van Assche 	struct srp_iu	      **rx_ring;
166509c07bcSBart Van Assche 	struct srp_request     *req_ring;
167509c07bcSBart Van Assche 	int			max_ti_iu_len;
168509c07bcSBart Van Assche 	int			comp_vector;
169509c07bcSBart Van Assche 
170509c07bcSBart Van Assche 	struct completion	tsk_mgmt_done;
171509c07bcSBart Van Assche 	u8			tsk_mgmt_status;
172c014c8cdSBart Van Assche 	bool			connected;
173509c07bcSBart Van Assche };
174509c07bcSBart Van Assche 
175509c07bcSBart Van Assche /**
176509c07bcSBart Van Assche  * struct srp_target_port
177509c07bcSBart Van Assche  * @comp_vector: Completion vector used by the first RDMA channel created for
178509c07bcSBart Van Assche  *   this target port.
179509c07bcSBart Van Assche  */
180509c07bcSBart Van Assche struct srp_target_port {
181509c07bcSBart Van Assche 	/* read and written in the hot path */
182509c07bcSBart Van Assche 	spinlock_t		lock;
183509c07bcSBart Van Assche 
184509c07bcSBart Van Assche 	/* read only in the hot path */
185d92c0da7SBart Van Assche 	struct srp_rdma_ch	*ch;
186d92c0da7SBart Van Assche 	u32			ch_count;
1879af76271SDavid Dillow 	u32			lkey;
1889af76271SDavid Dillow 	u32			rkey;
1899af76271SDavid Dillow 	enum srp_target_state	state;
19049248644SDavid Dillow 	unsigned int		max_iu_len;
19149248644SDavid Dillow 	unsigned int		cmd_sg_cnt;
192c07d424dSDavid Dillow 	unsigned int		indirect_size;
193c07d424dSDavid Dillow 	bool			allow_ext_sg;
1949af76271SDavid Dillow 
195509c07bcSBart Van Assche 	/* other member variables */
196747fe000SBart Van Assche 	union ib_gid		sgid;
197aef9ec39SRoland Dreier 	__be64			id_ext;
198aef9ec39SRoland Dreier 	__be64			ioc_guid;
199aef9ec39SRoland Dreier 	__be64			service_id;
20001cb9bcbSIshai Rabinovitz 	__be64			initiator_ext;
2010c0450dbSRamachandra K 	u16			io_class;
202aef9ec39SRoland Dreier 	struct srp_host	       *srp_host;
203aef9ec39SRoland Dreier 	struct Scsi_Host       *scsi_host;
2049dd69a60SBart Van Assche 	struct srp_rport       *rport;
205aef9ec39SRoland Dreier 	char			target_name[32];
206aef9ec39SRoland Dreier 	unsigned int		scsi_id;
207c07d424dSDavid Dillow 	unsigned int		sg_tablesize;
2084d73f95fSBart Van Assche 	int			queue_size;
2094d73f95fSBart Van Assche 	int			req_ring_size;
2104b5e5f41SBart Van Assche 	int			comp_vector;
2117bb312e4SVu Pham 	int			tl_retry_count;
212aef9ec39SRoland Dreier 
213747fe000SBart Van Assche 	union ib_gid		orig_dgid;
214747fe000SBart Van Assche 	__be16			pkey;
215aef9ec39SRoland Dreier 
216c9b03c1aSBart Van Assche 	u32			rq_tmo_jiffies;
217c9b03c1aSBart Van Assche 
2186bfa24faSRoland Dreier 	int			zero_req_lim;
2196bfa24faSRoland Dreier 
220c1120f89SBart Van Assche 	struct work_struct	tl_err_work;
221ef6c49d8SBart Van Assche 	struct work_struct	remove_work;
222aef9ec39SRoland Dreier 
223aef9ec39SRoland Dreier 	struct list_head	list;
224948d1e88SBart Van Assche 	bool			qp_in_error;
225aef9ec39SRoland Dreier };
226aef9ec39SRoland Dreier 
227aef9ec39SRoland Dreier struct srp_iu {
228dcb4cb85SBart Van Assche 	struct list_head	list;
22985507bccSRalph Campbell 	u64			dma;
230aef9ec39SRoland Dreier 	void		       *buf;
231aef9ec39SRoland Dreier 	size_t			size;
232aef9ec39SRoland Dreier 	enum dma_data_direction	direction;
233aef9ec39SRoland Dreier };
234aef9ec39SRoland Dreier 
2355cfb1782SBart Van Assche /**
2365cfb1782SBart Van Assche  * struct srp_fr_desc - fast registration work request arguments
2375cfb1782SBart Van Assche  * @entry: Entry in srp_fr_pool.free_list.
2385cfb1782SBart Van Assche  * @mr:    Memory region.
2395cfb1782SBart Van Assche  * @frpl:  Fast registration page list.
2405cfb1782SBart Van Assche  */
2415cfb1782SBart Van Assche struct srp_fr_desc {
2425cfb1782SBart Van Assche 	struct list_head		entry;
2435cfb1782SBart Van Assche 	struct ib_mr			*mr;
2445cfb1782SBart Van Assche 	struct ib_fast_reg_page_list	*frpl;
2455cfb1782SBart Van Assche };
2465cfb1782SBart Van Assche 
2475cfb1782SBart Van Assche /**
2485cfb1782SBart Van Assche  * struct srp_fr_pool - pool of fast registration descriptors
2495cfb1782SBart Van Assche  *
2505cfb1782SBart Van Assche  * An entry is available for allocation if and only if it occurs in @free_list.
2515cfb1782SBart Van Assche  *
2525cfb1782SBart Van Assche  * @size:      Number of descriptors in this pool.
2535cfb1782SBart Van Assche  * @max_page_list_len: Maximum fast registration work request page list length.
2545cfb1782SBart Van Assche  * @lock:      Protects free_list.
2555cfb1782SBart Van Assche  * @free_list: List of free descriptors.
2565cfb1782SBart Van Assche  * @desc:      Fast registration descriptor pool.
2575cfb1782SBart Van Assche  */
2585cfb1782SBart Van Assche struct srp_fr_pool {
2595cfb1782SBart Van Assche 	int			size;
2605cfb1782SBart Van Assche 	int			max_page_list_len;
2615cfb1782SBart Van Assche 	spinlock_t		lock;
2625cfb1782SBart Van Assche 	struct list_head	free_list;
2635cfb1782SBart Van Assche 	struct srp_fr_desc	desc[0];
2645cfb1782SBart Van Assche };
2655cfb1782SBart Van Assche 
2665cfb1782SBart Van Assche /**
2675cfb1782SBart Van Assche  * struct srp_map_state - per-request DMA memory mapping state
2685cfb1782SBart Van Assche  * @desc:	    Pointer to the element of the SRP buffer descriptor array
2695cfb1782SBart Van Assche  *		    that is being filled in.
2705cfb1782SBart Van Assche  * @pages:	    Array with DMA addresses of pages being considered for
2715cfb1782SBart Van Assche  *		    memory registration.
2725cfb1782SBart Van Assche  * @base_dma_addr:  DMA address of the first page that has not yet been mapped.
2735cfb1782SBart Van Assche  * @dma_len:	    Number of bytes that will be registered with the next
2745cfb1782SBart Van Assche  *		    FMR or FR memory registration call.
2755cfb1782SBart Van Assche  * @total_len:	    Total number of bytes in the sg-list being mapped.
2765cfb1782SBart Van Assche  * @npages:	    Number of page addresses in the pages[] array.
2775cfb1782SBart Van Assche  * @nmdesc:	    Number of FMR or FR memory descriptors used for mapping.
2785cfb1782SBart Van Assche  * @ndesc:	    Number of SRP buffer descriptors that have been filled in.
2795cfb1782SBart Van Assche  * @unmapped_sg:    First element of the sg-list that is mapped via FMR or FR.
2805cfb1782SBart Van Assche  * @unmapped_index: Index of the first element mapped via FMR or FR.
2815cfb1782SBart Van Assche  * @unmapped_addr:  DMA address of the first element mapped via FMR or FR.
2825cfb1782SBart Van Assche  */
2838f26c9ffSDavid Dillow struct srp_map_state {
2845cfb1782SBart Van Assche 	union {
285f731ed62SBart Van Assche 		struct {
286f731ed62SBart Van Assche 			struct ib_pool_fmr **next;
287f731ed62SBart Van Assche 			struct ib_pool_fmr **end;
288f731ed62SBart Van Assche 		} fmr;
289f731ed62SBart Van Assche 		struct {
290f731ed62SBart Van Assche 			struct srp_fr_desc **next;
291f731ed62SBart Van Assche 			struct srp_fr_desc **end;
292f731ed62SBart Van Assche 		} fr;
2935cfb1782SBart Van Assche 	};
2948f26c9ffSDavid Dillow 	struct srp_direct_buf  *desc;
2958f26c9ffSDavid Dillow 	u64		       *pages;
2968f26c9ffSDavid Dillow 	dma_addr_t		base_dma_addr;
29752ede08fSBart Van Assche 	u32			dma_len;
2988f26c9ffSDavid Dillow 	u32			total_len;
2998f26c9ffSDavid Dillow 	unsigned int		npages;
30052ede08fSBart Van Assche 	unsigned int		nmdesc;
3018f26c9ffSDavid Dillow 	unsigned int		ndesc;
3028f26c9ffSDavid Dillow 	struct scatterlist     *unmapped_sg;
3038f26c9ffSDavid Dillow 	int			unmapped_index;
3048f26c9ffSDavid Dillow 	dma_addr_t		unmapped_addr;
3058f26c9ffSDavid Dillow };
3068f26c9ffSDavid Dillow 
307aef9ec39SRoland Dreier #endif /* IB_SRP_H */
308