1 /* 2 * Copyright(c) 2016 Intel Corporation. 3 * 4 * This file is provided under a dual BSD/GPLv2 license. When using or 5 * redistributing this file, you may do so under either license. 6 * 7 * GPL LICENSE SUMMARY 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of version 2 of the GNU General Public License as 11 * published by the Free Software Foundation. 12 * 13 * This program is distributed in the hope that it will be useful, but 14 * WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 16 * General Public License for more details. 17 * 18 * BSD LICENSE 19 * 20 * Redistribution and use in source and binary forms, with or without 21 * modification, are permitted provided that the following conditions 22 * are met: 23 * 24 * - Redistributions of source code must retain the above copyright 25 * notice, this list of conditions and the following disclaimer. 26 * - Redistributions in binary form must reproduce the above copyright 27 * notice, this list of conditions and the following disclaimer in 28 * the documentation and/or other materials provided with the 29 * distribution. 30 * - Neither the name of Intel Corporation nor the names of its 31 * contributors may be used to endorse or promote products derived 32 * from this software without specific prior written permission. 33 * 34 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 35 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 36 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 37 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 38 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 39 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 40 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 41 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 42 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 43 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 44 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 45 * 46 */ 47 48 #undef TRACE_SYSTEM_VAR 49 #define TRACE_SYSTEM_VAR rdmavt 50 51 #if !defined(__RDMAVT_TRACE_H) || defined(TRACE_HEADER_MULTI_READ) 52 #define __RDMAVT_TRACE_H 53 54 #include <linux/tracepoint.h> 55 #include <linux/trace_seq.h> 56 57 #include <rdma/ib_verbs.h> 58 #include <rdma/rdma_vt.h> 59 60 #define RDI_DEV_ENTRY(rdi) __string(dev, rdi->driver_f.get_card_name(rdi)) 61 #define RDI_DEV_ASSIGN(rdi) __assign_str(dev, rdi->driver_f.get_card_name(rdi)) 62 63 #undef TRACE_SYSTEM 64 #define TRACE_SYSTEM rdmavt 65 66 TRACE_EVENT(rvt_dbg, 67 TP_PROTO(struct rvt_dev_info *rdi, 68 const char *msg), 69 TP_ARGS(rdi, msg), 70 TP_STRUCT__entry( 71 RDI_DEV_ENTRY(rdi) 72 __string(msg, msg) 73 ), 74 TP_fast_assign( 75 RDI_DEV_ASSIGN(rdi); 76 __assign_str(msg, msg); 77 ), 78 TP_printk("[%s]: %s", __get_str(dev), __get_str(msg)) 79 ); 80 81 #undef TRACE_SYSTEM 82 #define TRACE_SYSTEM rvt_qphash 83 DECLARE_EVENT_CLASS(rvt_qphash_template, 84 TP_PROTO(struct rvt_qp *qp, u32 bucket), 85 TP_ARGS(qp, bucket), 86 TP_STRUCT__entry( 87 RDI_DEV_ENTRY(ib_to_rvt(qp->ibqp.device)) 88 __field(u32, qpn) 89 __field(u32, bucket) 90 ), 91 TP_fast_assign( 92 RDI_DEV_ASSIGN(ib_to_rvt(qp->ibqp.device)) 93 __entry->qpn = qp->ibqp.qp_num; 94 __entry->bucket = bucket; 95 ), 96 TP_printk( 97 "[%s] qpn 0x%x bucket %u", 98 __get_str(dev), 99 __entry->qpn, 100 __entry->bucket 101 ) 102 ); 103 104 DEFINE_EVENT(rvt_qphash_template, rvt_qpinsert, 105 TP_PROTO(struct rvt_qp *qp, u32 bucket), 106 TP_ARGS(qp, bucket)); 107 108 DEFINE_EVENT(rvt_qphash_template, rvt_qpremove, 109 TP_PROTO(struct rvt_qp *qp, u32 bucket), 110 TP_ARGS(qp, bucket)); 111 112 #undef TRACE_SYSTEM 113 #define TRACE_SYSTEM rvt_tx 114 115 #define wr_opcode_name(opcode) { IB_WR_##opcode, #opcode } 116 #define show_wr_opcode(opcode) \ 117 __print_symbolic(opcode, \ 118 wr_opcode_name(RDMA_WRITE), \ 119 wr_opcode_name(RDMA_WRITE_WITH_IMM), \ 120 wr_opcode_name(SEND), \ 121 wr_opcode_name(SEND_WITH_IMM), \ 122 wr_opcode_name(RDMA_READ), \ 123 wr_opcode_name(ATOMIC_CMP_AND_SWP), \ 124 wr_opcode_name(ATOMIC_FETCH_AND_ADD), \ 125 wr_opcode_name(LSO), \ 126 wr_opcode_name(SEND_WITH_INV), \ 127 wr_opcode_name(RDMA_READ_WITH_INV), \ 128 wr_opcode_name(LOCAL_INV), \ 129 wr_opcode_name(MASKED_ATOMIC_CMP_AND_SWP), \ 130 wr_opcode_name(MASKED_ATOMIC_FETCH_AND_ADD)) 131 132 #define POS_PRN \ 133 "[%s] wr_id %llx qpn %x psn 0x%x lpsn 0x%x length %u opcode 0x%.2x,%s size %u avail %u head %u last %u" 134 135 TRACE_EVENT( 136 rvt_post_one_wr, 137 TP_PROTO(struct rvt_qp *qp, struct rvt_swqe *wqe), 138 TP_ARGS(qp, wqe), 139 TP_STRUCT__entry( 140 RDI_DEV_ENTRY(ib_to_rvt(qp->ibqp.device)) 141 __field(u64, wr_id) 142 __field(u32, qpn) 143 __field(u32, psn) 144 __field(u32, lpsn) 145 __field(u32, length) 146 __field(u32, opcode) 147 __field(u32, size) 148 __field(u32, avail) 149 __field(u32, head) 150 __field(u32, last) 151 ), 152 TP_fast_assign( 153 RDI_DEV_ASSIGN(ib_to_rvt(qp->ibqp.device)) 154 __entry->wr_id = wqe->wr.wr_id; 155 __entry->qpn = qp->ibqp.qp_num; 156 __entry->psn = wqe->psn; 157 __entry->lpsn = wqe->lpsn; 158 __entry->length = wqe->length; 159 __entry->opcode = wqe->wr.opcode; 160 __entry->size = qp->s_size; 161 __entry->avail = qp->s_avail; 162 __entry->head = qp->s_head; 163 __entry->last = qp->s_last; 164 ), 165 TP_printk( 166 POS_PRN, 167 __get_str(dev), 168 __entry->wr_id, 169 __entry->qpn, 170 __entry->psn, 171 __entry->lpsn, 172 __entry->length, 173 __entry->opcode, show_wr_opcode(__entry->opcode), 174 __entry->size, 175 __entry->avail, 176 __entry->head, 177 __entry->last 178 ) 179 ); 180 181 #endif /* __RDMAVT_TRACE_H */ 182 183 #undef TRACE_INCLUDE_PATH 184 #undef TRACE_INCLUDE_FILE 185 #define TRACE_INCLUDE_PATH . 186 #define TRACE_INCLUDE_FILE trace 187 #include <trace/define_trace.h> 188