1 /*
2  * Copyright (c) 2012-2016 VMware, Inc.  All rights reserved.
3  *
4  * This program is free software; you can redistribute it and/or
5  * modify it under the terms of EITHER the GNU General Public License
6  * version 2 as published by the Free Software Foundation or the BSD
7  * 2-Clause License. This program is distributed in the hope that it
8  * will be useful, but WITHOUT ANY WARRANTY; WITHOUT EVEN THE IMPLIED
9  * WARRANTY OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE.
10  * See the GNU General Public License version 2 for more details at
11  * http://www.gnu.org/licenses/old-licenses/gpl-2.0.en.html.
12  *
13  * You should have received a copy of the GNU General Public License
14  * along with this program available in the file COPYING in the main
15  * directory of this source tree.
16  *
17  * The BSD 2-Clause License
18  *
19  *     Redistribution and use in source and binary forms, with or
20  *     without modification, are permitted provided that the following
21  *     conditions are met:
22  *
23  *      - Redistributions of source code must retain the above
24  *        copyright notice, this list of conditions and the following
25  *        disclaimer.
26  *
27  *      - Redistributions in binary form must reproduce the above
28  *        copyright notice, this list of conditions and the following
29  *        disclaimer in the documentation and/or other materials
30  *        provided with the distribution.
31  *
32  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
33  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
34  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
35  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
36  * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
37  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
38  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
39  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
40  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
41  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
42  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
43  * OF THE POSSIBILITY OF SUCH DAMAGE.
44  */
45 
46 #ifndef __PVRDMA_H__
47 #define __PVRDMA_H__
48 
49 #include <linux/compiler.h>
50 #include <linux/interrupt.h>
51 #include <linux/list.h>
52 #include <linux/mutex.h>
53 #include <linux/pci.h>
54 #include <linux/semaphore.h>
55 #include <linux/workqueue.h>
56 #include <rdma/ib_umem.h>
57 #include <rdma/ib_verbs.h>
58 #include <rdma/vmw_pvrdma-abi.h>
59 
60 #include "pvrdma_ring.h"
61 #include "pvrdma_dev_api.h"
62 #include "pvrdma_verbs.h"
63 
64 /* NOT the same as BIT_MASK(). */
65 #define PVRDMA_MASK(n) ((n << 1) - 1)
66 
67 /*
68  * VMware PVRDMA PCI device id.
69  */
70 #define PCI_DEVICE_ID_VMWARE_PVRDMA	0x0820
71 
72 #define PVRDMA_NUM_RING_PAGES		4
73 #define PVRDMA_QP_NUM_HEADER_PAGES	1
74 
75 struct pvrdma_dev;
76 
77 struct pvrdma_page_dir {
78 	dma_addr_t dir_dma;
79 	u64 *dir;
80 	int ntables;
81 	u64 **tables;
82 	u64 npages;
83 	void **pages;
84 };
85 
86 struct pvrdma_cq {
87 	struct ib_cq ibcq;
88 	int offset;
89 	spinlock_t cq_lock; /* Poll lock. */
90 	struct pvrdma_uar_map *uar;
91 	struct ib_umem *umem;
92 	struct pvrdma_ring_state *ring_state;
93 	struct pvrdma_page_dir pdir;
94 	u32 cq_handle;
95 	bool is_kernel;
96 	atomic_t refcnt;
97 	wait_queue_head_t wait;
98 };
99 
100 struct pvrdma_id_table {
101 	u32 last;
102 	u32 top;
103 	u32 max;
104 	u32 mask;
105 	spinlock_t lock; /* Table lock. */
106 	unsigned long *table;
107 };
108 
109 struct pvrdma_uar_map {
110 	unsigned long pfn;
111 	void __iomem *map;
112 	int index;
113 };
114 
115 struct pvrdma_uar_table {
116 	struct pvrdma_id_table tbl;
117 	int size;
118 };
119 
120 struct pvrdma_ucontext {
121 	struct ib_ucontext ibucontext;
122 	struct pvrdma_dev *dev;
123 	struct pvrdma_uar_map uar;
124 	u64 ctx_handle;
125 };
126 
127 struct pvrdma_pd {
128 	struct ib_pd ibpd;
129 	u32 pdn;
130 	u32 pd_handle;
131 	int privileged;
132 };
133 
134 struct pvrdma_mr {
135 	u32 mr_handle;
136 	u64 iova;
137 	u64 size;
138 };
139 
140 struct pvrdma_user_mr {
141 	struct ib_mr ibmr;
142 	struct ib_umem *umem;
143 	struct pvrdma_mr mmr;
144 	struct pvrdma_page_dir pdir;
145 	u64 *pages;
146 	u32 npages;
147 	u32 max_pages;
148 	u32 page_shift;
149 };
150 
151 struct pvrdma_wq {
152 	struct pvrdma_ring *ring;
153 	spinlock_t lock; /* Work queue lock. */
154 	int wqe_cnt;
155 	int wqe_size;
156 	int max_sg;
157 	int offset;
158 };
159 
160 struct pvrdma_ah {
161 	struct ib_ah ibah;
162 	struct pvrdma_av av;
163 };
164 
165 struct pvrdma_qp {
166 	struct ib_qp ibqp;
167 	u32 qp_handle;
168 	u32 qkey;
169 	struct pvrdma_wq sq;
170 	struct pvrdma_wq rq;
171 	struct ib_umem *rumem;
172 	struct ib_umem *sumem;
173 	struct pvrdma_page_dir pdir;
174 	int npages;
175 	int npages_send;
176 	int npages_recv;
177 	u32 flags;
178 	u8 port;
179 	u8 state;
180 	bool is_kernel;
181 	struct mutex mutex; /* QP state mutex. */
182 	atomic_t refcnt;
183 	wait_queue_head_t wait;
184 };
185 
186 struct pvrdma_dev {
187 	/* PCI device-related information. */
188 	struct ib_device ib_dev;
189 	struct pci_dev *pdev;
190 	void __iomem *regs;
191 	struct pvrdma_device_shared_region *dsr; /* Shared region pointer */
192 	dma_addr_t dsrbase; /* Shared region base address */
193 	void *cmd_slot;
194 	void *resp_slot;
195 	unsigned long flags;
196 	struct list_head device_link;
197 
198 	/* Locking and interrupt information. */
199 	spinlock_t cmd_lock; /* Command lock. */
200 	struct semaphore cmd_sema;
201 	struct completion cmd_done;
202 	unsigned int nr_vectors;
203 
204 	/* RDMA-related device information. */
205 	union ib_gid *sgid_tbl;
206 	struct pvrdma_ring_state *async_ring_state;
207 	struct pvrdma_page_dir async_pdir;
208 	struct pvrdma_ring_state *cq_ring_state;
209 	struct pvrdma_page_dir cq_pdir;
210 	struct pvrdma_cq **cq_tbl;
211 	spinlock_t cq_tbl_lock;
212 	struct pvrdma_qp **qp_tbl;
213 	spinlock_t qp_tbl_lock;
214 	struct pvrdma_uar_table uar_table;
215 	struct pvrdma_uar_map driver_uar;
216 	__be64 sys_image_guid;
217 	spinlock_t desc_lock; /* Device modification lock. */
218 	u32 port_cap_mask;
219 	struct mutex port_mutex; /* Port modification mutex. */
220 	bool ib_active;
221 	atomic_t num_qps;
222 	atomic_t num_cqs;
223 	atomic_t num_pds;
224 	atomic_t num_ahs;
225 
226 	/* Network device information. */
227 	struct net_device *netdev;
228 	struct notifier_block nb_netdev;
229 };
230 
231 struct pvrdma_netdevice_work {
232 	struct work_struct work;
233 	struct net_device *event_netdev;
234 	unsigned long event;
235 };
236 
237 static inline struct pvrdma_dev *to_vdev(struct ib_device *ibdev)
238 {
239 	return container_of(ibdev, struct pvrdma_dev, ib_dev);
240 }
241 
242 static inline struct
243 pvrdma_ucontext *to_vucontext(struct ib_ucontext *ibucontext)
244 {
245 	return container_of(ibucontext, struct pvrdma_ucontext, ibucontext);
246 }
247 
248 static inline struct pvrdma_pd *to_vpd(struct ib_pd *ibpd)
249 {
250 	return container_of(ibpd, struct pvrdma_pd, ibpd);
251 }
252 
253 static inline struct pvrdma_cq *to_vcq(struct ib_cq *ibcq)
254 {
255 	return container_of(ibcq, struct pvrdma_cq, ibcq);
256 }
257 
258 static inline struct pvrdma_user_mr *to_vmr(struct ib_mr *ibmr)
259 {
260 	return container_of(ibmr, struct pvrdma_user_mr, ibmr);
261 }
262 
263 static inline struct pvrdma_qp *to_vqp(struct ib_qp *ibqp)
264 {
265 	return container_of(ibqp, struct pvrdma_qp, ibqp);
266 }
267 
268 static inline struct pvrdma_ah *to_vah(struct ib_ah *ibah)
269 {
270 	return container_of(ibah, struct pvrdma_ah, ibah);
271 }
272 
273 static inline void pvrdma_write_reg(struct pvrdma_dev *dev, u32 reg, u32 val)
274 {
275 	writel(cpu_to_le32(val), dev->regs + reg);
276 }
277 
278 static inline u32 pvrdma_read_reg(struct pvrdma_dev *dev, u32 reg)
279 {
280 	return le32_to_cpu(readl(dev->regs + reg));
281 }
282 
283 static inline void pvrdma_write_uar_cq(struct pvrdma_dev *dev, u32 val)
284 {
285 	writel(cpu_to_le32(val), dev->driver_uar.map + PVRDMA_UAR_CQ_OFFSET);
286 }
287 
288 static inline void pvrdma_write_uar_qp(struct pvrdma_dev *dev, u32 val)
289 {
290 	writel(cpu_to_le32(val), dev->driver_uar.map + PVRDMA_UAR_QP_OFFSET);
291 }
292 
293 static inline void *pvrdma_page_dir_get_ptr(struct pvrdma_page_dir *pdir,
294 					    u64 offset)
295 {
296 	return pdir->pages[offset / PAGE_SIZE] + (offset % PAGE_SIZE);
297 }
298 
299 static inline enum pvrdma_mtu ib_mtu_to_pvrdma(enum ib_mtu mtu)
300 {
301 	return (enum pvrdma_mtu)mtu;
302 }
303 
304 static inline enum ib_mtu pvrdma_mtu_to_ib(enum pvrdma_mtu mtu)
305 {
306 	return (enum ib_mtu)mtu;
307 }
308 
309 static inline enum pvrdma_port_state ib_port_state_to_pvrdma(
310 					enum ib_port_state state)
311 {
312 	return (enum pvrdma_port_state)state;
313 }
314 
315 static inline enum ib_port_state pvrdma_port_state_to_ib(
316 					enum pvrdma_port_state state)
317 {
318 	return (enum ib_port_state)state;
319 }
320 
321 static inline int ib_port_cap_flags_to_pvrdma(int flags)
322 {
323 	return flags & PVRDMA_MASK(PVRDMA_PORT_CAP_FLAGS_MAX);
324 }
325 
326 static inline int pvrdma_port_cap_flags_to_ib(int flags)
327 {
328 	return flags;
329 }
330 
331 static inline enum pvrdma_port_width ib_port_width_to_pvrdma(
332 					enum ib_port_width width)
333 {
334 	return (enum pvrdma_port_width)width;
335 }
336 
337 static inline enum ib_port_width pvrdma_port_width_to_ib(
338 					enum pvrdma_port_width width)
339 {
340 	return (enum ib_port_width)width;
341 }
342 
343 static inline enum pvrdma_port_speed ib_port_speed_to_pvrdma(
344 					enum ib_port_speed speed)
345 {
346 	return (enum pvrdma_port_speed)speed;
347 }
348 
349 static inline enum ib_port_speed pvrdma_port_speed_to_ib(
350 					enum pvrdma_port_speed speed)
351 {
352 	return (enum ib_port_speed)speed;
353 }
354 
355 static inline int pvrdma_qp_attr_mask_to_ib(int attr_mask)
356 {
357 	return attr_mask;
358 }
359 
360 static inline int ib_qp_attr_mask_to_pvrdma(int attr_mask)
361 {
362 	return attr_mask & PVRDMA_MASK(PVRDMA_QP_ATTR_MASK_MAX);
363 }
364 
365 static inline enum pvrdma_mig_state ib_mig_state_to_pvrdma(
366 					enum ib_mig_state state)
367 {
368 	return (enum pvrdma_mig_state)state;
369 }
370 
371 static inline enum ib_mig_state pvrdma_mig_state_to_ib(
372 					enum pvrdma_mig_state state)
373 {
374 	return (enum ib_mig_state)state;
375 }
376 
377 static inline int ib_access_flags_to_pvrdma(int flags)
378 {
379 	return flags;
380 }
381 
382 static inline int pvrdma_access_flags_to_ib(int flags)
383 {
384 	return flags & PVRDMA_MASK(PVRDMA_ACCESS_FLAGS_MAX);
385 }
386 
387 static inline enum pvrdma_qp_type ib_qp_type_to_pvrdma(enum ib_qp_type type)
388 {
389 	return (enum pvrdma_qp_type)type;
390 }
391 
392 static inline enum ib_qp_type pvrdma_qp_type_to_ib(enum pvrdma_qp_type type)
393 {
394 	return (enum ib_qp_type)type;
395 }
396 
397 static inline enum pvrdma_qp_state ib_qp_state_to_pvrdma(enum ib_qp_state state)
398 {
399 	return (enum pvrdma_qp_state)state;
400 }
401 
402 static inline enum ib_qp_state pvrdma_qp_state_to_ib(enum pvrdma_qp_state state)
403 {
404 	return (enum ib_qp_state)state;
405 }
406 
407 static inline enum pvrdma_wr_opcode ib_wr_opcode_to_pvrdma(enum ib_wr_opcode op)
408 {
409 	return (enum pvrdma_wr_opcode)op;
410 }
411 
412 static inline enum ib_wc_status pvrdma_wc_status_to_ib(
413 					enum pvrdma_wc_status status)
414 {
415 	return (enum ib_wc_status)status;
416 }
417 
418 static inline int pvrdma_wc_opcode_to_ib(int opcode)
419 {
420 	return opcode;
421 }
422 
423 static inline int pvrdma_wc_flags_to_ib(int flags)
424 {
425 	return flags;
426 }
427 
428 static inline int ib_send_flags_to_pvrdma(int flags)
429 {
430 	return flags & PVRDMA_MASK(PVRDMA_SEND_FLAGS_MAX);
431 }
432 
433 void pvrdma_qp_cap_to_ib(struct ib_qp_cap *dst,
434 			 const struct pvrdma_qp_cap *src);
435 void ib_qp_cap_to_pvrdma(struct pvrdma_qp_cap *dst,
436 			 const struct ib_qp_cap *src);
437 void pvrdma_gid_to_ib(union ib_gid *dst, const union pvrdma_gid *src);
438 void ib_gid_to_pvrdma(union pvrdma_gid *dst, const union ib_gid *src);
439 void pvrdma_global_route_to_ib(struct ib_global_route *dst,
440 			       const struct pvrdma_global_route *src);
441 void ib_global_route_to_pvrdma(struct pvrdma_global_route *dst,
442 			       const struct ib_global_route *src);
443 void pvrdma_ah_attr_to_rdma(struct rdma_ah_attr *dst,
444 			    const struct pvrdma_ah_attr *src);
445 void rdma_ah_attr_to_pvrdma(struct pvrdma_ah_attr *dst,
446 			    const struct rdma_ah_attr *src);
447 
448 int pvrdma_uar_table_init(struct pvrdma_dev *dev);
449 void pvrdma_uar_table_cleanup(struct pvrdma_dev *dev);
450 
451 int pvrdma_uar_alloc(struct pvrdma_dev *dev, struct pvrdma_uar_map *uar);
452 void pvrdma_uar_free(struct pvrdma_dev *dev, struct pvrdma_uar_map *uar);
453 
454 void _pvrdma_flush_cqe(struct pvrdma_qp *qp, struct pvrdma_cq *cq);
455 
456 int pvrdma_page_dir_init(struct pvrdma_dev *dev, struct pvrdma_page_dir *pdir,
457 			 u64 npages, bool alloc_pages);
458 void pvrdma_page_dir_cleanup(struct pvrdma_dev *dev,
459 			     struct pvrdma_page_dir *pdir);
460 int pvrdma_page_dir_insert_dma(struct pvrdma_page_dir *pdir, u64 idx,
461 			       dma_addr_t daddr);
462 int pvrdma_page_dir_insert_umem(struct pvrdma_page_dir *pdir,
463 				struct ib_umem *umem, u64 offset);
464 dma_addr_t pvrdma_page_dir_get_dma(struct pvrdma_page_dir *pdir, u64 idx);
465 int pvrdma_page_dir_insert_page_list(struct pvrdma_page_dir *pdir,
466 				     u64 *page_list, int num_pages);
467 
468 int pvrdma_cmd_post(struct pvrdma_dev *dev, union pvrdma_cmd_req *req,
469 		    union pvrdma_cmd_resp *rsp, unsigned resp_code);
470 
471 #endif /* __PVRDMA_H__ */
472