1 /* 2 * Copyright (c) 2006, 2007, 2008, 2009, 2010 QLogic Corporation. 3 * All rights reserved. 4 * Copyright (c) 2005, 2006 PathScale, Inc. All rights reserved. 5 * 6 * This software is available to you under a choice of one of two 7 * licenses. You may choose to be licensed under the terms of the GNU 8 * General Public License (GPL) Version 2, available from the file 9 * COPYING in the main directory of this source tree, or the 10 * OpenIB.org BSD license below: 11 * 12 * Redistribution and use in source and binary forms, with or 13 * without modification, are permitted provided that the following 14 * conditions are met: 15 * 16 * - Redistributions of source code must retain the above 17 * copyright notice, this list of conditions and the following 18 * disclaimer. 19 * 20 * - Redistributions in binary form must reproduce the above 21 * copyright notice, this list of conditions and the following 22 * disclaimer in the documentation and/or other materials 23 * provided with the distribution. 24 * 25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 32 * SOFTWARE. 33 */ 34 35 #include "qib.h" 36 37 /* cut down ridiculously long IB macro names */ 38 #define OP(x) IB_OPCODE_UC_##x 39 40 /** 41 * qib_make_uc_req - construct a request packet (SEND, RDMA write) 42 * @qp: a pointer to the QP 43 * 44 * Return 1 if constructed; otherwise, return 0. 45 */ 46 int qib_make_uc_req(struct qib_qp *qp) 47 { 48 struct qib_other_headers *ohdr; 49 struct qib_swqe *wqe; 50 unsigned long flags; 51 u32 hwords; 52 u32 bth0; 53 u32 len; 54 u32 pmtu = qp->pmtu; 55 int ret = 0; 56 57 spin_lock_irqsave(&qp->s_lock, flags); 58 59 if (!(ib_qib_state_ops[qp->state] & QIB_PROCESS_SEND_OK)) { 60 if (!(ib_qib_state_ops[qp->state] & QIB_FLUSH_SEND)) 61 goto bail; 62 /* We are in the error state, flush the work request. */ 63 if (qp->s_last == qp->s_head) 64 goto bail; 65 /* If DMAs are in progress, we can't flush immediately. */ 66 if (atomic_read(&qp->s_dma_busy)) { 67 qp->s_flags |= QIB_S_WAIT_DMA; 68 goto bail; 69 } 70 wqe = get_swqe_ptr(qp, qp->s_last); 71 qib_send_complete(qp, wqe, IB_WC_WR_FLUSH_ERR); 72 goto done; 73 } 74 75 ohdr = &qp->s_hdr->u.oth; 76 if (qp->remote_ah_attr.ah_flags & IB_AH_GRH) 77 ohdr = &qp->s_hdr->u.l.oth; 78 79 /* header size in 32-bit words LRH+BTH = (8+12)/4. */ 80 hwords = 5; 81 bth0 = 0; 82 83 /* Get the next send request. */ 84 wqe = get_swqe_ptr(qp, qp->s_cur); 85 qp->s_wqe = NULL; 86 switch (qp->s_state) { 87 default: 88 if (!(ib_qib_state_ops[qp->state] & 89 QIB_PROCESS_NEXT_SEND_OK)) 90 goto bail; 91 /* Check if send work queue is empty. */ 92 if (qp->s_cur == qp->s_head) 93 goto bail; 94 /* 95 * Start a new request. 96 */ 97 wqe->psn = qp->s_next_psn; 98 qp->s_psn = qp->s_next_psn; 99 qp->s_sge.sge = wqe->sg_list[0]; 100 qp->s_sge.sg_list = wqe->sg_list + 1; 101 qp->s_sge.num_sge = wqe->wr.num_sge; 102 qp->s_sge.total_len = wqe->length; 103 len = wqe->length; 104 qp->s_len = len; 105 switch (wqe->wr.opcode) { 106 case IB_WR_SEND: 107 case IB_WR_SEND_WITH_IMM: 108 if (len > pmtu) { 109 qp->s_state = OP(SEND_FIRST); 110 len = pmtu; 111 break; 112 } 113 if (wqe->wr.opcode == IB_WR_SEND) 114 qp->s_state = OP(SEND_ONLY); 115 else { 116 qp->s_state = 117 OP(SEND_ONLY_WITH_IMMEDIATE); 118 /* Immediate data comes after the BTH */ 119 ohdr->u.imm_data = wqe->wr.ex.imm_data; 120 hwords += 1; 121 } 122 if (wqe->wr.send_flags & IB_SEND_SOLICITED) 123 bth0 |= IB_BTH_SOLICITED; 124 qp->s_wqe = wqe; 125 if (++qp->s_cur >= qp->s_size) 126 qp->s_cur = 0; 127 break; 128 129 case IB_WR_RDMA_WRITE: 130 case IB_WR_RDMA_WRITE_WITH_IMM: 131 ohdr->u.rc.reth.vaddr = 132 cpu_to_be64(wqe->rdma_wr.remote_addr); 133 ohdr->u.rc.reth.rkey = 134 cpu_to_be32(wqe->rdma_wr.rkey); 135 ohdr->u.rc.reth.length = cpu_to_be32(len); 136 hwords += sizeof(struct ib_reth) / 4; 137 if (len > pmtu) { 138 qp->s_state = OP(RDMA_WRITE_FIRST); 139 len = pmtu; 140 break; 141 } 142 if (wqe->wr.opcode == IB_WR_RDMA_WRITE) 143 qp->s_state = OP(RDMA_WRITE_ONLY); 144 else { 145 qp->s_state = 146 OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE); 147 /* Immediate data comes after the RETH */ 148 ohdr->u.rc.imm_data = wqe->wr.ex.imm_data; 149 hwords += 1; 150 if (wqe->wr.send_flags & IB_SEND_SOLICITED) 151 bth0 |= IB_BTH_SOLICITED; 152 } 153 qp->s_wqe = wqe; 154 if (++qp->s_cur >= qp->s_size) 155 qp->s_cur = 0; 156 break; 157 158 default: 159 goto bail; 160 } 161 break; 162 163 case OP(SEND_FIRST): 164 qp->s_state = OP(SEND_MIDDLE); 165 /* FALLTHROUGH */ 166 case OP(SEND_MIDDLE): 167 len = qp->s_len; 168 if (len > pmtu) { 169 len = pmtu; 170 break; 171 } 172 if (wqe->wr.opcode == IB_WR_SEND) 173 qp->s_state = OP(SEND_LAST); 174 else { 175 qp->s_state = OP(SEND_LAST_WITH_IMMEDIATE); 176 /* Immediate data comes after the BTH */ 177 ohdr->u.imm_data = wqe->wr.ex.imm_data; 178 hwords += 1; 179 } 180 if (wqe->wr.send_flags & IB_SEND_SOLICITED) 181 bth0 |= IB_BTH_SOLICITED; 182 qp->s_wqe = wqe; 183 if (++qp->s_cur >= qp->s_size) 184 qp->s_cur = 0; 185 break; 186 187 case OP(RDMA_WRITE_FIRST): 188 qp->s_state = OP(RDMA_WRITE_MIDDLE); 189 /* FALLTHROUGH */ 190 case OP(RDMA_WRITE_MIDDLE): 191 len = qp->s_len; 192 if (len > pmtu) { 193 len = pmtu; 194 break; 195 } 196 if (wqe->wr.opcode == IB_WR_RDMA_WRITE) 197 qp->s_state = OP(RDMA_WRITE_LAST); 198 else { 199 qp->s_state = 200 OP(RDMA_WRITE_LAST_WITH_IMMEDIATE); 201 /* Immediate data comes after the BTH */ 202 ohdr->u.imm_data = wqe->wr.ex.imm_data; 203 hwords += 1; 204 if (wqe->wr.send_flags & IB_SEND_SOLICITED) 205 bth0 |= IB_BTH_SOLICITED; 206 } 207 qp->s_wqe = wqe; 208 if (++qp->s_cur >= qp->s_size) 209 qp->s_cur = 0; 210 break; 211 } 212 qp->s_len -= len; 213 qp->s_hdrwords = hwords; 214 qp->s_cur_sge = &qp->s_sge; 215 qp->s_cur_size = len; 216 qib_make_ruc_header(qp, ohdr, bth0 | (qp->s_state << 24), 217 qp->s_next_psn++ & QIB_PSN_MASK); 218 done: 219 ret = 1; 220 goto unlock; 221 222 bail: 223 qp->s_flags &= ~QIB_S_BUSY; 224 unlock: 225 spin_unlock_irqrestore(&qp->s_lock, flags); 226 return ret; 227 } 228 229 /** 230 * qib_uc_rcv - handle an incoming UC packet 231 * @ibp: the port the packet came in on 232 * @hdr: the header of the packet 233 * @has_grh: true if the packet has a GRH 234 * @data: the packet data 235 * @tlen: the length of the packet 236 * @qp: the QP for this packet. 237 * 238 * This is called from qib_qp_rcv() to process an incoming UC packet 239 * for the given QP. 240 * Called at interrupt level. 241 */ 242 void qib_uc_rcv(struct qib_ibport *ibp, struct qib_ib_header *hdr, 243 int has_grh, void *data, u32 tlen, struct qib_qp *qp) 244 { 245 struct qib_other_headers *ohdr; 246 u32 opcode; 247 u32 hdrsize; 248 u32 psn; 249 u32 pad; 250 struct ib_wc wc; 251 u32 pmtu = qp->pmtu; 252 struct ib_reth *reth; 253 int ret; 254 255 /* Check for GRH */ 256 if (!has_grh) { 257 ohdr = &hdr->u.oth; 258 hdrsize = 8 + 12; /* LRH + BTH */ 259 } else { 260 ohdr = &hdr->u.l.oth; 261 hdrsize = 8 + 40 + 12; /* LRH + GRH + BTH */ 262 } 263 264 opcode = be32_to_cpu(ohdr->bth[0]); 265 if (qib_ruc_check_hdr(ibp, hdr, has_grh, qp, opcode)) 266 return; 267 268 psn = be32_to_cpu(ohdr->bth[2]); 269 opcode >>= 24; 270 271 /* Compare the PSN verses the expected PSN. */ 272 if (unlikely(qib_cmp24(psn, qp->r_psn) != 0)) { 273 /* 274 * Handle a sequence error. 275 * Silently drop any current message. 276 */ 277 qp->r_psn = psn; 278 inv: 279 if (qp->r_state == OP(SEND_FIRST) || 280 qp->r_state == OP(SEND_MIDDLE)) { 281 set_bit(QIB_R_REWIND_SGE, &qp->r_aflags); 282 qp->r_sge.num_sge = 0; 283 } else 284 qib_put_ss(&qp->r_sge); 285 qp->r_state = OP(SEND_LAST); 286 switch (opcode) { 287 case OP(SEND_FIRST): 288 case OP(SEND_ONLY): 289 case OP(SEND_ONLY_WITH_IMMEDIATE): 290 goto send_first; 291 292 case OP(RDMA_WRITE_FIRST): 293 case OP(RDMA_WRITE_ONLY): 294 case OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE): 295 goto rdma_first; 296 297 default: 298 goto drop; 299 } 300 } 301 302 /* Check for opcode sequence errors. */ 303 switch (qp->r_state) { 304 case OP(SEND_FIRST): 305 case OP(SEND_MIDDLE): 306 if (opcode == OP(SEND_MIDDLE) || 307 opcode == OP(SEND_LAST) || 308 opcode == OP(SEND_LAST_WITH_IMMEDIATE)) 309 break; 310 goto inv; 311 312 case OP(RDMA_WRITE_FIRST): 313 case OP(RDMA_WRITE_MIDDLE): 314 if (opcode == OP(RDMA_WRITE_MIDDLE) || 315 opcode == OP(RDMA_WRITE_LAST) || 316 opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE)) 317 break; 318 goto inv; 319 320 default: 321 if (opcode == OP(SEND_FIRST) || 322 opcode == OP(SEND_ONLY) || 323 opcode == OP(SEND_ONLY_WITH_IMMEDIATE) || 324 opcode == OP(RDMA_WRITE_FIRST) || 325 opcode == OP(RDMA_WRITE_ONLY) || 326 opcode == OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE)) 327 break; 328 goto inv; 329 } 330 331 if (qp->state == IB_QPS_RTR && !(qp->r_flags & QIB_R_COMM_EST)) { 332 qp->r_flags |= QIB_R_COMM_EST; 333 if (qp->ibqp.event_handler) { 334 struct ib_event ev; 335 336 ev.device = qp->ibqp.device; 337 ev.element.qp = &qp->ibqp; 338 ev.event = IB_EVENT_COMM_EST; 339 qp->ibqp.event_handler(&ev, qp->ibqp.qp_context); 340 } 341 } 342 343 /* OK, process the packet. */ 344 switch (opcode) { 345 case OP(SEND_FIRST): 346 case OP(SEND_ONLY): 347 case OP(SEND_ONLY_WITH_IMMEDIATE): 348 send_first: 349 if (test_and_clear_bit(QIB_R_REWIND_SGE, &qp->r_aflags)) 350 qp->r_sge = qp->s_rdma_read_sge; 351 else { 352 ret = qib_get_rwqe(qp, 0); 353 if (ret < 0) 354 goto op_err; 355 if (!ret) 356 goto drop; 357 /* 358 * qp->s_rdma_read_sge will be the owner 359 * of the mr references. 360 */ 361 qp->s_rdma_read_sge = qp->r_sge; 362 } 363 qp->r_rcv_len = 0; 364 if (opcode == OP(SEND_ONLY)) 365 goto no_immediate_data; 366 else if (opcode == OP(SEND_ONLY_WITH_IMMEDIATE)) 367 goto send_last_imm; 368 /* FALLTHROUGH */ 369 case OP(SEND_MIDDLE): 370 /* Check for invalid length PMTU or posted rwqe len. */ 371 if (unlikely(tlen != (hdrsize + pmtu + 4))) 372 goto rewind; 373 qp->r_rcv_len += pmtu; 374 if (unlikely(qp->r_rcv_len > qp->r_len)) 375 goto rewind; 376 qib_copy_sge(&qp->r_sge, data, pmtu, 0); 377 break; 378 379 case OP(SEND_LAST_WITH_IMMEDIATE): 380 send_last_imm: 381 wc.ex.imm_data = ohdr->u.imm_data; 382 hdrsize += 4; 383 wc.wc_flags = IB_WC_WITH_IMM; 384 goto send_last; 385 case OP(SEND_LAST): 386 no_immediate_data: 387 wc.ex.imm_data = 0; 388 wc.wc_flags = 0; 389 send_last: 390 /* Get the number of bytes the message was padded by. */ 391 pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3; 392 /* Check for invalid length. */ 393 /* XXX LAST len should be >= 1 */ 394 if (unlikely(tlen < (hdrsize + pad + 4))) 395 goto rewind; 396 /* Don't count the CRC. */ 397 tlen -= (hdrsize + pad + 4); 398 wc.byte_len = tlen + qp->r_rcv_len; 399 if (unlikely(wc.byte_len > qp->r_len)) 400 goto rewind; 401 wc.opcode = IB_WC_RECV; 402 qib_copy_sge(&qp->r_sge, data, tlen, 0); 403 qib_put_ss(&qp->s_rdma_read_sge); 404 last_imm: 405 wc.wr_id = qp->r_wr_id; 406 wc.status = IB_WC_SUCCESS; 407 wc.qp = &qp->ibqp; 408 wc.src_qp = qp->remote_qpn; 409 wc.slid = qp->remote_ah_attr.dlid; 410 wc.sl = qp->remote_ah_attr.sl; 411 /* zero fields that are N/A */ 412 wc.vendor_err = 0; 413 wc.pkey_index = 0; 414 wc.dlid_path_bits = 0; 415 wc.port_num = 0; 416 /* Signal completion event if the solicited bit is set. */ 417 qib_cq_enter(to_icq(qp->ibqp.recv_cq), &wc, 418 (ohdr->bth[0] & 419 cpu_to_be32(IB_BTH_SOLICITED)) != 0); 420 break; 421 422 case OP(RDMA_WRITE_FIRST): 423 case OP(RDMA_WRITE_ONLY): 424 case OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE): /* consume RWQE */ 425 rdma_first: 426 if (unlikely(!(qp->qp_access_flags & 427 IB_ACCESS_REMOTE_WRITE))) { 428 goto drop; 429 } 430 reth = &ohdr->u.rc.reth; 431 hdrsize += sizeof(*reth); 432 qp->r_len = be32_to_cpu(reth->length); 433 qp->r_rcv_len = 0; 434 qp->r_sge.sg_list = NULL; 435 if (qp->r_len != 0) { 436 u32 rkey = be32_to_cpu(reth->rkey); 437 u64 vaddr = be64_to_cpu(reth->vaddr); 438 int ok; 439 440 /* Check rkey */ 441 ok = qib_rkey_ok(qp, &qp->r_sge.sge, qp->r_len, 442 vaddr, rkey, IB_ACCESS_REMOTE_WRITE); 443 if (unlikely(!ok)) 444 goto drop; 445 qp->r_sge.num_sge = 1; 446 } else { 447 qp->r_sge.num_sge = 0; 448 qp->r_sge.sge.mr = NULL; 449 qp->r_sge.sge.vaddr = NULL; 450 qp->r_sge.sge.length = 0; 451 qp->r_sge.sge.sge_length = 0; 452 } 453 if (opcode == OP(RDMA_WRITE_ONLY)) 454 goto rdma_last; 455 else if (opcode == OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE)) { 456 wc.ex.imm_data = ohdr->u.rc.imm_data; 457 goto rdma_last_imm; 458 } 459 /* FALLTHROUGH */ 460 case OP(RDMA_WRITE_MIDDLE): 461 /* Check for invalid length PMTU or posted rwqe len. */ 462 if (unlikely(tlen != (hdrsize + pmtu + 4))) 463 goto drop; 464 qp->r_rcv_len += pmtu; 465 if (unlikely(qp->r_rcv_len > qp->r_len)) 466 goto drop; 467 qib_copy_sge(&qp->r_sge, data, pmtu, 1); 468 break; 469 470 case OP(RDMA_WRITE_LAST_WITH_IMMEDIATE): 471 wc.ex.imm_data = ohdr->u.imm_data; 472 rdma_last_imm: 473 hdrsize += 4; 474 wc.wc_flags = IB_WC_WITH_IMM; 475 476 /* Get the number of bytes the message was padded by. */ 477 pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3; 478 /* Check for invalid length. */ 479 /* XXX LAST len should be >= 1 */ 480 if (unlikely(tlen < (hdrsize + pad + 4))) 481 goto drop; 482 /* Don't count the CRC. */ 483 tlen -= (hdrsize + pad + 4); 484 if (unlikely(tlen + qp->r_rcv_len != qp->r_len)) 485 goto drop; 486 if (test_and_clear_bit(QIB_R_REWIND_SGE, &qp->r_aflags)) 487 qib_put_ss(&qp->s_rdma_read_sge); 488 else { 489 ret = qib_get_rwqe(qp, 1); 490 if (ret < 0) 491 goto op_err; 492 if (!ret) 493 goto drop; 494 } 495 wc.byte_len = qp->r_len; 496 wc.opcode = IB_WC_RECV_RDMA_WITH_IMM; 497 qib_copy_sge(&qp->r_sge, data, tlen, 1); 498 qib_put_ss(&qp->r_sge); 499 goto last_imm; 500 501 case OP(RDMA_WRITE_LAST): 502 rdma_last: 503 /* Get the number of bytes the message was padded by. */ 504 pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3; 505 /* Check for invalid length. */ 506 /* XXX LAST len should be >= 1 */ 507 if (unlikely(tlen < (hdrsize + pad + 4))) 508 goto drop; 509 /* Don't count the CRC. */ 510 tlen -= (hdrsize + pad + 4); 511 if (unlikely(tlen + qp->r_rcv_len != qp->r_len)) 512 goto drop; 513 qib_copy_sge(&qp->r_sge, data, tlen, 1); 514 qib_put_ss(&qp->r_sge); 515 break; 516 517 default: 518 /* Drop packet for unknown opcodes. */ 519 goto drop; 520 } 521 qp->r_psn++; 522 qp->r_state = opcode; 523 return; 524 525 rewind: 526 set_bit(QIB_R_REWIND_SGE, &qp->r_aflags); 527 qp->r_sge.num_sge = 0; 528 drop: 529 ibp->n_pkt_drops++; 530 return; 531 532 op_err: 533 qib_rc_error(qp, IB_WC_LOC_QP_OP_ERR); 534 return; 535 536 } 537