1 /* 2 * Copyright (c) 2006, 2007, 2008, 2009 QLogic Corporation. All rights reserved. 3 * Copyright (c) 2005, 2006 PathScale, Inc. All rights reserved. 4 * 5 * This software is available to you under a choice of one of two 6 * licenses. You may choose to be licensed under the terms of the GNU 7 * General Public License (GPL) Version 2, available from the file 8 * COPYING in the main directory of this source tree, or the 9 * OpenIB.org BSD license below: 10 * 11 * Redistribution and use in source and binary forms, with or 12 * without modification, are permitted provided that the following 13 * conditions are met: 14 * 15 * - Redistributions of source code must retain the above 16 * copyright notice, this list of conditions and the following 17 * disclaimer. 18 * 19 * - Redistributions in binary form must reproduce the above 20 * copyright notice, this list of conditions and the following 21 * disclaimer in the documentation and/or other materials 22 * provided with the distribution. 23 * 24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 31 * SOFTWARE. 32 */ 33 34 #include <linux/io.h> 35 36 #include "qib.h" 37 38 /* cut down ridiculously long IB macro names */ 39 #define OP(x) IB_OPCODE_RC_##x 40 41 static void rc_timeout(unsigned long arg); 42 43 static u32 restart_sge(struct qib_sge_state *ss, struct qib_swqe *wqe, 44 u32 psn, u32 pmtu) 45 { 46 u32 len; 47 48 len = ((psn - wqe->psn) & QIB_PSN_MASK) * pmtu; 49 ss->sge = wqe->sg_list[0]; 50 ss->sg_list = wqe->sg_list + 1; 51 ss->num_sge = wqe->wr.num_sge; 52 ss->total_len = wqe->length; 53 qib_skip_sge(ss, len, 0); 54 return wqe->length - len; 55 } 56 57 static void start_timer(struct qib_qp *qp) 58 { 59 qp->s_flags |= QIB_S_TIMER; 60 qp->s_timer.function = rc_timeout; 61 /* 4.096 usec. * (1 << qp->timeout) */ 62 qp->s_timer.expires = jiffies + 63 usecs_to_jiffies((4096UL * (1UL << qp->timeout)) / 1000UL); 64 add_timer(&qp->s_timer); 65 } 66 67 /** 68 * qib_make_rc_ack - construct a response packet (ACK, NAK, or RDMA read) 69 * @dev: the device for this QP 70 * @qp: a pointer to the QP 71 * @ohdr: a pointer to the IB header being constructed 72 * @pmtu: the path MTU 73 * 74 * Return 1 if constructed; otherwise, return 0. 75 * Note that we are in the responder's side of the QP context. 76 * Note the QP s_lock must be held. 77 */ 78 static int qib_make_rc_ack(struct qib_ibdev *dev, struct qib_qp *qp, 79 struct qib_other_headers *ohdr, u32 pmtu) 80 { 81 struct qib_ack_entry *e; 82 u32 hwords; 83 u32 len; 84 u32 bth0; 85 u32 bth2; 86 87 /* Don't send an ACK if we aren't supposed to. */ 88 if (!(ib_qib_state_ops[qp->state] & QIB_PROCESS_RECV_OK)) 89 goto bail; 90 91 /* header size in 32-bit words LRH+BTH = (8+12)/4. */ 92 hwords = 5; 93 94 switch (qp->s_ack_state) { 95 case OP(RDMA_READ_RESPONSE_LAST): 96 case OP(RDMA_READ_RESPONSE_ONLY): 97 e = &qp->s_ack_queue[qp->s_tail_ack_queue]; 98 if (e->rdma_sge.mr) { 99 atomic_dec(&e->rdma_sge.mr->refcount); 100 e->rdma_sge.mr = NULL; 101 } 102 /* FALLTHROUGH */ 103 case OP(ATOMIC_ACKNOWLEDGE): 104 /* 105 * We can increment the tail pointer now that the last 106 * response has been sent instead of only being 107 * constructed. 108 */ 109 if (++qp->s_tail_ack_queue > QIB_MAX_RDMA_ATOMIC) 110 qp->s_tail_ack_queue = 0; 111 /* FALLTHROUGH */ 112 case OP(SEND_ONLY): 113 case OP(ACKNOWLEDGE): 114 /* Check for no next entry in the queue. */ 115 if (qp->r_head_ack_queue == qp->s_tail_ack_queue) { 116 if (qp->s_flags & QIB_S_ACK_PENDING) 117 goto normal; 118 goto bail; 119 } 120 121 e = &qp->s_ack_queue[qp->s_tail_ack_queue]; 122 if (e->opcode == OP(RDMA_READ_REQUEST)) { 123 /* 124 * If a RDMA read response is being resent and 125 * we haven't seen the duplicate request yet, 126 * then stop sending the remaining responses the 127 * responder has seen until the requester resends it. 128 */ 129 len = e->rdma_sge.sge_length; 130 if (len && !e->rdma_sge.mr) { 131 qp->s_tail_ack_queue = qp->r_head_ack_queue; 132 goto bail; 133 } 134 /* Copy SGE state in case we need to resend */ 135 qp->s_rdma_mr = e->rdma_sge.mr; 136 if (qp->s_rdma_mr) 137 atomic_inc(&qp->s_rdma_mr->refcount); 138 qp->s_ack_rdma_sge.sge = e->rdma_sge; 139 qp->s_ack_rdma_sge.num_sge = 1; 140 qp->s_cur_sge = &qp->s_ack_rdma_sge; 141 if (len > pmtu) { 142 len = pmtu; 143 qp->s_ack_state = OP(RDMA_READ_RESPONSE_FIRST); 144 } else { 145 qp->s_ack_state = OP(RDMA_READ_RESPONSE_ONLY); 146 e->sent = 1; 147 } 148 ohdr->u.aeth = qib_compute_aeth(qp); 149 hwords++; 150 qp->s_ack_rdma_psn = e->psn; 151 bth2 = qp->s_ack_rdma_psn++ & QIB_PSN_MASK; 152 } else { 153 /* COMPARE_SWAP or FETCH_ADD */ 154 qp->s_cur_sge = NULL; 155 len = 0; 156 qp->s_ack_state = OP(ATOMIC_ACKNOWLEDGE); 157 ohdr->u.at.aeth = qib_compute_aeth(qp); 158 ohdr->u.at.atomic_ack_eth[0] = 159 cpu_to_be32(e->atomic_data >> 32); 160 ohdr->u.at.atomic_ack_eth[1] = 161 cpu_to_be32(e->atomic_data); 162 hwords += sizeof(ohdr->u.at) / sizeof(u32); 163 bth2 = e->psn & QIB_PSN_MASK; 164 e->sent = 1; 165 } 166 bth0 = qp->s_ack_state << 24; 167 break; 168 169 case OP(RDMA_READ_RESPONSE_FIRST): 170 qp->s_ack_state = OP(RDMA_READ_RESPONSE_MIDDLE); 171 /* FALLTHROUGH */ 172 case OP(RDMA_READ_RESPONSE_MIDDLE): 173 qp->s_cur_sge = &qp->s_ack_rdma_sge; 174 qp->s_rdma_mr = qp->s_ack_rdma_sge.sge.mr; 175 if (qp->s_rdma_mr) 176 atomic_inc(&qp->s_rdma_mr->refcount); 177 len = qp->s_ack_rdma_sge.sge.sge_length; 178 if (len > pmtu) 179 len = pmtu; 180 else { 181 ohdr->u.aeth = qib_compute_aeth(qp); 182 hwords++; 183 qp->s_ack_state = OP(RDMA_READ_RESPONSE_LAST); 184 e = &qp->s_ack_queue[qp->s_tail_ack_queue]; 185 e->sent = 1; 186 } 187 bth0 = qp->s_ack_state << 24; 188 bth2 = qp->s_ack_rdma_psn++ & QIB_PSN_MASK; 189 break; 190 191 default: 192 normal: 193 /* 194 * Send a regular ACK. 195 * Set the s_ack_state so we wait until after sending 196 * the ACK before setting s_ack_state to ACKNOWLEDGE 197 * (see above). 198 */ 199 qp->s_ack_state = OP(SEND_ONLY); 200 qp->s_flags &= ~QIB_S_ACK_PENDING; 201 qp->s_cur_sge = NULL; 202 if (qp->s_nak_state) 203 ohdr->u.aeth = 204 cpu_to_be32((qp->r_msn & QIB_MSN_MASK) | 205 (qp->s_nak_state << 206 QIB_AETH_CREDIT_SHIFT)); 207 else 208 ohdr->u.aeth = qib_compute_aeth(qp); 209 hwords++; 210 len = 0; 211 bth0 = OP(ACKNOWLEDGE) << 24; 212 bth2 = qp->s_ack_psn & QIB_PSN_MASK; 213 } 214 qp->s_rdma_ack_cnt++; 215 qp->s_hdrwords = hwords; 216 qp->s_cur_size = len; 217 qib_make_ruc_header(qp, ohdr, bth0, bth2); 218 return 1; 219 220 bail: 221 qp->s_ack_state = OP(ACKNOWLEDGE); 222 qp->s_flags &= ~(QIB_S_RESP_PENDING | QIB_S_ACK_PENDING); 223 return 0; 224 } 225 226 /** 227 * qib_make_rc_req - construct a request packet (SEND, RDMA r/w, ATOMIC) 228 * @qp: a pointer to the QP 229 * 230 * Return 1 if constructed; otherwise, return 0. 231 */ 232 int qib_make_rc_req(struct qib_qp *qp) 233 { 234 struct qib_ibdev *dev = to_idev(qp->ibqp.device); 235 struct qib_other_headers *ohdr; 236 struct qib_sge_state *ss; 237 struct qib_swqe *wqe; 238 u32 hwords; 239 u32 len; 240 u32 bth0; 241 u32 bth2; 242 u32 pmtu = ib_mtu_enum_to_int(qp->path_mtu); 243 char newreq; 244 unsigned long flags; 245 int ret = 0; 246 int delta; 247 248 ohdr = &qp->s_hdr.u.oth; 249 if (qp->remote_ah_attr.ah_flags & IB_AH_GRH) 250 ohdr = &qp->s_hdr.u.l.oth; 251 252 /* 253 * The lock is needed to synchronize between the sending tasklet, 254 * the receive interrupt handler, and timeout resends. 255 */ 256 spin_lock_irqsave(&qp->s_lock, flags); 257 258 /* Sending responses has higher priority over sending requests. */ 259 if ((qp->s_flags & QIB_S_RESP_PENDING) && 260 qib_make_rc_ack(dev, qp, ohdr, pmtu)) 261 goto done; 262 263 if (!(ib_qib_state_ops[qp->state] & QIB_PROCESS_SEND_OK)) { 264 if (!(ib_qib_state_ops[qp->state] & QIB_FLUSH_SEND)) 265 goto bail; 266 /* We are in the error state, flush the work request. */ 267 if (qp->s_last == qp->s_head) 268 goto bail; 269 /* If DMAs are in progress, we can't flush immediately. */ 270 if (atomic_read(&qp->s_dma_busy)) { 271 qp->s_flags |= QIB_S_WAIT_DMA; 272 goto bail; 273 } 274 wqe = get_swqe_ptr(qp, qp->s_last); 275 while (qp->s_last != qp->s_acked) { 276 qib_send_complete(qp, wqe, IB_WC_SUCCESS); 277 if (++qp->s_last >= qp->s_size) 278 qp->s_last = 0; 279 wqe = get_swqe_ptr(qp, qp->s_last); 280 } 281 qib_send_complete(qp, wqe, IB_WC_WR_FLUSH_ERR); 282 goto done; 283 } 284 285 if (qp->s_flags & (QIB_S_WAIT_RNR | QIB_S_WAIT_ACK)) 286 goto bail; 287 288 if (qib_cmp24(qp->s_psn, qp->s_sending_hpsn) <= 0) { 289 if (qib_cmp24(qp->s_sending_psn, qp->s_sending_hpsn) <= 0) { 290 qp->s_flags |= QIB_S_WAIT_PSN; 291 goto bail; 292 } 293 qp->s_sending_psn = qp->s_psn; 294 qp->s_sending_hpsn = qp->s_psn - 1; 295 } 296 297 /* header size in 32-bit words LRH+BTH = (8+12)/4. */ 298 hwords = 5; 299 bth0 = 0; 300 301 /* Send a request. */ 302 wqe = get_swqe_ptr(qp, qp->s_cur); 303 switch (qp->s_state) { 304 default: 305 if (!(ib_qib_state_ops[qp->state] & QIB_PROCESS_NEXT_SEND_OK)) 306 goto bail; 307 /* 308 * Resend an old request or start a new one. 309 * 310 * We keep track of the current SWQE so that 311 * we don't reset the "furthest progress" state 312 * if we need to back up. 313 */ 314 newreq = 0; 315 if (qp->s_cur == qp->s_tail) { 316 /* Check if send work queue is empty. */ 317 if (qp->s_tail == qp->s_head) 318 goto bail; 319 /* 320 * If a fence is requested, wait for previous 321 * RDMA read and atomic operations to finish. 322 */ 323 if ((wqe->wr.send_flags & IB_SEND_FENCE) && 324 qp->s_num_rd_atomic) { 325 qp->s_flags |= QIB_S_WAIT_FENCE; 326 goto bail; 327 } 328 wqe->psn = qp->s_next_psn; 329 newreq = 1; 330 } 331 /* 332 * Note that we have to be careful not to modify the 333 * original work request since we may need to resend 334 * it. 335 */ 336 len = wqe->length; 337 ss = &qp->s_sge; 338 bth2 = qp->s_psn & QIB_PSN_MASK; 339 switch (wqe->wr.opcode) { 340 case IB_WR_SEND: 341 case IB_WR_SEND_WITH_IMM: 342 /* If no credit, return. */ 343 if (!(qp->s_flags & QIB_S_UNLIMITED_CREDIT) && 344 qib_cmp24(wqe->ssn, qp->s_lsn + 1) > 0) { 345 qp->s_flags |= QIB_S_WAIT_SSN_CREDIT; 346 goto bail; 347 } 348 wqe->lpsn = wqe->psn; 349 if (len > pmtu) { 350 wqe->lpsn += (len - 1) / pmtu; 351 qp->s_state = OP(SEND_FIRST); 352 len = pmtu; 353 break; 354 } 355 if (wqe->wr.opcode == IB_WR_SEND) 356 qp->s_state = OP(SEND_ONLY); 357 else { 358 qp->s_state = OP(SEND_ONLY_WITH_IMMEDIATE); 359 /* Immediate data comes after the BTH */ 360 ohdr->u.imm_data = wqe->wr.ex.imm_data; 361 hwords += 1; 362 } 363 if (wqe->wr.send_flags & IB_SEND_SOLICITED) 364 bth0 |= IB_BTH_SOLICITED; 365 bth2 |= IB_BTH_REQ_ACK; 366 if (++qp->s_cur == qp->s_size) 367 qp->s_cur = 0; 368 break; 369 370 case IB_WR_RDMA_WRITE: 371 if (newreq && !(qp->s_flags & QIB_S_UNLIMITED_CREDIT)) 372 qp->s_lsn++; 373 /* FALLTHROUGH */ 374 case IB_WR_RDMA_WRITE_WITH_IMM: 375 /* If no credit, return. */ 376 if (!(qp->s_flags & QIB_S_UNLIMITED_CREDIT) && 377 qib_cmp24(wqe->ssn, qp->s_lsn + 1) > 0) { 378 qp->s_flags |= QIB_S_WAIT_SSN_CREDIT; 379 goto bail; 380 } 381 ohdr->u.rc.reth.vaddr = 382 cpu_to_be64(wqe->wr.wr.rdma.remote_addr); 383 ohdr->u.rc.reth.rkey = 384 cpu_to_be32(wqe->wr.wr.rdma.rkey); 385 ohdr->u.rc.reth.length = cpu_to_be32(len); 386 hwords += sizeof(struct ib_reth) / sizeof(u32); 387 wqe->lpsn = wqe->psn; 388 if (len > pmtu) { 389 wqe->lpsn += (len - 1) / pmtu; 390 qp->s_state = OP(RDMA_WRITE_FIRST); 391 len = pmtu; 392 break; 393 } 394 if (wqe->wr.opcode == IB_WR_RDMA_WRITE) 395 qp->s_state = OP(RDMA_WRITE_ONLY); 396 else { 397 qp->s_state = 398 OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE); 399 /* Immediate data comes after RETH */ 400 ohdr->u.rc.imm_data = wqe->wr.ex.imm_data; 401 hwords += 1; 402 if (wqe->wr.send_flags & IB_SEND_SOLICITED) 403 bth0 |= IB_BTH_SOLICITED; 404 } 405 bth2 |= IB_BTH_REQ_ACK; 406 if (++qp->s_cur == qp->s_size) 407 qp->s_cur = 0; 408 break; 409 410 case IB_WR_RDMA_READ: 411 /* 412 * Don't allow more operations to be started 413 * than the QP limits allow. 414 */ 415 if (newreq) { 416 if (qp->s_num_rd_atomic >= 417 qp->s_max_rd_atomic) { 418 qp->s_flags |= QIB_S_WAIT_RDMAR; 419 goto bail; 420 } 421 qp->s_num_rd_atomic++; 422 if (!(qp->s_flags & QIB_S_UNLIMITED_CREDIT)) 423 qp->s_lsn++; 424 /* 425 * Adjust s_next_psn to count the 426 * expected number of responses. 427 */ 428 if (len > pmtu) 429 qp->s_next_psn += (len - 1) / pmtu; 430 wqe->lpsn = qp->s_next_psn++; 431 } 432 ohdr->u.rc.reth.vaddr = 433 cpu_to_be64(wqe->wr.wr.rdma.remote_addr); 434 ohdr->u.rc.reth.rkey = 435 cpu_to_be32(wqe->wr.wr.rdma.rkey); 436 ohdr->u.rc.reth.length = cpu_to_be32(len); 437 qp->s_state = OP(RDMA_READ_REQUEST); 438 hwords += sizeof(ohdr->u.rc.reth) / sizeof(u32); 439 ss = NULL; 440 len = 0; 441 bth2 |= IB_BTH_REQ_ACK; 442 if (++qp->s_cur == qp->s_size) 443 qp->s_cur = 0; 444 break; 445 446 case IB_WR_ATOMIC_CMP_AND_SWP: 447 case IB_WR_ATOMIC_FETCH_AND_ADD: 448 /* 449 * Don't allow more operations to be started 450 * than the QP limits allow. 451 */ 452 if (newreq) { 453 if (qp->s_num_rd_atomic >= 454 qp->s_max_rd_atomic) { 455 qp->s_flags |= QIB_S_WAIT_RDMAR; 456 goto bail; 457 } 458 qp->s_num_rd_atomic++; 459 if (!(qp->s_flags & QIB_S_UNLIMITED_CREDIT)) 460 qp->s_lsn++; 461 wqe->lpsn = wqe->psn; 462 } 463 if (wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP) { 464 qp->s_state = OP(COMPARE_SWAP); 465 ohdr->u.atomic_eth.swap_data = cpu_to_be64( 466 wqe->wr.wr.atomic.swap); 467 ohdr->u.atomic_eth.compare_data = cpu_to_be64( 468 wqe->wr.wr.atomic.compare_add); 469 } else { 470 qp->s_state = OP(FETCH_ADD); 471 ohdr->u.atomic_eth.swap_data = cpu_to_be64( 472 wqe->wr.wr.atomic.compare_add); 473 ohdr->u.atomic_eth.compare_data = 0; 474 } 475 ohdr->u.atomic_eth.vaddr[0] = cpu_to_be32( 476 wqe->wr.wr.atomic.remote_addr >> 32); 477 ohdr->u.atomic_eth.vaddr[1] = cpu_to_be32( 478 wqe->wr.wr.atomic.remote_addr); 479 ohdr->u.atomic_eth.rkey = cpu_to_be32( 480 wqe->wr.wr.atomic.rkey); 481 hwords += sizeof(struct ib_atomic_eth) / sizeof(u32); 482 ss = NULL; 483 len = 0; 484 bth2 |= IB_BTH_REQ_ACK; 485 if (++qp->s_cur == qp->s_size) 486 qp->s_cur = 0; 487 break; 488 489 default: 490 goto bail; 491 } 492 qp->s_sge.sge = wqe->sg_list[0]; 493 qp->s_sge.sg_list = wqe->sg_list + 1; 494 qp->s_sge.num_sge = wqe->wr.num_sge; 495 qp->s_sge.total_len = wqe->length; 496 qp->s_len = wqe->length; 497 if (newreq) { 498 qp->s_tail++; 499 if (qp->s_tail >= qp->s_size) 500 qp->s_tail = 0; 501 } 502 if (wqe->wr.opcode == IB_WR_RDMA_READ) 503 qp->s_psn = wqe->lpsn + 1; 504 else { 505 qp->s_psn++; 506 if (qib_cmp24(qp->s_psn, qp->s_next_psn) > 0) 507 qp->s_next_psn = qp->s_psn; 508 } 509 break; 510 511 case OP(RDMA_READ_RESPONSE_FIRST): 512 /* 513 * qp->s_state is normally set to the opcode of the 514 * last packet constructed for new requests and therefore 515 * is never set to RDMA read response. 516 * RDMA_READ_RESPONSE_FIRST is used by the ACK processing 517 * thread to indicate a SEND needs to be restarted from an 518 * earlier PSN without interferring with the sending thread. 519 * See qib_restart_rc(). 520 */ 521 qp->s_len = restart_sge(&qp->s_sge, wqe, qp->s_psn, pmtu); 522 /* FALLTHROUGH */ 523 case OP(SEND_FIRST): 524 qp->s_state = OP(SEND_MIDDLE); 525 /* FALLTHROUGH */ 526 case OP(SEND_MIDDLE): 527 bth2 = qp->s_psn++ & QIB_PSN_MASK; 528 if (qib_cmp24(qp->s_psn, qp->s_next_psn) > 0) 529 qp->s_next_psn = qp->s_psn; 530 ss = &qp->s_sge; 531 len = qp->s_len; 532 if (len > pmtu) { 533 len = pmtu; 534 break; 535 } 536 if (wqe->wr.opcode == IB_WR_SEND) 537 qp->s_state = OP(SEND_LAST); 538 else { 539 qp->s_state = OP(SEND_LAST_WITH_IMMEDIATE); 540 /* Immediate data comes after the BTH */ 541 ohdr->u.imm_data = wqe->wr.ex.imm_data; 542 hwords += 1; 543 } 544 if (wqe->wr.send_flags & IB_SEND_SOLICITED) 545 bth0 |= IB_BTH_SOLICITED; 546 bth2 |= IB_BTH_REQ_ACK; 547 qp->s_cur++; 548 if (qp->s_cur >= qp->s_size) 549 qp->s_cur = 0; 550 break; 551 552 case OP(RDMA_READ_RESPONSE_LAST): 553 /* 554 * qp->s_state is normally set to the opcode of the 555 * last packet constructed for new requests and therefore 556 * is never set to RDMA read response. 557 * RDMA_READ_RESPONSE_LAST is used by the ACK processing 558 * thread to indicate a RDMA write needs to be restarted from 559 * an earlier PSN without interferring with the sending thread. 560 * See qib_restart_rc(). 561 */ 562 qp->s_len = restart_sge(&qp->s_sge, wqe, qp->s_psn, pmtu); 563 /* FALLTHROUGH */ 564 case OP(RDMA_WRITE_FIRST): 565 qp->s_state = OP(RDMA_WRITE_MIDDLE); 566 /* FALLTHROUGH */ 567 case OP(RDMA_WRITE_MIDDLE): 568 bth2 = qp->s_psn++ & QIB_PSN_MASK; 569 if (qib_cmp24(qp->s_psn, qp->s_next_psn) > 0) 570 qp->s_next_psn = qp->s_psn; 571 ss = &qp->s_sge; 572 len = qp->s_len; 573 if (len > pmtu) { 574 len = pmtu; 575 break; 576 } 577 if (wqe->wr.opcode == IB_WR_RDMA_WRITE) 578 qp->s_state = OP(RDMA_WRITE_LAST); 579 else { 580 qp->s_state = OP(RDMA_WRITE_LAST_WITH_IMMEDIATE); 581 /* Immediate data comes after the BTH */ 582 ohdr->u.imm_data = wqe->wr.ex.imm_data; 583 hwords += 1; 584 if (wqe->wr.send_flags & IB_SEND_SOLICITED) 585 bth0 |= IB_BTH_SOLICITED; 586 } 587 bth2 |= IB_BTH_REQ_ACK; 588 qp->s_cur++; 589 if (qp->s_cur >= qp->s_size) 590 qp->s_cur = 0; 591 break; 592 593 case OP(RDMA_READ_RESPONSE_MIDDLE): 594 /* 595 * qp->s_state is normally set to the opcode of the 596 * last packet constructed for new requests and therefore 597 * is never set to RDMA read response. 598 * RDMA_READ_RESPONSE_MIDDLE is used by the ACK processing 599 * thread to indicate a RDMA read needs to be restarted from 600 * an earlier PSN without interferring with the sending thread. 601 * See qib_restart_rc(). 602 */ 603 len = ((qp->s_psn - wqe->psn) & QIB_PSN_MASK) * pmtu; 604 ohdr->u.rc.reth.vaddr = 605 cpu_to_be64(wqe->wr.wr.rdma.remote_addr + len); 606 ohdr->u.rc.reth.rkey = 607 cpu_to_be32(wqe->wr.wr.rdma.rkey); 608 ohdr->u.rc.reth.length = cpu_to_be32(wqe->length - len); 609 qp->s_state = OP(RDMA_READ_REQUEST); 610 hwords += sizeof(ohdr->u.rc.reth) / sizeof(u32); 611 bth2 = (qp->s_psn & QIB_PSN_MASK) | IB_BTH_REQ_ACK; 612 qp->s_psn = wqe->lpsn + 1; 613 ss = NULL; 614 len = 0; 615 qp->s_cur++; 616 if (qp->s_cur == qp->s_size) 617 qp->s_cur = 0; 618 break; 619 } 620 qp->s_sending_hpsn = bth2; 621 delta = (((int) bth2 - (int) wqe->psn) << 8) >> 8; 622 if (delta && delta % QIB_PSN_CREDIT == 0) 623 bth2 |= IB_BTH_REQ_ACK; 624 if (qp->s_flags & QIB_S_SEND_ONE) { 625 qp->s_flags &= ~QIB_S_SEND_ONE; 626 qp->s_flags |= QIB_S_WAIT_ACK; 627 bth2 |= IB_BTH_REQ_ACK; 628 } 629 qp->s_len -= len; 630 qp->s_hdrwords = hwords; 631 qp->s_cur_sge = ss; 632 qp->s_cur_size = len; 633 qib_make_ruc_header(qp, ohdr, bth0 | (qp->s_state << 24), bth2); 634 done: 635 ret = 1; 636 goto unlock; 637 638 bail: 639 qp->s_flags &= ~QIB_S_BUSY; 640 unlock: 641 spin_unlock_irqrestore(&qp->s_lock, flags); 642 return ret; 643 } 644 645 /** 646 * qib_send_rc_ack - Construct an ACK packet and send it 647 * @qp: a pointer to the QP 648 * 649 * This is called from qib_rc_rcv() and qib_kreceive(). 650 * Note that RDMA reads and atomics are handled in the 651 * send side QP state and tasklet. 652 */ 653 void qib_send_rc_ack(struct qib_qp *qp) 654 { 655 struct qib_devdata *dd = dd_from_ibdev(qp->ibqp.device); 656 struct qib_ibport *ibp = to_iport(qp->ibqp.device, qp->port_num); 657 struct qib_pportdata *ppd = ppd_from_ibp(ibp); 658 u64 pbc; 659 u16 lrh0; 660 u32 bth0; 661 u32 hwords; 662 u32 pbufn; 663 u32 __iomem *piobuf; 664 struct qib_ib_header hdr; 665 struct qib_other_headers *ohdr; 666 u32 control; 667 unsigned long flags; 668 669 spin_lock_irqsave(&qp->s_lock, flags); 670 671 if (!(ib_qib_state_ops[qp->state] & QIB_PROCESS_RECV_OK)) 672 goto unlock; 673 674 /* Don't send ACK or NAK if a RDMA read or atomic is pending. */ 675 if ((qp->s_flags & QIB_S_RESP_PENDING) || qp->s_rdma_ack_cnt) 676 goto queue_ack; 677 678 /* Construct the header with s_lock held so APM doesn't change it. */ 679 ohdr = &hdr.u.oth; 680 lrh0 = QIB_LRH_BTH; 681 /* header size in 32-bit words LRH+BTH+AETH = (8+12+4)/4. */ 682 hwords = 6; 683 if (unlikely(qp->remote_ah_attr.ah_flags & IB_AH_GRH)) { 684 hwords += qib_make_grh(ibp, &hdr.u.l.grh, 685 &qp->remote_ah_attr.grh, hwords, 0); 686 ohdr = &hdr.u.l.oth; 687 lrh0 = QIB_LRH_GRH; 688 } 689 /* read pkey_index w/o lock (its atomic) */ 690 bth0 = qib_get_pkey(ibp, qp->s_pkey_index) | (OP(ACKNOWLEDGE) << 24); 691 if (qp->s_mig_state == IB_MIG_MIGRATED) 692 bth0 |= IB_BTH_MIG_REQ; 693 if (qp->r_nak_state) 694 ohdr->u.aeth = cpu_to_be32((qp->r_msn & QIB_MSN_MASK) | 695 (qp->r_nak_state << 696 QIB_AETH_CREDIT_SHIFT)); 697 else 698 ohdr->u.aeth = qib_compute_aeth(qp); 699 lrh0 |= ibp->sl_to_vl[qp->remote_ah_attr.sl] << 12 | 700 qp->remote_ah_attr.sl << 4; 701 hdr.lrh[0] = cpu_to_be16(lrh0); 702 hdr.lrh[1] = cpu_to_be16(qp->remote_ah_attr.dlid); 703 hdr.lrh[2] = cpu_to_be16(hwords + SIZE_OF_CRC); 704 hdr.lrh[3] = cpu_to_be16(ppd->lid | qp->remote_ah_attr.src_path_bits); 705 ohdr->bth[0] = cpu_to_be32(bth0); 706 ohdr->bth[1] = cpu_to_be32(qp->remote_qpn); 707 ohdr->bth[2] = cpu_to_be32(qp->r_ack_psn & QIB_PSN_MASK); 708 709 spin_unlock_irqrestore(&qp->s_lock, flags); 710 711 /* Don't try to send ACKs if the link isn't ACTIVE */ 712 if (!(ppd->lflags & QIBL_LINKACTIVE)) 713 goto done; 714 715 control = dd->f_setpbc_control(ppd, hwords + SIZE_OF_CRC, 716 qp->s_srate, lrh0 >> 12); 717 /* length is + 1 for the control dword */ 718 pbc = ((u64) control << 32) | (hwords + 1); 719 720 piobuf = dd->f_getsendbuf(ppd, pbc, &pbufn); 721 if (!piobuf) { 722 /* 723 * We are out of PIO buffers at the moment. 724 * Pass responsibility for sending the ACK to the 725 * send tasklet so that when a PIO buffer becomes 726 * available, the ACK is sent ahead of other outgoing 727 * packets. 728 */ 729 spin_lock_irqsave(&qp->s_lock, flags); 730 goto queue_ack; 731 } 732 733 /* 734 * Write the pbc. 735 * We have to flush after the PBC for correctness 736 * on some cpus or WC buffer can be written out of order. 737 */ 738 writeq(pbc, piobuf); 739 740 if (dd->flags & QIB_PIO_FLUSH_WC) { 741 u32 *hdrp = (u32 *) &hdr; 742 743 qib_flush_wc(); 744 qib_pio_copy(piobuf + 2, hdrp, hwords - 1); 745 qib_flush_wc(); 746 __raw_writel(hdrp[hwords - 1], piobuf + hwords + 1); 747 } else 748 qib_pio_copy(piobuf + 2, (u32 *) &hdr, hwords); 749 750 if (dd->flags & QIB_USE_SPCL_TRIG) { 751 u32 spcl_off = (pbufn >= dd->piobcnt2k) ? 2047 : 1023; 752 753 qib_flush_wc(); 754 __raw_writel(0xaebecede, piobuf + spcl_off); 755 } 756 757 qib_flush_wc(); 758 qib_sendbuf_done(dd, pbufn); 759 760 ibp->n_unicast_xmit++; 761 goto done; 762 763 queue_ack: 764 if (ib_qib_state_ops[qp->state] & QIB_PROCESS_RECV_OK) { 765 ibp->n_rc_qacks++; 766 qp->s_flags |= QIB_S_ACK_PENDING | QIB_S_RESP_PENDING; 767 qp->s_nak_state = qp->r_nak_state; 768 qp->s_ack_psn = qp->r_ack_psn; 769 770 /* Schedule the send tasklet. */ 771 qib_schedule_send(qp); 772 } 773 unlock: 774 spin_unlock_irqrestore(&qp->s_lock, flags); 775 done: 776 return; 777 } 778 779 /** 780 * reset_psn - reset the QP state to send starting from PSN 781 * @qp: the QP 782 * @psn: the packet sequence number to restart at 783 * 784 * This is called from qib_rc_rcv() to process an incoming RC ACK 785 * for the given QP. 786 * Called at interrupt level with the QP s_lock held. 787 */ 788 static void reset_psn(struct qib_qp *qp, u32 psn) 789 { 790 u32 n = qp->s_acked; 791 struct qib_swqe *wqe = get_swqe_ptr(qp, n); 792 u32 opcode; 793 794 qp->s_cur = n; 795 796 /* 797 * If we are starting the request from the beginning, 798 * let the normal send code handle initialization. 799 */ 800 if (qib_cmp24(psn, wqe->psn) <= 0) { 801 qp->s_state = OP(SEND_LAST); 802 goto done; 803 } 804 805 /* Find the work request opcode corresponding to the given PSN. */ 806 opcode = wqe->wr.opcode; 807 for (;;) { 808 int diff; 809 810 if (++n == qp->s_size) 811 n = 0; 812 if (n == qp->s_tail) 813 break; 814 wqe = get_swqe_ptr(qp, n); 815 diff = qib_cmp24(psn, wqe->psn); 816 if (diff < 0) 817 break; 818 qp->s_cur = n; 819 /* 820 * If we are starting the request from the beginning, 821 * let the normal send code handle initialization. 822 */ 823 if (diff == 0) { 824 qp->s_state = OP(SEND_LAST); 825 goto done; 826 } 827 opcode = wqe->wr.opcode; 828 } 829 830 /* 831 * Set the state to restart in the middle of a request. 832 * Don't change the s_sge, s_cur_sge, or s_cur_size. 833 * See qib_make_rc_req(). 834 */ 835 switch (opcode) { 836 case IB_WR_SEND: 837 case IB_WR_SEND_WITH_IMM: 838 qp->s_state = OP(RDMA_READ_RESPONSE_FIRST); 839 break; 840 841 case IB_WR_RDMA_WRITE: 842 case IB_WR_RDMA_WRITE_WITH_IMM: 843 qp->s_state = OP(RDMA_READ_RESPONSE_LAST); 844 break; 845 846 case IB_WR_RDMA_READ: 847 qp->s_state = OP(RDMA_READ_RESPONSE_MIDDLE); 848 break; 849 850 default: 851 /* 852 * This case shouldn't happen since its only 853 * one PSN per req. 854 */ 855 qp->s_state = OP(SEND_LAST); 856 } 857 done: 858 qp->s_psn = psn; 859 /* 860 * Set QIB_S_WAIT_PSN as qib_rc_complete() may start the timer 861 * asynchronously before the send tasklet can get scheduled. 862 * Doing it in qib_make_rc_req() is too late. 863 */ 864 if ((qib_cmp24(qp->s_psn, qp->s_sending_hpsn) <= 0) && 865 (qib_cmp24(qp->s_sending_psn, qp->s_sending_hpsn) <= 0)) 866 qp->s_flags |= QIB_S_WAIT_PSN; 867 } 868 869 /* 870 * Back up requester to resend the last un-ACKed request. 871 * The QP r_lock and s_lock should be held and interrupts disabled. 872 */ 873 static void qib_restart_rc(struct qib_qp *qp, u32 psn, int wait) 874 { 875 struct qib_swqe *wqe = get_swqe_ptr(qp, qp->s_acked); 876 struct qib_ibport *ibp; 877 878 if (qp->s_retry == 0) { 879 if (qp->s_mig_state == IB_MIG_ARMED) { 880 qib_migrate_qp(qp); 881 qp->s_retry = qp->s_retry_cnt; 882 } else if (qp->s_last == qp->s_acked) { 883 qib_send_complete(qp, wqe, IB_WC_RETRY_EXC_ERR); 884 qib_error_qp(qp, IB_WC_WR_FLUSH_ERR); 885 return; 886 } else /* XXX need to handle delayed completion */ 887 return; 888 } else 889 qp->s_retry--; 890 891 ibp = to_iport(qp->ibqp.device, qp->port_num); 892 if (wqe->wr.opcode == IB_WR_RDMA_READ) 893 ibp->n_rc_resends++; 894 else 895 ibp->n_rc_resends += (qp->s_psn - psn) & QIB_PSN_MASK; 896 897 qp->s_flags &= ~(QIB_S_WAIT_FENCE | QIB_S_WAIT_RDMAR | 898 QIB_S_WAIT_SSN_CREDIT | QIB_S_WAIT_PSN | 899 QIB_S_WAIT_ACK); 900 if (wait) 901 qp->s_flags |= QIB_S_SEND_ONE; 902 reset_psn(qp, psn); 903 } 904 905 /* 906 * This is called from s_timer for missing responses. 907 */ 908 static void rc_timeout(unsigned long arg) 909 { 910 struct qib_qp *qp = (struct qib_qp *)arg; 911 struct qib_ibport *ibp; 912 unsigned long flags; 913 914 spin_lock_irqsave(&qp->r_lock, flags); 915 spin_lock(&qp->s_lock); 916 if (qp->s_flags & QIB_S_TIMER) { 917 ibp = to_iport(qp->ibqp.device, qp->port_num); 918 ibp->n_rc_timeouts++; 919 qp->s_flags &= ~QIB_S_TIMER; 920 del_timer(&qp->s_timer); 921 qib_restart_rc(qp, qp->s_last_psn + 1, 1); 922 qib_schedule_send(qp); 923 } 924 spin_unlock(&qp->s_lock); 925 spin_unlock_irqrestore(&qp->r_lock, flags); 926 } 927 928 /* 929 * This is called from s_timer for RNR timeouts. 930 */ 931 void qib_rc_rnr_retry(unsigned long arg) 932 { 933 struct qib_qp *qp = (struct qib_qp *)arg; 934 unsigned long flags; 935 936 spin_lock_irqsave(&qp->s_lock, flags); 937 if (qp->s_flags & QIB_S_WAIT_RNR) { 938 qp->s_flags &= ~QIB_S_WAIT_RNR; 939 del_timer(&qp->s_timer); 940 qib_schedule_send(qp); 941 } 942 spin_unlock_irqrestore(&qp->s_lock, flags); 943 } 944 945 /* 946 * Set qp->s_sending_psn to the next PSN after the given one. 947 * This would be psn+1 except when RDMA reads are present. 948 */ 949 static void reset_sending_psn(struct qib_qp *qp, u32 psn) 950 { 951 struct qib_swqe *wqe; 952 u32 n = qp->s_last; 953 954 /* Find the work request corresponding to the given PSN. */ 955 for (;;) { 956 wqe = get_swqe_ptr(qp, n); 957 if (qib_cmp24(psn, wqe->lpsn) <= 0) { 958 if (wqe->wr.opcode == IB_WR_RDMA_READ) 959 qp->s_sending_psn = wqe->lpsn + 1; 960 else 961 qp->s_sending_psn = psn + 1; 962 break; 963 } 964 if (++n == qp->s_size) 965 n = 0; 966 if (n == qp->s_tail) 967 break; 968 } 969 } 970 971 /* 972 * This should be called with the QP s_lock held and interrupts disabled. 973 */ 974 void qib_rc_send_complete(struct qib_qp *qp, struct qib_ib_header *hdr) 975 { 976 struct qib_other_headers *ohdr; 977 struct qib_swqe *wqe; 978 struct ib_wc wc; 979 unsigned i; 980 u32 opcode; 981 u32 psn; 982 983 if (!(ib_qib_state_ops[qp->state] & QIB_PROCESS_OR_FLUSH_SEND)) 984 return; 985 986 /* Find out where the BTH is */ 987 if ((be16_to_cpu(hdr->lrh[0]) & 3) == QIB_LRH_BTH) 988 ohdr = &hdr->u.oth; 989 else 990 ohdr = &hdr->u.l.oth; 991 992 opcode = be32_to_cpu(ohdr->bth[0]) >> 24; 993 if (opcode >= OP(RDMA_READ_RESPONSE_FIRST) && 994 opcode <= OP(ATOMIC_ACKNOWLEDGE)) { 995 WARN_ON(!qp->s_rdma_ack_cnt); 996 qp->s_rdma_ack_cnt--; 997 return; 998 } 999 1000 psn = be32_to_cpu(ohdr->bth[2]); 1001 reset_sending_psn(qp, psn); 1002 1003 /* 1004 * Start timer after a packet requesting an ACK has been sent and 1005 * there are still requests that haven't been acked. 1006 */ 1007 if ((psn & IB_BTH_REQ_ACK) && qp->s_acked != qp->s_tail && 1008 !(qp->s_flags & (QIB_S_TIMER | QIB_S_WAIT_RNR | QIB_S_WAIT_PSN))) 1009 start_timer(qp); 1010 1011 while (qp->s_last != qp->s_acked) { 1012 wqe = get_swqe_ptr(qp, qp->s_last); 1013 if (qib_cmp24(wqe->lpsn, qp->s_sending_psn) >= 0 && 1014 qib_cmp24(qp->s_sending_psn, qp->s_sending_hpsn) <= 0) 1015 break; 1016 for (i = 0; i < wqe->wr.num_sge; i++) { 1017 struct qib_sge *sge = &wqe->sg_list[i]; 1018 1019 atomic_dec(&sge->mr->refcount); 1020 } 1021 /* Post a send completion queue entry if requested. */ 1022 if (!(qp->s_flags & QIB_S_SIGNAL_REQ_WR) || 1023 (wqe->wr.send_flags & IB_SEND_SIGNALED)) { 1024 memset(&wc, 0, sizeof wc); 1025 wc.wr_id = wqe->wr.wr_id; 1026 wc.status = IB_WC_SUCCESS; 1027 wc.opcode = ib_qib_wc_opcode[wqe->wr.opcode]; 1028 wc.byte_len = wqe->length; 1029 wc.qp = &qp->ibqp; 1030 qib_cq_enter(to_icq(qp->ibqp.send_cq), &wc, 0); 1031 } 1032 if (++qp->s_last >= qp->s_size) 1033 qp->s_last = 0; 1034 } 1035 /* 1036 * If we were waiting for sends to complete before resending, 1037 * and they are now complete, restart sending. 1038 */ 1039 if (qp->s_flags & QIB_S_WAIT_PSN && 1040 qib_cmp24(qp->s_sending_psn, qp->s_sending_hpsn) > 0) { 1041 qp->s_flags &= ~QIB_S_WAIT_PSN; 1042 qp->s_sending_psn = qp->s_psn; 1043 qp->s_sending_hpsn = qp->s_psn - 1; 1044 qib_schedule_send(qp); 1045 } 1046 } 1047 1048 static inline void update_last_psn(struct qib_qp *qp, u32 psn) 1049 { 1050 qp->s_last_psn = psn; 1051 } 1052 1053 /* 1054 * Generate a SWQE completion. 1055 * This is similar to qib_send_complete but has to check to be sure 1056 * that the SGEs are not being referenced if the SWQE is being resent. 1057 */ 1058 static struct qib_swqe *do_rc_completion(struct qib_qp *qp, 1059 struct qib_swqe *wqe, 1060 struct qib_ibport *ibp) 1061 { 1062 struct ib_wc wc; 1063 unsigned i; 1064 1065 /* 1066 * Don't decrement refcount and don't generate a 1067 * completion if the SWQE is being resent until the send 1068 * is finished. 1069 */ 1070 if (qib_cmp24(wqe->lpsn, qp->s_sending_psn) < 0 || 1071 qib_cmp24(qp->s_sending_psn, qp->s_sending_hpsn) > 0) { 1072 for (i = 0; i < wqe->wr.num_sge; i++) { 1073 struct qib_sge *sge = &wqe->sg_list[i]; 1074 1075 atomic_dec(&sge->mr->refcount); 1076 } 1077 /* Post a send completion queue entry if requested. */ 1078 if (!(qp->s_flags & QIB_S_SIGNAL_REQ_WR) || 1079 (wqe->wr.send_flags & IB_SEND_SIGNALED)) { 1080 memset(&wc, 0, sizeof wc); 1081 wc.wr_id = wqe->wr.wr_id; 1082 wc.status = IB_WC_SUCCESS; 1083 wc.opcode = ib_qib_wc_opcode[wqe->wr.opcode]; 1084 wc.byte_len = wqe->length; 1085 wc.qp = &qp->ibqp; 1086 qib_cq_enter(to_icq(qp->ibqp.send_cq), &wc, 0); 1087 } 1088 if (++qp->s_last >= qp->s_size) 1089 qp->s_last = 0; 1090 } else 1091 ibp->n_rc_delayed_comp++; 1092 1093 qp->s_retry = qp->s_retry_cnt; 1094 update_last_psn(qp, wqe->lpsn); 1095 1096 /* 1097 * If we are completing a request which is in the process of 1098 * being resent, we can stop resending it since we know the 1099 * responder has already seen it. 1100 */ 1101 if (qp->s_acked == qp->s_cur) { 1102 if (++qp->s_cur >= qp->s_size) 1103 qp->s_cur = 0; 1104 qp->s_acked = qp->s_cur; 1105 wqe = get_swqe_ptr(qp, qp->s_cur); 1106 if (qp->s_acked != qp->s_tail) { 1107 qp->s_state = OP(SEND_LAST); 1108 qp->s_psn = wqe->psn; 1109 } 1110 } else { 1111 if (++qp->s_acked >= qp->s_size) 1112 qp->s_acked = 0; 1113 if (qp->state == IB_QPS_SQD && qp->s_acked == qp->s_cur) 1114 qp->s_draining = 0; 1115 wqe = get_swqe_ptr(qp, qp->s_acked); 1116 } 1117 return wqe; 1118 } 1119 1120 /** 1121 * do_rc_ack - process an incoming RC ACK 1122 * @qp: the QP the ACK came in on 1123 * @psn: the packet sequence number of the ACK 1124 * @opcode: the opcode of the request that resulted in the ACK 1125 * 1126 * This is called from qib_rc_rcv_resp() to process an incoming RC ACK 1127 * for the given QP. 1128 * Called at interrupt level with the QP s_lock held. 1129 * Returns 1 if OK, 0 if current operation should be aborted (NAK). 1130 */ 1131 static int do_rc_ack(struct qib_qp *qp, u32 aeth, u32 psn, int opcode, 1132 u64 val, struct qib_ctxtdata *rcd) 1133 { 1134 struct qib_ibport *ibp; 1135 enum ib_wc_status status; 1136 struct qib_swqe *wqe; 1137 int ret = 0; 1138 u32 ack_psn; 1139 int diff; 1140 1141 /* Remove QP from retry timer */ 1142 if (qp->s_flags & (QIB_S_TIMER | QIB_S_WAIT_RNR)) { 1143 qp->s_flags &= ~(QIB_S_TIMER | QIB_S_WAIT_RNR); 1144 del_timer(&qp->s_timer); 1145 } 1146 1147 /* 1148 * Note that NAKs implicitly ACK outstanding SEND and RDMA write 1149 * requests and implicitly NAK RDMA read and atomic requests issued 1150 * before the NAK'ed request. The MSN won't include the NAK'ed 1151 * request but will include an ACK'ed request(s). 1152 */ 1153 ack_psn = psn; 1154 if (aeth >> 29) 1155 ack_psn--; 1156 wqe = get_swqe_ptr(qp, qp->s_acked); 1157 ibp = to_iport(qp->ibqp.device, qp->port_num); 1158 1159 /* 1160 * The MSN might be for a later WQE than the PSN indicates so 1161 * only complete WQEs that the PSN finishes. 1162 */ 1163 while ((diff = qib_cmp24(ack_psn, wqe->lpsn)) >= 0) { 1164 /* 1165 * RDMA_READ_RESPONSE_ONLY is a special case since 1166 * we want to generate completion events for everything 1167 * before the RDMA read, copy the data, then generate 1168 * the completion for the read. 1169 */ 1170 if (wqe->wr.opcode == IB_WR_RDMA_READ && 1171 opcode == OP(RDMA_READ_RESPONSE_ONLY) && 1172 diff == 0) { 1173 ret = 1; 1174 goto bail; 1175 } 1176 /* 1177 * If this request is a RDMA read or atomic, and the ACK is 1178 * for a later operation, this ACK NAKs the RDMA read or 1179 * atomic. In other words, only a RDMA_READ_LAST or ONLY 1180 * can ACK a RDMA read and likewise for atomic ops. Note 1181 * that the NAK case can only happen if relaxed ordering is 1182 * used and requests are sent after an RDMA read or atomic 1183 * is sent but before the response is received. 1184 */ 1185 if ((wqe->wr.opcode == IB_WR_RDMA_READ && 1186 (opcode != OP(RDMA_READ_RESPONSE_LAST) || diff != 0)) || 1187 ((wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP || 1188 wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD) && 1189 (opcode != OP(ATOMIC_ACKNOWLEDGE) || diff != 0))) { 1190 /* Retry this request. */ 1191 if (!(qp->r_flags & QIB_R_RDMAR_SEQ)) { 1192 qp->r_flags |= QIB_R_RDMAR_SEQ; 1193 qib_restart_rc(qp, qp->s_last_psn + 1, 0); 1194 if (list_empty(&qp->rspwait)) { 1195 qp->r_flags |= QIB_R_RSP_SEND; 1196 atomic_inc(&qp->refcount); 1197 list_add_tail(&qp->rspwait, 1198 &rcd->qp_wait_list); 1199 } 1200 } 1201 /* 1202 * No need to process the ACK/NAK since we are 1203 * restarting an earlier request. 1204 */ 1205 goto bail; 1206 } 1207 if (wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP || 1208 wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD) { 1209 u64 *vaddr = wqe->sg_list[0].vaddr; 1210 *vaddr = val; 1211 } 1212 if (qp->s_num_rd_atomic && 1213 (wqe->wr.opcode == IB_WR_RDMA_READ || 1214 wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP || 1215 wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD)) { 1216 qp->s_num_rd_atomic--; 1217 /* Restart sending task if fence is complete */ 1218 if ((qp->s_flags & QIB_S_WAIT_FENCE) && 1219 !qp->s_num_rd_atomic) { 1220 qp->s_flags &= ~(QIB_S_WAIT_FENCE | 1221 QIB_S_WAIT_ACK); 1222 qib_schedule_send(qp); 1223 } else if (qp->s_flags & QIB_S_WAIT_RDMAR) { 1224 qp->s_flags &= ~(QIB_S_WAIT_RDMAR | 1225 QIB_S_WAIT_ACK); 1226 qib_schedule_send(qp); 1227 } 1228 } 1229 wqe = do_rc_completion(qp, wqe, ibp); 1230 if (qp->s_acked == qp->s_tail) 1231 break; 1232 } 1233 1234 switch (aeth >> 29) { 1235 case 0: /* ACK */ 1236 ibp->n_rc_acks++; 1237 if (qp->s_acked != qp->s_tail) { 1238 /* 1239 * We are expecting more ACKs so 1240 * reset the retransmit timer. 1241 */ 1242 start_timer(qp); 1243 /* 1244 * We can stop resending the earlier packets and 1245 * continue with the next packet the receiver wants. 1246 */ 1247 if (qib_cmp24(qp->s_psn, psn) <= 0) 1248 reset_psn(qp, psn + 1); 1249 } else if (qib_cmp24(qp->s_psn, psn) <= 0) { 1250 qp->s_state = OP(SEND_LAST); 1251 qp->s_psn = psn + 1; 1252 } 1253 if (qp->s_flags & QIB_S_WAIT_ACK) { 1254 qp->s_flags &= ~QIB_S_WAIT_ACK; 1255 qib_schedule_send(qp); 1256 } 1257 qib_get_credit(qp, aeth); 1258 qp->s_rnr_retry = qp->s_rnr_retry_cnt; 1259 qp->s_retry = qp->s_retry_cnt; 1260 update_last_psn(qp, psn); 1261 ret = 1; 1262 goto bail; 1263 1264 case 1: /* RNR NAK */ 1265 ibp->n_rnr_naks++; 1266 if (qp->s_acked == qp->s_tail) 1267 goto bail; 1268 if (qp->s_flags & QIB_S_WAIT_RNR) 1269 goto bail; 1270 if (qp->s_rnr_retry == 0) { 1271 status = IB_WC_RNR_RETRY_EXC_ERR; 1272 goto class_b; 1273 } 1274 if (qp->s_rnr_retry_cnt < 7) 1275 qp->s_rnr_retry--; 1276 1277 /* The last valid PSN is the previous PSN. */ 1278 update_last_psn(qp, psn - 1); 1279 1280 ibp->n_rc_resends += (qp->s_psn - psn) & QIB_PSN_MASK; 1281 1282 reset_psn(qp, psn); 1283 1284 qp->s_flags &= ~(QIB_S_WAIT_SSN_CREDIT | QIB_S_WAIT_ACK); 1285 qp->s_flags |= QIB_S_WAIT_RNR; 1286 qp->s_timer.function = qib_rc_rnr_retry; 1287 qp->s_timer.expires = jiffies + usecs_to_jiffies( 1288 ib_qib_rnr_table[(aeth >> QIB_AETH_CREDIT_SHIFT) & 1289 QIB_AETH_CREDIT_MASK]); 1290 add_timer(&qp->s_timer); 1291 goto bail; 1292 1293 case 3: /* NAK */ 1294 if (qp->s_acked == qp->s_tail) 1295 goto bail; 1296 /* The last valid PSN is the previous PSN. */ 1297 update_last_psn(qp, psn - 1); 1298 switch ((aeth >> QIB_AETH_CREDIT_SHIFT) & 1299 QIB_AETH_CREDIT_MASK) { 1300 case 0: /* PSN sequence error */ 1301 ibp->n_seq_naks++; 1302 /* 1303 * Back up to the responder's expected PSN. 1304 * Note that we might get a NAK in the middle of an 1305 * RDMA READ response which terminates the RDMA 1306 * READ. 1307 */ 1308 qib_restart_rc(qp, psn, 0); 1309 qib_schedule_send(qp); 1310 break; 1311 1312 case 1: /* Invalid Request */ 1313 status = IB_WC_REM_INV_REQ_ERR; 1314 ibp->n_other_naks++; 1315 goto class_b; 1316 1317 case 2: /* Remote Access Error */ 1318 status = IB_WC_REM_ACCESS_ERR; 1319 ibp->n_other_naks++; 1320 goto class_b; 1321 1322 case 3: /* Remote Operation Error */ 1323 status = IB_WC_REM_OP_ERR; 1324 ibp->n_other_naks++; 1325 class_b: 1326 if (qp->s_last == qp->s_acked) { 1327 qib_send_complete(qp, wqe, status); 1328 qib_error_qp(qp, IB_WC_WR_FLUSH_ERR); 1329 } 1330 break; 1331 1332 default: 1333 /* Ignore other reserved NAK error codes */ 1334 goto reserved; 1335 } 1336 qp->s_retry = qp->s_retry_cnt; 1337 qp->s_rnr_retry = qp->s_rnr_retry_cnt; 1338 goto bail; 1339 1340 default: /* 2: reserved */ 1341 reserved: 1342 /* Ignore reserved NAK codes. */ 1343 goto bail; 1344 } 1345 1346 bail: 1347 return ret; 1348 } 1349 1350 /* 1351 * We have seen an out of sequence RDMA read middle or last packet. 1352 * This ACKs SENDs and RDMA writes up to the first RDMA read or atomic SWQE. 1353 */ 1354 static void rdma_seq_err(struct qib_qp *qp, struct qib_ibport *ibp, u32 psn, 1355 struct qib_ctxtdata *rcd) 1356 { 1357 struct qib_swqe *wqe; 1358 1359 /* Remove QP from retry timer */ 1360 if (qp->s_flags & (QIB_S_TIMER | QIB_S_WAIT_RNR)) { 1361 qp->s_flags &= ~(QIB_S_TIMER | QIB_S_WAIT_RNR); 1362 del_timer(&qp->s_timer); 1363 } 1364 1365 wqe = get_swqe_ptr(qp, qp->s_acked); 1366 1367 while (qib_cmp24(psn, wqe->lpsn) > 0) { 1368 if (wqe->wr.opcode == IB_WR_RDMA_READ || 1369 wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP || 1370 wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD) 1371 break; 1372 wqe = do_rc_completion(qp, wqe, ibp); 1373 } 1374 1375 ibp->n_rdma_seq++; 1376 qp->r_flags |= QIB_R_RDMAR_SEQ; 1377 qib_restart_rc(qp, qp->s_last_psn + 1, 0); 1378 if (list_empty(&qp->rspwait)) { 1379 qp->r_flags |= QIB_R_RSP_SEND; 1380 atomic_inc(&qp->refcount); 1381 list_add_tail(&qp->rspwait, &rcd->qp_wait_list); 1382 } 1383 } 1384 1385 /** 1386 * qib_rc_rcv_resp - process an incoming RC response packet 1387 * @ibp: the port this packet came in on 1388 * @ohdr: the other headers for this packet 1389 * @data: the packet data 1390 * @tlen: the packet length 1391 * @qp: the QP for this packet 1392 * @opcode: the opcode for this packet 1393 * @psn: the packet sequence number for this packet 1394 * @hdrsize: the header length 1395 * @pmtu: the path MTU 1396 * 1397 * This is called from qib_rc_rcv() to process an incoming RC response 1398 * packet for the given QP. 1399 * Called at interrupt level. 1400 */ 1401 static void qib_rc_rcv_resp(struct qib_ibport *ibp, 1402 struct qib_other_headers *ohdr, 1403 void *data, u32 tlen, 1404 struct qib_qp *qp, 1405 u32 opcode, 1406 u32 psn, u32 hdrsize, u32 pmtu, 1407 struct qib_ctxtdata *rcd) 1408 { 1409 struct qib_swqe *wqe; 1410 enum ib_wc_status status; 1411 unsigned long flags; 1412 int diff; 1413 u32 pad; 1414 u32 aeth; 1415 u64 val; 1416 1417 spin_lock_irqsave(&qp->s_lock, flags); 1418 1419 /* Ignore invalid responses. */ 1420 if (qib_cmp24(psn, qp->s_next_psn) >= 0) 1421 goto ack_done; 1422 1423 /* Ignore duplicate responses. */ 1424 diff = qib_cmp24(psn, qp->s_last_psn); 1425 if (unlikely(diff <= 0)) { 1426 /* Update credits for "ghost" ACKs */ 1427 if (diff == 0 && opcode == OP(ACKNOWLEDGE)) { 1428 aeth = be32_to_cpu(ohdr->u.aeth); 1429 if ((aeth >> 29) == 0) 1430 qib_get_credit(qp, aeth); 1431 } 1432 goto ack_done; 1433 } 1434 1435 /* 1436 * Skip everything other than the PSN we expect, if we are waiting 1437 * for a reply to a restarted RDMA read or atomic op. 1438 */ 1439 if (qp->r_flags & QIB_R_RDMAR_SEQ) { 1440 if (qib_cmp24(psn, qp->s_last_psn + 1) != 0) 1441 goto ack_done; 1442 qp->r_flags &= ~QIB_R_RDMAR_SEQ; 1443 } 1444 1445 if (unlikely(qp->s_acked == qp->s_tail)) 1446 goto ack_done; 1447 wqe = get_swqe_ptr(qp, qp->s_acked); 1448 status = IB_WC_SUCCESS; 1449 1450 switch (opcode) { 1451 case OP(ACKNOWLEDGE): 1452 case OP(ATOMIC_ACKNOWLEDGE): 1453 case OP(RDMA_READ_RESPONSE_FIRST): 1454 aeth = be32_to_cpu(ohdr->u.aeth); 1455 if (opcode == OP(ATOMIC_ACKNOWLEDGE)) { 1456 __be32 *p = ohdr->u.at.atomic_ack_eth; 1457 1458 val = ((u64) be32_to_cpu(p[0]) << 32) | 1459 be32_to_cpu(p[1]); 1460 } else 1461 val = 0; 1462 if (!do_rc_ack(qp, aeth, psn, opcode, val, rcd) || 1463 opcode != OP(RDMA_READ_RESPONSE_FIRST)) 1464 goto ack_done; 1465 hdrsize += 4; 1466 wqe = get_swqe_ptr(qp, qp->s_acked); 1467 if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ)) 1468 goto ack_op_err; 1469 /* 1470 * If this is a response to a resent RDMA read, we 1471 * have to be careful to copy the data to the right 1472 * location. 1473 */ 1474 qp->s_rdma_read_len = restart_sge(&qp->s_rdma_read_sge, 1475 wqe, psn, pmtu); 1476 goto read_middle; 1477 1478 case OP(RDMA_READ_RESPONSE_MIDDLE): 1479 /* no AETH, no ACK */ 1480 if (unlikely(qib_cmp24(psn, qp->s_last_psn + 1))) 1481 goto ack_seq_err; 1482 if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ)) 1483 goto ack_op_err; 1484 read_middle: 1485 if (unlikely(tlen != (hdrsize + pmtu + 4))) 1486 goto ack_len_err; 1487 if (unlikely(pmtu >= qp->s_rdma_read_len)) 1488 goto ack_len_err; 1489 1490 /* 1491 * We got a response so update the timeout. 1492 * 4.096 usec. * (1 << qp->timeout) 1493 */ 1494 qp->s_flags |= QIB_S_TIMER; 1495 mod_timer(&qp->s_timer, jiffies + 1496 usecs_to_jiffies((4096UL * (1UL << qp->timeout)) / 1497 1000UL)); 1498 if (qp->s_flags & QIB_S_WAIT_ACK) { 1499 qp->s_flags &= ~QIB_S_WAIT_ACK; 1500 qib_schedule_send(qp); 1501 } 1502 1503 if (opcode == OP(RDMA_READ_RESPONSE_MIDDLE)) 1504 qp->s_retry = qp->s_retry_cnt; 1505 1506 /* 1507 * Update the RDMA receive state but do the copy w/o 1508 * holding the locks and blocking interrupts. 1509 */ 1510 qp->s_rdma_read_len -= pmtu; 1511 update_last_psn(qp, psn); 1512 spin_unlock_irqrestore(&qp->s_lock, flags); 1513 qib_copy_sge(&qp->s_rdma_read_sge, data, pmtu, 0); 1514 goto bail; 1515 1516 case OP(RDMA_READ_RESPONSE_ONLY): 1517 aeth = be32_to_cpu(ohdr->u.aeth); 1518 if (!do_rc_ack(qp, aeth, psn, opcode, 0, rcd)) 1519 goto ack_done; 1520 /* Get the number of bytes the message was padded by. */ 1521 pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3; 1522 /* 1523 * Check that the data size is >= 0 && <= pmtu. 1524 * Remember to account for the AETH header (4) and 1525 * ICRC (4). 1526 */ 1527 if (unlikely(tlen < (hdrsize + pad + 8))) 1528 goto ack_len_err; 1529 /* 1530 * If this is a response to a resent RDMA read, we 1531 * have to be careful to copy the data to the right 1532 * location. 1533 */ 1534 wqe = get_swqe_ptr(qp, qp->s_acked); 1535 qp->s_rdma_read_len = restart_sge(&qp->s_rdma_read_sge, 1536 wqe, psn, pmtu); 1537 goto read_last; 1538 1539 case OP(RDMA_READ_RESPONSE_LAST): 1540 /* ACKs READ req. */ 1541 if (unlikely(qib_cmp24(psn, qp->s_last_psn + 1))) 1542 goto ack_seq_err; 1543 if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ)) 1544 goto ack_op_err; 1545 /* Get the number of bytes the message was padded by. */ 1546 pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3; 1547 /* 1548 * Check that the data size is >= 1 && <= pmtu. 1549 * Remember to account for the AETH header (4) and 1550 * ICRC (4). 1551 */ 1552 if (unlikely(tlen <= (hdrsize + pad + 8))) 1553 goto ack_len_err; 1554 read_last: 1555 tlen -= hdrsize + pad + 8; 1556 if (unlikely(tlen != qp->s_rdma_read_len)) 1557 goto ack_len_err; 1558 aeth = be32_to_cpu(ohdr->u.aeth); 1559 qib_copy_sge(&qp->s_rdma_read_sge, data, tlen, 0); 1560 WARN_ON(qp->s_rdma_read_sge.num_sge); 1561 (void) do_rc_ack(qp, aeth, psn, 1562 OP(RDMA_READ_RESPONSE_LAST), 0, rcd); 1563 goto ack_done; 1564 } 1565 1566 ack_op_err: 1567 status = IB_WC_LOC_QP_OP_ERR; 1568 goto ack_err; 1569 1570 ack_seq_err: 1571 rdma_seq_err(qp, ibp, psn, rcd); 1572 goto ack_done; 1573 1574 ack_len_err: 1575 status = IB_WC_LOC_LEN_ERR; 1576 ack_err: 1577 if (qp->s_last == qp->s_acked) { 1578 qib_send_complete(qp, wqe, status); 1579 qib_error_qp(qp, IB_WC_WR_FLUSH_ERR); 1580 } 1581 ack_done: 1582 spin_unlock_irqrestore(&qp->s_lock, flags); 1583 bail: 1584 return; 1585 } 1586 1587 /** 1588 * qib_rc_rcv_error - process an incoming duplicate or error RC packet 1589 * @ohdr: the other headers for this packet 1590 * @data: the packet data 1591 * @qp: the QP for this packet 1592 * @opcode: the opcode for this packet 1593 * @psn: the packet sequence number for this packet 1594 * @diff: the difference between the PSN and the expected PSN 1595 * 1596 * This is called from qib_rc_rcv() to process an unexpected 1597 * incoming RC packet for the given QP. 1598 * Called at interrupt level. 1599 * Return 1 if no more processing is needed; otherwise return 0 to 1600 * schedule a response to be sent. 1601 */ 1602 static int qib_rc_rcv_error(struct qib_other_headers *ohdr, 1603 void *data, 1604 struct qib_qp *qp, 1605 u32 opcode, 1606 u32 psn, 1607 int diff, 1608 struct qib_ctxtdata *rcd) 1609 { 1610 struct qib_ibport *ibp = to_iport(qp->ibqp.device, qp->port_num); 1611 struct qib_ack_entry *e; 1612 unsigned long flags; 1613 u8 i, prev; 1614 int old_req; 1615 1616 if (diff > 0) { 1617 /* 1618 * Packet sequence error. 1619 * A NAK will ACK earlier sends and RDMA writes. 1620 * Don't queue the NAK if we already sent one. 1621 */ 1622 if (!qp->r_nak_state) { 1623 ibp->n_rc_seqnak++; 1624 qp->r_nak_state = IB_NAK_PSN_ERROR; 1625 /* Use the expected PSN. */ 1626 qp->r_ack_psn = qp->r_psn; 1627 /* 1628 * Wait to send the sequence NAK until all packets 1629 * in the receive queue have been processed. 1630 * Otherwise, we end up propagating congestion. 1631 */ 1632 if (list_empty(&qp->rspwait)) { 1633 qp->r_flags |= QIB_R_RSP_NAK; 1634 atomic_inc(&qp->refcount); 1635 list_add_tail(&qp->rspwait, &rcd->qp_wait_list); 1636 } 1637 } 1638 goto done; 1639 } 1640 1641 /* 1642 * Handle a duplicate request. Don't re-execute SEND, RDMA 1643 * write or atomic op. Don't NAK errors, just silently drop 1644 * the duplicate request. Note that r_sge, r_len, and 1645 * r_rcv_len may be in use so don't modify them. 1646 * 1647 * We are supposed to ACK the earliest duplicate PSN but we 1648 * can coalesce an outstanding duplicate ACK. We have to 1649 * send the earliest so that RDMA reads can be restarted at 1650 * the requester's expected PSN. 1651 * 1652 * First, find where this duplicate PSN falls within the 1653 * ACKs previously sent. 1654 * old_req is true if there is an older response that is scheduled 1655 * to be sent before sending this one. 1656 */ 1657 e = NULL; 1658 old_req = 1; 1659 ibp->n_rc_dupreq++; 1660 1661 spin_lock_irqsave(&qp->s_lock, flags); 1662 1663 for (i = qp->r_head_ack_queue; ; i = prev) { 1664 if (i == qp->s_tail_ack_queue) 1665 old_req = 0; 1666 if (i) 1667 prev = i - 1; 1668 else 1669 prev = QIB_MAX_RDMA_ATOMIC; 1670 if (prev == qp->r_head_ack_queue) { 1671 e = NULL; 1672 break; 1673 } 1674 e = &qp->s_ack_queue[prev]; 1675 if (!e->opcode) { 1676 e = NULL; 1677 break; 1678 } 1679 if (qib_cmp24(psn, e->psn) >= 0) { 1680 if (prev == qp->s_tail_ack_queue && 1681 qib_cmp24(psn, e->lpsn) <= 0) 1682 old_req = 0; 1683 break; 1684 } 1685 } 1686 switch (opcode) { 1687 case OP(RDMA_READ_REQUEST): { 1688 struct ib_reth *reth; 1689 u32 offset; 1690 u32 len; 1691 1692 /* 1693 * If we didn't find the RDMA read request in the ack queue, 1694 * we can ignore this request. 1695 */ 1696 if (!e || e->opcode != OP(RDMA_READ_REQUEST)) 1697 goto unlock_done; 1698 /* RETH comes after BTH */ 1699 reth = &ohdr->u.rc.reth; 1700 /* 1701 * Address range must be a subset of the original 1702 * request and start on pmtu boundaries. 1703 * We reuse the old ack_queue slot since the requester 1704 * should not back up and request an earlier PSN for the 1705 * same request. 1706 */ 1707 offset = ((psn - e->psn) & QIB_PSN_MASK) * 1708 ib_mtu_enum_to_int(qp->path_mtu); 1709 len = be32_to_cpu(reth->length); 1710 if (unlikely(offset + len != e->rdma_sge.sge_length)) 1711 goto unlock_done; 1712 if (e->rdma_sge.mr) { 1713 atomic_dec(&e->rdma_sge.mr->refcount); 1714 e->rdma_sge.mr = NULL; 1715 } 1716 if (len != 0) { 1717 u32 rkey = be32_to_cpu(reth->rkey); 1718 u64 vaddr = be64_to_cpu(reth->vaddr); 1719 int ok; 1720 1721 ok = qib_rkey_ok(qp, &e->rdma_sge, len, vaddr, rkey, 1722 IB_ACCESS_REMOTE_READ); 1723 if (unlikely(!ok)) 1724 goto unlock_done; 1725 } else { 1726 e->rdma_sge.vaddr = NULL; 1727 e->rdma_sge.length = 0; 1728 e->rdma_sge.sge_length = 0; 1729 } 1730 e->psn = psn; 1731 if (old_req) 1732 goto unlock_done; 1733 qp->s_tail_ack_queue = prev; 1734 break; 1735 } 1736 1737 case OP(COMPARE_SWAP): 1738 case OP(FETCH_ADD): { 1739 /* 1740 * If we didn't find the atomic request in the ack queue 1741 * or the send tasklet is already backed up to send an 1742 * earlier entry, we can ignore this request. 1743 */ 1744 if (!e || e->opcode != (u8) opcode || old_req) 1745 goto unlock_done; 1746 qp->s_tail_ack_queue = prev; 1747 break; 1748 } 1749 1750 default: 1751 /* 1752 * Ignore this operation if it doesn't request an ACK 1753 * or an earlier RDMA read or atomic is going to be resent. 1754 */ 1755 if (!(psn & IB_BTH_REQ_ACK) || old_req) 1756 goto unlock_done; 1757 /* 1758 * Resend the most recent ACK if this request is 1759 * after all the previous RDMA reads and atomics. 1760 */ 1761 if (i == qp->r_head_ack_queue) { 1762 spin_unlock_irqrestore(&qp->s_lock, flags); 1763 qp->r_nak_state = 0; 1764 qp->r_ack_psn = qp->r_psn - 1; 1765 goto send_ack; 1766 } 1767 /* 1768 * Try to send a simple ACK to work around a Mellanox bug 1769 * which doesn't accept a RDMA read response or atomic 1770 * response as an ACK for earlier SENDs or RDMA writes. 1771 */ 1772 if (!(qp->s_flags & QIB_S_RESP_PENDING)) { 1773 spin_unlock_irqrestore(&qp->s_lock, flags); 1774 qp->r_nak_state = 0; 1775 qp->r_ack_psn = qp->s_ack_queue[i].psn - 1; 1776 goto send_ack; 1777 } 1778 /* 1779 * Resend the RDMA read or atomic op which 1780 * ACKs this duplicate request. 1781 */ 1782 qp->s_tail_ack_queue = i; 1783 break; 1784 } 1785 qp->s_ack_state = OP(ACKNOWLEDGE); 1786 qp->s_flags |= QIB_S_RESP_PENDING; 1787 qp->r_nak_state = 0; 1788 qib_schedule_send(qp); 1789 1790 unlock_done: 1791 spin_unlock_irqrestore(&qp->s_lock, flags); 1792 done: 1793 return 1; 1794 1795 send_ack: 1796 return 0; 1797 } 1798 1799 void qib_rc_error(struct qib_qp *qp, enum ib_wc_status err) 1800 { 1801 unsigned long flags; 1802 int lastwqe; 1803 1804 spin_lock_irqsave(&qp->s_lock, flags); 1805 lastwqe = qib_error_qp(qp, err); 1806 spin_unlock_irqrestore(&qp->s_lock, flags); 1807 1808 if (lastwqe) { 1809 struct ib_event ev; 1810 1811 ev.device = qp->ibqp.device; 1812 ev.element.qp = &qp->ibqp; 1813 ev.event = IB_EVENT_QP_LAST_WQE_REACHED; 1814 qp->ibqp.event_handler(&ev, qp->ibqp.qp_context); 1815 } 1816 } 1817 1818 static inline void qib_update_ack_queue(struct qib_qp *qp, unsigned n) 1819 { 1820 unsigned next; 1821 1822 next = n + 1; 1823 if (next > QIB_MAX_RDMA_ATOMIC) 1824 next = 0; 1825 qp->s_tail_ack_queue = next; 1826 qp->s_ack_state = OP(ACKNOWLEDGE); 1827 } 1828 1829 /** 1830 * qib_rc_rcv - process an incoming RC packet 1831 * @rcd: the context pointer 1832 * @hdr: the header of this packet 1833 * @has_grh: true if the header has a GRH 1834 * @data: the packet data 1835 * @tlen: the packet length 1836 * @qp: the QP for this packet 1837 * 1838 * This is called from qib_qp_rcv() to process an incoming RC packet 1839 * for the given QP. 1840 * Called at interrupt level. 1841 */ 1842 void qib_rc_rcv(struct qib_ctxtdata *rcd, struct qib_ib_header *hdr, 1843 int has_grh, void *data, u32 tlen, struct qib_qp *qp) 1844 { 1845 struct qib_ibport *ibp = &rcd->ppd->ibport_data; 1846 struct qib_other_headers *ohdr; 1847 u32 opcode; 1848 u32 hdrsize; 1849 u32 psn; 1850 u32 pad; 1851 struct ib_wc wc; 1852 u32 pmtu = ib_mtu_enum_to_int(qp->path_mtu); 1853 int diff; 1854 struct ib_reth *reth; 1855 unsigned long flags; 1856 int ret; 1857 1858 /* Check for GRH */ 1859 if (!has_grh) { 1860 ohdr = &hdr->u.oth; 1861 hdrsize = 8 + 12; /* LRH + BTH */ 1862 } else { 1863 ohdr = &hdr->u.l.oth; 1864 hdrsize = 8 + 40 + 12; /* LRH + GRH + BTH */ 1865 } 1866 1867 opcode = be32_to_cpu(ohdr->bth[0]); 1868 spin_lock_irqsave(&qp->s_lock, flags); 1869 if (qib_ruc_check_hdr(ibp, hdr, has_grh, qp, opcode)) 1870 goto sunlock; 1871 spin_unlock_irqrestore(&qp->s_lock, flags); 1872 1873 psn = be32_to_cpu(ohdr->bth[2]); 1874 opcode >>= 24; 1875 1876 /* 1877 * Process responses (ACKs) before anything else. Note that the 1878 * packet sequence number will be for something in the send work 1879 * queue rather than the expected receive packet sequence number. 1880 * In other words, this QP is the requester. 1881 */ 1882 if (opcode >= OP(RDMA_READ_RESPONSE_FIRST) && 1883 opcode <= OP(ATOMIC_ACKNOWLEDGE)) { 1884 qib_rc_rcv_resp(ibp, ohdr, data, tlen, qp, opcode, psn, 1885 hdrsize, pmtu, rcd); 1886 return; 1887 } 1888 1889 /* Compute 24 bits worth of difference. */ 1890 diff = qib_cmp24(psn, qp->r_psn); 1891 if (unlikely(diff)) { 1892 if (qib_rc_rcv_error(ohdr, data, qp, opcode, psn, diff, rcd)) 1893 return; 1894 goto send_ack; 1895 } 1896 1897 /* Check for opcode sequence errors. */ 1898 switch (qp->r_state) { 1899 case OP(SEND_FIRST): 1900 case OP(SEND_MIDDLE): 1901 if (opcode == OP(SEND_MIDDLE) || 1902 opcode == OP(SEND_LAST) || 1903 opcode == OP(SEND_LAST_WITH_IMMEDIATE)) 1904 break; 1905 goto nack_inv; 1906 1907 case OP(RDMA_WRITE_FIRST): 1908 case OP(RDMA_WRITE_MIDDLE): 1909 if (opcode == OP(RDMA_WRITE_MIDDLE) || 1910 opcode == OP(RDMA_WRITE_LAST) || 1911 opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE)) 1912 break; 1913 goto nack_inv; 1914 1915 default: 1916 if (opcode == OP(SEND_MIDDLE) || 1917 opcode == OP(SEND_LAST) || 1918 opcode == OP(SEND_LAST_WITH_IMMEDIATE) || 1919 opcode == OP(RDMA_WRITE_MIDDLE) || 1920 opcode == OP(RDMA_WRITE_LAST) || 1921 opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE)) 1922 goto nack_inv; 1923 /* 1924 * Note that it is up to the requester to not send a new 1925 * RDMA read or atomic operation before receiving an ACK 1926 * for the previous operation. 1927 */ 1928 break; 1929 } 1930 1931 memset(&wc, 0, sizeof wc); 1932 1933 if (qp->state == IB_QPS_RTR && !(qp->r_flags & QIB_R_COMM_EST)) { 1934 qp->r_flags |= QIB_R_COMM_EST; 1935 if (qp->ibqp.event_handler) { 1936 struct ib_event ev; 1937 1938 ev.device = qp->ibqp.device; 1939 ev.element.qp = &qp->ibqp; 1940 ev.event = IB_EVENT_COMM_EST; 1941 qp->ibqp.event_handler(&ev, qp->ibqp.qp_context); 1942 } 1943 } 1944 1945 /* OK, process the packet. */ 1946 switch (opcode) { 1947 case OP(SEND_FIRST): 1948 ret = qib_get_rwqe(qp, 0); 1949 if (ret < 0) 1950 goto nack_op_err; 1951 if (!ret) 1952 goto rnr_nak; 1953 qp->r_rcv_len = 0; 1954 /* FALLTHROUGH */ 1955 case OP(SEND_MIDDLE): 1956 case OP(RDMA_WRITE_MIDDLE): 1957 send_middle: 1958 /* Check for invalid length PMTU or posted rwqe len. */ 1959 if (unlikely(tlen != (hdrsize + pmtu + 4))) 1960 goto nack_inv; 1961 qp->r_rcv_len += pmtu; 1962 if (unlikely(qp->r_rcv_len > qp->r_len)) 1963 goto nack_inv; 1964 qib_copy_sge(&qp->r_sge, data, pmtu, 1); 1965 break; 1966 1967 case OP(RDMA_WRITE_LAST_WITH_IMMEDIATE): 1968 /* consume RWQE */ 1969 ret = qib_get_rwqe(qp, 1); 1970 if (ret < 0) 1971 goto nack_op_err; 1972 if (!ret) 1973 goto rnr_nak; 1974 goto send_last_imm; 1975 1976 case OP(SEND_ONLY): 1977 case OP(SEND_ONLY_WITH_IMMEDIATE): 1978 ret = qib_get_rwqe(qp, 0); 1979 if (ret < 0) 1980 goto nack_op_err; 1981 if (!ret) 1982 goto rnr_nak; 1983 qp->r_rcv_len = 0; 1984 if (opcode == OP(SEND_ONLY)) 1985 goto send_last; 1986 /* FALLTHROUGH */ 1987 case OP(SEND_LAST_WITH_IMMEDIATE): 1988 send_last_imm: 1989 wc.ex.imm_data = ohdr->u.imm_data; 1990 hdrsize += 4; 1991 wc.wc_flags = IB_WC_WITH_IMM; 1992 /* FALLTHROUGH */ 1993 case OP(SEND_LAST): 1994 case OP(RDMA_WRITE_LAST): 1995 send_last: 1996 /* Get the number of bytes the message was padded by. */ 1997 pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3; 1998 /* Check for invalid length. */ 1999 /* XXX LAST len should be >= 1 */ 2000 if (unlikely(tlen < (hdrsize + pad + 4))) 2001 goto nack_inv; 2002 /* Don't count the CRC. */ 2003 tlen -= (hdrsize + pad + 4); 2004 wc.byte_len = tlen + qp->r_rcv_len; 2005 if (unlikely(wc.byte_len > qp->r_len)) 2006 goto nack_inv; 2007 qib_copy_sge(&qp->r_sge, data, tlen, 1); 2008 while (qp->r_sge.num_sge) { 2009 atomic_dec(&qp->r_sge.sge.mr->refcount); 2010 if (--qp->r_sge.num_sge) 2011 qp->r_sge.sge = *qp->r_sge.sg_list++; 2012 } 2013 qp->r_msn++; 2014 if (!test_and_clear_bit(QIB_R_WRID_VALID, &qp->r_aflags)) 2015 break; 2016 wc.wr_id = qp->r_wr_id; 2017 wc.status = IB_WC_SUCCESS; 2018 if (opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE) || 2019 opcode == OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE)) 2020 wc.opcode = IB_WC_RECV_RDMA_WITH_IMM; 2021 else 2022 wc.opcode = IB_WC_RECV; 2023 wc.qp = &qp->ibqp; 2024 wc.src_qp = qp->remote_qpn; 2025 wc.slid = qp->remote_ah_attr.dlid; 2026 wc.sl = qp->remote_ah_attr.sl; 2027 /* Signal completion event if the solicited bit is set. */ 2028 qib_cq_enter(to_icq(qp->ibqp.recv_cq), &wc, 2029 (ohdr->bth[0] & 2030 cpu_to_be32(IB_BTH_SOLICITED)) != 0); 2031 break; 2032 2033 case OP(RDMA_WRITE_FIRST): 2034 case OP(RDMA_WRITE_ONLY): 2035 case OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE): 2036 if (unlikely(!(qp->qp_access_flags & IB_ACCESS_REMOTE_WRITE))) 2037 goto nack_inv; 2038 /* consume RWQE */ 2039 reth = &ohdr->u.rc.reth; 2040 hdrsize += sizeof(*reth); 2041 qp->r_len = be32_to_cpu(reth->length); 2042 qp->r_rcv_len = 0; 2043 qp->r_sge.sg_list = NULL; 2044 if (qp->r_len != 0) { 2045 u32 rkey = be32_to_cpu(reth->rkey); 2046 u64 vaddr = be64_to_cpu(reth->vaddr); 2047 int ok; 2048 2049 /* Check rkey & NAK */ 2050 ok = qib_rkey_ok(qp, &qp->r_sge.sge, qp->r_len, vaddr, 2051 rkey, IB_ACCESS_REMOTE_WRITE); 2052 if (unlikely(!ok)) 2053 goto nack_acc; 2054 qp->r_sge.num_sge = 1; 2055 } else { 2056 qp->r_sge.num_sge = 0; 2057 qp->r_sge.sge.mr = NULL; 2058 qp->r_sge.sge.vaddr = NULL; 2059 qp->r_sge.sge.length = 0; 2060 qp->r_sge.sge.sge_length = 0; 2061 } 2062 if (opcode == OP(RDMA_WRITE_FIRST)) 2063 goto send_middle; 2064 else if (opcode == OP(RDMA_WRITE_ONLY)) 2065 goto send_last; 2066 ret = qib_get_rwqe(qp, 1); 2067 if (ret < 0) 2068 goto nack_op_err; 2069 if (!ret) 2070 goto rnr_nak; 2071 wc.ex.imm_data = ohdr->u.rc.imm_data; 2072 hdrsize += 4; 2073 wc.wc_flags = IB_WC_WITH_IMM; 2074 goto send_last; 2075 2076 case OP(RDMA_READ_REQUEST): { 2077 struct qib_ack_entry *e; 2078 u32 len; 2079 u8 next; 2080 2081 if (unlikely(!(qp->qp_access_flags & IB_ACCESS_REMOTE_READ))) 2082 goto nack_inv; 2083 next = qp->r_head_ack_queue + 1; 2084 /* s_ack_queue is size QIB_MAX_RDMA_ATOMIC+1 so use > not >= */ 2085 if (next > QIB_MAX_RDMA_ATOMIC) 2086 next = 0; 2087 spin_lock_irqsave(&qp->s_lock, flags); 2088 if (unlikely(next == qp->s_tail_ack_queue)) { 2089 if (!qp->s_ack_queue[next].sent) 2090 goto nack_inv_unlck; 2091 qib_update_ack_queue(qp, next); 2092 } 2093 e = &qp->s_ack_queue[qp->r_head_ack_queue]; 2094 if (e->opcode == OP(RDMA_READ_REQUEST) && e->rdma_sge.mr) { 2095 atomic_dec(&e->rdma_sge.mr->refcount); 2096 e->rdma_sge.mr = NULL; 2097 } 2098 reth = &ohdr->u.rc.reth; 2099 len = be32_to_cpu(reth->length); 2100 if (len) { 2101 u32 rkey = be32_to_cpu(reth->rkey); 2102 u64 vaddr = be64_to_cpu(reth->vaddr); 2103 int ok; 2104 2105 /* Check rkey & NAK */ 2106 ok = qib_rkey_ok(qp, &e->rdma_sge, len, vaddr, 2107 rkey, IB_ACCESS_REMOTE_READ); 2108 if (unlikely(!ok)) 2109 goto nack_acc_unlck; 2110 /* 2111 * Update the next expected PSN. We add 1 later 2112 * below, so only add the remainder here. 2113 */ 2114 if (len > pmtu) 2115 qp->r_psn += (len - 1) / pmtu; 2116 } else { 2117 e->rdma_sge.mr = NULL; 2118 e->rdma_sge.vaddr = NULL; 2119 e->rdma_sge.length = 0; 2120 e->rdma_sge.sge_length = 0; 2121 } 2122 e->opcode = opcode; 2123 e->sent = 0; 2124 e->psn = psn; 2125 e->lpsn = qp->r_psn; 2126 /* 2127 * We need to increment the MSN here instead of when we 2128 * finish sending the result since a duplicate request would 2129 * increment it more than once. 2130 */ 2131 qp->r_msn++; 2132 qp->r_psn++; 2133 qp->r_state = opcode; 2134 qp->r_nak_state = 0; 2135 qp->r_head_ack_queue = next; 2136 2137 /* Schedule the send tasklet. */ 2138 qp->s_flags |= QIB_S_RESP_PENDING; 2139 qib_schedule_send(qp); 2140 2141 goto sunlock; 2142 } 2143 2144 case OP(COMPARE_SWAP): 2145 case OP(FETCH_ADD): { 2146 struct ib_atomic_eth *ateth; 2147 struct qib_ack_entry *e; 2148 u64 vaddr; 2149 atomic64_t *maddr; 2150 u64 sdata; 2151 u32 rkey; 2152 u8 next; 2153 2154 if (unlikely(!(qp->qp_access_flags & IB_ACCESS_REMOTE_ATOMIC))) 2155 goto nack_inv; 2156 next = qp->r_head_ack_queue + 1; 2157 if (next > QIB_MAX_RDMA_ATOMIC) 2158 next = 0; 2159 spin_lock_irqsave(&qp->s_lock, flags); 2160 if (unlikely(next == qp->s_tail_ack_queue)) { 2161 if (!qp->s_ack_queue[next].sent) 2162 goto nack_inv_unlck; 2163 qib_update_ack_queue(qp, next); 2164 } 2165 e = &qp->s_ack_queue[qp->r_head_ack_queue]; 2166 if (e->opcode == OP(RDMA_READ_REQUEST) && e->rdma_sge.mr) { 2167 atomic_dec(&e->rdma_sge.mr->refcount); 2168 e->rdma_sge.mr = NULL; 2169 } 2170 ateth = &ohdr->u.atomic_eth; 2171 vaddr = ((u64) be32_to_cpu(ateth->vaddr[0]) << 32) | 2172 be32_to_cpu(ateth->vaddr[1]); 2173 if (unlikely(vaddr & (sizeof(u64) - 1))) 2174 goto nack_inv_unlck; 2175 rkey = be32_to_cpu(ateth->rkey); 2176 /* Check rkey & NAK */ 2177 if (unlikely(!qib_rkey_ok(qp, &qp->r_sge.sge, sizeof(u64), 2178 vaddr, rkey, 2179 IB_ACCESS_REMOTE_ATOMIC))) 2180 goto nack_acc_unlck; 2181 /* Perform atomic OP and save result. */ 2182 maddr = (atomic64_t *) qp->r_sge.sge.vaddr; 2183 sdata = be64_to_cpu(ateth->swap_data); 2184 e->atomic_data = (opcode == OP(FETCH_ADD)) ? 2185 (u64) atomic64_add_return(sdata, maddr) - sdata : 2186 (u64) cmpxchg((u64 *) qp->r_sge.sge.vaddr, 2187 be64_to_cpu(ateth->compare_data), 2188 sdata); 2189 atomic_dec(&qp->r_sge.sge.mr->refcount); 2190 qp->r_sge.num_sge = 0; 2191 e->opcode = opcode; 2192 e->sent = 0; 2193 e->psn = psn; 2194 e->lpsn = psn; 2195 qp->r_msn++; 2196 qp->r_psn++; 2197 qp->r_state = opcode; 2198 qp->r_nak_state = 0; 2199 qp->r_head_ack_queue = next; 2200 2201 /* Schedule the send tasklet. */ 2202 qp->s_flags |= QIB_S_RESP_PENDING; 2203 qib_schedule_send(qp); 2204 2205 goto sunlock; 2206 } 2207 2208 default: 2209 /* NAK unknown opcodes. */ 2210 goto nack_inv; 2211 } 2212 qp->r_psn++; 2213 qp->r_state = opcode; 2214 qp->r_ack_psn = psn; 2215 qp->r_nak_state = 0; 2216 /* Send an ACK if requested or required. */ 2217 if (psn & (1 << 31)) 2218 goto send_ack; 2219 return; 2220 2221 rnr_nak: 2222 qp->r_nak_state = IB_RNR_NAK | qp->r_min_rnr_timer; 2223 qp->r_ack_psn = qp->r_psn; 2224 /* Queue RNR NAK for later */ 2225 if (list_empty(&qp->rspwait)) { 2226 qp->r_flags |= QIB_R_RSP_NAK; 2227 atomic_inc(&qp->refcount); 2228 list_add_tail(&qp->rspwait, &rcd->qp_wait_list); 2229 } 2230 return; 2231 2232 nack_op_err: 2233 qib_rc_error(qp, IB_WC_LOC_QP_OP_ERR); 2234 qp->r_nak_state = IB_NAK_REMOTE_OPERATIONAL_ERROR; 2235 qp->r_ack_psn = qp->r_psn; 2236 /* Queue NAK for later */ 2237 if (list_empty(&qp->rspwait)) { 2238 qp->r_flags |= QIB_R_RSP_NAK; 2239 atomic_inc(&qp->refcount); 2240 list_add_tail(&qp->rspwait, &rcd->qp_wait_list); 2241 } 2242 return; 2243 2244 nack_inv_unlck: 2245 spin_unlock_irqrestore(&qp->s_lock, flags); 2246 nack_inv: 2247 qib_rc_error(qp, IB_WC_LOC_QP_OP_ERR); 2248 qp->r_nak_state = IB_NAK_INVALID_REQUEST; 2249 qp->r_ack_psn = qp->r_psn; 2250 /* Queue NAK for later */ 2251 if (list_empty(&qp->rspwait)) { 2252 qp->r_flags |= QIB_R_RSP_NAK; 2253 atomic_inc(&qp->refcount); 2254 list_add_tail(&qp->rspwait, &rcd->qp_wait_list); 2255 } 2256 return; 2257 2258 nack_acc_unlck: 2259 spin_unlock_irqrestore(&qp->s_lock, flags); 2260 nack_acc: 2261 qib_rc_error(qp, IB_WC_LOC_PROT_ERR); 2262 qp->r_nak_state = IB_NAK_REMOTE_ACCESS_ERROR; 2263 qp->r_ack_psn = qp->r_psn; 2264 send_ack: 2265 qib_send_rc_ack(qp); 2266 return; 2267 2268 sunlock: 2269 spin_unlock_irqrestore(&qp->s_lock, flags); 2270 } 2271