1 /* 2 * Copyright (c) 2012, 2013 Intel Corporation. All rights reserved. 3 * Copyright (c) 2006 - 2012 QLogic Corporation. All rights reserved. 4 * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved. 5 * 6 * This software is available to you under a choice of one of two 7 * licenses. You may choose to be licensed under the terms of the GNU 8 * General Public License (GPL) Version 2, available from the file 9 * COPYING in the main directory of this source tree, or the 10 * OpenIB.org BSD license below: 11 * 12 * Redistribution and use in source and binary forms, with or 13 * without modification, are permitted provided that the following 14 * conditions are met: 15 * 16 * - Redistributions of source code must retain the above 17 * copyright notice, this list of conditions and the following 18 * disclaimer. 19 * 20 * - Redistributions in binary form must reproduce the above 21 * copyright notice, this list of conditions and the following 22 * disclaimer in the documentation and/or other materials 23 * provided with the distribution. 24 * 25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 32 * SOFTWARE. 33 */ 34 35 #include <linux/pci.h> 36 #include <linux/netdevice.h> 37 #include <linux/vmalloc.h> 38 #include <linux/delay.h> 39 #include <linux/idr.h> 40 #include <linux/module.h> 41 #include <linux/printk.h> 42 #ifdef CONFIG_INFINIBAND_QIB_DCA 43 #include <linux/dca.h> 44 #endif 45 #include <rdma/rdma_vt.h> 46 47 #include "qib.h" 48 #include "qib_common.h" 49 #include "qib_mad.h" 50 #ifdef CONFIG_DEBUG_FS 51 #include "qib_debugfs.h" 52 #include "qib_verbs.h" 53 #endif 54 55 #undef pr_fmt 56 #define pr_fmt(fmt) QIB_DRV_NAME ": " fmt 57 58 /* 59 * min buffers we want to have per context, after driver 60 */ 61 #define QIB_MIN_USER_CTXT_BUFCNT 7 62 63 #define QLOGIC_IB_R_SOFTWARE_MASK 0xFF 64 #define QLOGIC_IB_R_SOFTWARE_SHIFT 24 65 #define QLOGIC_IB_R_EMULATOR_MASK (1ULL<<62) 66 67 /* 68 * Number of ctxts we are configured to use (to allow for more pio 69 * buffers per ctxt, etc.) Zero means use chip value. 70 */ 71 ushort qib_cfgctxts; 72 module_param_named(cfgctxts, qib_cfgctxts, ushort, S_IRUGO); 73 MODULE_PARM_DESC(cfgctxts, "Set max number of contexts to use"); 74 75 unsigned qib_numa_aware; 76 module_param_named(numa_aware, qib_numa_aware, uint, S_IRUGO); 77 MODULE_PARM_DESC(numa_aware, 78 "0 -> PSM allocation close to HCA, 1 -> PSM allocation local to process"); 79 80 /* 81 * If set, do not write to any regs if avoidable, hack to allow 82 * check for deranged default register values. 83 */ 84 ushort qib_mini_init; 85 module_param_named(mini_init, qib_mini_init, ushort, S_IRUGO); 86 MODULE_PARM_DESC(mini_init, "If set, do minimal diag init"); 87 88 unsigned qib_n_krcv_queues; 89 module_param_named(krcvqs, qib_n_krcv_queues, uint, S_IRUGO); 90 MODULE_PARM_DESC(krcvqs, "number of kernel receive queues per IB port"); 91 92 unsigned qib_cc_table_size; 93 module_param_named(cc_table_size, qib_cc_table_size, uint, S_IRUGO); 94 MODULE_PARM_DESC(cc_table_size, "Congestion control table entries 0 (CCA disabled - default), min = 128, max = 1984"); 95 96 static void verify_interrupt(unsigned long); 97 98 static struct idr qib_unit_table; 99 u32 qib_cpulist_count; 100 unsigned long *qib_cpulist; 101 102 /* set number of contexts we'll actually use */ 103 void qib_set_ctxtcnt(struct qib_devdata *dd) 104 { 105 if (!qib_cfgctxts) { 106 dd->cfgctxts = dd->first_user_ctxt + num_online_cpus(); 107 if (dd->cfgctxts > dd->ctxtcnt) 108 dd->cfgctxts = dd->ctxtcnt; 109 } else if (qib_cfgctxts < dd->num_pports) 110 dd->cfgctxts = dd->ctxtcnt; 111 else if (qib_cfgctxts <= dd->ctxtcnt) 112 dd->cfgctxts = qib_cfgctxts; 113 else 114 dd->cfgctxts = dd->ctxtcnt; 115 dd->freectxts = (dd->first_user_ctxt > dd->cfgctxts) ? 0 : 116 dd->cfgctxts - dd->first_user_ctxt; 117 } 118 119 /* 120 * Common code for creating the receive context array. 121 */ 122 int qib_create_ctxts(struct qib_devdata *dd) 123 { 124 unsigned i; 125 int local_node_id = pcibus_to_node(dd->pcidev->bus); 126 127 if (local_node_id < 0) 128 local_node_id = numa_node_id(); 129 dd->assigned_node_id = local_node_id; 130 131 /* 132 * Allocate full ctxtcnt array, rather than just cfgctxts, because 133 * cleanup iterates across all possible ctxts. 134 */ 135 dd->rcd = kcalloc(dd->ctxtcnt, sizeof(*dd->rcd), GFP_KERNEL); 136 if (!dd->rcd) 137 return -ENOMEM; 138 139 /* create (one or more) kctxt */ 140 for (i = 0; i < dd->first_user_ctxt; ++i) { 141 struct qib_pportdata *ppd; 142 struct qib_ctxtdata *rcd; 143 144 if (dd->skip_kctxt_mask & (1 << i)) 145 continue; 146 147 ppd = dd->pport + (i % dd->num_pports); 148 149 rcd = qib_create_ctxtdata(ppd, i, dd->assigned_node_id); 150 if (!rcd) { 151 qib_dev_err(dd, 152 "Unable to allocate ctxtdata for Kernel ctxt, failing\n"); 153 kfree(dd->rcd); 154 dd->rcd = NULL; 155 return -ENOMEM; 156 } 157 rcd->pkeys[0] = QIB_DEFAULT_P_KEY; 158 rcd->seq_cnt = 1; 159 } 160 return 0; 161 } 162 163 /* 164 * Common code for user and kernel context setup. 165 */ 166 struct qib_ctxtdata *qib_create_ctxtdata(struct qib_pportdata *ppd, u32 ctxt, 167 int node_id) 168 { 169 struct qib_devdata *dd = ppd->dd; 170 struct qib_ctxtdata *rcd; 171 172 rcd = kzalloc_node(sizeof(*rcd), GFP_KERNEL, node_id); 173 if (rcd) { 174 INIT_LIST_HEAD(&rcd->qp_wait_list); 175 rcd->node_id = node_id; 176 rcd->ppd = ppd; 177 rcd->dd = dd; 178 rcd->cnt = 1; 179 rcd->ctxt = ctxt; 180 dd->rcd[ctxt] = rcd; 181 #ifdef CONFIG_DEBUG_FS 182 if (ctxt < dd->first_user_ctxt) { /* N/A for PSM contexts */ 183 rcd->opstats = kzalloc_node(sizeof(*rcd->opstats), 184 GFP_KERNEL, node_id); 185 if (!rcd->opstats) { 186 kfree(rcd); 187 qib_dev_err(dd, 188 "Unable to allocate per ctxt stats buffer\n"); 189 return NULL; 190 } 191 } 192 #endif 193 dd->f_init_ctxt(rcd); 194 195 /* 196 * To avoid wasting a lot of memory, we allocate 32KB chunks 197 * of physically contiguous memory, advance through it until 198 * used up and then allocate more. Of course, we need 199 * memory to store those extra pointers, now. 32KB seems to 200 * be the most that is "safe" under memory pressure 201 * (creating large files and then copying them over 202 * NFS while doing lots of MPI jobs). The OOM killer can 203 * get invoked, even though we say we can sleep and this can 204 * cause significant system problems.... 205 */ 206 rcd->rcvegrbuf_size = 0x8000; 207 rcd->rcvegrbufs_perchunk = 208 rcd->rcvegrbuf_size / dd->rcvegrbufsize; 209 rcd->rcvegrbuf_chunks = (rcd->rcvegrcnt + 210 rcd->rcvegrbufs_perchunk - 1) / 211 rcd->rcvegrbufs_perchunk; 212 BUG_ON(!is_power_of_2(rcd->rcvegrbufs_perchunk)); 213 rcd->rcvegrbufs_perchunk_shift = 214 ilog2(rcd->rcvegrbufs_perchunk); 215 } 216 return rcd; 217 } 218 219 /* 220 * Common code for initializing the physical port structure. 221 */ 222 int qib_init_pportdata(struct qib_pportdata *ppd, struct qib_devdata *dd, 223 u8 hw_pidx, u8 port) 224 { 225 int size; 226 227 ppd->dd = dd; 228 ppd->hw_pidx = hw_pidx; 229 ppd->port = port; /* IB port number, not index */ 230 231 spin_lock_init(&ppd->sdma_lock); 232 spin_lock_init(&ppd->lflags_lock); 233 spin_lock_init(&ppd->cc_shadow_lock); 234 init_waitqueue_head(&ppd->state_wait); 235 236 init_timer(&ppd->symerr_clear_timer); 237 ppd->symerr_clear_timer.function = qib_clear_symerror_on_linkup; 238 ppd->symerr_clear_timer.data = (unsigned long)ppd; 239 240 ppd->qib_wq = NULL; 241 ppd->ibport_data.pmastats = 242 alloc_percpu(struct qib_pma_counters); 243 if (!ppd->ibport_data.pmastats) 244 return -ENOMEM; 245 ppd->ibport_data.rvp.rc_acks = alloc_percpu(u64); 246 ppd->ibport_data.rvp.rc_qacks = alloc_percpu(u64); 247 ppd->ibport_data.rvp.rc_delayed_comp = alloc_percpu(u64); 248 if (!(ppd->ibport_data.rvp.rc_acks) || 249 !(ppd->ibport_data.rvp.rc_qacks) || 250 !(ppd->ibport_data.rvp.rc_delayed_comp)) 251 return -ENOMEM; 252 253 if (qib_cc_table_size < IB_CCT_MIN_ENTRIES) 254 goto bail; 255 256 ppd->cc_supported_table_entries = min(max_t(int, qib_cc_table_size, 257 IB_CCT_MIN_ENTRIES), IB_CCT_ENTRIES*IB_CC_TABLE_CAP_DEFAULT); 258 259 ppd->cc_max_table_entries = 260 ppd->cc_supported_table_entries/IB_CCT_ENTRIES; 261 262 size = IB_CC_TABLE_CAP_DEFAULT * sizeof(struct ib_cc_table_entry) 263 * IB_CCT_ENTRIES; 264 ppd->ccti_entries = kzalloc(size, GFP_KERNEL); 265 if (!ppd->ccti_entries) 266 goto bail; 267 268 size = IB_CC_CCS_ENTRIES * sizeof(struct ib_cc_congestion_entry); 269 ppd->congestion_entries = kzalloc(size, GFP_KERNEL); 270 if (!ppd->congestion_entries) 271 goto bail_1; 272 273 size = sizeof(struct cc_table_shadow); 274 ppd->ccti_entries_shadow = kzalloc(size, GFP_KERNEL); 275 if (!ppd->ccti_entries_shadow) 276 goto bail_2; 277 278 size = sizeof(struct ib_cc_congestion_setting_attr); 279 ppd->congestion_entries_shadow = kzalloc(size, GFP_KERNEL); 280 if (!ppd->congestion_entries_shadow) 281 goto bail_3; 282 283 return 0; 284 285 bail_3: 286 kfree(ppd->ccti_entries_shadow); 287 ppd->ccti_entries_shadow = NULL; 288 bail_2: 289 kfree(ppd->congestion_entries); 290 ppd->congestion_entries = NULL; 291 bail_1: 292 kfree(ppd->ccti_entries); 293 ppd->ccti_entries = NULL; 294 bail: 295 /* User is intentionally disabling the congestion control agent */ 296 if (!qib_cc_table_size) 297 return 0; 298 299 if (qib_cc_table_size < IB_CCT_MIN_ENTRIES) { 300 qib_cc_table_size = 0; 301 qib_dev_err(dd, 302 "Congestion Control table size %d less than minimum %d for port %d\n", 303 qib_cc_table_size, IB_CCT_MIN_ENTRIES, port); 304 } 305 306 qib_dev_err(dd, "Congestion Control Agent disabled for port %d\n", 307 port); 308 return 0; 309 } 310 311 static int init_pioavailregs(struct qib_devdata *dd) 312 { 313 int ret, pidx; 314 u64 *status_page; 315 316 dd->pioavailregs_dma = dma_alloc_coherent( 317 &dd->pcidev->dev, PAGE_SIZE, &dd->pioavailregs_phys, 318 GFP_KERNEL); 319 if (!dd->pioavailregs_dma) { 320 qib_dev_err(dd, 321 "failed to allocate PIOavail reg area in memory\n"); 322 ret = -ENOMEM; 323 goto done; 324 } 325 326 /* 327 * We really want L2 cache aligned, but for current CPUs of 328 * interest, they are the same. 329 */ 330 status_page = (u64 *) 331 ((char *) dd->pioavailregs_dma + 332 ((2 * L1_CACHE_BYTES + 333 dd->pioavregs * sizeof(u64)) & ~L1_CACHE_BYTES)); 334 /* device status comes first, for backwards compatibility */ 335 dd->devstatusp = status_page; 336 *status_page++ = 0; 337 for (pidx = 0; pidx < dd->num_pports; ++pidx) { 338 dd->pport[pidx].statusp = status_page; 339 *status_page++ = 0; 340 } 341 342 /* 343 * Setup buffer to hold freeze and other messages, accessible to 344 * apps, following statusp. This is per-unit, not per port. 345 */ 346 dd->freezemsg = (char *) status_page; 347 *dd->freezemsg = 0; 348 /* length of msg buffer is "whatever is left" */ 349 ret = (char *) status_page - (char *) dd->pioavailregs_dma; 350 dd->freezelen = PAGE_SIZE - ret; 351 352 ret = 0; 353 354 done: 355 return ret; 356 } 357 358 /** 359 * init_shadow_tids - allocate the shadow TID array 360 * @dd: the qlogic_ib device 361 * 362 * allocate the shadow TID array, so we can qib_munlock previous 363 * entries. It may make more sense to move the pageshadow to the 364 * ctxt data structure, so we only allocate memory for ctxts actually 365 * in use, since we at 8k per ctxt, now. 366 * We don't want failures here to prevent use of the driver/chip, 367 * so no return value. 368 */ 369 static void init_shadow_tids(struct qib_devdata *dd) 370 { 371 struct page **pages; 372 dma_addr_t *addrs; 373 374 pages = vzalloc(dd->cfgctxts * dd->rcvtidcnt * sizeof(struct page *)); 375 if (!pages) 376 goto bail; 377 378 addrs = vzalloc(dd->cfgctxts * dd->rcvtidcnt * sizeof(dma_addr_t)); 379 if (!addrs) 380 goto bail_free; 381 382 dd->pageshadow = pages; 383 dd->physshadow = addrs; 384 return; 385 386 bail_free: 387 vfree(pages); 388 bail: 389 dd->pageshadow = NULL; 390 } 391 392 /* 393 * Do initialization for device that is only needed on 394 * first detect, not on resets. 395 */ 396 static int loadtime_init(struct qib_devdata *dd) 397 { 398 int ret = 0; 399 400 if (((dd->revision >> QLOGIC_IB_R_SOFTWARE_SHIFT) & 401 QLOGIC_IB_R_SOFTWARE_MASK) != QIB_CHIP_SWVERSION) { 402 qib_dev_err(dd, 403 "Driver only handles version %d, chip swversion is %d (%llx), failng\n", 404 QIB_CHIP_SWVERSION, 405 (int)(dd->revision >> 406 QLOGIC_IB_R_SOFTWARE_SHIFT) & 407 QLOGIC_IB_R_SOFTWARE_MASK, 408 (unsigned long long) dd->revision); 409 ret = -ENOSYS; 410 goto done; 411 } 412 413 if (dd->revision & QLOGIC_IB_R_EMULATOR_MASK) 414 qib_devinfo(dd->pcidev, "%s", dd->boardversion); 415 416 spin_lock_init(&dd->pioavail_lock); 417 spin_lock_init(&dd->sendctrl_lock); 418 spin_lock_init(&dd->uctxt_lock); 419 spin_lock_init(&dd->qib_diag_trans_lock); 420 spin_lock_init(&dd->eep_st_lock); 421 mutex_init(&dd->eep_lock); 422 423 if (qib_mini_init) 424 goto done; 425 426 ret = init_pioavailregs(dd); 427 init_shadow_tids(dd); 428 429 qib_get_eeprom_info(dd); 430 431 /* setup time (don't start yet) to verify we got interrupt */ 432 init_timer(&dd->intrchk_timer); 433 dd->intrchk_timer.function = verify_interrupt; 434 dd->intrchk_timer.data = (unsigned long) dd; 435 done: 436 return ret; 437 } 438 439 /** 440 * init_after_reset - re-initialize after a reset 441 * @dd: the qlogic_ib device 442 * 443 * sanity check at least some of the values after reset, and 444 * ensure no receive or transmit (explicitly, in case reset 445 * failed 446 */ 447 static int init_after_reset(struct qib_devdata *dd) 448 { 449 int i; 450 451 /* 452 * Ensure chip does no sends or receives, tail updates, or 453 * pioavail updates while we re-initialize. This is mostly 454 * for the driver data structures, not chip registers. 455 */ 456 for (i = 0; i < dd->num_pports; ++i) { 457 /* 458 * ctxt == -1 means "all contexts". Only really safe for 459 * _dis_abling things, as here. 460 */ 461 dd->f_rcvctrl(dd->pport + i, QIB_RCVCTRL_CTXT_DIS | 462 QIB_RCVCTRL_INTRAVAIL_DIS | 463 QIB_RCVCTRL_TAILUPD_DIS, -1); 464 /* Redundant across ports for some, but no big deal. */ 465 dd->f_sendctrl(dd->pport + i, QIB_SENDCTRL_SEND_DIS | 466 QIB_SENDCTRL_AVAIL_DIS); 467 } 468 469 return 0; 470 } 471 472 static void enable_chip(struct qib_devdata *dd) 473 { 474 u64 rcvmask; 475 int i; 476 477 /* 478 * Enable PIO send, and update of PIOavail regs to memory. 479 */ 480 for (i = 0; i < dd->num_pports; ++i) 481 dd->f_sendctrl(dd->pport + i, QIB_SENDCTRL_SEND_ENB | 482 QIB_SENDCTRL_AVAIL_ENB); 483 /* 484 * Enable kernel ctxts' receive and receive interrupt. 485 * Other ctxts done as user opens and inits them. 486 */ 487 rcvmask = QIB_RCVCTRL_CTXT_ENB | QIB_RCVCTRL_INTRAVAIL_ENB; 488 rcvmask |= (dd->flags & QIB_NODMA_RTAIL) ? 489 QIB_RCVCTRL_TAILUPD_DIS : QIB_RCVCTRL_TAILUPD_ENB; 490 for (i = 0; dd->rcd && i < dd->first_user_ctxt; ++i) { 491 struct qib_ctxtdata *rcd = dd->rcd[i]; 492 493 if (rcd) 494 dd->f_rcvctrl(rcd->ppd, rcvmask, i); 495 } 496 } 497 498 static void verify_interrupt(unsigned long opaque) 499 { 500 struct qib_devdata *dd = (struct qib_devdata *) opaque; 501 u64 int_counter; 502 503 if (!dd) 504 return; /* being torn down */ 505 506 /* 507 * If we don't have a lid or any interrupts, let the user know and 508 * don't bother checking again. 509 */ 510 int_counter = qib_int_counter(dd) - dd->z_int_counter; 511 if (int_counter == 0) { 512 if (!dd->f_intr_fallback(dd)) 513 dev_err(&dd->pcidev->dev, 514 "No interrupts detected, not usable.\n"); 515 else /* re-arm the timer to see if fallback works */ 516 mod_timer(&dd->intrchk_timer, jiffies + HZ/2); 517 } 518 } 519 520 static void init_piobuf_state(struct qib_devdata *dd) 521 { 522 int i, pidx; 523 u32 uctxts; 524 525 /* 526 * Ensure all buffers are free, and fifos empty. Buffers 527 * are common, so only do once for port 0. 528 * 529 * After enable and qib_chg_pioavailkernel so we can safely 530 * enable pioavail updates and PIOENABLE. After this, packets 531 * are ready and able to go out. 532 */ 533 dd->f_sendctrl(dd->pport, QIB_SENDCTRL_DISARM_ALL); 534 for (pidx = 0; pidx < dd->num_pports; ++pidx) 535 dd->f_sendctrl(dd->pport + pidx, QIB_SENDCTRL_FLUSH); 536 537 /* 538 * If not all sendbufs are used, add the one to each of the lower 539 * numbered contexts. pbufsctxt and lastctxt_piobuf are 540 * calculated in chip-specific code because it may cause some 541 * chip-specific adjustments to be made. 542 */ 543 uctxts = dd->cfgctxts - dd->first_user_ctxt; 544 dd->ctxts_extrabuf = dd->pbufsctxt ? 545 dd->lastctxt_piobuf - (dd->pbufsctxt * uctxts) : 0; 546 547 /* 548 * Set up the shadow copies of the piobufavail registers, 549 * which we compare against the chip registers for now, and 550 * the in memory DMA'ed copies of the registers. 551 * By now pioavail updates to memory should have occurred, so 552 * copy them into our working/shadow registers; this is in 553 * case something went wrong with abort, but mostly to get the 554 * initial values of the generation bit correct. 555 */ 556 for (i = 0; i < dd->pioavregs; i++) { 557 __le64 tmp; 558 559 tmp = dd->pioavailregs_dma[i]; 560 /* 561 * Don't need to worry about pioavailkernel here 562 * because we will call qib_chg_pioavailkernel() later 563 * in initialization, to busy out buffers as needed. 564 */ 565 dd->pioavailshadow[i] = le64_to_cpu(tmp); 566 } 567 while (i < ARRAY_SIZE(dd->pioavailshadow)) 568 dd->pioavailshadow[i++] = 0; /* for debugging sanity */ 569 570 /* after pioavailshadow is setup */ 571 qib_chg_pioavailkernel(dd, 0, dd->piobcnt2k + dd->piobcnt4k, 572 TXCHK_CHG_TYPE_KERN, NULL); 573 dd->f_initvl15_bufs(dd); 574 } 575 576 /** 577 * qib_create_workqueues - create per port workqueues 578 * @dd: the qlogic_ib device 579 */ 580 static int qib_create_workqueues(struct qib_devdata *dd) 581 { 582 int pidx; 583 struct qib_pportdata *ppd; 584 585 for (pidx = 0; pidx < dd->num_pports; ++pidx) { 586 ppd = dd->pport + pidx; 587 if (!ppd->qib_wq) { 588 char wq_name[8]; /* 3 + 2 + 1 + 1 + 1 */ 589 590 snprintf(wq_name, sizeof(wq_name), "qib%d_%d", 591 dd->unit, pidx); 592 ppd->qib_wq = alloc_ordered_workqueue(wq_name, 593 WQ_MEM_RECLAIM); 594 if (!ppd->qib_wq) 595 goto wq_error; 596 } 597 } 598 return 0; 599 wq_error: 600 pr_err("create_singlethread_workqueue failed for port %d\n", 601 pidx + 1); 602 for (pidx = 0; pidx < dd->num_pports; ++pidx) { 603 ppd = dd->pport + pidx; 604 if (ppd->qib_wq) { 605 destroy_workqueue(ppd->qib_wq); 606 ppd->qib_wq = NULL; 607 } 608 } 609 return -ENOMEM; 610 } 611 612 static void qib_free_pportdata(struct qib_pportdata *ppd) 613 { 614 free_percpu(ppd->ibport_data.pmastats); 615 free_percpu(ppd->ibport_data.rvp.rc_acks); 616 free_percpu(ppd->ibport_data.rvp.rc_qacks); 617 free_percpu(ppd->ibport_data.rvp.rc_delayed_comp); 618 ppd->ibport_data.pmastats = NULL; 619 } 620 621 /** 622 * qib_init - do the actual initialization sequence on the chip 623 * @dd: the qlogic_ib device 624 * @reinit: reinitializing, so don't allocate new memory 625 * 626 * Do the actual initialization sequence on the chip. This is done 627 * both from the init routine called from the PCI infrastructure, and 628 * when we reset the chip, or detect that it was reset internally, 629 * or it's administratively re-enabled. 630 * 631 * Memory allocation here and in called routines is only done in 632 * the first case (reinit == 0). We have to be careful, because even 633 * without memory allocation, we need to re-write all the chip registers 634 * TIDs, etc. after the reset or enable has completed. 635 */ 636 int qib_init(struct qib_devdata *dd, int reinit) 637 { 638 int ret = 0, pidx, lastfail = 0; 639 u32 portok = 0; 640 unsigned i; 641 struct qib_ctxtdata *rcd; 642 struct qib_pportdata *ppd; 643 unsigned long flags; 644 645 /* Set linkstate to unknown, so we can watch for a transition. */ 646 for (pidx = 0; pidx < dd->num_pports; ++pidx) { 647 ppd = dd->pport + pidx; 648 spin_lock_irqsave(&ppd->lflags_lock, flags); 649 ppd->lflags &= ~(QIBL_LINKACTIVE | QIBL_LINKARMED | 650 QIBL_LINKDOWN | QIBL_LINKINIT | 651 QIBL_LINKV); 652 spin_unlock_irqrestore(&ppd->lflags_lock, flags); 653 } 654 655 if (reinit) 656 ret = init_after_reset(dd); 657 else 658 ret = loadtime_init(dd); 659 if (ret) 660 goto done; 661 662 /* Bypass most chip-init, to get to device creation */ 663 if (qib_mini_init) 664 return 0; 665 666 ret = dd->f_late_initreg(dd); 667 if (ret) 668 goto done; 669 670 /* dd->rcd can be NULL if early init failed */ 671 for (i = 0; dd->rcd && i < dd->first_user_ctxt; ++i) { 672 /* 673 * Set up the (kernel) rcvhdr queue and egr TIDs. If doing 674 * re-init, the simplest way to handle this is to free 675 * existing, and re-allocate. 676 * Need to re-create rest of ctxt 0 ctxtdata as well. 677 */ 678 rcd = dd->rcd[i]; 679 if (!rcd) 680 continue; 681 682 lastfail = qib_create_rcvhdrq(dd, rcd); 683 if (!lastfail) 684 lastfail = qib_setup_eagerbufs(rcd); 685 if (lastfail) { 686 qib_dev_err(dd, 687 "failed to allocate kernel ctxt's rcvhdrq and/or egr bufs\n"); 688 continue; 689 } 690 } 691 692 for (pidx = 0; pidx < dd->num_pports; ++pidx) { 693 int mtu; 694 695 if (lastfail) 696 ret = lastfail; 697 ppd = dd->pport + pidx; 698 mtu = ib_mtu_enum_to_int(qib_ibmtu); 699 if (mtu == -1) { 700 mtu = QIB_DEFAULT_MTU; 701 qib_ibmtu = 0; /* don't leave invalid value */ 702 } 703 /* set max we can ever have for this driver load */ 704 ppd->init_ibmaxlen = min(mtu > 2048 ? 705 dd->piosize4k : dd->piosize2k, 706 dd->rcvegrbufsize + 707 (dd->rcvhdrentsize << 2)); 708 /* 709 * Have to initialize ibmaxlen, but this will normally 710 * change immediately in qib_set_mtu(). 711 */ 712 ppd->ibmaxlen = ppd->init_ibmaxlen; 713 qib_set_mtu(ppd, mtu); 714 715 spin_lock_irqsave(&ppd->lflags_lock, flags); 716 ppd->lflags |= QIBL_IB_LINK_DISABLED; 717 spin_unlock_irqrestore(&ppd->lflags_lock, flags); 718 719 lastfail = dd->f_bringup_serdes(ppd); 720 if (lastfail) { 721 qib_devinfo(dd->pcidev, 722 "Failed to bringup IB port %u\n", ppd->port); 723 lastfail = -ENETDOWN; 724 continue; 725 } 726 727 portok++; 728 } 729 730 if (!portok) { 731 /* none of the ports initialized */ 732 if (!ret && lastfail) 733 ret = lastfail; 734 else if (!ret) 735 ret = -ENETDOWN; 736 /* but continue on, so we can debug cause */ 737 } 738 739 enable_chip(dd); 740 741 init_piobuf_state(dd); 742 743 done: 744 if (!ret) { 745 /* chip is OK for user apps; mark it as initialized */ 746 for (pidx = 0; pidx < dd->num_pports; ++pidx) { 747 ppd = dd->pport + pidx; 748 /* 749 * Set status even if port serdes is not initialized 750 * so that diags will work. 751 */ 752 *ppd->statusp |= QIB_STATUS_CHIP_PRESENT | 753 QIB_STATUS_INITTED; 754 if (!ppd->link_speed_enabled) 755 continue; 756 if (dd->flags & QIB_HAS_SEND_DMA) 757 ret = qib_setup_sdma(ppd); 758 init_timer(&ppd->hol_timer); 759 ppd->hol_timer.function = qib_hol_event; 760 ppd->hol_timer.data = (unsigned long)ppd; 761 ppd->hol_state = QIB_HOL_UP; 762 } 763 764 /* now we can enable all interrupts from the chip */ 765 dd->f_set_intr_state(dd, 1); 766 767 /* 768 * Setup to verify we get an interrupt, and fallback 769 * to an alternate if necessary and possible. 770 */ 771 mod_timer(&dd->intrchk_timer, jiffies + HZ/2); 772 /* start stats retrieval timer */ 773 mod_timer(&dd->stats_timer, jiffies + HZ * ACTIVITY_TIMER); 774 } 775 776 /* if ret is non-zero, we probably should do some cleanup here... */ 777 return ret; 778 } 779 780 /* 781 * These next two routines are placeholders in case we don't have per-arch 782 * code for controlling write combining. If explicit control of write 783 * combining is not available, performance will probably be awful. 784 */ 785 786 int __attribute__((weak)) qib_enable_wc(struct qib_devdata *dd) 787 { 788 return -EOPNOTSUPP; 789 } 790 791 void __attribute__((weak)) qib_disable_wc(struct qib_devdata *dd) 792 { 793 } 794 795 static inline struct qib_devdata *__qib_lookup(int unit) 796 { 797 return idr_find(&qib_unit_table, unit); 798 } 799 800 struct qib_devdata *qib_lookup(int unit) 801 { 802 struct qib_devdata *dd; 803 unsigned long flags; 804 805 spin_lock_irqsave(&qib_devs_lock, flags); 806 dd = __qib_lookup(unit); 807 spin_unlock_irqrestore(&qib_devs_lock, flags); 808 809 return dd; 810 } 811 812 /* 813 * Stop the timers during unit shutdown, or after an error late 814 * in initialization. 815 */ 816 static void qib_stop_timers(struct qib_devdata *dd) 817 { 818 struct qib_pportdata *ppd; 819 int pidx; 820 821 if (dd->stats_timer.data) { 822 del_timer_sync(&dd->stats_timer); 823 dd->stats_timer.data = 0; 824 } 825 if (dd->intrchk_timer.data) { 826 del_timer_sync(&dd->intrchk_timer); 827 dd->intrchk_timer.data = 0; 828 } 829 for (pidx = 0; pidx < dd->num_pports; ++pidx) { 830 ppd = dd->pport + pidx; 831 if (ppd->hol_timer.data) 832 del_timer_sync(&ppd->hol_timer); 833 if (ppd->led_override_timer.data) { 834 del_timer_sync(&ppd->led_override_timer); 835 atomic_set(&ppd->led_override_timer_active, 0); 836 } 837 if (ppd->symerr_clear_timer.data) 838 del_timer_sync(&ppd->symerr_clear_timer); 839 } 840 } 841 842 /** 843 * qib_shutdown_device - shut down a device 844 * @dd: the qlogic_ib device 845 * 846 * This is called to make the device quiet when we are about to 847 * unload the driver, and also when the device is administratively 848 * disabled. It does not free any data structures. 849 * Everything it does has to be setup again by qib_init(dd, 1) 850 */ 851 static void qib_shutdown_device(struct qib_devdata *dd) 852 { 853 struct qib_pportdata *ppd; 854 unsigned pidx; 855 856 for (pidx = 0; pidx < dd->num_pports; ++pidx) { 857 ppd = dd->pport + pidx; 858 859 spin_lock_irq(&ppd->lflags_lock); 860 ppd->lflags &= ~(QIBL_LINKDOWN | QIBL_LINKINIT | 861 QIBL_LINKARMED | QIBL_LINKACTIVE | 862 QIBL_LINKV); 863 spin_unlock_irq(&ppd->lflags_lock); 864 *ppd->statusp &= ~(QIB_STATUS_IB_CONF | QIB_STATUS_IB_READY); 865 } 866 dd->flags &= ~QIB_INITTED; 867 868 /* mask interrupts, but not errors */ 869 dd->f_set_intr_state(dd, 0); 870 871 for (pidx = 0; pidx < dd->num_pports; ++pidx) { 872 ppd = dd->pport + pidx; 873 dd->f_rcvctrl(ppd, QIB_RCVCTRL_TAILUPD_DIS | 874 QIB_RCVCTRL_CTXT_DIS | 875 QIB_RCVCTRL_INTRAVAIL_DIS | 876 QIB_RCVCTRL_PKEY_ENB, -1); 877 /* 878 * Gracefully stop all sends allowing any in progress to 879 * trickle out first. 880 */ 881 dd->f_sendctrl(ppd, QIB_SENDCTRL_CLEAR); 882 } 883 884 /* 885 * Enough for anything that's going to trickle out to have actually 886 * done so. 887 */ 888 udelay(20); 889 890 for (pidx = 0; pidx < dd->num_pports; ++pidx) { 891 ppd = dd->pport + pidx; 892 dd->f_setextled(ppd, 0); /* make sure LEDs are off */ 893 894 if (dd->flags & QIB_HAS_SEND_DMA) 895 qib_teardown_sdma(ppd); 896 897 dd->f_sendctrl(ppd, QIB_SENDCTRL_AVAIL_DIS | 898 QIB_SENDCTRL_SEND_DIS); 899 /* 900 * Clear SerdesEnable. 901 * We can't count on interrupts since we are stopping. 902 */ 903 dd->f_quiet_serdes(ppd); 904 905 if (ppd->qib_wq) { 906 destroy_workqueue(ppd->qib_wq); 907 ppd->qib_wq = NULL; 908 } 909 qib_free_pportdata(ppd); 910 } 911 912 } 913 914 /** 915 * qib_free_ctxtdata - free a context's allocated data 916 * @dd: the qlogic_ib device 917 * @rcd: the ctxtdata structure 918 * 919 * free up any allocated data for a context 920 * This should not touch anything that would affect a simultaneous 921 * re-allocation of context data, because it is called after qib_mutex 922 * is released (and can be called from reinit as well). 923 * It should never change any chip state, or global driver state. 924 */ 925 void qib_free_ctxtdata(struct qib_devdata *dd, struct qib_ctxtdata *rcd) 926 { 927 if (!rcd) 928 return; 929 930 if (rcd->rcvhdrq) { 931 dma_free_coherent(&dd->pcidev->dev, rcd->rcvhdrq_size, 932 rcd->rcvhdrq, rcd->rcvhdrq_phys); 933 rcd->rcvhdrq = NULL; 934 if (rcd->rcvhdrtail_kvaddr) { 935 dma_free_coherent(&dd->pcidev->dev, PAGE_SIZE, 936 rcd->rcvhdrtail_kvaddr, 937 rcd->rcvhdrqtailaddr_phys); 938 rcd->rcvhdrtail_kvaddr = NULL; 939 } 940 } 941 if (rcd->rcvegrbuf) { 942 unsigned e; 943 944 for (e = 0; e < rcd->rcvegrbuf_chunks; e++) { 945 void *base = rcd->rcvegrbuf[e]; 946 size_t size = rcd->rcvegrbuf_size; 947 948 dma_free_coherent(&dd->pcidev->dev, size, 949 base, rcd->rcvegrbuf_phys[e]); 950 } 951 kfree(rcd->rcvegrbuf); 952 rcd->rcvegrbuf = NULL; 953 kfree(rcd->rcvegrbuf_phys); 954 rcd->rcvegrbuf_phys = NULL; 955 rcd->rcvegrbuf_chunks = 0; 956 } 957 958 kfree(rcd->tid_pg_list); 959 vfree(rcd->user_event_mask); 960 vfree(rcd->subctxt_uregbase); 961 vfree(rcd->subctxt_rcvegrbuf); 962 vfree(rcd->subctxt_rcvhdr_base); 963 #ifdef CONFIG_DEBUG_FS 964 kfree(rcd->opstats); 965 rcd->opstats = NULL; 966 #endif 967 kfree(rcd); 968 } 969 970 /* 971 * Perform a PIO buffer bandwidth write test, to verify proper system 972 * configuration. Even when all the setup calls work, occasionally 973 * BIOS or other issues can prevent write combining from working, or 974 * can cause other bandwidth problems to the chip. 975 * 976 * This test simply writes the same buffer over and over again, and 977 * measures close to the peak bandwidth to the chip (not testing 978 * data bandwidth to the wire). On chips that use an address-based 979 * trigger to send packets to the wire, this is easy. On chips that 980 * use a count to trigger, we want to make sure that the packet doesn't 981 * go out on the wire, or trigger flow control checks. 982 */ 983 static void qib_verify_pioperf(struct qib_devdata *dd) 984 { 985 u32 pbnum, cnt, lcnt; 986 u32 __iomem *piobuf; 987 u32 *addr; 988 u64 msecs, emsecs; 989 990 piobuf = dd->f_getsendbuf(dd->pport, 0ULL, &pbnum); 991 if (!piobuf) { 992 qib_devinfo(dd->pcidev, 993 "No PIObufs for checking perf, skipping\n"); 994 return; 995 } 996 997 /* 998 * Enough to give us a reasonable test, less than piobuf size, and 999 * likely multiple of store buffer length. 1000 */ 1001 cnt = 1024; 1002 1003 addr = vmalloc(cnt); 1004 if (!addr) 1005 goto done; 1006 1007 preempt_disable(); /* we want reasonably accurate elapsed time */ 1008 msecs = 1 + jiffies_to_msecs(jiffies); 1009 for (lcnt = 0; lcnt < 10000U; lcnt++) { 1010 /* wait until we cross msec boundary */ 1011 if (jiffies_to_msecs(jiffies) >= msecs) 1012 break; 1013 udelay(1); 1014 } 1015 1016 dd->f_set_armlaunch(dd, 0); 1017 1018 /* 1019 * length 0, no dwords actually sent 1020 */ 1021 writeq(0, piobuf); 1022 qib_flush_wc(); 1023 1024 /* 1025 * This is only roughly accurate, since even with preempt we 1026 * still take interrupts that could take a while. Running for 1027 * >= 5 msec seems to get us "close enough" to accurate values. 1028 */ 1029 msecs = jiffies_to_msecs(jiffies); 1030 for (emsecs = lcnt = 0; emsecs <= 5UL; lcnt++) { 1031 qib_pio_copy(piobuf + 64, addr, cnt >> 2); 1032 emsecs = jiffies_to_msecs(jiffies) - msecs; 1033 } 1034 1035 /* 1 GiB/sec, slightly over IB SDR line rate */ 1036 if (lcnt < (emsecs * 1024U)) 1037 qib_dev_err(dd, 1038 "Performance problem: bandwidth to PIO buffers is only %u MiB/sec\n", 1039 lcnt / (u32) emsecs); 1040 1041 preempt_enable(); 1042 1043 vfree(addr); 1044 1045 done: 1046 /* disarm piobuf, so it's available again */ 1047 dd->f_sendctrl(dd->pport, QIB_SENDCTRL_DISARM_BUF(pbnum)); 1048 qib_sendbuf_done(dd, pbnum); 1049 dd->f_set_armlaunch(dd, 1); 1050 } 1051 1052 void qib_free_devdata(struct qib_devdata *dd) 1053 { 1054 unsigned long flags; 1055 1056 spin_lock_irqsave(&qib_devs_lock, flags); 1057 idr_remove(&qib_unit_table, dd->unit); 1058 list_del(&dd->list); 1059 spin_unlock_irqrestore(&qib_devs_lock, flags); 1060 1061 #ifdef CONFIG_DEBUG_FS 1062 qib_dbg_ibdev_exit(&dd->verbs_dev); 1063 #endif 1064 free_percpu(dd->int_counter); 1065 rvt_dealloc_device(&dd->verbs_dev.rdi); 1066 } 1067 1068 u64 qib_int_counter(struct qib_devdata *dd) 1069 { 1070 int cpu; 1071 u64 int_counter = 0; 1072 1073 for_each_possible_cpu(cpu) 1074 int_counter += *per_cpu_ptr(dd->int_counter, cpu); 1075 return int_counter; 1076 } 1077 1078 u64 qib_sps_ints(void) 1079 { 1080 unsigned long flags; 1081 struct qib_devdata *dd; 1082 u64 sps_ints = 0; 1083 1084 spin_lock_irqsave(&qib_devs_lock, flags); 1085 list_for_each_entry(dd, &qib_dev_list, list) { 1086 sps_ints += qib_int_counter(dd); 1087 } 1088 spin_unlock_irqrestore(&qib_devs_lock, flags); 1089 return sps_ints; 1090 } 1091 1092 /* 1093 * Allocate our primary per-unit data structure. Must be done via verbs 1094 * allocator, because the verbs cleanup process both does cleanup and 1095 * free of the data structure. 1096 * "extra" is for chip-specific data. 1097 * 1098 * Use the idr mechanism to get a unit number for this unit. 1099 */ 1100 struct qib_devdata *qib_alloc_devdata(struct pci_dev *pdev, size_t extra) 1101 { 1102 unsigned long flags; 1103 struct qib_devdata *dd; 1104 int ret, nports; 1105 1106 /* extra is * number of ports */ 1107 nports = extra / sizeof(struct qib_pportdata); 1108 dd = (struct qib_devdata *)rvt_alloc_device(sizeof(*dd) + extra, 1109 nports); 1110 if (!dd) 1111 return ERR_PTR(-ENOMEM); 1112 1113 INIT_LIST_HEAD(&dd->list); 1114 1115 idr_preload(GFP_KERNEL); 1116 spin_lock_irqsave(&qib_devs_lock, flags); 1117 1118 ret = idr_alloc(&qib_unit_table, dd, 0, 0, GFP_NOWAIT); 1119 if (ret >= 0) { 1120 dd->unit = ret; 1121 list_add(&dd->list, &qib_dev_list); 1122 } 1123 1124 spin_unlock_irqrestore(&qib_devs_lock, flags); 1125 idr_preload_end(); 1126 1127 if (ret < 0) { 1128 qib_early_err(&pdev->dev, 1129 "Could not allocate unit ID: error %d\n", -ret); 1130 goto bail; 1131 } 1132 dd->int_counter = alloc_percpu(u64); 1133 if (!dd->int_counter) { 1134 ret = -ENOMEM; 1135 qib_early_err(&pdev->dev, 1136 "Could not allocate per-cpu int_counter\n"); 1137 goto bail; 1138 } 1139 1140 if (!qib_cpulist_count) { 1141 u32 count = num_online_cpus(); 1142 1143 qib_cpulist = kzalloc(BITS_TO_LONGS(count) * 1144 sizeof(long), GFP_KERNEL); 1145 if (qib_cpulist) 1146 qib_cpulist_count = count; 1147 } 1148 #ifdef CONFIG_DEBUG_FS 1149 qib_dbg_ibdev_init(&dd->verbs_dev); 1150 #endif 1151 return dd; 1152 bail: 1153 if (!list_empty(&dd->list)) 1154 list_del_init(&dd->list); 1155 rvt_dealloc_device(&dd->verbs_dev.rdi); 1156 return ERR_PTR(ret); 1157 } 1158 1159 /* 1160 * Called from freeze mode handlers, and from PCI error 1161 * reporting code. Should be paranoid about state of 1162 * system and data structures. 1163 */ 1164 void qib_disable_after_error(struct qib_devdata *dd) 1165 { 1166 if (dd->flags & QIB_INITTED) { 1167 u32 pidx; 1168 1169 dd->flags &= ~QIB_INITTED; 1170 if (dd->pport) 1171 for (pidx = 0; pidx < dd->num_pports; ++pidx) { 1172 struct qib_pportdata *ppd; 1173 1174 ppd = dd->pport + pidx; 1175 if (dd->flags & QIB_PRESENT) { 1176 qib_set_linkstate(ppd, 1177 QIB_IB_LINKDOWN_DISABLE); 1178 dd->f_setextled(ppd, 0); 1179 } 1180 *ppd->statusp &= ~QIB_STATUS_IB_READY; 1181 } 1182 } 1183 1184 /* 1185 * Mark as having had an error for driver, and also 1186 * for /sys and status word mapped to user programs. 1187 * This marks unit as not usable, until reset. 1188 */ 1189 if (dd->devstatusp) 1190 *dd->devstatusp |= QIB_STATUS_HWERROR; 1191 } 1192 1193 static void qib_remove_one(struct pci_dev *); 1194 static int qib_init_one(struct pci_dev *, const struct pci_device_id *); 1195 1196 #define DRIVER_LOAD_MSG "Intel " QIB_DRV_NAME " loaded: " 1197 #define PFX QIB_DRV_NAME ": " 1198 1199 static const struct pci_device_id qib_pci_tbl[] = { 1200 { PCI_DEVICE(PCI_VENDOR_ID_PATHSCALE, PCI_DEVICE_ID_QLOGIC_IB_6120) }, 1201 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_IB_7220) }, 1202 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_IB_7322) }, 1203 { 0, } 1204 }; 1205 1206 MODULE_DEVICE_TABLE(pci, qib_pci_tbl); 1207 1208 static struct pci_driver qib_driver = { 1209 .name = QIB_DRV_NAME, 1210 .probe = qib_init_one, 1211 .remove = qib_remove_one, 1212 .id_table = qib_pci_tbl, 1213 .err_handler = &qib_pci_err_handler, 1214 }; 1215 1216 #ifdef CONFIG_INFINIBAND_QIB_DCA 1217 1218 static int qib_notify_dca(struct notifier_block *, unsigned long, void *); 1219 static struct notifier_block dca_notifier = { 1220 .notifier_call = qib_notify_dca, 1221 .next = NULL, 1222 .priority = 0 1223 }; 1224 1225 static int qib_notify_dca_device(struct device *device, void *data) 1226 { 1227 struct qib_devdata *dd = dev_get_drvdata(device); 1228 unsigned long event = *(unsigned long *)data; 1229 1230 return dd->f_notify_dca(dd, event); 1231 } 1232 1233 static int qib_notify_dca(struct notifier_block *nb, unsigned long event, 1234 void *p) 1235 { 1236 int rval; 1237 1238 rval = driver_for_each_device(&qib_driver.driver, NULL, 1239 &event, qib_notify_dca_device); 1240 return rval ? NOTIFY_BAD : NOTIFY_DONE; 1241 } 1242 1243 #endif 1244 1245 /* 1246 * Do all the generic driver unit- and chip-independent memory 1247 * allocation and initialization. 1248 */ 1249 static int __init qib_ib_init(void) 1250 { 1251 int ret; 1252 1253 ret = qib_dev_init(); 1254 if (ret) 1255 goto bail; 1256 1257 /* 1258 * These must be called before the driver is registered with 1259 * the PCI subsystem. 1260 */ 1261 idr_init(&qib_unit_table); 1262 1263 #ifdef CONFIG_INFINIBAND_QIB_DCA 1264 dca_register_notify(&dca_notifier); 1265 #endif 1266 #ifdef CONFIG_DEBUG_FS 1267 qib_dbg_init(); 1268 #endif 1269 ret = pci_register_driver(&qib_driver); 1270 if (ret < 0) { 1271 pr_err("Unable to register driver: error %d\n", -ret); 1272 goto bail_dev; 1273 } 1274 1275 /* not fatal if it doesn't work */ 1276 if (qib_init_qibfs()) 1277 pr_err("Unable to register ipathfs\n"); 1278 goto bail; /* all OK */ 1279 1280 bail_dev: 1281 #ifdef CONFIG_INFINIBAND_QIB_DCA 1282 dca_unregister_notify(&dca_notifier); 1283 #endif 1284 #ifdef CONFIG_DEBUG_FS 1285 qib_dbg_exit(); 1286 #endif 1287 idr_destroy(&qib_unit_table); 1288 qib_dev_cleanup(); 1289 bail: 1290 return ret; 1291 } 1292 1293 module_init(qib_ib_init); 1294 1295 /* 1296 * Do the non-unit driver cleanup, memory free, etc. at unload. 1297 */ 1298 static void __exit qib_ib_cleanup(void) 1299 { 1300 int ret; 1301 1302 ret = qib_exit_qibfs(); 1303 if (ret) 1304 pr_err( 1305 "Unable to cleanup counter filesystem: error %d\n", 1306 -ret); 1307 1308 #ifdef CONFIG_INFINIBAND_QIB_DCA 1309 dca_unregister_notify(&dca_notifier); 1310 #endif 1311 pci_unregister_driver(&qib_driver); 1312 #ifdef CONFIG_DEBUG_FS 1313 qib_dbg_exit(); 1314 #endif 1315 1316 qib_cpulist_count = 0; 1317 kfree(qib_cpulist); 1318 1319 idr_destroy(&qib_unit_table); 1320 qib_dev_cleanup(); 1321 } 1322 1323 module_exit(qib_ib_cleanup); 1324 1325 /* this can only be called after a successful initialization */ 1326 static void cleanup_device_data(struct qib_devdata *dd) 1327 { 1328 int ctxt; 1329 int pidx; 1330 struct qib_ctxtdata **tmp; 1331 unsigned long flags; 1332 1333 /* users can't do anything more with chip */ 1334 for (pidx = 0; pidx < dd->num_pports; ++pidx) { 1335 if (dd->pport[pidx].statusp) 1336 *dd->pport[pidx].statusp &= ~QIB_STATUS_CHIP_PRESENT; 1337 1338 spin_lock(&dd->pport[pidx].cc_shadow_lock); 1339 1340 kfree(dd->pport[pidx].congestion_entries); 1341 dd->pport[pidx].congestion_entries = NULL; 1342 kfree(dd->pport[pidx].ccti_entries); 1343 dd->pport[pidx].ccti_entries = NULL; 1344 kfree(dd->pport[pidx].ccti_entries_shadow); 1345 dd->pport[pidx].ccti_entries_shadow = NULL; 1346 kfree(dd->pport[pidx].congestion_entries_shadow); 1347 dd->pport[pidx].congestion_entries_shadow = NULL; 1348 1349 spin_unlock(&dd->pport[pidx].cc_shadow_lock); 1350 } 1351 1352 qib_disable_wc(dd); 1353 1354 if (dd->pioavailregs_dma) { 1355 dma_free_coherent(&dd->pcidev->dev, PAGE_SIZE, 1356 (void *) dd->pioavailregs_dma, 1357 dd->pioavailregs_phys); 1358 dd->pioavailregs_dma = NULL; 1359 } 1360 1361 if (dd->pageshadow) { 1362 struct page **tmpp = dd->pageshadow; 1363 dma_addr_t *tmpd = dd->physshadow; 1364 int i; 1365 1366 for (ctxt = 0; ctxt < dd->cfgctxts; ctxt++) { 1367 int ctxt_tidbase = ctxt * dd->rcvtidcnt; 1368 int maxtid = ctxt_tidbase + dd->rcvtidcnt; 1369 1370 for (i = ctxt_tidbase; i < maxtid; i++) { 1371 if (!tmpp[i]) 1372 continue; 1373 pci_unmap_page(dd->pcidev, tmpd[i], 1374 PAGE_SIZE, PCI_DMA_FROMDEVICE); 1375 qib_release_user_pages(&tmpp[i], 1); 1376 tmpp[i] = NULL; 1377 } 1378 } 1379 1380 dd->pageshadow = NULL; 1381 vfree(tmpp); 1382 dd->physshadow = NULL; 1383 vfree(tmpd); 1384 } 1385 1386 /* 1387 * Free any resources still in use (usually just kernel contexts) 1388 * at unload; we do for ctxtcnt, because that's what we allocate. 1389 * We acquire lock to be really paranoid that rcd isn't being 1390 * accessed from some interrupt-related code (that should not happen, 1391 * but best to be sure). 1392 */ 1393 spin_lock_irqsave(&dd->uctxt_lock, flags); 1394 tmp = dd->rcd; 1395 dd->rcd = NULL; 1396 spin_unlock_irqrestore(&dd->uctxt_lock, flags); 1397 for (ctxt = 0; tmp && ctxt < dd->ctxtcnt; ctxt++) { 1398 struct qib_ctxtdata *rcd = tmp[ctxt]; 1399 1400 tmp[ctxt] = NULL; /* debugging paranoia */ 1401 qib_free_ctxtdata(dd, rcd); 1402 } 1403 kfree(tmp); 1404 kfree(dd->boardname); 1405 } 1406 1407 /* 1408 * Clean up on unit shutdown, or error during unit load after 1409 * successful initialization. 1410 */ 1411 static void qib_postinit_cleanup(struct qib_devdata *dd) 1412 { 1413 /* 1414 * Clean up chip-specific stuff. 1415 * We check for NULL here, because it's outside 1416 * the kregbase check, and we need to call it 1417 * after the free_irq. Thus it's possible that 1418 * the function pointers were never initialized. 1419 */ 1420 if (dd->f_cleanup) 1421 dd->f_cleanup(dd); 1422 1423 qib_pcie_ddcleanup(dd); 1424 1425 cleanup_device_data(dd); 1426 1427 qib_free_devdata(dd); 1428 } 1429 1430 static int qib_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) 1431 { 1432 int ret, j, pidx, initfail; 1433 struct qib_devdata *dd = NULL; 1434 1435 ret = qib_pcie_init(pdev, ent); 1436 if (ret) 1437 goto bail; 1438 1439 /* 1440 * Do device-specific initialiation, function table setup, dd 1441 * allocation, etc. 1442 */ 1443 switch (ent->device) { 1444 case PCI_DEVICE_ID_QLOGIC_IB_6120: 1445 #ifdef CONFIG_PCI_MSI 1446 dd = qib_init_iba6120_funcs(pdev, ent); 1447 #else 1448 qib_early_err(&pdev->dev, 1449 "Intel PCIE device 0x%x cannot work if CONFIG_PCI_MSI is not enabled\n", 1450 ent->device); 1451 dd = ERR_PTR(-ENODEV); 1452 #endif 1453 break; 1454 1455 case PCI_DEVICE_ID_QLOGIC_IB_7220: 1456 dd = qib_init_iba7220_funcs(pdev, ent); 1457 break; 1458 1459 case PCI_DEVICE_ID_QLOGIC_IB_7322: 1460 dd = qib_init_iba7322_funcs(pdev, ent); 1461 break; 1462 1463 default: 1464 qib_early_err(&pdev->dev, 1465 "Failing on unknown Intel deviceid 0x%x\n", 1466 ent->device); 1467 ret = -ENODEV; 1468 } 1469 1470 if (IS_ERR(dd)) 1471 ret = PTR_ERR(dd); 1472 if (ret) 1473 goto bail; /* error already printed */ 1474 1475 ret = qib_create_workqueues(dd); 1476 if (ret) 1477 goto bail; 1478 1479 /* do the generic initialization */ 1480 initfail = qib_init(dd, 0); 1481 1482 ret = qib_register_ib_device(dd); 1483 1484 /* 1485 * Now ready for use. this should be cleared whenever we 1486 * detect a reset, or initiate one. If earlier failure, 1487 * we still create devices, so diags, etc. can be used 1488 * to determine cause of problem. 1489 */ 1490 if (!qib_mini_init && !initfail && !ret) 1491 dd->flags |= QIB_INITTED; 1492 1493 j = qib_device_create(dd); 1494 if (j) 1495 qib_dev_err(dd, "Failed to create /dev devices: %d\n", -j); 1496 j = qibfs_add(dd); 1497 if (j) 1498 qib_dev_err(dd, "Failed filesystem setup for counters: %d\n", 1499 -j); 1500 1501 if (qib_mini_init || initfail || ret) { 1502 qib_stop_timers(dd); 1503 flush_workqueue(ib_wq); 1504 for (pidx = 0; pidx < dd->num_pports; ++pidx) 1505 dd->f_quiet_serdes(dd->pport + pidx); 1506 if (qib_mini_init) 1507 goto bail; 1508 if (!j) { 1509 (void) qibfs_remove(dd); 1510 qib_device_remove(dd); 1511 } 1512 if (!ret) 1513 qib_unregister_ib_device(dd); 1514 qib_postinit_cleanup(dd); 1515 if (initfail) 1516 ret = initfail; 1517 goto bail; 1518 } 1519 1520 ret = qib_enable_wc(dd); 1521 if (ret) { 1522 qib_dev_err(dd, 1523 "Write combining not enabled (err %d): performance may be poor\n", 1524 -ret); 1525 ret = 0; 1526 } 1527 1528 qib_verify_pioperf(dd); 1529 bail: 1530 return ret; 1531 } 1532 1533 static void qib_remove_one(struct pci_dev *pdev) 1534 { 1535 struct qib_devdata *dd = pci_get_drvdata(pdev); 1536 int ret; 1537 1538 /* unregister from IB core */ 1539 qib_unregister_ib_device(dd); 1540 1541 /* 1542 * Disable the IB link, disable interrupts on the device, 1543 * clear dma engines, etc. 1544 */ 1545 if (!qib_mini_init) 1546 qib_shutdown_device(dd); 1547 1548 qib_stop_timers(dd); 1549 1550 /* wait until all of our (qsfp) queue_work() calls complete */ 1551 flush_workqueue(ib_wq); 1552 1553 ret = qibfs_remove(dd); 1554 if (ret) 1555 qib_dev_err(dd, "Failed counters filesystem cleanup: %d\n", 1556 -ret); 1557 1558 qib_device_remove(dd); 1559 1560 qib_postinit_cleanup(dd); 1561 } 1562 1563 /** 1564 * qib_create_rcvhdrq - create a receive header queue 1565 * @dd: the qlogic_ib device 1566 * @rcd: the context data 1567 * 1568 * This must be contiguous memory (from an i/o perspective), and must be 1569 * DMA'able (which means for some systems, it will go through an IOMMU, 1570 * or be forced into a low address range). 1571 */ 1572 int qib_create_rcvhdrq(struct qib_devdata *dd, struct qib_ctxtdata *rcd) 1573 { 1574 unsigned amt; 1575 int old_node_id; 1576 1577 if (!rcd->rcvhdrq) { 1578 dma_addr_t phys_hdrqtail; 1579 gfp_t gfp_flags; 1580 1581 amt = ALIGN(dd->rcvhdrcnt * dd->rcvhdrentsize * 1582 sizeof(u32), PAGE_SIZE); 1583 gfp_flags = (rcd->ctxt >= dd->first_user_ctxt) ? 1584 GFP_USER : GFP_KERNEL; 1585 1586 old_node_id = dev_to_node(&dd->pcidev->dev); 1587 set_dev_node(&dd->pcidev->dev, rcd->node_id); 1588 rcd->rcvhdrq = dma_alloc_coherent( 1589 &dd->pcidev->dev, amt, &rcd->rcvhdrq_phys, 1590 gfp_flags | __GFP_COMP); 1591 set_dev_node(&dd->pcidev->dev, old_node_id); 1592 1593 if (!rcd->rcvhdrq) { 1594 qib_dev_err(dd, 1595 "attempt to allocate %d bytes for ctxt %u rcvhdrq failed\n", 1596 amt, rcd->ctxt); 1597 goto bail; 1598 } 1599 1600 if (rcd->ctxt >= dd->first_user_ctxt) { 1601 rcd->user_event_mask = vmalloc_user(PAGE_SIZE); 1602 if (!rcd->user_event_mask) 1603 goto bail_free_hdrq; 1604 } 1605 1606 if (!(dd->flags & QIB_NODMA_RTAIL)) { 1607 set_dev_node(&dd->pcidev->dev, rcd->node_id); 1608 rcd->rcvhdrtail_kvaddr = dma_alloc_coherent( 1609 &dd->pcidev->dev, PAGE_SIZE, &phys_hdrqtail, 1610 gfp_flags); 1611 set_dev_node(&dd->pcidev->dev, old_node_id); 1612 if (!rcd->rcvhdrtail_kvaddr) 1613 goto bail_free; 1614 rcd->rcvhdrqtailaddr_phys = phys_hdrqtail; 1615 } 1616 1617 rcd->rcvhdrq_size = amt; 1618 } 1619 1620 /* clear for security and sanity on each use */ 1621 memset(rcd->rcvhdrq, 0, rcd->rcvhdrq_size); 1622 if (rcd->rcvhdrtail_kvaddr) 1623 memset(rcd->rcvhdrtail_kvaddr, 0, PAGE_SIZE); 1624 return 0; 1625 1626 bail_free: 1627 qib_dev_err(dd, 1628 "attempt to allocate 1 page for ctxt %u rcvhdrqtailaddr failed\n", 1629 rcd->ctxt); 1630 vfree(rcd->user_event_mask); 1631 rcd->user_event_mask = NULL; 1632 bail_free_hdrq: 1633 dma_free_coherent(&dd->pcidev->dev, amt, rcd->rcvhdrq, 1634 rcd->rcvhdrq_phys); 1635 rcd->rcvhdrq = NULL; 1636 bail: 1637 return -ENOMEM; 1638 } 1639 1640 /** 1641 * allocate eager buffers, both kernel and user contexts. 1642 * @rcd: the context we are setting up. 1643 * 1644 * Allocate the eager TID buffers and program them into hip. 1645 * They are no longer completely contiguous, we do multiple allocation 1646 * calls. Otherwise we get the OOM code involved, by asking for too 1647 * much per call, with disastrous results on some kernels. 1648 */ 1649 int qib_setup_eagerbufs(struct qib_ctxtdata *rcd) 1650 { 1651 struct qib_devdata *dd = rcd->dd; 1652 unsigned e, egrcnt, egrperchunk, chunk, egrsize, egroff; 1653 size_t size; 1654 gfp_t gfp_flags; 1655 int old_node_id; 1656 1657 /* 1658 * GFP_USER, but without GFP_FS, so buffer cache can be 1659 * coalesced (we hope); otherwise, even at order 4, 1660 * heavy filesystem activity makes these fail, and we can 1661 * use compound pages. 1662 */ 1663 gfp_flags = __GFP_RECLAIM | __GFP_IO | __GFP_COMP; 1664 1665 egrcnt = rcd->rcvegrcnt; 1666 egroff = rcd->rcvegr_tid_base; 1667 egrsize = dd->rcvegrbufsize; 1668 1669 chunk = rcd->rcvegrbuf_chunks; 1670 egrperchunk = rcd->rcvegrbufs_perchunk; 1671 size = rcd->rcvegrbuf_size; 1672 if (!rcd->rcvegrbuf) { 1673 rcd->rcvegrbuf = 1674 kzalloc_node(chunk * sizeof(rcd->rcvegrbuf[0]), 1675 GFP_KERNEL, rcd->node_id); 1676 if (!rcd->rcvegrbuf) 1677 goto bail; 1678 } 1679 if (!rcd->rcvegrbuf_phys) { 1680 rcd->rcvegrbuf_phys = 1681 kmalloc_node(chunk * sizeof(rcd->rcvegrbuf_phys[0]), 1682 GFP_KERNEL, rcd->node_id); 1683 if (!rcd->rcvegrbuf_phys) 1684 goto bail_rcvegrbuf; 1685 } 1686 for (e = 0; e < rcd->rcvegrbuf_chunks; e++) { 1687 if (rcd->rcvegrbuf[e]) 1688 continue; 1689 1690 old_node_id = dev_to_node(&dd->pcidev->dev); 1691 set_dev_node(&dd->pcidev->dev, rcd->node_id); 1692 rcd->rcvegrbuf[e] = 1693 dma_alloc_coherent(&dd->pcidev->dev, size, 1694 &rcd->rcvegrbuf_phys[e], 1695 gfp_flags); 1696 set_dev_node(&dd->pcidev->dev, old_node_id); 1697 if (!rcd->rcvegrbuf[e]) 1698 goto bail_rcvegrbuf_phys; 1699 } 1700 1701 rcd->rcvegr_phys = rcd->rcvegrbuf_phys[0]; 1702 1703 for (e = chunk = 0; chunk < rcd->rcvegrbuf_chunks; chunk++) { 1704 dma_addr_t pa = rcd->rcvegrbuf_phys[chunk]; 1705 unsigned i; 1706 1707 /* clear for security and sanity on each use */ 1708 memset(rcd->rcvegrbuf[chunk], 0, size); 1709 1710 for (i = 0; e < egrcnt && i < egrperchunk; e++, i++) { 1711 dd->f_put_tid(dd, e + egroff + 1712 (u64 __iomem *) 1713 ((char __iomem *) 1714 dd->kregbase + 1715 dd->rcvegrbase), 1716 RCVHQ_RCV_TYPE_EAGER, pa); 1717 pa += egrsize; 1718 } 1719 cond_resched(); /* don't hog the cpu */ 1720 } 1721 1722 return 0; 1723 1724 bail_rcvegrbuf_phys: 1725 for (e = 0; e < rcd->rcvegrbuf_chunks && rcd->rcvegrbuf[e]; e++) 1726 dma_free_coherent(&dd->pcidev->dev, size, 1727 rcd->rcvegrbuf[e], rcd->rcvegrbuf_phys[e]); 1728 kfree(rcd->rcvegrbuf_phys); 1729 rcd->rcvegrbuf_phys = NULL; 1730 bail_rcvegrbuf: 1731 kfree(rcd->rcvegrbuf); 1732 rcd->rcvegrbuf = NULL; 1733 bail: 1734 return -ENOMEM; 1735 } 1736 1737 /* 1738 * Note: Changes to this routine should be mirrored 1739 * for the diagnostics routine qib_remap_ioaddr32(). 1740 * There is also related code for VL15 buffers in qib_init_7322_variables(). 1741 * The teardown code that unmaps is in qib_pcie_ddcleanup() 1742 */ 1743 int init_chip_wc_pat(struct qib_devdata *dd, u32 vl15buflen) 1744 { 1745 u64 __iomem *qib_kregbase = NULL; 1746 void __iomem *qib_piobase = NULL; 1747 u64 __iomem *qib_userbase = NULL; 1748 u64 qib_kreglen; 1749 u64 qib_pio2koffset = dd->piobufbase & 0xffffffff; 1750 u64 qib_pio4koffset = dd->piobufbase >> 32; 1751 u64 qib_pio2klen = dd->piobcnt2k * dd->palign; 1752 u64 qib_pio4klen = dd->piobcnt4k * dd->align4k; 1753 u64 qib_physaddr = dd->physaddr; 1754 u64 qib_piolen; 1755 u64 qib_userlen = 0; 1756 1757 /* 1758 * Free the old mapping because the kernel will try to reuse the 1759 * old mapping and not create a new mapping with the 1760 * write combining attribute. 1761 */ 1762 iounmap(dd->kregbase); 1763 dd->kregbase = NULL; 1764 1765 /* 1766 * Assumes chip address space looks like: 1767 * - kregs + sregs + cregs + uregs (in any order) 1768 * - piobufs (2K and 4K bufs in either order) 1769 * or: 1770 * - kregs + sregs + cregs (in any order) 1771 * - piobufs (2K and 4K bufs in either order) 1772 * - uregs 1773 */ 1774 if (dd->piobcnt4k == 0) { 1775 qib_kreglen = qib_pio2koffset; 1776 qib_piolen = qib_pio2klen; 1777 } else if (qib_pio2koffset < qib_pio4koffset) { 1778 qib_kreglen = qib_pio2koffset; 1779 qib_piolen = qib_pio4koffset + qib_pio4klen - qib_kreglen; 1780 } else { 1781 qib_kreglen = qib_pio4koffset; 1782 qib_piolen = qib_pio2koffset + qib_pio2klen - qib_kreglen; 1783 } 1784 qib_piolen += vl15buflen; 1785 /* Map just the configured ports (not all hw ports) */ 1786 if (dd->uregbase > qib_kreglen) 1787 qib_userlen = dd->ureg_align * dd->cfgctxts; 1788 1789 /* Sanity checks passed, now create the new mappings */ 1790 qib_kregbase = ioremap_nocache(qib_physaddr, qib_kreglen); 1791 if (!qib_kregbase) 1792 goto bail; 1793 1794 qib_piobase = ioremap_wc(qib_physaddr + qib_kreglen, qib_piolen); 1795 if (!qib_piobase) 1796 goto bail_kregbase; 1797 1798 if (qib_userlen) { 1799 qib_userbase = ioremap_nocache(qib_physaddr + dd->uregbase, 1800 qib_userlen); 1801 if (!qib_userbase) 1802 goto bail_piobase; 1803 } 1804 1805 dd->kregbase = qib_kregbase; 1806 dd->kregend = (u64 __iomem *) 1807 ((char __iomem *) qib_kregbase + qib_kreglen); 1808 dd->piobase = qib_piobase; 1809 dd->pio2kbase = (void __iomem *) 1810 (((char __iomem *) dd->piobase) + 1811 qib_pio2koffset - qib_kreglen); 1812 if (dd->piobcnt4k) 1813 dd->pio4kbase = (void __iomem *) 1814 (((char __iomem *) dd->piobase) + 1815 qib_pio4koffset - qib_kreglen); 1816 if (qib_userlen) 1817 /* ureg will now be accessed relative to dd->userbase */ 1818 dd->userbase = qib_userbase; 1819 return 0; 1820 1821 bail_piobase: 1822 iounmap(qib_piobase); 1823 bail_kregbase: 1824 iounmap(qib_kregbase); 1825 bail: 1826 return -ENOMEM; 1827 } 1828