1 /*
2  * Copyright (c) 2012, 2013 Intel Corporation. All rights reserved.
3  * Copyright (c) 2006 - 2012 QLogic Corporation. All rights reserved.
4  * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
5  *
6  * This software is available to you under a choice of one of two
7  * licenses.  You may choose to be licensed under the terms of the GNU
8  * General Public License (GPL) Version 2, available from the file
9  * COPYING in the main directory of this source tree, or the
10  * OpenIB.org BSD license below:
11  *
12  *     Redistribution and use in source and binary forms, with or
13  *     without modification, are permitted provided that the following
14  *     conditions are met:
15  *
16  *      - Redistributions of source code must retain the above
17  *        copyright notice, this list of conditions and the following
18  *        disclaimer.
19  *
20  *      - Redistributions in binary form must reproduce the above
21  *        copyright notice, this list of conditions and the following
22  *        disclaimer in the documentation and/or other materials
23  *        provided with the distribution.
24  *
25  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
32  * SOFTWARE.
33  */
34 
35 #include <linux/pci.h>
36 #include <linux/poll.h>
37 #include <linux/cdev.h>
38 #include <linux/swap.h>
39 #include <linux/vmalloc.h>
40 #include <linux/highmem.h>
41 #include <linux/io.h>
42 #include <linux/jiffies.h>
43 #include <asm/pgtable.h>
44 #include <linux/delay.h>
45 #include <linux/export.h>
46 #include <linux/uio.h>
47 
48 #include <rdma/ib.h>
49 
50 #include "qib.h"
51 #include "qib_common.h"
52 #include "qib_user_sdma.h"
53 
54 #undef pr_fmt
55 #define pr_fmt(fmt) QIB_DRV_NAME ": " fmt
56 
57 static int qib_open(struct inode *, struct file *);
58 static int qib_close(struct inode *, struct file *);
59 static ssize_t qib_write(struct file *, const char __user *, size_t, loff_t *);
60 static ssize_t qib_write_iter(struct kiocb *, struct iov_iter *);
61 static unsigned int qib_poll(struct file *, struct poll_table_struct *);
62 static int qib_mmapf(struct file *, struct vm_area_struct *);
63 
64 /*
65  * This is really, really weird shit - write() and writev() here
66  * have completely unrelated semantics.  Sucky userland ABI,
67  * film at 11.
68  */
69 static const struct file_operations qib_file_ops = {
70 	.owner = THIS_MODULE,
71 	.write = qib_write,
72 	.write_iter = qib_write_iter,
73 	.open = qib_open,
74 	.release = qib_close,
75 	.poll = qib_poll,
76 	.mmap = qib_mmapf,
77 	.llseek = noop_llseek,
78 };
79 
80 /*
81  * Convert kernel virtual addresses to physical addresses so they don't
82  * potentially conflict with the chip addresses used as mmap offsets.
83  * It doesn't really matter what mmap offset we use as long as we can
84  * interpret it correctly.
85  */
86 static u64 cvt_kvaddr(void *p)
87 {
88 	struct page *page;
89 	u64 paddr = 0;
90 
91 	page = vmalloc_to_page(p);
92 	if (page)
93 		paddr = page_to_pfn(page) << PAGE_SHIFT;
94 
95 	return paddr;
96 }
97 
98 static int qib_get_base_info(struct file *fp, void __user *ubase,
99 			     size_t ubase_size)
100 {
101 	struct qib_ctxtdata *rcd = ctxt_fp(fp);
102 	int ret = 0;
103 	struct qib_base_info *kinfo = NULL;
104 	struct qib_devdata *dd = rcd->dd;
105 	struct qib_pportdata *ppd = rcd->ppd;
106 	unsigned subctxt_cnt;
107 	int shared, master;
108 	size_t sz;
109 
110 	subctxt_cnt = rcd->subctxt_cnt;
111 	if (!subctxt_cnt) {
112 		shared = 0;
113 		master = 0;
114 		subctxt_cnt = 1;
115 	} else {
116 		shared = 1;
117 		master = !subctxt_fp(fp);
118 	}
119 
120 	sz = sizeof(*kinfo);
121 	/* If context sharing is not requested, allow the old size structure */
122 	if (!shared)
123 		sz -= 7 * sizeof(u64);
124 	if (ubase_size < sz) {
125 		ret = -EINVAL;
126 		goto bail;
127 	}
128 
129 	kinfo = kzalloc(sizeof(*kinfo), GFP_KERNEL);
130 	if (kinfo == NULL) {
131 		ret = -ENOMEM;
132 		goto bail;
133 	}
134 
135 	ret = dd->f_get_base_info(rcd, kinfo);
136 	if (ret < 0)
137 		goto bail;
138 
139 	kinfo->spi_rcvhdr_cnt = dd->rcvhdrcnt;
140 	kinfo->spi_rcvhdrent_size = dd->rcvhdrentsize;
141 	kinfo->spi_tidegrcnt = rcd->rcvegrcnt;
142 	kinfo->spi_rcv_egrbufsize = dd->rcvegrbufsize;
143 	/*
144 	 * have to mmap whole thing
145 	 */
146 	kinfo->spi_rcv_egrbuftotlen =
147 		rcd->rcvegrbuf_chunks * rcd->rcvegrbuf_size;
148 	kinfo->spi_rcv_egrperchunk = rcd->rcvegrbufs_perchunk;
149 	kinfo->spi_rcv_egrchunksize = kinfo->spi_rcv_egrbuftotlen /
150 		rcd->rcvegrbuf_chunks;
151 	kinfo->spi_tidcnt = dd->rcvtidcnt / subctxt_cnt;
152 	if (master)
153 		kinfo->spi_tidcnt += dd->rcvtidcnt % subctxt_cnt;
154 	/*
155 	 * for this use, may be cfgctxts summed over all chips that
156 	 * are are configured and present
157 	 */
158 	kinfo->spi_nctxts = dd->cfgctxts;
159 	/* unit (chip/board) our context is on */
160 	kinfo->spi_unit = dd->unit;
161 	kinfo->spi_port = ppd->port;
162 	/* for now, only a single page */
163 	kinfo->spi_tid_maxsize = PAGE_SIZE;
164 
165 	/*
166 	 * Doing this per context, and based on the skip value, etc.  This has
167 	 * to be the actual buffer size, since the protocol code treats it
168 	 * as an array.
169 	 *
170 	 * These have to be set to user addresses in the user code via mmap.
171 	 * These values are used on return to user code for the mmap target
172 	 * addresses only.  For 32 bit, same 44 bit address problem, so use
173 	 * the physical address, not virtual.  Before 2.6.11, using the
174 	 * page_address() macro worked, but in 2.6.11, even that returns the
175 	 * full 64 bit address (upper bits all 1's).  So far, using the
176 	 * physical addresses (or chip offsets, for chip mapping) works, but
177 	 * no doubt some future kernel release will change that, and we'll be
178 	 * on to yet another method of dealing with this.
179 	 * Normally only one of rcvhdr_tailaddr or rhf_offset is useful
180 	 * since the chips with non-zero rhf_offset don't normally
181 	 * enable tail register updates to host memory, but for testing,
182 	 * both can be enabled and used.
183 	 */
184 	kinfo->spi_rcvhdr_base = (u64) rcd->rcvhdrq_phys;
185 	kinfo->spi_rcvhdr_tailaddr = (u64) rcd->rcvhdrqtailaddr_phys;
186 	kinfo->spi_rhf_offset = dd->rhf_offset;
187 	kinfo->spi_rcv_egrbufs = (u64) rcd->rcvegr_phys;
188 	kinfo->spi_pioavailaddr = (u64) dd->pioavailregs_phys;
189 	/* setup per-unit (not port) status area for user programs */
190 	kinfo->spi_status = (u64) kinfo->spi_pioavailaddr +
191 		(char *) ppd->statusp -
192 		(char *) dd->pioavailregs_dma;
193 	kinfo->spi_uregbase = (u64) dd->uregbase + dd->ureg_align * rcd->ctxt;
194 	if (!shared) {
195 		kinfo->spi_piocnt = rcd->piocnt;
196 		kinfo->spi_piobufbase = (u64) rcd->piobufs;
197 		kinfo->spi_sendbuf_status = cvt_kvaddr(rcd->user_event_mask);
198 	} else if (master) {
199 		kinfo->spi_piocnt = (rcd->piocnt / subctxt_cnt) +
200 				    (rcd->piocnt % subctxt_cnt);
201 		/* Master's PIO buffers are after all the slave's */
202 		kinfo->spi_piobufbase = (u64) rcd->piobufs +
203 			dd->palign *
204 			(rcd->piocnt - kinfo->spi_piocnt);
205 	} else {
206 		unsigned slave = subctxt_fp(fp) - 1;
207 
208 		kinfo->spi_piocnt = rcd->piocnt / subctxt_cnt;
209 		kinfo->spi_piobufbase = (u64) rcd->piobufs +
210 			dd->palign * kinfo->spi_piocnt * slave;
211 	}
212 
213 	if (shared) {
214 		kinfo->spi_sendbuf_status =
215 			cvt_kvaddr(&rcd->user_event_mask[subctxt_fp(fp)]);
216 		/* only spi_subctxt_* fields should be set in this block! */
217 		kinfo->spi_subctxt_uregbase = cvt_kvaddr(rcd->subctxt_uregbase);
218 
219 		kinfo->spi_subctxt_rcvegrbuf =
220 			cvt_kvaddr(rcd->subctxt_rcvegrbuf);
221 		kinfo->spi_subctxt_rcvhdr_base =
222 			cvt_kvaddr(rcd->subctxt_rcvhdr_base);
223 	}
224 
225 	/*
226 	 * All user buffers are 2KB buffers.  If we ever support
227 	 * giving 4KB buffers to user processes, this will need some
228 	 * work.  Can't use piobufbase directly, because it has
229 	 * both 2K and 4K buffer base values.
230 	 */
231 	kinfo->spi_pioindex = (kinfo->spi_piobufbase - dd->pio2k_bufbase) /
232 		dd->palign;
233 	kinfo->spi_pioalign = dd->palign;
234 	kinfo->spi_qpair = QIB_KD_QP;
235 	/*
236 	 * user mode PIO buffers are always 2KB, even when 4KB can
237 	 * be received, and sent via the kernel; this is ibmaxlen
238 	 * for 2K MTU.
239 	 */
240 	kinfo->spi_piosize = dd->piosize2k - 2 * sizeof(u32);
241 	kinfo->spi_mtu = ppd->ibmaxlen; /* maxlen, not ibmtu */
242 	kinfo->spi_ctxt = rcd->ctxt;
243 	kinfo->spi_subctxt = subctxt_fp(fp);
244 	kinfo->spi_sw_version = QIB_KERN_SWVERSION;
245 	kinfo->spi_sw_version |= 1U << 31; /* QLogic-built, not kernel.org */
246 	kinfo->spi_hw_version = dd->revision;
247 
248 	if (master)
249 		kinfo->spi_runtime_flags |= QIB_RUNTIME_MASTER;
250 
251 	sz = (ubase_size < sizeof(*kinfo)) ? ubase_size : sizeof(*kinfo);
252 	if (copy_to_user(ubase, kinfo, sz))
253 		ret = -EFAULT;
254 bail:
255 	kfree(kinfo);
256 	return ret;
257 }
258 
259 /**
260  * qib_tid_update - update a context TID
261  * @rcd: the context
262  * @fp: the qib device file
263  * @ti: the TID information
264  *
265  * The new implementation as of Oct 2004 is that the driver assigns
266  * the tid and returns it to the caller.   To reduce search time, we
267  * keep a cursor for each context, walking the shadow tid array to find
268  * one that's not in use.
269  *
270  * For now, if we can't allocate the full list, we fail, although
271  * in the long run, we'll allocate as many as we can, and the
272  * caller will deal with that by trying the remaining pages later.
273  * That means that when we fail, we have to mark the tids as not in
274  * use again, in our shadow copy.
275  *
276  * It's up to the caller to free the tids when they are done.
277  * We'll unlock the pages as they free them.
278  *
279  * Also, right now we are locking one page at a time, but since
280  * the intended use of this routine is for a single group of
281  * virtually contiguous pages, that should change to improve
282  * performance.
283  */
284 static int qib_tid_update(struct qib_ctxtdata *rcd, struct file *fp,
285 			  const struct qib_tid_info *ti)
286 {
287 	int ret = 0, ntids;
288 	u32 tid, ctxttid, cnt, i, tidcnt, tidoff;
289 	u16 *tidlist;
290 	struct qib_devdata *dd = rcd->dd;
291 	u64 physaddr;
292 	unsigned long vaddr;
293 	u64 __iomem *tidbase;
294 	unsigned long tidmap[8];
295 	struct page **pagep = NULL;
296 	unsigned subctxt = subctxt_fp(fp);
297 
298 	if (!dd->pageshadow) {
299 		ret = -ENOMEM;
300 		goto done;
301 	}
302 
303 	cnt = ti->tidcnt;
304 	if (!cnt) {
305 		ret = -EFAULT;
306 		goto done;
307 	}
308 	ctxttid = rcd->ctxt * dd->rcvtidcnt;
309 	if (!rcd->subctxt_cnt) {
310 		tidcnt = dd->rcvtidcnt;
311 		tid = rcd->tidcursor;
312 		tidoff = 0;
313 	} else if (!subctxt) {
314 		tidcnt = (dd->rcvtidcnt / rcd->subctxt_cnt) +
315 			 (dd->rcvtidcnt % rcd->subctxt_cnt);
316 		tidoff = dd->rcvtidcnt - tidcnt;
317 		ctxttid += tidoff;
318 		tid = tidcursor_fp(fp);
319 	} else {
320 		tidcnt = dd->rcvtidcnt / rcd->subctxt_cnt;
321 		tidoff = tidcnt * (subctxt - 1);
322 		ctxttid += tidoff;
323 		tid = tidcursor_fp(fp);
324 	}
325 	if (cnt > tidcnt) {
326 		/* make sure it all fits in tid_pg_list */
327 		qib_devinfo(dd->pcidev,
328 			"Process tried to allocate %u TIDs, only trying max (%u)\n",
329 			cnt, tidcnt);
330 		cnt = tidcnt;
331 	}
332 	pagep = (struct page **) rcd->tid_pg_list;
333 	tidlist = (u16 *) &pagep[dd->rcvtidcnt];
334 	pagep += tidoff;
335 	tidlist += tidoff;
336 
337 	memset(tidmap, 0, sizeof(tidmap));
338 	/* before decrement; chip actual # */
339 	ntids = tidcnt;
340 	tidbase = (u64 __iomem *) (((char __iomem *) dd->kregbase) +
341 				   dd->rcvtidbase +
342 				   ctxttid * sizeof(*tidbase));
343 
344 	/* virtual address of first page in transfer */
345 	vaddr = ti->tidvaddr;
346 	if (!access_ok(VERIFY_WRITE, (void __user *) vaddr,
347 		       cnt * PAGE_SIZE)) {
348 		ret = -EFAULT;
349 		goto done;
350 	}
351 	ret = qib_get_user_pages(vaddr, cnt, pagep);
352 	if (ret) {
353 		/*
354 		 * if (ret == -EBUSY)
355 		 * We can't continue because the pagep array won't be
356 		 * initialized. This should never happen,
357 		 * unless perhaps the user has mpin'ed the pages
358 		 * themselves.
359 		 */
360 		qib_devinfo(
361 			dd->pcidev,
362 			"Failed to lock addr %p, %u pages: errno %d\n",
363 			(void *) vaddr, cnt, -ret);
364 		goto done;
365 	}
366 	for (i = 0; i < cnt; i++, vaddr += PAGE_SIZE) {
367 		for (; ntids--; tid++) {
368 			if (tid == tidcnt)
369 				tid = 0;
370 			if (!dd->pageshadow[ctxttid + tid])
371 				break;
372 		}
373 		if (ntids < 0) {
374 			/*
375 			 * Oops, wrapped all the way through their TIDs,
376 			 * and didn't have enough free; see comments at
377 			 * start of routine
378 			 */
379 			i--;    /* last tidlist[i] not filled in */
380 			ret = -ENOMEM;
381 			break;
382 		}
383 		tidlist[i] = tid + tidoff;
384 		/* we "know" system pages and TID pages are same size */
385 		dd->pageshadow[ctxttid + tid] = pagep[i];
386 		dd->physshadow[ctxttid + tid] =
387 			qib_map_page(dd->pcidev, pagep[i], 0, PAGE_SIZE,
388 				     PCI_DMA_FROMDEVICE);
389 		/*
390 		 * don't need atomic or it's overhead
391 		 */
392 		__set_bit(tid, tidmap);
393 		physaddr = dd->physshadow[ctxttid + tid];
394 		/* PERFORMANCE: below should almost certainly be cached */
395 		dd->f_put_tid(dd, &tidbase[tid],
396 				  RCVHQ_RCV_TYPE_EXPECTED, physaddr);
397 		/*
398 		 * don't check this tid in qib_ctxtshadow, since we
399 		 * just filled it in; start with the next one.
400 		 */
401 		tid++;
402 	}
403 
404 	if (ret) {
405 		u32 limit;
406 cleanup:
407 		/* jump here if copy out of updated info failed... */
408 		/* same code that's in qib_free_tid() */
409 		limit = sizeof(tidmap) * BITS_PER_BYTE;
410 		if (limit > tidcnt)
411 			/* just in case size changes in future */
412 			limit = tidcnt;
413 		tid = find_first_bit((const unsigned long *)tidmap, limit);
414 		for (; tid < limit; tid++) {
415 			if (!test_bit(tid, tidmap))
416 				continue;
417 			if (dd->pageshadow[ctxttid + tid]) {
418 				dma_addr_t phys;
419 
420 				phys = dd->physshadow[ctxttid + tid];
421 				dd->physshadow[ctxttid + tid] = dd->tidinvalid;
422 				/* PERFORMANCE: below should almost certainly
423 				 * be cached
424 				 */
425 				dd->f_put_tid(dd, &tidbase[tid],
426 					      RCVHQ_RCV_TYPE_EXPECTED,
427 					      dd->tidinvalid);
428 				pci_unmap_page(dd->pcidev, phys, PAGE_SIZE,
429 					       PCI_DMA_FROMDEVICE);
430 				dd->pageshadow[ctxttid + tid] = NULL;
431 			}
432 		}
433 		qib_release_user_pages(pagep, cnt);
434 	} else {
435 		/*
436 		 * Copy the updated array, with qib_tid's filled in, back
437 		 * to user.  Since we did the copy in already, this "should
438 		 * never fail" If it does, we have to clean up...
439 		 */
440 		if (copy_to_user((void __user *)
441 				 (unsigned long) ti->tidlist,
442 				 tidlist, cnt * sizeof(*tidlist))) {
443 			ret = -EFAULT;
444 			goto cleanup;
445 		}
446 		if (copy_to_user((void __user *) (unsigned long) ti->tidmap,
447 				 tidmap, sizeof(tidmap))) {
448 			ret = -EFAULT;
449 			goto cleanup;
450 		}
451 		if (tid == tidcnt)
452 			tid = 0;
453 		if (!rcd->subctxt_cnt)
454 			rcd->tidcursor = tid;
455 		else
456 			tidcursor_fp(fp) = tid;
457 	}
458 
459 done:
460 	return ret;
461 }
462 
463 /**
464  * qib_tid_free - free a context TID
465  * @rcd: the context
466  * @subctxt: the subcontext
467  * @ti: the TID info
468  *
469  * right now we are unlocking one page at a time, but since
470  * the intended use of this routine is for a single group of
471  * virtually contiguous pages, that should change to improve
472  * performance.  We check that the TID is in range for this context
473  * but otherwise don't check validity; if user has an error and
474  * frees the wrong tid, it's only their own data that can thereby
475  * be corrupted.  We do check that the TID was in use, for sanity
476  * We always use our idea of the saved address, not the address that
477  * they pass in to us.
478  */
479 static int qib_tid_free(struct qib_ctxtdata *rcd, unsigned subctxt,
480 			const struct qib_tid_info *ti)
481 {
482 	int ret = 0;
483 	u32 tid, ctxttid, cnt, limit, tidcnt;
484 	struct qib_devdata *dd = rcd->dd;
485 	u64 __iomem *tidbase;
486 	unsigned long tidmap[8];
487 
488 	if (!dd->pageshadow) {
489 		ret = -ENOMEM;
490 		goto done;
491 	}
492 
493 	if (copy_from_user(tidmap, (void __user *)(unsigned long)ti->tidmap,
494 			   sizeof(tidmap))) {
495 		ret = -EFAULT;
496 		goto done;
497 	}
498 
499 	ctxttid = rcd->ctxt * dd->rcvtidcnt;
500 	if (!rcd->subctxt_cnt)
501 		tidcnt = dd->rcvtidcnt;
502 	else if (!subctxt) {
503 		tidcnt = (dd->rcvtidcnt / rcd->subctxt_cnt) +
504 			 (dd->rcvtidcnt % rcd->subctxt_cnt);
505 		ctxttid += dd->rcvtidcnt - tidcnt;
506 	} else {
507 		tidcnt = dd->rcvtidcnt / rcd->subctxt_cnt;
508 		ctxttid += tidcnt * (subctxt - 1);
509 	}
510 	tidbase = (u64 __iomem *) ((char __iomem *)(dd->kregbase) +
511 				   dd->rcvtidbase +
512 				   ctxttid * sizeof(*tidbase));
513 
514 	limit = sizeof(tidmap) * BITS_PER_BYTE;
515 	if (limit > tidcnt)
516 		/* just in case size changes in future */
517 		limit = tidcnt;
518 	tid = find_first_bit(tidmap, limit);
519 	for (cnt = 0; tid < limit; tid++) {
520 		/*
521 		 * small optimization; if we detect a run of 3 or so without
522 		 * any set, use find_first_bit again.  That's mainly to
523 		 * accelerate the case where we wrapped, so we have some at
524 		 * the beginning, and some at the end, and a big gap
525 		 * in the middle.
526 		 */
527 		if (!test_bit(tid, tidmap))
528 			continue;
529 		cnt++;
530 		if (dd->pageshadow[ctxttid + tid]) {
531 			struct page *p;
532 			dma_addr_t phys;
533 
534 			p = dd->pageshadow[ctxttid + tid];
535 			dd->pageshadow[ctxttid + tid] = NULL;
536 			phys = dd->physshadow[ctxttid + tid];
537 			dd->physshadow[ctxttid + tid] = dd->tidinvalid;
538 			/* PERFORMANCE: below should almost certainly be
539 			 * cached
540 			 */
541 			dd->f_put_tid(dd, &tidbase[tid],
542 				      RCVHQ_RCV_TYPE_EXPECTED, dd->tidinvalid);
543 			pci_unmap_page(dd->pcidev, phys, PAGE_SIZE,
544 				       PCI_DMA_FROMDEVICE);
545 			qib_release_user_pages(&p, 1);
546 		}
547 	}
548 done:
549 	return ret;
550 }
551 
552 /**
553  * qib_set_part_key - set a partition key
554  * @rcd: the context
555  * @key: the key
556  *
557  * We can have up to 4 active at a time (other than the default, which is
558  * always allowed).  This is somewhat tricky, since multiple contexts may set
559  * the same key, so we reference count them, and clean up at exit.  All 4
560  * partition keys are packed into a single qlogic_ib register.  It's an
561  * error for a process to set the same pkey multiple times.  We provide no
562  * mechanism to de-allocate a pkey at this time, we may eventually need to
563  * do that.  I've used the atomic operations, and no locking, and only make
564  * a single pass through what's available.  This should be more than
565  * adequate for some time. I'll think about spinlocks or the like if and as
566  * it's necessary.
567  */
568 static int qib_set_part_key(struct qib_ctxtdata *rcd, u16 key)
569 {
570 	struct qib_pportdata *ppd = rcd->ppd;
571 	int i, any = 0, pidx = -1;
572 	u16 lkey = key & 0x7FFF;
573 	int ret;
574 
575 	if (lkey == (QIB_DEFAULT_P_KEY & 0x7FFF)) {
576 		/* nothing to do; this key always valid */
577 		ret = 0;
578 		goto bail;
579 	}
580 
581 	if (!lkey) {
582 		ret = -EINVAL;
583 		goto bail;
584 	}
585 
586 	/*
587 	 * Set the full membership bit, because it has to be
588 	 * set in the register or the packet, and it seems
589 	 * cleaner to set in the register than to force all
590 	 * callers to set it.
591 	 */
592 	key |= 0x8000;
593 
594 	for (i = 0; i < ARRAY_SIZE(rcd->pkeys); i++) {
595 		if (!rcd->pkeys[i] && pidx == -1)
596 			pidx = i;
597 		if (rcd->pkeys[i] == key) {
598 			ret = -EEXIST;
599 			goto bail;
600 		}
601 	}
602 	if (pidx == -1) {
603 		ret = -EBUSY;
604 		goto bail;
605 	}
606 	for (any = i = 0; i < ARRAY_SIZE(ppd->pkeys); i++) {
607 		if (!ppd->pkeys[i]) {
608 			any++;
609 			continue;
610 		}
611 		if (ppd->pkeys[i] == key) {
612 			atomic_t *pkrefs = &ppd->pkeyrefs[i];
613 
614 			if (atomic_inc_return(pkrefs) > 1) {
615 				rcd->pkeys[pidx] = key;
616 				ret = 0;
617 				goto bail;
618 			} else {
619 				/*
620 				 * lost race, decrement count, catch below
621 				 */
622 				atomic_dec(pkrefs);
623 				any++;
624 			}
625 		}
626 		if ((ppd->pkeys[i] & 0x7FFF) == lkey) {
627 			/*
628 			 * It makes no sense to have both the limited and
629 			 * full membership PKEY set at the same time since
630 			 * the unlimited one will disable the limited one.
631 			 */
632 			ret = -EEXIST;
633 			goto bail;
634 		}
635 	}
636 	if (!any) {
637 		ret = -EBUSY;
638 		goto bail;
639 	}
640 	for (any = i = 0; i < ARRAY_SIZE(ppd->pkeys); i++) {
641 		if (!ppd->pkeys[i] &&
642 		    atomic_inc_return(&ppd->pkeyrefs[i]) == 1) {
643 			rcd->pkeys[pidx] = key;
644 			ppd->pkeys[i] = key;
645 			(void) ppd->dd->f_set_ib_cfg(ppd, QIB_IB_CFG_PKEYS, 0);
646 			ret = 0;
647 			goto bail;
648 		}
649 	}
650 	ret = -EBUSY;
651 
652 bail:
653 	return ret;
654 }
655 
656 /**
657  * qib_manage_rcvq - manage a context's receive queue
658  * @rcd: the context
659  * @subctxt: the subcontext
660  * @start_stop: action to carry out
661  *
662  * start_stop == 0 disables receive on the context, for use in queue
663  * overflow conditions.  start_stop==1 re-enables, to be used to
664  * re-init the software copy of the head register
665  */
666 static int qib_manage_rcvq(struct qib_ctxtdata *rcd, unsigned subctxt,
667 			   int start_stop)
668 {
669 	struct qib_devdata *dd = rcd->dd;
670 	unsigned int rcvctrl_op;
671 
672 	if (subctxt)
673 		goto bail;
674 	/* atomically clear receive enable ctxt. */
675 	if (start_stop) {
676 		/*
677 		 * On enable, force in-memory copy of the tail register to
678 		 * 0, so that protocol code doesn't have to worry about
679 		 * whether or not the chip has yet updated the in-memory
680 		 * copy or not on return from the system call. The chip
681 		 * always resets it's tail register back to 0 on a
682 		 * transition from disabled to enabled.
683 		 */
684 		if (rcd->rcvhdrtail_kvaddr)
685 			qib_clear_rcvhdrtail(rcd);
686 		rcvctrl_op = QIB_RCVCTRL_CTXT_ENB;
687 	} else
688 		rcvctrl_op = QIB_RCVCTRL_CTXT_DIS;
689 	dd->f_rcvctrl(rcd->ppd, rcvctrl_op, rcd->ctxt);
690 	/* always; new head should be equal to new tail; see above */
691 bail:
692 	return 0;
693 }
694 
695 static void qib_clean_part_key(struct qib_ctxtdata *rcd,
696 			       struct qib_devdata *dd)
697 {
698 	int i, j, pchanged = 0;
699 	u64 oldpkey;
700 	struct qib_pportdata *ppd = rcd->ppd;
701 
702 	/* for debugging only */
703 	oldpkey = (u64) ppd->pkeys[0] |
704 		((u64) ppd->pkeys[1] << 16) |
705 		((u64) ppd->pkeys[2] << 32) |
706 		((u64) ppd->pkeys[3] << 48);
707 
708 	for (i = 0; i < ARRAY_SIZE(rcd->pkeys); i++) {
709 		if (!rcd->pkeys[i])
710 			continue;
711 		for (j = 0; j < ARRAY_SIZE(ppd->pkeys); j++) {
712 			/* check for match independent of the global bit */
713 			if ((ppd->pkeys[j] & 0x7fff) !=
714 			    (rcd->pkeys[i] & 0x7fff))
715 				continue;
716 			if (atomic_dec_and_test(&ppd->pkeyrefs[j])) {
717 				ppd->pkeys[j] = 0;
718 				pchanged++;
719 			}
720 			break;
721 		}
722 		rcd->pkeys[i] = 0;
723 	}
724 	if (pchanged)
725 		(void) ppd->dd->f_set_ib_cfg(ppd, QIB_IB_CFG_PKEYS, 0);
726 }
727 
728 /* common code for the mappings on dma_alloc_coherent mem */
729 static int qib_mmap_mem(struct vm_area_struct *vma, struct qib_ctxtdata *rcd,
730 			unsigned len, void *kvaddr, u32 write_ok, char *what)
731 {
732 	struct qib_devdata *dd = rcd->dd;
733 	unsigned long pfn;
734 	int ret;
735 
736 	if ((vma->vm_end - vma->vm_start) > len) {
737 		qib_devinfo(dd->pcidev,
738 			 "FAIL on %s: len %lx > %x\n", what,
739 			 vma->vm_end - vma->vm_start, len);
740 		ret = -EFAULT;
741 		goto bail;
742 	}
743 
744 	/*
745 	 * shared context user code requires rcvhdrq mapped r/w, others
746 	 * only allowed readonly mapping.
747 	 */
748 	if (!write_ok) {
749 		if (vma->vm_flags & VM_WRITE) {
750 			qib_devinfo(dd->pcidev,
751 				 "%s must be mapped readonly\n", what);
752 			ret = -EPERM;
753 			goto bail;
754 		}
755 
756 		/* don't allow them to later change with mprotect */
757 		vma->vm_flags &= ~VM_MAYWRITE;
758 	}
759 
760 	pfn = virt_to_phys(kvaddr) >> PAGE_SHIFT;
761 	ret = remap_pfn_range(vma, vma->vm_start, pfn,
762 			      len, vma->vm_page_prot);
763 	if (ret)
764 		qib_devinfo(dd->pcidev,
765 			"%s ctxt%u mmap of %lx, %x bytes failed: %d\n",
766 			what, rcd->ctxt, pfn, len, ret);
767 bail:
768 	return ret;
769 }
770 
771 static int mmap_ureg(struct vm_area_struct *vma, struct qib_devdata *dd,
772 		     u64 ureg)
773 {
774 	unsigned long phys;
775 	unsigned long sz;
776 	int ret;
777 
778 	/*
779 	 * This is real hardware, so use io_remap.  This is the mechanism
780 	 * for the user process to update the head registers for their ctxt
781 	 * in the chip.
782 	 */
783 	sz = dd->flags & QIB_HAS_HDRSUPP ? 2 * PAGE_SIZE : PAGE_SIZE;
784 	if ((vma->vm_end - vma->vm_start) > sz) {
785 		qib_devinfo(dd->pcidev,
786 			"FAIL mmap userreg: reqlen %lx > PAGE\n",
787 			vma->vm_end - vma->vm_start);
788 		ret = -EFAULT;
789 	} else {
790 		phys = dd->physaddr + ureg;
791 		vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
792 
793 		vma->vm_flags |= VM_DONTCOPY | VM_DONTEXPAND;
794 		ret = io_remap_pfn_range(vma, vma->vm_start,
795 					 phys >> PAGE_SHIFT,
796 					 vma->vm_end - vma->vm_start,
797 					 vma->vm_page_prot);
798 	}
799 	return ret;
800 }
801 
802 static int mmap_piobufs(struct vm_area_struct *vma,
803 			struct qib_devdata *dd,
804 			struct qib_ctxtdata *rcd,
805 			unsigned piobufs, unsigned piocnt)
806 {
807 	unsigned long phys;
808 	int ret;
809 
810 	/*
811 	 * When we map the PIO buffers in the chip, we want to map them as
812 	 * writeonly, no read possible; unfortunately, x86 doesn't allow
813 	 * for this in hardware, but we still prevent users from asking
814 	 * for it.
815 	 */
816 	if ((vma->vm_end - vma->vm_start) > (piocnt * dd->palign)) {
817 		qib_devinfo(dd->pcidev,
818 			"FAIL mmap piobufs: reqlen %lx > PAGE\n",
819 			 vma->vm_end - vma->vm_start);
820 		ret = -EINVAL;
821 		goto bail;
822 	}
823 
824 	phys = dd->physaddr + piobufs;
825 
826 #if defined(__powerpc__)
827 	vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
828 #endif
829 
830 	/*
831 	 * don't allow them to later change to readable with mprotect (for when
832 	 * not initially mapped readable, as is normally the case)
833 	 */
834 	vma->vm_flags &= ~VM_MAYREAD;
835 	vma->vm_flags |= VM_DONTCOPY | VM_DONTEXPAND;
836 
837 	/* We used PAT if wc_cookie == 0 */
838 	if (!dd->wc_cookie)
839 		vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
840 
841 	ret = io_remap_pfn_range(vma, vma->vm_start, phys >> PAGE_SHIFT,
842 				 vma->vm_end - vma->vm_start,
843 				 vma->vm_page_prot);
844 bail:
845 	return ret;
846 }
847 
848 static int mmap_rcvegrbufs(struct vm_area_struct *vma,
849 			   struct qib_ctxtdata *rcd)
850 {
851 	struct qib_devdata *dd = rcd->dd;
852 	unsigned long start, size;
853 	size_t total_size, i;
854 	unsigned long pfn;
855 	int ret;
856 
857 	size = rcd->rcvegrbuf_size;
858 	total_size = rcd->rcvegrbuf_chunks * size;
859 	if ((vma->vm_end - vma->vm_start) > total_size) {
860 		qib_devinfo(dd->pcidev,
861 			"FAIL on egr bufs: reqlen %lx > actual %lx\n",
862 			 vma->vm_end - vma->vm_start,
863 			 (unsigned long) total_size);
864 		ret = -EINVAL;
865 		goto bail;
866 	}
867 
868 	if (vma->vm_flags & VM_WRITE) {
869 		qib_devinfo(dd->pcidev,
870 			"Can't map eager buffers as writable (flags=%lx)\n",
871 			vma->vm_flags);
872 		ret = -EPERM;
873 		goto bail;
874 	}
875 	/* don't allow them to later change to writeable with mprotect */
876 	vma->vm_flags &= ~VM_MAYWRITE;
877 
878 	start = vma->vm_start;
879 
880 	for (i = 0; i < rcd->rcvegrbuf_chunks; i++, start += size) {
881 		pfn = virt_to_phys(rcd->rcvegrbuf[i]) >> PAGE_SHIFT;
882 		ret = remap_pfn_range(vma, start, pfn, size,
883 				      vma->vm_page_prot);
884 		if (ret < 0)
885 			goto bail;
886 	}
887 	ret = 0;
888 
889 bail:
890 	return ret;
891 }
892 
893 /*
894  * qib_file_vma_fault - handle a VMA page fault.
895  */
896 static int qib_file_vma_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
897 {
898 	struct page *page;
899 
900 	page = vmalloc_to_page((void *)(vmf->pgoff << PAGE_SHIFT));
901 	if (!page)
902 		return VM_FAULT_SIGBUS;
903 
904 	get_page(page);
905 	vmf->page = page;
906 
907 	return 0;
908 }
909 
910 static const struct vm_operations_struct qib_file_vm_ops = {
911 	.fault = qib_file_vma_fault,
912 };
913 
914 static int mmap_kvaddr(struct vm_area_struct *vma, u64 pgaddr,
915 		       struct qib_ctxtdata *rcd, unsigned subctxt)
916 {
917 	struct qib_devdata *dd = rcd->dd;
918 	unsigned subctxt_cnt;
919 	unsigned long len;
920 	void *addr;
921 	size_t size;
922 	int ret = 0;
923 
924 	subctxt_cnt = rcd->subctxt_cnt;
925 	size = rcd->rcvegrbuf_chunks * rcd->rcvegrbuf_size;
926 
927 	/*
928 	 * Each process has all the subctxt uregbase, rcvhdrq, and
929 	 * rcvegrbufs mmapped - as an array for all the processes,
930 	 * and also separately for this process.
931 	 */
932 	if (pgaddr == cvt_kvaddr(rcd->subctxt_uregbase)) {
933 		addr = rcd->subctxt_uregbase;
934 		size = PAGE_SIZE * subctxt_cnt;
935 	} else if (pgaddr == cvt_kvaddr(rcd->subctxt_rcvhdr_base)) {
936 		addr = rcd->subctxt_rcvhdr_base;
937 		size = rcd->rcvhdrq_size * subctxt_cnt;
938 	} else if (pgaddr == cvt_kvaddr(rcd->subctxt_rcvegrbuf)) {
939 		addr = rcd->subctxt_rcvegrbuf;
940 		size *= subctxt_cnt;
941 	} else if (pgaddr == cvt_kvaddr(rcd->subctxt_uregbase +
942 					PAGE_SIZE * subctxt)) {
943 		addr = rcd->subctxt_uregbase + PAGE_SIZE * subctxt;
944 		size = PAGE_SIZE;
945 	} else if (pgaddr == cvt_kvaddr(rcd->subctxt_rcvhdr_base +
946 					rcd->rcvhdrq_size * subctxt)) {
947 		addr = rcd->subctxt_rcvhdr_base +
948 			rcd->rcvhdrq_size * subctxt;
949 		size = rcd->rcvhdrq_size;
950 	} else if (pgaddr == cvt_kvaddr(&rcd->user_event_mask[subctxt])) {
951 		addr = rcd->user_event_mask;
952 		size = PAGE_SIZE;
953 	} else if (pgaddr == cvt_kvaddr(rcd->subctxt_rcvegrbuf +
954 					size * subctxt)) {
955 		addr = rcd->subctxt_rcvegrbuf + size * subctxt;
956 		/* rcvegrbufs are read-only on the slave */
957 		if (vma->vm_flags & VM_WRITE) {
958 			qib_devinfo(dd->pcidev,
959 				 "Can't map eager buffers as writable (flags=%lx)\n",
960 				 vma->vm_flags);
961 			ret = -EPERM;
962 			goto bail;
963 		}
964 		/*
965 		 * Don't allow permission to later change to writeable
966 		 * with mprotect.
967 		 */
968 		vma->vm_flags &= ~VM_MAYWRITE;
969 	} else
970 		goto bail;
971 	len = vma->vm_end - vma->vm_start;
972 	if (len > size) {
973 		ret = -EINVAL;
974 		goto bail;
975 	}
976 
977 	vma->vm_pgoff = (unsigned long) addr >> PAGE_SHIFT;
978 	vma->vm_ops = &qib_file_vm_ops;
979 	vma->vm_flags |= VM_DONTEXPAND | VM_DONTDUMP;
980 	ret = 1;
981 
982 bail:
983 	return ret;
984 }
985 
986 /**
987  * qib_mmapf - mmap various structures into user space
988  * @fp: the file pointer
989  * @vma: the VM area
990  *
991  * We use this to have a shared buffer between the kernel and the user code
992  * for the rcvhdr queue, egr buffers, and the per-context user regs and pio
993  * buffers in the chip.  We have the open and close entries so we can bump
994  * the ref count and keep the driver from being unloaded while still mapped.
995  */
996 static int qib_mmapf(struct file *fp, struct vm_area_struct *vma)
997 {
998 	struct qib_ctxtdata *rcd;
999 	struct qib_devdata *dd;
1000 	u64 pgaddr, ureg;
1001 	unsigned piobufs, piocnt;
1002 	int ret, match = 1;
1003 
1004 	rcd = ctxt_fp(fp);
1005 	if (!rcd || !(vma->vm_flags & VM_SHARED)) {
1006 		ret = -EINVAL;
1007 		goto bail;
1008 	}
1009 	dd = rcd->dd;
1010 
1011 	/*
1012 	 * This is the qib_do_user_init() code, mapping the shared buffers
1013 	 * and per-context user registers into the user process. The address
1014 	 * referred to by vm_pgoff is the file offset passed via mmap().
1015 	 * For shared contexts, this is the kernel vmalloc() address of the
1016 	 * pages to share with the master.
1017 	 * For non-shared or master ctxts, this is a physical address.
1018 	 * We only do one mmap for each space mapped.
1019 	 */
1020 	pgaddr = vma->vm_pgoff << PAGE_SHIFT;
1021 
1022 	/*
1023 	 * Check for 0 in case one of the allocations failed, but user
1024 	 * called mmap anyway.
1025 	 */
1026 	if (!pgaddr)  {
1027 		ret = -EINVAL;
1028 		goto bail;
1029 	}
1030 
1031 	/*
1032 	 * Physical addresses must fit in 40 bits for our hardware.
1033 	 * Check for kernel virtual addresses first, anything else must
1034 	 * match a HW or memory address.
1035 	 */
1036 	ret = mmap_kvaddr(vma, pgaddr, rcd, subctxt_fp(fp));
1037 	if (ret) {
1038 		if (ret > 0)
1039 			ret = 0;
1040 		goto bail;
1041 	}
1042 
1043 	ureg = dd->uregbase + dd->ureg_align * rcd->ctxt;
1044 	if (!rcd->subctxt_cnt) {
1045 		/* ctxt is not shared */
1046 		piocnt = rcd->piocnt;
1047 		piobufs = rcd->piobufs;
1048 	} else if (!subctxt_fp(fp)) {
1049 		/* caller is the master */
1050 		piocnt = (rcd->piocnt / rcd->subctxt_cnt) +
1051 			 (rcd->piocnt % rcd->subctxt_cnt);
1052 		piobufs = rcd->piobufs +
1053 			dd->palign * (rcd->piocnt - piocnt);
1054 	} else {
1055 		unsigned slave = subctxt_fp(fp) - 1;
1056 
1057 		/* caller is a slave */
1058 		piocnt = rcd->piocnt / rcd->subctxt_cnt;
1059 		piobufs = rcd->piobufs + dd->palign * piocnt * slave;
1060 	}
1061 
1062 	if (pgaddr == ureg)
1063 		ret = mmap_ureg(vma, dd, ureg);
1064 	else if (pgaddr == piobufs)
1065 		ret = mmap_piobufs(vma, dd, rcd, piobufs, piocnt);
1066 	else if (pgaddr == dd->pioavailregs_phys)
1067 		/* in-memory copy of pioavail registers */
1068 		ret = qib_mmap_mem(vma, rcd, PAGE_SIZE,
1069 				   (void *) dd->pioavailregs_dma, 0,
1070 				   "pioavail registers");
1071 	else if (pgaddr == rcd->rcvegr_phys)
1072 		ret = mmap_rcvegrbufs(vma, rcd);
1073 	else if (pgaddr == (u64) rcd->rcvhdrq_phys)
1074 		/*
1075 		 * The rcvhdrq itself; multiple pages, contiguous
1076 		 * from an i/o perspective.  Shared contexts need
1077 		 * to map r/w, so we allow writing.
1078 		 */
1079 		ret = qib_mmap_mem(vma, rcd, rcd->rcvhdrq_size,
1080 				   rcd->rcvhdrq, 1, "rcvhdrq");
1081 	else if (pgaddr == (u64) rcd->rcvhdrqtailaddr_phys)
1082 		/* in-memory copy of rcvhdrq tail register */
1083 		ret = qib_mmap_mem(vma, rcd, PAGE_SIZE,
1084 				   rcd->rcvhdrtail_kvaddr, 0,
1085 				   "rcvhdrq tail");
1086 	else
1087 		match = 0;
1088 	if (!match)
1089 		ret = -EINVAL;
1090 
1091 	vma->vm_private_data = NULL;
1092 
1093 	if (ret < 0)
1094 		qib_devinfo(dd->pcidev,
1095 			 "mmap Failure %d: off %llx len %lx\n",
1096 			 -ret, (unsigned long long)pgaddr,
1097 			 vma->vm_end - vma->vm_start);
1098 bail:
1099 	return ret;
1100 }
1101 
1102 static unsigned int qib_poll_urgent(struct qib_ctxtdata *rcd,
1103 				    struct file *fp,
1104 				    struct poll_table_struct *pt)
1105 {
1106 	struct qib_devdata *dd = rcd->dd;
1107 	unsigned pollflag;
1108 
1109 	poll_wait(fp, &rcd->wait, pt);
1110 
1111 	spin_lock_irq(&dd->uctxt_lock);
1112 	if (rcd->urgent != rcd->urgent_poll) {
1113 		pollflag = POLLIN | POLLRDNORM;
1114 		rcd->urgent_poll = rcd->urgent;
1115 	} else {
1116 		pollflag = 0;
1117 		set_bit(QIB_CTXT_WAITING_URG, &rcd->flag);
1118 	}
1119 	spin_unlock_irq(&dd->uctxt_lock);
1120 
1121 	return pollflag;
1122 }
1123 
1124 static unsigned int qib_poll_next(struct qib_ctxtdata *rcd,
1125 				  struct file *fp,
1126 				  struct poll_table_struct *pt)
1127 {
1128 	struct qib_devdata *dd = rcd->dd;
1129 	unsigned pollflag;
1130 
1131 	poll_wait(fp, &rcd->wait, pt);
1132 
1133 	spin_lock_irq(&dd->uctxt_lock);
1134 	if (dd->f_hdrqempty(rcd)) {
1135 		set_bit(QIB_CTXT_WAITING_RCV, &rcd->flag);
1136 		dd->f_rcvctrl(rcd->ppd, QIB_RCVCTRL_INTRAVAIL_ENB, rcd->ctxt);
1137 		pollflag = 0;
1138 	} else
1139 		pollflag = POLLIN | POLLRDNORM;
1140 	spin_unlock_irq(&dd->uctxt_lock);
1141 
1142 	return pollflag;
1143 }
1144 
1145 static unsigned int qib_poll(struct file *fp, struct poll_table_struct *pt)
1146 {
1147 	struct qib_ctxtdata *rcd;
1148 	unsigned pollflag;
1149 
1150 	rcd = ctxt_fp(fp);
1151 	if (!rcd)
1152 		pollflag = POLLERR;
1153 	else if (rcd->poll_type == QIB_POLL_TYPE_URGENT)
1154 		pollflag = qib_poll_urgent(rcd, fp, pt);
1155 	else  if (rcd->poll_type == QIB_POLL_TYPE_ANYRCV)
1156 		pollflag = qib_poll_next(rcd, fp, pt);
1157 	else /* invalid */
1158 		pollflag = POLLERR;
1159 
1160 	return pollflag;
1161 }
1162 
1163 static void assign_ctxt_affinity(struct file *fp, struct qib_devdata *dd)
1164 {
1165 	struct qib_filedata *fd = fp->private_data;
1166 	const unsigned int weight = cpumask_weight(&current->cpus_allowed);
1167 	const struct cpumask *local_mask = cpumask_of_pcibus(dd->pcidev->bus);
1168 	int local_cpu;
1169 
1170 	/*
1171 	 * If process has NOT already set it's affinity, select and
1172 	 * reserve a processor for it on the local NUMA node.
1173 	 */
1174 	if ((weight >= qib_cpulist_count) &&
1175 		(cpumask_weight(local_mask) <= qib_cpulist_count)) {
1176 		for_each_cpu(local_cpu, local_mask)
1177 			if (!test_and_set_bit(local_cpu, qib_cpulist)) {
1178 				fd->rec_cpu_num = local_cpu;
1179 				return;
1180 			}
1181 	}
1182 
1183 	/*
1184 	 * If process has NOT already set it's affinity, select and
1185 	 * reserve a processor for it, as a rendevous for all
1186 	 * users of the driver.  If they don't actually later
1187 	 * set affinity to this cpu, or set it to some other cpu,
1188 	 * it just means that sooner or later we don't recommend
1189 	 * a cpu, and let the scheduler do it's best.
1190 	 */
1191 	if (weight >= qib_cpulist_count) {
1192 		int cpu;
1193 
1194 		cpu = find_first_zero_bit(qib_cpulist,
1195 					  qib_cpulist_count);
1196 		if (cpu == qib_cpulist_count)
1197 			qib_dev_err(dd,
1198 			"no cpus avail for affinity PID %u\n",
1199 			current->pid);
1200 		else {
1201 			__set_bit(cpu, qib_cpulist);
1202 			fd->rec_cpu_num = cpu;
1203 		}
1204 	}
1205 }
1206 
1207 /*
1208  * Check that userland and driver are compatible for subcontexts.
1209  */
1210 static int qib_compatible_subctxts(int user_swmajor, int user_swminor)
1211 {
1212 	/* this code is written long-hand for clarity */
1213 	if (QIB_USER_SWMAJOR != user_swmajor) {
1214 		/* no promise of compatibility if major mismatch */
1215 		return 0;
1216 	}
1217 	if (QIB_USER_SWMAJOR == 1) {
1218 		switch (QIB_USER_SWMINOR) {
1219 		case 0:
1220 		case 1:
1221 		case 2:
1222 			/* no subctxt implementation so cannot be compatible */
1223 			return 0;
1224 		case 3:
1225 			/* 3 is only compatible with itself */
1226 			return user_swminor == 3;
1227 		default:
1228 			/* >= 4 are compatible (or are expected to be) */
1229 			return user_swminor <= QIB_USER_SWMINOR;
1230 		}
1231 	}
1232 	/* make no promises yet for future major versions */
1233 	return 0;
1234 }
1235 
1236 static int init_subctxts(struct qib_devdata *dd,
1237 			 struct qib_ctxtdata *rcd,
1238 			 const struct qib_user_info *uinfo)
1239 {
1240 	int ret = 0;
1241 	unsigned num_subctxts;
1242 	size_t size;
1243 
1244 	/*
1245 	 * If the user is requesting zero subctxts,
1246 	 * skip the subctxt allocation.
1247 	 */
1248 	if (uinfo->spu_subctxt_cnt <= 0)
1249 		goto bail;
1250 	num_subctxts = uinfo->spu_subctxt_cnt;
1251 
1252 	/* Check for subctxt compatibility */
1253 	if (!qib_compatible_subctxts(uinfo->spu_userversion >> 16,
1254 		uinfo->spu_userversion & 0xffff)) {
1255 		qib_devinfo(dd->pcidev,
1256 			 "Mismatched user version (%d.%d) and driver version (%d.%d) while context sharing. Ensure that driver and library are from the same release.\n",
1257 			 (int) (uinfo->spu_userversion >> 16),
1258 			 (int) (uinfo->spu_userversion & 0xffff),
1259 			 QIB_USER_SWMAJOR, QIB_USER_SWMINOR);
1260 		goto bail;
1261 	}
1262 	if (num_subctxts > QLOGIC_IB_MAX_SUBCTXT) {
1263 		ret = -EINVAL;
1264 		goto bail;
1265 	}
1266 
1267 	rcd->subctxt_uregbase = vmalloc_user(PAGE_SIZE * num_subctxts);
1268 	if (!rcd->subctxt_uregbase) {
1269 		ret = -ENOMEM;
1270 		goto bail;
1271 	}
1272 	/* Note: rcd->rcvhdrq_size isn't initialized yet. */
1273 	size = ALIGN(dd->rcvhdrcnt * dd->rcvhdrentsize *
1274 		     sizeof(u32), PAGE_SIZE) * num_subctxts;
1275 	rcd->subctxt_rcvhdr_base = vmalloc_user(size);
1276 	if (!rcd->subctxt_rcvhdr_base) {
1277 		ret = -ENOMEM;
1278 		goto bail_ureg;
1279 	}
1280 
1281 	rcd->subctxt_rcvegrbuf = vmalloc_user(rcd->rcvegrbuf_chunks *
1282 					      rcd->rcvegrbuf_size *
1283 					      num_subctxts);
1284 	if (!rcd->subctxt_rcvegrbuf) {
1285 		ret = -ENOMEM;
1286 		goto bail_rhdr;
1287 	}
1288 
1289 	rcd->subctxt_cnt = uinfo->spu_subctxt_cnt;
1290 	rcd->subctxt_id = uinfo->spu_subctxt_id;
1291 	rcd->active_slaves = 1;
1292 	rcd->redirect_seq_cnt = 1;
1293 	set_bit(QIB_CTXT_MASTER_UNINIT, &rcd->flag);
1294 	goto bail;
1295 
1296 bail_rhdr:
1297 	vfree(rcd->subctxt_rcvhdr_base);
1298 bail_ureg:
1299 	vfree(rcd->subctxt_uregbase);
1300 	rcd->subctxt_uregbase = NULL;
1301 bail:
1302 	return ret;
1303 }
1304 
1305 static int setup_ctxt(struct qib_pportdata *ppd, int ctxt,
1306 		      struct file *fp, const struct qib_user_info *uinfo)
1307 {
1308 	struct qib_filedata *fd = fp->private_data;
1309 	struct qib_devdata *dd = ppd->dd;
1310 	struct qib_ctxtdata *rcd;
1311 	void *ptmp = NULL;
1312 	int ret;
1313 	int numa_id;
1314 
1315 	assign_ctxt_affinity(fp, dd);
1316 
1317 	numa_id = qib_numa_aware ? ((fd->rec_cpu_num != -1) ?
1318 		cpu_to_node(fd->rec_cpu_num) :
1319 		numa_node_id()) : dd->assigned_node_id;
1320 
1321 	rcd = qib_create_ctxtdata(ppd, ctxt, numa_id);
1322 
1323 	/*
1324 	 * Allocate memory for use in qib_tid_update() at open to
1325 	 * reduce cost of expected send setup per message segment
1326 	 */
1327 	if (rcd)
1328 		ptmp = kmalloc(dd->rcvtidcnt * sizeof(u16) +
1329 			       dd->rcvtidcnt * sizeof(struct page **),
1330 			       GFP_KERNEL);
1331 
1332 	if (!rcd || !ptmp) {
1333 		qib_dev_err(dd,
1334 			"Unable to allocate ctxtdata memory, failing open\n");
1335 		ret = -ENOMEM;
1336 		goto bailerr;
1337 	}
1338 	rcd->userversion = uinfo->spu_userversion;
1339 	ret = init_subctxts(dd, rcd, uinfo);
1340 	if (ret)
1341 		goto bailerr;
1342 	rcd->tid_pg_list = ptmp;
1343 	rcd->pid = current->pid;
1344 	init_waitqueue_head(&dd->rcd[ctxt]->wait);
1345 	strlcpy(rcd->comm, current->comm, sizeof(rcd->comm));
1346 	ctxt_fp(fp) = rcd;
1347 	qib_stats.sps_ctxts++;
1348 	dd->freectxts--;
1349 	ret = 0;
1350 	goto bail;
1351 
1352 bailerr:
1353 	if (fd->rec_cpu_num != -1)
1354 		__clear_bit(fd->rec_cpu_num, qib_cpulist);
1355 
1356 	dd->rcd[ctxt] = NULL;
1357 	kfree(rcd);
1358 	kfree(ptmp);
1359 bail:
1360 	return ret;
1361 }
1362 
1363 static inline int usable(struct qib_pportdata *ppd)
1364 {
1365 	struct qib_devdata *dd = ppd->dd;
1366 
1367 	return dd && (dd->flags & QIB_PRESENT) && dd->kregbase && ppd->lid &&
1368 		(ppd->lflags & QIBL_LINKACTIVE);
1369 }
1370 
1371 /*
1372  * Select a context on the given device, either using a requested port
1373  * or the port based on the context number.
1374  */
1375 static int choose_port_ctxt(struct file *fp, struct qib_devdata *dd, u32 port,
1376 			    const struct qib_user_info *uinfo)
1377 {
1378 	struct qib_pportdata *ppd = NULL;
1379 	int ret, ctxt;
1380 
1381 	if (port) {
1382 		if (!usable(dd->pport + port - 1)) {
1383 			ret = -ENETDOWN;
1384 			goto done;
1385 		} else
1386 			ppd = dd->pport + port - 1;
1387 	}
1388 	for (ctxt = dd->first_user_ctxt; ctxt < dd->cfgctxts && dd->rcd[ctxt];
1389 	     ctxt++)
1390 		;
1391 	if (ctxt == dd->cfgctxts) {
1392 		ret = -EBUSY;
1393 		goto done;
1394 	}
1395 	if (!ppd) {
1396 		u32 pidx = ctxt % dd->num_pports;
1397 
1398 		if (usable(dd->pport + pidx))
1399 			ppd = dd->pport + pidx;
1400 		else {
1401 			for (pidx = 0; pidx < dd->num_pports && !ppd;
1402 			     pidx++)
1403 				if (usable(dd->pport + pidx))
1404 					ppd = dd->pport + pidx;
1405 		}
1406 	}
1407 	ret = ppd ? setup_ctxt(ppd, ctxt, fp, uinfo) : -ENETDOWN;
1408 done:
1409 	return ret;
1410 }
1411 
1412 static int find_free_ctxt(int unit, struct file *fp,
1413 			  const struct qib_user_info *uinfo)
1414 {
1415 	struct qib_devdata *dd = qib_lookup(unit);
1416 	int ret;
1417 
1418 	if (!dd || (uinfo->spu_port && uinfo->spu_port > dd->num_pports))
1419 		ret = -ENODEV;
1420 	else
1421 		ret = choose_port_ctxt(fp, dd, uinfo->spu_port, uinfo);
1422 
1423 	return ret;
1424 }
1425 
1426 static int get_a_ctxt(struct file *fp, const struct qib_user_info *uinfo,
1427 		      unsigned alg)
1428 {
1429 	struct qib_devdata *udd = NULL;
1430 	int ret = 0, devmax, npresent, nup, ndev, dusable = 0, i;
1431 	u32 port = uinfo->spu_port, ctxt;
1432 
1433 	devmax = qib_count_units(&npresent, &nup);
1434 	if (!npresent) {
1435 		ret = -ENXIO;
1436 		goto done;
1437 	}
1438 	if (nup == 0) {
1439 		ret = -ENETDOWN;
1440 		goto done;
1441 	}
1442 
1443 	if (alg == QIB_PORT_ALG_ACROSS) {
1444 		unsigned inuse = ~0U;
1445 
1446 		/* find device (with ACTIVE ports) with fewest ctxts in use */
1447 		for (ndev = 0; ndev < devmax; ndev++) {
1448 			struct qib_devdata *dd = qib_lookup(ndev);
1449 			unsigned cused = 0, cfree = 0, pusable = 0;
1450 
1451 			if (!dd)
1452 				continue;
1453 			if (port && port <= dd->num_pports &&
1454 			    usable(dd->pport + port - 1))
1455 				pusable = 1;
1456 			else
1457 				for (i = 0; i < dd->num_pports; i++)
1458 					if (usable(dd->pport + i))
1459 						pusable++;
1460 			if (!pusable)
1461 				continue;
1462 			for (ctxt = dd->first_user_ctxt; ctxt < dd->cfgctxts;
1463 			     ctxt++)
1464 				if (dd->rcd[ctxt])
1465 					cused++;
1466 				else
1467 					cfree++;
1468 			if (cfree && cused < inuse) {
1469 				udd = dd;
1470 				inuse = cused;
1471 			}
1472 		}
1473 		if (udd) {
1474 			ret = choose_port_ctxt(fp, udd, port, uinfo);
1475 			goto done;
1476 		}
1477 	} else {
1478 		for (ndev = 0; ndev < devmax; ndev++) {
1479 			struct qib_devdata *dd = qib_lookup(ndev);
1480 
1481 			if (dd) {
1482 				ret = choose_port_ctxt(fp, dd, port, uinfo);
1483 				if (!ret)
1484 					goto done;
1485 				if (ret == -EBUSY)
1486 					dusable++;
1487 			}
1488 		}
1489 	}
1490 	ret = dusable ? -EBUSY : -ENETDOWN;
1491 
1492 done:
1493 	return ret;
1494 }
1495 
1496 static int find_shared_ctxt(struct file *fp,
1497 			    const struct qib_user_info *uinfo)
1498 {
1499 	int devmax, ndev, i;
1500 	int ret = 0;
1501 
1502 	devmax = qib_count_units(NULL, NULL);
1503 
1504 	for (ndev = 0; ndev < devmax; ndev++) {
1505 		struct qib_devdata *dd = qib_lookup(ndev);
1506 
1507 		/* device portion of usable() */
1508 		if (!(dd && (dd->flags & QIB_PRESENT) && dd->kregbase))
1509 			continue;
1510 		for (i = dd->first_user_ctxt; i < dd->cfgctxts; i++) {
1511 			struct qib_ctxtdata *rcd = dd->rcd[i];
1512 
1513 			/* Skip ctxts which are not yet open */
1514 			if (!rcd || !rcd->cnt)
1515 				continue;
1516 			/* Skip ctxt if it doesn't match the requested one */
1517 			if (rcd->subctxt_id != uinfo->spu_subctxt_id)
1518 				continue;
1519 			/* Verify the sharing process matches the master */
1520 			if (rcd->subctxt_cnt != uinfo->spu_subctxt_cnt ||
1521 			    rcd->userversion != uinfo->spu_userversion ||
1522 			    rcd->cnt >= rcd->subctxt_cnt) {
1523 				ret = -EINVAL;
1524 				goto done;
1525 			}
1526 			ctxt_fp(fp) = rcd;
1527 			subctxt_fp(fp) = rcd->cnt++;
1528 			rcd->subpid[subctxt_fp(fp)] = current->pid;
1529 			tidcursor_fp(fp) = 0;
1530 			rcd->active_slaves |= 1 << subctxt_fp(fp);
1531 			ret = 1;
1532 			goto done;
1533 		}
1534 	}
1535 
1536 done:
1537 	return ret;
1538 }
1539 
1540 static int qib_open(struct inode *in, struct file *fp)
1541 {
1542 	/* The real work is performed later in qib_assign_ctxt() */
1543 	fp->private_data = kzalloc(sizeof(struct qib_filedata), GFP_KERNEL);
1544 	if (fp->private_data) /* no cpu affinity by default */
1545 		((struct qib_filedata *)fp->private_data)->rec_cpu_num = -1;
1546 	return fp->private_data ? 0 : -ENOMEM;
1547 }
1548 
1549 static int find_hca(unsigned int cpu, int *unit)
1550 {
1551 	int ret = 0, devmax, npresent, nup, ndev;
1552 
1553 	*unit = -1;
1554 
1555 	devmax = qib_count_units(&npresent, &nup);
1556 	if (!npresent) {
1557 		ret = -ENXIO;
1558 		goto done;
1559 	}
1560 	if (!nup) {
1561 		ret = -ENETDOWN;
1562 		goto done;
1563 	}
1564 	for (ndev = 0; ndev < devmax; ndev++) {
1565 		struct qib_devdata *dd = qib_lookup(ndev);
1566 
1567 		if (dd) {
1568 			if (pcibus_to_node(dd->pcidev->bus) < 0) {
1569 				ret = -EINVAL;
1570 				goto done;
1571 			}
1572 			if (cpu_to_node(cpu) ==
1573 				pcibus_to_node(dd->pcidev->bus)) {
1574 				*unit = ndev;
1575 				goto done;
1576 			}
1577 		}
1578 	}
1579 done:
1580 	return ret;
1581 }
1582 
1583 static int do_qib_user_sdma_queue_create(struct file *fp)
1584 {
1585 	struct qib_filedata *fd = fp->private_data;
1586 	struct qib_ctxtdata *rcd = fd->rcd;
1587 	struct qib_devdata *dd = rcd->dd;
1588 
1589 	if (dd->flags & QIB_HAS_SEND_DMA) {
1590 
1591 		fd->pq = qib_user_sdma_queue_create(&dd->pcidev->dev,
1592 						    dd->unit,
1593 						    rcd->ctxt,
1594 						    fd->subctxt);
1595 		if (!fd->pq)
1596 			return -ENOMEM;
1597 	}
1598 
1599 	return 0;
1600 }
1601 
1602 /*
1603  * Get ctxt early, so can set affinity prior to memory allocation.
1604  */
1605 static int qib_assign_ctxt(struct file *fp, const struct qib_user_info *uinfo)
1606 {
1607 	int ret;
1608 	int i_minor;
1609 	unsigned swmajor, swminor, alg = QIB_PORT_ALG_ACROSS;
1610 
1611 	/* Check to be sure we haven't already initialized this file */
1612 	if (ctxt_fp(fp)) {
1613 		ret = -EINVAL;
1614 		goto done;
1615 	}
1616 
1617 	/* for now, if major version is different, bail */
1618 	swmajor = uinfo->spu_userversion >> 16;
1619 	if (swmajor != QIB_USER_SWMAJOR) {
1620 		ret = -ENODEV;
1621 		goto done;
1622 	}
1623 
1624 	swminor = uinfo->spu_userversion & 0xffff;
1625 
1626 	if (swminor >= 11 && uinfo->spu_port_alg < QIB_PORT_ALG_COUNT)
1627 		alg = uinfo->spu_port_alg;
1628 
1629 	mutex_lock(&qib_mutex);
1630 
1631 	if (qib_compatible_subctxts(swmajor, swminor) &&
1632 	    uinfo->spu_subctxt_cnt) {
1633 		ret = find_shared_ctxt(fp, uinfo);
1634 		if (ret > 0) {
1635 			ret = do_qib_user_sdma_queue_create(fp);
1636 			if (!ret)
1637 				assign_ctxt_affinity(fp, (ctxt_fp(fp))->dd);
1638 			goto done_ok;
1639 		}
1640 	}
1641 
1642 	i_minor = iminor(file_inode(fp)) - QIB_USER_MINOR_BASE;
1643 	if (i_minor)
1644 		ret = find_free_ctxt(i_minor - 1, fp, uinfo);
1645 	else {
1646 		int unit;
1647 		const unsigned int cpu = cpumask_first(&current->cpus_allowed);
1648 		const unsigned int weight =
1649 			cpumask_weight(&current->cpus_allowed);
1650 
1651 		if (weight == 1 && !test_bit(cpu, qib_cpulist))
1652 			if (!find_hca(cpu, &unit) && unit >= 0)
1653 				if (!find_free_ctxt(unit, fp, uinfo)) {
1654 					ret = 0;
1655 					goto done_chk_sdma;
1656 				}
1657 		ret = get_a_ctxt(fp, uinfo, alg);
1658 	}
1659 
1660 done_chk_sdma:
1661 	if (!ret)
1662 		ret = do_qib_user_sdma_queue_create(fp);
1663 done_ok:
1664 	mutex_unlock(&qib_mutex);
1665 
1666 done:
1667 	return ret;
1668 }
1669 
1670 
1671 static int qib_do_user_init(struct file *fp,
1672 			    const struct qib_user_info *uinfo)
1673 {
1674 	int ret;
1675 	struct qib_ctxtdata *rcd = ctxt_fp(fp);
1676 	struct qib_devdata *dd;
1677 	unsigned uctxt;
1678 
1679 	/* Subctxts don't need to initialize anything since master did it. */
1680 	if (subctxt_fp(fp)) {
1681 		ret = wait_event_interruptible(rcd->wait,
1682 			!test_bit(QIB_CTXT_MASTER_UNINIT, &rcd->flag));
1683 		goto bail;
1684 	}
1685 
1686 	dd = rcd->dd;
1687 
1688 	/* some ctxts may get extra buffers, calculate that here */
1689 	uctxt = rcd->ctxt - dd->first_user_ctxt;
1690 	if (uctxt < dd->ctxts_extrabuf) {
1691 		rcd->piocnt = dd->pbufsctxt + 1;
1692 		rcd->pio_base = rcd->piocnt * uctxt;
1693 	} else {
1694 		rcd->piocnt = dd->pbufsctxt;
1695 		rcd->pio_base = rcd->piocnt * uctxt +
1696 			dd->ctxts_extrabuf;
1697 	}
1698 
1699 	/*
1700 	 * All user buffers are 2KB buffers.  If we ever support
1701 	 * giving 4KB buffers to user processes, this will need some
1702 	 * work.  Can't use piobufbase directly, because it has
1703 	 * both 2K and 4K buffer base values.  So check and handle.
1704 	 */
1705 	if ((rcd->pio_base + rcd->piocnt) > dd->piobcnt2k) {
1706 		if (rcd->pio_base >= dd->piobcnt2k) {
1707 			qib_dev_err(dd,
1708 				    "%u:ctxt%u: no 2KB buffers available\n",
1709 				    dd->unit, rcd->ctxt);
1710 			ret = -ENOBUFS;
1711 			goto bail;
1712 		}
1713 		rcd->piocnt = dd->piobcnt2k - rcd->pio_base;
1714 		qib_dev_err(dd, "Ctxt%u: would use 4KB bufs, using %u\n",
1715 			    rcd->ctxt, rcd->piocnt);
1716 	}
1717 
1718 	rcd->piobufs = dd->pio2k_bufbase + rcd->pio_base * dd->palign;
1719 	qib_chg_pioavailkernel(dd, rcd->pio_base, rcd->piocnt,
1720 			       TXCHK_CHG_TYPE_USER, rcd);
1721 	/*
1722 	 * try to ensure that processes start up with consistent avail update
1723 	 * for their own range, at least.   If system very quiet, it might
1724 	 * have the in-memory copy out of date at startup for this range of
1725 	 * buffers, when a context gets re-used.  Do after the chg_pioavail
1726 	 * and before the rest of setup, so it's "almost certain" the dma
1727 	 * will have occurred (can't 100% guarantee, but should be many
1728 	 * decimals of 9s, with this ordering), given how much else happens
1729 	 * after this.
1730 	 */
1731 	dd->f_sendctrl(dd->pport, QIB_SENDCTRL_AVAIL_BLIP);
1732 
1733 	/*
1734 	 * Now allocate the rcvhdr Q and eager TIDs; skip the TID
1735 	 * array for time being.  If rcd->ctxt > chip-supported,
1736 	 * we need to do extra stuff here to handle by handling overflow
1737 	 * through ctxt 0, someday
1738 	 */
1739 	ret = qib_create_rcvhdrq(dd, rcd);
1740 	if (!ret)
1741 		ret = qib_setup_eagerbufs(rcd);
1742 	if (ret)
1743 		goto bail_pio;
1744 
1745 	rcd->tidcursor = 0; /* start at beginning after open */
1746 
1747 	/* initialize poll variables... */
1748 	rcd->urgent = 0;
1749 	rcd->urgent_poll = 0;
1750 
1751 	/*
1752 	 * Now enable the ctxt for receive.
1753 	 * For chips that are set to DMA the tail register to memory
1754 	 * when they change (and when the update bit transitions from
1755 	 * 0 to 1.  So for those chips, we turn it off and then back on.
1756 	 * This will (very briefly) affect any other open ctxts, but the
1757 	 * duration is very short, and therefore isn't an issue.  We
1758 	 * explicitly set the in-memory tail copy to 0 beforehand, so we
1759 	 * don't have to wait to be sure the DMA update has happened
1760 	 * (chip resets head/tail to 0 on transition to enable).
1761 	 */
1762 	if (rcd->rcvhdrtail_kvaddr)
1763 		qib_clear_rcvhdrtail(rcd);
1764 
1765 	dd->f_rcvctrl(rcd->ppd, QIB_RCVCTRL_CTXT_ENB | QIB_RCVCTRL_TIDFLOW_ENB,
1766 		      rcd->ctxt);
1767 
1768 	/* Notify any waiting slaves */
1769 	if (rcd->subctxt_cnt) {
1770 		clear_bit(QIB_CTXT_MASTER_UNINIT, &rcd->flag);
1771 		wake_up(&rcd->wait);
1772 	}
1773 	return 0;
1774 
1775 bail_pio:
1776 	qib_chg_pioavailkernel(dd, rcd->pio_base, rcd->piocnt,
1777 			       TXCHK_CHG_TYPE_KERN, rcd);
1778 bail:
1779 	return ret;
1780 }
1781 
1782 /**
1783  * unlock_exptid - unlock any expected TID entries context still had in use
1784  * @rcd: ctxt
1785  *
1786  * We don't actually update the chip here, because we do a bulk update
1787  * below, using f_clear_tids.
1788  */
1789 static void unlock_expected_tids(struct qib_ctxtdata *rcd)
1790 {
1791 	struct qib_devdata *dd = rcd->dd;
1792 	int ctxt_tidbase = rcd->ctxt * dd->rcvtidcnt;
1793 	int i, cnt = 0, maxtid = ctxt_tidbase + dd->rcvtidcnt;
1794 
1795 	for (i = ctxt_tidbase; i < maxtid; i++) {
1796 		struct page *p = dd->pageshadow[i];
1797 		dma_addr_t phys;
1798 
1799 		if (!p)
1800 			continue;
1801 
1802 		phys = dd->physshadow[i];
1803 		dd->physshadow[i] = dd->tidinvalid;
1804 		dd->pageshadow[i] = NULL;
1805 		pci_unmap_page(dd->pcidev, phys, PAGE_SIZE,
1806 			       PCI_DMA_FROMDEVICE);
1807 		qib_release_user_pages(&p, 1);
1808 		cnt++;
1809 	}
1810 }
1811 
1812 static int qib_close(struct inode *in, struct file *fp)
1813 {
1814 	int ret = 0;
1815 	struct qib_filedata *fd;
1816 	struct qib_ctxtdata *rcd;
1817 	struct qib_devdata *dd;
1818 	unsigned long flags;
1819 	unsigned ctxt;
1820 	pid_t pid;
1821 
1822 	mutex_lock(&qib_mutex);
1823 
1824 	fd = fp->private_data;
1825 	fp->private_data = NULL;
1826 	rcd = fd->rcd;
1827 	if (!rcd) {
1828 		mutex_unlock(&qib_mutex);
1829 		goto bail;
1830 	}
1831 
1832 	dd = rcd->dd;
1833 
1834 	/* ensure all pio buffer writes in progress are flushed */
1835 	qib_flush_wc();
1836 
1837 	/* drain user sdma queue */
1838 	if (fd->pq) {
1839 		qib_user_sdma_queue_drain(rcd->ppd, fd->pq);
1840 		qib_user_sdma_queue_destroy(fd->pq);
1841 	}
1842 
1843 	if (fd->rec_cpu_num != -1)
1844 		__clear_bit(fd->rec_cpu_num, qib_cpulist);
1845 
1846 	if (--rcd->cnt) {
1847 		/*
1848 		 * XXX If the master closes the context before the slave(s),
1849 		 * revoke the mmap for the eager receive queue so
1850 		 * the slave(s) don't wait for receive data forever.
1851 		 */
1852 		rcd->active_slaves &= ~(1 << fd->subctxt);
1853 		rcd->subpid[fd->subctxt] = 0;
1854 		mutex_unlock(&qib_mutex);
1855 		goto bail;
1856 	}
1857 
1858 	/* early; no interrupt users after this */
1859 	spin_lock_irqsave(&dd->uctxt_lock, flags);
1860 	ctxt = rcd->ctxt;
1861 	dd->rcd[ctxt] = NULL;
1862 	pid = rcd->pid;
1863 	rcd->pid = 0;
1864 	spin_unlock_irqrestore(&dd->uctxt_lock, flags);
1865 
1866 	if (rcd->rcvwait_to || rcd->piowait_to ||
1867 	    rcd->rcvnowait || rcd->pionowait) {
1868 		rcd->rcvwait_to = 0;
1869 		rcd->piowait_to = 0;
1870 		rcd->rcvnowait = 0;
1871 		rcd->pionowait = 0;
1872 	}
1873 	if (rcd->flag)
1874 		rcd->flag = 0;
1875 
1876 	if (dd->kregbase) {
1877 		/* atomically clear receive enable ctxt and intr avail. */
1878 		dd->f_rcvctrl(rcd->ppd, QIB_RCVCTRL_CTXT_DIS |
1879 				  QIB_RCVCTRL_INTRAVAIL_DIS, ctxt);
1880 
1881 		/* clean up the pkeys for this ctxt user */
1882 		qib_clean_part_key(rcd, dd);
1883 		qib_disarm_piobufs(dd, rcd->pio_base, rcd->piocnt);
1884 		qib_chg_pioavailkernel(dd, rcd->pio_base,
1885 				       rcd->piocnt, TXCHK_CHG_TYPE_KERN, NULL);
1886 
1887 		dd->f_clear_tids(dd, rcd);
1888 
1889 		if (dd->pageshadow)
1890 			unlock_expected_tids(rcd);
1891 		qib_stats.sps_ctxts--;
1892 		dd->freectxts++;
1893 	}
1894 
1895 	mutex_unlock(&qib_mutex);
1896 	qib_free_ctxtdata(dd, rcd); /* after releasing the mutex */
1897 
1898 bail:
1899 	kfree(fd);
1900 	return ret;
1901 }
1902 
1903 static int qib_ctxt_info(struct file *fp, struct qib_ctxt_info __user *uinfo)
1904 {
1905 	struct qib_ctxt_info info;
1906 	int ret;
1907 	size_t sz;
1908 	struct qib_ctxtdata *rcd = ctxt_fp(fp);
1909 	struct qib_filedata *fd;
1910 
1911 	fd = fp->private_data;
1912 
1913 	info.num_active = qib_count_active_units();
1914 	info.unit = rcd->dd->unit;
1915 	info.port = rcd->ppd->port;
1916 	info.ctxt = rcd->ctxt;
1917 	info.subctxt =  subctxt_fp(fp);
1918 	/* Number of user ctxts available for this device. */
1919 	info.num_ctxts = rcd->dd->cfgctxts - rcd->dd->first_user_ctxt;
1920 	info.num_subctxts = rcd->subctxt_cnt;
1921 	info.rec_cpu = fd->rec_cpu_num;
1922 	sz = sizeof(info);
1923 
1924 	if (copy_to_user(uinfo, &info, sz)) {
1925 		ret = -EFAULT;
1926 		goto bail;
1927 	}
1928 	ret = 0;
1929 
1930 bail:
1931 	return ret;
1932 }
1933 
1934 static int qib_sdma_get_inflight(struct qib_user_sdma_queue *pq,
1935 				 u32 __user *inflightp)
1936 {
1937 	const u32 val = qib_user_sdma_inflight_counter(pq);
1938 
1939 	if (put_user(val, inflightp))
1940 		return -EFAULT;
1941 
1942 	return 0;
1943 }
1944 
1945 static int qib_sdma_get_complete(struct qib_pportdata *ppd,
1946 				 struct qib_user_sdma_queue *pq,
1947 				 u32 __user *completep)
1948 {
1949 	u32 val;
1950 	int err;
1951 
1952 	if (!pq)
1953 		return -EINVAL;
1954 
1955 	err = qib_user_sdma_make_progress(ppd, pq);
1956 	if (err < 0)
1957 		return err;
1958 
1959 	val = qib_user_sdma_complete_counter(pq);
1960 	if (put_user(val, completep))
1961 		return -EFAULT;
1962 
1963 	return 0;
1964 }
1965 
1966 static int disarm_req_delay(struct qib_ctxtdata *rcd)
1967 {
1968 	int ret = 0;
1969 
1970 	if (!usable(rcd->ppd)) {
1971 		int i;
1972 		/*
1973 		 * if link is down, or otherwise not usable, delay
1974 		 * the caller up to 30 seconds, so we don't thrash
1975 		 * in trying to get the chip back to ACTIVE, and
1976 		 * set flag so they make the call again.
1977 		 */
1978 		if (rcd->user_event_mask) {
1979 			/*
1980 			 * subctxt_cnt is 0 if not shared, so do base
1981 			 * separately, first, then remaining subctxt, if any
1982 			 */
1983 			set_bit(_QIB_EVENT_DISARM_BUFS_BIT,
1984 				&rcd->user_event_mask[0]);
1985 			for (i = 1; i < rcd->subctxt_cnt; i++)
1986 				set_bit(_QIB_EVENT_DISARM_BUFS_BIT,
1987 					&rcd->user_event_mask[i]);
1988 		}
1989 		for (i = 0; !usable(rcd->ppd) && i < 300; i++)
1990 			msleep(100);
1991 		ret = -ENETDOWN;
1992 	}
1993 	return ret;
1994 }
1995 
1996 /*
1997  * Find all user contexts in use, and set the specified bit in their
1998  * event mask.
1999  * See also find_ctxt() for a similar use, that is specific to send buffers.
2000  */
2001 int qib_set_uevent_bits(struct qib_pportdata *ppd, const int evtbit)
2002 {
2003 	struct qib_ctxtdata *rcd;
2004 	unsigned ctxt;
2005 	int ret = 0;
2006 	unsigned long flags;
2007 
2008 	spin_lock_irqsave(&ppd->dd->uctxt_lock, flags);
2009 	for (ctxt = ppd->dd->first_user_ctxt; ctxt < ppd->dd->cfgctxts;
2010 	     ctxt++) {
2011 		rcd = ppd->dd->rcd[ctxt];
2012 		if (!rcd)
2013 			continue;
2014 		if (rcd->user_event_mask) {
2015 			int i;
2016 			/*
2017 			 * subctxt_cnt is 0 if not shared, so do base
2018 			 * separately, first, then remaining subctxt, if any
2019 			 */
2020 			set_bit(evtbit, &rcd->user_event_mask[0]);
2021 			for (i = 1; i < rcd->subctxt_cnt; i++)
2022 				set_bit(evtbit, &rcd->user_event_mask[i]);
2023 		}
2024 		ret = 1;
2025 		break;
2026 	}
2027 	spin_unlock_irqrestore(&ppd->dd->uctxt_lock, flags);
2028 
2029 	return ret;
2030 }
2031 
2032 /*
2033  * clear the event notifier events for this context.
2034  * For the DISARM_BUFS case, we also take action (this obsoletes
2035  * the older QIB_CMD_DISARM_BUFS, but we keep it for backwards
2036  * compatibility.
2037  * Other bits don't currently require actions, just atomically clear.
2038  * User process then performs actions appropriate to bit having been
2039  * set, if desired, and checks again in future.
2040  */
2041 static int qib_user_event_ack(struct qib_ctxtdata *rcd, int subctxt,
2042 			      unsigned long events)
2043 {
2044 	int ret = 0, i;
2045 
2046 	for (i = 0; i <= _QIB_MAX_EVENT_BIT; i++) {
2047 		if (!test_bit(i, &events))
2048 			continue;
2049 		if (i == _QIB_EVENT_DISARM_BUFS_BIT) {
2050 			(void)qib_disarm_piobufs_ifneeded(rcd);
2051 			ret = disarm_req_delay(rcd);
2052 		} else
2053 			clear_bit(i, &rcd->user_event_mask[subctxt]);
2054 	}
2055 	return ret;
2056 }
2057 
2058 static ssize_t qib_write(struct file *fp, const char __user *data,
2059 			 size_t count, loff_t *off)
2060 {
2061 	const struct qib_cmd __user *ucmd;
2062 	struct qib_ctxtdata *rcd;
2063 	const void __user *src;
2064 	size_t consumed, copy = 0;
2065 	struct qib_cmd cmd;
2066 	ssize_t ret = 0;
2067 	void *dest;
2068 
2069 	if (WARN_ON_ONCE(!ib_safe_file_access(fp)))
2070 		return -EACCES;
2071 
2072 	if (count < sizeof(cmd.type)) {
2073 		ret = -EINVAL;
2074 		goto bail;
2075 	}
2076 
2077 	ucmd = (const struct qib_cmd __user *) data;
2078 
2079 	if (copy_from_user(&cmd.type, &ucmd->type, sizeof(cmd.type))) {
2080 		ret = -EFAULT;
2081 		goto bail;
2082 	}
2083 
2084 	consumed = sizeof(cmd.type);
2085 
2086 	switch (cmd.type) {
2087 	case QIB_CMD_ASSIGN_CTXT:
2088 	case QIB_CMD_USER_INIT:
2089 		copy = sizeof(cmd.cmd.user_info);
2090 		dest = &cmd.cmd.user_info;
2091 		src = &ucmd->cmd.user_info;
2092 		break;
2093 
2094 	case QIB_CMD_RECV_CTRL:
2095 		copy = sizeof(cmd.cmd.recv_ctrl);
2096 		dest = &cmd.cmd.recv_ctrl;
2097 		src = &ucmd->cmd.recv_ctrl;
2098 		break;
2099 
2100 	case QIB_CMD_CTXT_INFO:
2101 		copy = sizeof(cmd.cmd.ctxt_info);
2102 		dest = &cmd.cmd.ctxt_info;
2103 		src = &ucmd->cmd.ctxt_info;
2104 		break;
2105 
2106 	case QIB_CMD_TID_UPDATE:
2107 	case QIB_CMD_TID_FREE:
2108 		copy = sizeof(cmd.cmd.tid_info);
2109 		dest = &cmd.cmd.tid_info;
2110 		src = &ucmd->cmd.tid_info;
2111 		break;
2112 
2113 	case QIB_CMD_SET_PART_KEY:
2114 		copy = sizeof(cmd.cmd.part_key);
2115 		dest = &cmd.cmd.part_key;
2116 		src = &ucmd->cmd.part_key;
2117 		break;
2118 
2119 	case QIB_CMD_DISARM_BUFS:
2120 	case QIB_CMD_PIOAVAILUPD: /* force an update of PIOAvail reg */
2121 		copy = 0;
2122 		src = NULL;
2123 		dest = NULL;
2124 		break;
2125 
2126 	case QIB_CMD_POLL_TYPE:
2127 		copy = sizeof(cmd.cmd.poll_type);
2128 		dest = &cmd.cmd.poll_type;
2129 		src = &ucmd->cmd.poll_type;
2130 		break;
2131 
2132 	case QIB_CMD_ARMLAUNCH_CTRL:
2133 		copy = sizeof(cmd.cmd.armlaunch_ctrl);
2134 		dest = &cmd.cmd.armlaunch_ctrl;
2135 		src = &ucmd->cmd.armlaunch_ctrl;
2136 		break;
2137 
2138 	case QIB_CMD_SDMA_INFLIGHT:
2139 		copy = sizeof(cmd.cmd.sdma_inflight);
2140 		dest = &cmd.cmd.sdma_inflight;
2141 		src = &ucmd->cmd.sdma_inflight;
2142 		break;
2143 
2144 	case QIB_CMD_SDMA_COMPLETE:
2145 		copy = sizeof(cmd.cmd.sdma_complete);
2146 		dest = &cmd.cmd.sdma_complete;
2147 		src = &ucmd->cmd.sdma_complete;
2148 		break;
2149 
2150 	case QIB_CMD_ACK_EVENT:
2151 		copy = sizeof(cmd.cmd.event_mask);
2152 		dest = &cmd.cmd.event_mask;
2153 		src = &ucmd->cmd.event_mask;
2154 		break;
2155 
2156 	default:
2157 		ret = -EINVAL;
2158 		goto bail;
2159 	}
2160 
2161 	if (copy) {
2162 		if ((count - consumed) < copy) {
2163 			ret = -EINVAL;
2164 			goto bail;
2165 		}
2166 		if (copy_from_user(dest, src, copy)) {
2167 			ret = -EFAULT;
2168 			goto bail;
2169 		}
2170 		consumed += copy;
2171 	}
2172 
2173 	rcd = ctxt_fp(fp);
2174 	if (!rcd && cmd.type != QIB_CMD_ASSIGN_CTXT) {
2175 		ret = -EINVAL;
2176 		goto bail;
2177 	}
2178 
2179 	switch (cmd.type) {
2180 	case QIB_CMD_ASSIGN_CTXT:
2181 		if (rcd) {
2182 			ret = -EINVAL;
2183 			goto bail;
2184 		}
2185 
2186 		ret = qib_assign_ctxt(fp, &cmd.cmd.user_info);
2187 		if (ret)
2188 			goto bail;
2189 		break;
2190 
2191 	case QIB_CMD_USER_INIT:
2192 		ret = qib_do_user_init(fp, &cmd.cmd.user_info);
2193 		if (ret)
2194 			goto bail;
2195 		ret = qib_get_base_info(fp, (void __user *) (unsigned long)
2196 					cmd.cmd.user_info.spu_base_info,
2197 					cmd.cmd.user_info.spu_base_info_size);
2198 		break;
2199 
2200 	case QIB_CMD_RECV_CTRL:
2201 		ret = qib_manage_rcvq(rcd, subctxt_fp(fp), cmd.cmd.recv_ctrl);
2202 		break;
2203 
2204 	case QIB_CMD_CTXT_INFO:
2205 		ret = qib_ctxt_info(fp, (struct qib_ctxt_info __user *)
2206 				    (unsigned long) cmd.cmd.ctxt_info);
2207 		break;
2208 
2209 	case QIB_CMD_TID_UPDATE:
2210 		ret = qib_tid_update(rcd, fp, &cmd.cmd.tid_info);
2211 		break;
2212 
2213 	case QIB_CMD_TID_FREE:
2214 		ret = qib_tid_free(rcd, subctxt_fp(fp), &cmd.cmd.tid_info);
2215 		break;
2216 
2217 	case QIB_CMD_SET_PART_KEY:
2218 		ret = qib_set_part_key(rcd, cmd.cmd.part_key);
2219 		break;
2220 
2221 	case QIB_CMD_DISARM_BUFS:
2222 		(void)qib_disarm_piobufs_ifneeded(rcd);
2223 		ret = disarm_req_delay(rcd);
2224 		break;
2225 
2226 	case QIB_CMD_PIOAVAILUPD:
2227 		qib_force_pio_avail_update(rcd->dd);
2228 		break;
2229 
2230 	case QIB_CMD_POLL_TYPE:
2231 		rcd->poll_type = cmd.cmd.poll_type;
2232 		break;
2233 
2234 	case QIB_CMD_ARMLAUNCH_CTRL:
2235 		rcd->dd->f_set_armlaunch(rcd->dd, cmd.cmd.armlaunch_ctrl);
2236 		break;
2237 
2238 	case QIB_CMD_SDMA_INFLIGHT:
2239 		ret = qib_sdma_get_inflight(user_sdma_queue_fp(fp),
2240 					    (u32 __user *) (unsigned long)
2241 					    cmd.cmd.sdma_inflight);
2242 		break;
2243 
2244 	case QIB_CMD_SDMA_COMPLETE:
2245 		ret = qib_sdma_get_complete(rcd->ppd,
2246 					    user_sdma_queue_fp(fp),
2247 					    (u32 __user *) (unsigned long)
2248 					    cmd.cmd.sdma_complete);
2249 		break;
2250 
2251 	case QIB_CMD_ACK_EVENT:
2252 		ret = qib_user_event_ack(rcd, subctxt_fp(fp),
2253 					 cmd.cmd.event_mask);
2254 		break;
2255 	}
2256 
2257 	if (ret >= 0)
2258 		ret = consumed;
2259 
2260 bail:
2261 	return ret;
2262 }
2263 
2264 static ssize_t qib_write_iter(struct kiocb *iocb, struct iov_iter *from)
2265 {
2266 	struct qib_filedata *fp = iocb->ki_filp->private_data;
2267 	struct qib_ctxtdata *rcd = ctxt_fp(iocb->ki_filp);
2268 	struct qib_user_sdma_queue *pq = fp->pq;
2269 
2270 	if (!iter_is_iovec(from) || !from->nr_segs || !pq)
2271 		return -EINVAL;
2272 
2273 	return qib_user_sdma_writev(rcd, pq, from->iov, from->nr_segs);
2274 }
2275 
2276 static struct class *qib_class;
2277 static dev_t qib_dev;
2278 
2279 int qib_cdev_init(int minor, const char *name,
2280 		  const struct file_operations *fops,
2281 		  struct cdev **cdevp, struct device **devp)
2282 {
2283 	const dev_t dev = MKDEV(MAJOR(qib_dev), minor);
2284 	struct cdev *cdev;
2285 	struct device *device = NULL;
2286 	int ret;
2287 
2288 	cdev = cdev_alloc();
2289 	if (!cdev) {
2290 		pr_err("Could not allocate cdev for minor %d, %s\n",
2291 		       minor, name);
2292 		ret = -ENOMEM;
2293 		goto done;
2294 	}
2295 
2296 	cdev->owner = THIS_MODULE;
2297 	cdev->ops = fops;
2298 	kobject_set_name(&cdev->kobj, name);
2299 
2300 	ret = cdev_add(cdev, dev, 1);
2301 	if (ret < 0) {
2302 		pr_err("Could not add cdev for minor %d, %s (err %d)\n",
2303 		       minor, name, -ret);
2304 		goto err_cdev;
2305 	}
2306 
2307 	device = device_create(qib_class, NULL, dev, NULL, "%s", name);
2308 	if (!IS_ERR(device))
2309 		goto done;
2310 	ret = PTR_ERR(device);
2311 	device = NULL;
2312 	pr_err("Could not create device for minor %d, %s (err %d)\n",
2313 	       minor, name, -ret);
2314 err_cdev:
2315 	cdev_del(cdev);
2316 	cdev = NULL;
2317 done:
2318 	*cdevp = cdev;
2319 	*devp = device;
2320 	return ret;
2321 }
2322 
2323 void qib_cdev_cleanup(struct cdev **cdevp, struct device **devp)
2324 {
2325 	struct device *device = *devp;
2326 
2327 	if (device) {
2328 		device_unregister(device);
2329 		*devp = NULL;
2330 	}
2331 
2332 	if (*cdevp) {
2333 		cdev_del(*cdevp);
2334 		*cdevp = NULL;
2335 	}
2336 }
2337 
2338 static struct cdev *wildcard_cdev;
2339 static struct device *wildcard_device;
2340 
2341 int __init qib_dev_init(void)
2342 {
2343 	int ret;
2344 
2345 	ret = alloc_chrdev_region(&qib_dev, 0, QIB_NMINORS, QIB_DRV_NAME);
2346 	if (ret < 0) {
2347 		pr_err("Could not allocate chrdev region (err %d)\n", -ret);
2348 		goto done;
2349 	}
2350 
2351 	qib_class = class_create(THIS_MODULE, "ipath");
2352 	if (IS_ERR(qib_class)) {
2353 		ret = PTR_ERR(qib_class);
2354 		pr_err("Could not create device class (err %d)\n", -ret);
2355 		unregister_chrdev_region(qib_dev, QIB_NMINORS);
2356 	}
2357 
2358 done:
2359 	return ret;
2360 }
2361 
2362 void qib_dev_cleanup(void)
2363 {
2364 	if (qib_class) {
2365 		class_destroy(qib_class);
2366 		qib_class = NULL;
2367 	}
2368 
2369 	unregister_chrdev_region(qib_dev, QIB_NMINORS);
2370 }
2371 
2372 static atomic_t user_count = ATOMIC_INIT(0);
2373 
2374 static void qib_user_remove(struct qib_devdata *dd)
2375 {
2376 	if (atomic_dec_return(&user_count) == 0)
2377 		qib_cdev_cleanup(&wildcard_cdev, &wildcard_device);
2378 
2379 	qib_cdev_cleanup(&dd->user_cdev, &dd->user_device);
2380 }
2381 
2382 static int qib_user_add(struct qib_devdata *dd)
2383 {
2384 	char name[10];
2385 	int ret;
2386 
2387 	if (atomic_inc_return(&user_count) == 1) {
2388 		ret = qib_cdev_init(0, "ipath", &qib_file_ops,
2389 				    &wildcard_cdev, &wildcard_device);
2390 		if (ret)
2391 			goto done;
2392 	}
2393 
2394 	snprintf(name, sizeof(name), "ipath%d", dd->unit);
2395 	ret = qib_cdev_init(dd->unit + 1, name, &qib_file_ops,
2396 			    &dd->user_cdev, &dd->user_device);
2397 	if (ret)
2398 		qib_user_remove(dd);
2399 done:
2400 	return ret;
2401 }
2402 
2403 /*
2404  * Create per-unit files in /dev
2405  */
2406 int qib_device_create(struct qib_devdata *dd)
2407 {
2408 	int r, ret;
2409 
2410 	r = qib_user_add(dd);
2411 	ret = qib_diag_add(dd);
2412 	if (r && !ret)
2413 		ret = r;
2414 	return ret;
2415 }
2416 
2417 /*
2418  * Remove per-unit files in /dev
2419  * void, core kernel returns no errors for this stuff
2420  */
2421 void qib_device_remove(struct qib_devdata *dd)
2422 {
2423 	qib_user_remove(dd);
2424 	qib_diag_remove(dd);
2425 }
2426