1 /*
2  * Copyright (c) 2013 Intel Corporation. All rights reserved.
3  * Copyright (c) 2006, 2007, 2008, 2009 QLogic Corporation. All rights reserved.
4  * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
5  *
6  * This software is available to you under a choice of one of two
7  * licenses.  You may choose to be licensed under the terms of the GNU
8  * General Public License (GPL) Version 2, available from the file
9  * COPYING in the main directory of this source tree, or the
10  * OpenIB.org BSD license below:
11  *
12  *     Redistribution and use in source and binary forms, with or
13  *     without modification, are permitted provided that the following
14  *     conditions are met:
15  *
16  *      - Redistributions of source code must retain the above
17  *        copyright notice, this list of conditions and the following
18  *        disclaimer.
19  *
20  *      - Redistributions in binary form must reproduce the above
21  *        copyright notice, this list of conditions and the following
22  *        disclaimer in the documentation and/or other materials
23  *        provided with the distribution.
24  *
25  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
32  * SOFTWARE.
33  */
34 
35 #include <linux/spinlock.h>
36 #include <linux/pci.h>
37 #include <linux/io.h>
38 #include <linux/delay.h>
39 #include <linux/netdevice.h>
40 #include <linux/vmalloc.h>
41 #include <linux/module.h>
42 #include <linux/prefetch.h>
43 
44 #include "qib.h"
45 
46 /*
47  * The size has to be longer than this string, so we can append
48  * board/chip information to it in the init code.
49  */
50 const char ib_qib_version[] = QIB_DRIVER_VERSION "\n";
51 
52 DEFINE_SPINLOCK(qib_devs_lock);
53 LIST_HEAD(qib_dev_list);
54 DEFINE_MUTEX(qib_mutex);	/* general driver use */
55 
56 unsigned qib_ibmtu;
57 module_param_named(ibmtu, qib_ibmtu, uint, S_IRUGO);
58 MODULE_PARM_DESC(ibmtu, "Set max IB MTU (0=2KB, 1=256, 2=512, ... 5=4096");
59 
60 unsigned qib_compat_ddr_negotiate = 1;
61 module_param_named(compat_ddr_negotiate, qib_compat_ddr_negotiate, uint,
62 		   S_IWUSR | S_IRUGO);
63 MODULE_PARM_DESC(compat_ddr_negotiate,
64 		 "Attempt pre-IBTA 1.2 DDR speed negotiation");
65 
66 MODULE_LICENSE("Dual BSD/GPL");
67 MODULE_AUTHOR("Intel <ibsupport@intel.com>");
68 MODULE_DESCRIPTION("Intel IB driver");
69 MODULE_VERSION(QIB_DRIVER_VERSION);
70 
71 /*
72  * QIB_PIO_MAXIBHDR is the max IB header size allowed for in our
73  * PIO send buffers.  This is well beyond anything currently
74  * defined in the InfiniBand spec.
75  */
76 #define QIB_PIO_MAXIBHDR 128
77 
78 /*
79  * QIB_MAX_PKT_RCV is the max # if packets processed per receive interrupt.
80  */
81 #define QIB_MAX_PKT_RECV 64
82 
83 struct qlogic_ib_stats qib_stats;
84 
85 const char *qib_get_unit_name(int unit)
86 {
87 	static char iname[16];
88 
89 	snprintf(iname, sizeof(iname), "infinipath%u", unit);
90 	return iname;
91 }
92 
93 /*
94  * Return count of units with at least one port ACTIVE.
95  */
96 int qib_count_active_units(void)
97 {
98 	struct qib_devdata *dd;
99 	struct qib_pportdata *ppd;
100 	unsigned long flags;
101 	int pidx, nunits_active = 0;
102 
103 	spin_lock_irqsave(&qib_devs_lock, flags);
104 	list_for_each_entry(dd, &qib_dev_list, list) {
105 		if (!(dd->flags & QIB_PRESENT) || !dd->kregbase)
106 			continue;
107 		for (pidx = 0; pidx < dd->num_pports; ++pidx) {
108 			ppd = dd->pport + pidx;
109 			if (ppd->lid && (ppd->lflags & (QIBL_LINKINIT |
110 					 QIBL_LINKARMED | QIBL_LINKACTIVE))) {
111 				nunits_active++;
112 				break;
113 			}
114 		}
115 	}
116 	spin_unlock_irqrestore(&qib_devs_lock, flags);
117 	return nunits_active;
118 }
119 
120 /*
121  * Return count of all units, optionally return in arguments
122  * the number of usable (present) units, and the number of
123  * ports that are up.
124  */
125 int qib_count_units(int *npresentp, int *nupp)
126 {
127 	int nunits = 0, npresent = 0, nup = 0;
128 	struct qib_devdata *dd;
129 	unsigned long flags;
130 	int pidx;
131 	struct qib_pportdata *ppd;
132 
133 	spin_lock_irqsave(&qib_devs_lock, flags);
134 
135 	list_for_each_entry(dd, &qib_dev_list, list) {
136 		nunits++;
137 		if ((dd->flags & QIB_PRESENT) && dd->kregbase)
138 			npresent++;
139 		for (pidx = 0; pidx < dd->num_pports; ++pidx) {
140 			ppd = dd->pport + pidx;
141 			if (ppd->lid && (ppd->lflags & (QIBL_LINKINIT |
142 					 QIBL_LINKARMED | QIBL_LINKACTIVE)))
143 				nup++;
144 		}
145 	}
146 
147 	spin_unlock_irqrestore(&qib_devs_lock, flags);
148 
149 	if (npresentp)
150 		*npresentp = npresent;
151 	if (nupp)
152 		*nupp = nup;
153 
154 	return nunits;
155 }
156 
157 /**
158  * qib_wait_linkstate - wait for an IB link state change to occur
159  * @dd: the qlogic_ib device
160  * @state: the state to wait for
161  * @msecs: the number of milliseconds to wait
162  *
163  * wait up to msecs milliseconds for IB link state change to occur for
164  * now, take the easy polling route.  Currently used only by
165  * qib_set_linkstate.  Returns 0 if state reached, otherwise
166  * -ETIMEDOUT state can have multiple states set, for any of several
167  * transitions.
168  */
169 int qib_wait_linkstate(struct qib_pportdata *ppd, u32 state, int msecs)
170 {
171 	int ret;
172 	unsigned long flags;
173 
174 	spin_lock_irqsave(&ppd->lflags_lock, flags);
175 	if (ppd->state_wanted) {
176 		spin_unlock_irqrestore(&ppd->lflags_lock, flags);
177 		ret = -EBUSY;
178 		goto bail;
179 	}
180 	ppd->state_wanted = state;
181 	spin_unlock_irqrestore(&ppd->lflags_lock, flags);
182 	wait_event_interruptible_timeout(ppd->state_wait,
183 					 (ppd->lflags & state),
184 					 msecs_to_jiffies(msecs));
185 	spin_lock_irqsave(&ppd->lflags_lock, flags);
186 	ppd->state_wanted = 0;
187 	spin_unlock_irqrestore(&ppd->lflags_lock, flags);
188 
189 	if (!(ppd->lflags & state))
190 		ret = -ETIMEDOUT;
191 	else
192 		ret = 0;
193 bail:
194 	return ret;
195 }
196 
197 int qib_set_linkstate(struct qib_pportdata *ppd, u8 newstate)
198 {
199 	u32 lstate;
200 	int ret;
201 	struct qib_devdata *dd = ppd->dd;
202 	unsigned long flags;
203 
204 	switch (newstate) {
205 	case QIB_IB_LINKDOWN_ONLY:
206 		dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE,
207 				 IB_LINKCMD_DOWN | IB_LINKINITCMD_NOP);
208 		/* don't wait */
209 		ret = 0;
210 		goto bail;
211 
212 	case QIB_IB_LINKDOWN:
213 		dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE,
214 				 IB_LINKCMD_DOWN | IB_LINKINITCMD_POLL);
215 		/* don't wait */
216 		ret = 0;
217 		goto bail;
218 
219 	case QIB_IB_LINKDOWN_SLEEP:
220 		dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE,
221 				 IB_LINKCMD_DOWN | IB_LINKINITCMD_SLEEP);
222 		/* don't wait */
223 		ret = 0;
224 		goto bail;
225 
226 	case QIB_IB_LINKDOWN_DISABLE:
227 		dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE,
228 				 IB_LINKCMD_DOWN | IB_LINKINITCMD_DISABLE);
229 		/* don't wait */
230 		ret = 0;
231 		goto bail;
232 
233 	case QIB_IB_LINKARM:
234 		if (ppd->lflags & QIBL_LINKARMED) {
235 			ret = 0;
236 			goto bail;
237 		}
238 		if (!(ppd->lflags & (QIBL_LINKINIT | QIBL_LINKACTIVE))) {
239 			ret = -EINVAL;
240 			goto bail;
241 		}
242 		/*
243 		 * Since the port can be ACTIVE when we ask for ARMED,
244 		 * clear QIBL_LINKV so we can wait for a transition.
245 		 * If the link isn't ARMED, then something else happened
246 		 * and there is no point waiting for ARMED.
247 		 */
248 		spin_lock_irqsave(&ppd->lflags_lock, flags);
249 		ppd->lflags &= ~QIBL_LINKV;
250 		spin_unlock_irqrestore(&ppd->lflags_lock, flags);
251 		dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE,
252 				 IB_LINKCMD_ARMED | IB_LINKINITCMD_NOP);
253 		lstate = QIBL_LINKV;
254 		break;
255 
256 	case QIB_IB_LINKACTIVE:
257 		if (ppd->lflags & QIBL_LINKACTIVE) {
258 			ret = 0;
259 			goto bail;
260 		}
261 		if (!(ppd->lflags & QIBL_LINKARMED)) {
262 			ret = -EINVAL;
263 			goto bail;
264 		}
265 		dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE,
266 				 IB_LINKCMD_ACTIVE | IB_LINKINITCMD_NOP);
267 		lstate = QIBL_LINKACTIVE;
268 		break;
269 
270 	default:
271 		ret = -EINVAL;
272 		goto bail;
273 	}
274 	ret = qib_wait_linkstate(ppd, lstate, 10);
275 
276 bail:
277 	return ret;
278 }
279 
280 /*
281  * Get address of eager buffer from it's index (allocated in chunks, not
282  * contiguous).
283  */
284 static inline void *qib_get_egrbuf(const struct qib_ctxtdata *rcd, u32 etail)
285 {
286 	const u32 chunk = etail >> rcd->rcvegrbufs_perchunk_shift;
287 	const u32 idx =  etail & ((u32)rcd->rcvegrbufs_perchunk - 1);
288 
289 	return rcd->rcvegrbuf[chunk] + (idx << rcd->dd->rcvegrbufsize_shift);
290 }
291 
292 /*
293  * Returns 1 if error was a CRC, else 0.
294  * Needed for some chip's synthesized error counters.
295  */
296 static u32 qib_rcv_hdrerr(struct qib_ctxtdata *rcd, struct qib_pportdata *ppd,
297 			  u32 ctxt, u32 eflags, u32 l, u32 etail,
298 			  __le32 *rhf_addr, struct qib_message_header *rhdr)
299 {
300 	u32 ret = 0;
301 
302 	if (eflags & (QLOGIC_IB_RHF_H_ICRCERR | QLOGIC_IB_RHF_H_VCRCERR))
303 		ret = 1;
304 	else if (eflags == QLOGIC_IB_RHF_H_TIDERR) {
305 		/* For TIDERR and RC QPs premptively schedule a NAK */
306 		struct qib_ib_header *hdr = (struct qib_ib_header *) rhdr;
307 		struct qib_other_headers *ohdr = NULL;
308 		struct qib_ibport *ibp = &ppd->ibport_data;
309 		struct qib_qp *qp = NULL;
310 		u32 tlen = qib_hdrget_length_in_bytes(rhf_addr);
311 		u16 lid  = be16_to_cpu(hdr->lrh[1]);
312 		int lnh = be16_to_cpu(hdr->lrh[0]) & 3;
313 		u32 qp_num;
314 		u32 opcode;
315 		u32 psn;
316 		int diff;
317 
318 		/* Sanity check packet */
319 		if (tlen < 24)
320 			goto drop;
321 
322 		if (lid < QIB_MULTICAST_LID_BASE) {
323 			lid &= ~((1 << ppd->lmc) - 1);
324 			if (unlikely(lid != ppd->lid))
325 				goto drop;
326 		}
327 
328 		/* Check for GRH */
329 		if (lnh == QIB_LRH_BTH)
330 			ohdr = &hdr->u.oth;
331 		else if (lnh == QIB_LRH_GRH) {
332 			u32 vtf;
333 
334 			ohdr = &hdr->u.l.oth;
335 			if (hdr->u.l.grh.next_hdr != IB_GRH_NEXT_HDR)
336 				goto drop;
337 			vtf = be32_to_cpu(hdr->u.l.grh.version_tclass_flow);
338 			if ((vtf >> IB_GRH_VERSION_SHIFT) != IB_GRH_VERSION)
339 				goto drop;
340 		} else
341 			goto drop;
342 
343 		/* Get opcode and PSN from packet */
344 		opcode = be32_to_cpu(ohdr->bth[0]);
345 		opcode >>= 24;
346 		psn = be32_to_cpu(ohdr->bth[2]);
347 
348 		/* Get the destination QP number. */
349 		qp_num = be32_to_cpu(ohdr->bth[1]) & QIB_QPN_MASK;
350 		if (qp_num != QIB_MULTICAST_QPN) {
351 			int ruc_res;
352 
353 			qp = qib_lookup_qpn(ibp, qp_num);
354 			if (!qp)
355 				goto drop;
356 
357 			/*
358 			 * Handle only RC QPs - for other QP types drop error
359 			 * packet.
360 			 */
361 			spin_lock(&qp->r_lock);
362 
363 			/* Check for valid receive state. */
364 			if (!(ib_qib_state_ops[qp->state] &
365 			      QIB_PROCESS_RECV_OK)) {
366 				ibp->n_pkt_drops++;
367 				goto unlock;
368 			}
369 
370 			switch (qp->ibqp.qp_type) {
371 			case IB_QPT_RC:
372 				ruc_res =
373 					qib_ruc_check_hdr(
374 						ibp, hdr,
375 						lnh == QIB_LRH_GRH,
376 						qp,
377 						be32_to_cpu(ohdr->bth[0]));
378 				if (ruc_res)
379 					goto unlock;
380 
381 				/* Only deal with RDMA Writes for now */
382 				if (opcode <
383 				    IB_OPCODE_RC_RDMA_READ_RESPONSE_FIRST) {
384 					diff = qib_cmp24(psn, qp->r_psn);
385 					if (!qp->r_nak_state && diff >= 0) {
386 						ibp->n_rc_seqnak++;
387 						qp->r_nak_state =
388 							IB_NAK_PSN_ERROR;
389 						/* Use the expected PSN. */
390 						qp->r_ack_psn = qp->r_psn;
391 						/*
392 						 * Wait to send the sequence
393 						 * NAK until all packets
394 						 * in the receive queue have
395 						 * been processed.
396 						 * Otherwise, we end up
397 						 * propagating congestion.
398 						 */
399 						if (list_empty(&qp->rspwait)) {
400 							qp->r_flags |=
401 								QIB_R_RSP_NAK;
402 							atomic_inc(
403 								&qp->refcount);
404 							list_add_tail(
405 							 &qp->rspwait,
406 							 &rcd->qp_wait_list);
407 						}
408 					} /* Out of sequence NAK */
409 				} /* QP Request NAKs */
410 				break;
411 			case IB_QPT_SMI:
412 			case IB_QPT_GSI:
413 			case IB_QPT_UD:
414 			case IB_QPT_UC:
415 			default:
416 				/* For now don't handle any other QP types */
417 				break;
418 			}
419 
420 unlock:
421 			spin_unlock(&qp->r_lock);
422 			/*
423 			 * Notify qib_destroy_qp() if it is waiting
424 			 * for us to finish.
425 			 */
426 			if (atomic_dec_and_test(&qp->refcount))
427 				wake_up(&qp->wait);
428 		} /* Unicast QP */
429 	} /* Valid packet with TIDErr */
430 
431 drop:
432 	return ret;
433 }
434 
435 /*
436  * qib_kreceive - receive a packet
437  * @rcd: the qlogic_ib context
438  * @llic: gets count of good packets needed to clear lli,
439  *          (used with chips that need need to track crcs for lli)
440  *
441  * called from interrupt handler for errors or receive interrupt
442  * Returns number of CRC error packets, needed by some chips for
443  * local link integrity tracking.   crcs are adjusted down by following
444  * good packets, if any, and count of good packets is also tracked.
445  */
446 u32 qib_kreceive(struct qib_ctxtdata *rcd, u32 *llic, u32 *npkts)
447 {
448 	struct qib_devdata *dd = rcd->dd;
449 	struct qib_pportdata *ppd = rcd->ppd;
450 	__le32 *rhf_addr;
451 	void *ebuf;
452 	const u32 rsize = dd->rcvhdrentsize;        /* words */
453 	const u32 maxcnt = dd->rcvhdrcnt * rsize;   /* words */
454 	u32 etail = -1, l, hdrqtail;
455 	struct qib_message_header *hdr;
456 	u32 eflags, etype, tlen, i = 0, updegr = 0, crcs = 0;
457 	int last;
458 	u64 lval;
459 	struct qib_qp *qp, *nqp;
460 
461 	l = rcd->head;
462 	rhf_addr = (__le32 *) rcd->rcvhdrq + l + dd->rhf_offset;
463 	if (dd->flags & QIB_NODMA_RTAIL) {
464 		u32 seq = qib_hdrget_seq(rhf_addr);
465 
466 		if (seq != rcd->seq_cnt)
467 			goto bail;
468 		hdrqtail = 0;
469 	} else {
470 		hdrqtail = qib_get_rcvhdrtail(rcd);
471 		if (l == hdrqtail)
472 			goto bail;
473 		smp_rmb();  /* prevent speculative reads of dma'ed hdrq */
474 	}
475 
476 	for (last = 0, i = 1; !last; i += !last) {
477 		hdr = dd->f_get_msgheader(dd, rhf_addr);
478 		eflags = qib_hdrget_err_flags(rhf_addr);
479 		etype = qib_hdrget_rcv_type(rhf_addr);
480 		/* total length */
481 		tlen = qib_hdrget_length_in_bytes(rhf_addr);
482 		ebuf = NULL;
483 		if ((dd->flags & QIB_NODMA_RTAIL) ?
484 		    qib_hdrget_use_egr_buf(rhf_addr) :
485 		    (etype != RCVHQ_RCV_TYPE_EXPECTED)) {
486 			etail = qib_hdrget_index(rhf_addr);
487 			updegr = 1;
488 			if (tlen > sizeof(*hdr) ||
489 			    etype >= RCVHQ_RCV_TYPE_NON_KD) {
490 				ebuf = qib_get_egrbuf(rcd, etail);
491 				prefetch_range(ebuf, tlen - sizeof(*hdr));
492 			}
493 		}
494 		if (!eflags) {
495 			u16 lrh_len = be16_to_cpu(hdr->lrh[2]) << 2;
496 
497 			if (lrh_len != tlen) {
498 				qib_stats.sps_lenerrs++;
499 				goto move_along;
500 			}
501 		}
502 		if (etype == RCVHQ_RCV_TYPE_NON_KD && !eflags &&
503 		    ebuf == NULL &&
504 		    tlen > (dd->rcvhdrentsize - 2 + 1 -
505 				qib_hdrget_offset(rhf_addr)) << 2) {
506 			goto move_along;
507 		}
508 
509 		/*
510 		 * Both tiderr and qibhdrerr are set for all plain IB
511 		 * packets; only qibhdrerr should be set.
512 		 */
513 		if (unlikely(eflags))
514 			crcs += qib_rcv_hdrerr(rcd, ppd, rcd->ctxt, eflags, l,
515 					       etail, rhf_addr, hdr);
516 		else if (etype == RCVHQ_RCV_TYPE_NON_KD) {
517 			qib_ib_rcv(rcd, hdr, ebuf, tlen);
518 			if (crcs)
519 				crcs--;
520 			else if (llic && *llic)
521 				--*llic;
522 		}
523 move_along:
524 		l += rsize;
525 		if (l >= maxcnt)
526 			l = 0;
527 		if (i == QIB_MAX_PKT_RECV)
528 			last = 1;
529 
530 		rhf_addr = (__le32 *) rcd->rcvhdrq + l + dd->rhf_offset;
531 		if (dd->flags & QIB_NODMA_RTAIL) {
532 			u32 seq = qib_hdrget_seq(rhf_addr);
533 
534 			if (++rcd->seq_cnt > 13)
535 				rcd->seq_cnt = 1;
536 			if (seq != rcd->seq_cnt)
537 				last = 1;
538 		} else if (l == hdrqtail)
539 			last = 1;
540 		/*
541 		 * Update head regs etc., every 16 packets, if not last pkt,
542 		 * to help prevent rcvhdrq overflows, when many packets
543 		 * are processed and queue is nearly full.
544 		 * Don't request an interrupt for intermediate updates.
545 		 */
546 		lval = l;
547 		if (!last && !(i & 0xf)) {
548 			dd->f_update_usrhead(rcd, lval, updegr, etail, i);
549 			updegr = 0;
550 		}
551 	}
552 	/*
553 	 * Notify qib_destroy_qp() if it is waiting
554 	 * for lookaside_qp to finish.
555 	 */
556 	if (rcd->lookaside_qp) {
557 		if (atomic_dec_and_test(&rcd->lookaside_qp->refcount))
558 			wake_up(&rcd->lookaside_qp->wait);
559 		rcd->lookaside_qp = NULL;
560 	}
561 
562 	rcd->head = l;
563 
564 	/*
565 	 * Iterate over all QPs waiting to respond.
566 	 * The list won't change since the IRQ is only run on one CPU.
567 	 */
568 	list_for_each_entry_safe(qp, nqp, &rcd->qp_wait_list, rspwait) {
569 		list_del_init(&qp->rspwait);
570 		if (qp->r_flags & QIB_R_RSP_NAK) {
571 			qp->r_flags &= ~QIB_R_RSP_NAK;
572 			qib_send_rc_ack(qp);
573 		}
574 		if (qp->r_flags & QIB_R_RSP_SEND) {
575 			unsigned long flags;
576 
577 			qp->r_flags &= ~QIB_R_RSP_SEND;
578 			spin_lock_irqsave(&qp->s_lock, flags);
579 			if (ib_qib_state_ops[qp->state] &
580 					QIB_PROCESS_OR_FLUSH_SEND)
581 				qib_schedule_send(qp);
582 			spin_unlock_irqrestore(&qp->s_lock, flags);
583 		}
584 		if (atomic_dec_and_test(&qp->refcount))
585 			wake_up(&qp->wait);
586 	}
587 
588 bail:
589 	/* Report number of packets consumed */
590 	if (npkts)
591 		*npkts = i;
592 
593 	/*
594 	 * Always write head at end, and setup rcv interrupt, even
595 	 * if no packets were processed.
596 	 */
597 	lval = (u64)rcd->head | dd->rhdrhead_intr_off;
598 	dd->f_update_usrhead(rcd, lval, updegr, etail, i);
599 	return crcs;
600 }
601 
602 /**
603  * qib_set_mtu - set the MTU
604  * @ppd: the perport data
605  * @arg: the new MTU
606  *
607  * We can handle "any" incoming size, the issue here is whether we
608  * need to restrict our outgoing size.   For now, we don't do any
609  * sanity checking on this, and we don't deal with what happens to
610  * programs that are already running when the size changes.
611  * NOTE: changing the MTU will usually cause the IBC to go back to
612  * link INIT state...
613  */
614 int qib_set_mtu(struct qib_pportdata *ppd, u16 arg)
615 {
616 	u32 piosize;
617 	int ret, chk;
618 
619 	if (arg != 256 && arg != 512 && arg != 1024 && arg != 2048 &&
620 	    arg != 4096) {
621 		ret = -EINVAL;
622 		goto bail;
623 	}
624 	chk = ib_mtu_enum_to_int(qib_ibmtu);
625 	if (chk > 0 && arg > chk) {
626 		ret = -EINVAL;
627 		goto bail;
628 	}
629 
630 	piosize = ppd->ibmaxlen;
631 	ppd->ibmtu = arg;
632 
633 	if (arg >= (piosize - QIB_PIO_MAXIBHDR)) {
634 		/* Only if it's not the initial value (or reset to it) */
635 		if (piosize != ppd->init_ibmaxlen) {
636 			if (arg > piosize && arg <= ppd->init_ibmaxlen)
637 				piosize = ppd->init_ibmaxlen - 2 * sizeof(u32);
638 			ppd->ibmaxlen = piosize;
639 		}
640 	} else if ((arg + QIB_PIO_MAXIBHDR) != ppd->ibmaxlen) {
641 		piosize = arg + QIB_PIO_MAXIBHDR - 2 * sizeof(u32);
642 		ppd->ibmaxlen = piosize;
643 	}
644 
645 	ppd->dd->f_set_ib_cfg(ppd, QIB_IB_CFG_MTU, 0);
646 
647 	ret = 0;
648 
649 bail:
650 	return ret;
651 }
652 
653 int qib_set_lid(struct qib_pportdata *ppd, u32 lid, u8 lmc)
654 {
655 	struct qib_devdata *dd = ppd->dd;
656 
657 	ppd->lid = lid;
658 	ppd->lmc = lmc;
659 
660 	dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LIDLMC,
661 			 lid | (~((1U << lmc) - 1)) << 16);
662 
663 	qib_devinfo(dd->pcidev, "IB%u:%u got a lid: 0x%x\n",
664 		    dd->unit, ppd->port, lid);
665 
666 	return 0;
667 }
668 
669 /*
670  * Following deal with the "obviously simple" task of overriding the state
671  * of the LEDS, which normally indicate link physical and logical status.
672  * The complications arise in dealing with different hardware mappings
673  * and the board-dependent routine being called from interrupts.
674  * and then there's the requirement to _flash_ them.
675  */
676 #define LED_OVER_FREQ_SHIFT 8
677 #define LED_OVER_FREQ_MASK (0xFF<<LED_OVER_FREQ_SHIFT)
678 /* Below is "non-zero" to force override, but both actual LEDs are off */
679 #define LED_OVER_BOTH_OFF (8)
680 
681 static void qib_run_led_override(unsigned long opaque)
682 {
683 	struct qib_pportdata *ppd = (struct qib_pportdata *)opaque;
684 	struct qib_devdata *dd = ppd->dd;
685 	int timeoff;
686 	int ph_idx;
687 
688 	if (!(dd->flags & QIB_INITTED))
689 		return;
690 
691 	ph_idx = ppd->led_override_phase++ & 1;
692 	ppd->led_override = ppd->led_override_vals[ph_idx];
693 	timeoff = ppd->led_override_timeoff;
694 
695 	dd->f_setextled(ppd, 1);
696 	/*
697 	 * don't re-fire the timer if user asked for it to be off; we let
698 	 * it fire one more time after they turn it off to simplify
699 	 */
700 	if (ppd->led_override_vals[0] || ppd->led_override_vals[1])
701 		mod_timer(&ppd->led_override_timer, jiffies + timeoff);
702 }
703 
704 void qib_set_led_override(struct qib_pportdata *ppd, unsigned int val)
705 {
706 	struct qib_devdata *dd = ppd->dd;
707 	int timeoff, freq;
708 
709 	if (!(dd->flags & QIB_INITTED))
710 		return;
711 
712 	/* First check if we are blinking. If not, use 1HZ polling */
713 	timeoff = HZ;
714 	freq = (val & LED_OVER_FREQ_MASK) >> LED_OVER_FREQ_SHIFT;
715 
716 	if (freq) {
717 		/* For blink, set each phase from one nybble of val */
718 		ppd->led_override_vals[0] = val & 0xF;
719 		ppd->led_override_vals[1] = (val >> 4) & 0xF;
720 		timeoff = (HZ << 4)/freq;
721 	} else {
722 		/* Non-blink set both phases the same. */
723 		ppd->led_override_vals[0] = val & 0xF;
724 		ppd->led_override_vals[1] = val & 0xF;
725 	}
726 	ppd->led_override_timeoff = timeoff;
727 
728 	/*
729 	 * If the timer has not already been started, do so. Use a "quick"
730 	 * timeout so the function will be called soon, to look at our request.
731 	 */
732 	if (atomic_inc_return(&ppd->led_override_timer_active) == 1) {
733 		/* Need to start timer */
734 		init_timer(&ppd->led_override_timer);
735 		ppd->led_override_timer.function = qib_run_led_override;
736 		ppd->led_override_timer.data = (unsigned long) ppd;
737 		ppd->led_override_timer.expires = jiffies + 1;
738 		add_timer(&ppd->led_override_timer);
739 	} else {
740 		if (ppd->led_override_vals[0] || ppd->led_override_vals[1])
741 			mod_timer(&ppd->led_override_timer, jiffies + 1);
742 		atomic_dec(&ppd->led_override_timer_active);
743 	}
744 }
745 
746 /**
747  * qib_reset_device - reset the chip if possible
748  * @unit: the device to reset
749  *
750  * Whether or not reset is successful, we attempt to re-initialize the chip
751  * (that is, much like a driver unload/reload).  We clear the INITTED flag
752  * so that the various entry points will fail until we reinitialize.  For
753  * now, we only allow this if no user contexts are open that use chip resources
754  */
755 int qib_reset_device(int unit)
756 {
757 	int ret, i;
758 	struct qib_devdata *dd = qib_lookup(unit);
759 	struct qib_pportdata *ppd;
760 	unsigned long flags;
761 	int pidx;
762 
763 	if (!dd) {
764 		ret = -ENODEV;
765 		goto bail;
766 	}
767 
768 	qib_devinfo(dd->pcidev, "Reset on unit %u requested\n", unit);
769 
770 	if (!dd->kregbase || !(dd->flags & QIB_PRESENT)) {
771 		qib_devinfo(dd->pcidev,
772 			"Invalid unit number %u or not initialized or not present\n",
773 			unit);
774 		ret = -ENXIO;
775 		goto bail;
776 	}
777 
778 	spin_lock_irqsave(&dd->uctxt_lock, flags);
779 	if (dd->rcd)
780 		for (i = dd->first_user_ctxt; i < dd->cfgctxts; i++) {
781 			if (!dd->rcd[i] || !dd->rcd[i]->cnt)
782 				continue;
783 			spin_unlock_irqrestore(&dd->uctxt_lock, flags);
784 			ret = -EBUSY;
785 			goto bail;
786 		}
787 	spin_unlock_irqrestore(&dd->uctxt_lock, flags);
788 
789 	for (pidx = 0; pidx < dd->num_pports; ++pidx) {
790 		ppd = dd->pport + pidx;
791 		if (atomic_read(&ppd->led_override_timer_active)) {
792 			/* Need to stop LED timer, _then_ shut off LEDs */
793 			del_timer_sync(&ppd->led_override_timer);
794 			atomic_set(&ppd->led_override_timer_active, 0);
795 		}
796 
797 		/* Shut off LEDs after we are sure timer is not running */
798 		ppd->led_override = LED_OVER_BOTH_OFF;
799 		dd->f_setextled(ppd, 0);
800 		if (dd->flags & QIB_HAS_SEND_DMA)
801 			qib_teardown_sdma(ppd);
802 	}
803 
804 	ret = dd->f_reset(dd);
805 	if (ret == 1)
806 		ret = qib_init(dd, 1);
807 	else
808 		ret = -EAGAIN;
809 	if (ret)
810 		qib_dev_err(dd,
811 			"Reinitialize unit %u after reset failed with %d\n",
812 			unit, ret);
813 	else
814 		qib_devinfo(dd->pcidev,
815 			"Reinitialized unit %u after resetting\n",
816 			unit);
817 
818 bail:
819 	return ret;
820 }
821