1 /* 2 * Copyright (c) 2013 Intel Corporation. All rights reserved. 3 * Copyright (c) 2006, 2007, 2008, 2009 QLogic Corporation. All rights reserved. 4 * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved. 5 * 6 * This software is available to you under a choice of one of two 7 * licenses. You may choose to be licensed under the terms of the GNU 8 * General Public License (GPL) Version 2, available from the file 9 * COPYING in the main directory of this source tree, or the 10 * OpenIB.org BSD license below: 11 * 12 * Redistribution and use in source and binary forms, with or 13 * without modification, are permitted provided that the following 14 * conditions are met: 15 * 16 * - Redistributions of source code must retain the above 17 * copyright notice, this list of conditions and the following 18 * disclaimer. 19 * 20 * - Redistributions in binary form must reproduce the above 21 * copyright notice, this list of conditions and the following 22 * disclaimer in the documentation and/or other materials 23 * provided with the distribution. 24 * 25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 32 * SOFTWARE. 33 */ 34 35 #include <linux/spinlock.h> 36 #include <linux/pci.h> 37 #include <linux/io.h> 38 #include <linux/delay.h> 39 #include <linux/netdevice.h> 40 #include <linux/vmalloc.h> 41 #include <linux/module.h> 42 #include <linux/prefetch.h> 43 44 #include "qib.h" 45 46 /* 47 * The size has to be longer than this string, so we can append 48 * board/chip information to it in the init code. 49 */ 50 const char ib_qib_version[] = QIB_DRIVER_VERSION "\n"; 51 52 DEFINE_SPINLOCK(qib_devs_lock); 53 LIST_HEAD(qib_dev_list); 54 DEFINE_MUTEX(qib_mutex); /* general driver use */ 55 56 unsigned qib_ibmtu; 57 module_param_named(ibmtu, qib_ibmtu, uint, S_IRUGO); 58 MODULE_PARM_DESC(ibmtu, "Set max IB MTU (0=2KB, 1=256, 2=512, ... 5=4096"); 59 60 unsigned qib_compat_ddr_negotiate = 1; 61 module_param_named(compat_ddr_negotiate, qib_compat_ddr_negotiate, uint, 62 S_IWUSR | S_IRUGO); 63 MODULE_PARM_DESC(compat_ddr_negotiate, 64 "Attempt pre-IBTA 1.2 DDR speed negotiation"); 65 66 MODULE_LICENSE("Dual BSD/GPL"); 67 MODULE_AUTHOR("Intel <ibsupport@intel.com>"); 68 MODULE_DESCRIPTION("Intel IB driver"); 69 70 /* 71 * QIB_PIO_MAXIBHDR is the max IB header size allowed for in our 72 * PIO send buffers. This is well beyond anything currently 73 * defined in the InfiniBand spec. 74 */ 75 #define QIB_PIO_MAXIBHDR 128 76 77 /* 78 * QIB_MAX_PKT_RCV is the max # if packets processed per receive interrupt. 79 */ 80 #define QIB_MAX_PKT_RECV 64 81 82 struct qlogic_ib_stats qib_stats; 83 84 struct pci_dev *qib_get_pci_dev(struct rvt_dev_info *rdi) 85 { 86 struct qib_ibdev *ibdev = container_of(rdi, struct qib_ibdev, rdi); 87 struct qib_devdata *dd = container_of(ibdev, 88 struct qib_devdata, verbs_dev); 89 return dd->pcidev; 90 } 91 92 /* 93 * Return count of units with at least one port ACTIVE. 94 */ 95 int qib_count_active_units(void) 96 { 97 struct qib_devdata *dd; 98 struct qib_pportdata *ppd; 99 unsigned long flags; 100 int pidx, nunits_active = 0; 101 102 spin_lock_irqsave(&qib_devs_lock, flags); 103 list_for_each_entry(dd, &qib_dev_list, list) { 104 if (!(dd->flags & QIB_PRESENT) || !dd->kregbase) 105 continue; 106 for (pidx = 0; pidx < dd->num_pports; ++pidx) { 107 ppd = dd->pport + pidx; 108 if (ppd->lid && (ppd->lflags & (QIBL_LINKINIT | 109 QIBL_LINKARMED | QIBL_LINKACTIVE))) { 110 nunits_active++; 111 break; 112 } 113 } 114 } 115 spin_unlock_irqrestore(&qib_devs_lock, flags); 116 return nunits_active; 117 } 118 119 /* 120 * Return count of all units, optionally return in arguments 121 * the number of usable (present) units, and the number of 122 * ports that are up. 123 */ 124 int qib_count_units(int *npresentp, int *nupp) 125 { 126 int nunits = 0, npresent = 0, nup = 0; 127 struct qib_devdata *dd; 128 unsigned long flags; 129 int pidx; 130 struct qib_pportdata *ppd; 131 132 spin_lock_irqsave(&qib_devs_lock, flags); 133 134 list_for_each_entry(dd, &qib_dev_list, list) { 135 nunits++; 136 if ((dd->flags & QIB_PRESENT) && dd->kregbase) 137 npresent++; 138 for (pidx = 0; pidx < dd->num_pports; ++pidx) { 139 ppd = dd->pport + pidx; 140 if (ppd->lid && (ppd->lflags & (QIBL_LINKINIT | 141 QIBL_LINKARMED | QIBL_LINKACTIVE))) 142 nup++; 143 } 144 } 145 146 spin_unlock_irqrestore(&qib_devs_lock, flags); 147 148 if (npresentp) 149 *npresentp = npresent; 150 if (nupp) 151 *nupp = nup; 152 153 return nunits; 154 } 155 156 /** 157 * qib_wait_linkstate - wait for an IB link state change to occur 158 * @dd: the qlogic_ib device 159 * @state: the state to wait for 160 * @msecs: the number of milliseconds to wait 161 * 162 * wait up to msecs milliseconds for IB link state change to occur for 163 * now, take the easy polling route. Currently used only by 164 * qib_set_linkstate. Returns 0 if state reached, otherwise 165 * -ETIMEDOUT state can have multiple states set, for any of several 166 * transitions. 167 */ 168 int qib_wait_linkstate(struct qib_pportdata *ppd, u32 state, int msecs) 169 { 170 int ret; 171 unsigned long flags; 172 173 spin_lock_irqsave(&ppd->lflags_lock, flags); 174 if (ppd->state_wanted) { 175 spin_unlock_irqrestore(&ppd->lflags_lock, flags); 176 ret = -EBUSY; 177 goto bail; 178 } 179 ppd->state_wanted = state; 180 spin_unlock_irqrestore(&ppd->lflags_lock, flags); 181 wait_event_interruptible_timeout(ppd->state_wait, 182 (ppd->lflags & state), 183 msecs_to_jiffies(msecs)); 184 spin_lock_irqsave(&ppd->lflags_lock, flags); 185 ppd->state_wanted = 0; 186 spin_unlock_irqrestore(&ppd->lflags_lock, flags); 187 188 if (!(ppd->lflags & state)) 189 ret = -ETIMEDOUT; 190 else 191 ret = 0; 192 bail: 193 return ret; 194 } 195 196 int qib_set_linkstate(struct qib_pportdata *ppd, u8 newstate) 197 { 198 u32 lstate; 199 int ret; 200 struct qib_devdata *dd = ppd->dd; 201 unsigned long flags; 202 203 switch (newstate) { 204 case QIB_IB_LINKDOWN_ONLY: 205 dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE, 206 IB_LINKCMD_DOWN | IB_LINKINITCMD_NOP); 207 /* don't wait */ 208 ret = 0; 209 goto bail; 210 211 case QIB_IB_LINKDOWN: 212 dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE, 213 IB_LINKCMD_DOWN | IB_LINKINITCMD_POLL); 214 /* don't wait */ 215 ret = 0; 216 goto bail; 217 218 case QIB_IB_LINKDOWN_SLEEP: 219 dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE, 220 IB_LINKCMD_DOWN | IB_LINKINITCMD_SLEEP); 221 /* don't wait */ 222 ret = 0; 223 goto bail; 224 225 case QIB_IB_LINKDOWN_DISABLE: 226 dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE, 227 IB_LINKCMD_DOWN | IB_LINKINITCMD_DISABLE); 228 /* don't wait */ 229 ret = 0; 230 goto bail; 231 232 case QIB_IB_LINKARM: 233 if (ppd->lflags & QIBL_LINKARMED) { 234 ret = 0; 235 goto bail; 236 } 237 if (!(ppd->lflags & (QIBL_LINKINIT | QIBL_LINKACTIVE))) { 238 ret = -EINVAL; 239 goto bail; 240 } 241 /* 242 * Since the port can be ACTIVE when we ask for ARMED, 243 * clear QIBL_LINKV so we can wait for a transition. 244 * If the link isn't ARMED, then something else happened 245 * and there is no point waiting for ARMED. 246 */ 247 spin_lock_irqsave(&ppd->lflags_lock, flags); 248 ppd->lflags &= ~QIBL_LINKV; 249 spin_unlock_irqrestore(&ppd->lflags_lock, flags); 250 dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE, 251 IB_LINKCMD_ARMED | IB_LINKINITCMD_NOP); 252 lstate = QIBL_LINKV; 253 break; 254 255 case QIB_IB_LINKACTIVE: 256 if (ppd->lflags & QIBL_LINKACTIVE) { 257 ret = 0; 258 goto bail; 259 } 260 if (!(ppd->lflags & QIBL_LINKARMED)) { 261 ret = -EINVAL; 262 goto bail; 263 } 264 dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE, 265 IB_LINKCMD_ACTIVE | IB_LINKINITCMD_NOP); 266 lstate = QIBL_LINKACTIVE; 267 break; 268 269 default: 270 ret = -EINVAL; 271 goto bail; 272 } 273 ret = qib_wait_linkstate(ppd, lstate, 10); 274 275 bail: 276 return ret; 277 } 278 279 /* 280 * Get address of eager buffer from it's index (allocated in chunks, not 281 * contiguous). 282 */ 283 static inline void *qib_get_egrbuf(const struct qib_ctxtdata *rcd, u32 etail) 284 { 285 const u32 chunk = etail >> rcd->rcvegrbufs_perchunk_shift; 286 const u32 idx = etail & ((u32)rcd->rcvegrbufs_perchunk - 1); 287 288 return rcd->rcvegrbuf[chunk] + (idx << rcd->dd->rcvegrbufsize_shift); 289 } 290 291 /* 292 * Returns 1 if error was a CRC, else 0. 293 * Needed for some chip's synthesized error counters. 294 */ 295 static u32 qib_rcv_hdrerr(struct qib_ctxtdata *rcd, struct qib_pportdata *ppd, 296 u32 ctxt, u32 eflags, u32 l, u32 etail, 297 __le32 *rhf_addr, struct qib_message_header *rhdr) 298 { 299 u32 ret = 0; 300 301 if (eflags & (QLOGIC_IB_RHF_H_ICRCERR | QLOGIC_IB_RHF_H_VCRCERR)) 302 ret = 1; 303 else if (eflags == QLOGIC_IB_RHF_H_TIDERR) { 304 /* For TIDERR and RC QPs premptively schedule a NAK */ 305 struct ib_header *hdr = (struct ib_header *)rhdr; 306 struct ib_other_headers *ohdr = NULL; 307 struct qib_ibport *ibp = &ppd->ibport_data; 308 struct qib_devdata *dd = ppd->dd; 309 struct rvt_dev_info *rdi = &dd->verbs_dev.rdi; 310 struct rvt_qp *qp = NULL; 311 u32 tlen = qib_hdrget_length_in_bytes(rhf_addr); 312 u16 lid = be16_to_cpu(hdr->lrh[1]); 313 int lnh = be16_to_cpu(hdr->lrh[0]) & 3; 314 u32 qp_num; 315 u32 opcode; 316 u32 psn; 317 int diff; 318 319 /* Sanity check packet */ 320 if (tlen < 24) 321 goto drop; 322 323 if (lid < be16_to_cpu(IB_MULTICAST_LID_BASE)) { 324 lid &= ~((1 << ppd->lmc) - 1); 325 if (unlikely(lid != ppd->lid)) 326 goto drop; 327 } 328 329 /* Check for GRH */ 330 if (lnh == QIB_LRH_BTH) 331 ohdr = &hdr->u.oth; 332 else if (lnh == QIB_LRH_GRH) { 333 u32 vtf; 334 335 ohdr = &hdr->u.l.oth; 336 if (hdr->u.l.grh.next_hdr != IB_GRH_NEXT_HDR) 337 goto drop; 338 vtf = be32_to_cpu(hdr->u.l.grh.version_tclass_flow); 339 if ((vtf >> IB_GRH_VERSION_SHIFT) != IB_GRH_VERSION) 340 goto drop; 341 } else 342 goto drop; 343 344 /* Get opcode and PSN from packet */ 345 opcode = be32_to_cpu(ohdr->bth[0]); 346 opcode >>= 24; 347 psn = be32_to_cpu(ohdr->bth[2]); 348 349 /* Get the destination QP number. */ 350 qp_num = be32_to_cpu(ohdr->bth[1]) & RVT_QPN_MASK; 351 if (qp_num != QIB_MULTICAST_QPN) { 352 int ruc_res; 353 354 rcu_read_lock(); 355 qp = rvt_lookup_qpn(rdi, &ibp->rvp, qp_num); 356 if (!qp) { 357 rcu_read_unlock(); 358 goto drop; 359 } 360 361 /* 362 * Handle only RC QPs - for other QP types drop error 363 * packet. 364 */ 365 spin_lock(&qp->r_lock); 366 367 /* Check for valid receive state. */ 368 if (!(ib_rvt_state_ops[qp->state] & 369 RVT_PROCESS_RECV_OK)) { 370 ibp->rvp.n_pkt_drops++; 371 goto unlock; 372 } 373 374 switch (qp->ibqp.qp_type) { 375 case IB_QPT_RC: 376 ruc_res = 377 qib_ruc_check_hdr( 378 ibp, hdr, 379 lnh == QIB_LRH_GRH, 380 qp, 381 be32_to_cpu(ohdr->bth[0])); 382 if (ruc_res) 383 goto unlock; 384 385 /* Only deal with RDMA Writes for now */ 386 if (opcode < 387 IB_OPCODE_RC_RDMA_READ_RESPONSE_FIRST) { 388 diff = qib_cmp24(psn, qp->r_psn); 389 if (!qp->r_nak_state && diff >= 0) { 390 ibp->rvp.n_rc_seqnak++; 391 qp->r_nak_state = 392 IB_NAK_PSN_ERROR; 393 /* Use the expected PSN. */ 394 qp->r_ack_psn = qp->r_psn; 395 /* 396 * Wait to send the sequence 397 * NAK until all packets 398 * in the receive queue have 399 * been processed. 400 * Otherwise, we end up 401 * propagating congestion. 402 */ 403 if (list_empty(&qp->rspwait)) { 404 qp->r_flags |= 405 RVT_R_RSP_NAK; 406 rvt_get_qp(qp); 407 list_add_tail( 408 &qp->rspwait, 409 &rcd->qp_wait_list); 410 } 411 } /* Out of sequence NAK */ 412 } /* QP Request NAKs */ 413 break; 414 case IB_QPT_SMI: 415 case IB_QPT_GSI: 416 case IB_QPT_UD: 417 case IB_QPT_UC: 418 default: 419 /* For now don't handle any other QP types */ 420 break; 421 } 422 423 unlock: 424 spin_unlock(&qp->r_lock); 425 rcu_read_unlock(); 426 } /* Unicast QP */ 427 } /* Valid packet with TIDErr */ 428 429 drop: 430 return ret; 431 } 432 433 /* 434 * qib_kreceive - receive a packet 435 * @rcd: the qlogic_ib context 436 * @llic: gets count of good packets needed to clear lli, 437 * (used with chips that need need to track crcs for lli) 438 * 439 * called from interrupt handler for errors or receive interrupt 440 * Returns number of CRC error packets, needed by some chips for 441 * local link integrity tracking. crcs are adjusted down by following 442 * good packets, if any, and count of good packets is also tracked. 443 */ 444 u32 qib_kreceive(struct qib_ctxtdata *rcd, u32 *llic, u32 *npkts) 445 { 446 struct qib_devdata *dd = rcd->dd; 447 struct qib_pportdata *ppd = rcd->ppd; 448 __le32 *rhf_addr; 449 void *ebuf; 450 const u32 rsize = dd->rcvhdrentsize; /* words */ 451 const u32 maxcnt = dd->rcvhdrcnt * rsize; /* words */ 452 u32 etail = -1, l, hdrqtail; 453 struct qib_message_header *hdr; 454 u32 eflags, etype, tlen, i = 0, updegr = 0, crcs = 0; 455 int last; 456 u64 lval; 457 struct rvt_qp *qp, *nqp; 458 459 l = rcd->head; 460 rhf_addr = (__le32 *) rcd->rcvhdrq + l + dd->rhf_offset; 461 if (dd->flags & QIB_NODMA_RTAIL) { 462 u32 seq = qib_hdrget_seq(rhf_addr); 463 464 if (seq != rcd->seq_cnt) 465 goto bail; 466 hdrqtail = 0; 467 } else { 468 hdrqtail = qib_get_rcvhdrtail(rcd); 469 if (l == hdrqtail) 470 goto bail; 471 smp_rmb(); /* prevent speculative reads of dma'ed hdrq */ 472 } 473 474 for (last = 0, i = 1; !last; i += !last) { 475 hdr = dd->f_get_msgheader(dd, rhf_addr); 476 eflags = qib_hdrget_err_flags(rhf_addr); 477 etype = qib_hdrget_rcv_type(rhf_addr); 478 /* total length */ 479 tlen = qib_hdrget_length_in_bytes(rhf_addr); 480 ebuf = NULL; 481 if ((dd->flags & QIB_NODMA_RTAIL) ? 482 qib_hdrget_use_egr_buf(rhf_addr) : 483 (etype != RCVHQ_RCV_TYPE_EXPECTED)) { 484 etail = qib_hdrget_index(rhf_addr); 485 updegr = 1; 486 if (tlen > sizeof(*hdr) || 487 etype >= RCVHQ_RCV_TYPE_NON_KD) { 488 ebuf = qib_get_egrbuf(rcd, etail); 489 prefetch_range(ebuf, tlen - sizeof(*hdr)); 490 } 491 } 492 if (!eflags) { 493 u16 lrh_len = be16_to_cpu(hdr->lrh[2]) << 2; 494 495 if (lrh_len != tlen) { 496 qib_stats.sps_lenerrs++; 497 goto move_along; 498 } 499 } 500 if (etype == RCVHQ_RCV_TYPE_NON_KD && !eflags && 501 ebuf == NULL && 502 tlen > (dd->rcvhdrentsize - 2 + 1 - 503 qib_hdrget_offset(rhf_addr)) << 2) { 504 goto move_along; 505 } 506 507 /* 508 * Both tiderr and qibhdrerr are set for all plain IB 509 * packets; only qibhdrerr should be set. 510 */ 511 if (unlikely(eflags)) 512 crcs += qib_rcv_hdrerr(rcd, ppd, rcd->ctxt, eflags, l, 513 etail, rhf_addr, hdr); 514 else if (etype == RCVHQ_RCV_TYPE_NON_KD) { 515 qib_ib_rcv(rcd, hdr, ebuf, tlen); 516 if (crcs) 517 crcs--; 518 else if (llic && *llic) 519 --*llic; 520 } 521 move_along: 522 l += rsize; 523 if (l >= maxcnt) 524 l = 0; 525 if (i == QIB_MAX_PKT_RECV) 526 last = 1; 527 528 rhf_addr = (__le32 *) rcd->rcvhdrq + l + dd->rhf_offset; 529 if (dd->flags & QIB_NODMA_RTAIL) { 530 u32 seq = qib_hdrget_seq(rhf_addr); 531 532 if (++rcd->seq_cnt > 13) 533 rcd->seq_cnt = 1; 534 if (seq != rcd->seq_cnt) 535 last = 1; 536 } else if (l == hdrqtail) 537 last = 1; 538 /* 539 * Update head regs etc., every 16 packets, if not last pkt, 540 * to help prevent rcvhdrq overflows, when many packets 541 * are processed and queue is nearly full. 542 * Don't request an interrupt for intermediate updates. 543 */ 544 lval = l; 545 if (!last && !(i & 0xf)) { 546 dd->f_update_usrhead(rcd, lval, updegr, etail, i); 547 updegr = 0; 548 } 549 } 550 551 rcd->head = l; 552 553 /* 554 * Iterate over all QPs waiting to respond. 555 * The list won't change since the IRQ is only run on one CPU. 556 */ 557 list_for_each_entry_safe(qp, nqp, &rcd->qp_wait_list, rspwait) { 558 list_del_init(&qp->rspwait); 559 if (qp->r_flags & RVT_R_RSP_NAK) { 560 qp->r_flags &= ~RVT_R_RSP_NAK; 561 qib_send_rc_ack(qp); 562 } 563 if (qp->r_flags & RVT_R_RSP_SEND) { 564 unsigned long flags; 565 566 qp->r_flags &= ~RVT_R_RSP_SEND; 567 spin_lock_irqsave(&qp->s_lock, flags); 568 if (ib_rvt_state_ops[qp->state] & 569 RVT_PROCESS_OR_FLUSH_SEND) 570 qib_schedule_send(qp); 571 spin_unlock_irqrestore(&qp->s_lock, flags); 572 } 573 rvt_put_qp(qp); 574 } 575 576 bail: 577 /* Report number of packets consumed */ 578 if (npkts) 579 *npkts = i; 580 581 /* 582 * Always write head at end, and setup rcv interrupt, even 583 * if no packets were processed. 584 */ 585 lval = (u64)rcd->head | dd->rhdrhead_intr_off; 586 dd->f_update_usrhead(rcd, lval, updegr, etail, i); 587 return crcs; 588 } 589 590 /** 591 * qib_set_mtu - set the MTU 592 * @ppd: the perport data 593 * @arg: the new MTU 594 * 595 * We can handle "any" incoming size, the issue here is whether we 596 * need to restrict our outgoing size. For now, we don't do any 597 * sanity checking on this, and we don't deal with what happens to 598 * programs that are already running when the size changes. 599 * NOTE: changing the MTU will usually cause the IBC to go back to 600 * link INIT state... 601 */ 602 int qib_set_mtu(struct qib_pportdata *ppd, u16 arg) 603 { 604 u32 piosize; 605 int ret, chk; 606 607 if (arg != 256 && arg != 512 && arg != 1024 && arg != 2048 && 608 arg != 4096) { 609 ret = -EINVAL; 610 goto bail; 611 } 612 chk = ib_mtu_enum_to_int(qib_ibmtu); 613 if (chk > 0 && arg > chk) { 614 ret = -EINVAL; 615 goto bail; 616 } 617 618 piosize = ppd->ibmaxlen; 619 ppd->ibmtu = arg; 620 621 if (arg >= (piosize - QIB_PIO_MAXIBHDR)) { 622 /* Only if it's not the initial value (or reset to it) */ 623 if (piosize != ppd->init_ibmaxlen) { 624 if (arg > piosize && arg <= ppd->init_ibmaxlen) 625 piosize = ppd->init_ibmaxlen - 2 * sizeof(u32); 626 ppd->ibmaxlen = piosize; 627 } 628 } else if ((arg + QIB_PIO_MAXIBHDR) != ppd->ibmaxlen) { 629 piosize = arg + QIB_PIO_MAXIBHDR - 2 * sizeof(u32); 630 ppd->ibmaxlen = piosize; 631 } 632 633 ppd->dd->f_set_ib_cfg(ppd, QIB_IB_CFG_MTU, 0); 634 635 ret = 0; 636 637 bail: 638 return ret; 639 } 640 641 int qib_set_lid(struct qib_pportdata *ppd, u32 lid, u8 lmc) 642 { 643 struct qib_devdata *dd = ppd->dd; 644 645 ppd->lid = lid; 646 ppd->lmc = lmc; 647 648 dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LIDLMC, 649 lid | (~((1U << lmc) - 1)) << 16); 650 651 qib_devinfo(dd->pcidev, "IB%u:%u got a lid: 0x%x\n", 652 dd->unit, ppd->port, lid); 653 654 return 0; 655 } 656 657 /* 658 * Following deal with the "obviously simple" task of overriding the state 659 * of the LEDS, which normally indicate link physical and logical status. 660 * The complications arise in dealing with different hardware mappings 661 * and the board-dependent routine being called from interrupts. 662 * and then there's the requirement to _flash_ them. 663 */ 664 #define LED_OVER_FREQ_SHIFT 8 665 #define LED_OVER_FREQ_MASK (0xFF<<LED_OVER_FREQ_SHIFT) 666 /* Below is "non-zero" to force override, but both actual LEDs are off */ 667 #define LED_OVER_BOTH_OFF (8) 668 669 static void qib_run_led_override(struct timer_list *t) 670 { 671 struct qib_pportdata *ppd = from_timer(ppd, t, 672 led_override_timer); 673 struct qib_devdata *dd = ppd->dd; 674 int timeoff; 675 int ph_idx; 676 677 if (!(dd->flags & QIB_INITTED)) 678 return; 679 680 ph_idx = ppd->led_override_phase++ & 1; 681 ppd->led_override = ppd->led_override_vals[ph_idx]; 682 timeoff = ppd->led_override_timeoff; 683 684 dd->f_setextled(ppd, 1); 685 /* 686 * don't re-fire the timer if user asked for it to be off; we let 687 * it fire one more time after they turn it off to simplify 688 */ 689 if (ppd->led_override_vals[0] || ppd->led_override_vals[1]) 690 mod_timer(&ppd->led_override_timer, jiffies + timeoff); 691 } 692 693 void qib_set_led_override(struct qib_pportdata *ppd, unsigned int val) 694 { 695 struct qib_devdata *dd = ppd->dd; 696 int timeoff, freq; 697 698 if (!(dd->flags & QIB_INITTED)) 699 return; 700 701 /* First check if we are blinking. If not, use 1HZ polling */ 702 timeoff = HZ; 703 freq = (val & LED_OVER_FREQ_MASK) >> LED_OVER_FREQ_SHIFT; 704 705 if (freq) { 706 /* For blink, set each phase from one nybble of val */ 707 ppd->led_override_vals[0] = val & 0xF; 708 ppd->led_override_vals[1] = (val >> 4) & 0xF; 709 timeoff = (HZ << 4)/freq; 710 } else { 711 /* Non-blink set both phases the same. */ 712 ppd->led_override_vals[0] = val & 0xF; 713 ppd->led_override_vals[1] = val & 0xF; 714 } 715 ppd->led_override_timeoff = timeoff; 716 717 /* 718 * If the timer has not already been started, do so. Use a "quick" 719 * timeout so the function will be called soon, to look at our request. 720 */ 721 if (atomic_inc_return(&ppd->led_override_timer_active) == 1) { 722 /* Need to start timer */ 723 timer_setup(&ppd->led_override_timer, qib_run_led_override, 0); 724 ppd->led_override_timer.expires = jiffies + 1; 725 add_timer(&ppd->led_override_timer); 726 } else { 727 if (ppd->led_override_vals[0] || ppd->led_override_vals[1]) 728 mod_timer(&ppd->led_override_timer, jiffies + 1); 729 atomic_dec(&ppd->led_override_timer_active); 730 } 731 } 732 733 /** 734 * qib_reset_device - reset the chip if possible 735 * @unit: the device to reset 736 * 737 * Whether or not reset is successful, we attempt to re-initialize the chip 738 * (that is, much like a driver unload/reload). We clear the INITTED flag 739 * so that the various entry points will fail until we reinitialize. For 740 * now, we only allow this if no user contexts are open that use chip resources 741 */ 742 int qib_reset_device(int unit) 743 { 744 int ret, i; 745 struct qib_devdata *dd = qib_lookup(unit); 746 struct qib_pportdata *ppd; 747 unsigned long flags; 748 int pidx; 749 750 if (!dd) { 751 ret = -ENODEV; 752 goto bail; 753 } 754 755 qib_devinfo(dd->pcidev, "Reset on unit %u requested\n", unit); 756 757 if (!dd->kregbase || !(dd->flags & QIB_PRESENT)) { 758 qib_devinfo(dd->pcidev, 759 "Invalid unit number %u or not initialized or not present\n", 760 unit); 761 ret = -ENXIO; 762 goto bail; 763 } 764 765 spin_lock_irqsave(&dd->uctxt_lock, flags); 766 if (dd->rcd) 767 for (i = dd->first_user_ctxt; i < dd->cfgctxts; i++) { 768 if (!dd->rcd[i] || !dd->rcd[i]->cnt) 769 continue; 770 spin_unlock_irqrestore(&dd->uctxt_lock, flags); 771 ret = -EBUSY; 772 goto bail; 773 } 774 spin_unlock_irqrestore(&dd->uctxt_lock, flags); 775 776 for (pidx = 0; pidx < dd->num_pports; ++pidx) { 777 ppd = dd->pport + pidx; 778 if (atomic_read(&ppd->led_override_timer_active)) { 779 /* Need to stop LED timer, _then_ shut off LEDs */ 780 del_timer_sync(&ppd->led_override_timer); 781 atomic_set(&ppd->led_override_timer_active, 0); 782 } 783 784 /* Shut off LEDs after we are sure timer is not running */ 785 ppd->led_override = LED_OVER_BOTH_OFF; 786 dd->f_setextled(ppd, 0); 787 if (dd->flags & QIB_HAS_SEND_DMA) 788 qib_teardown_sdma(ppd); 789 } 790 791 ret = dd->f_reset(dd); 792 if (ret == 1) 793 ret = qib_init(dd, 1); 794 else 795 ret = -EAGAIN; 796 if (ret) 797 qib_dev_err(dd, 798 "Reinitialize unit %u after reset failed with %d\n", 799 unit, ret); 800 else 801 qib_devinfo(dd->pcidev, 802 "Reinitialized unit %u after resetting\n", 803 unit); 804 805 bail: 806 return ret; 807 } 808