199d195ccSKalderon, Michal /* QLogic qedr NIC Driver
299d195ccSKalderon, Michal * Copyright (c) 2015-2016 QLogic Corporation
399d195ccSKalderon, Michal *
499d195ccSKalderon, Michal * This software is available to you under a choice of one of two
599d195ccSKalderon, Michal * licenses. You may choose to be licensed under the terms of the GNU
699d195ccSKalderon, Michal * General Public License (GPL) Version 2, available from the file
799d195ccSKalderon, Michal * COPYING in the main directory of this source tree, or the
899d195ccSKalderon, Michal * OpenIB.org BSD license below:
999d195ccSKalderon, Michal *
1099d195ccSKalderon, Michal * Redistribution and use in source and binary forms, with or
1199d195ccSKalderon, Michal * without modification, are permitted provided that the following
1299d195ccSKalderon, Michal * conditions are met:
1399d195ccSKalderon, Michal *
1499d195ccSKalderon, Michal * - Redistributions of source code must retain the above
1599d195ccSKalderon, Michal * copyright notice, this list of conditions and the following
1699d195ccSKalderon, Michal * disclaimer.
1799d195ccSKalderon, Michal *
1899d195ccSKalderon, Michal * - Redistributions in binary form must reproduce the above
1999d195ccSKalderon, Michal * copyright notice, this list of conditions and the following
2099d195ccSKalderon, Michal * disclaimer in the documentation and /or other materials
2199d195ccSKalderon, Michal * provided with the distribution.
2299d195ccSKalderon, Michal *
2399d195ccSKalderon, Michal * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
2499d195ccSKalderon, Michal * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
2599d195ccSKalderon, Michal * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
2699d195ccSKalderon, Michal * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
2799d195ccSKalderon, Michal * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
2899d195ccSKalderon, Michal * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
2999d195ccSKalderon, Michal * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
3099d195ccSKalderon, Michal * SOFTWARE.
3199d195ccSKalderon, Michal */
3299d195ccSKalderon, Michal #include <linux/dma-mapping.h>
3399d195ccSKalderon, Michal #include <linux/crc32.h>
3499d195ccSKalderon, Michal #include <linux/iommu.h>
3599d195ccSKalderon, Michal #include <net/ip.h>
3699d195ccSKalderon, Michal #include <net/ipv6.h>
3799d195ccSKalderon, Michal #include <net/udp.h>
3899d195ccSKalderon, Michal
3999d195ccSKalderon, Michal #include <rdma/ib_verbs.h>
4099d195ccSKalderon, Michal #include <rdma/ib_user_verbs.h>
4199d195ccSKalderon, Michal #include <rdma/iw_cm.h>
4299d195ccSKalderon, Michal #include <rdma/ib_umem.h>
4399d195ccSKalderon, Michal #include <rdma/ib_addr.h>
4499d195ccSKalderon, Michal #include <rdma/ib_cache.h>
4599d195ccSKalderon, Michal
4699d195ccSKalderon, Michal #include <linux/qed/qed_if.h>
4799d195ccSKalderon, Michal #include <linux/qed/qed_rdma_if.h>
4899d195ccSKalderon, Michal #include "qedr.h"
4999d195ccSKalderon, Michal #include "verbs.h"
5099d195ccSKalderon, Michal #include <rdma/qedr-abi.h>
5199d195ccSKalderon, Michal #include "qedr_roce_cm.h"
5299d195ccSKalderon, Michal
qedr_inc_sw_gsi_cons(struct qedr_qp_hwq_info * info)5399d195ccSKalderon, Michal void qedr_inc_sw_gsi_cons(struct qedr_qp_hwq_info *info)
5499d195ccSKalderon, Michal {
5599d195ccSKalderon, Michal info->gsi_cons = (info->gsi_cons + 1) % info->max_wr;
5699d195ccSKalderon, Michal }
5799d195ccSKalderon, Michal
qedr_store_gsi_qp_cq(struct qedr_dev * dev,struct qedr_qp * qp,struct ib_qp_init_attr * attrs)5899d195ccSKalderon, Michal void qedr_store_gsi_qp_cq(struct qedr_dev *dev, struct qedr_qp *qp,
5999d195ccSKalderon, Michal struct ib_qp_init_attr *attrs)
6099d195ccSKalderon, Michal {
6199d195ccSKalderon, Michal dev->gsi_qp_created = 1;
6299d195ccSKalderon, Michal dev->gsi_sqcq = get_qedr_cq(attrs->send_cq);
6399d195ccSKalderon, Michal dev->gsi_rqcq = get_qedr_cq(attrs->recv_cq);
6499d195ccSKalderon, Michal dev->gsi_qp = qp;
6599d195ccSKalderon, Michal }
6699d195ccSKalderon, Michal
qedr_ll2_complete_tx_packet(void * cxt,u8 connection_handle,void * cookie,dma_addr_t first_frag_addr,bool b_last_fragment,bool b_last_packet)670089985eSBart Van Assche static void qedr_ll2_complete_tx_packet(void *cxt, u8 connection_handle,
6899d195ccSKalderon, Michal void *cookie,
6999d195ccSKalderon, Michal dma_addr_t first_frag_addr,
700089985eSBart Van Assche bool b_last_fragment,
710089985eSBart Van Assche bool b_last_packet)
7299d195ccSKalderon, Michal {
7399d195ccSKalderon, Michal struct qedr_dev *dev = (struct qedr_dev *)cxt;
7499d195ccSKalderon, Michal struct qed_roce_ll2_packet *pkt = cookie;
7599d195ccSKalderon, Michal struct qedr_cq *cq = dev->gsi_sqcq;
7699d195ccSKalderon, Michal struct qedr_qp *qp = dev->gsi_qp;
7799d195ccSKalderon, Michal unsigned long flags;
7899d195ccSKalderon, Michal
7999d195ccSKalderon, Michal DP_DEBUG(dev, QEDR_MSG_GSI,
8099d195ccSKalderon, Michal "LL2 TX CB: gsi_sqcq=%p, gsi_rqcq=%p, gsi_cons=%d, ibcq_comp=%s\n",
8199d195ccSKalderon, Michal dev->gsi_sqcq, dev->gsi_rqcq, qp->sq.gsi_cons,
8299d195ccSKalderon, Michal cq->ibcq.comp_handler ? "Yes" : "No");
8399d195ccSKalderon, Michal
8499d195ccSKalderon, Michal dma_free_coherent(&dev->pdev->dev, pkt->header.len, pkt->header.vaddr,
8599d195ccSKalderon, Michal pkt->header.baddr);
8699d195ccSKalderon, Michal kfree(pkt);
8799d195ccSKalderon, Michal
8899d195ccSKalderon, Michal spin_lock_irqsave(&qp->q_lock, flags);
8999d195ccSKalderon, Michal qedr_inc_sw_gsi_cons(&qp->sq);
9099d195ccSKalderon, Michal spin_unlock_irqrestore(&qp->q_lock, flags);
9199d195ccSKalderon, Michal
9299d195ccSKalderon, Michal if (cq->ibcq.comp_handler)
9399d195ccSKalderon, Michal (*cq->ibcq.comp_handler) (&cq->ibcq, cq->ibcq.cq_context);
9499d195ccSKalderon, Michal }
9599d195ccSKalderon, Michal
qedr_ll2_complete_rx_packet(void * cxt,struct qed_ll2_comp_rx_data * data)960089985eSBart Van Assche static void qedr_ll2_complete_rx_packet(void *cxt,
9799d195ccSKalderon, Michal struct qed_ll2_comp_rx_data *data)
9899d195ccSKalderon, Michal {
9999d195ccSKalderon, Michal struct qedr_dev *dev = (struct qedr_dev *)cxt;
10099d195ccSKalderon, Michal struct qedr_cq *cq = dev->gsi_rqcq;
10199d195ccSKalderon, Michal struct qedr_qp *qp = dev->gsi_qp;
10299d195ccSKalderon, Michal unsigned long flags;
10399d195ccSKalderon, Michal
10499d195ccSKalderon, Michal spin_lock_irqsave(&qp->q_lock, flags);
10599d195ccSKalderon, Michal
10699d195ccSKalderon, Michal qp->rqe_wr_id[qp->rq.gsi_cons].rc = data->u.data_length_error ?
10799d195ccSKalderon, Michal -EINVAL : 0;
108754137a7SDoug Ledford qp->rqe_wr_id[qp->rq.gsi_cons].vlan = data->vlan;
10999d195ccSKalderon, Michal /* note: length stands for data length i.e. GRH is excluded */
11099d195ccSKalderon, Michal qp->rqe_wr_id[qp->rq.gsi_cons].sg_list[0].length =
11199d195ccSKalderon, Michal data->length.data_length;
11299d195ccSKalderon, Michal *((u32 *)&qp->rqe_wr_id[qp->rq.gsi_cons].smac[0]) =
11399d195ccSKalderon, Michal ntohl(data->opaque_data_0);
11499d195ccSKalderon, Michal *((u16 *)&qp->rqe_wr_id[qp->rq.gsi_cons].smac[4]) =
11599d195ccSKalderon, Michal ntohs((u16)data->opaque_data_1);
11699d195ccSKalderon, Michal
11799d195ccSKalderon, Michal qedr_inc_sw_gsi_cons(&qp->rq);
11899d195ccSKalderon, Michal
11999d195ccSKalderon, Michal spin_unlock_irqrestore(&qp->q_lock, flags);
12099d195ccSKalderon, Michal
12199d195ccSKalderon, Michal if (cq->ibcq.comp_handler)
12299d195ccSKalderon, Michal (*cq->ibcq.comp_handler) (&cq->ibcq, cq->ibcq.cq_context);
12399d195ccSKalderon, Michal }
12499d195ccSKalderon, Michal
qedr_ll2_release_rx_packet(void * cxt,u8 connection_handle,void * cookie,dma_addr_t rx_buf_addr,bool b_last_packet)1250089985eSBart Van Assche static void qedr_ll2_release_rx_packet(void *cxt, u8 connection_handle,
1260089985eSBart Van Assche void *cookie, dma_addr_t rx_buf_addr,
1270089985eSBart Van Assche bool b_last_packet)
12899d195ccSKalderon, Michal {
12999d195ccSKalderon, Michal /* Do nothing... */
13099d195ccSKalderon, Michal }
13199d195ccSKalderon, Michal
qedr_destroy_gsi_cq(struct qedr_dev * dev,struct ib_qp_init_attr * attrs)13299d195ccSKalderon, Michal static void qedr_destroy_gsi_cq(struct qedr_dev *dev,
13399d195ccSKalderon, Michal struct ib_qp_init_attr *attrs)
13499d195ccSKalderon, Michal {
13599d195ccSKalderon, Michal struct qed_rdma_destroy_cq_in_params iparams;
13699d195ccSKalderon, Michal struct qed_rdma_destroy_cq_out_params oparams;
13799d195ccSKalderon, Michal struct qedr_cq *cq;
13899d195ccSKalderon, Michal
13999d195ccSKalderon, Michal cq = get_qedr_cq(attrs->send_cq);
14099d195ccSKalderon, Michal iparams.icid = cq->icid;
14199d195ccSKalderon, Michal dev->ops->rdma_destroy_cq(dev->rdma_ctx, &iparams, &oparams);
14299d195ccSKalderon, Michal dev->ops->common->chain_free(dev->cdev, &cq->pbl);
14399d195ccSKalderon, Michal
14499d195ccSKalderon, Michal cq = get_qedr_cq(attrs->recv_cq);
14599d195ccSKalderon, Michal /* if a dedicated recv_cq was used, delete it too */
14699d195ccSKalderon, Michal if (iparams.icid != cq->icid) {
14799d195ccSKalderon, Michal iparams.icid = cq->icid;
14899d195ccSKalderon, Michal dev->ops->rdma_destroy_cq(dev->rdma_ctx, &iparams, &oparams);
14999d195ccSKalderon, Michal dev->ops->common->chain_free(dev->cdev, &cq->pbl);
15099d195ccSKalderon, Michal }
15199d195ccSKalderon, Michal }
15299d195ccSKalderon, Michal
qedr_check_gsi_qp_attrs(struct qedr_dev * dev,struct ib_qp_init_attr * attrs)15399d195ccSKalderon, Michal static inline int qedr_check_gsi_qp_attrs(struct qedr_dev *dev,
15499d195ccSKalderon, Michal struct ib_qp_init_attr *attrs)
15599d195ccSKalderon, Michal {
15699d195ccSKalderon, Michal if (attrs->cap.max_recv_sge > QEDR_GSI_MAX_RECV_SGE) {
15799d195ccSKalderon, Michal DP_ERR(dev,
15899d195ccSKalderon, Michal " create gsi qp: failed. max_recv_sge is larger the max %d>%d\n",
15999d195ccSKalderon, Michal attrs->cap.max_recv_sge, QEDR_GSI_MAX_RECV_SGE);
16099d195ccSKalderon, Michal return -EINVAL;
16199d195ccSKalderon, Michal }
16299d195ccSKalderon, Michal
16399d195ccSKalderon, Michal if (attrs->cap.max_recv_wr > QEDR_GSI_MAX_RECV_WR) {
16499d195ccSKalderon, Michal DP_ERR(dev,
16599d195ccSKalderon, Michal " create gsi qp: failed. max_recv_wr is too large %d>%d\n",
16699d195ccSKalderon, Michal attrs->cap.max_recv_wr, QEDR_GSI_MAX_RECV_WR);
16799d195ccSKalderon, Michal return -EINVAL;
16899d195ccSKalderon, Michal }
16999d195ccSKalderon, Michal
17099d195ccSKalderon, Michal if (attrs->cap.max_send_wr > QEDR_GSI_MAX_SEND_WR) {
17199d195ccSKalderon, Michal DP_ERR(dev,
17299d195ccSKalderon, Michal " create gsi qp: failed. max_send_wr is too large %d>%d\n",
17399d195ccSKalderon, Michal attrs->cap.max_send_wr, QEDR_GSI_MAX_SEND_WR);
17499d195ccSKalderon, Michal return -EINVAL;
17599d195ccSKalderon, Michal }
17699d195ccSKalderon, Michal
17799d195ccSKalderon, Michal return 0;
17899d195ccSKalderon, Michal }
17999d195ccSKalderon, Michal
qedr_ll2_post_tx(struct qedr_dev * dev,struct qed_roce_ll2_packet * pkt)18099d195ccSKalderon, Michal static int qedr_ll2_post_tx(struct qedr_dev *dev,
18199d195ccSKalderon, Michal struct qed_roce_ll2_packet *pkt)
18299d195ccSKalderon, Michal {
18399d195ccSKalderon, Michal enum qed_ll2_roce_flavor_type roce_flavor;
18499d195ccSKalderon, Michal struct qed_ll2_tx_pkt_info ll2_tx_pkt;
18599d195ccSKalderon, Michal int rc;
18699d195ccSKalderon, Michal int i;
18799d195ccSKalderon, Michal
18899d195ccSKalderon, Michal memset(&ll2_tx_pkt, 0, sizeof(ll2_tx_pkt));
18999d195ccSKalderon, Michal
19099d195ccSKalderon, Michal roce_flavor = (pkt->roce_mode == ROCE_V1) ?
19199d195ccSKalderon, Michal QED_LL2_ROCE : QED_LL2_RROCE;
19299d195ccSKalderon, Michal
19399d195ccSKalderon, Michal if (pkt->roce_mode == ROCE_V2_IPV4)
19499d195ccSKalderon, Michal ll2_tx_pkt.enable_ip_cksum = 1;
19599d195ccSKalderon, Michal
19699d195ccSKalderon, Michal ll2_tx_pkt.num_of_bds = 1 /* hdr */ + pkt->n_seg;
19799d195ccSKalderon, Michal ll2_tx_pkt.vlan = 0;
19899d195ccSKalderon, Michal ll2_tx_pkt.tx_dest = pkt->tx_dest;
19999d195ccSKalderon, Michal ll2_tx_pkt.qed_roce_flavor = roce_flavor;
20099d195ccSKalderon, Michal ll2_tx_pkt.first_frag = pkt->header.baddr;
20199d195ccSKalderon, Michal ll2_tx_pkt.first_frag_len = pkt->header.len;
20299d195ccSKalderon, Michal ll2_tx_pkt.cookie = pkt;
20399d195ccSKalderon, Michal
20499d195ccSKalderon, Michal /* tx header */
20599d195ccSKalderon, Michal rc = dev->ops->ll2_prepare_tx_packet(dev->rdma_ctx,
20699d195ccSKalderon, Michal dev->gsi_ll2_handle,
20799d195ccSKalderon, Michal &ll2_tx_pkt, 1);
20899d195ccSKalderon, Michal if (rc) {
20999d195ccSKalderon, Michal /* TX failed while posting header - release resources */
21099d195ccSKalderon, Michal dma_free_coherent(&dev->pdev->dev, pkt->header.len,
21199d195ccSKalderon, Michal pkt->header.vaddr, pkt->header.baddr);
21299d195ccSKalderon, Michal kfree(pkt);
21399d195ccSKalderon, Michal
21499d195ccSKalderon, Michal DP_ERR(dev, "roce ll2 tx: header failed (rc=%d)\n", rc);
21599d195ccSKalderon, Michal return rc;
21699d195ccSKalderon, Michal }
21799d195ccSKalderon, Michal
21899d195ccSKalderon, Michal /* tx payload */
21999d195ccSKalderon, Michal for (i = 0; i < pkt->n_seg; i++) {
22099d195ccSKalderon, Michal rc = dev->ops->ll2_set_fragment_of_tx_packet(
22199d195ccSKalderon, Michal dev->rdma_ctx,
22299d195ccSKalderon, Michal dev->gsi_ll2_handle,
22399d195ccSKalderon, Michal pkt->payload[i].baddr,
22499d195ccSKalderon, Michal pkt->payload[i].len);
22599d195ccSKalderon, Michal
22699d195ccSKalderon, Michal if (rc) {
22799d195ccSKalderon, Michal /* if failed not much to do here, partial packet has
22899d195ccSKalderon, Michal * been posted we can't free memory, will need to wait
22999d195ccSKalderon, Michal * for completion
23099d195ccSKalderon, Michal */
23199d195ccSKalderon, Michal DP_ERR(dev, "ll2 tx: payload failed (rc=%d)\n", rc);
23299d195ccSKalderon, Michal return rc;
23399d195ccSKalderon, Michal }
23499d195ccSKalderon, Michal }
23599d195ccSKalderon, Michal
23699d195ccSKalderon, Michal return 0;
23799d195ccSKalderon, Michal }
23899d195ccSKalderon, Michal
qedr_ll2_stop(struct qedr_dev * dev)2390089985eSBart Van Assche static int qedr_ll2_stop(struct qedr_dev *dev)
24099d195ccSKalderon, Michal {
24199d195ccSKalderon, Michal int rc;
24299d195ccSKalderon, Michal
24399d195ccSKalderon, Michal if (dev->gsi_ll2_handle == QED_LL2_UNUSED_HANDLE)
24499d195ccSKalderon, Michal return 0;
24599d195ccSKalderon, Michal
24699d195ccSKalderon, Michal /* remove LL2 MAC address filter */
24799d195ccSKalderon, Michal rc = dev->ops->ll2_set_mac_filter(dev->cdev,
24899d195ccSKalderon, Michal dev->gsi_ll2_mac_address, NULL);
24999d195ccSKalderon, Michal
25099d195ccSKalderon, Michal rc = dev->ops->ll2_terminate_connection(dev->rdma_ctx,
25199d195ccSKalderon, Michal dev->gsi_ll2_handle);
25299d195ccSKalderon, Michal if (rc)
25399d195ccSKalderon, Michal DP_ERR(dev, "Failed to terminate LL2 connection (rc=%d)\n", rc);
25499d195ccSKalderon, Michal
25599d195ccSKalderon, Michal dev->ops->ll2_release_connection(dev->rdma_ctx, dev->gsi_ll2_handle);
25699d195ccSKalderon, Michal
25799d195ccSKalderon, Michal dev->gsi_ll2_handle = QED_LL2_UNUSED_HANDLE;
25899d195ccSKalderon, Michal
25999d195ccSKalderon, Michal return rc;
26099d195ccSKalderon, Michal }
26199d195ccSKalderon, Michal
qedr_ll2_start(struct qedr_dev * dev,struct ib_qp_init_attr * attrs,struct qedr_qp * qp)2620089985eSBart Van Assche static int qedr_ll2_start(struct qedr_dev *dev,
26399d195ccSKalderon, Michal struct ib_qp_init_attr *attrs, struct qedr_qp *qp)
26499d195ccSKalderon, Michal {
26599d195ccSKalderon, Michal struct qed_ll2_acquire_data data;
26699d195ccSKalderon, Michal struct qed_ll2_cbs cbs;
26799d195ccSKalderon, Michal int rc;
26899d195ccSKalderon, Michal
26999d195ccSKalderon, Michal /* configure and start LL2 */
27099d195ccSKalderon, Michal cbs.rx_comp_cb = qedr_ll2_complete_rx_packet;
27199d195ccSKalderon, Michal cbs.tx_comp_cb = qedr_ll2_complete_tx_packet;
27299d195ccSKalderon, Michal cbs.rx_release_cb = qedr_ll2_release_rx_packet;
27399d195ccSKalderon, Michal cbs.tx_release_cb = qedr_ll2_complete_tx_packet;
27499d195ccSKalderon, Michal cbs.cookie = dev;
27599d195ccSKalderon, Michal
27699d195ccSKalderon, Michal memset(&data, 0, sizeof(data));
27799d195ccSKalderon, Michal data.input.conn_type = QED_LL2_TYPE_ROCE;
27899d195ccSKalderon, Michal data.input.mtu = dev->ndev->mtu;
27999d195ccSKalderon, Michal data.input.rx_num_desc = attrs->cap.max_recv_wr;
28099d195ccSKalderon, Michal data.input.rx_drop_ttl0_flg = true;
28199d195ccSKalderon, Michal data.input.rx_vlan_removal_en = false;
28299d195ccSKalderon, Michal data.input.tx_num_desc = attrs->cap.max_send_wr;
28399d195ccSKalderon, Michal data.input.tx_tc = 0;
28499d195ccSKalderon, Michal data.input.tx_dest = QED_LL2_TX_DEST_NW;
28599d195ccSKalderon, Michal data.input.ai_err_packet_too_big = QED_LL2_DROP_PACKET;
28699d195ccSKalderon, Michal data.input.ai_err_no_buf = QED_LL2_DROP_PACKET;
28799d195ccSKalderon, Michal data.input.gsi_enable = 1;
28899d195ccSKalderon, Michal data.p_connection_handle = &dev->gsi_ll2_handle;
28999d195ccSKalderon, Michal data.cbs = &cbs;
29099d195ccSKalderon, Michal
29199d195ccSKalderon, Michal rc = dev->ops->ll2_acquire_connection(dev->rdma_ctx, &data);
29299d195ccSKalderon, Michal if (rc) {
29399d195ccSKalderon, Michal DP_ERR(dev,
29499d195ccSKalderon, Michal "ll2 start: failed to acquire LL2 connection (rc=%d)\n",
29599d195ccSKalderon, Michal rc);
29699d195ccSKalderon, Michal return rc;
29799d195ccSKalderon, Michal }
29899d195ccSKalderon, Michal
29999d195ccSKalderon, Michal rc = dev->ops->ll2_establish_connection(dev->rdma_ctx,
30099d195ccSKalderon, Michal dev->gsi_ll2_handle);
30199d195ccSKalderon, Michal if (rc) {
30299d195ccSKalderon, Michal DP_ERR(dev,
30399d195ccSKalderon, Michal "ll2 start: failed to establish LL2 connection (rc=%d)\n",
30499d195ccSKalderon, Michal rc);
30599d195ccSKalderon, Michal goto err1;
30699d195ccSKalderon, Michal }
30799d195ccSKalderon, Michal
30899d195ccSKalderon, Michal rc = dev->ops->ll2_set_mac_filter(dev->cdev, NULL, dev->ndev->dev_addr);
30999d195ccSKalderon, Michal if (rc)
31099d195ccSKalderon, Michal goto err2;
31199d195ccSKalderon, Michal
31299d195ccSKalderon, Michal return 0;
31399d195ccSKalderon, Michal
31499d195ccSKalderon, Michal err2:
31599d195ccSKalderon, Michal dev->ops->ll2_terminate_connection(dev->rdma_ctx, dev->gsi_ll2_handle);
31699d195ccSKalderon, Michal err1:
31799d195ccSKalderon, Michal dev->ops->ll2_release_connection(dev->rdma_ctx, dev->gsi_ll2_handle);
31899d195ccSKalderon, Michal
31999d195ccSKalderon, Michal return rc;
32099d195ccSKalderon, Michal }
32199d195ccSKalderon, Michal
qedr_create_gsi_qp(struct qedr_dev * dev,struct ib_qp_init_attr * attrs,struct qedr_qp * qp)322*514aee66SLeon Romanovsky int qedr_create_gsi_qp(struct qedr_dev *dev, struct ib_qp_init_attr *attrs,
32399d195ccSKalderon, Michal struct qedr_qp *qp)
32499d195ccSKalderon, Michal {
32599d195ccSKalderon, Michal int rc;
32699d195ccSKalderon, Michal
32799d195ccSKalderon, Michal rc = qedr_check_gsi_qp_attrs(dev, attrs);
32899d195ccSKalderon, Michal if (rc)
329*514aee66SLeon Romanovsky return rc;
33099d195ccSKalderon, Michal
33199d195ccSKalderon, Michal rc = qedr_ll2_start(dev, attrs, qp);
33299d195ccSKalderon, Michal if (rc) {
33399d195ccSKalderon, Michal DP_ERR(dev, "create gsi qp: failed on ll2 start. rc=%d\n", rc);
334*514aee66SLeon Romanovsky return rc;
33599d195ccSKalderon, Michal }
33699d195ccSKalderon, Michal
33799d195ccSKalderon, Michal /* create QP */
33899d195ccSKalderon, Michal qp->ibqp.qp_num = 1;
33999d195ccSKalderon, Michal qp->rq.max_wr = attrs->cap.max_recv_wr;
34099d195ccSKalderon, Michal qp->sq.max_wr = attrs->cap.max_send_wr;
34199d195ccSKalderon, Michal
34299d195ccSKalderon, Michal qp->rqe_wr_id = kcalloc(qp->rq.max_wr, sizeof(*qp->rqe_wr_id),
34399d195ccSKalderon, Michal GFP_KERNEL);
34499d195ccSKalderon, Michal if (!qp->rqe_wr_id)
34599d195ccSKalderon, Michal goto err;
34699d195ccSKalderon, Michal qp->wqe_wr_id = kcalloc(qp->sq.max_wr, sizeof(*qp->wqe_wr_id),
34799d195ccSKalderon, Michal GFP_KERNEL);
34899d195ccSKalderon, Michal if (!qp->wqe_wr_id)
34999d195ccSKalderon, Michal goto err;
35099d195ccSKalderon, Michal
35199d195ccSKalderon, Michal qedr_store_gsi_qp_cq(dev, qp, attrs);
35299d195ccSKalderon, Michal ether_addr_copy(dev->gsi_ll2_mac_address, dev->ndev->dev_addr);
35399d195ccSKalderon, Michal
35499d195ccSKalderon, Michal /* the GSI CQ is handled by the driver so remove it from the FW */
35599d195ccSKalderon, Michal qedr_destroy_gsi_cq(dev, attrs);
35699d195ccSKalderon, Michal dev->gsi_rqcq->cq_type = QEDR_CQ_TYPE_GSI;
35799d195ccSKalderon, Michal
35899d195ccSKalderon, Michal DP_DEBUG(dev, QEDR_MSG_GSI, "created GSI QP %p\n", qp);
35999d195ccSKalderon, Michal
360*514aee66SLeon Romanovsky return 0;
36199d195ccSKalderon, Michal
36299d195ccSKalderon, Michal err:
36399d195ccSKalderon, Michal kfree(qp->rqe_wr_id);
36499d195ccSKalderon, Michal
36599d195ccSKalderon, Michal rc = qedr_ll2_stop(dev);
36699d195ccSKalderon, Michal if (rc)
36799d195ccSKalderon, Michal DP_ERR(dev, "create gsi qp: failed destroy on create\n");
36899d195ccSKalderon, Michal
369*514aee66SLeon Romanovsky return -ENOMEM;
37099d195ccSKalderon, Michal }
37199d195ccSKalderon, Michal
qedr_destroy_gsi_qp(struct qedr_dev * dev)37299d195ccSKalderon, Michal int qedr_destroy_gsi_qp(struct qedr_dev *dev)
37399d195ccSKalderon, Michal {
37499d195ccSKalderon, Michal return qedr_ll2_stop(dev);
37599d195ccSKalderon, Michal }
37699d195ccSKalderon, Michal
37799d195ccSKalderon, Michal #define QEDR_MAX_UD_HEADER_SIZE (100)
37899d195ccSKalderon, Michal #define QEDR_GSI_QPN (1)
qedr_gsi_build_header(struct qedr_dev * dev,struct qedr_qp * qp,const struct ib_send_wr * swr,struct ib_ud_header * udh,int * roce_mode)37999d195ccSKalderon, Michal static inline int qedr_gsi_build_header(struct qedr_dev *dev,
38099d195ccSKalderon, Michal struct qedr_qp *qp,
381f696bf6dSBart Van Assche const struct ib_send_wr *swr,
38299d195ccSKalderon, Michal struct ib_ud_header *udh,
38399d195ccSKalderon, Michal int *roce_mode)
38499d195ccSKalderon, Michal {
38599d195ccSKalderon, Michal bool has_vlan = false, has_grh_ipv6 = true;
38699d195ccSKalderon, Michal struct rdma_ah_attr *ah_attr = &get_qedr_ah(ud_wr(swr)->ah)->attr;
38799d195ccSKalderon, Michal const struct ib_global_route *grh = rdma_ah_read_grh(ah_attr);
38889af969aSParav Pandit const struct ib_gid_attr *sgid_attr = grh->sgid_attr;
38999d195ccSKalderon, Michal int send_size = 0;
39099d195ccSKalderon, Michal u16 vlan_id = 0;
39199d195ccSKalderon, Michal u16 ether_type;
39299d195ccSKalderon, Michal int rc;
39399d195ccSKalderon, Michal int ip_ver = 0;
39499d195ccSKalderon, Michal
39599d195ccSKalderon, Michal bool has_udp = false;
39699d195ccSKalderon, Michal int i;
39799d195ccSKalderon, Michal
398a70c0739SParav Pandit rc = rdma_read_gid_l2_fields(sgid_attr, &vlan_id, NULL);
399a70c0739SParav Pandit if (rc)
400a70c0739SParav Pandit return rc;
401a70c0739SParav Pandit
402a70c0739SParav Pandit if (vlan_id < VLAN_CFI_MASK)
403a70c0739SParav Pandit has_vlan = true;
404a70c0739SParav Pandit
40599d195ccSKalderon, Michal send_size = 0;
40699d195ccSKalderon, Michal for (i = 0; i < swr->num_sge; ++i)
40799d195ccSKalderon, Michal send_size += swr->sg_list[i].length;
40899d195ccSKalderon, Michal
40989af969aSParav Pandit has_udp = (sgid_attr->gid_type == IB_GID_TYPE_ROCE_UDP_ENCAP);
41099d195ccSKalderon, Michal if (!has_udp) {
41199d195ccSKalderon, Michal /* RoCE v1 */
41299d195ccSKalderon, Michal ether_type = ETH_P_IBOE;
41399d195ccSKalderon, Michal *roce_mode = ROCE_V1;
41489af969aSParav Pandit } else if (ipv6_addr_v4mapped((struct in6_addr *)&sgid_attr->gid)) {
41599d195ccSKalderon, Michal /* RoCE v2 IPv4 */
41699d195ccSKalderon, Michal ip_ver = 4;
41799d195ccSKalderon, Michal ether_type = ETH_P_IP;
41899d195ccSKalderon, Michal has_grh_ipv6 = false;
41999d195ccSKalderon, Michal *roce_mode = ROCE_V2_IPV4;
42099d195ccSKalderon, Michal } else {
42199d195ccSKalderon, Michal /* RoCE v2 IPv6 */
42299d195ccSKalderon, Michal ip_ver = 6;
42399d195ccSKalderon, Michal ether_type = ETH_P_IPV6;
42499d195ccSKalderon, Michal *roce_mode = ROCE_V2_IPV6;
42599d195ccSKalderon, Michal }
42699d195ccSKalderon, Michal
42799d195ccSKalderon, Michal rc = ib_ud_header_init(send_size, false, true, has_vlan,
42899d195ccSKalderon, Michal has_grh_ipv6, ip_ver, has_udp, 0, udh);
42999d195ccSKalderon, Michal if (rc) {
43099d195ccSKalderon, Michal DP_ERR(dev, "gsi post send: failed to init header\n");
43199d195ccSKalderon, Michal return rc;
43299d195ccSKalderon, Michal }
43399d195ccSKalderon, Michal
43499d195ccSKalderon, Michal /* ENET + VLAN headers */
43599d195ccSKalderon, Michal ether_addr_copy(udh->eth.dmac_h, ah_attr->roce.dmac);
43699d195ccSKalderon, Michal ether_addr_copy(udh->eth.smac_h, dev->ndev->dev_addr);
43799d195ccSKalderon, Michal if (has_vlan) {
43899d195ccSKalderon, Michal udh->eth.type = htons(ETH_P_8021Q);
43999d195ccSKalderon, Michal udh->vlan.tag = htons(vlan_id);
44099d195ccSKalderon, Michal udh->vlan.type = htons(ether_type);
44199d195ccSKalderon, Michal } else {
44299d195ccSKalderon, Michal udh->eth.type = htons(ether_type);
44399d195ccSKalderon, Michal }
44499d195ccSKalderon, Michal
44599d195ccSKalderon, Michal /* BTH */
44699d195ccSKalderon, Michal udh->bth.solicited_event = !!(swr->send_flags & IB_SEND_SOLICITED);
44799d195ccSKalderon, Michal udh->bth.pkey = QEDR_ROCE_PKEY_DEFAULT;
44899d195ccSKalderon, Michal udh->bth.destination_qpn = htonl(ud_wr(swr)->remote_qpn);
44999d195ccSKalderon, Michal udh->bth.psn = htonl((qp->sq_psn++) & ((1 << 24) - 1));
45099d195ccSKalderon, Michal udh->bth.opcode = IB_OPCODE_UD_SEND_ONLY;
45199d195ccSKalderon, Michal
45299d195ccSKalderon, Michal /* DETH */
45399d195ccSKalderon, Michal udh->deth.qkey = htonl(0x80010000);
45499d195ccSKalderon, Michal udh->deth.source_qpn = htonl(QEDR_GSI_QPN);
45599d195ccSKalderon, Michal
45699d195ccSKalderon, Michal if (has_grh_ipv6) {
45799d195ccSKalderon, Michal /* GRH / IPv6 header */
45899d195ccSKalderon, Michal udh->grh.traffic_class = grh->traffic_class;
45999d195ccSKalderon, Michal udh->grh.flow_label = grh->flow_label;
46099d195ccSKalderon, Michal udh->grh.hop_limit = grh->hop_limit;
46199d195ccSKalderon, Michal udh->grh.destination_gid = grh->dgid;
46289af969aSParav Pandit memcpy(&udh->grh.source_gid.raw, sgid_attr->gid.raw,
46399d195ccSKalderon, Michal sizeof(udh->grh.source_gid.raw));
46499d195ccSKalderon, Michal } else {
46599d195ccSKalderon, Michal /* IPv4 header */
46699d195ccSKalderon, Michal u32 ipv4_addr;
46799d195ccSKalderon, Michal
46899d195ccSKalderon, Michal udh->ip4.protocol = IPPROTO_UDP;
46999d195ccSKalderon, Michal udh->ip4.tos = htonl(grh->flow_label);
47099d195ccSKalderon, Michal udh->ip4.frag_off = htons(IP_DF);
47199d195ccSKalderon, Michal udh->ip4.ttl = grh->hop_limit;
47299d195ccSKalderon, Michal
47389af969aSParav Pandit ipv4_addr = qedr_get_ipv4_from_gid(sgid_attr->gid.raw);
47499d195ccSKalderon, Michal udh->ip4.saddr = ipv4_addr;
47599d195ccSKalderon, Michal ipv4_addr = qedr_get_ipv4_from_gid(grh->dgid.raw);
47699d195ccSKalderon, Michal udh->ip4.daddr = ipv4_addr;
47799d195ccSKalderon, Michal /* note: checksum is calculated by the device */
47899d195ccSKalderon, Michal }
47999d195ccSKalderon, Michal
48099d195ccSKalderon, Michal /* UDP */
48199d195ccSKalderon, Michal if (has_udp) {
48299d195ccSKalderon, Michal udh->udp.sport = htons(QEDR_ROCE_V2_UDP_SPORT);
48399d195ccSKalderon, Michal udh->udp.dport = htons(ROCE_V2_UDP_DPORT);
48499d195ccSKalderon, Michal udh->udp.csum = 0;
48599d195ccSKalderon, Michal /* UDP length is untouched hence is zero */
48699d195ccSKalderon, Michal }
48799d195ccSKalderon, Michal return 0;
48899d195ccSKalderon, Michal }
48999d195ccSKalderon, Michal
qedr_gsi_build_packet(struct qedr_dev * dev,struct qedr_qp * qp,const struct ib_send_wr * swr,struct qed_roce_ll2_packet ** p_packet)49099d195ccSKalderon, Michal static inline int qedr_gsi_build_packet(struct qedr_dev *dev,
49199d195ccSKalderon, Michal struct qedr_qp *qp,
492f696bf6dSBart Van Assche const struct ib_send_wr *swr,
49399d195ccSKalderon, Michal struct qed_roce_ll2_packet **p_packet)
49499d195ccSKalderon, Michal {
49599d195ccSKalderon, Michal u8 ud_header_buffer[QEDR_MAX_UD_HEADER_SIZE];
49699d195ccSKalderon, Michal struct qed_roce_ll2_packet *packet;
49799d195ccSKalderon, Michal struct pci_dev *pdev = dev->pdev;
49899d195ccSKalderon, Michal int roce_mode, header_size;
49999d195ccSKalderon, Michal struct ib_ud_header udh;
50099d195ccSKalderon, Michal int i, rc;
50199d195ccSKalderon, Michal
50299d195ccSKalderon, Michal *p_packet = NULL;
50399d195ccSKalderon, Michal
50499d195ccSKalderon, Michal rc = qedr_gsi_build_header(dev, qp, swr, &udh, &roce_mode);
50599d195ccSKalderon, Michal if (rc)
50699d195ccSKalderon, Michal return rc;
50799d195ccSKalderon, Michal
50899d195ccSKalderon, Michal header_size = ib_ud_header_pack(&udh, &ud_header_buffer);
50999d195ccSKalderon, Michal
51099d195ccSKalderon, Michal packet = kzalloc(sizeof(*packet), GFP_ATOMIC);
51199d195ccSKalderon, Michal if (!packet)
51299d195ccSKalderon, Michal return -ENOMEM;
51399d195ccSKalderon, Michal
51499d195ccSKalderon, Michal packet->header.vaddr = dma_alloc_coherent(&pdev->dev, header_size,
51599d195ccSKalderon, Michal &packet->header.baddr,
51699d195ccSKalderon, Michal GFP_ATOMIC);
51799d195ccSKalderon, Michal if (!packet->header.vaddr) {
51899d195ccSKalderon, Michal kfree(packet);
51999d195ccSKalderon, Michal return -ENOMEM;
52099d195ccSKalderon, Michal }
52199d195ccSKalderon, Michal
52299d195ccSKalderon, Michal if (ether_addr_equal(udh.eth.smac_h, udh.eth.dmac_h))
523aef716faSNathan Chancellor packet->tx_dest = QED_LL2_TX_DEST_LB;
52499d195ccSKalderon, Michal else
525aef716faSNathan Chancellor packet->tx_dest = QED_LL2_TX_DEST_NW;
52699d195ccSKalderon, Michal
52799d195ccSKalderon, Michal packet->roce_mode = roce_mode;
52899d195ccSKalderon, Michal memcpy(packet->header.vaddr, ud_header_buffer, header_size);
52999d195ccSKalderon, Michal packet->header.len = header_size;
53099d195ccSKalderon, Michal packet->n_seg = swr->num_sge;
53199d195ccSKalderon, Michal for (i = 0; i < packet->n_seg; i++) {
53299d195ccSKalderon, Michal packet->payload[i].baddr = swr->sg_list[i].addr;
53399d195ccSKalderon, Michal packet->payload[i].len = swr->sg_list[i].length;
53499d195ccSKalderon, Michal }
53599d195ccSKalderon, Michal
53699d195ccSKalderon, Michal *p_packet = packet;
53799d195ccSKalderon, Michal
53899d195ccSKalderon, Michal return 0;
53999d195ccSKalderon, Michal }
54099d195ccSKalderon, Michal
qedr_gsi_post_send(struct ib_qp * ibqp,const struct ib_send_wr * wr,const struct ib_send_wr ** bad_wr)541d34ac5cdSBart Van Assche int qedr_gsi_post_send(struct ib_qp *ibqp, const struct ib_send_wr *wr,
542d34ac5cdSBart Van Assche const struct ib_send_wr **bad_wr)
54399d195ccSKalderon, Michal {
54499d195ccSKalderon, Michal struct qed_roce_ll2_packet *pkt = NULL;
54599d195ccSKalderon, Michal struct qedr_qp *qp = get_qedr_qp(ibqp);
54699d195ccSKalderon, Michal struct qedr_dev *dev = qp->dev;
54799d195ccSKalderon, Michal unsigned long flags;
54899d195ccSKalderon, Michal int rc;
54999d195ccSKalderon, Michal
55099d195ccSKalderon, Michal if (qp->state != QED_ROCE_QP_STATE_RTS) {
55199d195ccSKalderon, Michal *bad_wr = wr;
55299d195ccSKalderon, Michal DP_ERR(dev,
55399d195ccSKalderon, Michal "gsi post recv: failed to post rx buffer. state is %d and not QED_ROCE_QP_STATE_RTS\n",
55499d195ccSKalderon, Michal qp->state);
55599d195ccSKalderon, Michal return -EINVAL;
55699d195ccSKalderon, Michal }
55799d195ccSKalderon, Michal
55899d195ccSKalderon, Michal if (wr->num_sge > RDMA_MAX_SGE_PER_SQ_WQE) {
55999d195ccSKalderon, Michal DP_ERR(dev, "gsi post send: num_sge is too large (%d>%d)\n",
56099d195ccSKalderon, Michal wr->num_sge, RDMA_MAX_SGE_PER_SQ_WQE);
56199d195ccSKalderon, Michal rc = -EINVAL;
56299d195ccSKalderon, Michal goto err;
56399d195ccSKalderon, Michal }
56499d195ccSKalderon, Michal
56599d195ccSKalderon, Michal if (wr->opcode != IB_WR_SEND) {
56699d195ccSKalderon, Michal DP_ERR(dev,
56799d195ccSKalderon, Michal "gsi post send: failed due to unsupported opcode %d\n",
56899d195ccSKalderon, Michal wr->opcode);
56999d195ccSKalderon, Michal rc = -EINVAL;
57099d195ccSKalderon, Michal goto err;
57199d195ccSKalderon, Michal }
57299d195ccSKalderon, Michal
57399d195ccSKalderon, Michal spin_lock_irqsave(&qp->q_lock, flags);
57499d195ccSKalderon, Michal
57599d195ccSKalderon, Michal rc = qedr_gsi_build_packet(dev, qp, wr, &pkt);
57699d195ccSKalderon, Michal if (rc) {
57799d195ccSKalderon, Michal spin_unlock_irqrestore(&qp->q_lock, flags);
57899d195ccSKalderon, Michal goto err;
57999d195ccSKalderon, Michal }
58099d195ccSKalderon, Michal
58199d195ccSKalderon, Michal rc = qedr_ll2_post_tx(dev, pkt);
58299d195ccSKalderon, Michal
58399d195ccSKalderon, Michal if (!rc) {
58499d195ccSKalderon, Michal qp->wqe_wr_id[qp->sq.prod].wr_id = wr->wr_id;
58599d195ccSKalderon, Michal qedr_inc_sw_prod(&qp->sq);
58699d195ccSKalderon, Michal DP_DEBUG(qp->dev, QEDR_MSG_GSI,
587a14e3caaSSebastian Andrzej Siewior "gsi post send: opcode=%d, wr_id=%llx\n", wr->opcode,
588a14e3caaSSebastian Andrzej Siewior wr->wr_id);
58999d195ccSKalderon, Michal } else {
59099d195ccSKalderon, Michal DP_ERR(dev, "gsi post send: failed to transmit (rc=%d)\n", rc);
59199d195ccSKalderon, Michal rc = -EAGAIN;
59299d195ccSKalderon, Michal *bad_wr = wr;
59399d195ccSKalderon, Michal }
59499d195ccSKalderon, Michal
59599d195ccSKalderon, Michal spin_unlock_irqrestore(&qp->q_lock, flags);
59699d195ccSKalderon, Michal
59799d195ccSKalderon, Michal if (wr->next) {
59899d195ccSKalderon, Michal DP_ERR(dev,
59999d195ccSKalderon, Michal "gsi post send: failed second WR. Only one WR may be passed at a time\n");
60099d195ccSKalderon, Michal *bad_wr = wr->next;
60199d195ccSKalderon, Michal rc = -EINVAL;
60299d195ccSKalderon, Michal }
60399d195ccSKalderon, Michal
60499d195ccSKalderon, Michal return rc;
60599d195ccSKalderon, Michal
60699d195ccSKalderon, Michal err:
60799d195ccSKalderon, Michal *bad_wr = wr;
60899d195ccSKalderon, Michal return rc;
60999d195ccSKalderon, Michal }
61099d195ccSKalderon, Michal
qedr_gsi_post_recv(struct ib_qp * ibqp,const struct ib_recv_wr * wr,const struct ib_recv_wr ** bad_wr)611d34ac5cdSBart Van Assche int qedr_gsi_post_recv(struct ib_qp *ibqp, const struct ib_recv_wr *wr,
612d34ac5cdSBart Van Assche const struct ib_recv_wr **bad_wr)
61399d195ccSKalderon, Michal {
61499d195ccSKalderon, Michal struct qedr_dev *dev = get_qedr_dev(ibqp->device);
61599d195ccSKalderon, Michal struct qedr_qp *qp = get_qedr_qp(ibqp);
61699d195ccSKalderon, Michal unsigned long flags;
61799d195ccSKalderon, Michal int rc = 0;
61899d195ccSKalderon, Michal
61999d195ccSKalderon, Michal if ((qp->state != QED_ROCE_QP_STATE_RTR) &&
62099d195ccSKalderon, Michal (qp->state != QED_ROCE_QP_STATE_RTS)) {
62199d195ccSKalderon, Michal *bad_wr = wr;
62299d195ccSKalderon, Michal DP_ERR(dev,
62399d195ccSKalderon, Michal "gsi post recv: failed to post rx buffer. state is %d and not QED_ROCE_QP_STATE_RTR/S\n",
62499d195ccSKalderon, Michal qp->state);
62599d195ccSKalderon, Michal return -EINVAL;
62699d195ccSKalderon, Michal }
62799d195ccSKalderon, Michal
62899d195ccSKalderon, Michal spin_lock_irqsave(&qp->q_lock, flags);
62999d195ccSKalderon, Michal
63099d195ccSKalderon, Michal while (wr) {
63199d195ccSKalderon, Michal if (wr->num_sge > QEDR_GSI_MAX_RECV_SGE) {
63299d195ccSKalderon, Michal DP_ERR(dev,
63399d195ccSKalderon, Michal "gsi post recv: failed to post rx buffer. too many sges %d>%d\n",
63499d195ccSKalderon, Michal wr->num_sge, QEDR_GSI_MAX_RECV_SGE);
63599d195ccSKalderon, Michal goto err;
63699d195ccSKalderon, Michal }
63799d195ccSKalderon, Michal
63899d195ccSKalderon, Michal rc = dev->ops->ll2_post_rx_buffer(dev->rdma_ctx,
63999d195ccSKalderon, Michal dev->gsi_ll2_handle,
64099d195ccSKalderon, Michal wr->sg_list[0].addr,
64199d195ccSKalderon, Michal wr->sg_list[0].length,
642f3895c2dSBart Van Assche NULL /* cookie */,
64399d195ccSKalderon, Michal 1 /* notify_fw */);
64499d195ccSKalderon, Michal if (rc) {
64599d195ccSKalderon, Michal DP_ERR(dev,
64699d195ccSKalderon, Michal "gsi post recv: failed to post rx buffer (rc=%d)\n",
64799d195ccSKalderon, Michal rc);
64899d195ccSKalderon, Michal goto err;
64999d195ccSKalderon, Michal }
65099d195ccSKalderon, Michal
65199d195ccSKalderon, Michal memset(&qp->rqe_wr_id[qp->rq.prod], 0,
65299d195ccSKalderon, Michal sizeof(qp->rqe_wr_id[qp->rq.prod]));
65399d195ccSKalderon, Michal qp->rqe_wr_id[qp->rq.prod].sg_list[0] = wr->sg_list[0];
65499d195ccSKalderon, Michal qp->rqe_wr_id[qp->rq.prod].wr_id = wr->wr_id;
65599d195ccSKalderon, Michal
65699d195ccSKalderon, Michal qedr_inc_sw_prod(&qp->rq);
65799d195ccSKalderon, Michal
65899d195ccSKalderon, Michal wr = wr->next;
65999d195ccSKalderon, Michal }
66099d195ccSKalderon, Michal
66199d195ccSKalderon, Michal spin_unlock_irqrestore(&qp->q_lock, flags);
66299d195ccSKalderon, Michal
66399d195ccSKalderon, Michal return rc;
66499d195ccSKalderon, Michal err:
66599d195ccSKalderon, Michal spin_unlock_irqrestore(&qp->q_lock, flags);
66699d195ccSKalderon, Michal *bad_wr = wr;
66799d195ccSKalderon, Michal return -ENOMEM;
66899d195ccSKalderon, Michal }
66999d195ccSKalderon, Michal
qedr_gsi_poll_cq(struct ib_cq * ibcq,int num_entries,struct ib_wc * wc)67099d195ccSKalderon, Michal int qedr_gsi_poll_cq(struct ib_cq *ibcq, int num_entries, struct ib_wc *wc)
67199d195ccSKalderon, Michal {
67299d195ccSKalderon, Michal struct qedr_dev *dev = get_qedr_dev(ibcq->device);
67399d195ccSKalderon, Michal struct qedr_cq *cq = get_qedr_cq(ibcq);
67499d195ccSKalderon, Michal struct qedr_qp *qp = dev->gsi_qp;
67599d195ccSKalderon, Michal unsigned long flags;
676754137a7SDoug Ledford u16 vlan_id;
67799d195ccSKalderon, Michal int i = 0;
67899d195ccSKalderon, Michal
67999d195ccSKalderon, Michal spin_lock_irqsave(&cq->cq_lock, flags);
68099d195ccSKalderon, Michal
68199d195ccSKalderon, Michal while (i < num_entries && qp->rq.cons != qp->rq.gsi_cons) {
68299d195ccSKalderon, Michal memset(&wc[i], 0, sizeof(*wc));
68399d195ccSKalderon, Michal
68499d195ccSKalderon, Michal wc[i].qp = &qp->ibqp;
68599d195ccSKalderon, Michal wc[i].wr_id = qp->rqe_wr_id[qp->rq.cons].wr_id;
68699d195ccSKalderon, Michal wc[i].opcode = IB_WC_RECV;
68799d195ccSKalderon, Michal wc[i].pkey_index = 0;
68899d195ccSKalderon, Michal wc[i].status = (qp->rqe_wr_id[qp->rq.cons].rc) ?
68999d195ccSKalderon, Michal IB_WC_GENERAL_ERR : IB_WC_SUCCESS;
69099d195ccSKalderon, Michal /* 0 - currently only one recv sg is supported */
69199d195ccSKalderon, Michal wc[i].byte_len = qp->rqe_wr_id[qp->rq.cons].sg_list[0].length;
69299d195ccSKalderon, Michal wc[i].wc_flags |= IB_WC_GRH | IB_WC_IP_CSUM_OK;
69399d195ccSKalderon, Michal ether_addr_copy(wc[i].smac, qp->rqe_wr_id[qp->rq.cons].smac);
69499d195ccSKalderon, Michal wc[i].wc_flags |= IB_WC_WITH_SMAC;
695754137a7SDoug Ledford
696754137a7SDoug Ledford vlan_id = qp->rqe_wr_id[qp->rq.cons].vlan &
697754137a7SDoug Ledford VLAN_VID_MASK;
698754137a7SDoug Ledford if (vlan_id) {
69999d195ccSKalderon, Michal wc[i].wc_flags |= IB_WC_WITH_VLAN;
700754137a7SDoug Ledford wc[i].vlan_id = vlan_id;
701754137a7SDoug Ledford wc[i].sl = (qp->rqe_wr_id[qp->rq.cons].vlan &
702754137a7SDoug Ledford VLAN_PRIO_MASK) >> VLAN_PRIO_SHIFT;
70399d195ccSKalderon, Michal }
70499d195ccSKalderon, Michal
70599d195ccSKalderon, Michal qedr_inc_sw_cons(&qp->rq);
70699d195ccSKalderon, Michal i++;
70799d195ccSKalderon, Michal }
70899d195ccSKalderon, Michal
70999d195ccSKalderon, Michal while (i < num_entries && qp->sq.cons != qp->sq.gsi_cons) {
71099d195ccSKalderon, Michal memset(&wc[i], 0, sizeof(*wc));
71199d195ccSKalderon, Michal
71299d195ccSKalderon, Michal wc[i].qp = &qp->ibqp;
71399d195ccSKalderon, Michal wc[i].wr_id = qp->wqe_wr_id[qp->sq.cons].wr_id;
71499d195ccSKalderon, Michal wc[i].opcode = IB_WC_SEND;
71599d195ccSKalderon, Michal wc[i].status = IB_WC_SUCCESS;
71699d195ccSKalderon, Michal
71799d195ccSKalderon, Michal qedr_inc_sw_cons(&qp->sq);
71899d195ccSKalderon, Michal i++;
71999d195ccSKalderon, Michal }
72099d195ccSKalderon, Michal
72199d195ccSKalderon, Michal spin_unlock_irqrestore(&cq->cq_lock, flags);
72299d195ccSKalderon, Michal
72399d195ccSKalderon, Michal DP_DEBUG(dev, QEDR_MSG_GSI,
72499d195ccSKalderon, Michal "gsi poll_cq: requested entries=%d, actual=%d, qp->rq.cons=%d, qp->rq.gsi_cons=%x, qp->sq.cons=%d, qp->sq.gsi_cons=%d, qp_num=%d\n",
72599d195ccSKalderon, Michal num_entries, i, qp->rq.cons, qp->rq.gsi_cons, qp->sq.cons,
72699d195ccSKalderon, Michal qp->sq.gsi_cons, qp->ibqp.qp_num);
72799d195ccSKalderon, Michal
72899d195ccSKalderon, Michal return i;
72999d195ccSKalderon, Michal }
730