1 /******************************************************************* 2 * This file is part of the Emulex RoCE Device Driver for * 3 * RoCE (RDMA over Converged Ethernet) adapters. * 4 * Copyright (C) 2008-2012 Emulex. All rights reserved. * 5 * EMULEX and SLI are trademarks of Emulex. * 6 * www.emulex.com * 7 * * 8 * This program is free software; you can redistribute it and/or * 9 * modify it under the terms of version 2 of the GNU General * 10 * Public License as published by the Free Software Foundation. * 11 * This program is distributed in the hope that it will be useful. * 12 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND * 13 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, * 14 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE * 15 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD * 16 * TO BE LEGALLY INVALID. See the GNU General Public License for * 17 * more details, a copy of which can be found in the file COPYING * 18 * included with this package. * 19 * 20 * Contact Information: 21 * linux-drivers@emulex.com 22 * 23 * Emulex 24 * 3333 Susan Street 25 * Costa Mesa, CA 92626 26 *******************************************************************/ 27 28 #include <linux/dma-mapping.h> 29 #include <rdma/ib_verbs.h> 30 #include <rdma/ib_user_verbs.h> 31 #include <rdma/iw_cm.h> 32 #include <rdma/ib_umem.h> 33 #include <rdma/ib_addr.h> 34 35 #include "ocrdma.h" 36 #include "ocrdma_hw.h" 37 #include "ocrdma_verbs.h" 38 #include "ocrdma_abi.h" 39 40 int ocrdma_query_pkey(struct ib_device *ibdev, u8 port, u16 index, u16 *pkey) 41 { 42 if (index > 1) 43 return -EINVAL; 44 45 *pkey = 0xffff; 46 return 0; 47 } 48 49 int ocrdma_query_gid(struct ib_device *ibdev, u8 port, 50 int index, union ib_gid *sgid) 51 { 52 struct ocrdma_dev *dev; 53 54 dev = get_ocrdma_dev(ibdev); 55 memset(sgid, 0, sizeof(*sgid)); 56 if (index > OCRDMA_MAX_SGID) 57 return -EINVAL; 58 59 memcpy(sgid, &dev->sgid_tbl[index], sizeof(*sgid)); 60 61 return 0; 62 } 63 64 int ocrdma_query_device(struct ib_device *ibdev, struct ib_device_attr *attr) 65 { 66 struct ocrdma_dev *dev = get_ocrdma_dev(ibdev); 67 68 memset(attr, 0, sizeof *attr); 69 memcpy(&attr->fw_ver, &dev->attr.fw_ver[0], 70 min(sizeof(dev->attr.fw_ver), sizeof(attr->fw_ver))); 71 ocrdma_get_guid(dev, (u8 *)&attr->sys_image_guid); 72 attr->max_mr_size = ~0ull; 73 attr->page_size_cap = 0xffff000; 74 attr->vendor_id = dev->nic_info.pdev->vendor; 75 attr->vendor_part_id = dev->nic_info.pdev->device; 76 attr->hw_ver = 0; 77 attr->max_qp = dev->attr.max_qp; 78 attr->max_ah = OCRDMA_MAX_AH; 79 attr->max_qp_wr = dev->attr.max_wqe; 80 81 attr->device_cap_flags = IB_DEVICE_CURR_QP_STATE_MOD | 82 IB_DEVICE_RC_RNR_NAK_GEN | 83 IB_DEVICE_SHUTDOWN_PORT | 84 IB_DEVICE_SYS_IMAGE_GUID | 85 IB_DEVICE_LOCAL_DMA_LKEY | 86 IB_DEVICE_MEM_MGT_EXTENSIONS; 87 attr->max_sge = min(dev->attr.max_send_sge, dev->attr.max_srq_sge); 88 attr->max_sge_rd = 0; 89 attr->max_cq = dev->attr.max_cq; 90 attr->max_cqe = dev->attr.max_cqe; 91 attr->max_mr = dev->attr.max_mr; 92 attr->max_mw = dev->attr.max_mw; 93 attr->max_pd = dev->attr.max_pd; 94 attr->atomic_cap = 0; 95 attr->max_fmr = 0; 96 attr->max_map_per_fmr = 0; 97 attr->max_qp_rd_atom = 98 min(dev->attr.max_ord_per_qp, dev->attr.max_ird_per_qp); 99 attr->max_qp_init_rd_atom = dev->attr.max_ord_per_qp; 100 attr->max_srq = dev->attr.max_srq; 101 attr->max_srq_sge = dev->attr.max_srq_sge; 102 attr->max_srq_wr = dev->attr.max_rqe; 103 attr->local_ca_ack_delay = dev->attr.local_ca_ack_delay; 104 attr->max_fast_reg_page_list_len = 0; 105 attr->max_pkeys = 1; 106 return 0; 107 } 108 109 static inline void get_link_speed_and_width(struct ocrdma_dev *dev, 110 u8 *ib_speed, u8 *ib_width) 111 { 112 int status; 113 u8 speed; 114 115 status = ocrdma_mbx_get_link_speed(dev, &speed); 116 if (status) 117 speed = OCRDMA_PHYS_LINK_SPEED_ZERO; 118 119 switch (speed) { 120 case OCRDMA_PHYS_LINK_SPEED_1GBPS: 121 *ib_speed = IB_SPEED_SDR; 122 *ib_width = IB_WIDTH_1X; 123 break; 124 125 case OCRDMA_PHYS_LINK_SPEED_10GBPS: 126 *ib_speed = IB_SPEED_QDR; 127 *ib_width = IB_WIDTH_1X; 128 break; 129 130 case OCRDMA_PHYS_LINK_SPEED_20GBPS: 131 *ib_speed = IB_SPEED_DDR; 132 *ib_width = IB_WIDTH_4X; 133 break; 134 135 case OCRDMA_PHYS_LINK_SPEED_40GBPS: 136 *ib_speed = IB_SPEED_QDR; 137 *ib_width = IB_WIDTH_4X; 138 break; 139 140 default: 141 /* Unsupported */ 142 *ib_speed = IB_SPEED_SDR; 143 *ib_width = IB_WIDTH_1X; 144 } 145 } 146 147 int ocrdma_query_port(struct ib_device *ibdev, 148 u8 port, struct ib_port_attr *props) 149 { 150 enum ib_port_state port_state; 151 struct ocrdma_dev *dev; 152 struct net_device *netdev; 153 154 dev = get_ocrdma_dev(ibdev); 155 if (port > 1) { 156 pr_err("%s(%d) invalid_port=0x%x\n", __func__, 157 dev->id, port); 158 return -EINVAL; 159 } 160 netdev = dev->nic_info.netdev; 161 if (netif_running(netdev) && netif_oper_up(netdev)) { 162 port_state = IB_PORT_ACTIVE; 163 props->phys_state = 5; 164 } else { 165 port_state = IB_PORT_DOWN; 166 props->phys_state = 3; 167 } 168 props->max_mtu = IB_MTU_4096; 169 props->active_mtu = iboe_get_mtu(netdev->mtu); 170 props->lid = 0; 171 props->lmc = 0; 172 props->sm_lid = 0; 173 props->sm_sl = 0; 174 props->state = port_state; 175 props->port_cap_flags = 176 IB_PORT_CM_SUP | 177 IB_PORT_REINIT_SUP | 178 IB_PORT_DEVICE_MGMT_SUP | IB_PORT_VENDOR_CLASS_SUP | IB_PORT_IP_BASED_GIDS; 179 props->gid_tbl_len = OCRDMA_MAX_SGID; 180 props->pkey_tbl_len = 1; 181 props->bad_pkey_cntr = 0; 182 props->qkey_viol_cntr = 0; 183 get_link_speed_and_width(dev, &props->active_speed, 184 &props->active_width); 185 props->max_msg_sz = 0x80000000; 186 props->max_vl_num = 4; 187 return 0; 188 } 189 190 int ocrdma_modify_port(struct ib_device *ibdev, u8 port, int mask, 191 struct ib_port_modify *props) 192 { 193 struct ocrdma_dev *dev; 194 195 dev = get_ocrdma_dev(ibdev); 196 if (port > 1) { 197 pr_err("%s(%d) invalid_port=0x%x\n", __func__, dev->id, port); 198 return -EINVAL; 199 } 200 return 0; 201 } 202 203 static int ocrdma_add_mmap(struct ocrdma_ucontext *uctx, u64 phy_addr, 204 unsigned long len) 205 { 206 struct ocrdma_mm *mm; 207 208 mm = kzalloc(sizeof(*mm), GFP_KERNEL); 209 if (mm == NULL) 210 return -ENOMEM; 211 mm->key.phy_addr = phy_addr; 212 mm->key.len = len; 213 INIT_LIST_HEAD(&mm->entry); 214 215 mutex_lock(&uctx->mm_list_lock); 216 list_add_tail(&mm->entry, &uctx->mm_head); 217 mutex_unlock(&uctx->mm_list_lock); 218 return 0; 219 } 220 221 static void ocrdma_del_mmap(struct ocrdma_ucontext *uctx, u64 phy_addr, 222 unsigned long len) 223 { 224 struct ocrdma_mm *mm, *tmp; 225 226 mutex_lock(&uctx->mm_list_lock); 227 list_for_each_entry_safe(mm, tmp, &uctx->mm_head, entry) { 228 if (len != mm->key.len && phy_addr != mm->key.phy_addr) 229 continue; 230 231 list_del(&mm->entry); 232 kfree(mm); 233 break; 234 } 235 mutex_unlock(&uctx->mm_list_lock); 236 } 237 238 static bool ocrdma_search_mmap(struct ocrdma_ucontext *uctx, u64 phy_addr, 239 unsigned long len) 240 { 241 bool found = false; 242 struct ocrdma_mm *mm; 243 244 mutex_lock(&uctx->mm_list_lock); 245 list_for_each_entry(mm, &uctx->mm_head, entry) { 246 if (len != mm->key.len && phy_addr != mm->key.phy_addr) 247 continue; 248 249 found = true; 250 break; 251 } 252 mutex_unlock(&uctx->mm_list_lock); 253 return found; 254 } 255 256 static struct ocrdma_pd *_ocrdma_alloc_pd(struct ocrdma_dev *dev, 257 struct ocrdma_ucontext *uctx, 258 struct ib_udata *udata) 259 { 260 struct ocrdma_pd *pd = NULL; 261 int status = 0; 262 263 pd = kzalloc(sizeof(*pd), GFP_KERNEL); 264 if (!pd) 265 return ERR_PTR(-ENOMEM); 266 267 if (udata && uctx) { 268 pd->dpp_enabled = 269 ocrdma_get_asic_type(dev) == OCRDMA_ASIC_GEN_SKH_R; 270 pd->num_dpp_qp = 271 pd->dpp_enabled ? OCRDMA_PD_MAX_DPP_ENABLED_QP : 0; 272 } 273 274 retry: 275 status = ocrdma_mbx_alloc_pd(dev, pd); 276 if (status) { 277 if (pd->dpp_enabled) { 278 pd->dpp_enabled = false; 279 pd->num_dpp_qp = 0; 280 goto retry; 281 } else { 282 kfree(pd); 283 return ERR_PTR(status); 284 } 285 } 286 287 return pd; 288 } 289 290 static inline int is_ucontext_pd(struct ocrdma_ucontext *uctx, 291 struct ocrdma_pd *pd) 292 { 293 return (uctx->cntxt_pd == pd ? true : false); 294 } 295 296 static int _ocrdma_dealloc_pd(struct ocrdma_dev *dev, 297 struct ocrdma_pd *pd) 298 { 299 int status = 0; 300 301 status = ocrdma_mbx_dealloc_pd(dev, pd); 302 kfree(pd); 303 return status; 304 } 305 306 static int ocrdma_alloc_ucontext_pd(struct ocrdma_dev *dev, 307 struct ocrdma_ucontext *uctx, 308 struct ib_udata *udata) 309 { 310 int status = 0; 311 312 uctx->cntxt_pd = _ocrdma_alloc_pd(dev, uctx, udata); 313 if (IS_ERR(uctx->cntxt_pd)) { 314 status = PTR_ERR(uctx->cntxt_pd); 315 uctx->cntxt_pd = NULL; 316 goto err; 317 } 318 319 uctx->cntxt_pd->uctx = uctx; 320 uctx->cntxt_pd->ibpd.device = &dev->ibdev; 321 err: 322 return status; 323 } 324 325 static int ocrdma_dealloc_ucontext_pd(struct ocrdma_ucontext *uctx) 326 { 327 int status = 0; 328 struct ocrdma_pd *pd = uctx->cntxt_pd; 329 struct ocrdma_dev *dev = get_ocrdma_dev(pd->ibpd.device); 330 331 BUG_ON(uctx->pd_in_use); 332 uctx->cntxt_pd = NULL; 333 status = _ocrdma_dealloc_pd(dev, pd); 334 return status; 335 } 336 337 static struct ocrdma_pd *ocrdma_get_ucontext_pd(struct ocrdma_ucontext *uctx) 338 { 339 struct ocrdma_pd *pd = NULL; 340 341 mutex_lock(&uctx->mm_list_lock); 342 if (!uctx->pd_in_use) { 343 uctx->pd_in_use = true; 344 pd = uctx->cntxt_pd; 345 } 346 mutex_unlock(&uctx->mm_list_lock); 347 348 return pd; 349 } 350 351 static void ocrdma_release_ucontext_pd(struct ocrdma_ucontext *uctx) 352 { 353 mutex_lock(&uctx->mm_list_lock); 354 uctx->pd_in_use = false; 355 mutex_unlock(&uctx->mm_list_lock); 356 } 357 358 struct ib_ucontext *ocrdma_alloc_ucontext(struct ib_device *ibdev, 359 struct ib_udata *udata) 360 { 361 int status; 362 struct ocrdma_ucontext *ctx; 363 struct ocrdma_alloc_ucontext_resp resp; 364 struct ocrdma_dev *dev = get_ocrdma_dev(ibdev); 365 struct pci_dev *pdev = dev->nic_info.pdev; 366 u32 map_len = roundup(sizeof(u32) * 2048, PAGE_SIZE); 367 368 if (!udata) 369 return ERR_PTR(-EFAULT); 370 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL); 371 if (!ctx) 372 return ERR_PTR(-ENOMEM); 373 INIT_LIST_HEAD(&ctx->mm_head); 374 mutex_init(&ctx->mm_list_lock); 375 376 ctx->ah_tbl.va = dma_alloc_coherent(&pdev->dev, map_len, 377 &ctx->ah_tbl.pa, GFP_KERNEL); 378 if (!ctx->ah_tbl.va) { 379 kfree(ctx); 380 return ERR_PTR(-ENOMEM); 381 } 382 memset(ctx->ah_tbl.va, 0, map_len); 383 ctx->ah_tbl.len = map_len; 384 385 memset(&resp, 0, sizeof(resp)); 386 resp.ah_tbl_len = ctx->ah_tbl.len; 387 resp.ah_tbl_page = ctx->ah_tbl.pa; 388 389 status = ocrdma_add_mmap(ctx, resp.ah_tbl_page, resp.ah_tbl_len); 390 if (status) 391 goto map_err; 392 393 status = ocrdma_alloc_ucontext_pd(dev, ctx, udata); 394 if (status) 395 goto pd_err; 396 397 resp.dev_id = dev->id; 398 resp.max_inline_data = dev->attr.max_inline_data; 399 resp.wqe_size = dev->attr.wqe_size; 400 resp.rqe_size = dev->attr.rqe_size; 401 resp.dpp_wqe_size = dev->attr.wqe_size; 402 403 memcpy(resp.fw_ver, dev->attr.fw_ver, sizeof(resp.fw_ver)); 404 status = ib_copy_to_udata(udata, &resp, sizeof(resp)); 405 if (status) 406 goto cpy_err; 407 return &ctx->ibucontext; 408 409 cpy_err: 410 pd_err: 411 ocrdma_del_mmap(ctx, ctx->ah_tbl.pa, ctx->ah_tbl.len); 412 map_err: 413 dma_free_coherent(&pdev->dev, ctx->ah_tbl.len, ctx->ah_tbl.va, 414 ctx->ah_tbl.pa); 415 kfree(ctx); 416 return ERR_PTR(status); 417 } 418 419 int ocrdma_dealloc_ucontext(struct ib_ucontext *ibctx) 420 { 421 int status = 0; 422 struct ocrdma_mm *mm, *tmp; 423 struct ocrdma_ucontext *uctx = get_ocrdma_ucontext(ibctx); 424 struct ocrdma_dev *dev = get_ocrdma_dev(ibctx->device); 425 struct pci_dev *pdev = dev->nic_info.pdev; 426 427 status = ocrdma_dealloc_ucontext_pd(uctx); 428 429 ocrdma_del_mmap(uctx, uctx->ah_tbl.pa, uctx->ah_tbl.len); 430 dma_free_coherent(&pdev->dev, uctx->ah_tbl.len, uctx->ah_tbl.va, 431 uctx->ah_tbl.pa); 432 433 list_for_each_entry_safe(mm, tmp, &uctx->mm_head, entry) { 434 list_del(&mm->entry); 435 kfree(mm); 436 } 437 kfree(uctx); 438 return status; 439 } 440 441 int ocrdma_mmap(struct ib_ucontext *context, struct vm_area_struct *vma) 442 { 443 struct ocrdma_ucontext *ucontext = get_ocrdma_ucontext(context); 444 struct ocrdma_dev *dev = get_ocrdma_dev(context->device); 445 unsigned long vm_page = vma->vm_pgoff << PAGE_SHIFT; 446 u64 unmapped_db = (u64) dev->nic_info.unmapped_db; 447 unsigned long len = (vma->vm_end - vma->vm_start); 448 int status = 0; 449 bool found; 450 451 if (vma->vm_start & (PAGE_SIZE - 1)) 452 return -EINVAL; 453 found = ocrdma_search_mmap(ucontext, vma->vm_pgoff << PAGE_SHIFT, len); 454 if (!found) 455 return -EINVAL; 456 457 if ((vm_page >= unmapped_db) && (vm_page <= (unmapped_db + 458 dev->nic_info.db_total_size)) && 459 (len <= dev->nic_info.db_page_size)) { 460 if (vma->vm_flags & VM_READ) 461 return -EPERM; 462 463 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); 464 status = io_remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff, 465 len, vma->vm_page_prot); 466 } else if (dev->nic_info.dpp_unmapped_len && 467 (vm_page >= (u64) dev->nic_info.dpp_unmapped_addr) && 468 (vm_page <= (u64) (dev->nic_info.dpp_unmapped_addr + 469 dev->nic_info.dpp_unmapped_len)) && 470 (len <= dev->nic_info.dpp_unmapped_len)) { 471 if (vma->vm_flags & VM_READ) 472 return -EPERM; 473 474 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot); 475 status = io_remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff, 476 len, vma->vm_page_prot); 477 } else { 478 status = remap_pfn_range(vma, vma->vm_start, 479 vma->vm_pgoff, len, vma->vm_page_prot); 480 } 481 return status; 482 } 483 484 static int ocrdma_copy_pd_uresp(struct ocrdma_dev *dev, struct ocrdma_pd *pd, 485 struct ib_ucontext *ib_ctx, 486 struct ib_udata *udata) 487 { 488 int status; 489 u64 db_page_addr; 490 u64 dpp_page_addr = 0; 491 u32 db_page_size; 492 struct ocrdma_alloc_pd_uresp rsp; 493 struct ocrdma_ucontext *uctx = get_ocrdma_ucontext(ib_ctx); 494 495 memset(&rsp, 0, sizeof(rsp)); 496 rsp.id = pd->id; 497 rsp.dpp_enabled = pd->dpp_enabled; 498 db_page_addr = ocrdma_get_db_addr(dev, pd->id); 499 db_page_size = dev->nic_info.db_page_size; 500 501 status = ocrdma_add_mmap(uctx, db_page_addr, db_page_size); 502 if (status) 503 return status; 504 505 if (pd->dpp_enabled) { 506 dpp_page_addr = dev->nic_info.dpp_unmapped_addr + 507 (pd->id * PAGE_SIZE); 508 status = ocrdma_add_mmap(uctx, dpp_page_addr, 509 PAGE_SIZE); 510 if (status) 511 goto dpp_map_err; 512 rsp.dpp_page_addr_hi = upper_32_bits(dpp_page_addr); 513 rsp.dpp_page_addr_lo = dpp_page_addr; 514 } 515 516 status = ib_copy_to_udata(udata, &rsp, sizeof(rsp)); 517 if (status) 518 goto ucopy_err; 519 520 pd->uctx = uctx; 521 return 0; 522 523 ucopy_err: 524 if (pd->dpp_enabled) 525 ocrdma_del_mmap(pd->uctx, dpp_page_addr, PAGE_SIZE); 526 dpp_map_err: 527 ocrdma_del_mmap(pd->uctx, db_page_addr, db_page_size); 528 return status; 529 } 530 531 struct ib_pd *ocrdma_alloc_pd(struct ib_device *ibdev, 532 struct ib_ucontext *context, 533 struct ib_udata *udata) 534 { 535 struct ocrdma_dev *dev = get_ocrdma_dev(ibdev); 536 struct ocrdma_pd *pd; 537 struct ocrdma_ucontext *uctx = NULL; 538 int status; 539 u8 is_uctx_pd = false; 540 541 if (udata && context) { 542 uctx = get_ocrdma_ucontext(context); 543 pd = ocrdma_get_ucontext_pd(uctx); 544 if (pd) { 545 is_uctx_pd = true; 546 goto pd_mapping; 547 } 548 } 549 550 pd = _ocrdma_alloc_pd(dev, uctx, udata); 551 if (IS_ERR(pd)) { 552 status = PTR_ERR(pd); 553 goto exit; 554 } 555 556 pd_mapping: 557 if (udata && context) { 558 status = ocrdma_copy_pd_uresp(dev, pd, context, udata); 559 if (status) 560 goto err; 561 } 562 return &pd->ibpd; 563 564 err: 565 if (is_uctx_pd) { 566 ocrdma_release_ucontext_pd(uctx); 567 } else { 568 status = ocrdma_mbx_dealloc_pd(dev, pd); 569 kfree(pd); 570 } 571 exit: 572 return ERR_PTR(status); 573 } 574 575 int ocrdma_dealloc_pd(struct ib_pd *ibpd) 576 { 577 struct ocrdma_pd *pd = get_ocrdma_pd(ibpd); 578 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device); 579 struct ocrdma_ucontext *uctx = NULL; 580 int status = 0; 581 u64 usr_db; 582 583 uctx = pd->uctx; 584 if (uctx) { 585 u64 dpp_db = dev->nic_info.dpp_unmapped_addr + 586 (pd->id * PAGE_SIZE); 587 if (pd->dpp_enabled) 588 ocrdma_del_mmap(pd->uctx, dpp_db, PAGE_SIZE); 589 usr_db = ocrdma_get_db_addr(dev, pd->id); 590 ocrdma_del_mmap(pd->uctx, usr_db, dev->nic_info.db_page_size); 591 592 if (is_ucontext_pd(uctx, pd)) { 593 ocrdma_release_ucontext_pd(uctx); 594 return status; 595 } 596 } 597 status = _ocrdma_dealloc_pd(dev, pd); 598 return status; 599 } 600 601 static int ocrdma_alloc_lkey(struct ocrdma_dev *dev, struct ocrdma_mr *mr, 602 u32 pdid, int acc, u32 num_pbls, u32 addr_check) 603 { 604 int status; 605 606 mr->hwmr.fr_mr = 0; 607 mr->hwmr.local_rd = 1; 608 mr->hwmr.remote_rd = (acc & IB_ACCESS_REMOTE_READ) ? 1 : 0; 609 mr->hwmr.remote_wr = (acc & IB_ACCESS_REMOTE_WRITE) ? 1 : 0; 610 mr->hwmr.local_wr = (acc & IB_ACCESS_LOCAL_WRITE) ? 1 : 0; 611 mr->hwmr.mw_bind = (acc & IB_ACCESS_MW_BIND) ? 1 : 0; 612 mr->hwmr.remote_atomic = (acc & IB_ACCESS_REMOTE_ATOMIC) ? 1 : 0; 613 mr->hwmr.num_pbls = num_pbls; 614 615 status = ocrdma_mbx_alloc_lkey(dev, &mr->hwmr, pdid, addr_check); 616 if (status) 617 return status; 618 619 mr->ibmr.lkey = mr->hwmr.lkey; 620 if (mr->hwmr.remote_wr || mr->hwmr.remote_rd) 621 mr->ibmr.rkey = mr->hwmr.lkey; 622 return 0; 623 } 624 625 struct ib_mr *ocrdma_get_dma_mr(struct ib_pd *ibpd, int acc) 626 { 627 int status; 628 struct ocrdma_mr *mr; 629 struct ocrdma_pd *pd = get_ocrdma_pd(ibpd); 630 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device); 631 632 if (acc & IB_ACCESS_REMOTE_WRITE && !(acc & IB_ACCESS_LOCAL_WRITE)) { 633 pr_err("%s err, invalid access rights\n", __func__); 634 return ERR_PTR(-EINVAL); 635 } 636 637 mr = kzalloc(sizeof(*mr), GFP_KERNEL); 638 if (!mr) 639 return ERR_PTR(-ENOMEM); 640 641 status = ocrdma_alloc_lkey(dev, mr, pd->id, acc, 0, 642 OCRDMA_ADDR_CHECK_DISABLE); 643 if (status) { 644 kfree(mr); 645 return ERR_PTR(status); 646 } 647 648 return &mr->ibmr; 649 } 650 651 static void ocrdma_free_mr_pbl_tbl(struct ocrdma_dev *dev, 652 struct ocrdma_hw_mr *mr) 653 { 654 struct pci_dev *pdev = dev->nic_info.pdev; 655 int i = 0; 656 657 if (mr->pbl_table) { 658 for (i = 0; i < mr->num_pbls; i++) { 659 if (!mr->pbl_table[i].va) 660 continue; 661 dma_free_coherent(&pdev->dev, mr->pbl_size, 662 mr->pbl_table[i].va, 663 mr->pbl_table[i].pa); 664 } 665 kfree(mr->pbl_table); 666 mr->pbl_table = NULL; 667 } 668 } 669 670 static int ocrdma_get_pbl_info(struct ocrdma_dev *dev, struct ocrdma_mr *mr, 671 u32 num_pbes) 672 { 673 u32 num_pbls = 0; 674 u32 idx = 0; 675 int status = 0; 676 u32 pbl_size; 677 678 do { 679 pbl_size = OCRDMA_MIN_HPAGE_SIZE * (1 << idx); 680 if (pbl_size > MAX_OCRDMA_PBL_SIZE) { 681 status = -EFAULT; 682 break; 683 } 684 num_pbls = roundup(num_pbes, (pbl_size / sizeof(u64))); 685 num_pbls = num_pbls / (pbl_size / sizeof(u64)); 686 idx++; 687 } while (num_pbls >= dev->attr.max_num_mr_pbl); 688 689 mr->hwmr.num_pbes = num_pbes; 690 mr->hwmr.num_pbls = num_pbls; 691 mr->hwmr.pbl_size = pbl_size; 692 return status; 693 } 694 695 static int ocrdma_build_pbl_tbl(struct ocrdma_dev *dev, struct ocrdma_hw_mr *mr) 696 { 697 int status = 0; 698 int i; 699 u32 dma_len = mr->pbl_size; 700 struct pci_dev *pdev = dev->nic_info.pdev; 701 void *va; 702 dma_addr_t pa; 703 704 mr->pbl_table = kzalloc(sizeof(struct ocrdma_pbl) * 705 mr->num_pbls, GFP_KERNEL); 706 707 if (!mr->pbl_table) 708 return -ENOMEM; 709 710 for (i = 0; i < mr->num_pbls; i++) { 711 va = dma_alloc_coherent(&pdev->dev, dma_len, &pa, GFP_KERNEL); 712 if (!va) { 713 ocrdma_free_mr_pbl_tbl(dev, mr); 714 status = -ENOMEM; 715 break; 716 } 717 memset(va, 0, dma_len); 718 mr->pbl_table[i].va = va; 719 mr->pbl_table[i].pa = pa; 720 } 721 return status; 722 } 723 724 static void build_user_pbes(struct ocrdma_dev *dev, struct ocrdma_mr *mr, 725 u32 num_pbes) 726 { 727 struct ocrdma_pbe *pbe; 728 struct scatterlist *sg; 729 struct ocrdma_pbl *pbl_tbl = mr->hwmr.pbl_table; 730 struct ib_umem *umem = mr->umem; 731 int shift, pg_cnt, pages, pbe_cnt, entry, total_num_pbes = 0; 732 733 if (!mr->hwmr.num_pbes) 734 return; 735 736 pbe = (struct ocrdma_pbe *)pbl_tbl->va; 737 pbe_cnt = 0; 738 739 shift = ilog2(umem->page_size); 740 741 for_each_sg(umem->sg_head.sgl, sg, umem->nmap, entry) { 742 pages = sg_dma_len(sg) >> shift; 743 for (pg_cnt = 0; pg_cnt < pages; pg_cnt++) { 744 /* store the page address in pbe */ 745 pbe->pa_lo = 746 cpu_to_le32(sg_dma_address 747 (sg) + 748 (umem->page_size * pg_cnt)); 749 pbe->pa_hi = 750 cpu_to_le32(upper_32_bits 751 ((sg_dma_address 752 (sg) + 753 umem->page_size * pg_cnt))); 754 pbe_cnt += 1; 755 total_num_pbes += 1; 756 pbe++; 757 758 /* if done building pbes, issue the mbx cmd. */ 759 if (total_num_pbes == num_pbes) 760 return; 761 762 /* if the given pbl is full storing the pbes, 763 * move to next pbl. 764 */ 765 if (pbe_cnt == 766 (mr->hwmr.pbl_size / sizeof(u64))) { 767 pbl_tbl++; 768 pbe = (struct ocrdma_pbe *)pbl_tbl->va; 769 pbe_cnt = 0; 770 } 771 772 } 773 } 774 } 775 776 struct ib_mr *ocrdma_reg_user_mr(struct ib_pd *ibpd, u64 start, u64 len, 777 u64 usr_addr, int acc, struct ib_udata *udata) 778 { 779 int status = -ENOMEM; 780 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device); 781 struct ocrdma_mr *mr; 782 struct ocrdma_pd *pd; 783 u32 num_pbes; 784 785 pd = get_ocrdma_pd(ibpd); 786 787 if (acc & IB_ACCESS_REMOTE_WRITE && !(acc & IB_ACCESS_LOCAL_WRITE)) 788 return ERR_PTR(-EINVAL); 789 790 mr = kzalloc(sizeof(*mr), GFP_KERNEL); 791 if (!mr) 792 return ERR_PTR(status); 793 mr->umem = ib_umem_get(ibpd->uobject->context, start, len, acc, 0); 794 if (IS_ERR(mr->umem)) { 795 status = -EFAULT; 796 goto umem_err; 797 } 798 num_pbes = ib_umem_page_count(mr->umem); 799 status = ocrdma_get_pbl_info(dev, mr, num_pbes); 800 if (status) 801 goto umem_err; 802 803 mr->hwmr.pbe_size = mr->umem->page_size; 804 mr->hwmr.fbo = mr->umem->offset; 805 mr->hwmr.va = usr_addr; 806 mr->hwmr.len = len; 807 mr->hwmr.remote_wr = (acc & IB_ACCESS_REMOTE_WRITE) ? 1 : 0; 808 mr->hwmr.remote_rd = (acc & IB_ACCESS_REMOTE_READ) ? 1 : 0; 809 mr->hwmr.local_wr = (acc & IB_ACCESS_LOCAL_WRITE) ? 1 : 0; 810 mr->hwmr.local_rd = 1; 811 mr->hwmr.remote_atomic = (acc & IB_ACCESS_REMOTE_ATOMIC) ? 1 : 0; 812 status = ocrdma_build_pbl_tbl(dev, &mr->hwmr); 813 if (status) 814 goto umem_err; 815 build_user_pbes(dev, mr, num_pbes); 816 status = ocrdma_reg_mr(dev, &mr->hwmr, pd->id, acc); 817 if (status) 818 goto mbx_err; 819 mr->ibmr.lkey = mr->hwmr.lkey; 820 if (mr->hwmr.remote_wr || mr->hwmr.remote_rd) 821 mr->ibmr.rkey = mr->hwmr.lkey; 822 823 return &mr->ibmr; 824 825 mbx_err: 826 ocrdma_free_mr_pbl_tbl(dev, &mr->hwmr); 827 umem_err: 828 kfree(mr); 829 return ERR_PTR(status); 830 } 831 832 int ocrdma_dereg_mr(struct ib_mr *ib_mr) 833 { 834 struct ocrdma_mr *mr = get_ocrdma_mr(ib_mr); 835 struct ocrdma_dev *dev = get_ocrdma_dev(ib_mr->device); 836 int status; 837 838 status = ocrdma_mbx_dealloc_lkey(dev, mr->hwmr.fr_mr, mr->hwmr.lkey); 839 840 ocrdma_free_mr_pbl_tbl(dev, &mr->hwmr); 841 842 /* it could be user registered memory. */ 843 if (mr->umem) 844 ib_umem_release(mr->umem); 845 kfree(mr); 846 return status; 847 } 848 849 static int ocrdma_copy_cq_uresp(struct ocrdma_dev *dev, struct ocrdma_cq *cq, 850 struct ib_udata *udata, 851 struct ib_ucontext *ib_ctx) 852 { 853 int status; 854 struct ocrdma_ucontext *uctx = get_ocrdma_ucontext(ib_ctx); 855 struct ocrdma_create_cq_uresp uresp; 856 857 memset(&uresp, 0, sizeof(uresp)); 858 uresp.cq_id = cq->id; 859 uresp.page_size = PAGE_ALIGN(cq->len); 860 uresp.num_pages = 1; 861 uresp.max_hw_cqe = cq->max_hw_cqe; 862 uresp.page_addr[0] = cq->pa; 863 uresp.db_page_addr = ocrdma_get_db_addr(dev, uctx->cntxt_pd->id); 864 uresp.db_page_size = dev->nic_info.db_page_size; 865 uresp.phase_change = cq->phase_change ? 1 : 0; 866 status = ib_copy_to_udata(udata, &uresp, sizeof(uresp)); 867 if (status) { 868 pr_err("%s(%d) copy error cqid=0x%x.\n", 869 __func__, dev->id, cq->id); 870 goto err; 871 } 872 status = ocrdma_add_mmap(uctx, uresp.db_page_addr, uresp.db_page_size); 873 if (status) 874 goto err; 875 status = ocrdma_add_mmap(uctx, uresp.page_addr[0], uresp.page_size); 876 if (status) { 877 ocrdma_del_mmap(uctx, uresp.db_page_addr, uresp.db_page_size); 878 goto err; 879 } 880 cq->ucontext = uctx; 881 err: 882 return status; 883 } 884 885 struct ib_cq *ocrdma_create_cq(struct ib_device *ibdev, int entries, int vector, 886 struct ib_ucontext *ib_ctx, 887 struct ib_udata *udata) 888 { 889 struct ocrdma_cq *cq; 890 struct ocrdma_dev *dev = get_ocrdma_dev(ibdev); 891 struct ocrdma_ucontext *uctx = NULL; 892 u16 pd_id = 0; 893 int status; 894 struct ocrdma_create_cq_ureq ureq; 895 896 if (udata) { 897 if (ib_copy_from_udata(&ureq, udata, sizeof(ureq))) 898 return ERR_PTR(-EFAULT); 899 } else 900 ureq.dpp_cq = 0; 901 cq = kzalloc(sizeof(*cq), GFP_KERNEL); 902 if (!cq) 903 return ERR_PTR(-ENOMEM); 904 905 spin_lock_init(&cq->cq_lock); 906 spin_lock_init(&cq->comp_handler_lock); 907 INIT_LIST_HEAD(&cq->sq_head); 908 INIT_LIST_HEAD(&cq->rq_head); 909 cq->first_arm = true; 910 911 if (ib_ctx) { 912 uctx = get_ocrdma_ucontext(ib_ctx); 913 pd_id = uctx->cntxt_pd->id; 914 } 915 916 status = ocrdma_mbx_create_cq(dev, cq, entries, ureq.dpp_cq, pd_id); 917 if (status) { 918 kfree(cq); 919 return ERR_PTR(status); 920 } 921 if (ib_ctx) { 922 status = ocrdma_copy_cq_uresp(dev, cq, udata, ib_ctx); 923 if (status) 924 goto ctx_err; 925 } 926 cq->phase = OCRDMA_CQE_VALID; 927 dev->cq_tbl[cq->id] = cq; 928 return &cq->ibcq; 929 930 ctx_err: 931 ocrdma_mbx_destroy_cq(dev, cq); 932 kfree(cq); 933 return ERR_PTR(status); 934 } 935 936 int ocrdma_resize_cq(struct ib_cq *ibcq, int new_cnt, 937 struct ib_udata *udata) 938 { 939 int status = 0; 940 struct ocrdma_cq *cq = get_ocrdma_cq(ibcq); 941 942 if (new_cnt < 1 || new_cnt > cq->max_hw_cqe) { 943 status = -EINVAL; 944 return status; 945 } 946 ibcq->cqe = new_cnt; 947 return status; 948 } 949 950 static void ocrdma_flush_cq(struct ocrdma_cq *cq) 951 { 952 int cqe_cnt; 953 int valid_count = 0; 954 unsigned long flags; 955 956 struct ocrdma_dev *dev = get_ocrdma_dev(cq->ibcq.device); 957 struct ocrdma_cqe *cqe = NULL; 958 959 cqe = cq->va; 960 cqe_cnt = cq->cqe_cnt; 961 962 /* Last irq might have scheduled a polling thread 963 * sync-up with it before hard flushing. 964 */ 965 spin_lock_irqsave(&cq->cq_lock, flags); 966 while (cqe_cnt) { 967 if (is_cqe_valid(cq, cqe)) 968 valid_count++; 969 cqe++; 970 cqe_cnt--; 971 } 972 ocrdma_ring_cq_db(dev, cq->id, false, false, valid_count); 973 spin_unlock_irqrestore(&cq->cq_lock, flags); 974 } 975 976 int ocrdma_destroy_cq(struct ib_cq *ibcq) 977 { 978 int status; 979 struct ocrdma_cq *cq = get_ocrdma_cq(ibcq); 980 struct ocrdma_eq *eq = NULL; 981 struct ocrdma_dev *dev = get_ocrdma_dev(ibcq->device); 982 int pdid = 0; 983 u32 irq, indx; 984 985 dev->cq_tbl[cq->id] = NULL; 986 indx = ocrdma_get_eq_table_index(dev, cq->eqn); 987 if (indx == -EINVAL) 988 BUG(); 989 990 eq = &dev->eq_tbl[indx]; 991 irq = ocrdma_get_irq(dev, eq); 992 synchronize_irq(irq); 993 ocrdma_flush_cq(cq); 994 995 status = ocrdma_mbx_destroy_cq(dev, cq); 996 if (cq->ucontext) { 997 pdid = cq->ucontext->cntxt_pd->id; 998 ocrdma_del_mmap(cq->ucontext, (u64) cq->pa, 999 PAGE_ALIGN(cq->len)); 1000 ocrdma_del_mmap(cq->ucontext, 1001 ocrdma_get_db_addr(dev, pdid), 1002 dev->nic_info.db_page_size); 1003 } 1004 1005 kfree(cq); 1006 return status; 1007 } 1008 1009 static int ocrdma_add_qpn_map(struct ocrdma_dev *dev, struct ocrdma_qp *qp) 1010 { 1011 int status = -EINVAL; 1012 1013 if (qp->id < OCRDMA_MAX_QP && dev->qp_tbl[qp->id] == NULL) { 1014 dev->qp_tbl[qp->id] = qp; 1015 status = 0; 1016 } 1017 return status; 1018 } 1019 1020 static void ocrdma_del_qpn_map(struct ocrdma_dev *dev, struct ocrdma_qp *qp) 1021 { 1022 dev->qp_tbl[qp->id] = NULL; 1023 } 1024 1025 static int ocrdma_check_qp_params(struct ib_pd *ibpd, struct ocrdma_dev *dev, 1026 struct ib_qp_init_attr *attrs) 1027 { 1028 if ((attrs->qp_type != IB_QPT_GSI) && 1029 (attrs->qp_type != IB_QPT_RC) && 1030 (attrs->qp_type != IB_QPT_UC) && 1031 (attrs->qp_type != IB_QPT_UD)) { 1032 pr_err("%s(%d) unsupported qp type=0x%x requested\n", 1033 __func__, dev->id, attrs->qp_type); 1034 return -EINVAL; 1035 } 1036 /* Skip the check for QP1 to support CM size of 128 */ 1037 if ((attrs->qp_type != IB_QPT_GSI) && 1038 (attrs->cap.max_send_wr > dev->attr.max_wqe)) { 1039 pr_err("%s(%d) unsupported send_wr=0x%x requested\n", 1040 __func__, dev->id, attrs->cap.max_send_wr); 1041 pr_err("%s(%d) supported send_wr=0x%x\n", 1042 __func__, dev->id, dev->attr.max_wqe); 1043 return -EINVAL; 1044 } 1045 if (!attrs->srq && (attrs->cap.max_recv_wr > dev->attr.max_rqe)) { 1046 pr_err("%s(%d) unsupported recv_wr=0x%x requested\n", 1047 __func__, dev->id, attrs->cap.max_recv_wr); 1048 pr_err("%s(%d) supported recv_wr=0x%x\n", 1049 __func__, dev->id, dev->attr.max_rqe); 1050 return -EINVAL; 1051 } 1052 if (attrs->cap.max_inline_data > dev->attr.max_inline_data) { 1053 pr_err("%s(%d) unsupported inline data size=0x%x requested\n", 1054 __func__, dev->id, attrs->cap.max_inline_data); 1055 pr_err("%s(%d) supported inline data size=0x%x\n", 1056 __func__, dev->id, dev->attr.max_inline_data); 1057 return -EINVAL; 1058 } 1059 if (attrs->cap.max_send_sge > dev->attr.max_send_sge) { 1060 pr_err("%s(%d) unsupported send_sge=0x%x requested\n", 1061 __func__, dev->id, attrs->cap.max_send_sge); 1062 pr_err("%s(%d) supported send_sge=0x%x\n", 1063 __func__, dev->id, dev->attr.max_send_sge); 1064 return -EINVAL; 1065 } 1066 if (attrs->cap.max_recv_sge > dev->attr.max_recv_sge) { 1067 pr_err("%s(%d) unsupported recv_sge=0x%x requested\n", 1068 __func__, dev->id, attrs->cap.max_recv_sge); 1069 pr_err("%s(%d) supported recv_sge=0x%x\n", 1070 __func__, dev->id, dev->attr.max_recv_sge); 1071 return -EINVAL; 1072 } 1073 /* unprivileged user space cannot create special QP */ 1074 if (ibpd->uobject && attrs->qp_type == IB_QPT_GSI) { 1075 pr_err 1076 ("%s(%d) Userspace can't create special QPs of type=0x%x\n", 1077 __func__, dev->id, attrs->qp_type); 1078 return -EINVAL; 1079 } 1080 /* allow creating only one GSI type of QP */ 1081 if (attrs->qp_type == IB_QPT_GSI && dev->gsi_qp_created) { 1082 pr_err("%s(%d) GSI special QPs already created.\n", 1083 __func__, dev->id); 1084 return -EINVAL; 1085 } 1086 /* verify consumer QPs are not trying to use GSI QP's CQ */ 1087 if ((attrs->qp_type != IB_QPT_GSI) && (dev->gsi_qp_created)) { 1088 if ((dev->gsi_sqcq == get_ocrdma_cq(attrs->send_cq)) || 1089 (dev->gsi_rqcq == get_ocrdma_cq(attrs->recv_cq))) { 1090 pr_err("%s(%d) Consumer QP cannot use GSI CQs.\n", 1091 __func__, dev->id); 1092 return -EINVAL; 1093 } 1094 } 1095 return 0; 1096 } 1097 1098 static int ocrdma_copy_qp_uresp(struct ocrdma_qp *qp, 1099 struct ib_udata *udata, int dpp_offset, 1100 int dpp_credit_lmt, int srq) 1101 { 1102 int status = 0; 1103 u64 usr_db; 1104 struct ocrdma_create_qp_uresp uresp; 1105 struct ocrdma_dev *dev = qp->dev; 1106 struct ocrdma_pd *pd = qp->pd; 1107 1108 memset(&uresp, 0, sizeof(uresp)); 1109 usr_db = dev->nic_info.unmapped_db + 1110 (pd->id * dev->nic_info.db_page_size); 1111 uresp.qp_id = qp->id; 1112 uresp.sq_dbid = qp->sq.dbid; 1113 uresp.num_sq_pages = 1; 1114 uresp.sq_page_size = PAGE_ALIGN(qp->sq.len); 1115 uresp.sq_page_addr[0] = qp->sq.pa; 1116 uresp.num_wqe_allocated = qp->sq.max_cnt; 1117 if (!srq) { 1118 uresp.rq_dbid = qp->rq.dbid; 1119 uresp.num_rq_pages = 1; 1120 uresp.rq_page_size = PAGE_ALIGN(qp->rq.len); 1121 uresp.rq_page_addr[0] = qp->rq.pa; 1122 uresp.num_rqe_allocated = qp->rq.max_cnt; 1123 } 1124 uresp.db_page_addr = usr_db; 1125 uresp.db_page_size = dev->nic_info.db_page_size; 1126 uresp.db_sq_offset = OCRDMA_DB_GEN2_SQ_OFFSET; 1127 uresp.db_rq_offset = OCRDMA_DB_GEN2_RQ_OFFSET; 1128 uresp.db_shift = OCRDMA_DB_RQ_SHIFT; 1129 1130 if (qp->dpp_enabled) { 1131 uresp.dpp_credit = dpp_credit_lmt; 1132 uresp.dpp_offset = dpp_offset; 1133 } 1134 status = ib_copy_to_udata(udata, &uresp, sizeof(uresp)); 1135 if (status) { 1136 pr_err("%s(%d) user copy error.\n", __func__, dev->id); 1137 goto err; 1138 } 1139 status = ocrdma_add_mmap(pd->uctx, uresp.sq_page_addr[0], 1140 uresp.sq_page_size); 1141 if (status) 1142 goto err; 1143 1144 if (!srq) { 1145 status = ocrdma_add_mmap(pd->uctx, uresp.rq_page_addr[0], 1146 uresp.rq_page_size); 1147 if (status) 1148 goto rq_map_err; 1149 } 1150 return status; 1151 rq_map_err: 1152 ocrdma_del_mmap(pd->uctx, uresp.sq_page_addr[0], uresp.sq_page_size); 1153 err: 1154 return status; 1155 } 1156 1157 static void ocrdma_set_qp_db(struct ocrdma_dev *dev, struct ocrdma_qp *qp, 1158 struct ocrdma_pd *pd) 1159 { 1160 if (ocrdma_get_asic_type(dev) == OCRDMA_ASIC_GEN_SKH_R) { 1161 qp->sq_db = dev->nic_info.db + 1162 (pd->id * dev->nic_info.db_page_size) + 1163 OCRDMA_DB_GEN2_SQ_OFFSET; 1164 qp->rq_db = dev->nic_info.db + 1165 (pd->id * dev->nic_info.db_page_size) + 1166 OCRDMA_DB_GEN2_RQ_OFFSET; 1167 } else { 1168 qp->sq_db = dev->nic_info.db + 1169 (pd->id * dev->nic_info.db_page_size) + 1170 OCRDMA_DB_SQ_OFFSET; 1171 qp->rq_db = dev->nic_info.db + 1172 (pd->id * dev->nic_info.db_page_size) + 1173 OCRDMA_DB_RQ_OFFSET; 1174 } 1175 } 1176 1177 static int ocrdma_alloc_wr_id_tbl(struct ocrdma_qp *qp) 1178 { 1179 qp->wqe_wr_id_tbl = 1180 kzalloc(sizeof(*(qp->wqe_wr_id_tbl)) * qp->sq.max_cnt, 1181 GFP_KERNEL); 1182 if (qp->wqe_wr_id_tbl == NULL) 1183 return -ENOMEM; 1184 qp->rqe_wr_id_tbl = 1185 kzalloc(sizeof(u64) * qp->rq.max_cnt, GFP_KERNEL); 1186 if (qp->rqe_wr_id_tbl == NULL) 1187 return -ENOMEM; 1188 1189 return 0; 1190 } 1191 1192 static void ocrdma_set_qp_init_params(struct ocrdma_qp *qp, 1193 struct ocrdma_pd *pd, 1194 struct ib_qp_init_attr *attrs) 1195 { 1196 qp->pd = pd; 1197 spin_lock_init(&qp->q_lock); 1198 INIT_LIST_HEAD(&qp->sq_entry); 1199 INIT_LIST_HEAD(&qp->rq_entry); 1200 1201 qp->qp_type = attrs->qp_type; 1202 qp->cap_flags = OCRDMA_QP_INB_RD | OCRDMA_QP_INB_WR; 1203 qp->max_inline_data = attrs->cap.max_inline_data; 1204 qp->sq.max_sges = attrs->cap.max_send_sge; 1205 qp->rq.max_sges = attrs->cap.max_recv_sge; 1206 qp->state = OCRDMA_QPS_RST; 1207 qp->signaled = (attrs->sq_sig_type == IB_SIGNAL_ALL_WR) ? true : false; 1208 } 1209 1210 static void ocrdma_store_gsi_qp_cq(struct ocrdma_dev *dev, 1211 struct ib_qp_init_attr *attrs) 1212 { 1213 if (attrs->qp_type == IB_QPT_GSI) { 1214 dev->gsi_qp_created = 1; 1215 dev->gsi_sqcq = get_ocrdma_cq(attrs->send_cq); 1216 dev->gsi_rqcq = get_ocrdma_cq(attrs->recv_cq); 1217 } 1218 } 1219 1220 struct ib_qp *ocrdma_create_qp(struct ib_pd *ibpd, 1221 struct ib_qp_init_attr *attrs, 1222 struct ib_udata *udata) 1223 { 1224 int status; 1225 struct ocrdma_pd *pd = get_ocrdma_pd(ibpd); 1226 struct ocrdma_qp *qp; 1227 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device); 1228 struct ocrdma_create_qp_ureq ureq; 1229 u16 dpp_credit_lmt, dpp_offset; 1230 1231 status = ocrdma_check_qp_params(ibpd, dev, attrs); 1232 if (status) 1233 goto gen_err; 1234 1235 memset(&ureq, 0, sizeof(ureq)); 1236 if (udata) { 1237 if (ib_copy_from_udata(&ureq, udata, sizeof(ureq))) 1238 return ERR_PTR(-EFAULT); 1239 } 1240 qp = kzalloc(sizeof(*qp), GFP_KERNEL); 1241 if (!qp) { 1242 status = -ENOMEM; 1243 goto gen_err; 1244 } 1245 qp->dev = dev; 1246 ocrdma_set_qp_init_params(qp, pd, attrs); 1247 if (udata == NULL) 1248 qp->cap_flags |= (OCRDMA_QP_MW_BIND | OCRDMA_QP_LKEY0 | 1249 OCRDMA_QP_FAST_REG); 1250 1251 mutex_lock(&dev->dev_lock); 1252 status = ocrdma_mbx_create_qp(qp, attrs, ureq.enable_dpp_cq, 1253 ureq.dpp_cq_id, 1254 &dpp_offset, &dpp_credit_lmt); 1255 if (status) 1256 goto mbx_err; 1257 1258 /* user space QP's wr_id table are managed in library */ 1259 if (udata == NULL) { 1260 status = ocrdma_alloc_wr_id_tbl(qp); 1261 if (status) 1262 goto map_err; 1263 } 1264 1265 status = ocrdma_add_qpn_map(dev, qp); 1266 if (status) 1267 goto map_err; 1268 ocrdma_set_qp_db(dev, qp, pd); 1269 if (udata) { 1270 status = ocrdma_copy_qp_uresp(qp, udata, dpp_offset, 1271 dpp_credit_lmt, 1272 (attrs->srq != NULL)); 1273 if (status) 1274 goto cpy_err; 1275 } 1276 ocrdma_store_gsi_qp_cq(dev, attrs); 1277 qp->ibqp.qp_num = qp->id; 1278 mutex_unlock(&dev->dev_lock); 1279 return &qp->ibqp; 1280 1281 cpy_err: 1282 ocrdma_del_qpn_map(dev, qp); 1283 map_err: 1284 ocrdma_mbx_destroy_qp(dev, qp); 1285 mbx_err: 1286 mutex_unlock(&dev->dev_lock); 1287 kfree(qp->wqe_wr_id_tbl); 1288 kfree(qp->rqe_wr_id_tbl); 1289 kfree(qp); 1290 pr_err("%s(%d) error=%d\n", __func__, dev->id, status); 1291 gen_err: 1292 return ERR_PTR(status); 1293 } 1294 1295 int _ocrdma_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, 1296 int attr_mask) 1297 { 1298 int status = 0; 1299 struct ocrdma_qp *qp; 1300 struct ocrdma_dev *dev; 1301 enum ib_qp_state old_qps; 1302 1303 qp = get_ocrdma_qp(ibqp); 1304 dev = qp->dev; 1305 if (attr_mask & IB_QP_STATE) 1306 status = ocrdma_qp_state_change(qp, attr->qp_state, &old_qps); 1307 /* if new and previous states are same hw doesn't need to 1308 * know about it. 1309 */ 1310 if (status < 0) 1311 return status; 1312 status = ocrdma_mbx_modify_qp(dev, qp, attr, attr_mask); 1313 1314 return status; 1315 } 1316 1317 int ocrdma_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, 1318 int attr_mask, struct ib_udata *udata) 1319 { 1320 unsigned long flags; 1321 int status = -EINVAL; 1322 struct ocrdma_qp *qp; 1323 struct ocrdma_dev *dev; 1324 enum ib_qp_state old_qps, new_qps; 1325 1326 qp = get_ocrdma_qp(ibqp); 1327 dev = qp->dev; 1328 1329 /* syncronize with multiple context trying to change, retrive qps */ 1330 mutex_lock(&dev->dev_lock); 1331 /* syncronize with wqe, rqe posting and cqe processing contexts */ 1332 spin_lock_irqsave(&qp->q_lock, flags); 1333 old_qps = get_ibqp_state(qp->state); 1334 if (attr_mask & IB_QP_STATE) 1335 new_qps = attr->qp_state; 1336 else 1337 new_qps = old_qps; 1338 spin_unlock_irqrestore(&qp->q_lock, flags); 1339 1340 if (!ib_modify_qp_is_ok(old_qps, new_qps, ibqp->qp_type, attr_mask, 1341 IB_LINK_LAYER_ETHERNET)) { 1342 pr_err("%s(%d) invalid attribute mask=0x%x specified for\n" 1343 "qpn=0x%x of type=0x%x old_qps=0x%x, new_qps=0x%x\n", 1344 __func__, dev->id, attr_mask, qp->id, ibqp->qp_type, 1345 old_qps, new_qps); 1346 goto param_err; 1347 } 1348 1349 status = _ocrdma_modify_qp(ibqp, attr, attr_mask); 1350 if (status > 0) 1351 status = 0; 1352 param_err: 1353 mutex_unlock(&dev->dev_lock); 1354 return status; 1355 } 1356 1357 static enum ib_mtu ocrdma_mtu_int_to_enum(u16 mtu) 1358 { 1359 switch (mtu) { 1360 case 256: 1361 return IB_MTU_256; 1362 case 512: 1363 return IB_MTU_512; 1364 case 1024: 1365 return IB_MTU_1024; 1366 case 2048: 1367 return IB_MTU_2048; 1368 case 4096: 1369 return IB_MTU_4096; 1370 default: 1371 return IB_MTU_1024; 1372 } 1373 } 1374 1375 static int ocrdma_to_ib_qp_acc_flags(int qp_cap_flags) 1376 { 1377 int ib_qp_acc_flags = 0; 1378 1379 if (qp_cap_flags & OCRDMA_QP_INB_WR) 1380 ib_qp_acc_flags |= IB_ACCESS_REMOTE_WRITE; 1381 if (qp_cap_flags & OCRDMA_QP_INB_RD) 1382 ib_qp_acc_flags |= IB_ACCESS_LOCAL_WRITE; 1383 return ib_qp_acc_flags; 1384 } 1385 1386 int ocrdma_query_qp(struct ib_qp *ibqp, 1387 struct ib_qp_attr *qp_attr, 1388 int attr_mask, struct ib_qp_init_attr *qp_init_attr) 1389 { 1390 int status; 1391 u32 qp_state; 1392 struct ocrdma_qp_params params; 1393 struct ocrdma_qp *qp = get_ocrdma_qp(ibqp); 1394 struct ocrdma_dev *dev = qp->dev; 1395 1396 memset(¶ms, 0, sizeof(params)); 1397 mutex_lock(&dev->dev_lock); 1398 status = ocrdma_mbx_query_qp(dev, qp, ¶ms); 1399 mutex_unlock(&dev->dev_lock); 1400 if (status) 1401 goto mbx_err; 1402 qp_attr->qp_state = get_ibqp_state(IB_QPS_INIT); 1403 qp_attr->cur_qp_state = get_ibqp_state(IB_QPS_INIT); 1404 qp_attr->path_mtu = 1405 ocrdma_mtu_int_to_enum(params.path_mtu_pkey_indx & 1406 OCRDMA_QP_PARAMS_PATH_MTU_MASK) >> 1407 OCRDMA_QP_PARAMS_PATH_MTU_SHIFT; 1408 qp_attr->path_mig_state = IB_MIG_MIGRATED; 1409 qp_attr->rq_psn = params.hop_lmt_rq_psn & OCRDMA_QP_PARAMS_RQ_PSN_MASK; 1410 qp_attr->sq_psn = params.tclass_sq_psn & OCRDMA_QP_PARAMS_SQ_PSN_MASK; 1411 qp_attr->dest_qp_num = 1412 params.ack_to_rnr_rtc_dest_qpn & OCRDMA_QP_PARAMS_DEST_QPN_MASK; 1413 1414 qp_attr->qp_access_flags = ocrdma_to_ib_qp_acc_flags(qp->cap_flags); 1415 qp_attr->cap.max_send_wr = qp->sq.max_cnt - 1; 1416 qp_attr->cap.max_recv_wr = qp->rq.max_cnt - 1; 1417 qp_attr->cap.max_send_sge = qp->sq.max_sges; 1418 qp_attr->cap.max_recv_sge = qp->rq.max_sges; 1419 qp_attr->cap.max_inline_data = qp->max_inline_data; 1420 qp_init_attr->cap = qp_attr->cap; 1421 memcpy(&qp_attr->ah_attr.grh.dgid, ¶ms.dgid[0], 1422 sizeof(params.dgid)); 1423 qp_attr->ah_attr.grh.flow_label = params.rnt_rc_sl_fl & 1424 OCRDMA_QP_PARAMS_FLOW_LABEL_MASK; 1425 qp_attr->ah_attr.grh.sgid_index = qp->sgid_idx; 1426 qp_attr->ah_attr.grh.hop_limit = (params.hop_lmt_rq_psn & 1427 OCRDMA_QP_PARAMS_HOP_LMT_MASK) >> 1428 OCRDMA_QP_PARAMS_HOP_LMT_SHIFT; 1429 qp_attr->ah_attr.grh.traffic_class = (params.tclass_sq_psn & 1430 OCRDMA_QP_PARAMS_TCLASS_MASK) >> 1431 OCRDMA_QP_PARAMS_TCLASS_SHIFT; 1432 1433 qp_attr->ah_attr.ah_flags = IB_AH_GRH; 1434 qp_attr->ah_attr.port_num = 1; 1435 qp_attr->ah_attr.sl = (params.rnt_rc_sl_fl & 1436 OCRDMA_QP_PARAMS_SL_MASK) >> 1437 OCRDMA_QP_PARAMS_SL_SHIFT; 1438 qp_attr->timeout = (params.ack_to_rnr_rtc_dest_qpn & 1439 OCRDMA_QP_PARAMS_ACK_TIMEOUT_MASK) >> 1440 OCRDMA_QP_PARAMS_ACK_TIMEOUT_SHIFT; 1441 qp_attr->rnr_retry = (params.ack_to_rnr_rtc_dest_qpn & 1442 OCRDMA_QP_PARAMS_RNR_RETRY_CNT_MASK) >> 1443 OCRDMA_QP_PARAMS_RNR_RETRY_CNT_SHIFT; 1444 qp_attr->retry_cnt = 1445 (params.rnt_rc_sl_fl & OCRDMA_QP_PARAMS_RETRY_CNT_MASK) >> 1446 OCRDMA_QP_PARAMS_RETRY_CNT_SHIFT; 1447 qp_attr->min_rnr_timer = 0; 1448 qp_attr->pkey_index = 0; 1449 qp_attr->port_num = 1; 1450 qp_attr->ah_attr.src_path_bits = 0; 1451 qp_attr->ah_attr.static_rate = 0; 1452 qp_attr->alt_pkey_index = 0; 1453 qp_attr->alt_port_num = 0; 1454 qp_attr->alt_timeout = 0; 1455 memset(&qp_attr->alt_ah_attr, 0, sizeof(qp_attr->alt_ah_attr)); 1456 qp_state = (params.max_sge_recv_flags & OCRDMA_QP_PARAMS_STATE_MASK) >> 1457 OCRDMA_QP_PARAMS_STATE_SHIFT; 1458 qp_attr->sq_draining = (qp_state == OCRDMA_QPS_SQ_DRAINING) ? 1 : 0; 1459 qp_attr->max_dest_rd_atomic = 1460 params.max_ord_ird >> OCRDMA_QP_PARAMS_MAX_ORD_SHIFT; 1461 qp_attr->max_rd_atomic = 1462 params.max_ord_ird & OCRDMA_QP_PARAMS_MAX_IRD_MASK; 1463 qp_attr->en_sqd_async_notify = (params.max_sge_recv_flags & 1464 OCRDMA_QP_PARAMS_FLAGS_SQD_ASYNC) ? 1 : 0; 1465 mbx_err: 1466 return status; 1467 } 1468 1469 static void ocrdma_srq_toggle_bit(struct ocrdma_srq *srq, int idx) 1470 { 1471 int i = idx / 32; 1472 unsigned int mask = (1 << (idx % 32)); 1473 1474 if (srq->idx_bit_fields[i] & mask) 1475 srq->idx_bit_fields[i] &= ~mask; 1476 else 1477 srq->idx_bit_fields[i] |= mask; 1478 } 1479 1480 static int ocrdma_hwq_free_cnt(struct ocrdma_qp_hwq_info *q) 1481 { 1482 return ((q->max_wqe_idx - q->head) + q->tail) % q->max_cnt; 1483 } 1484 1485 static int is_hw_sq_empty(struct ocrdma_qp *qp) 1486 { 1487 return (qp->sq.tail == qp->sq.head); 1488 } 1489 1490 static int is_hw_rq_empty(struct ocrdma_qp *qp) 1491 { 1492 return (qp->rq.tail == qp->rq.head); 1493 } 1494 1495 static void *ocrdma_hwq_head(struct ocrdma_qp_hwq_info *q) 1496 { 1497 return q->va + (q->head * q->entry_size); 1498 } 1499 1500 static void *ocrdma_hwq_head_from_idx(struct ocrdma_qp_hwq_info *q, 1501 u32 idx) 1502 { 1503 return q->va + (idx * q->entry_size); 1504 } 1505 1506 static void ocrdma_hwq_inc_head(struct ocrdma_qp_hwq_info *q) 1507 { 1508 q->head = (q->head + 1) & q->max_wqe_idx; 1509 } 1510 1511 static void ocrdma_hwq_inc_tail(struct ocrdma_qp_hwq_info *q) 1512 { 1513 q->tail = (q->tail + 1) & q->max_wqe_idx; 1514 } 1515 1516 /* discard the cqe for a given QP */ 1517 static void ocrdma_discard_cqes(struct ocrdma_qp *qp, struct ocrdma_cq *cq) 1518 { 1519 unsigned long cq_flags; 1520 unsigned long flags; 1521 int discard_cnt = 0; 1522 u32 cur_getp, stop_getp; 1523 struct ocrdma_cqe *cqe; 1524 u32 qpn = 0, wqe_idx = 0; 1525 1526 spin_lock_irqsave(&cq->cq_lock, cq_flags); 1527 1528 /* traverse through the CQEs in the hw CQ, 1529 * find the matching CQE for a given qp, 1530 * mark the matching one discarded by clearing qpn. 1531 * ring the doorbell in the poll_cq() as 1532 * we don't complete out of order cqe. 1533 */ 1534 1535 cur_getp = cq->getp; 1536 /* find upto when do we reap the cq. */ 1537 stop_getp = cur_getp; 1538 do { 1539 if (is_hw_sq_empty(qp) && (!qp->srq && is_hw_rq_empty(qp))) 1540 break; 1541 1542 cqe = cq->va + cur_getp; 1543 /* if (a) done reaping whole hw cq, or 1544 * (b) qp_xq becomes empty. 1545 * then exit 1546 */ 1547 qpn = cqe->cmn.qpn & OCRDMA_CQE_QPN_MASK; 1548 /* if previously discarded cqe found, skip that too. */ 1549 /* check for matching qp */ 1550 if (qpn == 0 || qpn != qp->id) 1551 goto skip_cqe; 1552 1553 if (is_cqe_for_sq(cqe)) { 1554 ocrdma_hwq_inc_tail(&qp->sq); 1555 } else { 1556 if (qp->srq) { 1557 wqe_idx = (le32_to_cpu(cqe->rq.buftag_qpn) >> 1558 OCRDMA_CQE_BUFTAG_SHIFT) & 1559 qp->srq->rq.max_wqe_idx; 1560 if (wqe_idx < 1) 1561 BUG(); 1562 spin_lock_irqsave(&qp->srq->q_lock, flags); 1563 ocrdma_hwq_inc_tail(&qp->srq->rq); 1564 ocrdma_srq_toggle_bit(qp->srq, wqe_idx - 1); 1565 spin_unlock_irqrestore(&qp->srq->q_lock, flags); 1566 1567 } else { 1568 ocrdma_hwq_inc_tail(&qp->rq); 1569 } 1570 } 1571 /* mark cqe discarded so that it is not picked up later 1572 * in the poll_cq(). 1573 */ 1574 discard_cnt += 1; 1575 cqe->cmn.qpn = 0; 1576 skip_cqe: 1577 cur_getp = (cur_getp + 1) % cq->max_hw_cqe; 1578 } while (cur_getp != stop_getp); 1579 spin_unlock_irqrestore(&cq->cq_lock, cq_flags); 1580 } 1581 1582 void ocrdma_del_flush_qp(struct ocrdma_qp *qp) 1583 { 1584 int found = false; 1585 unsigned long flags; 1586 struct ocrdma_dev *dev = qp->dev; 1587 /* sync with any active CQ poll */ 1588 1589 spin_lock_irqsave(&dev->flush_q_lock, flags); 1590 found = ocrdma_is_qp_in_sq_flushlist(qp->sq_cq, qp); 1591 if (found) 1592 list_del(&qp->sq_entry); 1593 if (!qp->srq) { 1594 found = ocrdma_is_qp_in_rq_flushlist(qp->rq_cq, qp); 1595 if (found) 1596 list_del(&qp->rq_entry); 1597 } 1598 spin_unlock_irqrestore(&dev->flush_q_lock, flags); 1599 } 1600 1601 int ocrdma_destroy_qp(struct ib_qp *ibqp) 1602 { 1603 int status; 1604 struct ocrdma_pd *pd; 1605 struct ocrdma_qp *qp; 1606 struct ocrdma_dev *dev; 1607 struct ib_qp_attr attrs; 1608 int attr_mask = IB_QP_STATE; 1609 unsigned long flags; 1610 1611 qp = get_ocrdma_qp(ibqp); 1612 dev = qp->dev; 1613 1614 attrs.qp_state = IB_QPS_ERR; 1615 pd = qp->pd; 1616 1617 /* change the QP state to ERROR */ 1618 _ocrdma_modify_qp(ibqp, &attrs, attr_mask); 1619 1620 /* ensure that CQEs for newly created QP (whose id may be same with 1621 * one which just getting destroyed are same), dont get 1622 * discarded until the old CQEs are discarded. 1623 */ 1624 mutex_lock(&dev->dev_lock); 1625 status = ocrdma_mbx_destroy_qp(dev, qp); 1626 1627 /* 1628 * acquire CQ lock while destroy is in progress, in order to 1629 * protect against proessing in-flight CQEs for this QP. 1630 */ 1631 spin_lock_irqsave(&qp->sq_cq->cq_lock, flags); 1632 if (qp->rq_cq && (qp->rq_cq != qp->sq_cq)) 1633 spin_lock(&qp->rq_cq->cq_lock); 1634 1635 ocrdma_del_qpn_map(dev, qp); 1636 1637 if (qp->rq_cq && (qp->rq_cq != qp->sq_cq)) 1638 spin_unlock(&qp->rq_cq->cq_lock); 1639 spin_unlock_irqrestore(&qp->sq_cq->cq_lock, flags); 1640 1641 if (!pd->uctx) { 1642 ocrdma_discard_cqes(qp, qp->sq_cq); 1643 ocrdma_discard_cqes(qp, qp->rq_cq); 1644 } 1645 mutex_unlock(&dev->dev_lock); 1646 1647 if (pd->uctx) { 1648 ocrdma_del_mmap(pd->uctx, (u64) qp->sq.pa, 1649 PAGE_ALIGN(qp->sq.len)); 1650 if (!qp->srq) 1651 ocrdma_del_mmap(pd->uctx, (u64) qp->rq.pa, 1652 PAGE_ALIGN(qp->rq.len)); 1653 } 1654 1655 ocrdma_del_flush_qp(qp); 1656 1657 kfree(qp->wqe_wr_id_tbl); 1658 kfree(qp->rqe_wr_id_tbl); 1659 kfree(qp); 1660 return status; 1661 } 1662 1663 static int ocrdma_copy_srq_uresp(struct ocrdma_dev *dev, struct ocrdma_srq *srq, 1664 struct ib_udata *udata) 1665 { 1666 int status; 1667 struct ocrdma_create_srq_uresp uresp; 1668 1669 memset(&uresp, 0, sizeof(uresp)); 1670 uresp.rq_dbid = srq->rq.dbid; 1671 uresp.num_rq_pages = 1; 1672 uresp.rq_page_addr[0] = srq->rq.pa; 1673 uresp.rq_page_size = srq->rq.len; 1674 uresp.db_page_addr = dev->nic_info.unmapped_db + 1675 (srq->pd->id * dev->nic_info.db_page_size); 1676 uresp.db_page_size = dev->nic_info.db_page_size; 1677 uresp.num_rqe_allocated = srq->rq.max_cnt; 1678 if (ocrdma_get_asic_type(dev) == OCRDMA_ASIC_GEN_SKH_R) { 1679 uresp.db_rq_offset = OCRDMA_DB_GEN2_RQ_OFFSET; 1680 uresp.db_shift = 24; 1681 } else { 1682 uresp.db_rq_offset = OCRDMA_DB_RQ_OFFSET; 1683 uresp.db_shift = 16; 1684 } 1685 1686 status = ib_copy_to_udata(udata, &uresp, sizeof(uresp)); 1687 if (status) 1688 return status; 1689 status = ocrdma_add_mmap(srq->pd->uctx, uresp.rq_page_addr[0], 1690 uresp.rq_page_size); 1691 if (status) 1692 return status; 1693 return status; 1694 } 1695 1696 struct ib_srq *ocrdma_create_srq(struct ib_pd *ibpd, 1697 struct ib_srq_init_attr *init_attr, 1698 struct ib_udata *udata) 1699 { 1700 int status = -ENOMEM; 1701 struct ocrdma_pd *pd = get_ocrdma_pd(ibpd); 1702 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device); 1703 struct ocrdma_srq *srq; 1704 1705 if (init_attr->attr.max_sge > dev->attr.max_recv_sge) 1706 return ERR_PTR(-EINVAL); 1707 if (init_attr->attr.max_wr > dev->attr.max_rqe) 1708 return ERR_PTR(-EINVAL); 1709 1710 srq = kzalloc(sizeof(*srq), GFP_KERNEL); 1711 if (!srq) 1712 return ERR_PTR(status); 1713 1714 spin_lock_init(&srq->q_lock); 1715 srq->pd = pd; 1716 srq->db = dev->nic_info.db + (pd->id * dev->nic_info.db_page_size); 1717 status = ocrdma_mbx_create_srq(dev, srq, init_attr, pd); 1718 if (status) 1719 goto err; 1720 1721 if (udata == NULL) { 1722 srq->rqe_wr_id_tbl = kzalloc(sizeof(u64) * srq->rq.max_cnt, 1723 GFP_KERNEL); 1724 if (srq->rqe_wr_id_tbl == NULL) 1725 goto arm_err; 1726 1727 srq->bit_fields_len = (srq->rq.max_cnt / 32) + 1728 (srq->rq.max_cnt % 32 ? 1 : 0); 1729 srq->idx_bit_fields = 1730 kmalloc(srq->bit_fields_len * sizeof(u32), GFP_KERNEL); 1731 if (srq->idx_bit_fields == NULL) 1732 goto arm_err; 1733 memset(srq->idx_bit_fields, 0xff, 1734 srq->bit_fields_len * sizeof(u32)); 1735 } 1736 1737 if (init_attr->attr.srq_limit) { 1738 status = ocrdma_mbx_modify_srq(srq, &init_attr->attr); 1739 if (status) 1740 goto arm_err; 1741 } 1742 1743 if (udata) { 1744 status = ocrdma_copy_srq_uresp(dev, srq, udata); 1745 if (status) 1746 goto arm_err; 1747 } 1748 1749 return &srq->ibsrq; 1750 1751 arm_err: 1752 ocrdma_mbx_destroy_srq(dev, srq); 1753 err: 1754 kfree(srq->rqe_wr_id_tbl); 1755 kfree(srq->idx_bit_fields); 1756 kfree(srq); 1757 return ERR_PTR(status); 1758 } 1759 1760 int ocrdma_modify_srq(struct ib_srq *ibsrq, 1761 struct ib_srq_attr *srq_attr, 1762 enum ib_srq_attr_mask srq_attr_mask, 1763 struct ib_udata *udata) 1764 { 1765 int status = 0; 1766 struct ocrdma_srq *srq; 1767 1768 srq = get_ocrdma_srq(ibsrq); 1769 if (srq_attr_mask & IB_SRQ_MAX_WR) 1770 status = -EINVAL; 1771 else 1772 status = ocrdma_mbx_modify_srq(srq, srq_attr); 1773 return status; 1774 } 1775 1776 int ocrdma_query_srq(struct ib_srq *ibsrq, struct ib_srq_attr *srq_attr) 1777 { 1778 int status; 1779 struct ocrdma_srq *srq; 1780 1781 srq = get_ocrdma_srq(ibsrq); 1782 status = ocrdma_mbx_query_srq(srq, srq_attr); 1783 return status; 1784 } 1785 1786 int ocrdma_destroy_srq(struct ib_srq *ibsrq) 1787 { 1788 int status; 1789 struct ocrdma_srq *srq; 1790 struct ocrdma_dev *dev = get_ocrdma_dev(ibsrq->device); 1791 1792 srq = get_ocrdma_srq(ibsrq); 1793 1794 status = ocrdma_mbx_destroy_srq(dev, srq); 1795 1796 if (srq->pd->uctx) 1797 ocrdma_del_mmap(srq->pd->uctx, (u64) srq->rq.pa, 1798 PAGE_ALIGN(srq->rq.len)); 1799 1800 kfree(srq->idx_bit_fields); 1801 kfree(srq->rqe_wr_id_tbl); 1802 kfree(srq); 1803 return status; 1804 } 1805 1806 /* unprivileged verbs and their support functions. */ 1807 static void ocrdma_build_ud_hdr(struct ocrdma_qp *qp, 1808 struct ocrdma_hdr_wqe *hdr, 1809 struct ib_send_wr *wr) 1810 { 1811 struct ocrdma_ewqe_ud_hdr *ud_hdr = 1812 (struct ocrdma_ewqe_ud_hdr *)(hdr + 1); 1813 struct ocrdma_ah *ah = get_ocrdma_ah(wr->wr.ud.ah); 1814 1815 ud_hdr->rsvd_dest_qpn = wr->wr.ud.remote_qpn; 1816 if (qp->qp_type == IB_QPT_GSI) 1817 ud_hdr->qkey = qp->qkey; 1818 else 1819 ud_hdr->qkey = wr->wr.ud.remote_qkey; 1820 ud_hdr->rsvd_ahid = ah->id; 1821 } 1822 1823 static void ocrdma_build_sges(struct ocrdma_hdr_wqe *hdr, 1824 struct ocrdma_sge *sge, int num_sge, 1825 struct ib_sge *sg_list) 1826 { 1827 int i; 1828 1829 for (i = 0; i < num_sge; i++) { 1830 sge[i].lrkey = sg_list[i].lkey; 1831 sge[i].addr_lo = sg_list[i].addr; 1832 sge[i].addr_hi = upper_32_bits(sg_list[i].addr); 1833 sge[i].len = sg_list[i].length; 1834 hdr->total_len += sg_list[i].length; 1835 } 1836 if (num_sge == 0) 1837 memset(sge, 0, sizeof(*sge)); 1838 } 1839 1840 static inline uint32_t ocrdma_sglist_len(struct ib_sge *sg_list, int num_sge) 1841 { 1842 uint32_t total_len = 0, i; 1843 1844 for (i = 0; i < num_sge; i++) 1845 total_len += sg_list[i].length; 1846 return total_len; 1847 } 1848 1849 1850 static int ocrdma_build_inline_sges(struct ocrdma_qp *qp, 1851 struct ocrdma_hdr_wqe *hdr, 1852 struct ocrdma_sge *sge, 1853 struct ib_send_wr *wr, u32 wqe_size) 1854 { 1855 int i; 1856 char *dpp_addr; 1857 1858 if (wr->send_flags & IB_SEND_INLINE && qp->qp_type != IB_QPT_UD) { 1859 hdr->total_len = ocrdma_sglist_len(wr->sg_list, wr->num_sge); 1860 if (unlikely(hdr->total_len > qp->max_inline_data)) { 1861 pr_err("%s() supported_len=0x%x,\n" 1862 " unspported len req=0x%x\n", __func__, 1863 qp->max_inline_data, hdr->total_len); 1864 return -EINVAL; 1865 } 1866 dpp_addr = (char *)sge; 1867 for (i = 0; i < wr->num_sge; i++) { 1868 memcpy(dpp_addr, 1869 (void *)(unsigned long)wr->sg_list[i].addr, 1870 wr->sg_list[i].length); 1871 dpp_addr += wr->sg_list[i].length; 1872 } 1873 1874 wqe_size += roundup(hdr->total_len, OCRDMA_WQE_ALIGN_BYTES); 1875 if (0 == hdr->total_len) 1876 wqe_size += sizeof(struct ocrdma_sge); 1877 hdr->cw |= (OCRDMA_TYPE_INLINE << OCRDMA_WQE_TYPE_SHIFT); 1878 } else { 1879 ocrdma_build_sges(hdr, sge, wr->num_sge, wr->sg_list); 1880 if (wr->num_sge) 1881 wqe_size += (wr->num_sge * sizeof(struct ocrdma_sge)); 1882 else 1883 wqe_size += sizeof(struct ocrdma_sge); 1884 hdr->cw |= (OCRDMA_TYPE_LKEY << OCRDMA_WQE_TYPE_SHIFT); 1885 } 1886 hdr->cw |= ((wqe_size / OCRDMA_WQE_STRIDE) << OCRDMA_WQE_SIZE_SHIFT); 1887 return 0; 1888 } 1889 1890 static int ocrdma_build_send(struct ocrdma_qp *qp, struct ocrdma_hdr_wqe *hdr, 1891 struct ib_send_wr *wr) 1892 { 1893 int status; 1894 struct ocrdma_sge *sge; 1895 u32 wqe_size = sizeof(*hdr); 1896 1897 if (qp->qp_type == IB_QPT_UD || qp->qp_type == IB_QPT_GSI) { 1898 ocrdma_build_ud_hdr(qp, hdr, wr); 1899 sge = (struct ocrdma_sge *)(hdr + 2); 1900 wqe_size += sizeof(struct ocrdma_ewqe_ud_hdr); 1901 } else { 1902 sge = (struct ocrdma_sge *)(hdr + 1); 1903 } 1904 1905 status = ocrdma_build_inline_sges(qp, hdr, sge, wr, wqe_size); 1906 return status; 1907 } 1908 1909 static int ocrdma_build_write(struct ocrdma_qp *qp, struct ocrdma_hdr_wqe *hdr, 1910 struct ib_send_wr *wr) 1911 { 1912 int status; 1913 struct ocrdma_sge *ext_rw = (struct ocrdma_sge *)(hdr + 1); 1914 struct ocrdma_sge *sge = ext_rw + 1; 1915 u32 wqe_size = sizeof(*hdr) + sizeof(*ext_rw); 1916 1917 status = ocrdma_build_inline_sges(qp, hdr, sge, wr, wqe_size); 1918 if (status) 1919 return status; 1920 ext_rw->addr_lo = wr->wr.rdma.remote_addr; 1921 ext_rw->addr_hi = upper_32_bits(wr->wr.rdma.remote_addr); 1922 ext_rw->lrkey = wr->wr.rdma.rkey; 1923 ext_rw->len = hdr->total_len; 1924 return 0; 1925 } 1926 1927 static void ocrdma_build_read(struct ocrdma_qp *qp, struct ocrdma_hdr_wqe *hdr, 1928 struct ib_send_wr *wr) 1929 { 1930 struct ocrdma_sge *ext_rw = (struct ocrdma_sge *)(hdr + 1); 1931 struct ocrdma_sge *sge = ext_rw + 1; 1932 u32 wqe_size = ((wr->num_sge + 1) * sizeof(struct ocrdma_sge)) + 1933 sizeof(struct ocrdma_hdr_wqe); 1934 1935 ocrdma_build_sges(hdr, sge, wr->num_sge, wr->sg_list); 1936 hdr->cw |= ((wqe_size / OCRDMA_WQE_STRIDE) << OCRDMA_WQE_SIZE_SHIFT); 1937 hdr->cw |= (OCRDMA_READ << OCRDMA_WQE_OPCODE_SHIFT); 1938 hdr->cw |= (OCRDMA_TYPE_LKEY << OCRDMA_WQE_TYPE_SHIFT); 1939 1940 ext_rw->addr_lo = wr->wr.rdma.remote_addr; 1941 ext_rw->addr_hi = upper_32_bits(wr->wr.rdma.remote_addr); 1942 ext_rw->lrkey = wr->wr.rdma.rkey; 1943 ext_rw->len = hdr->total_len; 1944 } 1945 1946 static void build_frmr_pbes(struct ib_send_wr *wr, struct ocrdma_pbl *pbl_tbl, 1947 struct ocrdma_hw_mr *hwmr) 1948 { 1949 int i; 1950 u64 buf_addr = 0; 1951 int num_pbes; 1952 struct ocrdma_pbe *pbe; 1953 1954 pbe = (struct ocrdma_pbe *)pbl_tbl->va; 1955 num_pbes = 0; 1956 1957 /* go through the OS phy regions & fill hw pbe entries into pbls. */ 1958 for (i = 0; i < wr->wr.fast_reg.page_list_len; i++) { 1959 /* number of pbes can be more for one OS buf, when 1960 * buffers are of different sizes. 1961 * split the ib_buf to one or more pbes. 1962 */ 1963 buf_addr = wr->wr.fast_reg.page_list->page_list[i]; 1964 pbe->pa_lo = cpu_to_le32((u32) (buf_addr & PAGE_MASK)); 1965 pbe->pa_hi = cpu_to_le32((u32) upper_32_bits(buf_addr)); 1966 num_pbes += 1; 1967 pbe++; 1968 1969 /* if the pbl is full storing the pbes, 1970 * move to next pbl. 1971 */ 1972 if (num_pbes == (hwmr->pbl_size/sizeof(u64))) { 1973 pbl_tbl++; 1974 pbe = (struct ocrdma_pbe *)pbl_tbl->va; 1975 } 1976 } 1977 return; 1978 } 1979 1980 static int get_encoded_page_size(int pg_sz) 1981 { 1982 /* Max size is 256M 4096 << 16 */ 1983 int i = 0; 1984 for (; i < 17; i++) 1985 if (pg_sz == (4096 << i)) 1986 break; 1987 return i; 1988 } 1989 1990 1991 static int ocrdma_build_fr(struct ocrdma_qp *qp, struct ocrdma_hdr_wqe *hdr, 1992 struct ib_send_wr *wr) 1993 { 1994 u64 fbo; 1995 struct ocrdma_ewqe_fr *fast_reg = (struct ocrdma_ewqe_fr *)(hdr + 1); 1996 struct ocrdma_mr *mr; 1997 u32 wqe_size = sizeof(*fast_reg) + sizeof(*hdr); 1998 1999 wqe_size = roundup(wqe_size, OCRDMA_WQE_ALIGN_BYTES); 2000 2001 if (wr->wr.fast_reg.page_list_len > qp->dev->attr.max_pages_per_frmr) 2002 return -EINVAL; 2003 2004 hdr->cw |= (OCRDMA_FR_MR << OCRDMA_WQE_OPCODE_SHIFT); 2005 hdr->cw |= ((wqe_size / OCRDMA_WQE_STRIDE) << OCRDMA_WQE_SIZE_SHIFT); 2006 2007 if (wr->wr.fast_reg.page_list_len == 0) 2008 BUG(); 2009 if (wr->wr.fast_reg.access_flags & IB_ACCESS_LOCAL_WRITE) 2010 hdr->rsvd_lkey_flags |= OCRDMA_LKEY_FLAG_LOCAL_WR; 2011 if (wr->wr.fast_reg.access_flags & IB_ACCESS_REMOTE_WRITE) 2012 hdr->rsvd_lkey_flags |= OCRDMA_LKEY_FLAG_REMOTE_WR; 2013 if (wr->wr.fast_reg.access_flags & IB_ACCESS_REMOTE_READ) 2014 hdr->rsvd_lkey_flags |= OCRDMA_LKEY_FLAG_REMOTE_RD; 2015 hdr->lkey = wr->wr.fast_reg.rkey; 2016 hdr->total_len = wr->wr.fast_reg.length; 2017 2018 fbo = wr->wr.fast_reg.iova_start - 2019 (wr->wr.fast_reg.page_list->page_list[0] & PAGE_MASK); 2020 2021 fast_reg->va_hi = upper_32_bits(wr->wr.fast_reg.iova_start); 2022 fast_reg->va_lo = (u32) (wr->wr.fast_reg.iova_start & 0xffffffff); 2023 fast_reg->fbo_hi = upper_32_bits(fbo); 2024 fast_reg->fbo_lo = (u32) fbo & 0xffffffff; 2025 fast_reg->num_sges = wr->wr.fast_reg.page_list_len; 2026 fast_reg->size_sge = 2027 get_encoded_page_size(1 << wr->wr.fast_reg.page_shift); 2028 mr = (struct ocrdma_mr *) (unsigned long) 2029 qp->dev->stag_arr[(hdr->lkey >> 8) & (OCRDMA_MAX_STAG - 1)]; 2030 build_frmr_pbes(wr, mr->hwmr.pbl_table, &mr->hwmr); 2031 return 0; 2032 } 2033 2034 static void ocrdma_ring_sq_db(struct ocrdma_qp *qp) 2035 { 2036 u32 val = qp->sq.dbid | (1 << OCRDMA_DB_SQ_SHIFT); 2037 2038 iowrite32(val, qp->sq_db); 2039 } 2040 2041 int ocrdma_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr, 2042 struct ib_send_wr **bad_wr) 2043 { 2044 int status = 0; 2045 struct ocrdma_qp *qp = get_ocrdma_qp(ibqp); 2046 struct ocrdma_hdr_wqe *hdr; 2047 unsigned long flags; 2048 2049 spin_lock_irqsave(&qp->q_lock, flags); 2050 if (qp->state != OCRDMA_QPS_RTS && qp->state != OCRDMA_QPS_SQD) { 2051 spin_unlock_irqrestore(&qp->q_lock, flags); 2052 *bad_wr = wr; 2053 return -EINVAL; 2054 } 2055 2056 while (wr) { 2057 if (ocrdma_hwq_free_cnt(&qp->sq) == 0 || 2058 wr->num_sge > qp->sq.max_sges) { 2059 *bad_wr = wr; 2060 status = -ENOMEM; 2061 break; 2062 } 2063 hdr = ocrdma_hwq_head(&qp->sq); 2064 hdr->cw = 0; 2065 if (wr->send_flags & IB_SEND_SIGNALED || qp->signaled) 2066 hdr->cw |= (OCRDMA_FLAG_SIG << OCRDMA_WQE_FLAGS_SHIFT); 2067 if (wr->send_flags & IB_SEND_FENCE) 2068 hdr->cw |= 2069 (OCRDMA_FLAG_FENCE_L << OCRDMA_WQE_FLAGS_SHIFT); 2070 if (wr->send_flags & IB_SEND_SOLICITED) 2071 hdr->cw |= 2072 (OCRDMA_FLAG_SOLICIT << OCRDMA_WQE_FLAGS_SHIFT); 2073 hdr->total_len = 0; 2074 switch (wr->opcode) { 2075 case IB_WR_SEND_WITH_IMM: 2076 hdr->cw |= (OCRDMA_FLAG_IMM << OCRDMA_WQE_FLAGS_SHIFT); 2077 hdr->immdt = ntohl(wr->ex.imm_data); 2078 case IB_WR_SEND: 2079 hdr->cw |= (OCRDMA_SEND << OCRDMA_WQE_OPCODE_SHIFT); 2080 ocrdma_build_send(qp, hdr, wr); 2081 break; 2082 case IB_WR_SEND_WITH_INV: 2083 hdr->cw |= (OCRDMA_FLAG_INV << OCRDMA_WQE_FLAGS_SHIFT); 2084 hdr->cw |= (OCRDMA_SEND << OCRDMA_WQE_OPCODE_SHIFT); 2085 hdr->lkey = wr->ex.invalidate_rkey; 2086 status = ocrdma_build_send(qp, hdr, wr); 2087 break; 2088 case IB_WR_RDMA_WRITE_WITH_IMM: 2089 hdr->cw |= (OCRDMA_FLAG_IMM << OCRDMA_WQE_FLAGS_SHIFT); 2090 hdr->immdt = ntohl(wr->ex.imm_data); 2091 case IB_WR_RDMA_WRITE: 2092 hdr->cw |= (OCRDMA_WRITE << OCRDMA_WQE_OPCODE_SHIFT); 2093 status = ocrdma_build_write(qp, hdr, wr); 2094 break; 2095 case IB_WR_RDMA_READ_WITH_INV: 2096 hdr->cw |= (OCRDMA_FLAG_INV << OCRDMA_WQE_FLAGS_SHIFT); 2097 case IB_WR_RDMA_READ: 2098 ocrdma_build_read(qp, hdr, wr); 2099 break; 2100 case IB_WR_LOCAL_INV: 2101 hdr->cw |= 2102 (OCRDMA_LKEY_INV << OCRDMA_WQE_OPCODE_SHIFT); 2103 hdr->cw |= ((sizeof(struct ocrdma_hdr_wqe) + 2104 sizeof(struct ocrdma_sge)) / 2105 OCRDMA_WQE_STRIDE) << OCRDMA_WQE_SIZE_SHIFT; 2106 hdr->lkey = wr->ex.invalidate_rkey; 2107 break; 2108 case IB_WR_FAST_REG_MR: 2109 status = ocrdma_build_fr(qp, hdr, wr); 2110 break; 2111 default: 2112 status = -EINVAL; 2113 break; 2114 } 2115 if (status) { 2116 *bad_wr = wr; 2117 break; 2118 } 2119 if (wr->send_flags & IB_SEND_SIGNALED || qp->signaled) 2120 qp->wqe_wr_id_tbl[qp->sq.head].signaled = 1; 2121 else 2122 qp->wqe_wr_id_tbl[qp->sq.head].signaled = 0; 2123 qp->wqe_wr_id_tbl[qp->sq.head].wrid = wr->wr_id; 2124 ocrdma_cpu_to_le32(hdr, ((hdr->cw >> OCRDMA_WQE_SIZE_SHIFT) & 2125 OCRDMA_WQE_SIZE_MASK) * OCRDMA_WQE_STRIDE); 2126 /* make sure wqe is written before adapter can access it */ 2127 wmb(); 2128 /* inform hw to start processing it */ 2129 ocrdma_ring_sq_db(qp); 2130 2131 /* update pointer, counter for next wr */ 2132 ocrdma_hwq_inc_head(&qp->sq); 2133 wr = wr->next; 2134 } 2135 spin_unlock_irqrestore(&qp->q_lock, flags); 2136 return status; 2137 } 2138 2139 static void ocrdma_ring_rq_db(struct ocrdma_qp *qp) 2140 { 2141 u32 val = qp->rq.dbid | (1 << OCRDMA_DB_RQ_SHIFT); 2142 2143 iowrite32(val, qp->rq_db); 2144 } 2145 2146 static void ocrdma_build_rqe(struct ocrdma_hdr_wqe *rqe, struct ib_recv_wr *wr, 2147 u16 tag) 2148 { 2149 u32 wqe_size = 0; 2150 struct ocrdma_sge *sge; 2151 if (wr->num_sge) 2152 wqe_size = (wr->num_sge * sizeof(*sge)) + sizeof(*rqe); 2153 else 2154 wqe_size = sizeof(*sge) + sizeof(*rqe); 2155 2156 rqe->cw = ((wqe_size / OCRDMA_WQE_STRIDE) << 2157 OCRDMA_WQE_SIZE_SHIFT); 2158 rqe->cw |= (OCRDMA_FLAG_SIG << OCRDMA_WQE_FLAGS_SHIFT); 2159 rqe->cw |= (OCRDMA_TYPE_LKEY << OCRDMA_WQE_TYPE_SHIFT); 2160 rqe->total_len = 0; 2161 rqe->rsvd_tag = tag; 2162 sge = (struct ocrdma_sge *)(rqe + 1); 2163 ocrdma_build_sges(rqe, sge, wr->num_sge, wr->sg_list); 2164 ocrdma_cpu_to_le32(rqe, wqe_size); 2165 } 2166 2167 int ocrdma_post_recv(struct ib_qp *ibqp, struct ib_recv_wr *wr, 2168 struct ib_recv_wr **bad_wr) 2169 { 2170 int status = 0; 2171 unsigned long flags; 2172 struct ocrdma_qp *qp = get_ocrdma_qp(ibqp); 2173 struct ocrdma_hdr_wqe *rqe; 2174 2175 spin_lock_irqsave(&qp->q_lock, flags); 2176 if (qp->state == OCRDMA_QPS_RST || qp->state == OCRDMA_QPS_ERR) { 2177 spin_unlock_irqrestore(&qp->q_lock, flags); 2178 *bad_wr = wr; 2179 return -EINVAL; 2180 } 2181 while (wr) { 2182 if (ocrdma_hwq_free_cnt(&qp->rq) == 0 || 2183 wr->num_sge > qp->rq.max_sges) { 2184 *bad_wr = wr; 2185 status = -ENOMEM; 2186 break; 2187 } 2188 rqe = ocrdma_hwq_head(&qp->rq); 2189 ocrdma_build_rqe(rqe, wr, 0); 2190 2191 qp->rqe_wr_id_tbl[qp->rq.head] = wr->wr_id; 2192 /* make sure rqe is written before adapter can access it */ 2193 wmb(); 2194 2195 /* inform hw to start processing it */ 2196 ocrdma_ring_rq_db(qp); 2197 2198 /* update pointer, counter for next wr */ 2199 ocrdma_hwq_inc_head(&qp->rq); 2200 wr = wr->next; 2201 } 2202 spin_unlock_irqrestore(&qp->q_lock, flags); 2203 return status; 2204 } 2205 2206 /* cqe for srq's rqe can potentially arrive out of order. 2207 * index gives the entry in the shadow table where to store 2208 * the wr_id. tag/index is returned in cqe to reference back 2209 * for a given rqe. 2210 */ 2211 static int ocrdma_srq_get_idx(struct ocrdma_srq *srq) 2212 { 2213 int row = 0; 2214 int indx = 0; 2215 2216 for (row = 0; row < srq->bit_fields_len; row++) { 2217 if (srq->idx_bit_fields[row]) { 2218 indx = ffs(srq->idx_bit_fields[row]); 2219 indx = (row * 32) + (indx - 1); 2220 if (indx >= srq->rq.max_cnt) 2221 BUG(); 2222 ocrdma_srq_toggle_bit(srq, indx); 2223 break; 2224 } 2225 } 2226 2227 if (row == srq->bit_fields_len) 2228 BUG(); 2229 return indx + 1; /* Use from index 1 */ 2230 } 2231 2232 static void ocrdma_ring_srq_db(struct ocrdma_srq *srq) 2233 { 2234 u32 val = srq->rq.dbid | (1 << 16); 2235 2236 iowrite32(val, srq->db + OCRDMA_DB_GEN2_SRQ_OFFSET); 2237 } 2238 2239 int ocrdma_post_srq_recv(struct ib_srq *ibsrq, struct ib_recv_wr *wr, 2240 struct ib_recv_wr **bad_wr) 2241 { 2242 int status = 0; 2243 unsigned long flags; 2244 struct ocrdma_srq *srq; 2245 struct ocrdma_hdr_wqe *rqe; 2246 u16 tag; 2247 2248 srq = get_ocrdma_srq(ibsrq); 2249 2250 spin_lock_irqsave(&srq->q_lock, flags); 2251 while (wr) { 2252 if (ocrdma_hwq_free_cnt(&srq->rq) == 0 || 2253 wr->num_sge > srq->rq.max_sges) { 2254 status = -ENOMEM; 2255 *bad_wr = wr; 2256 break; 2257 } 2258 tag = ocrdma_srq_get_idx(srq); 2259 rqe = ocrdma_hwq_head(&srq->rq); 2260 ocrdma_build_rqe(rqe, wr, tag); 2261 2262 srq->rqe_wr_id_tbl[tag] = wr->wr_id; 2263 /* make sure rqe is written before adapter can perform DMA */ 2264 wmb(); 2265 /* inform hw to start processing it */ 2266 ocrdma_ring_srq_db(srq); 2267 /* update pointer, counter for next wr */ 2268 ocrdma_hwq_inc_head(&srq->rq); 2269 wr = wr->next; 2270 } 2271 spin_unlock_irqrestore(&srq->q_lock, flags); 2272 return status; 2273 } 2274 2275 static enum ib_wc_status ocrdma_to_ibwc_err(u16 status) 2276 { 2277 enum ib_wc_status ibwc_status; 2278 2279 switch (status) { 2280 case OCRDMA_CQE_GENERAL_ERR: 2281 ibwc_status = IB_WC_GENERAL_ERR; 2282 break; 2283 case OCRDMA_CQE_LOC_LEN_ERR: 2284 ibwc_status = IB_WC_LOC_LEN_ERR; 2285 break; 2286 case OCRDMA_CQE_LOC_QP_OP_ERR: 2287 ibwc_status = IB_WC_LOC_QP_OP_ERR; 2288 break; 2289 case OCRDMA_CQE_LOC_EEC_OP_ERR: 2290 ibwc_status = IB_WC_LOC_EEC_OP_ERR; 2291 break; 2292 case OCRDMA_CQE_LOC_PROT_ERR: 2293 ibwc_status = IB_WC_LOC_PROT_ERR; 2294 break; 2295 case OCRDMA_CQE_WR_FLUSH_ERR: 2296 ibwc_status = IB_WC_WR_FLUSH_ERR; 2297 break; 2298 case OCRDMA_CQE_MW_BIND_ERR: 2299 ibwc_status = IB_WC_MW_BIND_ERR; 2300 break; 2301 case OCRDMA_CQE_BAD_RESP_ERR: 2302 ibwc_status = IB_WC_BAD_RESP_ERR; 2303 break; 2304 case OCRDMA_CQE_LOC_ACCESS_ERR: 2305 ibwc_status = IB_WC_LOC_ACCESS_ERR; 2306 break; 2307 case OCRDMA_CQE_REM_INV_REQ_ERR: 2308 ibwc_status = IB_WC_REM_INV_REQ_ERR; 2309 break; 2310 case OCRDMA_CQE_REM_ACCESS_ERR: 2311 ibwc_status = IB_WC_REM_ACCESS_ERR; 2312 break; 2313 case OCRDMA_CQE_REM_OP_ERR: 2314 ibwc_status = IB_WC_REM_OP_ERR; 2315 break; 2316 case OCRDMA_CQE_RETRY_EXC_ERR: 2317 ibwc_status = IB_WC_RETRY_EXC_ERR; 2318 break; 2319 case OCRDMA_CQE_RNR_RETRY_EXC_ERR: 2320 ibwc_status = IB_WC_RNR_RETRY_EXC_ERR; 2321 break; 2322 case OCRDMA_CQE_LOC_RDD_VIOL_ERR: 2323 ibwc_status = IB_WC_LOC_RDD_VIOL_ERR; 2324 break; 2325 case OCRDMA_CQE_REM_INV_RD_REQ_ERR: 2326 ibwc_status = IB_WC_REM_INV_RD_REQ_ERR; 2327 break; 2328 case OCRDMA_CQE_REM_ABORT_ERR: 2329 ibwc_status = IB_WC_REM_ABORT_ERR; 2330 break; 2331 case OCRDMA_CQE_INV_EECN_ERR: 2332 ibwc_status = IB_WC_INV_EECN_ERR; 2333 break; 2334 case OCRDMA_CQE_INV_EEC_STATE_ERR: 2335 ibwc_status = IB_WC_INV_EEC_STATE_ERR; 2336 break; 2337 case OCRDMA_CQE_FATAL_ERR: 2338 ibwc_status = IB_WC_FATAL_ERR; 2339 break; 2340 case OCRDMA_CQE_RESP_TIMEOUT_ERR: 2341 ibwc_status = IB_WC_RESP_TIMEOUT_ERR; 2342 break; 2343 default: 2344 ibwc_status = IB_WC_GENERAL_ERR; 2345 break; 2346 } 2347 return ibwc_status; 2348 } 2349 2350 static void ocrdma_update_wc(struct ocrdma_qp *qp, struct ib_wc *ibwc, 2351 u32 wqe_idx) 2352 { 2353 struct ocrdma_hdr_wqe *hdr; 2354 struct ocrdma_sge *rw; 2355 int opcode; 2356 2357 hdr = ocrdma_hwq_head_from_idx(&qp->sq, wqe_idx); 2358 2359 ibwc->wr_id = qp->wqe_wr_id_tbl[wqe_idx].wrid; 2360 /* Undo the hdr->cw swap */ 2361 opcode = le32_to_cpu(hdr->cw) & OCRDMA_WQE_OPCODE_MASK; 2362 switch (opcode) { 2363 case OCRDMA_WRITE: 2364 ibwc->opcode = IB_WC_RDMA_WRITE; 2365 break; 2366 case OCRDMA_READ: 2367 rw = (struct ocrdma_sge *)(hdr + 1); 2368 ibwc->opcode = IB_WC_RDMA_READ; 2369 ibwc->byte_len = rw->len; 2370 break; 2371 case OCRDMA_SEND: 2372 ibwc->opcode = IB_WC_SEND; 2373 break; 2374 case OCRDMA_FR_MR: 2375 ibwc->opcode = IB_WC_FAST_REG_MR; 2376 break; 2377 case OCRDMA_LKEY_INV: 2378 ibwc->opcode = IB_WC_LOCAL_INV; 2379 break; 2380 default: 2381 ibwc->status = IB_WC_GENERAL_ERR; 2382 pr_err("%s() invalid opcode received = 0x%x\n", 2383 __func__, hdr->cw & OCRDMA_WQE_OPCODE_MASK); 2384 break; 2385 } 2386 } 2387 2388 static void ocrdma_set_cqe_status_flushed(struct ocrdma_qp *qp, 2389 struct ocrdma_cqe *cqe) 2390 { 2391 if (is_cqe_for_sq(cqe)) { 2392 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu( 2393 cqe->flags_status_srcqpn) & 2394 ~OCRDMA_CQE_STATUS_MASK); 2395 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu( 2396 cqe->flags_status_srcqpn) | 2397 (OCRDMA_CQE_WR_FLUSH_ERR << 2398 OCRDMA_CQE_STATUS_SHIFT)); 2399 } else { 2400 if (qp->qp_type == IB_QPT_UD || qp->qp_type == IB_QPT_GSI) { 2401 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu( 2402 cqe->flags_status_srcqpn) & 2403 ~OCRDMA_CQE_UD_STATUS_MASK); 2404 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu( 2405 cqe->flags_status_srcqpn) | 2406 (OCRDMA_CQE_WR_FLUSH_ERR << 2407 OCRDMA_CQE_UD_STATUS_SHIFT)); 2408 } else { 2409 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu( 2410 cqe->flags_status_srcqpn) & 2411 ~OCRDMA_CQE_STATUS_MASK); 2412 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu( 2413 cqe->flags_status_srcqpn) | 2414 (OCRDMA_CQE_WR_FLUSH_ERR << 2415 OCRDMA_CQE_STATUS_SHIFT)); 2416 } 2417 } 2418 } 2419 2420 static bool ocrdma_update_err_cqe(struct ib_wc *ibwc, struct ocrdma_cqe *cqe, 2421 struct ocrdma_qp *qp, int status) 2422 { 2423 bool expand = false; 2424 2425 ibwc->byte_len = 0; 2426 ibwc->qp = &qp->ibqp; 2427 ibwc->status = ocrdma_to_ibwc_err(status); 2428 2429 ocrdma_flush_qp(qp); 2430 ocrdma_qp_state_change(qp, IB_QPS_ERR, NULL); 2431 2432 /* if wqe/rqe pending for which cqe needs to be returned, 2433 * trigger inflating it. 2434 */ 2435 if (!is_hw_rq_empty(qp) || !is_hw_sq_empty(qp)) { 2436 expand = true; 2437 ocrdma_set_cqe_status_flushed(qp, cqe); 2438 } 2439 return expand; 2440 } 2441 2442 static int ocrdma_update_err_rcqe(struct ib_wc *ibwc, struct ocrdma_cqe *cqe, 2443 struct ocrdma_qp *qp, int status) 2444 { 2445 ibwc->opcode = IB_WC_RECV; 2446 ibwc->wr_id = qp->rqe_wr_id_tbl[qp->rq.tail]; 2447 ocrdma_hwq_inc_tail(&qp->rq); 2448 2449 return ocrdma_update_err_cqe(ibwc, cqe, qp, status); 2450 } 2451 2452 static int ocrdma_update_err_scqe(struct ib_wc *ibwc, struct ocrdma_cqe *cqe, 2453 struct ocrdma_qp *qp, int status) 2454 { 2455 ocrdma_update_wc(qp, ibwc, qp->sq.tail); 2456 ocrdma_hwq_inc_tail(&qp->sq); 2457 2458 return ocrdma_update_err_cqe(ibwc, cqe, qp, status); 2459 } 2460 2461 2462 static bool ocrdma_poll_err_scqe(struct ocrdma_qp *qp, 2463 struct ocrdma_cqe *cqe, struct ib_wc *ibwc, 2464 bool *polled, bool *stop) 2465 { 2466 bool expand; 2467 int status = (le32_to_cpu(cqe->flags_status_srcqpn) & 2468 OCRDMA_CQE_STATUS_MASK) >> OCRDMA_CQE_STATUS_SHIFT; 2469 2470 /* when hw sq is empty, but rq is not empty, so we continue 2471 * to keep the cqe in order to get the cq event again. 2472 */ 2473 if (is_hw_sq_empty(qp) && !is_hw_rq_empty(qp)) { 2474 /* when cq for rq and sq is same, it is safe to return 2475 * flush cqe for RQEs. 2476 */ 2477 if (!qp->srq && (qp->sq_cq == qp->rq_cq)) { 2478 *polled = true; 2479 status = OCRDMA_CQE_WR_FLUSH_ERR; 2480 expand = ocrdma_update_err_rcqe(ibwc, cqe, qp, status); 2481 } else { 2482 /* stop processing further cqe as this cqe is used for 2483 * triggering cq event on buddy cq of RQ. 2484 * When QP is destroyed, this cqe will be removed 2485 * from the cq's hardware q. 2486 */ 2487 *polled = false; 2488 *stop = true; 2489 expand = false; 2490 } 2491 } else { 2492 *polled = true; 2493 expand = ocrdma_update_err_scqe(ibwc, cqe, qp, status); 2494 } 2495 return expand; 2496 } 2497 2498 static bool ocrdma_poll_success_scqe(struct ocrdma_qp *qp, 2499 struct ocrdma_cqe *cqe, 2500 struct ib_wc *ibwc, bool *polled) 2501 { 2502 bool expand = false; 2503 int tail = qp->sq.tail; 2504 u32 wqe_idx; 2505 2506 if (!qp->wqe_wr_id_tbl[tail].signaled) { 2507 *polled = false; /* WC cannot be consumed yet */ 2508 } else { 2509 ibwc->status = IB_WC_SUCCESS; 2510 ibwc->wc_flags = 0; 2511 ibwc->qp = &qp->ibqp; 2512 ocrdma_update_wc(qp, ibwc, tail); 2513 *polled = true; 2514 } 2515 wqe_idx = (le32_to_cpu(cqe->wq.wqeidx) & 2516 OCRDMA_CQE_WQEIDX_MASK) & qp->sq.max_wqe_idx; 2517 if (tail != wqe_idx) 2518 expand = true; /* Coalesced CQE can't be consumed yet */ 2519 2520 ocrdma_hwq_inc_tail(&qp->sq); 2521 return expand; 2522 } 2523 2524 static bool ocrdma_poll_scqe(struct ocrdma_qp *qp, struct ocrdma_cqe *cqe, 2525 struct ib_wc *ibwc, bool *polled, bool *stop) 2526 { 2527 int status; 2528 bool expand; 2529 2530 status = (le32_to_cpu(cqe->flags_status_srcqpn) & 2531 OCRDMA_CQE_STATUS_MASK) >> OCRDMA_CQE_STATUS_SHIFT; 2532 2533 if (status == OCRDMA_CQE_SUCCESS) 2534 expand = ocrdma_poll_success_scqe(qp, cqe, ibwc, polled); 2535 else 2536 expand = ocrdma_poll_err_scqe(qp, cqe, ibwc, polled, stop); 2537 return expand; 2538 } 2539 2540 static int ocrdma_update_ud_rcqe(struct ib_wc *ibwc, struct ocrdma_cqe *cqe) 2541 { 2542 int status; 2543 2544 status = (le32_to_cpu(cqe->flags_status_srcqpn) & 2545 OCRDMA_CQE_UD_STATUS_MASK) >> OCRDMA_CQE_UD_STATUS_SHIFT; 2546 ibwc->src_qp = le32_to_cpu(cqe->flags_status_srcqpn) & 2547 OCRDMA_CQE_SRCQP_MASK; 2548 ibwc->pkey_index = le32_to_cpu(cqe->ud.rxlen_pkey) & 2549 OCRDMA_CQE_PKEY_MASK; 2550 ibwc->wc_flags = IB_WC_GRH; 2551 ibwc->byte_len = (le32_to_cpu(cqe->ud.rxlen_pkey) >> 2552 OCRDMA_CQE_UD_XFER_LEN_SHIFT); 2553 return status; 2554 } 2555 2556 static void ocrdma_update_free_srq_cqe(struct ib_wc *ibwc, 2557 struct ocrdma_cqe *cqe, 2558 struct ocrdma_qp *qp) 2559 { 2560 unsigned long flags; 2561 struct ocrdma_srq *srq; 2562 u32 wqe_idx; 2563 2564 srq = get_ocrdma_srq(qp->ibqp.srq); 2565 wqe_idx = (le32_to_cpu(cqe->rq.buftag_qpn) >> 2566 OCRDMA_CQE_BUFTAG_SHIFT) & srq->rq.max_wqe_idx; 2567 if (wqe_idx < 1) 2568 BUG(); 2569 2570 ibwc->wr_id = srq->rqe_wr_id_tbl[wqe_idx]; 2571 spin_lock_irqsave(&srq->q_lock, flags); 2572 ocrdma_srq_toggle_bit(srq, wqe_idx - 1); 2573 spin_unlock_irqrestore(&srq->q_lock, flags); 2574 ocrdma_hwq_inc_tail(&srq->rq); 2575 } 2576 2577 static bool ocrdma_poll_err_rcqe(struct ocrdma_qp *qp, struct ocrdma_cqe *cqe, 2578 struct ib_wc *ibwc, bool *polled, bool *stop, 2579 int status) 2580 { 2581 bool expand; 2582 2583 /* when hw_rq is empty, but wq is not empty, so continue 2584 * to keep the cqe to get the cq event again. 2585 */ 2586 if (is_hw_rq_empty(qp) && !is_hw_sq_empty(qp)) { 2587 if (!qp->srq && (qp->sq_cq == qp->rq_cq)) { 2588 *polled = true; 2589 status = OCRDMA_CQE_WR_FLUSH_ERR; 2590 expand = ocrdma_update_err_scqe(ibwc, cqe, qp, status); 2591 } else { 2592 *polled = false; 2593 *stop = true; 2594 expand = false; 2595 } 2596 } else { 2597 *polled = true; 2598 expand = ocrdma_update_err_rcqe(ibwc, cqe, qp, status); 2599 } 2600 return expand; 2601 } 2602 2603 static void ocrdma_poll_success_rcqe(struct ocrdma_qp *qp, 2604 struct ocrdma_cqe *cqe, struct ib_wc *ibwc) 2605 { 2606 ibwc->opcode = IB_WC_RECV; 2607 ibwc->qp = &qp->ibqp; 2608 ibwc->status = IB_WC_SUCCESS; 2609 2610 if (qp->qp_type == IB_QPT_UD || qp->qp_type == IB_QPT_GSI) 2611 ocrdma_update_ud_rcqe(ibwc, cqe); 2612 else 2613 ibwc->byte_len = le32_to_cpu(cqe->rq.rxlen); 2614 2615 if (is_cqe_imm(cqe)) { 2616 ibwc->ex.imm_data = htonl(le32_to_cpu(cqe->rq.lkey_immdt)); 2617 ibwc->wc_flags |= IB_WC_WITH_IMM; 2618 } else if (is_cqe_wr_imm(cqe)) { 2619 ibwc->opcode = IB_WC_RECV_RDMA_WITH_IMM; 2620 ibwc->ex.imm_data = htonl(le32_to_cpu(cqe->rq.lkey_immdt)); 2621 ibwc->wc_flags |= IB_WC_WITH_IMM; 2622 } else if (is_cqe_invalidated(cqe)) { 2623 ibwc->ex.invalidate_rkey = le32_to_cpu(cqe->rq.lkey_immdt); 2624 ibwc->wc_flags |= IB_WC_WITH_INVALIDATE; 2625 } 2626 if (qp->ibqp.srq) { 2627 ocrdma_update_free_srq_cqe(ibwc, cqe, qp); 2628 } else { 2629 ibwc->wr_id = qp->rqe_wr_id_tbl[qp->rq.tail]; 2630 ocrdma_hwq_inc_tail(&qp->rq); 2631 } 2632 } 2633 2634 static bool ocrdma_poll_rcqe(struct ocrdma_qp *qp, struct ocrdma_cqe *cqe, 2635 struct ib_wc *ibwc, bool *polled, bool *stop) 2636 { 2637 int status; 2638 bool expand = false; 2639 2640 ibwc->wc_flags = 0; 2641 if (qp->qp_type == IB_QPT_UD || qp->qp_type == IB_QPT_GSI) { 2642 status = (le32_to_cpu(cqe->flags_status_srcqpn) & 2643 OCRDMA_CQE_UD_STATUS_MASK) >> 2644 OCRDMA_CQE_UD_STATUS_SHIFT; 2645 } else { 2646 status = (le32_to_cpu(cqe->flags_status_srcqpn) & 2647 OCRDMA_CQE_STATUS_MASK) >> OCRDMA_CQE_STATUS_SHIFT; 2648 } 2649 2650 if (status == OCRDMA_CQE_SUCCESS) { 2651 *polled = true; 2652 ocrdma_poll_success_rcqe(qp, cqe, ibwc); 2653 } else { 2654 expand = ocrdma_poll_err_rcqe(qp, cqe, ibwc, polled, stop, 2655 status); 2656 } 2657 return expand; 2658 } 2659 2660 static void ocrdma_change_cq_phase(struct ocrdma_cq *cq, struct ocrdma_cqe *cqe, 2661 u16 cur_getp) 2662 { 2663 if (cq->phase_change) { 2664 if (cur_getp == 0) 2665 cq->phase = (~cq->phase & OCRDMA_CQE_VALID); 2666 } else { 2667 /* clear valid bit */ 2668 cqe->flags_status_srcqpn = 0; 2669 } 2670 } 2671 2672 static int ocrdma_poll_hwcq(struct ocrdma_cq *cq, int num_entries, 2673 struct ib_wc *ibwc) 2674 { 2675 u16 qpn = 0; 2676 int i = 0; 2677 bool expand = false; 2678 int polled_hw_cqes = 0; 2679 struct ocrdma_qp *qp = NULL; 2680 struct ocrdma_dev *dev = get_ocrdma_dev(cq->ibcq.device); 2681 struct ocrdma_cqe *cqe; 2682 u16 cur_getp; bool polled = false; bool stop = false; 2683 2684 cur_getp = cq->getp; 2685 while (num_entries) { 2686 cqe = cq->va + cur_getp; 2687 /* check whether valid cqe or not */ 2688 if (!is_cqe_valid(cq, cqe)) 2689 break; 2690 qpn = (le32_to_cpu(cqe->cmn.qpn) & OCRDMA_CQE_QPN_MASK); 2691 /* ignore discarded cqe */ 2692 if (qpn == 0) 2693 goto skip_cqe; 2694 qp = dev->qp_tbl[qpn]; 2695 BUG_ON(qp == NULL); 2696 2697 if (is_cqe_for_sq(cqe)) { 2698 expand = ocrdma_poll_scqe(qp, cqe, ibwc, &polled, 2699 &stop); 2700 } else { 2701 expand = ocrdma_poll_rcqe(qp, cqe, ibwc, &polled, 2702 &stop); 2703 } 2704 if (expand) 2705 goto expand_cqe; 2706 if (stop) 2707 goto stop_cqe; 2708 /* clear qpn to avoid duplicate processing by discard_cqe() */ 2709 cqe->cmn.qpn = 0; 2710 skip_cqe: 2711 polled_hw_cqes += 1; 2712 cur_getp = (cur_getp + 1) % cq->max_hw_cqe; 2713 ocrdma_change_cq_phase(cq, cqe, cur_getp); 2714 expand_cqe: 2715 if (polled) { 2716 num_entries -= 1; 2717 i += 1; 2718 ibwc = ibwc + 1; 2719 polled = false; 2720 } 2721 } 2722 stop_cqe: 2723 cq->getp = cur_getp; 2724 if (cq->deferred_arm) { 2725 ocrdma_ring_cq_db(dev, cq->id, true, cq->deferred_sol, 2726 polled_hw_cqes); 2727 cq->deferred_arm = false; 2728 cq->deferred_sol = false; 2729 } else { 2730 /* We need to pop the CQE. No need to arm */ 2731 ocrdma_ring_cq_db(dev, cq->id, false, cq->deferred_sol, 2732 polled_hw_cqes); 2733 cq->deferred_sol = false; 2734 } 2735 2736 return i; 2737 } 2738 2739 /* insert error cqe if the QP's SQ or RQ's CQ matches the CQ under poll. */ 2740 static int ocrdma_add_err_cqe(struct ocrdma_cq *cq, int num_entries, 2741 struct ocrdma_qp *qp, struct ib_wc *ibwc) 2742 { 2743 int err_cqes = 0; 2744 2745 while (num_entries) { 2746 if (is_hw_sq_empty(qp) && is_hw_rq_empty(qp)) 2747 break; 2748 if (!is_hw_sq_empty(qp) && qp->sq_cq == cq) { 2749 ocrdma_update_wc(qp, ibwc, qp->sq.tail); 2750 ocrdma_hwq_inc_tail(&qp->sq); 2751 } else if (!is_hw_rq_empty(qp) && qp->rq_cq == cq) { 2752 ibwc->wr_id = qp->rqe_wr_id_tbl[qp->rq.tail]; 2753 ocrdma_hwq_inc_tail(&qp->rq); 2754 } else { 2755 return err_cqes; 2756 } 2757 ibwc->byte_len = 0; 2758 ibwc->status = IB_WC_WR_FLUSH_ERR; 2759 ibwc = ibwc + 1; 2760 err_cqes += 1; 2761 num_entries -= 1; 2762 } 2763 return err_cqes; 2764 } 2765 2766 int ocrdma_poll_cq(struct ib_cq *ibcq, int num_entries, struct ib_wc *wc) 2767 { 2768 int cqes_to_poll = num_entries; 2769 struct ocrdma_cq *cq = get_ocrdma_cq(ibcq); 2770 struct ocrdma_dev *dev = get_ocrdma_dev(ibcq->device); 2771 int num_os_cqe = 0, err_cqes = 0; 2772 struct ocrdma_qp *qp; 2773 unsigned long flags; 2774 2775 /* poll cqes from adapter CQ */ 2776 spin_lock_irqsave(&cq->cq_lock, flags); 2777 num_os_cqe = ocrdma_poll_hwcq(cq, cqes_to_poll, wc); 2778 spin_unlock_irqrestore(&cq->cq_lock, flags); 2779 cqes_to_poll -= num_os_cqe; 2780 2781 if (cqes_to_poll) { 2782 wc = wc + num_os_cqe; 2783 /* adapter returns single error cqe when qp moves to 2784 * error state. So insert error cqes with wc_status as 2785 * FLUSHED for pending WQEs and RQEs of QP's SQ and RQ 2786 * respectively which uses this CQ. 2787 */ 2788 spin_lock_irqsave(&dev->flush_q_lock, flags); 2789 list_for_each_entry(qp, &cq->sq_head, sq_entry) { 2790 if (cqes_to_poll == 0) 2791 break; 2792 err_cqes = ocrdma_add_err_cqe(cq, cqes_to_poll, qp, wc); 2793 cqes_to_poll -= err_cqes; 2794 num_os_cqe += err_cqes; 2795 wc = wc + err_cqes; 2796 } 2797 spin_unlock_irqrestore(&dev->flush_q_lock, flags); 2798 } 2799 return num_os_cqe; 2800 } 2801 2802 int ocrdma_arm_cq(struct ib_cq *ibcq, enum ib_cq_notify_flags cq_flags) 2803 { 2804 struct ocrdma_cq *cq = get_ocrdma_cq(ibcq); 2805 struct ocrdma_dev *dev = get_ocrdma_dev(ibcq->device); 2806 u16 cq_id; 2807 unsigned long flags; 2808 bool arm_needed = false, sol_needed = false; 2809 2810 cq_id = cq->id; 2811 2812 spin_lock_irqsave(&cq->cq_lock, flags); 2813 if (cq_flags & IB_CQ_NEXT_COMP || cq_flags & IB_CQ_SOLICITED) 2814 arm_needed = true; 2815 if (cq_flags & IB_CQ_SOLICITED) 2816 sol_needed = true; 2817 2818 if (cq->first_arm) { 2819 ocrdma_ring_cq_db(dev, cq_id, arm_needed, sol_needed, 0); 2820 cq->first_arm = false; 2821 goto skip_defer; 2822 } 2823 cq->deferred_arm = true; 2824 2825 skip_defer: 2826 cq->deferred_sol = sol_needed; 2827 spin_unlock_irqrestore(&cq->cq_lock, flags); 2828 2829 return 0; 2830 } 2831 2832 struct ib_mr *ocrdma_alloc_frmr(struct ib_pd *ibpd, int max_page_list_len) 2833 { 2834 int status; 2835 struct ocrdma_mr *mr; 2836 struct ocrdma_pd *pd = get_ocrdma_pd(ibpd); 2837 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device); 2838 2839 if (max_page_list_len > dev->attr.max_pages_per_frmr) 2840 return ERR_PTR(-EINVAL); 2841 2842 mr = kzalloc(sizeof(*mr), GFP_KERNEL); 2843 if (!mr) 2844 return ERR_PTR(-ENOMEM); 2845 2846 status = ocrdma_get_pbl_info(dev, mr, max_page_list_len); 2847 if (status) 2848 goto pbl_err; 2849 mr->hwmr.fr_mr = 1; 2850 mr->hwmr.remote_rd = 0; 2851 mr->hwmr.remote_wr = 0; 2852 mr->hwmr.local_rd = 0; 2853 mr->hwmr.local_wr = 0; 2854 mr->hwmr.mw_bind = 0; 2855 status = ocrdma_build_pbl_tbl(dev, &mr->hwmr); 2856 if (status) 2857 goto pbl_err; 2858 status = ocrdma_reg_mr(dev, &mr->hwmr, pd->id, 0); 2859 if (status) 2860 goto mbx_err; 2861 mr->ibmr.rkey = mr->hwmr.lkey; 2862 mr->ibmr.lkey = mr->hwmr.lkey; 2863 dev->stag_arr[(mr->hwmr.lkey >> 8) & (OCRDMA_MAX_STAG - 1)] = 2864 (unsigned long) mr; 2865 return &mr->ibmr; 2866 mbx_err: 2867 ocrdma_free_mr_pbl_tbl(dev, &mr->hwmr); 2868 pbl_err: 2869 kfree(mr); 2870 return ERR_PTR(-ENOMEM); 2871 } 2872 2873 struct ib_fast_reg_page_list *ocrdma_alloc_frmr_page_list(struct ib_device 2874 *ibdev, 2875 int page_list_len) 2876 { 2877 struct ib_fast_reg_page_list *frmr_list; 2878 int size; 2879 2880 size = sizeof(*frmr_list) + (page_list_len * sizeof(u64)); 2881 frmr_list = kzalloc(size, GFP_KERNEL); 2882 if (!frmr_list) 2883 return ERR_PTR(-ENOMEM); 2884 frmr_list->page_list = (u64 *)(frmr_list + 1); 2885 return frmr_list; 2886 } 2887 2888 void ocrdma_free_frmr_page_list(struct ib_fast_reg_page_list *page_list) 2889 { 2890 kfree(page_list); 2891 } 2892 2893 #define MAX_KERNEL_PBE_SIZE 65536 2894 static inline int count_kernel_pbes(struct ib_phys_buf *buf_list, 2895 int buf_cnt, u32 *pbe_size) 2896 { 2897 u64 total_size = 0; 2898 u64 buf_size = 0; 2899 int i; 2900 *pbe_size = roundup(buf_list[0].size, PAGE_SIZE); 2901 *pbe_size = roundup_pow_of_two(*pbe_size); 2902 2903 /* find the smallest PBE size that we can have */ 2904 for (i = 0; i < buf_cnt; i++) { 2905 /* first addr may not be page aligned, so ignore checking */ 2906 if ((i != 0) && ((buf_list[i].addr & ~PAGE_MASK) || 2907 (buf_list[i].size & ~PAGE_MASK))) { 2908 return 0; 2909 } 2910 2911 /* if configured PBE size is greater then the chosen one, 2912 * reduce the PBE size. 2913 */ 2914 buf_size = roundup(buf_list[i].size, PAGE_SIZE); 2915 /* pbe_size has to be even multiple of 4K 1,2,4,8...*/ 2916 buf_size = roundup_pow_of_two(buf_size); 2917 if (*pbe_size > buf_size) 2918 *pbe_size = buf_size; 2919 2920 total_size += buf_size; 2921 } 2922 *pbe_size = *pbe_size > MAX_KERNEL_PBE_SIZE ? 2923 (MAX_KERNEL_PBE_SIZE) : (*pbe_size); 2924 2925 /* num_pbes = total_size / (*pbe_size); this is implemented below. */ 2926 2927 return total_size >> ilog2(*pbe_size); 2928 } 2929 2930 static void build_kernel_pbes(struct ib_phys_buf *buf_list, int ib_buf_cnt, 2931 u32 pbe_size, struct ocrdma_pbl *pbl_tbl, 2932 struct ocrdma_hw_mr *hwmr) 2933 { 2934 int i; 2935 int idx; 2936 int pbes_per_buf = 0; 2937 u64 buf_addr = 0; 2938 int num_pbes; 2939 struct ocrdma_pbe *pbe; 2940 int total_num_pbes = 0; 2941 2942 if (!hwmr->num_pbes) 2943 return; 2944 2945 pbe = (struct ocrdma_pbe *)pbl_tbl->va; 2946 num_pbes = 0; 2947 2948 /* go through the OS phy regions & fill hw pbe entries into pbls. */ 2949 for (i = 0; i < ib_buf_cnt; i++) { 2950 buf_addr = buf_list[i].addr; 2951 pbes_per_buf = 2952 roundup_pow_of_two(roundup(buf_list[i].size, PAGE_SIZE)) / 2953 pbe_size; 2954 hwmr->len += buf_list[i].size; 2955 /* number of pbes can be more for one OS buf, when 2956 * buffers are of different sizes. 2957 * split the ib_buf to one or more pbes. 2958 */ 2959 for (idx = 0; idx < pbes_per_buf; idx++) { 2960 /* we program always page aligned addresses, 2961 * first unaligned address is taken care by fbo. 2962 */ 2963 if (i == 0) { 2964 /* for non zero fbo, assign the 2965 * start of the page. 2966 */ 2967 pbe->pa_lo = 2968 cpu_to_le32((u32) (buf_addr & PAGE_MASK)); 2969 pbe->pa_hi = 2970 cpu_to_le32((u32) upper_32_bits(buf_addr)); 2971 } else { 2972 pbe->pa_lo = 2973 cpu_to_le32((u32) (buf_addr & 0xffffffff)); 2974 pbe->pa_hi = 2975 cpu_to_le32((u32) upper_32_bits(buf_addr)); 2976 } 2977 buf_addr += pbe_size; 2978 num_pbes += 1; 2979 total_num_pbes += 1; 2980 pbe++; 2981 2982 if (total_num_pbes == hwmr->num_pbes) 2983 goto mr_tbl_done; 2984 /* if the pbl is full storing the pbes, 2985 * move to next pbl. 2986 */ 2987 if (num_pbes == (hwmr->pbl_size/sizeof(u64))) { 2988 pbl_tbl++; 2989 pbe = (struct ocrdma_pbe *)pbl_tbl->va; 2990 num_pbes = 0; 2991 } 2992 } 2993 } 2994 mr_tbl_done: 2995 return; 2996 } 2997 2998 struct ib_mr *ocrdma_reg_kernel_mr(struct ib_pd *ibpd, 2999 struct ib_phys_buf *buf_list, 3000 int buf_cnt, int acc, u64 *iova_start) 3001 { 3002 int status = -ENOMEM; 3003 struct ocrdma_mr *mr; 3004 struct ocrdma_pd *pd = get_ocrdma_pd(ibpd); 3005 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device); 3006 u32 num_pbes; 3007 u32 pbe_size = 0; 3008 3009 if ((acc & IB_ACCESS_REMOTE_WRITE) && !(acc & IB_ACCESS_LOCAL_WRITE)) 3010 return ERR_PTR(-EINVAL); 3011 3012 mr = kzalloc(sizeof(*mr), GFP_KERNEL); 3013 if (!mr) 3014 return ERR_PTR(status); 3015 3016 num_pbes = count_kernel_pbes(buf_list, buf_cnt, &pbe_size); 3017 if (num_pbes == 0) { 3018 status = -EINVAL; 3019 goto pbl_err; 3020 } 3021 status = ocrdma_get_pbl_info(dev, mr, num_pbes); 3022 if (status) 3023 goto pbl_err; 3024 3025 mr->hwmr.pbe_size = pbe_size; 3026 mr->hwmr.fbo = *iova_start - (buf_list[0].addr & PAGE_MASK); 3027 mr->hwmr.va = *iova_start; 3028 mr->hwmr.local_rd = 1; 3029 mr->hwmr.remote_wr = (acc & IB_ACCESS_REMOTE_WRITE) ? 1 : 0; 3030 mr->hwmr.remote_rd = (acc & IB_ACCESS_REMOTE_READ) ? 1 : 0; 3031 mr->hwmr.local_wr = (acc & IB_ACCESS_LOCAL_WRITE) ? 1 : 0; 3032 mr->hwmr.remote_atomic = (acc & IB_ACCESS_REMOTE_ATOMIC) ? 1 : 0; 3033 mr->hwmr.mw_bind = (acc & IB_ACCESS_MW_BIND) ? 1 : 0; 3034 3035 status = ocrdma_build_pbl_tbl(dev, &mr->hwmr); 3036 if (status) 3037 goto pbl_err; 3038 build_kernel_pbes(buf_list, buf_cnt, pbe_size, mr->hwmr.pbl_table, 3039 &mr->hwmr); 3040 status = ocrdma_reg_mr(dev, &mr->hwmr, pd->id, acc); 3041 if (status) 3042 goto mbx_err; 3043 3044 mr->ibmr.lkey = mr->hwmr.lkey; 3045 if (mr->hwmr.remote_wr || mr->hwmr.remote_rd) 3046 mr->ibmr.rkey = mr->hwmr.lkey; 3047 return &mr->ibmr; 3048 3049 mbx_err: 3050 ocrdma_free_mr_pbl_tbl(dev, &mr->hwmr); 3051 pbl_err: 3052 kfree(mr); 3053 return ERR_PTR(status); 3054 } 3055