1 /* This file is part of the Emulex RoCE Device Driver for 2 * RoCE (RDMA over Converged Ethernet) adapters. 3 * Copyright (C) 2012-2015 Emulex. All rights reserved. 4 * EMULEX and SLI are trademarks of Emulex. 5 * www.emulex.com 6 * 7 * This software is available to you under a choice of one of two licenses. 8 * You may choose to be licensed under the terms of the GNU General Public 9 * License (GPL) Version 2, available from the file COPYING in the main 10 * directory of this source tree, or the BSD license below: 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 16 * - Redistributions of source code must retain the above copyright notice, 17 * this list of conditions and the following disclaimer. 18 * 19 * - Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in 21 * the documentation and/or other materials provided with the distribution. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 24 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,THE 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 27 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 30 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 31 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 32 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 33 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 34 * 35 * Contact Information: 36 * linux-drivers@emulex.com 37 * 38 * Emulex 39 * 3333 Susan Street 40 * Costa Mesa, CA 92626 41 */ 42 43 #include <linux/dma-mapping.h> 44 #include <rdma/ib_verbs.h> 45 #include <rdma/ib_user_verbs.h> 46 #include <rdma/iw_cm.h> 47 #include <rdma/ib_umem.h> 48 #include <rdma/ib_addr.h> 49 #include <rdma/ib_cache.h> 50 51 #include "ocrdma.h" 52 #include "ocrdma_hw.h" 53 #include "ocrdma_verbs.h" 54 #include "ocrdma_abi.h" 55 56 int ocrdma_query_pkey(struct ib_device *ibdev, u8 port, u16 index, u16 *pkey) 57 { 58 if (index > 1) 59 return -EINVAL; 60 61 *pkey = 0xffff; 62 return 0; 63 } 64 65 int ocrdma_query_gid(struct ib_device *ibdev, u8 port, 66 int index, union ib_gid *sgid) 67 { 68 int ret; 69 struct ocrdma_dev *dev; 70 71 dev = get_ocrdma_dev(ibdev); 72 memset(sgid, 0, sizeof(*sgid)); 73 if (index >= OCRDMA_MAX_SGID) 74 return -EINVAL; 75 76 ret = ib_get_cached_gid(ibdev, port, index, sgid, NULL); 77 if (ret == -EAGAIN) { 78 memcpy(sgid, &zgid, sizeof(*sgid)); 79 return 0; 80 } 81 82 return ret; 83 } 84 85 int ocrdma_add_gid(struct ib_device *device, 86 u8 port_num, 87 unsigned int index, 88 const union ib_gid *gid, 89 const struct ib_gid_attr *attr, 90 void **context) { 91 return 0; 92 } 93 94 int ocrdma_del_gid(struct ib_device *device, 95 u8 port_num, 96 unsigned int index, 97 void **context) { 98 return 0; 99 } 100 101 int ocrdma_query_device(struct ib_device *ibdev, struct ib_device_attr *attr, 102 struct ib_udata *uhw) 103 { 104 struct ocrdma_dev *dev = get_ocrdma_dev(ibdev); 105 106 if (uhw->inlen || uhw->outlen) 107 return -EINVAL; 108 109 memset(attr, 0, sizeof *attr); 110 memcpy(&attr->fw_ver, &dev->attr.fw_ver[0], 111 min(sizeof(dev->attr.fw_ver), sizeof(attr->fw_ver))); 112 ocrdma_get_guid(dev, (u8 *)&attr->sys_image_guid); 113 attr->max_mr_size = dev->attr.max_mr_size; 114 attr->page_size_cap = 0xffff000; 115 attr->vendor_id = dev->nic_info.pdev->vendor; 116 attr->vendor_part_id = dev->nic_info.pdev->device; 117 attr->hw_ver = dev->asic_id; 118 attr->max_qp = dev->attr.max_qp; 119 attr->max_ah = OCRDMA_MAX_AH; 120 attr->max_qp_wr = dev->attr.max_wqe; 121 122 attr->device_cap_flags = IB_DEVICE_CURR_QP_STATE_MOD | 123 IB_DEVICE_RC_RNR_NAK_GEN | 124 IB_DEVICE_SHUTDOWN_PORT | 125 IB_DEVICE_SYS_IMAGE_GUID | 126 IB_DEVICE_LOCAL_DMA_LKEY | 127 IB_DEVICE_MEM_MGT_EXTENSIONS; 128 attr->max_sge = min(dev->attr.max_send_sge, dev->attr.max_srq_sge); 129 attr->max_sge_rd = 0; 130 attr->max_cq = dev->attr.max_cq; 131 attr->max_cqe = dev->attr.max_cqe; 132 attr->max_mr = dev->attr.max_mr; 133 attr->max_mw = dev->attr.max_mw; 134 attr->max_pd = dev->attr.max_pd; 135 attr->atomic_cap = 0; 136 attr->max_fmr = 0; 137 attr->max_map_per_fmr = 0; 138 attr->max_qp_rd_atom = 139 min(dev->attr.max_ord_per_qp, dev->attr.max_ird_per_qp); 140 attr->max_qp_init_rd_atom = dev->attr.max_ord_per_qp; 141 attr->max_srq = dev->attr.max_srq; 142 attr->max_srq_sge = dev->attr.max_srq_sge; 143 attr->max_srq_wr = dev->attr.max_rqe; 144 attr->local_ca_ack_delay = dev->attr.local_ca_ack_delay; 145 attr->max_fast_reg_page_list_len = dev->attr.max_pages_per_frmr; 146 attr->max_pkeys = 1; 147 return 0; 148 } 149 150 struct net_device *ocrdma_get_netdev(struct ib_device *ibdev, u8 port_num) 151 { 152 struct ocrdma_dev *dev; 153 struct net_device *ndev = NULL; 154 155 rcu_read_lock(); 156 157 dev = get_ocrdma_dev(ibdev); 158 if (dev) 159 ndev = dev->nic_info.netdev; 160 if (ndev) 161 dev_hold(ndev); 162 163 rcu_read_unlock(); 164 165 return ndev; 166 } 167 168 static inline void get_link_speed_and_width(struct ocrdma_dev *dev, 169 u8 *ib_speed, u8 *ib_width) 170 { 171 int status; 172 u8 speed; 173 174 status = ocrdma_mbx_get_link_speed(dev, &speed); 175 if (status) 176 speed = OCRDMA_PHYS_LINK_SPEED_ZERO; 177 178 switch (speed) { 179 case OCRDMA_PHYS_LINK_SPEED_1GBPS: 180 *ib_speed = IB_SPEED_SDR; 181 *ib_width = IB_WIDTH_1X; 182 break; 183 184 case OCRDMA_PHYS_LINK_SPEED_10GBPS: 185 *ib_speed = IB_SPEED_QDR; 186 *ib_width = IB_WIDTH_1X; 187 break; 188 189 case OCRDMA_PHYS_LINK_SPEED_20GBPS: 190 *ib_speed = IB_SPEED_DDR; 191 *ib_width = IB_WIDTH_4X; 192 break; 193 194 case OCRDMA_PHYS_LINK_SPEED_40GBPS: 195 *ib_speed = IB_SPEED_QDR; 196 *ib_width = IB_WIDTH_4X; 197 break; 198 199 default: 200 /* Unsupported */ 201 *ib_speed = IB_SPEED_SDR; 202 *ib_width = IB_WIDTH_1X; 203 } 204 } 205 206 int ocrdma_query_port(struct ib_device *ibdev, 207 u8 port, struct ib_port_attr *props) 208 { 209 enum ib_port_state port_state; 210 struct ocrdma_dev *dev; 211 struct net_device *netdev; 212 213 dev = get_ocrdma_dev(ibdev); 214 if (port > 1) { 215 pr_err("%s(%d) invalid_port=0x%x\n", __func__, 216 dev->id, port); 217 return -EINVAL; 218 } 219 netdev = dev->nic_info.netdev; 220 if (netif_running(netdev) && netif_oper_up(netdev)) { 221 port_state = IB_PORT_ACTIVE; 222 props->phys_state = 5; 223 } else { 224 port_state = IB_PORT_DOWN; 225 props->phys_state = 3; 226 } 227 props->max_mtu = IB_MTU_4096; 228 props->active_mtu = iboe_get_mtu(netdev->mtu); 229 props->lid = 0; 230 props->lmc = 0; 231 props->sm_lid = 0; 232 props->sm_sl = 0; 233 props->state = port_state; 234 props->port_cap_flags = 235 IB_PORT_CM_SUP | 236 IB_PORT_REINIT_SUP | 237 IB_PORT_DEVICE_MGMT_SUP | IB_PORT_VENDOR_CLASS_SUP | 238 IB_PORT_IP_BASED_GIDS; 239 props->gid_tbl_len = OCRDMA_MAX_SGID; 240 props->pkey_tbl_len = 1; 241 props->bad_pkey_cntr = 0; 242 props->qkey_viol_cntr = 0; 243 get_link_speed_and_width(dev, &props->active_speed, 244 &props->active_width); 245 props->max_msg_sz = 0x80000000; 246 props->max_vl_num = 4; 247 return 0; 248 } 249 250 int ocrdma_modify_port(struct ib_device *ibdev, u8 port, int mask, 251 struct ib_port_modify *props) 252 { 253 struct ocrdma_dev *dev; 254 255 dev = get_ocrdma_dev(ibdev); 256 if (port > 1) { 257 pr_err("%s(%d) invalid_port=0x%x\n", __func__, dev->id, port); 258 return -EINVAL; 259 } 260 return 0; 261 } 262 263 static int ocrdma_add_mmap(struct ocrdma_ucontext *uctx, u64 phy_addr, 264 unsigned long len) 265 { 266 struct ocrdma_mm *mm; 267 268 mm = kzalloc(sizeof(*mm), GFP_KERNEL); 269 if (mm == NULL) 270 return -ENOMEM; 271 mm->key.phy_addr = phy_addr; 272 mm->key.len = len; 273 INIT_LIST_HEAD(&mm->entry); 274 275 mutex_lock(&uctx->mm_list_lock); 276 list_add_tail(&mm->entry, &uctx->mm_head); 277 mutex_unlock(&uctx->mm_list_lock); 278 return 0; 279 } 280 281 static void ocrdma_del_mmap(struct ocrdma_ucontext *uctx, u64 phy_addr, 282 unsigned long len) 283 { 284 struct ocrdma_mm *mm, *tmp; 285 286 mutex_lock(&uctx->mm_list_lock); 287 list_for_each_entry_safe(mm, tmp, &uctx->mm_head, entry) { 288 if (len != mm->key.len && phy_addr != mm->key.phy_addr) 289 continue; 290 291 list_del(&mm->entry); 292 kfree(mm); 293 break; 294 } 295 mutex_unlock(&uctx->mm_list_lock); 296 } 297 298 static bool ocrdma_search_mmap(struct ocrdma_ucontext *uctx, u64 phy_addr, 299 unsigned long len) 300 { 301 bool found = false; 302 struct ocrdma_mm *mm; 303 304 mutex_lock(&uctx->mm_list_lock); 305 list_for_each_entry(mm, &uctx->mm_head, entry) { 306 if (len != mm->key.len && phy_addr != mm->key.phy_addr) 307 continue; 308 309 found = true; 310 break; 311 } 312 mutex_unlock(&uctx->mm_list_lock); 313 return found; 314 } 315 316 317 static u16 _ocrdma_pd_mgr_get_bitmap(struct ocrdma_dev *dev, bool dpp_pool) 318 { 319 u16 pd_bitmap_idx = 0; 320 const unsigned long *pd_bitmap; 321 322 if (dpp_pool) { 323 pd_bitmap = dev->pd_mgr->pd_dpp_bitmap; 324 pd_bitmap_idx = find_first_zero_bit(pd_bitmap, 325 dev->pd_mgr->max_dpp_pd); 326 __set_bit(pd_bitmap_idx, dev->pd_mgr->pd_dpp_bitmap); 327 dev->pd_mgr->pd_dpp_count++; 328 if (dev->pd_mgr->pd_dpp_count > dev->pd_mgr->pd_dpp_thrsh) 329 dev->pd_mgr->pd_dpp_thrsh = dev->pd_mgr->pd_dpp_count; 330 } else { 331 pd_bitmap = dev->pd_mgr->pd_norm_bitmap; 332 pd_bitmap_idx = find_first_zero_bit(pd_bitmap, 333 dev->pd_mgr->max_normal_pd); 334 __set_bit(pd_bitmap_idx, dev->pd_mgr->pd_norm_bitmap); 335 dev->pd_mgr->pd_norm_count++; 336 if (dev->pd_mgr->pd_norm_count > dev->pd_mgr->pd_norm_thrsh) 337 dev->pd_mgr->pd_norm_thrsh = dev->pd_mgr->pd_norm_count; 338 } 339 return pd_bitmap_idx; 340 } 341 342 static int _ocrdma_pd_mgr_put_bitmap(struct ocrdma_dev *dev, u16 pd_id, 343 bool dpp_pool) 344 { 345 u16 pd_count; 346 u16 pd_bit_index; 347 348 pd_count = dpp_pool ? dev->pd_mgr->pd_dpp_count : 349 dev->pd_mgr->pd_norm_count; 350 if (pd_count == 0) 351 return -EINVAL; 352 353 if (dpp_pool) { 354 pd_bit_index = pd_id - dev->pd_mgr->pd_dpp_start; 355 if (pd_bit_index >= dev->pd_mgr->max_dpp_pd) { 356 return -EINVAL; 357 } else { 358 __clear_bit(pd_bit_index, dev->pd_mgr->pd_dpp_bitmap); 359 dev->pd_mgr->pd_dpp_count--; 360 } 361 } else { 362 pd_bit_index = pd_id - dev->pd_mgr->pd_norm_start; 363 if (pd_bit_index >= dev->pd_mgr->max_normal_pd) { 364 return -EINVAL; 365 } else { 366 __clear_bit(pd_bit_index, dev->pd_mgr->pd_norm_bitmap); 367 dev->pd_mgr->pd_norm_count--; 368 } 369 } 370 371 return 0; 372 } 373 374 static u8 ocrdma_put_pd_num(struct ocrdma_dev *dev, u16 pd_id, 375 bool dpp_pool) 376 { 377 int status; 378 379 mutex_lock(&dev->dev_lock); 380 status = _ocrdma_pd_mgr_put_bitmap(dev, pd_id, dpp_pool); 381 mutex_unlock(&dev->dev_lock); 382 return status; 383 } 384 385 static int ocrdma_get_pd_num(struct ocrdma_dev *dev, struct ocrdma_pd *pd) 386 { 387 u16 pd_idx = 0; 388 int status = 0; 389 390 mutex_lock(&dev->dev_lock); 391 if (pd->dpp_enabled) { 392 /* try allocating DPP PD, if not available then normal PD */ 393 if (dev->pd_mgr->pd_dpp_count < dev->pd_mgr->max_dpp_pd) { 394 pd_idx = _ocrdma_pd_mgr_get_bitmap(dev, true); 395 pd->id = dev->pd_mgr->pd_dpp_start + pd_idx; 396 pd->dpp_page = dev->pd_mgr->dpp_page_index + pd_idx; 397 } else if (dev->pd_mgr->pd_norm_count < 398 dev->pd_mgr->max_normal_pd) { 399 pd_idx = _ocrdma_pd_mgr_get_bitmap(dev, false); 400 pd->id = dev->pd_mgr->pd_norm_start + pd_idx; 401 pd->dpp_enabled = false; 402 } else { 403 status = -EINVAL; 404 } 405 } else { 406 if (dev->pd_mgr->pd_norm_count < dev->pd_mgr->max_normal_pd) { 407 pd_idx = _ocrdma_pd_mgr_get_bitmap(dev, false); 408 pd->id = dev->pd_mgr->pd_norm_start + pd_idx; 409 } else { 410 status = -EINVAL; 411 } 412 } 413 mutex_unlock(&dev->dev_lock); 414 return status; 415 } 416 417 static struct ocrdma_pd *_ocrdma_alloc_pd(struct ocrdma_dev *dev, 418 struct ocrdma_ucontext *uctx, 419 struct ib_udata *udata) 420 { 421 struct ocrdma_pd *pd = NULL; 422 int status = 0; 423 424 pd = kzalloc(sizeof(*pd), GFP_KERNEL); 425 if (!pd) 426 return ERR_PTR(-ENOMEM); 427 428 if (udata && uctx && dev->attr.max_dpp_pds) { 429 pd->dpp_enabled = 430 ocrdma_get_asic_type(dev) == OCRDMA_ASIC_GEN_SKH_R; 431 pd->num_dpp_qp = 432 pd->dpp_enabled ? (dev->nic_info.db_page_size / 433 dev->attr.wqe_size) : 0; 434 } 435 436 if (dev->pd_mgr->pd_prealloc_valid) { 437 status = ocrdma_get_pd_num(dev, pd); 438 if (status == 0) { 439 return pd; 440 } else { 441 kfree(pd); 442 return ERR_PTR(status); 443 } 444 } 445 446 retry: 447 status = ocrdma_mbx_alloc_pd(dev, pd); 448 if (status) { 449 if (pd->dpp_enabled) { 450 pd->dpp_enabled = false; 451 pd->num_dpp_qp = 0; 452 goto retry; 453 } else { 454 kfree(pd); 455 return ERR_PTR(status); 456 } 457 } 458 459 return pd; 460 } 461 462 static inline int is_ucontext_pd(struct ocrdma_ucontext *uctx, 463 struct ocrdma_pd *pd) 464 { 465 return (uctx->cntxt_pd == pd ? true : false); 466 } 467 468 static int _ocrdma_dealloc_pd(struct ocrdma_dev *dev, 469 struct ocrdma_pd *pd) 470 { 471 int status = 0; 472 473 if (dev->pd_mgr->pd_prealloc_valid) 474 status = ocrdma_put_pd_num(dev, pd->id, pd->dpp_enabled); 475 else 476 status = ocrdma_mbx_dealloc_pd(dev, pd); 477 478 kfree(pd); 479 return status; 480 } 481 482 static int ocrdma_alloc_ucontext_pd(struct ocrdma_dev *dev, 483 struct ocrdma_ucontext *uctx, 484 struct ib_udata *udata) 485 { 486 int status = 0; 487 488 uctx->cntxt_pd = _ocrdma_alloc_pd(dev, uctx, udata); 489 if (IS_ERR(uctx->cntxt_pd)) { 490 status = PTR_ERR(uctx->cntxt_pd); 491 uctx->cntxt_pd = NULL; 492 goto err; 493 } 494 495 uctx->cntxt_pd->uctx = uctx; 496 uctx->cntxt_pd->ibpd.device = &dev->ibdev; 497 err: 498 return status; 499 } 500 501 static int ocrdma_dealloc_ucontext_pd(struct ocrdma_ucontext *uctx) 502 { 503 struct ocrdma_pd *pd = uctx->cntxt_pd; 504 struct ocrdma_dev *dev = get_ocrdma_dev(pd->ibpd.device); 505 506 if (uctx->pd_in_use) { 507 pr_err("%s(%d) Freeing in use pdid=0x%x.\n", 508 __func__, dev->id, pd->id); 509 } 510 uctx->cntxt_pd = NULL; 511 (void)_ocrdma_dealloc_pd(dev, pd); 512 return 0; 513 } 514 515 static struct ocrdma_pd *ocrdma_get_ucontext_pd(struct ocrdma_ucontext *uctx) 516 { 517 struct ocrdma_pd *pd = NULL; 518 519 mutex_lock(&uctx->mm_list_lock); 520 if (!uctx->pd_in_use) { 521 uctx->pd_in_use = true; 522 pd = uctx->cntxt_pd; 523 } 524 mutex_unlock(&uctx->mm_list_lock); 525 526 return pd; 527 } 528 529 static void ocrdma_release_ucontext_pd(struct ocrdma_ucontext *uctx) 530 { 531 mutex_lock(&uctx->mm_list_lock); 532 uctx->pd_in_use = false; 533 mutex_unlock(&uctx->mm_list_lock); 534 } 535 536 struct ib_ucontext *ocrdma_alloc_ucontext(struct ib_device *ibdev, 537 struct ib_udata *udata) 538 { 539 int status; 540 struct ocrdma_ucontext *ctx; 541 struct ocrdma_alloc_ucontext_resp resp; 542 struct ocrdma_dev *dev = get_ocrdma_dev(ibdev); 543 struct pci_dev *pdev = dev->nic_info.pdev; 544 u32 map_len = roundup(sizeof(u32) * 2048, PAGE_SIZE); 545 546 if (!udata) 547 return ERR_PTR(-EFAULT); 548 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL); 549 if (!ctx) 550 return ERR_PTR(-ENOMEM); 551 INIT_LIST_HEAD(&ctx->mm_head); 552 mutex_init(&ctx->mm_list_lock); 553 554 ctx->ah_tbl.va = dma_alloc_coherent(&pdev->dev, map_len, 555 &ctx->ah_tbl.pa, GFP_KERNEL); 556 if (!ctx->ah_tbl.va) { 557 kfree(ctx); 558 return ERR_PTR(-ENOMEM); 559 } 560 memset(ctx->ah_tbl.va, 0, map_len); 561 ctx->ah_tbl.len = map_len; 562 563 memset(&resp, 0, sizeof(resp)); 564 resp.ah_tbl_len = ctx->ah_tbl.len; 565 resp.ah_tbl_page = virt_to_phys(ctx->ah_tbl.va); 566 567 status = ocrdma_add_mmap(ctx, resp.ah_tbl_page, resp.ah_tbl_len); 568 if (status) 569 goto map_err; 570 571 status = ocrdma_alloc_ucontext_pd(dev, ctx, udata); 572 if (status) 573 goto pd_err; 574 575 resp.dev_id = dev->id; 576 resp.max_inline_data = dev->attr.max_inline_data; 577 resp.wqe_size = dev->attr.wqe_size; 578 resp.rqe_size = dev->attr.rqe_size; 579 resp.dpp_wqe_size = dev->attr.wqe_size; 580 581 memcpy(resp.fw_ver, dev->attr.fw_ver, sizeof(resp.fw_ver)); 582 status = ib_copy_to_udata(udata, &resp, sizeof(resp)); 583 if (status) 584 goto cpy_err; 585 return &ctx->ibucontext; 586 587 cpy_err: 588 pd_err: 589 ocrdma_del_mmap(ctx, ctx->ah_tbl.pa, ctx->ah_tbl.len); 590 map_err: 591 dma_free_coherent(&pdev->dev, ctx->ah_tbl.len, ctx->ah_tbl.va, 592 ctx->ah_tbl.pa); 593 kfree(ctx); 594 return ERR_PTR(status); 595 } 596 597 int ocrdma_dealloc_ucontext(struct ib_ucontext *ibctx) 598 { 599 int status = 0; 600 struct ocrdma_mm *mm, *tmp; 601 struct ocrdma_ucontext *uctx = get_ocrdma_ucontext(ibctx); 602 struct ocrdma_dev *dev = get_ocrdma_dev(ibctx->device); 603 struct pci_dev *pdev = dev->nic_info.pdev; 604 605 status = ocrdma_dealloc_ucontext_pd(uctx); 606 607 ocrdma_del_mmap(uctx, uctx->ah_tbl.pa, uctx->ah_tbl.len); 608 dma_free_coherent(&pdev->dev, uctx->ah_tbl.len, uctx->ah_tbl.va, 609 uctx->ah_tbl.pa); 610 611 list_for_each_entry_safe(mm, tmp, &uctx->mm_head, entry) { 612 list_del(&mm->entry); 613 kfree(mm); 614 } 615 kfree(uctx); 616 return status; 617 } 618 619 int ocrdma_mmap(struct ib_ucontext *context, struct vm_area_struct *vma) 620 { 621 struct ocrdma_ucontext *ucontext = get_ocrdma_ucontext(context); 622 struct ocrdma_dev *dev = get_ocrdma_dev(context->device); 623 unsigned long vm_page = vma->vm_pgoff << PAGE_SHIFT; 624 u64 unmapped_db = (u64) dev->nic_info.unmapped_db; 625 unsigned long len = (vma->vm_end - vma->vm_start); 626 int status = 0; 627 bool found; 628 629 if (vma->vm_start & (PAGE_SIZE - 1)) 630 return -EINVAL; 631 found = ocrdma_search_mmap(ucontext, vma->vm_pgoff << PAGE_SHIFT, len); 632 if (!found) 633 return -EINVAL; 634 635 if ((vm_page >= unmapped_db) && (vm_page <= (unmapped_db + 636 dev->nic_info.db_total_size)) && 637 (len <= dev->nic_info.db_page_size)) { 638 if (vma->vm_flags & VM_READ) 639 return -EPERM; 640 641 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); 642 status = io_remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff, 643 len, vma->vm_page_prot); 644 } else if (dev->nic_info.dpp_unmapped_len && 645 (vm_page >= (u64) dev->nic_info.dpp_unmapped_addr) && 646 (vm_page <= (u64) (dev->nic_info.dpp_unmapped_addr + 647 dev->nic_info.dpp_unmapped_len)) && 648 (len <= dev->nic_info.dpp_unmapped_len)) { 649 if (vma->vm_flags & VM_READ) 650 return -EPERM; 651 652 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot); 653 status = io_remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff, 654 len, vma->vm_page_prot); 655 } else { 656 status = remap_pfn_range(vma, vma->vm_start, 657 vma->vm_pgoff, len, vma->vm_page_prot); 658 } 659 return status; 660 } 661 662 static int ocrdma_copy_pd_uresp(struct ocrdma_dev *dev, struct ocrdma_pd *pd, 663 struct ib_ucontext *ib_ctx, 664 struct ib_udata *udata) 665 { 666 int status; 667 u64 db_page_addr; 668 u64 dpp_page_addr = 0; 669 u32 db_page_size; 670 struct ocrdma_alloc_pd_uresp rsp; 671 struct ocrdma_ucontext *uctx = get_ocrdma_ucontext(ib_ctx); 672 673 memset(&rsp, 0, sizeof(rsp)); 674 rsp.id = pd->id; 675 rsp.dpp_enabled = pd->dpp_enabled; 676 db_page_addr = ocrdma_get_db_addr(dev, pd->id); 677 db_page_size = dev->nic_info.db_page_size; 678 679 status = ocrdma_add_mmap(uctx, db_page_addr, db_page_size); 680 if (status) 681 return status; 682 683 if (pd->dpp_enabled) { 684 dpp_page_addr = dev->nic_info.dpp_unmapped_addr + 685 (pd->id * PAGE_SIZE); 686 status = ocrdma_add_mmap(uctx, dpp_page_addr, 687 PAGE_SIZE); 688 if (status) 689 goto dpp_map_err; 690 rsp.dpp_page_addr_hi = upper_32_bits(dpp_page_addr); 691 rsp.dpp_page_addr_lo = dpp_page_addr; 692 } 693 694 status = ib_copy_to_udata(udata, &rsp, sizeof(rsp)); 695 if (status) 696 goto ucopy_err; 697 698 pd->uctx = uctx; 699 return 0; 700 701 ucopy_err: 702 if (pd->dpp_enabled) 703 ocrdma_del_mmap(pd->uctx, dpp_page_addr, PAGE_SIZE); 704 dpp_map_err: 705 ocrdma_del_mmap(pd->uctx, db_page_addr, db_page_size); 706 return status; 707 } 708 709 struct ib_pd *ocrdma_alloc_pd(struct ib_device *ibdev, 710 struct ib_ucontext *context, 711 struct ib_udata *udata) 712 { 713 struct ocrdma_dev *dev = get_ocrdma_dev(ibdev); 714 struct ocrdma_pd *pd; 715 struct ocrdma_ucontext *uctx = NULL; 716 int status; 717 u8 is_uctx_pd = false; 718 719 if (udata && context) { 720 uctx = get_ocrdma_ucontext(context); 721 pd = ocrdma_get_ucontext_pd(uctx); 722 if (pd) { 723 is_uctx_pd = true; 724 goto pd_mapping; 725 } 726 } 727 728 pd = _ocrdma_alloc_pd(dev, uctx, udata); 729 if (IS_ERR(pd)) { 730 status = PTR_ERR(pd); 731 goto exit; 732 } 733 734 pd_mapping: 735 if (udata && context) { 736 status = ocrdma_copy_pd_uresp(dev, pd, context, udata); 737 if (status) 738 goto err; 739 } 740 return &pd->ibpd; 741 742 err: 743 if (is_uctx_pd) { 744 ocrdma_release_ucontext_pd(uctx); 745 } else { 746 status = _ocrdma_dealloc_pd(dev, pd); 747 } 748 exit: 749 return ERR_PTR(status); 750 } 751 752 int ocrdma_dealloc_pd(struct ib_pd *ibpd) 753 { 754 struct ocrdma_pd *pd = get_ocrdma_pd(ibpd); 755 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device); 756 struct ocrdma_ucontext *uctx = NULL; 757 int status = 0; 758 u64 usr_db; 759 760 uctx = pd->uctx; 761 if (uctx) { 762 u64 dpp_db = dev->nic_info.dpp_unmapped_addr + 763 (pd->id * PAGE_SIZE); 764 if (pd->dpp_enabled) 765 ocrdma_del_mmap(pd->uctx, dpp_db, PAGE_SIZE); 766 usr_db = ocrdma_get_db_addr(dev, pd->id); 767 ocrdma_del_mmap(pd->uctx, usr_db, dev->nic_info.db_page_size); 768 769 if (is_ucontext_pd(uctx, pd)) { 770 ocrdma_release_ucontext_pd(uctx); 771 return status; 772 } 773 } 774 status = _ocrdma_dealloc_pd(dev, pd); 775 return status; 776 } 777 778 static int ocrdma_alloc_lkey(struct ocrdma_dev *dev, struct ocrdma_mr *mr, 779 u32 pdid, int acc, u32 num_pbls, u32 addr_check) 780 { 781 int status; 782 783 mr->hwmr.fr_mr = 0; 784 mr->hwmr.local_rd = 1; 785 mr->hwmr.remote_rd = (acc & IB_ACCESS_REMOTE_READ) ? 1 : 0; 786 mr->hwmr.remote_wr = (acc & IB_ACCESS_REMOTE_WRITE) ? 1 : 0; 787 mr->hwmr.local_wr = (acc & IB_ACCESS_LOCAL_WRITE) ? 1 : 0; 788 mr->hwmr.mw_bind = (acc & IB_ACCESS_MW_BIND) ? 1 : 0; 789 mr->hwmr.remote_atomic = (acc & IB_ACCESS_REMOTE_ATOMIC) ? 1 : 0; 790 mr->hwmr.num_pbls = num_pbls; 791 792 status = ocrdma_mbx_alloc_lkey(dev, &mr->hwmr, pdid, addr_check); 793 if (status) 794 return status; 795 796 mr->ibmr.lkey = mr->hwmr.lkey; 797 if (mr->hwmr.remote_wr || mr->hwmr.remote_rd) 798 mr->ibmr.rkey = mr->hwmr.lkey; 799 return 0; 800 } 801 802 struct ib_mr *ocrdma_get_dma_mr(struct ib_pd *ibpd, int acc) 803 { 804 int status; 805 struct ocrdma_mr *mr; 806 struct ocrdma_pd *pd = get_ocrdma_pd(ibpd); 807 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device); 808 809 if (acc & IB_ACCESS_REMOTE_WRITE && !(acc & IB_ACCESS_LOCAL_WRITE)) { 810 pr_err("%s err, invalid access rights\n", __func__); 811 return ERR_PTR(-EINVAL); 812 } 813 814 mr = kzalloc(sizeof(*mr), GFP_KERNEL); 815 if (!mr) 816 return ERR_PTR(-ENOMEM); 817 818 status = ocrdma_alloc_lkey(dev, mr, pd->id, acc, 0, 819 OCRDMA_ADDR_CHECK_DISABLE); 820 if (status) { 821 kfree(mr); 822 return ERR_PTR(status); 823 } 824 825 return &mr->ibmr; 826 } 827 828 static void ocrdma_free_mr_pbl_tbl(struct ocrdma_dev *dev, 829 struct ocrdma_hw_mr *mr) 830 { 831 struct pci_dev *pdev = dev->nic_info.pdev; 832 int i = 0; 833 834 if (mr->pbl_table) { 835 for (i = 0; i < mr->num_pbls; i++) { 836 if (!mr->pbl_table[i].va) 837 continue; 838 dma_free_coherent(&pdev->dev, mr->pbl_size, 839 mr->pbl_table[i].va, 840 mr->pbl_table[i].pa); 841 } 842 kfree(mr->pbl_table); 843 mr->pbl_table = NULL; 844 } 845 } 846 847 static int ocrdma_get_pbl_info(struct ocrdma_dev *dev, struct ocrdma_mr *mr, 848 u32 num_pbes) 849 { 850 u32 num_pbls = 0; 851 u32 idx = 0; 852 int status = 0; 853 u32 pbl_size; 854 855 do { 856 pbl_size = OCRDMA_MIN_HPAGE_SIZE * (1 << idx); 857 if (pbl_size > MAX_OCRDMA_PBL_SIZE) { 858 status = -EFAULT; 859 break; 860 } 861 num_pbls = roundup(num_pbes, (pbl_size / sizeof(u64))); 862 num_pbls = num_pbls / (pbl_size / sizeof(u64)); 863 idx++; 864 } while (num_pbls >= dev->attr.max_num_mr_pbl); 865 866 mr->hwmr.num_pbes = num_pbes; 867 mr->hwmr.num_pbls = num_pbls; 868 mr->hwmr.pbl_size = pbl_size; 869 return status; 870 } 871 872 static int ocrdma_build_pbl_tbl(struct ocrdma_dev *dev, struct ocrdma_hw_mr *mr) 873 { 874 int status = 0; 875 int i; 876 u32 dma_len = mr->pbl_size; 877 struct pci_dev *pdev = dev->nic_info.pdev; 878 void *va; 879 dma_addr_t pa; 880 881 mr->pbl_table = kzalloc(sizeof(struct ocrdma_pbl) * 882 mr->num_pbls, GFP_KERNEL); 883 884 if (!mr->pbl_table) 885 return -ENOMEM; 886 887 for (i = 0; i < mr->num_pbls; i++) { 888 va = dma_alloc_coherent(&pdev->dev, dma_len, &pa, GFP_KERNEL); 889 if (!va) { 890 ocrdma_free_mr_pbl_tbl(dev, mr); 891 status = -ENOMEM; 892 break; 893 } 894 memset(va, 0, dma_len); 895 mr->pbl_table[i].va = va; 896 mr->pbl_table[i].pa = pa; 897 } 898 return status; 899 } 900 901 static void build_user_pbes(struct ocrdma_dev *dev, struct ocrdma_mr *mr, 902 u32 num_pbes) 903 { 904 struct ocrdma_pbe *pbe; 905 struct scatterlist *sg; 906 struct ocrdma_pbl *pbl_tbl = mr->hwmr.pbl_table; 907 struct ib_umem *umem = mr->umem; 908 int shift, pg_cnt, pages, pbe_cnt, entry, total_num_pbes = 0; 909 910 if (!mr->hwmr.num_pbes) 911 return; 912 913 pbe = (struct ocrdma_pbe *)pbl_tbl->va; 914 pbe_cnt = 0; 915 916 shift = ilog2(umem->page_size); 917 918 for_each_sg(umem->sg_head.sgl, sg, umem->nmap, entry) { 919 pages = sg_dma_len(sg) >> shift; 920 for (pg_cnt = 0; pg_cnt < pages; pg_cnt++) { 921 /* store the page address in pbe */ 922 pbe->pa_lo = 923 cpu_to_le32(sg_dma_address 924 (sg) + 925 (umem->page_size * pg_cnt)); 926 pbe->pa_hi = 927 cpu_to_le32(upper_32_bits 928 ((sg_dma_address 929 (sg) + 930 umem->page_size * pg_cnt))); 931 pbe_cnt += 1; 932 total_num_pbes += 1; 933 pbe++; 934 935 /* if done building pbes, issue the mbx cmd. */ 936 if (total_num_pbes == num_pbes) 937 return; 938 939 /* if the given pbl is full storing the pbes, 940 * move to next pbl. 941 */ 942 if (pbe_cnt == 943 (mr->hwmr.pbl_size / sizeof(u64))) { 944 pbl_tbl++; 945 pbe = (struct ocrdma_pbe *)pbl_tbl->va; 946 pbe_cnt = 0; 947 } 948 949 } 950 } 951 } 952 953 struct ib_mr *ocrdma_reg_user_mr(struct ib_pd *ibpd, u64 start, u64 len, 954 u64 usr_addr, int acc, struct ib_udata *udata) 955 { 956 int status = -ENOMEM; 957 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device); 958 struct ocrdma_mr *mr; 959 struct ocrdma_pd *pd; 960 u32 num_pbes; 961 962 pd = get_ocrdma_pd(ibpd); 963 964 if (acc & IB_ACCESS_REMOTE_WRITE && !(acc & IB_ACCESS_LOCAL_WRITE)) 965 return ERR_PTR(-EINVAL); 966 967 mr = kzalloc(sizeof(*mr), GFP_KERNEL); 968 if (!mr) 969 return ERR_PTR(status); 970 mr->umem = ib_umem_get(ibpd->uobject->context, start, len, acc, 0); 971 if (IS_ERR(mr->umem)) { 972 status = -EFAULT; 973 goto umem_err; 974 } 975 num_pbes = ib_umem_page_count(mr->umem); 976 status = ocrdma_get_pbl_info(dev, mr, num_pbes); 977 if (status) 978 goto umem_err; 979 980 mr->hwmr.pbe_size = mr->umem->page_size; 981 mr->hwmr.fbo = ib_umem_offset(mr->umem); 982 mr->hwmr.va = usr_addr; 983 mr->hwmr.len = len; 984 mr->hwmr.remote_wr = (acc & IB_ACCESS_REMOTE_WRITE) ? 1 : 0; 985 mr->hwmr.remote_rd = (acc & IB_ACCESS_REMOTE_READ) ? 1 : 0; 986 mr->hwmr.local_wr = (acc & IB_ACCESS_LOCAL_WRITE) ? 1 : 0; 987 mr->hwmr.local_rd = 1; 988 mr->hwmr.remote_atomic = (acc & IB_ACCESS_REMOTE_ATOMIC) ? 1 : 0; 989 status = ocrdma_build_pbl_tbl(dev, &mr->hwmr); 990 if (status) 991 goto umem_err; 992 build_user_pbes(dev, mr, num_pbes); 993 status = ocrdma_reg_mr(dev, &mr->hwmr, pd->id, acc); 994 if (status) 995 goto mbx_err; 996 mr->ibmr.lkey = mr->hwmr.lkey; 997 if (mr->hwmr.remote_wr || mr->hwmr.remote_rd) 998 mr->ibmr.rkey = mr->hwmr.lkey; 999 1000 return &mr->ibmr; 1001 1002 mbx_err: 1003 ocrdma_free_mr_pbl_tbl(dev, &mr->hwmr); 1004 umem_err: 1005 kfree(mr); 1006 return ERR_PTR(status); 1007 } 1008 1009 int ocrdma_dereg_mr(struct ib_mr *ib_mr) 1010 { 1011 struct ocrdma_mr *mr = get_ocrdma_mr(ib_mr); 1012 struct ocrdma_dev *dev = get_ocrdma_dev(ib_mr->device); 1013 1014 (void) ocrdma_mbx_dealloc_lkey(dev, mr->hwmr.fr_mr, mr->hwmr.lkey); 1015 1016 kfree(mr->pages); 1017 ocrdma_free_mr_pbl_tbl(dev, &mr->hwmr); 1018 1019 /* it could be user registered memory. */ 1020 if (mr->umem) 1021 ib_umem_release(mr->umem); 1022 kfree(mr); 1023 1024 /* Don't stop cleanup, in case FW is unresponsive */ 1025 if (dev->mqe_ctx.fw_error_state) { 1026 pr_err("%s(%d) fw not responding.\n", 1027 __func__, dev->id); 1028 } 1029 return 0; 1030 } 1031 1032 static int ocrdma_copy_cq_uresp(struct ocrdma_dev *dev, struct ocrdma_cq *cq, 1033 struct ib_udata *udata, 1034 struct ib_ucontext *ib_ctx) 1035 { 1036 int status; 1037 struct ocrdma_ucontext *uctx = get_ocrdma_ucontext(ib_ctx); 1038 struct ocrdma_create_cq_uresp uresp; 1039 1040 memset(&uresp, 0, sizeof(uresp)); 1041 uresp.cq_id = cq->id; 1042 uresp.page_size = PAGE_ALIGN(cq->len); 1043 uresp.num_pages = 1; 1044 uresp.max_hw_cqe = cq->max_hw_cqe; 1045 uresp.page_addr[0] = virt_to_phys(cq->va); 1046 uresp.db_page_addr = ocrdma_get_db_addr(dev, uctx->cntxt_pd->id); 1047 uresp.db_page_size = dev->nic_info.db_page_size; 1048 uresp.phase_change = cq->phase_change ? 1 : 0; 1049 status = ib_copy_to_udata(udata, &uresp, sizeof(uresp)); 1050 if (status) { 1051 pr_err("%s(%d) copy error cqid=0x%x.\n", 1052 __func__, dev->id, cq->id); 1053 goto err; 1054 } 1055 status = ocrdma_add_mmap(uctx, uresp.db_page_addr, uresp.db_page_size); 1056 if (status) 1057 goto err; 1058 status = ocrdma_add_mmap(uctx, uresp.page_addr[0], uresp.page_size); 1059 if (status) { 1060 ocrdma_del_mmap(uctx, uresp.db_page_addr, uresp.db_page_size); 1061 goto err; 1062 } 1063 cq->ucontext = uctx; 1064 err: 1065 return status; 1066 } 1067 1068 struct ib_cq *ocrdma_create_cq(struct ib_device *ibdev, 1069 const struct ib_cq_init_attr *attr, 1070 struct ib_ucontext *ib_ctx, 1071 struct ib_udata *udata) 1072 { 1073 int entries = attr->cqe; 1074 struct ocrdma_cq *cq; 1075 struct ocrdma_dev *dev = get_ocrdma_dev(ibdev); 1076 struct ocrdma_ucontext *uctx = NULL; 1077 u16 pd_id = 0; 1078 int status; 1079 struct ocrdma_create_cq_ureq ureq; 1080 1081 if (attr->flags) 1082 return ERR_PTR(-EINVAL); 1083 1084 if (udata) { 1085 if (ib_copy_from_udata(&ureq, udata, sizeof(ureq))) 1086 return ERR_PTR(-EFAULT); 1087 } else 1088 ureq.dpp_cq = 0; 1089 cq = kzalloc(sizeof(*cq), GFP_KERNEL); 1090 if (!cq) 1091 return ERR_PTR(-ENOMEM); 1092 1093 spin_lock_init(&cq->cq_lock); 1094 spin_lock_init(&cq->comp_handler_lock); 1095 INIT_LIST_HEAD(&cq->sq_head); 1096 INIT_LIST_HEAD(&cq->rq_head); 1097 cq->first_arm = true; 1098 1099 if (ib_ctx) { 1100 uctx = get_ocrdma_ucontext(ib_ctx); 1101 pd_id = uctx->cntxt_pd->id; 1102 } 1103 1104 status = ocrdma_mbx_create_cq(dev, cq, entries, ureq.dpp_cq, pd_id); 1105 if (status) { 1106 kfree(cq); 1107 return ERR_PTR(status); 1108 } 1109 if (ib_ctx) { 1110 status = ocrdma_copy_cq_uresp(dev, cq, udata, ib_ctx); 1111 if (status) 1112 goto ctx_err; 1113 } 1114 cq->phase = OCRDMA_CQE_VALID; 1115 dev->cq_tbl[cq->id] = cq; 1116 return &cq->ibcq; 1117 1118 ctx_err: 1119 ocrdma_mbx_destroy_cq(dev, cq); 1120 kfree(cq); 1121 return ERR_PTR(status); 1122 } 1123 1124 int ocrdma_resize_cq(struct ib_cq *ibcq, int new_cnt, 1125 struct ib_udata *udata) 1126 { 1127 int status = 0; 1128 struct ocrdma_cq *cq = get_ocrdma_cq(ibcq); 1129 1130 if (new_cnt < 1 || new_cnt > cq->max_hw_cqe) { 1131 status = -EINVAL; 1132 return status; 1133 } 1134 ibcq->cqe = new_cnt; 1135 return status; 1136 } 1137 1138 static void ocrdma_flush_cq(struct ocrdma_cq *cq) 1139 { 1140 int cqe_cnt; 1141 int valid_count = 0; 1142 unsigned long flags; 1143 1144 struct ocrdma_dev *dev = get_ocrdma_dev(cq->ibcq.device); 1145 struct ocrdma_cqe *cqe = NULL; 1146 1147 cqe = cq->va; 1148 cqe_cnt = cq->cqe_cnt; 1149 1150 /* Last irq might have scheduled a polling thread 1151 * sync-up with it before hard flushing. 1152 */ 1153 spin_lock_irqsave(&cq->cq_lock, flags); 1154 while (cqe_cnt) { 1155 if (is_cqe_valid(cq, cqe)) 1156 valid_count++; 1157 cqe++; 1158 cqe_cnt--; 1159 } 1160 ocrdma_ring_cq_db(dev, cq->id, false, false, valid_count); 1161 spin_unlock_irqrestore(&cq->cq_lock, flags); 1162 } 1163 1164 int ocrdma_destroy_cq(struct ib_cq *ibcq) 1165 { 1166 struct ocrdma_cq *cq = get_ocrdma_cq(ibcq); 1167 struct ocrdma_eq *eq = NULL; 1168 struct ocrdma_dev *dev = get_ocrdma_dev(ibcq->device); 1169 int pdid = 0; 1170 u32 irq, indx; 1171 1172 dev->cq_tbl[cq->id] = NULL; 1173 indx = ocrdma_get_eq_table_index(dev, cq->eqn); 1174 if (indx == -EINVAL) 1175 BUG(); 1176 1177 eq = &dev->eq_tbl[indx]; 1178 irq = ocrdma_get_irq(dev, eq); 1179 synchronize_irq(irq); 1180 ocrdma_flush_cq(cq); 1181 1182 (void)ocrdma_mbx_destroy_cq(dev, cq); 1183 if (cq->ucontext) { 1184 pdid = cq->ucontext->cntxt_pd->id; 1185 ocrdma_del_mmap(cq->ucontext, (u64) cq->pa, 1186 PAGE_ALIGN(cq->len)); 1187 ocrdma_del_mmap(cq->ucontext, 1188 ocrdma_get_db_addr(dev, pdid), 1189 dev->nic_info.db_page_size); 1190 } 1191 1192 kfree(cq); 1193 return 0; 1194 } 1195 1196 static int ocrdma_add_qpn_map(struct ocrdma_dev *dev, struct ocrdma_qp *qp) 1197 { 1198 int status = -EINVAL; 1199 1200 if (qp->id < OCRDMA_MAX_QP && dev->qp_tbl[qp->id] == NULL) { 1201 dev->qp_tbl[qp->id] = qp; 1202 status = 0; 1203 } 1204 return status; 1205 } 1206 1207 static void ocrdma_del_qpn_map(struct ocrdma_dev *dev, struct ocrdma_qp *qp) 1208 { 1209 dev->qp_tbl[qp->id] = NULL; 1210 } 1211 1212 static int ocrdma_check_qp_params(struct ib_pd *ibpd, struct ocrdma_dev *dev, 1213 struct ib_qp_init_attr *attrs) 1214 { 1215 if ((attrs->qp_type != IB_QPT_GSI) && 1216 (attrs->qp_type != IB_QPT_RC) && 1217 (attrs->qp_type != IB_QPT_UC) && 1218 (attrs->qp_type != IB_QPT_UD)) { 1219 pr_err("%s(%d) unsupported qp type=0x%x requested\n", 1220 __func__, dev->id, attrs->qp_type); 1221 return -EINVAL; 1222 } 1223 /* Skip the check for QP1 to support CM size of 128 */ 1224 if ((attrs->qp_type != IB_QPT_GSI) && 1225 (attrs->cap.max_send_wr > dev->attr.max_wqe)) { 1226 pr_err("%s(%d) unsupported send_wr=0x%x requested\n", 1227 __func__, dev->id, attrs->cap.max_send_wr); 1228 pr_err("%s(%d) supported send_wr=0x%x\n", 1229 __func__, dev->id, dev->attr.max_wqe); 1230 return -EINVAL; 1231 } 1232 if (!attrs->srq && (attrs->cap.max_recv_wr > dev->attr.max_rqe)) { 1233 pr_err("%s(%d) unsupported recv_wr=0x%x requested\n", 1234 __func__, dev->id, attrs->cap.max_recv_wr); 1235 pr_err("%s(%d) supported recv_wr=0x%x\n", 1236 __func__, dev->id, dev->attr.max_rqe); 1237 return -EINVAL; 1238 } 1239 if (attrs->cap.max_inline_data > dev->attr.max_inline_data) { 1240 pr_err("%s(%d) unsupported inline data size=0x%x requested\n", 1241 __func__, dev->id, attrs->cap.max_inline_data); 1242 pr_err("%s(%d) supported inline data size=0x%x\n", 1243 __func__, dev->id, dev->attr.max_inline_data); 1244 return -EINVAL; 1245 } 1246 if (attrs->cap.max_send_sge > dev->attr.max_send_sge) { 1247 pr_err("%s(%d) unsupported send_sge=0x%x requested\n", 1248 __func__, dev->id, attrs->cap.max_send_sge); 1249 pr_err("%s(%d) supported send_sge=0x%x\n", 1250 __func__, dev->id, dev->attr.max_send_sge); 1251 return -EINVAL; 1252 } 1253 if (attrs->cap.max_recv_sge > dev->attr.max_recv_sge) { 1254 pr_err("%s(%d) unsupported recv_sge=0x%x requested\n", 1255 __func__, dev->id, attrs->cap.max_recv_sge); 1256 pr_err("%s(%d) supported recv_sge=0x%x\n", 1257 __func__, dev->id, dev->attr.max_recv_sge); 1258 return -EINVAL; 1259 } 1260 /* unprivileged user space cannot create special QP */ 1261 if (ibpd->uobject && attrs->qp_type == IB_QPT_GSI) { 1262 pr_err 1263 ("%s(%d) Userspace can't create special QPs of type=0x%x\n", 1264 __func__, dev->id, attrs->qp_type); 1265 return -EINVAL; 1266 } 1267 /* allow creating only one GSI type of QP */ 1268 if (attrs->qp_type == IB_QPT_GSI && dev->gsi_qp_created) { 1269 pr_err("%s(%d) GSI special QPs already created.\n", 1270 __func__, dev->id); 1271 return -EINVAL; 1272 } 1273 /* verify consumer QPs are not trying to use GSI QP's CQ */ 1274 if ((attrs->qp_type != IB_QPT_GSI) && (dev->gsi_qp_created)) { 1275 if ((dev->gsi_sqcq == get_ocrdma_cq(attrs->send_cq)) || 1276 (dev->gsi_rqcq == get_ocrdma_cq(attrs->recv_cq))) { 1277 pr_err("%s(%d) Consumer QP cannot use GSI CQs.\n", 1278 __func__, dev->id); 1279 return -EINVAL; 1280 } 1281 } 1282 return 0; 1283 } 1284 1285 static int ocrdma_copy_qp_uresp(struct ocrdma_qp *qp, 1286 struct ib_udata *udata, int dpp_offset, 1287 int dpp_credit_lmt, int srq) 1288 { 1289 int status = 0; 1290 u64 usr_db; 1291 struct ocrdma_create_qp_uresp uresp; 1292 struct ocrdma_pd *pd = qp->pd; 1293 struct ocrdma_dev *dev = get_ocrdma_dev(pd->ibpd.device); 1294 1295 memset(&uresp, 0, sizeof(uresp)); 1296 usr_db = dev->nic_info.unmapped_db + 1297 (pd->id * dev->nic_info.db_page_size); 1298 uresp.qp_id = qp->id; 1299 uresp.sq_dbid = qp->sq.dbid; 1300 uresp.num_sq_pages = 1; 1301 uresp.sq_page_size = PAGE_ALIGN(qp->sq.len); 1302 uresp.sq_page_addr[0] = virt_to_phys(qp->sq.va); 1303 uresp.num_wqe_allocated = qp->sq.max_cnt; 1304 if (!srq) { 1305 uresp.rq_dbid = qp->rq.dbid; 1306 uresp.num_rq_pages = 1; 1307 uresp.rq_page_size = PAGE_ALIGN(qp->rq.len); 1308 uresp.rq_page_addr[0] = virt_to_phys(qp->rq.va); 1309 uresp.num_rqe_allocated = qp->rq.max_cnt; 1310 } 1311 uresp.db_page_addr = usr_db; 1312 uresp.db_page_size = dev->nic_info.db_page_size; 1313 uresp.db_sq_offset = OCRDMA_DB_GEN2_SQ_OFFSET; 1314 uresp.db_rq_offset = OCRDMA_DB_GEN2_RQ_OFFSET; 1315 uresp.db_shift = OCRDMA_DB_RQ_SHIFT; 1316 1317 if (qp->dpp_enabled) { 1318 uresp.dpp_credit = dpp_credit_lmt; 1319 uresp.dpp_offset = dpp_offset; 1320 } 1321 status = ib_copy_to_udata(udata, &uresp, sizeof(uresp)); 1322 if (status) { 1323 pr_err("%s(%d) user copy error.\n", __func__, dev->id); 1324 goto err; 1325 } 1326 status = ocrdma_add_mmap(pd->uctx, uresp.sq_page_addr[0], 1327 uresp.sq_page_size); 1328 if (status) 1329 goto err; 1330 1331 if (!srq) { 1332 status = ocrdma_add_mmap(pd->uctx, uresp.rq_page_addr[0], 1333 uresp.rq_page_size); 1334 if (status) 1335 goto rq_map_err; 1336 } 1337 return status; 1338 rq_map_err: 1339 ocrdma_del_mmap(pd->uctx, uresp.sq_page_addr[0], uresp.sq_page_size); 1340 err: 1341 return status; 1342 } 1343 1344 static void ocrdma_set_qp_db(struct ocrdma_dev *dev, struct ocrdma_qp *qp, 1345 struct ocrdma_pd *pd) 1346 { 1347 if (ocrdma_get_asic_type(dev) == OCRDMA_ASIC_GEN_SKH_R) { 1348 qp->sq_db = dev->nic_info.db + 1349 (pd->id * dev->nic_info.db_page_size) + 1350 OCRDMA_DB_GEN2_SQ_OFFSET; 1351 qp->rq_db = dev->nic_info.db + 1352 (pd->id * dev->nic_info.db_page_size) + 1353 OCRDMA_DB_GEN2_RQ_OFFSET; 1354 } else { 1355 qp->sq_db = dev->nic_info.db + 1356 (pd->id * dev->nic_info.db_page_size) + 1357 OCRDMA_DB_SQ_OFFSET; 1358 qp->rq_db = dev->nic_info.db + 1359 (pd->id * dev->nic_info.db_page_size) + 1360 OCRDMA_DB_RQ_OFFSET; 1361 } 1362 } 1363 1364 static int ocrdma_alloc_wr_id_tbl(struct ocrdma_qp *qp) 1365 { 1366 qp->wqe_wr_id_tbl = 1367 kzalloc(sizeof(*(qp->wqe_wr_id_tbl)) * qp->sq.max_cnt, 1368 GFP_KERNEL); 1369 if (qp->wqe_wr_id_tbl == NULL) 1370 return -ENOMEM; 1371 qp->rqe_wr_id_tbl = 1372 kzalloc(sizeof(u64) * qp->rq.max_cnt, GFP_KERNEL); 1373 if (qp->rqe_wr_id_tbl == NULL) 1374 return -ENOMEM; 1375 1376 return 0; 1377 } 1378 1379 static void ocrdma_set_qp_init_params(struct ocrdma_qp *qp, 1380 struct ocrdma_pd *pd, 1381 struct ib_qp_init_attr *attrs) 1382 { 1383 qp->pd = pd; 1384 spin_lock_init(&qp->q_lock); 1385 INIT_LIST_HEAD(&qp->sq_entry); 1386 INIT_LIST_HEAD(&qp->rq_entry); 1387 1388 qp->qp_type = attrs->qp_type; 1389 qp->cap_flags = OCRDMA_QP_INB_RD | OCRDMA_QP_INB_WR; 1390 qp->max_inline_data = attrs->cap.max_inline_data; 1391 qp->sq.max_sges = attrs->cap.max_send_sge; 1392 qp->rq.max_sges = attrs->cap.max_recv_sge; 1393 qp->state = OCRDMA_QPS_RST; 1394 qp->signaled = (attrs->sq_sig_type == IB_SIGNAL_ALL_WR) ? true : false; 1395 } 1396 1397 static void ocrdma_store_gsi_qp_cq(struct ocrdma_dev *dev, 1398 struct ib_qp_init_attr *attrs) 1399 { 1400 if (attrs->qp_type == IB_QPT_GSI) { 1401 dev->gsi_qp_created = 1; 1402 dev->gsi_sqcq = get_ocrdma_cq(attrs->send_cq); 1403 dev->gsi_rqcq = get_ocrdma_cq(attrs->recv_cq); 1404 } 1405 } 1406 1407 struct ib_qp *ocrdma_create_qp(struct ib_pd *ibpd, 1408 struct ib_qp_init_attr *attrs, 1409 struct ib_udata *udata) 1410 { 1411 int status; 1412 struct ocrdma_pd *pd = get_ocrdma_pd(ibpd); 1413 struct ocrdma_qp *qp; 1414 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device); 1415 struct ocrdma_create_qp_ureq ureq; 1416 u16 dpp_credit_lmt, dpp_offset; 1417 1418 status = ocrdma_check_qp_params(ibpd, dev, attrs); 1419 if (status) 1420 goto gen_err; 1421 1422 memset(&ureq, 0, sizeof(ureq)); 1423 if (udata) { 1424 if (ib_copy_from_udata(&ureq, udata, sizeof(ureq))) 1425 return ERR_PTR(-EFAULT); 1426 } 1427 qp = kzalloc(sizeof(*qp), GFP_KERNEL); 1428 if (!qp) { 1429 status = -ENOMEM; 1430 goto gen_err; 1431 } 1432 ocrdma_set_qp_init_params(qp, pd, attrs); 1433 if (udata == NULL) 1434 qp->cap_flags |= (OCRDMA_QP_MW_BIND | OCRDMA_QP_LKEY0 | 1435 OCRDMA_QP_FAST_REG); 1436 1437 mutex_lock(&dev->dev_lock); 1438 status = ocrdma_mbx_create_qp(qp, attrs, ureq.enable_dpp_cq, 1439 ureq.dpp_cq_id, 1440 &dpp_offset, &dpp_credit_lmt); 1441 if (status) 1442 goto mbx_err; 1443 1444 /* user space QP's wr_id table are managed in library */ 1445 if (udata == NULL) { 1446 status = ocrdma_alloc_wr_id_tbl(qp); 1447 if (status) 1448 goto map_err; 1449 } 1450 1451 status = ocrdma_add_qpn_map(dev, qp); 1452 if (status) 1453 goto map_err; 1454 ocrdma_set_qp_db(dev, qp, pd); 1455 if (udata) { 1456 status = ocrdma_copy_qp_uresp(qp, udata, dpp_offset, 1457 dpp_credit_lmt, 1458 (attrs->srq != NULL)); 1459 if (status) 1460 goto cpy_err; 1461 } 1462 ocrdma_store_gsi_qp_cq(dev, attrs); 1463 qp->ibqp.qp_num = qp->id; 1464 mutex_unlock(&dev->dev_lock); 1465 return &qp->ibqp; 1466 1467 cpy_err: 1468 ocrdma_del_qpn_map(dev, qp); 1469 map_err: 1470 ocrdma_mbx_destroy_qp(dev, qp); 1471 mbx_err: 1472 mutex_unlock(&dev->dev_lock); 1473 kfree(qp->wqe_wr_id_tbl); 1474 kfree(qp->rqe_wr_id_tbl); 1475 kfree(qp); 1476 pr_err("%s(%d) error=%d\n", __func__, dev->id, status); 1477 gen_err: 1478 return ERR_PTR(status); 1479 } 1480 1481 int _ocrdma_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, 1482 int attr_mask) 1483 { 1484 int status = 0; 1485 struct ocrdma_qp *qp; 1486 struct ocrdma_dev *dev; 1487 enum ib_qp_state old_qps; 1488 1489 qp = get_ocrdma_qp(ibqp); 1490 dev = get_ocrdma_dev(ibqp->device); 1491 if (attr_mask & IB_QP_STATE) 1492 status = ocrdma_qp_state_change(qp, attr->qp_state, &old_qps); 1493 /* if new and previous states are same hw doesn't need to 1494 * know about it. 1495 */ 1496 if (status < 0) 1497 return status; 1498 status = ocrdma_mbx_modify_qp(dev, qp, attr, attr_mask); 1499 1500 return status; 1501 } 1502 1503 int ocrdma_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, 1504 int attr_mask, struct ib_udata *udata) 1505 { 1506 unsigned long flags; 1507 int status = -EINVAL; 1508 struct ocrdma_qp *qp; 1509 struct ocrdma_dev *dev; 1510 enum ib_qp_state old_qps, new_qps; 1511 1512 qp = get_ocrdma_qp(ibqp); 1513 dev = get_ocrdma_dev(ibqp->device); 1514 1515 /* syncronize with multiple context trying to change, retrive qps */ 1516 mutex_lock(&dev->dev_lock); 1517 /* syncronize with wqe, rqe posting and cqe processing contexts */ 1518 spin_lock_irqsave(&qp->q_lock, flags); 1519 old_qps = get_ibqp_state(qp->state); 1520 if (attr_mask & IB_QP_STATE) 1521 new_qps = attr->qp_state; 1522 else 1523 new_qps = old_qps; 1524 spin_unlock_irqrestore(&qp->q_lock, flags); 1525 1526 if (!ib_modify_qp_is_ok(old_qps, new_qps, ibqp->qp_type, attr_mask, 1527 IB_LINK_LAYER_ETHERNET)) { 1528 pr_err("%s(%d) invalid attribute mask=0x%x specified for\n" 1529 "qpn=0x%x of type=0x%x old_qps=0x%x, new_qps=0x%x\n", 1530 __func__, dev->id, attr_mask, qp->id, ibqp->qp_type, 1531 old_qps, new_qps); 1532 goto param_err; 1533 } 1534 1535 status = _ocrdma_modify_qp(ibqp, attr, attr_mask); 1536 if (status > 0) 1537 status = 0; 1538 param_err: 1539 mutex_unlock(&dev->dev_lock); 1540 return status; 1541 } 1542 1543 static enum ib_mtu ocrdma_mtu_int_to_enum(u16 mtu) 1544 { 1545 switch (mtu) { 1546 case 256: 1547 return IB_MTU_256; 1548 case 512: 1549 return IB_MTU_512; 1550 case 1024: 1551 return IB_MTU_1024; 1552 case 2048: 1553 return IB_MTU_2048; 1554 case 4096: 1555 return IB_MTU_4096; 1556 default: 1557 return IB_MTU_1024; 1558 } 1559 } 1560 1561 static int ocrdma_to_ib_qp_acc_flags(int qp_cap_flags) 1562 { 1563 int ib_qp_acc_flags = 0; 1564 1565 if (qp_cap_flags & OCRDMA_QP_INB_WR) 1566 ib_qp_acc_flags |= IB_ACCESS_REMOTE_WRITE; 1567 if (qp_cap_flags & OCRDMA_QP_INB_RD) 1568 ib_qp_acc_flags |= IB_ACCESS_LOCAL_WRITE; 1569 return ib_qp_acc_flags; 1570 } 1571 1572 int ocrdma_query_qp(struct ib_qp *ibqp, 1573 struct ib_qp_attr *qp_attr, 1574 int attr_mask, struct ib_qp_init_attr *qp_init_attr) 1575 { 1576 int status; 1577 u32 qp_state; 1578 struct ocrdma_qp_params params; 1579 struct ocrdma_qp *qp = get_ocrdma_qp(ibqp); 1580 struct ocrdma_dev *dev = get_ocrdma_dev(ibqp->device); 1581 1582 memset(¶ms, 0, sizeof(params)); 1583 mutex_lock(&dev->dev_lock); 1584 status = ocrdma_mbx_query_qp(dev, qp, ¶ms); 1585 mutex_unlock(&dev->dev_lock); 1586 if (status) 1587 goto mbx_err; 1588 if (qp->qp_type == IB_QPT_UD) 1589 qp_attr->qkey = params.qkey; 1590 qp_attr->path_mtu = 1591 ocrdma_mtu_int_to_enum(params.path_mtu_pkey_indx & 1592 OCRDMA_QP_PARAMS_PATH_MTU_MASK) >> 1593 OCRDMA_QP_PARAMS_PATH_MTU_SHIFT; 1594 qp_attr->path_mig_state = IB_MIG_MIGRATED; 1595 qp_attr->rq_psn = params.hop_lmt_rq_psn & OCRDMA_QP_PARAMS_RQ_PSN_MASK; 1596 qp_attr->sq_psn = params.tclass_sq_psn & OCRDMA_QP_PARAMS_SQ_PSN_MASK; 1597 qp_attr->dest_qp_num = 1598 params.ack_to_rnr_rtc_dest_qpn & OCRDMA_QP_PARAMS_DEST_QPN_MASK; 1599 1600 qp_attr->qp_access_flags = ocrdma_to_ib_qp_acc_flags(qp->cap_flags); 1601 qp_attr->cap.max_send_wr = qp->sq.max_cnt - 1; 1602 qp_attr->cap.max_recv_wr = qp->rq.max_cnt - 1; 1603 qp_attr->cap.max_send_sge = qp->sq.max_sges; 1604 qp_attr->cap.max_recv_sge = qp->rq.max_sges; 1605 qp_attr->cap.max_inline_data = qp->max_inline_data; 1606 qp_init_attr->cap = qp_attr->cap; 1607 memcpy(&qp_attr->ah_attr.grh.dgid, ¶ms.dgid[0], 1608 sizeof(params.dgid)); 1609 qp_attr->ah_attr.grh.flow_label = params.rnt_rc_sl_fl & 1610 OCRDMA_QP_PARAMS_FLOW_LABEL_MASK; 1611 qp_attr->ah_attr.grh.sgid_index = qp->sgid_idx; 1612 qp_attr->ah_attr.grh.hop_limit = (params.hop_lmt_rq_psn & 1613 OCRDMA_QP_PARAMS_HOP_LMT_MASK) >> 1614 OCRDMA_QP_PARAMS_HOP_LMT_SHIFT; 1615 qp_attr->ah_attr.grh.traffic_class = (params.tclass_sq_psn & 1616 OCRDMA_QP_PARAMS_TCLASS_MASK) >> 1617 OCRDMA_QP_PARAMS_TCLASS_SHIFT; 1618 1619 qp_attr->ah_attr.ah_flags = IB_AH_GRH; 1620 qp_attr->ah_attr.port_num = 1; 1621 qp_attr->ah_attr.sl = (params.rnt_rc_sl_fl & 1622 OCRDMA_QP_PARAMS_SL_MASK) >> 1623 OCRDMA_QP_PARAMS_SL_SHIFT; 1624 qp_attr->timeout = (params.ack_to_rnr_rtc_dest_qpn & 1625 OCRDMA_QP_PARAMS_ACK_TIMEOUT_MASK) >> 1626 OCRDMA_QP_PARAMS_ACK_TIMEOUT_SHIFT; 1627 qp_attr->rnr_retry = (params.ack_to_rnr_rtc_dest_qpn & 1628 OCRDMA_QP_PARAMS_RNR_RETRY_CNT_MASK) >> 1629 OCRDMA_QP_PARAMS_RNR_RETRY_CNT_SHIFT; 1630 qp_attr->retry_cnt = 1631 (params.rnt_rc_sl_fl & OCRDMA_QP_PARAMS_RETRY_CNT_MASK) >> 1632 OCRDMA_QP_PARAMS_RETRY_CNT_SHIFT; 1633 qp_attr->min_rnr_timer = 0; 1634 qp_attr->pkey_index = 0; 1635 qp_attr->port_num = 1; 1636 qp_attr->ah_attr.src_path_bits = 0; 1637 qp_attr->ah_attr.static_rate = 0; 1638 qp_attr->alt_pkey_index = 0; 1639 qp_attr->alt_port_num = 0; 1640 qp_attr->alt_timeout = 0; 1641 memset(&qp_attr->alt_ah_attr, 0, sizeof(qp_attr->alt_ah_attr)); 1642 qp_state = (params.max_sge_recv_flags & OCRDMA_QP_PARAMS_STATE_MASK) >> 1643 OCRDMA_QP_PARAMS_STATE_SHIFT; 1644 qp_attr->qp_state = get_ibqp_state(qp_state); 1645 qp_attr->cur_qp_state = qp_attr->qp_state; 1646 qp_attr->sq_draining = (qp_state == OCRDMA_QPS_SQ_DRAINING) ? 1 : 0; 1647 qp_attr->max_dest_rd_atomic = 1648 params.max_ord_ird >> OCRDMA_QP_PARAMS_MAX_ORD_SHIFT; 1649 qp_attr->max_rd_atomic = 1650 params.max_ord_ird & OCRDMA_QP_PARAMS_MAX_IRD_MASK; 1651 qp_attr->en_sqd_async_notify = (params.max_sge_recv_flags & 1652 OCRDMA_QP_PARAMS_FLAGS_SQD_ASYNC) ? 1 : 0; 1653 /* Sync driver QP state with FW */ 1654 ocrdma_qp_state_change(qp, qp_attr->qp_state, NULL); 1655 mbx_err: 1656 return status; 1657 } 1658 1659 static void ocrdma_srq_toggle_bit(struct ocrdma_srq *srq, unsigned int idx) 1660 { 1661 unsigned int i = idx / 32; 1662 u32 mask = (1U << (idx % 32)); 1663 1664 srq->idx_bit_fields[i] ^= mask; 1665 } 1666 1667 static int ocrdma_hwq_free_cnt(struct ocrdma_qp_hwq_info *q) 1668 { 1669 return ((q->max_wqe_idx - q->head) + q->tail) % q->max_cnt; 1670 } 1671 1672 static int is_hw_sq_empty(struct ocrdma_qp *qp) 1673 { 1674 return (qp->sq.tail == qp->sq.head); 1675 } 1676 1677 static int is_hw_rq_empty(struct ocrdma_qp *qp) 1678 { 1679 return (qp->rq.tail == qp->rq.head); 1680 } 1681 1682 static void *ocrdma_hwq_head(struct ocrdma_qp_hwq_info *q) 1683 { 1684 return q->va + (q->head * q->entry_size); 1685 } 1686 1687 static void *ocrdma_hwq_head_from_idx(struct ocrdma_qp_hwq_info *q, 1688 u32 idx) 1689 { 1690 return q->va + (idx * q->entry_size); 1691 } 1692 1693 static void ocrdma_hwq_inc_head(struct ocrdma_qp_hwq_info *q) 1694 { 1695 q->head = (q->head + 1) & q->max_wqe_idx; 1696 } 1697 1698 static void ocrdma_hwq_inc_tail(struct ocrdma_qp_hwq_info *q) 1699 { 1700 q->tail = (q->tail + 1) & q->max_wqe_idx; 1701 } 1702 1703 /* discard the cqe for a given QP */ 1704 static void ocrdma_discard_cqes(struct ocrdma_qp *qp, struct ocrdma_cq *cq) 1705 { 1706 unsigned long cq_flags; 1707 unsigned long flags; 1708 int discard_cnt = 0; 1709 u32 cur_getp, stop_getp; 1710 struct ocrdma_cqe *cqe; 1711 u32 qpn = 0, wqe_idx = 0; 1712 1713 spin_lock_irqsave(&cq->cq_lock, cq_flags); 1714 1715 /* traverse through the CQEs in the hw CQ, 1716 * find the matching CQE for a given qp, 1717 * mark the matching one discarded by clearing qpn. 1718 * ring the doorbell in the poll_cq() as 1719 * we don't complete out of order cqe. 1720 */ 1721 1722 cur_getp = cq->getp; 1723 /* find upto when do we reap the cq. */ 1724 stop_getp = cur_getp; 1725 do { 1726 if (is_hw_sq_empty(qp) && (!qp->srq && is_hw_rq_empty(qp))) 1727 break; 1728 1729 cqe = cq->va + cur_getp; 1730 /* if (a) done reaping whole hw cq, or 1731 * (b) qp_xq becomes empty. 1732 * then exit 1733 */ 1734 qpn = cqe->cmn.qpn & OCRDMA_CQE_QPN_MASK; 1735 /* if previously discarded cqe found, skip that too. */ 1736 /* check for matching qp */ 1737 if (qpn == 0 || qpn != qp->id) 1738 goto skip_cqe; 1739 1740 if (is_cqe_for_sq(cqe)) { 1741 ocrdma_hwq_inc_tail(&qp->sq); 1742 } else { 1743 if (qp->srq) { 1744 wqe_idx = (le32_to_cpu(cqe->rq.buftag_qpn) >> 1745 OCRDMA_CQE_BUFTAG_SHIFT) & 1746 qp->srq->rq.max_wqe_idx; 1747 if (wqe_idx < 1) 1748 BUG(); 1749 spin_lock_irqsave(&qp->srq->q_lock, flags); 1750 ocrdma_hwq_inc_tail(&qp->srq->rq); 1751 ocrdma_srq_toggle_bit(qp->srq, wqe_idx - 1); 1752 spin_unlock_irqrestore(&qp->srq->q_lock, flags); 1753 1754 } else { 1755 ocrdma_hwq_inc_tail(&qp->rq); 1756 } 1757 } 1758 /* mark cqe discarded so that it is not picked up later 1759 * in the poll_cq(). 1760 */ 1761 discard_cnt += 1; 1762 cqe->cmn.qpn = 0; 1763 skip_cqe: 1764 cur_getp = (cur_getp + 1) % cq->max_hw_cqe; 1765 } while (cur_getp != stop_getp); 1766 spin_unlock_irqrestore(&cq->cq_lock, cq_flags); 1767 } 1768 1769 void ocrdma_del_flush_qp(struct ocrdma_qp *qp) 1770 { 1771 int found = false; 1772 unsigned long flags; 1773 struct ocrdma_dev *dev = get_ocrdma_dev(qp->ibqp.device); 1774 /* sync with any active CQ poll */ 1775 1776 spin_lock_irqsave(&dev->flush_q_lock, flags); 1777 found = ocrdma_is_qp_in_sq_flushlist(qp->sq_cq, qp); 1778 if (found) 1779 list_del(&qp->sq_entry); 1780 if (!qp->srq) { 1781 found = ocrdma_is_qp_in_rq_flushlist(qp->rq_cq, qp); 1782 if (found) 1783 list_del(&qp->rq_entry); 1784 } 1785 spin_unlock_irqrestore(&dev->flush_q_lock, flags); 1786 } 1787 1788 int ocrdma_destroy_qp(struct ib_qp *ibqp) 1789 { 1790 struct ocrdma_pd *pd; 1791 struct ocrdma_qp *qp; 1792 struct ocrdma_dev *dev; 1793 struct ib_qp_attr attrs; 1794 int attr_mask; 1795 unsigned long flags; 1796 1797 qp = get_ocrdma_qp(ibqp); 1798 dev = get_ocrdma_dev(ibqp->device); 1799 1800 pd = qp->pd; 1801 1802 /* change the QP state to ERROR */ 1803 if (qp->state != OCRDMA_QPS_RST) { 1804 attrs.qp_state = IB_QPS_ERR; 1805 attr_mask = IB_QP_STATE; 1806 _ocrdma_modify_qp(ibqp, &attrs, attr_mask); 1807 } 1808 /* ensure that CQEs for newly created QP (whose id may be same with 1809 * one which just getting destroyed are same), dont get 1810 * discarded until the old CQEs are discarded. 1811 */ 1812 mutex_lock(&dev->dev_lock); 1813 (void) ocrdma_mbx_destroy_qp(dev, qp); 1814 1815 /* 1816 * acquire CQ lock while destroy is in progress, in order to 1817 * protect against proessing in-flight CQEs for this QP. 1818 */ 1819 spin_lock_irqsave(&qp->sq_cq->cq_lock, flags); 1820 if (qp->rq_cq && (qp->rq_cq != qp->sq_cq)) 1821 spin_lock(&qp->rq_cq->cq_lock); 1822 1823 ocrdma_del_qpn_map(dev, qp); 1824 1825 if (qp->rq_cq && (qp->rq_cq != qp->sq_cq)) 1826 spin_unlock(&qp->rq_cq->cq_lock); 1827 spin_unlock_irqrestore(&qp->sq_cq->cq_lock, flags); 1828 1829 if (!pd->uctx) { 1830 ocrdma_discard_cqes(qp, qp->sq_cq); 1831 ocrdma_discard_cqes(qp, qp->rq_cq); 1832 } 1833 mutex_unlock(&dev->dev_lock); 1834 1835 if (pd->uctx) { 1836 ocrdma_del_mmap(pd->uctx, (u64) qp->sq.pa, 1837 PAGE_ALIGN(qp->sq.len)); 1838 if (!qp->srq) 1839 ocrdma_del_mmap(pd->uctx, (u64) qp->rq.pa, 1840 PAGE_ALIGN(qp->rq.len)); 1841 } 1842 1843 ocrdma_del_flush_qp(qp); 1844 1845 kfree(qp->wqe_wr_id_tbl); 1846 kfree(qp->rqe_wr_id_tbl); 1847 kfree(qp); 1848 return 0; 1849 } 1850 1851 static int ocrdma_copy_srq_uresp(struct ocrdma_dev *dev, struct ocrdma_srq *srq, 1852 struct ib_udata *udata) 1853 { 1854 int status; 1855 struct ocrdma_create_srq_uresp uresp; 1856 1857 memset(&uresp, 0, sizeof(uresp)); 1858 uresp.rq_dbid = srq->rq.dbid; 1859 uresp.num_rq_pages = 1; 1860 uresp.rq_page_addr[0] = virt_to_phys(srq->rq.va); 1861 uresp.rq_page_size = srq->rq.len; 1862 uresp.db_page_addr = dev->nic_info.unmapped_db + 1863 (srq->pd->id * dev->nic_info.db_page_size); 1864 uresp.db_page_size = dev->nic_info.db_page_size; 1865 uresp.num_rqe_allocated = srq->rq.max_cnt; 1866 if (ocrdma_get_asic_type(dev) == OCRDMA_ASIC_GEN_SKH_R) { 1867 uresp.db_rq_offset = OCRDMA_DB_GEN2_RQ_OFFSET; 1868 uresp.db_shift = 24; 1869 } else { 1870 uresp.db_rq_offset = OCRDMA_DB_RQ_OFFSET; 1871 uresp.db_shift = 16; 1872 } 1873 1874 status = ib_copy_to_udata(udata, &uresp, sizeof(uresp)); 1875 if (status) 1876 return status; 1877 status = ocrdma_add_mmap(srq->pd->uctx, uresp.rq_page_addr[0], 1878 uresp.rq_page_size); 1879 if (status) 1880 return status; 1881 return status; 1882 } 1883 1884 struct ib_srq *ocrdma_create_srq(struct ib_pd *ibpd, 1885 struct ib_srq_init_attr *init_attr, 1886 struct ib_udata *udata) 1887 { 1888 int status = -ENOMEM; 1889 struct ocrdma_pd *pd = get_ocrdma_pd(ibpd); 1890 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device); 1891 struct ocrdma_srq *srq; 1892 1893 if (init_attr->attr.max_sge > dev->attr.max_recv_sge) 1894 return ERR_PTR(-EINVAL); 1895 if (init_attr->attr.max_wr > dev->attr.max_rqe) 1896 return ERR_PTR(-EINVAL); 1897 1898 srq = kzalloc(sizeof(*srq), GFP_KERNEL); 1899 if (!srq) 1900 return ERR_PTR(status); 1901 1902 spin_lock_init(&srq->q_lock); 1903 srq->pd = pd; 1904 srq->db = dev->nic_info.db + (pd->id * dev->nic_info.db_page_size); 1905 status = ocrdma_mbx_create_srq(dev, srq, init_attr, pd); 1906 if (status) 1907 goto err; 1908 1909 if (udata == NULL) { 1910 srq->rqe_wr_id_tbl = kzalloc(sizeof(u64) * srq->rq.max_cnt, 1911 GFP_KERNEL); 1912 if (srq->rqe_wr_id_tbl == NULL) 1913 goto arm_err; 1914 1915 srq->bit_fields_len = (srq->rq.max_cnt / 32) + 1916 (srq->rq.max_cnt % 32 ? 1 : 0); 1917 srq->idx_bit_fields = 1918 kmalloc(srq->bit_fields_len * sizeof(u32), GFP_KERNEL); 1919 if (srq->idx_bit_fields == NULL) 1920 goto arm_err; 1921 memset(srq->idx_bit_fields, 0xff, 1922 srq->bit_fields_len * sizeof(u32)); 1923 } 1924 1925 if (init_attr->attr.srq_limit) { 1926 status = ocrdma_mbx_modify_srq(srq, &init_attr->attr); 1927 if (status) 1928 goto arm_err; 1929 } 1930 1931 if (udata) { 1932 status = ocrdma_copy_srq_uresp(dev, srq, udata); 1933 if (status) 1934 goto arm_err; 1935 } 1936 1937 return &srq->ibsrq; 1938 1939 arm_err: 1940 ocrdma_mbx_destroy_srq(dev, srq); 1941 err: 1942 kfree(srq->rqe_wr_id_tbl); 1943 kfree(srq->idx_bit_fields); 1944 kfree(srq); 1945 return ERR_PTR(status); 1946 } 1947 1948 int ocrdma_modify_srq(struct ib_srq *ibsrq, 1949 struct ib_srq_attr *srq_attr, 1950 enum ib_srq_attr_mask srq_attr_mask, 1951 struct ib_udata *udata) 1952 { 1953 int status = 0; 1954 struct ocrdma_srq *srq; 1955 1956 srq = get_ocrdma_srq(ibsrq); 1957 if (srq_attr_mask & IB_SRQ_MAX_WR) 1958 status = -EINVAL; 1959 else 1960 status = ocrdma_mbx_modify_srq(srq, srq_attr); 1961 return status; 1962 } 1963 1964 int ocrdma_query_srq(struct ib_srq *ibsrq, struct ib_srq_attr *srq_attr) 1965 { 1966 int status; 1967 struct ocrdma_srq *srq; 1968 1969 srq = get_ocrdma_srq(ibsrq); 1970 status = ocrdma_mbx_query_srq(srq, srq_attr); 1971 return status; 1972 } 1973 1974 int ocrdma_destroy_srq(struct ib_srq *ibsrq) 1975 { 1976 int status; 1977 struct ocrdma_srq *srq; 1978 struct ocrdma_dev *dev = get_ocrdma_dev(ibsrq->device); 1979 1980 srq = get_ocrdma_srq(ibsrq); 1981 1982 status = ocrdma_mbx_destroy_srq(dev, srq); 1983 1984 if (srq->pd->uctx) 1985 ocrdma_del_mmap(srq->pd->uctx, (u64) srq->rq.pa, 1986 PAGE_ALIGN(srq->rq.len)); 1987 1988 kfree(srq->idx_bit_fields); 1989 kfree(srq->rqe_wr_id_tbl); 1990 kfree(srq); 1991 return status; 1992 } 1993 1994 /* unprivileged verbs and their support functions. */ 1995 static void ocrdma_build_ud_hdr(struct ocrdma_qp *qp, 1996 struct ocrdma_hdr_wqe *hdr, 1997 struct ib_send_wr *wr) 1998 { 1999 struct ocrdma_ewqe_ud_hdr *ud_hdr = 2000 (struct ocrdma_ewqe_ud_hdr *)(hdr + 1); 2001 struct ocrdma_ah *ah = get_ocrdma_ah(ud_wr(wr)->ah); 2002 2003 ud_hdr->rsvd_dest_qpn = ud_wr(wr)->remote_qpn; 2004 if (qp->qp_type == IB_QPT_GSI) 2005 ud_hdr->qkey = qp->qkey; 2006 else 2007 ud_hdr->qkey = ud_wr(wr)->remote_qkey; 2008 ud_hdr->rsvd_ahid = ah->id; 2009 if (ah->av->valid & OCRDMA_AV_VLAN_VALID) 2010 hdr->cw |= (OCRDMA_FLAG_AH_VLAN_PR << OCRDMA_WQE_FLAGS_SHIFT); 2011 } 2012 2013 static void ocrdma_build_sges(struct ocrdma_hdr_wqe *hdr, 2014 struct ocrdma_sge *sge, int num_sge, 2015 struct ib_sge *sg_list) 2016 { 2017 int i; 2018 2019 for (i = 0; i < num_sge; i++) { 2020 sge[i].lrkey = sg_list[i].lkey; 2021 sge[i].addr_lo = sg_list[i].addr; 2022 sge[i].addr_hi = upper_32_bits(sg_list[i].addr); 2023 sge[i].len = sg_list[i].length; 2024 hdr->total_len += sg_list[i].length; 2025 } 2026 if (num_sge == 0) 2027 memset(sge, 0, sizeof(*sge)); 2028 } 2029 2030 static inline uint32_t ocrdma_sglist_len(struct ib_sge *sg_list, int num_sge) 2031 { 2032 uint32_t total_len = 0, i; 2033 2034 for (i = 0; i < num_sge; i++) 2035 total_len += sg_list[i].length; 2036 return total_len; 2037 } 2038 2039 2040 static int ocrdma_build_inline_sges(struct ocrdma_qp *qp, 2041 struct ocrdma_hdr_wqe *hdr, 2042 struct ocrdma_sge *sge, 2043 struct ib_send_wr *wr, u32 wqe_size) 2044 { 2045 int i; 2046 char *dpp_addr; 2047 2048 if (wr->send_flags & IB_SEND_INLINE && qp->qp_type != IB_QPT_UD) { 2049 hdr->total_len = ocrdma_sglist_len(wr->sg_list, wr->num_sge); 2050 if (unlikely(hdr->total_len > qp->max_inline_data)) { 2051 pr_err("%s() supported_len=0x%x,\n" 2052 " unsupported len req=0x%x\n", __func__, 2053 qp->max_inline_data, hdr->total_len); 2054 return -EINVAL; 2055 } 2056 dpp_addr = (char *)sge; 2057 for (i = 0; i < wr->num_sge; i++) { 2058 memcpy(dpp_addr, 2059 (void *)(unsigned long)wr->sg_list[i].addr, 2060 wr->sg_list[i].length); 2061 dpp_addr += wr->sg_list[i].length; 2062 } 2063 2064 wqe_size += roundup(hdr->total_len, OCRDMA_WQE_ALIGN_BYTES); 2065 if (0 == hdr->total_len) 2066 wqe_size += sizeof(struct ocrdma_sge); 2067 hdr->cw |= (OCRDMA_TYPE_INLINE << OCRDMA_WQE_TYPE_SHIFT); 2068 } else { 2069 ocrdma_build_sges(hdr, sge, wr->num_sge, wr->sg_list); 2070 if (wr->num_sge) 2071 wqe_size += (wr->num_sge * sizeof(struct ocrdma_sge)); 2072 else 2073 wqe_size += sizeof(struct ocrdma_sge); 2074 hdr->cw |= (OCRDMA_TYPE_LKEY << OCRDMA_WQE_TYPE_SHIFT); 2075 } 2076 hdr->cw |= ((wqe_size / OCRDMA_WQE_STRIDE) << OCRDMA_WQE_SIZE_SHIFT); 2077 return 0; 2078 } 2079 2080 static int ocrdma_build_send(struct ocrdma_qp *qp, struct ocrdma_hdr_wqe *hdr, 2081 struct ib_send_wr *wr) 2082 { 2083 int status; 2084 struct ocrdma_sge *sge; 2085 u32 wqe_size = sizeof(*hdr); 2086 2087 if (qp->qp_type == IB_QPT_UD || qp->qp_type == IB_QPT_GSI) { 2088 ocrdma_build_ud_hdr(qp, hdr, wr); 2089 sge = (struct ocrdma_sge *)(hdr + 2); 2090 wqe_size += sizeof(struct ocrdma_ewqe_ud_hdr); 2091 } else { 2092 sge = (struct ocrdma_sge *)(hdr + 1); 2093 } 2094 2095 status = ocrdma_build_inline_sges(qp, hdr, sge, wr, wqe_size); 2096 return status; 2097 } 2098 2099 static int ocrdma_build_write(struct ocrdma_qp *qp, struct ocrdma_hdr_wqe *hdr, 2100 struct ib_send_wr *wr) 2101 { 2102 int status; 2103 struct ocrdma_sge *ext_rw = (struct ocrdma_sge *)(hdr + 1); 2104 struct ocrdma_sge *sge = ext_rw + 1; 2105 u32 wqe_size = sizeof(*hdr) + sizeof(*ext_rw); 2106 2107 status = ocrdma_build_inline_sges(qp, hdr, sge, wr, wqe_size); 2108 if (status) 2109 return status; 2110 ext_rw->addr_lo = rdma_wr(wr)->remote_addr; 2111 ext_rw->addr_hi = upper_32_bits(rdma_wr(wr)->remote_addr); 2112 ext_rw->lrkey = rdma_wr(wr)->rkey; 2113 ext_rw->len = hdr->total_len; 2114 return 0; 2115 } 2116 2117 static void ocrdma_build_read(struct ocrdma_qp *qp, struct ocrdma_hdr_wqe *hdr, 2118 struct ib_send_wr *wr) 2119 { 2120 struct ocrdma_sge *ext_rw = (struct ocrdma_sge *)(hdr + 1); 2121 struct ocrdma_sge *sge = ext_rw + 1; 2122 u32 wqe_size = ((wr->num_sge + 1) * sizeof(struct ocrdma_sge)) + 2123 sizeof(struct ocrdma_hdr_wqe); 2124 2125 ocrdma_build_sges(hdr, sge, wr->num_sge, wr->sg_list); 2126 hdr->cw |= ((wqe_size / OCRDMA_WQE_STRIDE) << OCRDMA_WQE_SIZE_SHIFT); 2127 hdr->cw |= (OCRDMA_READ << OCRDMA_WQE_OPCODE_SHIFT); 2128 hdr->cw |= (OCRDMA_TYPE_LKEY << OCRDMA_WQE_TYPE_SHIFT); 2129 2130 ext_rw->addr_lo = rdma_wr(wr)->remote_addr; 2131 ext_rw->addr_hi = upper_32_bits(rdma_wr(wr)->remote_addr); 2132 ext_rw->lrkey = rdma_wr(wr)->rkey; 2133 ext_rw->len = hdr->total_len; 2134 } 2135 2136 static int get_encoded_page_size(int pg_sz) 2137 { 2138 /* Max size is 256M 4096 << 16 */ 2139 int i = 0; 2140 for (; i < 17; i++) 2141 if (pg_sz == (4096 << i)) 2142 break; 2143 return i; 2144 } 2145 2146 static int ocrdma_build_reg(struct ocrdma_qp *qp, 2147 struct ocrdma_hdr_wqe *hdr, 2148 struct ib_reg_wr *wr) 2149 { 2150 u64 fbo; 2151 struct ocrdma_ewqe_fr *fast_reg = (struct ocrdma_ewqe_fr *)(hdr + 1); 2152 struct ocrdma_mr *mr = get_ocrdma_mr(wr->mr); 2153 struct ocrdma_pbl *pbl_tbl = mr->hwmr.pbl_table; 2154 struct ocrdma_pbe *pbe; 2155 u32 wqe_size = sizeof(*fast_reg) + sizeof(*hdr); 2156 int num_pbes = 0, i; 2157 2158 wqe_size = roundup(wqe_size, OCRDMA_WQE_ALIGN_BYTES); 2159 2160 hdr->cw |= (OCRDMA_FR_MR << OCRDMA_WQE_OPCODE_SHIFT); 2161 hdr->cw |= ((wqe_size / OCRDMA_WQE_STRIDE) << OCRDMA_WQE_SIZE_SHIFT); 2162 2163 if (wr->access & IB_ACCESS_LOCAL_WRITE) 2164 hdr->rsvd_lkey_flags |= OCRDMA_LKEY_FLAG_LOCAL_WR; 2165 if (wr->access & IB_ACCESS_REMOTE_WRITE) 2166 hdr->rsvd_lkey_flags |= OCRDMA_LKEY_FLAG_REMOTE_WR; 2167 if (wr->access & IB_ACCESS_REMOTE_READ) 2168 hdr->rsvd_lkey_flags |= OCRDMA_LKEY_FLAG_REMOTE_RD; 2169 hdr->lkey = wr->key; 2170 hdr->total_len = mr->ibmr.length; 2171 2172 fbo = mr->ibmr.iova - mr->pages[0]; 2173 2174 fast_reg->va_hi = upper_32_bits(mr->ibmr.iova); 2175 fast_reg->va_lo = (u32) (mr->ibmr.iova & 0xffffffff); 2176 fast_reg->fbo_hi = upper_32_bits(fbo); 2177 fast_reg->fbo_lo = (u32) fbo & 0xffffffff; 2178 fast_reg->num_sges = mr->npages; 2179 fast_reg->size_sge = get_encoded_page_size(mr->ibmr.page_size); 2180 2181 pbe = pbl_tbl->va; 2182 for (i = 0; i < mr->npages; i++) { 2183 u64 buf_addr = mr->pages[i]; 2184 2185 pbe->pa_lo = cpu_to_le32((u32) (buf_addr & PAGE_MASK)); 2186 pbe->pa_hi = cpu_to_le32((u32) upper_32_bits(buf_addr)); 2187 num_pbes += 1; 2188 pbe++; 2189 2190 /* if the pbl is full storing the pbes, 2191 * move to next pbl. 2192 */ 2193 if (num_pbes == (mr->hwmr.pbl_size/sizeof(u64))) { 2194 pbl_tbl++; 2195 pbe = (struct ocrdma_pbe *)pbl_tbl->va; 2196 } 2197 } 2198 2199 return 0; 2200 } 2201 2202 static void ocrdma_ring_sq_db(struct ocrdma_qp *qp) 2203 { 2204 u32 val = qp->sq.dbid | (1 << OCRDMA_DB_SQ_SHIFT); 2205 2206 iowrite32(val, qp->sq_db); 2207 } 2208 2209 int ocrdma_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr, 2210 struct ib_send_wr **bad_wr) 2211 { 2212 int status = 0; 2213 struct ocrdma_qp *qp = get_ocrdma_qp(ibqp); 2214 struct ocrdma_hdr_wqe *hdr; 2215 unsigned long flags; 2216 2217 spin_lock_irqsave(&qp->q_lock, flags); 2218 if (qp->state != OCRDMA_QPS_RTS && qp->state != OCRDMA_QPS_SQD) { 2219 spin_unlock_irqrestore(&qp->q_lock, flags); 2220 *bad_wr = wr; 2221 return -EINVAL; 2222 } 2223 2224 while (wr) { 2225 if (qp->qp_type == IB_QPT_UD && 2226 (wr->opcode != IB_WR_SEND && 2227 wr->opcode != IB_WR_SEND_WITH_IMM)) { 2228 *bad_wr = wr; 2229 status = -EINVAL; 2230 break; 2231 } 2232 if (ocrdma_hwq_free_cnt(&qp->sq) == 0 || 2233 wr->num_sge > qp->sq.max_sges) { 2234 *bad_wr = wr; 2235 status = -ENOMEM; 2236 break; 2237 } 2238 hdr = ocrdma_hwq_head(&qp->sq); 2239 hdr->cw = 0; 2240 if (wr->send_flags & IB_SEND_SIGNALED || qp->signaled) 2241 hdr->cw |= (OCRDMA_FLAG_SIG << OCRDMA_WQE_FLAGS_SHIFT); 2242 if (wr->send_flags & IB_SEND_FENCE) 2243 hdr->cw |= 2244 (OCRDMA_FLAG_FENCE_L << OCRDMA_WQE_FLAGS_SHIFT); 2245 if (wr->send_flags & IB_SEND_SOLICITED) 2246 hdr->cw |= 2247 (OCRDMA_FLAG_SOLICIT << OCRDMA_WQE_FLAGS_SHIFT); 2248 hdr->total_len = 0; 2249 switch (wr->opcode) { 2250 case IB_WR_SEND_WITH_IMM: 2251 hdr->cw |= (OCRDMA_FLAG_IMM << OCRDMA_WQE_FLAGS_SHIFT); 2252 hdr->immdt = ntohl(wr->ex.imm_data); 2253 case IB_WR_SEND: 2254 hdr->cw |= (OCRDMA_SEND << OCRDMA_WQE_OPCODE_SHIFT); 2255 ocrdma_build_send(qp, hdr, wr); 2256 break; 2257 case IB_WR_SEND_WITH_INV: 2258 hdr->cw |= (OCRDMA_FLAG_INV << OCRDMA_WQE_FLAGS_SHIFT); 2259 hdr->cw |= (OCRDMA_SEND << OCRDMA_WQE_OPCODE_SHIFT); 2260 hdr->lkey = wr->ex.invalidate_rkey; 2261 status = ocrdma_build_send(qp, hdr, wr); 2262 break; 2263 case IB_WR_RDMA_WRITE_WITH_IMM: 2264 hdr->cw |= (OCRDMA_FLAG_IMM << OCRDMA_WQE_FLAGS_SHIFT); 2265 hdr->immdt = ntohl(wr->ex.imm_data); 2266 case IB_WR_RDMA_WRITE: 2267 hdr->cw |= (OCRDMA_WRITE << OCRDMA_WQE_OPCODE_SHIFT); 2268 status = ocrdma_build_write(qp, hdr, wr); 2269 break; 2270 case IB_WR_RDMA_READ: 2271 ocrdma_build_read(qp, hdr, wr); 2272 break; 2273 case IB_WR_LOCAL_INV: 2274 hdr->cw |= 2275 (OCRDMA_LKEY_INV << OCRDMA_WQE_OPCODE_SHIFT); 2276 hdr->cw |= ((sizeof(struct ocrdma_hdr_wqe) + 2277 sizeof(struct ocrdma_sge)) / 2278 OCRDMA_WQE_STRIDE) << OCRDMA_WQE_SIZE_SHIFT; 2279 hdr->lkey = wr->ex.invalidate_rkey; 2280 break; 2281 case IB_WR_REG_MR: 2282 status = ocrdma_build_reg(qp, hdr, reg_wr(wr)); 2283 break; 2284 default: 2285 status = -EINVAL; 2286 break; 2287 } 2288 if (status) { 2289 *bad_wr = wr; 2290 break; 2291 } 2292 if (wr->send_flags & IB_SEND_SIGNALED || qp->signaled) 2293 qp->wqe_wr_id_tbl[qp->sq.head].signaled = 1; 2294 else 2295 qp->wqe_wr_id_tbl[qp->sq.head].signaled = 0; 2296 qp->wqe_wr_id_tbl[qp->sq.head].wrid = wr->wr_id; 2297 ocrdma_cpu_to_le32(hdr, ((hdr->cw >> OCRDMA_WQE_SIZE_SHIFT) & 2298 OCRDMA_WQE_SIZE_MASK) * OCRDMA_WQE_STRIDE); 2299 /* make sure wqe is written before adapter can access it */ 2300 wmb(); 2301 /* inform hw to start processing it */ 2302 ocrdma_ring_sq_db(qp); 2303 2304 /* update pointer, counter for next wr */ 2305 ocrdma_hwq_inc_head(&qp->sq); 2306 wr = wr->next; 2307 } 2308 spin_unlock_irqrestore(&qp->q_lock, flags); 2309 return status; 2310 } 2311 2312 static void ocrdma_ring_rq_db(struct ocrdma_qp *qp) 2313 { 2314 u32 val = qp->rq.dbid | (1 << OCRDMA_DB_RQ_SHIFT); 2315 2316 iowrite32(val, qp->rq_db); 2317 } 2318 2319 static void ocrdma_build_rqe(struct ocrdma_hdr_wqe *rqe, struct ib_recv_wr *wr, 2320 u16 tag) 2321 { 2322 u32 wqe_size = 0; 2323 struct ocrdma_sge *sge; 2324 if (wr->num_sge) 2325 wqe_size = (wr->num_sge * sizeof(*sge)) + sizeof(*rqe); 2326 else 2327 wqe_size = sizeof(*sge) + sizeof(*rqe); 2328 2329 rqe->cw = ((wqe_size / OCRDMA_WQE_STRIDE) << 2330 OCRDMA_WQE_SIZE_SHIFT); 2331 rqe->cw |= (OCRDMA_FLAG_SIG << OCRDMA_WQE_FLAGS_SHIFT); 2332 rqe->cw |= (OCRDMA_TYPE_LKEY << OCRDMA_WQE_TYPE_SHIFT); 2333 rqe->total_len = 0; 2334 rqe->rsvd_tag = tag; 2335 sge = (struct ocrdma_sge *)(rqe + 1); 2336 ocrdma_build_sges(rqe, sge, wr->num_sge, wr->sg_list); 2337 ocrdma_cpu_to_le32(rqe, wqe_size); 2338 } 2339 2340 int ocrdma_post_recv(struct ib_qp *ibqp, struct ib_recv_wr *wr, 2341 struct ib_recv_wr **bad_wr) 2342 { 2343 int status = 0; 2344 unsigned long flags; 2345 struct ocrdma_qp *qp = get_ocrdma_qp(ibqp); 2346 struct ocrdma_hdr_wqe *rqe; 2347 2348 spin_lock_irqsave(&qp->q_lock, flags); 2349 if (qp->state == OCRDMA_QPS_RST || qp->state == OCRDMA_QPS_ERR) { 2350 spin_unlock_irqrestore(&qp->q_lock, flags); 2351 *bad_wr = wr; 2352 return -EINVAL; 2353 } 2354 while (wr) { 2355 if (ocrdma_hwq_free_cnt(&qp->rq) == 0 || 2356 wr->num_sge > qp->rq.max_sges) { 2357 *bad_wr = wr; 2358 status = -ENOMEM; 2359 break; 2360 } 2361 rqe = ocrdma_hwq_head(&qp->rq); 2362 ocrdma_build_rqe(rqe, wr, 0); 2363 2364 qp->rqe_wr_id_tbl[qp->rq.head] = wr->wr_id; 2365 /* make sure rqe is written before adapter can access it */ 2366 wmb(); 2367 2368 /* inform hw to start processing it */ 2369 ocrdma_ring_rq_db(qp); 2370 2371 /* update pointer, counter for next wr */ 2372 ocrdma_hwq_inc_head(&qp->rq); 2373 wr = wr->next; 2374 } 2375 spin_unlock_irqrestore(&qp->q_lock, flags); 2376 return status; 2377 } 2378 2379 /* cqe for srq's rqe can potentially arrive out of order. 2380 * index gives the entry in the shadow table where to store 2381 * the wr_id. tag/index is returned in cqe to reference back 2382 * for a given rqe. 2383 */ 2384 static int ocrdma_srq_get_idx(struct ocrdma_srq *srq) 2385 { 2386 int row = 0; 2387 int indx = 0; 2388 2389 for (row = 0; row < srq->bit_fields_len; row++) { 2390 if (srq->idx_bit_fields[row]) { 2391 indx = ffs(srq->idx_bit_fields[row]); 2392 indx = (row * 32) + (indx - 1); 2393 if (indx >= srq->rq.max_cnt) 2394 BUG(); 2395 ocrdma_srq_toggle_bit(srq, indx); 2396 break; 2397 } 2398 } 2399 2400 if (row == srq->bit_fields_len) 2401 BUG(); 2402 return indx + 1; /* Use from index 1 */ 2403 } 2404 2405 static void ocrdma_ring_srq_db(struct ocrdma_srq *srq) 2406 { 2407 u32 val = srq->rq.dbid | (1 << 16); 2408 2409 iowrite32(val, srq->db + OCRDMA_DB_GEN2_SRQ_OFFSET); 2410 } 2411 2412 int ocrdma_post_srq_recv(struct ib_srq *ibsrq, struct ib_recv_wr *wr, 2413 struct ib_recv_wr **bad_wr) 2414 { 2415 int status = 0; 2416 unsigned long flags; 2417 struct ocrdma_srq *srq; 2418 struct ocrdma_hdr_wqe *rqe; 2419 u16 tag; 2420 2421 srq = get_ocrdma_srq(ibsrq); 2422 2423 spin_lock_irqsave(&srq->q_lock, flags); 2424 while (wr) { 2425 if (ocrdma_hwq_free_cnt(&srq->rq) == 0 || 2426 wr->num_sge > srq->rq.max_sges) { 2427 status = -ENOMEM; 2428 *bad_wr = wr; 2429 break; 2430 } 2431 tag = ocrdma_srq_get_idx(srq); 2432 rqe = ocrdma_hwq_head(&srq->rq); 2433 ocrdma_build_rqe(rqe, wr, tag); 2434 2435 srq->rqe_wr_id_tbl[tag] = wr->wr_id; 2436 /* make sure rqe is written before adapter can perform DMA */ 2437 wmb(); 2438 /* inform hw to start processing it */ 2439 ocrdma_ring_srq_db(srq); 2440 /* update pointer, counter for next wr */ 2441 ocrdma_hwq_inc_head(&srq->rq); 2442 wr = wr->next; 2443 } 2444 spin_unlock_irqrestore(&srq->q_lock, flags); 2445 return status; 2446 } 2447 2448 static enum ib_wc_status ocrdma_to_ibwc_err(u16 status) 2449 { 2450 enum ib_wc_status ibwc_status; 2451 2452 switch (status) { 2453 case OCRDMA_CQE_GENERAL_ERR: 2454 ibwc_status = IB_WC_GENERAL_ERR; 2455 break; 2456 case OCRDMA_CQE_LOC_LEN_ERR: 2457 ibwc_status = IB_WC_LOC_LEN_ERR; 2458 break; 2459 case OCRDMA_CQE_LOC_QP_OP_ERR: 2460 ibwc_status = IB_WC_LOC_QP_OP_ERR; 2461 break; 2462 case OCRDMA_CQE_LOC_EEC_OP_ERR: 2463 ibwc_status = IB_WC_LOC_EEC_OP_ERR; 2464 break; 2465 case OCRDMA_CQE_LOC_PROT_ERR: 2466 ibwc_status = IB_WC_LOC_PROT_ERR; 2467 break; 2468 case OCRDMA_CQE_WR_FLUSH_ERR: 2469 ibwc_status = IB_WC_WR_FLUSH_ERR; 2470 break; 2471 case OCRDMA_CQE_MW_BIND_ERR: 2472 ibwc_status = IB_WC_MW_BIND_ERR; 2473 break; 2474 case OCRDMA_CQE_BAD_RESP_ERR: 2475 ibwc_status = IB_WC_BAD_RESP_ERR; 2476 break; 2477 case OCRDMA_CQE_LOC_ACCESS_ERR: 2478 ibwc_status = IB_WC_LOC_ACCESS_ERR; 2479 break; 2480 case OCRDMA_CQE_REM_INV_REQ_ERR: 2481 ibwc_status = IB_WC_REM_INV_REQ_ERR; 2482 break; 2483 case OCRDMA_CQE_REM_ACCESS_ERR: 2484 ibwc_status = IB_WC_REM_ACCESS_ERR; 2485 break; 2486 case OCRDMA_CQE_REM_OP_ERR: 2487 ibwc_status = IB_WC_REM_OP_ERR; 2488 break; 2489 case OCRDMA_CQE_RETRY_EXC_ERR: 2490 ibwc_status = IB_WC_RETRY_EXC_ERR; 2491 break; 2492 case OCRDMA_CQE_RNR_RETRY_EXC_ERR: 2493 ibwc_status = IB_WC_RNR_RETRY_EXC_ERR; 2494 break; 2495 case OCRDMA_CQE_LOC_RDD_VIOL_ERR: 2496 ibwc_status = IB_WC_LOC_RDD_VIOL_ERR; 2497 break; 2498 case OCRDMA_CQE_REM_INV_RD_REQ_ERR: 2499 ibwc_status = IB_WC_REM_INV_RD_REQ_ERR; 2500 break; 2501 case OCRDMA_CQE_REM_ABORT_ERR: 2502 ibwc_status = IB_WC_REM_ABORT_ERR; 2503 break; 2504 case OCRDMA_CQE_INV_EECN_ERR: 2505 ibwc_status = IB_WC_INV_EECN_ERR; 2506 break; 2507 case OCRDMA_CQE_INV_EEC_STATE_ERR: 2508 ibwc_status = IB_WC_INV_EEC_STATE_ERR; 2509 break; 2510 case OCRDMA_CQE_FATAL_ERR: 2511 ibwc_status = IB_WC_FATAL_ERR; 2512 break; 2513 case OCRDMA_CQE_RESP_TIMEOUT_ERR: 2514 ibwc_status = IB_WC_RESP_TIMEOUT_ERR; 2515 break; 2516 default: 2517 ibwc_status = IB_WC_GENERAL_ERR; 2518 break; 2519 } 2520 return ibwc_status; 2521 } 2522 2523 static void ocrdma_update_wc(struct ocrdma_qp *qp, struct ib_wc *ibwc, 2524 u32 wqe_idx) 2525 { 2526 struct ocrdma_hdr_wqe *hdr; 2527 struct ocrdma_sge *rw; 2528 int opcode; 2529 2530 hdr = ocrdma_hwq_head_from_idx(&qp->sq, wqe_idx); 2531 2532 ibwc->wr_id = qp->wqe_wr_id_tbl[wqe_idx].wrid; 2533 /* Undo the hdr->cw swap */ 2534 opcode = le32_to_cpu(hdr->cw) & OCRDMA_WQE_OPCODE_MASK; 2535 switch (opcode) { 2536 case OCRDMA_WRITE: 2537 ibwc->opcode = IB_WC_RDMA_WRITE; 2538 break; 2539 case OCRDMA_READ: 2540 rw = (struct ocrdma_sge *)(hdr + 1); 2541 ibwc->opcode = IB_WC_RDMA_READ; 2542 ibwc->byte_len = rw->len; 2543 break; 2544 case OCRDMA_SEND: 2545 ibwc->opcode = IB_WC_SEND; 2546 break; 2547 case OCRDMA_FR_MR: 2548 ibwc->opcode = IB_WC_REG_MR; 2549 break; 2550 case OCRDMA_LKEY_INV: 2551 ibwc->opcode = IB_WC_LOCAL_INV; 2552 break; 2553 default: 2554 ibwc->status = IB_WC_GENERAL_ERR; 2555 pr_err("%s() invalid opcode received = 0x%x\n", 2556 __func__, hdr->cw & OCRDMA_WQE_OPCODE_MASK); 2557 break; 2558 } 2559 } 2560 2561 static void ocrdma_set_cqe_status_flushed(struct ocrdma_qp *qp, 2562 struct ocrdma_cqe *cqe) 2563 { 2564 if (is_cqe_for_sq(cqe)) { 2565 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu( 2566 cqe->flags_status_srcqpn) & 2567 ~OCRDMA_CQE_STATUS_MASK); 2568 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu( 2569 cqe->flags_status_srcqpn) | 2570 (OCRDMA_CQE_WR_FLUSH_ERR << 2571 OCRDMA_CQE_STATUS_SHIFT)); 2572 } else { 2573 if (qp->qp_type == IB_QPT_UD || qp->qp_type == IB_QPT_GSI) { 2574 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu( 2575 cqe->flags_status_srcqpn) & 2576 ~OCRDMA_CQE_UD_STATUS_MASK); 2577 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu( 2578 cqe->flags_status_srcqpn) | 2579 (OCRDMA_CQE_WR_FLUSH_ERR << 2580 OCRDMA_CQE_UD_STATUS_SHIFT)); 2581 } else { 2582 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu( 2583 cqe->flags_status_srcqpn) & 2584 ~OCRDMA_CQE_STATUS_MASK); 2585 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu( 2586 cqe->flags_status_srcqpn) | 2587 (OCRDMA_CQE_WR_FLUSH_ERR << 2588 OCRDMA_CQE_STATUS_SHIFT)); 2589 } 2590 } 2591 } 2592 2593 static bool ocrdma_update_err_cqe(struct ib_wc *ibwc, struct ocrdma_cqe *cqe, 2594 struct ocrdma_qp *qp, int status) 2595 { 2596 bool expand = false; 2597 2598 ibwc->byte_len = 0; 2599 ibwc->qp = &qp->ibqp; 2600 ibwc->status = ocrdma_to_ibwc_err(status); 2601 2602 ocrdma_flush_qp(qp); 2603 ocrdma_qp_state_change(qp, IB_QPS_ERR, NULL); 2604 2605 /* if wqe/rqe pending for which cqe needs to be returned, 2606 * trigger inflating it. 2607 */ 2608 if (!is_hw_rq_empty(qp) || !is_hw_sq_empty(qp)) { 2609 expand = true; 2610 ocrdma_set_cqe_status_flushed(qp, cqe); 2611 } 2612 return expand; 2613 } 2614 2615 static int ocrdma_update_err_rcqe(struct ib_wc *ibwc, struct ocrdma_cqe *cqe, 2616 struct ocrdma_qp *qp, int status) 2617 { 2618 ibwc->opcode = IB_WC_RECV; 2619 ibwc->wr_id = qp->rqe_wr_id_tbl[qp->rq.tail]; 2620 ocrdma_hwq_inc_tail(&qp->rq); 2621 2622 return ocrdma_update_err_cqe(ibwc, cqe, qp, status); 2623 } 2624 2625 static int ocrdma_update_err_scqe(struct ib_wc *ibwc, struct ocrdma_cqe *cqe, 2626 struct ocrdma_qp *qp, int status) 2627 { 2628 ocrdma_update_wc(qp, ibwc, qp->sq.tail); 2629 ocrdma_hwq_inc_tail(&qp->sq); 2630 2631 return ocrdma_update_err_cqe(ibwc, cqe, qp, status); 2632 } 2633 2634 2635 static bool ocrdma_poll_err_scqe(struct ocrdma_qp *qp, 2636 struct ocrdma_cqe *cqe, struct ib_wc *ibwc, 2637 bool *polled, bool *stop) 2638 { 2639 bool expand; 2640 struct ocrdma_dev *dev = get_ocrdma_dev(qp->ibqp.device); 2641 int status = (le32_to_cpu(cqe->flags_status_srcqpn) & 2642 OCRDMA_CQE_STATUS_MASK) >> OCRDMA_CQE_STATUS_SHIFT; 2643 if (status < OCRDMA_MAX_CQE_ERR) 2644 atomic_inc(&dev->cqe_err_stats[status]); 2645 2646 /* when hw sq is empty, but rq is not empty, so we continue 2647 * to keep the cqe in order to get the cq event again. 2648 */ 2649 if (is_hw_sq_empty(qp) && !is_hw_rq_empty(qp)) { 2650 /* when cq for rq and sq is same, it is safe to return 2651 * flush cqe for RQEs. 2652 */ 2653 if (!qp->srq && (qp->sq_cq == qp->rq_cq)) { 2654 *polled = true; 2655 status = OCRDMA_CQE_WR_FLUSH_ERR; 2656 expand = ocrdma_update_err_rcqe(ibwc, cqe, qp, status); 2657 } else { 2658 /* stop processing further cqe as this cqe is used for 2659 * triggering cq event on buddy cq of RQ. 2660 * When QP is destroyed, this cqe will be removed 2661 * from the cq's hardware q. 2662 */ 2663 *polled = false; 2664 *stop = true; 2665 expand = false; 2666 } 2667 } else if (is_hw_sq_empty(qp)) { 2668 /* Do nothing */ 2669 expand = false; 2670 *polled = false; 2671 *stop = false; 2672 } else { 2673 *polled = true; 2674 expand = ocrdma_update_err_scqe(ibwc, cqe, qp, status); 2675 } 2676 return expand; 2677 } 2678 2679 static bool ocrdma_poll_success_scqe(struct ocrdma_qp *qp, 2680 struct ocrdma_cqe *cqe, 2681 struct ib_wc *ibwc, bool *polled) 2682 { 2683 bool expand = false; 2684 int tail = qp->sq.tail; 2685 u32 wqe_idx; 2686 2687 if (!qp->wqe_wr_id_tbl[tail].signaled) { 2688 *polled = false; /* WC cannot be consumed yet */ 2689 } else { 2690 ibwc->status = IB_WC_SUCCESS; 2691 ibwc->wc_flags = 0; 2692 ibwc->qp = &qp->ibqp; 2693 ocrdma_update_wc(qp, ibwc, tail); 2694 *polled = true; 2695 } 2696 wqe_idx = (le32_to_cpu(cqe->wq.wqeidx) & 2697 OCRDMA_CQE_WQEIDX_MASK) & qp->sq.max_wqe_idx; 2698 if (tail != wqe_idx) 2699 expand = true; /* Coalesced CQE can't be consumed yet */ 2700 2701 ocrdma_hwq_inc_tail(&qp->sq); 2702 return expand; 2703 } 2704 2705 static bool ocrdma_poll_scqe(struct ocrdma_qp *qp, struct ocrdma_cqe *cqe, 2706 struct ib_wc *ibwc, bool *polled, bool *stop) 2707 { 2708 int status; 2709 bool expand; 2710 2711 status = (le32_to_cpu(cqe->flags_status_srcqpn) & 2712 OCRDMA_CQE_STATUS_MASK) >> OCRDMA_CQE_STATUS_SHIFT; 2713 2714 if (status == OCRDMA_CQE_SUCCESS) 2715 expand = ocrdma_poll_success_scqe(qp, cqe, ibwc, polled); 2716 else 2717 expand = ocrdma_poll_err_scqe(qp, cqe, ibwc, polled, stop); 2718 return expand; 2719 } 2720 2721 static int ocrdma_update_ud_rcqe(struct ib_wc *ibwc, struct ocrdma_cqe *cqe) 2722 { 2723 int status; 2724 2725 status = (le32_to_cpu(cqe->flags_status_srcqpn) & 2726 OCRDMA_CQE_UD_STATUS_MASK) >> OCRDMA_CQE_UD_STATUS_SHIFT; 2727 ibwc->src_qp = le32_to_cpu(cqe->flags_status_srcqpn) & 2728 OCRDMA_CQE_SRCQP_MASK; 2729 ibwc->pkey_index = le32_to_cpu(cqe->ud.rxlen_pkey) & 2730 OCRDMA_CQE_PKEY_MASK; 2731 ibwc->wc_flags = IB_WC_GRH; 2732 ibwc->byte_len = (le32_to_cpu(cqe->ud.rxlen_pkey) >> 2733 OCRDMA_CQE_UD_XFER_LEN_SHIFT); 2734 return status; 2735 } 2736 2737 static void ocrdma_update_free_srq_cqe(struct ib_wc *ibwc, 2738 struct ocrdma_cqe *cqe, 2739 struct ocrdma_qp *qp) 2740 { 2741 unsigned long flags; 2742 struct ocrdma_srq *srq; 2743 u32 wqe_idx; 2744 2745 srq = get_ocrdma_srq(qp->ibqp.srq); 2746 wqe_idx = (le32_to_cpu(cqe->rq.buftag_qpn) >> 2747 OCRDMA_CQE_BUFTAG_SHIFT) & srq->rq.max_wqe_idx; 2748 if (wqe_idx < 1) 2749 BUG(); 2750 2751 ibwc->wr_id = srq->rqe_wr_id_tbl[wqe_idx]; 2752 spin_lock_irqsave(&srq->q_lock, flags); 2753 ocrdma_srq_toggle_bit(srq, wqe_idx - 1); 2754 spin_unlock_irqrestore(&srq->q_lock, flags); 2755 ocrdma_hwq_inc_tail(&srq->rq); 2756 } 2757 2758 static bool ocrdma_poll_err_rcqe(struct ocrdma_qp *qp, struct ocrdma_cqe *cqe, 2759 struct ib_wc *ibwc, bool *polled, bool *stop, 2760 int status) 2761 { 2762 bool expand; 2763 struct ocrdma_dev *dev = get_ocrdma_dev(qp->ibqp.device); 2764 2765 if (status < OCRDMA_MAX_CQE_ERR) 2766 atomic_inc(&dev->cqe_err_stats[status]); 2767 2768 /* when hw_rq is empty, but wq is not empty, so continue 2769 * to keep the cqe to get the cq event again. 2770 */ 2771 if (is_hw_rq_empty(qp) && !is_hw_sq_empty(qp)) { 2772 if (!qp->srq && (qp->sq_cq == qp->rq_cq)) { 2773 *polled = true; 2774 status = OCRDMA_CQE_WR_FLUSH_ERR; 2775 expand = ocrdma_update_err_scqe(ibwc, cqe, qp, status); 2776 } else { 2777 *polled = false; 2778 *stop = true; 2779 expand = false; 2780 } 2781 } else if (is_hw_rq_empty(qp)) { 2782 /* Do nothing */ 2783 expand = false; 2784 *polled = false; 2785 *stop = false; 2786 } else { 2787 *polled = true; 2788 expand = ocrdma_update_err_rcqe(ibwc, cqe, qp, status); 2789 } 2790 return expand; 2791 } 2792 2793 static void ocrdma_poll_success_rcqe(struct ocrdma_qp *qp, 2794 struct ocrdma_cqe *cqe, struct ib_wc *ibwc) 2795 { 2796 ibwc->opcode = IB_WC_RECV; 2797 ibwc->qp = &qp->ibqp; 2798 ibwc->status = IB_WC_SUCCESS; 2799 2800 if (qp->qp_type == IB_QPT_UD || qp->qp_type == IB_QPT_GSI) 2801 ocrdma_update_ud_rcqe(ibwc, cqe); 2802 else 2803 ibwc->byte_len = le32_to_cpu(cqe->rq.rxlen); 2804 2805 if (is_cqe_imm(cqe)) { 2806 ibwc->ex.imm_data = htonl(le32_to_cpu(cqe->rq.lkey_immdt)); 2807 ibwc->wc_flags |= IB_WC_WITH_IMM; 2808 } else if (is_cqe_wr_imm(cqe)) { 2809 ibwc->opcode = IB_WC_RECV_RDMA_WITH_IMM; 2810 ibwc->ex.imm_data = htonl(le32_to_cpu(cqe->rq.lkey_immdt)); 2811 ibwc->wc_flags |= IB_WC_WITH_IMM; 2812 } else if (is_cqe_invalidated(cqe)) { 2813 ibwc->ex.invalidate_rkey = le32_to_cpu(cqe->rq.lkey_immdt); 2814 ibwc->wc_flags |= IB_WC_WITH_INVALIDATE; 2815 } 2816 if (qp->ibqp.srq) { 2817 ocrdma_update_free_srq_cqe(ibwc, cqe, qp); 2818 } else { 2819 ibwc->wr_id = qp->rqe_wr_id_tbl[qp->rq.tail]; 2820 ocrdma_hwq_inc_tail(&qp->rq); 2821 } 2822 } 2823 2824 static bool ocrdma_poll_rcqe(struct ocrdma_qp *qp, struct ocrdma_cqe *cqe, 2825 struct ib_wc *ibwc, bool *polled, bool *stop) 2826 { 2827 int status; 2828 bool expand = false; 2829 2830 ibwc->wc_flags = 0; 2831 if (qp->qp_type == IB_QPT_UD || qp->qp_type == IB_QPT_GSI) { 2832 status = (le32_to_cpu(cqe->flags_status_srcqpn) & 2833 OCRDMA_CQE_UD_STATUS_MASK) >> 2834 OCRDMA_CQE_UD_STATUS_SHIFT; 2835 } else { 2836 status = (le32_to_cpu(cqe->flags_status_srcqpn) & 2837 OCRDMA_CQE_STATUS_MASK) >> OCRDMA_CQE_STATUS_SHIFT; 2838 } 2839 2840 if (status == OCRDMA_CQE_SUCCESS) { 2841 *polled = true; 2842 ocrdma_poll_success_rcqe(qp, cqe, ibwc); 2843 } else { 2844 expand = ocrdma_poll_err_rcqe(qp, cqe, ibwc, polled, stop, 2845 status); 2846 } 2847 return expand; 2848 } 2849 2850 static void ocrdma_change_cq_phase(struct ocrdma_cq *cq, struct ocrdma_cqe *cqe, 2851 u16 cur_getp) 2852 { 2853 if (cq->phase_change) { 2854 if (cur_getp == 0) 2855 cq->phase = (~cq->phase & OCRDMA_CQE_VALID); 2856 } else { 2857 /* clear valid bit */ 2858 cqe->flags_status_srcqpn = 0; 2859 } 2860 } 2861 2862 static int ocrdma_poll_hwcq(struct ocrdma_cq *cq, int num_entries, 2863 struct ib_wc *ibwc) 2864 { 2865 u16 qpn = 0; 2866 int i = 0; 2867 bool expand = false; 2868 int polled_hw_cqes = 0; 2869 struct ocrdma_qp *qp = NULL; 2870 struct ocrdma_dev *dev = get_ocrdma_dev(cq->ibcq.device); 2871 struct ocrdma_cqe *cqe; 2872 u16 cur_getp; bool polled = false; bool stop = false; 2873 2874 cur_getp = cq->getp; 2875 while (num_entries) { 2876 cqe = cq->va + cur_getp; 2877 /* check whether valid cqe or not */ 2878 if (!is_cqe_valid(cq, cqe)) 2879 break; 2880 qpn = (le32_to_cpu(cqe->cmn.qpn) & OCRDMA_CQE_QPN_MASK); 2881 /* ignore discarded cqe */ 2882 if (qpn == 0) 2883 goto skip_cqe; 2884 qp = dev->qp_tbl[qpn]; 2885 BUG_ON(qp == NULL); 2886 2887 if (is_cqe_for_sq(cqe)) { 2888 expand = ocrdma_poll_scqe(qp, cqe, ibwc, &polled, 2889 &stop); 2890 } else { 2891 expand = ocrdma_poll_rcqe(qp, cqe, ibwc, &polled, 2892 &stop); 2893 } 2894 if (expand) 2895 goto expand_cqe; 2896 if (stop) 2897 goto stop_cqe; 2898 /* clear qpn to avoid duplicate processing by discard_cqe() */ 2899 cqe->cmn.qpn = 0; 2900 skip_cqe: 2901 polled_hw_cqes += 1; 2902 cur_getp = (cur_getp + 1) % cq->max_hw_cqe; 2903 ocrdma_change_cq_phase(cq, cqe, cur_getp); 2904 expand_cqe: 2905 if (polled) { 2906 num_entries -= 1; 2907 i += 1; 2908 ibwc = ibwc + 1; 2909 polled = false; 2910 } 2911 } 2912 stop_cqe: 2913 cq->getp = cur_getp; 2914 if (cq->deferred_arm || polled_hw_cqes) { 2915 ocrdma_ring_cq_db(dev, cq->id, cq->deferred_arm, 2916 cq->deferred_sol, polled_hw_cqes); 2917 cq->deferred_arm = false; 2918 cq->deferred_sol = false; 2919 } 2920 2921 return i; 2922 } 2923 2924 /* insert error cqe if the QP's SQ or RQ's CQ matches the CQ under poll. */ 2925 static int ocrdma_add_err_cqe(struct ocrdma_cq *cq, int num_entries, 2926 struct ocrdma_qp *qp, struct ib_wc *ibwc) 2927 { 2928 int err_cqes = 0; 2929 2930 while (num_entries) { 2931 if (is_hw_sq_empty(qp) && is_hw_rq_empty(qp)) 2932 break; 2933 if (!is_hw_sq_empty(qp) && qp->sq_cq == cq) { 2934 ocrdma_update_wc(qp, ibwc, qp->sq.tail); 2935 ocrdma_hwq_inc_tail(&qp->sq); 2936 } else if (!is_hw_rq_empty(qp) && qp->rq_cq == cq) { 2937 ibwc->wr_id = qp->rqe_wr_id_tbl[qp->rq.tail]; 2938 ocrdma_hwq_inc_tail(&qp->rq); 2939 } else { 2940 return err_cqes; 2941 } 2942 ibwc->byte_len = 0; 2943 ibwc->status = IB_WC_WR_FLUSH_ERR; 2944 ibwc = ibwc + 1; 2945 err_cqes += 1; 2946 num_entries -= 1; 2947 } 2948 return err_cqes; 2949 } 2950 2951 int ocrdma_poll_cq(struct ib_cq *ibcq, int num_entries, struct ib_wc *wc) 2952 { 2953 int cqes_to_poll = num_entries; 2954 struct ocrdma_cq *cq = get_ocrdma_cq(ibcq); 2955 struct ocrdma_dev *dev = get_ocrdma_dev(ibcq->device); 2956 int num_os_cqe = 0, err_cqes = 0; 2957 struct ocrdma_qp *qp; 2958 unsigned long flags; 2959 2960 /* poll cqes from adapter CQ */ 2961 spin_lock_irqsave(&cq->cq_lock, flags); 2962 num_os_cqe = ocrdma_poll_hwcq(cq, cqes_to_poll, wc); 2963 spin_unlock_irqrestore(&cq->cq_lock, flags); 2964 cqes_to_poll -= num_os_cqe; 2965 2966 if (cqes_to_poll) { 2967 wc = wc + num_os_cqe; 2968 /* adapter returns single error cqe when qp moves to 2969 * error state. So insert error cqes with wc_status as 2970 * FLUSHED for pending WQEs and RQEs of QP's SQ and RQ 2971 * respectively which uses this CQ. 2972 */ 2973 spin_lock_irqsave(&dev->flush_q_lock, flags); 2974 list_for_each_entry(qp, &cq->sq_head, sq_entry) { 2975 if (cqes_to_poll == 0) 2976 break; 2977 err_cqes = ocrdma_add_err_cqe(cq, cqes_to_poll, qp, wc); 2978 cqes_to_poll -= err_cqes; 2979 num_os_cqe += err_cqes; 2980 wc = wc + err_cqes; 2981 } 2982 spin_unlock_irqrestore(&dev->flush_q_lock, flags); 2983 } 2984 return num_os_cqe; 2985 } 2986 2987 int ocrdma_arm_cq(struct ib_cq *ibcq, enum ib_cq_notify_flags cq_flags) 2988 { 2989 struct ocrdma_cq *cq = get_ocrdma_cq(ibcq); 2990 struct ocrdma_dev *dev = get_ocrdma_dev(ibcq->device); 2991 u16 cq_id; 2992 unsigned long flags; 2993 bool arm_needed = false, sol_needed = false; 2994 2995 cq_id = cq->id; 2996 2997 spin_lock_irqsave(&cq->cq_lock, flags); 2998 if (cq_flags & IB_CQ_NEXT_COMP || cq_flags & IB_CQ_SOLICITED) 2999 arm_needed = true; 3000 if (cq_flags & IB_CQ_SOLICITED) 3001 sol_needed = true; 3002 3003 if (cq->first_arm) { 3004 ocrdma_ring_cq_db(dev, cq_id, arm_needed, sol_needed, 0); 3005 cq->first_arm = false; 3006 } 3007 3008 cq->deferred_arm = true; 3009 cq->deferred_sol = sol_needed; 3010 spin_unlock_irqrestore(&cq->cq_lock, flags); 3011 3012 return 0; 3013 } 3014 3015 struct ib_mr *ocrdma_alloc_mr(struct ib_pd *ibpd, 3016 enum ib_mr_type mr_type, 3017 u32 max_num_sg) 3018 { 3019 int status; 3020 struct ocrdma_mr *mr; 3021 struct ocrdma_pd *pd = get_ocrdma_pd(ibpd); 3022 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device); 3023 3024 if (mr_type != IB_MR_TYPE_MEM_REG) 3025 return ERR_PTR(-EINVAL); 3026 3027 if (max_num_sg > dev->attr.max_pages_per_frmr) 3028 return ERR_PTR(-EINVAL); 3029 3030 mr = kzalloc(sizeof(*mr), GFP_KERNEL); 3031 if (!mr) 3032 return ERR_PTR(-ENOMEM); 3033 3034 mr->pages = kcalloc(max_num_sg, sizeof(u64), GFP_KERNEL); 3035 if (!mr->pages) { 3036 status = -ENOMEM; 3037 goto pl_err; 3038 } 3039 3040 status = ocrdma_get_pbl_info(dev, mr, max_num_sg); 3041 if (status) 3042 goto pbl_err; 3043 mr->hwmr.fr_mr = 1; 3044 mr->hwmr.remote_rd = 0; 3045 mr->hwmr.remote_wr = 0; 3046 mr->hwmr.local_rd = 0; 3047 mr->hwmr.local_wr = 0; 3048 mr->hwmr.mw_bind = 0; 3049 status = ocrdma_build_pbl_tbl(dev, &mr->hwmr); 3050 if (status) 3051 goto pbl_err; 3052 status = ocrdma_reg_mr(dev, &mr->hwmr, pd->id, 0); 3053 if (status) 3054 goto mbx_err; 3055 mr->ibmr.rkey = mr->hwmr.lkey; 3056 mr->ibmr.lkey = mr->hwmr.lkey; 3057 dev->stag_arr[(mr->hwmr.lkey >> 8) & (OCRDMA_MAX_STAG - 1)] = 3058 (unsigned long) mr; 3059 return &mr->ibmr; 3060 mbx_err: 3061 ocrdma_free_mr_pbl_tbl(dev, &mr->hwmr); 3062 pbl_err: 3063 kfree(mr->pages); 3064 pl_err: 3065 kfree(mr); 3066 return ERR_PTR(-ENOMEM); 3067 } 3068 3069 #define MAX_KERNEL_PBE_SIZE 65536 3070 static inline int count_kernel_pbes(struct ib_phys_buf *buf_list, 3071 int buf_cnt, u32 *pbe_size) 3072 { 3073 u64 total_size = 0; 3074 u64 buf_size = 0; 3075 int i; 3076 *pbe_size = roundup(buf_list[0].size, PAGE_SIZE); 3077 *pbe_size = roundup_pow_of_two(*pbe_size); 3078 3079 /* find the smallest PBE size that we can have */ 3080 for (i = 0; i < buf_cnt; i++) { 3081 /* first addr may not be page aligned, so ignore checking */ 3082 if ((i != 0) && ((buf_list[i].addr & ~PAGE_MASK) || 3083 (buf_list[i].size & ~PAGE_MASK))) { 3084 return 0; 3085 } 3086 3087 /* if configured PBE size is greater then the chosen one, 3088 * reduce the PBE size. 3089 */ 3090 buf_size = roundup(buf_list[i].size, PAGE_SIZE); 3091 /* pbe_size has to be even multiple of 4K 1,2,4,8...*/ 3092 buf_size = roundup_pow_of_two(buf_size); 3093 if (*pbe_size > buf_size) 3094 *pbe_size = buf_size; 3095 3096 total_size += buf_size; 3097 } 3098 *pbe_size = *pbe_size > MAX_KERNEL_PBE_SIZE ? 3099 (MAX_KERNEL_PBE_SIZE) : (*pbe_size); 3100 3101 /* num_pbes = total_size / (*pbe_size); this is implemented below. */ 3102 3103 return total_size >> ilog2(*pbe_size); 3104 } 3105 3106 static void build_kernel_pbes(struct ib_phys_buf *buf_list, int ib_buf_cnt, 3107 u32 pbe_size, struct ocrdma_pbl *pbl_tbl, 3108 struct ocrdma_hw_mr *hwmr) 3109 { 3110 int i; 3111 int idx; 3112 int pbes_per_buf = 0; 3113 u64 buf_addr = 0; 3114 int num_pbes; 3115 struct ocrdma_pbe *pbe; 3116 int total_num_pbes = 0; 3117 3118 if (!hwmr->num_pbes) 3119 return; 3120 3121 pbe = (struct ocrdma_pbe *)pbl_tbl->va; 3122 num_pbes = 0; 3123 3124 /* go through the OS phy regions & fill hw pbe entries into pbls. */ 3125 for (i = 0; i < ib_buf_cnt; i++) { 3126 buf_addr = buf_list[i].addr; 3127 pbes_per_buf = 3128 roundup_pow_of_two(roundup(buf_list[i].size, PAGE_SIZE)) / 3129 pbe_size; 3130 hwmr->len += buf_list[i].size; 3131 /* number of pbes can be more for one OS buf, when 3132 * buffers are of different sizes. 3133 * split the ib_buf to one or more pbes. 3134 */ 3135 for (idx = 0; idx < pbes_per_buf; idx++) { 3136 /* we program always page aligned addresses, 3137 * first unaligned address is taken care by fbo. 3138 */ 3139 if (i == 0) { 3140 /* for non zero fbo, assign the 3141 * start of the page. 3142 */ 3143 pbe->pa_lo = 3144 cpu_to_le32((u32) (buf_addr & PAGE_MASK)); 3145 pbe->pa_hi = 3146 cpu_to_le32((u32) upper_32_bits(buf_addr)); 3147 } else { 3148 pbe->pa_lo = 3149 cpu_to_le32((u32) (buf_addr & 0xffffffff)); 3150 pbe->pa_hi = 3151 cpu_to_le32((u32) upper_32_bits(buf_addr)); 3152 } 3153 buf_addr += pbe_size; 3154 num_pbes += 1; 3155 total_num_pbes += 1; 3156 pbe++; 3157 3158 if (total_num_pbes == hwmr->num_pbes) 3159 goto mr_tbl_done; 3160 /* if the pbl is full storing the pbes, 3161 * move to next pbl. 3162 */ 3163 if (num_pbes == (hwmr->pbl_size/sizeof(u64))) { 3164 pbl_tbl++; 3165 pbe = (struct ocrdma_pbe *)pbl_tbl->va; 3166 num_pbes = 0; 3167 } 3168 } 3169 } 3170 mr_tbl_done: 3171 return; 3172 } 3173 3174 struct ib_mr *ocrdma_reg_kernel_mr(struct ib_pd *ibpd, 3175 struct ib_phys_buf *buf_list, 3176 int buf_cnt, int acc, u64 *iova_start) 3177 { 3178 int status = -ENOMEM; 3179 struct ocrdma_mr *mr; 3180 struct ocrdma_pd *pd = get_ocrdma_pd(ibpd); 3181 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device); 3182 u32 num_pbes; 3183 u32 pbe_size = 0; 3184 3185 if ((acc & IB_ACCESS_REMOTE_WRITE) && !(acc & IB_ACCESS_LOCAL_WRITE)) 3186 return ERR_PTR(-EINVAL); 3187 3188 mr = kzalloc(sizeof(*mr), GFP_KERNEL); 3189 if (!mr) 3190 return ERR_PTR(status); 3191 3192 num_pbes = count_kernel_pbes(buf_list, buf_cnt, &pbe_size); 3193 if (num_pbes == 0) { 3194 status = -EINVAL; 3195 goto pbl_err; 3196 } 3197 status = ocrdma_get_pbl_info(dev, mr, num_pbes); 3198 if (status) 3199 goto pbl_err; 3200 3201 mr->hwmr.pbe_size = pbe_size; 3202 mr->hwmr.fbo = *iova_start - (buf_list[0].addr & PAGE_MASK); 3203 mr->hwmr.va = *iova_start; 3204 mr->hwmr.local_rd = 1; 3205 mr->hwmr.remote_wr = (acc & IB_ACCESS_REMOTE_WRITE) ? 1 : 0; 3206 mr->hwmr.remote_rd = (acc & IB_ACCESS_REMOTE_READ) ? 1 : 0; 3207 mr->hwmr.local_wr = (acc & IB_ACCESS_LOCAL_WRITE) ? 1 : 0; 3208 mr->hwmr.remote_atomic = (acc & IB_ACCESS_REMOTE_ATOMIC) ? 1 : 0; 3209 mr->hwmr.mw_bind = (acc & IB_ACCESS_MW_BIND) ? 1 : 0; 3210 3211 status = ocrdma_build_pbl_tbl(dev, &mr->hwmr); 3212 if (status) 3213 goto pbl_err; 3214 build_kernel_pbes(buf_list, buf_cnt, pbe_size, mr->hwmr.pbl_table, 3215 &mr->hwmr); 3216 status = ocrdma_reg_mr(dev, &mr->hwmr, pd->id, acc); 3217 if (status) 3218 goto mbx_err; 3219 3220 mr->ibmr.lkey = mr->hwmr.lkey; 3221 if (mr->hwmr.remote_wr || mr->hwmr.remote_rd) 3222 mr->ibmr.rkey = mr->hwmr.lkey; 3223 return &mr->ibmr; 3224 3225 mbx_err: 3226 ocrdma_free_mr_pbl_tbl(dev, &mr->hwmr); 3227 pbl_err: 3228 kfree(mr); 3229 return ERR_PTR(status); 3230 } 3231 3232 static int ocrdma_set_page(struct ib_mr *ibmr, u64 addr) 3233 { 3234 struct ocrdma_mr *mr = get_ocrdma_mr(ibmr); 3235 3236 if (unlikely(mr->npages == mr->hwmr.num_pbes)) 3237 return -ENOMEM; 3238 3239 mr->pages[mr->npages++] = addr; 3240 3241 return 0; 3242 } 3243 3244 int ocrdma_map_mr_sg(struct ib_mr *ibmr, 3245 struct scatterlist *sg, 3246 int sg_nents) 3247 { 3248 struct ocrdma_mr *mr = get_ocrdma_mr(ibmr); 3249 3250 mr->npages = 0; 3251 3252 return ib_sg_to_pages(ibmr, sg, sg_nents, ocrdma_set_page); 3253 } 3254