1fe2caefcSParav Pandit /******************************************************************* 2fe2caefcSParav Pandit * This file is part of the Emulex RoCE Device Driver for * 3fe2caefcSParav Pandit * RoCE (RDMA over Converged Ethernet) adapters. * 4fe2caefcSParav Pandit * Copyright (C) 2008-2012 Emulex. All rights reserved. * 5fe2caefcSParav Pandit * EMULEX and SLI are trademarks of Emulex. * 6fe2caefcSParav Pandit * www.emulex.com * 7fe2caefcSParav Pandit * * 8fe2caefcSParav Pandit * This program is free software; you can redistribute it and/or * 9fe2caefcSParav Pandit * modify it under the terms of version 2 of the GNU General * 10fe2caefcSParav Pandit * Public License as published by the Free Software Foundation. * 11fe2caefcSParav Pandit * This program is distributed in the hope that it will be useful. * 12fe2caefcSParav Pandit * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND * 13fe2caefcSParav Pandit * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, * 14fe2caefcSParav Pandit * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE * 15fe2caefcSParav Pandit * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD * 16fe2caefcSParav Pandit * TO BE LEGALLY INVALID. See the GNU General Public License for * 17fe2caefcSParav Pandit * more details, a copy of which can be found in the file COPYING * 18fe2caefcSParav Pandit * included with this package. * 19fe2caefcSParav Pandit * 20fe2caefcSParav Pandit * Contact Information: 21fe2caefcSParav Pandit * linux-drivers@emulex.com 22fe2caefcSParav Pandit * 23fe2caefcSParav Pandit * Emulex 24fe2caefcSParav Pandit * 3333 Susan Street 25fe2caefcSParav Pandit * Costa Mesa, CA 92626 26fe2caefcSParav Pandit *******************************************************************/ 27fe2caefcSParav Pandit 28fe2caefcSParav Pandit #ifndef __OCRDMA_SLI_H__ 29fe2caefcSParav Pandit #define __OCRDMA_SLI_H__ 30fe2caefcSParav Pandit 3121c3391aSDevesh Sharma enum { 3221c3391aSDevesh Sharma OCRDMA_ASIC_GEN_SKH_R = 0x04, 3321c3391aSDevesh Sharma OCRDMA_ASIC_GEN_LANCER = 0x0B 3421c3391aSDevesh Sharma }; 3521c3391aSDevesh Sharma 3621c3391aSDevesh Sharma enum { 3721c3391aSDevesh Sharma OCRDMA_ASIC_REV_A0 = 0x00, 3821c3391aSDevesh Sharma OCRDMA_ASIC_REV_B0 = 0x10, 3921c3391aSDevesh Sharma OCRDMA_ASIC_REV_C0 = 0x20 4021c3391aSDevesh Sharma }; 41fe2caefcSParav Pandit 42fe2caefcSParav Pandit #define OCRDMA_SUBSYS_ROCE 10 43fe2caefcSParav Pandit enum { 44fe2caefcSParav Pandit OCRDMA_CMD_QUERY_CONFIG = 1, 45920de55dSSelvin Xavier OCRDMA_CMD_ALLOC_PD = 2, 46920de55dSSelvin Xavier OCRDMA_CMD_DEALLOC_PD = 3, 47fe2caefcSParav Pandit 48920de55dSSelvin Xavier OCRDMA_CMD_CREATE_AH_TBL = 4, 49920de55dSSelvin Xavier OCRDMA_CMD_DELETE_AH_TBL = 5, 50fe2caefcSParav Pandit 51920de55dSSelvin Xavier OCRDMA_CMD_CREATE_QP = 6, 52920de55dSSelvin Xavier OCRDMA_CMD_QUERY_QP = 7, 53920de55dSSelvin Xavier OCRDMA_CMD_MODIFY_QP = 8 , 54920de55dSSelvin Xavier OCRDMA_CMD_DELETE_QP = 9, 55fe2caefcSParav Pandit 56920de55dSSelvin Xavier OCRDMA_CMD_RSVD1 = 10, 57920de55dSSelvin Xavier OCRDMA_CMD_ALLOC_LKEY = 11, 58920de55dSSelvin Xavier OCRDMA_CMD_DEALLOC_LKEY = 12, 59920de55dSSelvin Xavier OCRDMA_CMD_REGISTER_NSMR = 13, 60920de55dSSelvin Xavier OCRDMA_CMD_REREGISTER_NSMR = 14, 61920de55dSSelvin Xavier OCRDMA_CMD_REGISTER_NSMR_CONT = 15, 62920de55dSSelvin Xavier OCRDMA_CMD_QUERY_NSMR = 16, 63920de55dSSelvin Xavier OCRDMA_CMD_ALLOC_MW = 17, 64920de55dSSelvin Xavier OCRDMA_CMD_QUERY_MW = 18, 65fe2caefcSParav Pandit 66920de55dSSelvin Xavier OCRDMA_CMD_CREATE_SRQ = 19, 67920de55dSSelvin Xavier OCRDMA_CMD_QUERY_SRQ = 20, 68920de55dSSelvin Xavier OCRDMA_CMD_MODIFY_SRQ = 21, 69920de55dSSelvin Xavier OCRDMA_CMD_DELETE_SRQ = 22, 70fe2caefcSParav Pandit 71920de55dSSelvin Xavier OCRDMA_CMD_ATTACH_MCAST = 23, 72920de55dSSelvin Xavier OCRDMA_CMD_DETACH_MCAST = 24, 73920de55dSSelvin Xavier 74920de55dSSelvin Xavier OCRDMA_CMD_CREATE_RBQ = 25, 75920de55dSSelvin Xavier OCRDMA_CMD_DESTROY_RBQ = 26, 76920de55dSSelvin Xavier 77920de55dSSelvin Xavier OCRDMA_CMD_GET_RDMA_STATS = 27, 789ba1377dSMitesh Ahuja OCRDMA_CMD_ALLOC_PD_RANGE = 28, 799ba1377dSMitesh Ahuja OCRDMA_CMD_DEALLOC_PD_RANGE = 29, 80fe2caefcSParav Pandit 81fe2caefcSParav Pandit OCRDMA_CMD_MAX 82fe2caefcSParav Pandit }; 83fe2caefcSParav Pandit 84fe2caefcSParav Pandit #define OCRDMA_SUBSYS_COMMON 1 85fe2caefcSParav Pandit enum { 86f24ceba6SNaresh Gottumukkala OCRDMA_CMD_QUERY_NTWK_LINK_CONFIG_V1 = 5, 87fe2caefcSParav Pandit OCRDMA_CMD_CREATE_CQ = 12, 88fe2caefcSParav Pandit OCRDMA_CMD_CREATE_EQ = 13, 89fe2caefcSParav Pandit OCRDMA_CMD_CREATE_MQ = 21, 90a51f06e1SSelvin Xavier OCRDMA_CMD_GET_CTRL_ATTRIBUTES = 32, 91fe2caefcSParav Pandit OCRDMA_CMD_GET_FW_VER = 35, 92fe2caefcSParav Pandit OCRDMA_CMD_DELETE_MQ = 53, 93fe2caefcSParav Pandit OCRDMA_CMD_DELETE_CQ = 54, 94fe2caefcSParav Pandit OCRDMA_CMD_DELETE_EQ = 55, 95fe2caefcSParav Pandit OCRDMA_CMD_GET_FW_CONFIG = 58, 96a51f06e1SSelvin Xavier OCRDMA_CMD_CREATE_MQ_EXT = 90, 97a51f06e1SSelvin Xavier OCRDMA_CMD_PHY_DETAILS = 102 98fe2caefcSParav Pandit }; 99fe2caefcSParav Pandit 100fe2caefcSParav Pandit enum { 101fe2caefcSParav Pandit QTYPE_EQ = 1, 102fe2caefcSParav Pandit QTYPE_CQ = 2, 103fe2caefcSParav Pandit QTYPE_MCCQ = 3 104fe2caefcSParav Pandit }; 105fe2caefcSParav Pandit 106978cb6a4SMitesh Ahuja #define OCRDMA_MAX_SGID 16 107fe2caefcSParav Pandit 108fe2caefcSParav Pandit #define OCRDMA_MAX_QP 2048 109fe2caefcSParav Pandit #define OCRDMA_MAX_CQ 2048 1104f1df844SSelvin Xavier #define OCRDMA_MAX_STAG 16384 111fe2caefcSParav Pandit 112fe2caefcSParav Pandit enum { 113fe2caefcSParav Pandit OCRDMA_DB_RQ_OFFSET = 0xE0, 114f11220eeSNaresh Gottumukkala OCRDMA_DB_GEN2_RQ_OFFSET = 0x100, 115fe2caefcSParav Pandit OCRDMA_DB_SQ_OFFSET = 0x60, 116fe2caefcSParav Pandit OCRDMA_DB_GEN2_SQ_OFFSET = 0x1C0, 117fe2caefcSParav Pandit OCRDMA_DB_SRQ_OFFSET = OCRDMA_DB_RQ_OFFSET, 118f11220eeSNaresh Gottumukkala OCRDMA_DB_GEN2_SRQ_OFFSET = OCRDMA_DB_GEN2_RQ_OFFSET, 119fe2caefcSParav Pandit OCRDMA_DB_CQ_OFFSET = 0x120, 120fe2caefcSParav Pandit OCRDMA_DB_EQ_OFFSET = OCRDMA_DB_CQ_OFFSET, 1212df84fa8SDevesh Sharma OCRDMA_DB_MQ_OFFSET = 0x140, 1222df84fa8SDevesh Sharma 1232df84fa8SDevesh Sharma OCRDMA_DB_SQ_SHIFT = 16, 1242df84fa8SDevesh Sharma OCRDMA_DB_RQ_SHIFT = 24 125fe2caefcSParav Pandit }; 126fe2caefcSParav Pandit 127fe2caefcSParav Pandit #define OCRDMA_DB_CQ_RING_ID_MASK 0x3FF /* bits 0 - 9 */ 128fe2caefcSParav Pandit #define OCRDMA_DB_CQ_RING_ID_EXT_MASK 0x0C00 /* bits 10-11 of qid at 12-11 */ 129fe2caefcSParav Pandit /* qid #2 msbits at 12-11 */ 130fe2caefcSParav Pandit #define OCRDMA_DB_CQ_RING_ID_EXT_MASK_SHIFT 0x1 13105df7805SJes Sorensen #define OCRDMA_DB_CQ_NUM_POPPED_SHIFT 16 /* bits 16 - 28 */ 132fe2caefcSParav Pandit /* Rearm bit */ 13305df7805SJes Sorensen #define OCRDMA_DB_CQ_REARM_SHIFT 29 /* bit 29 */ 134fe2caefcSParav Pandit /* solicited bit */ 13505df7805SJes Sorensen #define OCRDMA_DB_CQ_SOLICIT_SHIFT 31 /* bit 31 */ 136fe2caefcSParav Pandit 137fe2caefcSParav Pandit #define OCRDMA_EQ_ID_MASK 0x1FF /* bits 0 - 8 */ 138fe2caefcSParav Pandit #define OCRDMA_EQ_ID_EXT_MASK 0x3e00 /* bits 9-13 */ 13905df7805SJes Sorensen #define OCRDMA_EQ_ID_EXT_MASK_SHIFT 2 /* qid bits 9-13 at 11-15 */ 140fe2caefcSParav Pandit 141fe2caefcSParav Pandit /* Clear the interrupt for this eq */ 14205df7805SJes Sorensen #define OCRDMA_EQ_CLR_SHIFT 9 /* bit 9 */ 143fe2caefcSParav Pandit /* Must be 1 */ 14405df7805SJes Sorensen #define OCRDMA_EQ_TYPE_SHIFT 10 /* bit 10 */ 145fe2caefcSParav Pandit /* Number of event entries processed */ 14605df7805SJes Sorensen #define OCRDMA_NUM_EQE_SHIFT 16 /* bits 16 - 28 */ 147fe2caefcSParav Pandit /* Rearm bit */ 14805df7805SJes Sorensen #define OCRDMA_REARM_SHIFT 29 /* bit 29 */ 149fe2caefcSParav Pandit 150fe2caefcSParav Pandit #define OCRDMA_MQ_ID_MASK 0x7FF /* bits 0 - 10 */ 151fe2caefcSParav Pandit /* Number of entries posted */ 15205df7805SJes Sorensen #define OCRDMA_MQ_NUM_MQE_SHIFT 16 /* bits 16 - 29 */ 153fe2caefcSParav Pandit 15405df7805SJes Sorensen #define OCRDMA_MIN_HPAGE_SIZE 4096 155fe2caefcSParav Pandit 15605df7805SJes Sorensen #define OCRDMA_MIN_Q_PAGE_SIZE 4096 15705df7805SJes Sorensen #define OCRDMA_MAX_Q_PAGES 8 158fe2caefcSParav Pandit 15921c3391aSDevesh Sharma #define OCRDMA_SLI_ASIC_ID_OFFSET 0x9C 16021c3391aSDevesh Sharma #define OCRDMA_SLI_ASIC_REV_MASK 0x000000FF 16121c3391aSDevesh Sharma #define OCRDMA_SLI_ASIC_GEN_NUM_MASK 0x0000FF00 16221c3391aSDevesh Sharma #define OCRDMA_SLI_ASIC_GEN_NUM_SHIFT 0x08 163fe2caefcSParav Pandit /* 164fe2caefcSParav Pandit # 0: 4K Bytes 165fe2caefcSParav Pandit # 1: 8K Bytes 166fe2caefcSParav Pandit # 2: 16K Bytes 167fe2caefcSParav Pandit # 3: 32K Bytes 168fe2caefcSParav Pandit # 4: 64K Bytes 1692b51a9b9SNaresh Gottumukkala # 5: 128K Bytes 1702b51a9b9SNaresh Gottumukkala # 6: 256K Bytes 1712b51a9b9SNaresh Gottumukkala # 7: 512K Bytes 172fe2caefcSParav Pandit */ 17305df7805SJes Sorensen #define OCRDMA_MAX_Q_PAGE_SIZE_CNT 8 174fe2caefcSParav Pandit #define OCRDMA_Q_PAGE_BASE_SIZE (OCRDMA_MIN_Q_PAGE_SIZE * OCRDMA_MAX_Q_PAGES) 175fe2caefcSParav Pandit 17605df7805SJes Sorensen #define MAX_OCRDMA_QP_PAGES 8 177fe2caefcSParav Pandit #define OCRDMA_MAX_WQE_MEM_SIZE (MAX_OCRDMA_QP_PAGES * OCRDMA_MIN_HQ_PAGE_SIZE) 178fe2caefcSParav Pandit 17905df7805SJes Sorensen #define OCRDMA_CREATE_CQ_MAX_PAGES 4 18005df7805SJes Sorensen #define OCRDMA_DPP_CQE_SIZE 4 181fe2caefcSParav Pandit 182fe2caefcSParav Pandit #define OCRDMA_GEN2_MAX_CQE 1024 183fe2caefcSParav Pandit #define OCRDMA_GEN2_CQ_PAGE_SIZE 4096 184fe2caefcSParav Pandit #define OCRDMA_GEN2_WQE_SIZE 256 185fe2caefcSParav Pandit #define OCRDMA_MAX_CQE 4095 186fe2caefcSParav Pandit #define OCRDMA_CQ_PAGE_SIZE 16384 187fe2caefcSParav Pandit #define OCRDMA_WQE_SIZE 128 188fe2caefcSParav Pandit #define OCRDMA_WQE_STRIDE 8 189fe2caefcSParav Pandit #define OCRDMA_WQE_ALIGN_BYTES 16 190fe2caefcSParav Pandit 191fe2caefcSParav Pandit #define MAX_OCRDMA_SRQ_PAGES MAX_OCRDMA_QP_PAGES 192fe2caefcSParav Pandit 193fe2caefcSParav Pandit enum { 194fe2caefcSParav Pandit OCRDMA_MCH_OPCODE_SHIFT = 0, 195fe2caefcSParav Pandit OCRDMA_MCH_OPCODE_MASK = 0xFF, 196fe2caefcSParav Pandit OCRDMA_MCH_SUBSYS_SHIFT = 8, 197fe2caefcSParav Pandit OCRDMA_MCH_SUBSYS_MASK = 0xFF00 198fe2caefcSParav Pandit }; 199fe2caefcSParav Pandit 200fe2caefcSParav Pandit /* mailbox cmd header */ 201fe2caefcSParav Pandit struct ocrdma_mbx_hdr { 202fe2caefcSParav Pandit u32 subsys_op; 203fe2caefcSParav Pandit u32 timeout; /* in seconds */ 204fe2caefcSParav Pandit u32 cmd_len; 205fe2caefcSParav Pandit u32 rsvd_version; 2067b9b1a59SNaresh Gottumukkala }; 207fe2caefcSParav Pandit 208fe2caefcSParav Pandit enum { 209fe2caefcSParav Pandit OCRDMA_MBX_RSP_OPCODE_SHIFT = 0, 210fe2caefcSParav Pandit OCRDMA_MBX_RSP_OPCODE_MASK = 0xFF, 211fe2caefcSParav Pandit OCRDMA_MBX_RSP_SUBSYS_SHIFT = 8, 212fe2caefcSParav Pandit OCRDMA_MBX_RSP_SUBSYS_MASK = 0xFF << OCRDMA_MBX_RSP_SUBSYS_SHIFT, 213fe2caefcSParav Pandit 214fe2caefcSParav Pandit OCRDMA_MBX_RSP_STATUS_SHIFT = 0, 215fe2caefcSParav Pandit OCRDMA_MBX_RSP_STATUS_MASK = 0xFF, 216fe2caefcSParav Pandit OCRDMA_MBX_RSP_ASTATUS_SHIFT = 8, 217fe2caefcSParav Pandit OCRDMA_MBX_RSP_ASTATUS_MASK = 0xFF << OCRDMA_MBX_RSP_ASTATUS_SHIFT 218fe2caefcSParav Pandit }; 219fe2caefcSParav Pandit 220fe2caefcSParav Pandit /* mailbox cmd response */ 221fe2caefcSParav Pandit struct ocrdma_mbx_rsp { 222fe2caefcSParav Pandit u32 subsys_op; 223fe2caefcSParav Pandit u32 status; 224fe2caefcSParav Pandit u32 rsp_len; 225fe2caefcSParav Pandit u32 add_rsp_len; 2267b9b1a59SNaresh Gottumukkala }; 227fe2caefcSParav Pandit 228fe2caefcSParav Pandit enum { 229fe2caefcSParav Pandit OCRDMA_MQE_EMBEDDED = 1, 230fe2caefcSParav Pandit OCRDMA_MQE_NONEMBEDDED = 0 231fe2caefcSParav Pandit }; 232fe2caefcSParav Pandit 233fe2caefcSParav Pandit struct ocrdma_mqe_sge { 234fe2caefcSParav Pandit u32 pa_lo; 235fe2caefcSParav Pandit u32 pa_hi; 236fe2caefcSParav Pandit u32 len; 2377b9b1a59SNaresh Gottumukkala }; 238fe2caefcSParav Pandit 239fe2caefcSParav Pandit enum { 240fe2caefcSParav Pandit OCRDMA_MQE_HDR_EMB_SHIFT = 0, 241de123485SJes Sorensen OCRDMA_MQE_HDR_EMB_MASK = BIT(0), 242fe2caefcSParav Pandit OCRDMA_MQE_HDR_SGE_CNT_SHIFT = 3, 243fe2caefcSParav Pandit OCRDMA_MQE_HDR_SGE_CNT_MASK = 0x1F << OCRDMA_MQE_HDR_SGE_CNT_SHIFT, 244fe2caefcSParav Pandit OCRDMA_MQE_HDR_SPECIAL_SHIFT = 24, 245fe2caefcSParav Pandit OCRDMA_MQE_HDR_SPECIAL_MASK = 0xFF << OCRDMA_MQE_HDR_SPECIAL_SHIFT 246fe2caefcSParav Pandit }; 247fe2caefcSParav Pandit 248fe2caefcSParav Pandit struct ocrdma_mqe_hdr { 249fe2caefcSParav Pandit u32 spcl_sge_cnt_emb; 250fe2caefcSParav Pandit u32 pyld_len; 251fe2caefcSParav Pandit u32 tag_lo; 252fe2caefcSParav Pandit u32 tag_hi; 253fe2caefcSParav Pandit u32 rsvd3; 2547b9b1a59SNaresh Gottumukkala }; 255fe2caefcSParav Pandit 256fe2caefcSParav Pandit struct ocrdma_mqe_emb_cmd { 257fe2caefcSParav Pandit struct ocrdma_mbx_hdr mch; 258fe2caefcSParav Pandit u8 pyld[220]; 2597b9b1a59SNaresh Gottumukkala }; 260fe2caefcSParav Pandit 261fe2caefcSParav Pandit struct ocrdma_mqe { 262fe2caefcSParav Pandit struct ocrdma_mqe_hdr hdr; 263fe2caefcSParav Pandit union { 264fe2caefcSParav Pandit struct ocrdma_mqe_emb_cmd emb_req; 265fe2caefcSParav Pandit struct { 266fe2caefcSParav Pandit struct ocrdma_mqe_sge sge[19]; 267fe2caefcSParav Pandit } nonemb_req; 268fe2caefcSParav Pandit u8 cmd[236]; 269fe2caefcSParav Pandit struct ocrdma_mbx_rsp rsp; 270fe2caefcSParav Pandit } u; 2717b9b1a59SNaresh Gottumukkala }; 272fe2caefcSParav Pandit 273fe2caefcSParav Pandit #define OCRDMA_EQ_LEN 4096 274fe2caefcSParav Pandit #define OCRDMA_MQ_CQ_LEN 256 275fe2caefcSParav Pandit #define OCRDMA_MQ_LEN 128 276fe2caefcSParav Pandit 277fe2caefcSParav Pandit #define PAGE_SHIFT_4K 12 278fe2caefcSParav Pandit #define PAGE_SIZE_4K (1 << PAGE_SHIFT_4K) 279fe2caefcSParav Pandit 280fe2caefcSParav Pandit /* Returns number of pages spanned by the data starting at the given addr */ 281fe2caefcSParav Pandit #define PAGES_4K_SPANNED(_address, size) \ 282fe2caefcSParav Pandit ((u32)((((size_t)(_address) & (PAGE_SIZE_4K - 1)) + \ 283fe2caefcSParav Pandit (size) + (PAGE_SIZE_4K - 1)) >> PAGE_SHIFT_4K)) 284fe2caefcSParav Pandit 285fe2caefcSParav Pandit struct ocrdma_delete_q_req { 286fe2caefcSParav Pandit struct ocrdma_mbx_hdr req; 287fe2caefcSParav Pandit u32 id; 2887b9b1a59SNaresh Gottumukkala }; 289fe2caefcSParav Pandit 290fe2caefcSParav Pandit struct ocrdma_pa { 291fe2caefcSParav Pandit u32 lo; 292fe2caefcSParav Pandit u32 hi; 2937b9b1a59SNaresh Gottumukkala }; 294fe2caefcSParav Pandit 29505df7805SJes Sorensen #define MAX_OCRDMA_EQ_PAGES 8 296fe2caefcSParav Pandit struct ocrdma_create_eq_req { 297fe2caefcSParav Pandit struct ocrdma_mbx_hdr req; 298fe2caefcSParav Pandit u32 num_pages; 299fe2caefcSParav Pandit u32 valid; 300fe2caefcSParav Pandit u32 cnt; 301fe2caefcSParav Pandit u32 delay; 302fe2caefcSParav Pandit u32 rsvd; 303fe2caefcSParav Pandit struct ocrdma_pa pa[MAX_OCRDMA_EQ_PAGES]; 3047b9b1a59SNaresh Gottumukkala }; 305fe2caefcSParav Pandit 306fe2caefcSParav Pandit enum { 307de123485SJes Sorensen OCRDMA_CREATE_EQ_VALID = BIT(29), 308fe2caefcSParav Pandit OCRDMA_CREATE_EQ_CNT_SHIFT = 26, 309fe2caefcSParav Pandit OCRDMA_CREATE_CQ_DELAY_SHIFT = 13, 310fe2caefcSParav Pandit }; 311fe2caefcSParav Pandit 312fe2caefcSParav Pandit struct ocrdma_create_eq_rsp { 313fe2caefcSParav Pandit struct ocrdma_mbx_rsp rsp; 314fe2caefcSParav Pandit u32 vector_eqid; 315fe2caefcSParav Pandit }; 316fe2caefcSParav Pandit 31705df7805SJes Sorensen #define OCRDMA_EQ_MINOR_OTHER 0x1 318fe2caefcSParav Pandit 319fe2caefcSParav Pandit enum { 320fe2caefcSParav Pandit OCRDMA_MCQE_STATUS_SHIFT = 0, 321fe2caefcSParav Pandit OCRDMA_MCQE_STATUS_MASK = 0xFFFF, 322fe2caefcSParav Pandit OCRDMA_MCQE_ESTATUS_SHIFT = 16, 323fe2caefcSParav Pandit OCRDMA_MCQE_ESTATUS_MASK = 0xFFFF << OCRDMA_MCQE_ESTATUS_SHIFT, 324fe2caefcSParav Pandit OCRDMA_MCQE_CONS_SHIFT = 27, 325de123485SJes Sorensen OCRDMA_MCQE_CONS_MASK = BIT(27), 326fe2caefcSParav Pandit OCRDMA_MCQE_CMPL_SHIFT = 28, 327de123485SJes Sorensen OCRDMA_MCQE_CMPL_MASK = BIT(28), 328fe2caefcSParav Pandit OCRDMA_MCQE_AE_SHIFT = 30, 329de123485SJes Sorensen OCRDMA_MCQE_AE_MASK = BIT(30), 330fe2caefcSParav Pandit OCRDMA_MCQE_VALID_SHIFT = 31, 331de123485SJes Sorensen OCRDMA_MCQE_VALID_MASK = BIT(31) 332fe2caefcSParav Pandit }; 333fe2caefcSParav Pandit 334fe2caefcSParav Pandit struct ocrdma_mcqe { 335fe2caefcSParav Pandit u32 status; 336fe2caefcSParav Pandit u32 tag_lo; 337fe2caefcSParav Pandit u32 tag_hi; 338fe2caefcSParav Pandit u32 valid_ae_cmpl_cons; 3397b9b1a59SNaresh Gottumukkala }; 340fe2caefcSParav Pandit 341fe2caefcSParav Pandit enum { 342de123485SJes Sorensen OCRDMA_AE_MCQE_QPVALID = BIT(31), 343fe2caefcSParav Pandit OCRDMA_AE_MCQE_QPID_MASK = 0xFFFF, 344fe2caefcSParav Pandit 345de123485SJes Sorensen OCRDMA_AE_MCQE_CQVALID = BIT(31), 346fe2caefcSParav Pandit OCRDMA_AE_MCQE_CQID_MASK = 0xFFFF, 347de123485SJes Sorensen OCRDMA_AE_MCQE_VALID = BIT(31), 348de123485SJes Sorensen OCRDMA_AE_MCQE_AE = BIT(30), 349fe2caefcSParav Pandit OCRDMA_AE_MCQE_EVENT_TYPE_SHIFT = 16, 350fe2caefcSParav Pandit OCRDMA_AE_MCQE_EVENT_TYPE_MASK = 351fe2caefcSParav Pandit 0xFF << OCRDMA_AE_MCQE_EVENT_TYPE_SHIFT, 352fe2caefcSParav Pandit OCRDMA_AE_MCQE_EVENT_CODE_SHIFT = 8, 353fe2caefcSParav Pandit OCRDMA_AE_MCQE_EVENT_CODE_MASK = 354fe2caefcSParav Pandit 0xFF << OCRDMA_AE_MCQE_EVENT_CODE_SHIFT 355fe2caefcSParav Pandit }; 356fe2caefcSParav Pandit struct ocrdma_ae_mcqe { 357fe2caefcSParav Pandit u32 qpvalid_qpid; 358fe2caefcSParav Pandit u32 cqvalid_cqid; 359fe2caefcSParav Pandit u32 evt_tag; 360fe2caefcSParav Pandit u32 valid_ae_event; 3617b9b1a59SNaresh Gottumukkala }; 362fe2caefcSParav Pandit 363fe2caefcSParav Pandit enum { 36484b105dbSNaresh Gottumukkala OCRDMA_AE_PVID_MCQE_ENABLED_SHIFT = 0, 36584b105dbSNaresh Gottumukkala OCRDMA_AE_PVID_MCQE_ENABLED_MASK = 0xFF, 36684b105dbSNaresh Gottumukkala OCRDMA_AE_PVID_MCQE_TAG_SHIFT = 16, 36784b105dbSNaresh Gottumukkala OCRDMA_AE_PVID_MCQE_TAG_MASK = 0xFFFF << OCRDMA_AE_PVID_MCQE_TAG_SHIFT 36884b105dbSNaresh Gottumukkala }; 36984b105dbSNaresh Gottumukkala 37084b105dbSNaresh Gottumukkala struct ocrdma_ae_pvid_mcqe { 37184b105dbSNaresh Gottumukkala u32 tag_enabled; 37284b105dbSNaresh Gottumukkala u32 event_tag; 37384b105dbSNaresh Gottumukkala u32 rsvd1; 37484b105dbSNaresh Gottumukkala u32 rsvd2; 37584b105dbSNaresh Gottumukkala }; 37684b105dbSNaresh Gottumukkala 37784b105dbSNaresh Gottumukkala enum { 378fe2caefcSParav Pandit OCRDMA_AE_MPA_MCQE_REQ_ID_SHIFT = 16, 379fe2caefcSParav Pandit OCRDMA_AE_MPA_MCQE_REQ_ID_MASK = 0xFFFF << 380fe2caefcSParav Pandit OCRDMA_AE_MPA_MCQE_REQ_ID_SHIFT, 381fe2caefcSParav Pandit 382fe2caefcSParav Pandit OCRDMA_AE_MPA_MCQE_EVENT_CODE_SHIFT = 8, 383fe2caefcSParav Pandit OCRDMA_AE_MPA_MCQE_EVENT_CODE_MASK = 0xFF << 384fe2caefcSParav Pandit OCRDMA_AE_MPA_MCQE_EVENT_CODE_SHIFT, 385fe2caefcSParav Pandit OCRDMA_AE_MPA_MCQE_EVENT_TYPE_SHIFT = 16, 386fe2caefcSParav Pandit OCRDMA_AE_MPA_MCQE_EVENT_TYPE_MASK = 0xFF << 387fe2caefcSParav Pandit OCRDMA_AE_MPA_MCQE_EVENT_TYPE_SHIFT, 388fe2caefcSParav Pandit OCRDMA_AE_MPA_MCQE_EVENT_AE_SHIFT = 30, 389de123485SJes Sorensen OCRDMA_AE_MPA_MCQE_EVENT_AE_MASK = BIT(30), 390fe2caefcSParav Pandit OCRDMA_AE_MPA_MCQE_EVENT_VALID_SHIFT = 31, 391de123485SJes Sorensen OCRDMA_AE_MPA_MCQE_EVENT_VALID_MASK = BIT(31) 392fe2caefcSParav Pandit }; 393fe2caefcSParav Pandit 394fe2caefcSParav Pandit struct ocrdma_ae_mpa_mcqe { 395fe2caefcSParav Pandit u32 req_id; 396fe2caefcSParav Pandit u32 w1; 397fe2caefcSParav Pandit u32 w2; 398fe2caefcSParav Pandit u32 valid_ae_event; 3997b9b1a59SNaresh Gottumukkala }; 400fe2caefcSParav Pandit 401fe2caefcSParav Pandit enum { 402fe2caefcSParav Pandit OCRDMA_AE_QP_MCQE_NEW_QP_STATE_SHIFT = 0, 403fe2caefcSParav Pandit OCRDMA_AE_QP_MCQE_NEW_QP_STATE_MASK = 0xFFFF, 404fe2caefcSParav Pandit OCRDMA_AE_QP_MCQE_QP_ID_SHIFT = 16, 405fe2caefcSParav Pandit OCRDMA_AE_QP_MCQE_QP_ID_MASK = 0xFFFF << 406fe2caefcSParav Pandit OCRDMA_AE_QP_MCQE_QP_ID_SHIFT, 407fe2caefcSParav Pandit 408fe2caefcSParav Pandit OCRDMA_AE_QP_MCQE_EVENT_CODE_SHIFT = 8, 409fe2caefcSParav Pandit OCRDMA_AE_QP_MCQE_EVENT_CODE_MASK = 0xFF << 410fe2caefcSParav Pandit OCRDMA_AE_QP_MCQE_EVENT_CODE_SHIFT, 411fe2caefcSParav Pandit OCRDMA_AE_QP_MCQE_EVENT_TYPE_SHIFT = 16, 412fe2caefcSParav Pandit OCRDMA_AE_QP_MCQE_EVENT_TYPE_MASK = 0xFF << 413fe2caefcSParav Pandit OCRDMA_AE_QP_MCQE_EVENT_TYPE_SHIFT, 414fe2caefcSParav Pandit OCRDMA_AE_QP_MCQE_EVENT_AE_SHIFT = 30, 415de123485SJes Sorensen OCRDMA_AE_QP_MCQE_EVENT_AE_MASK = BIT(30), 416fe2caefcSParav Pandit OCRDMA_AE_QP_MCQE_EVENT_VALID_SHIFT = 31, 417de123485SJes Sorensen OCRDMA_AE_QP_MCQE_EVENT_VALID_MASK = BIT(31) 418fe2caefcSParav Pandit }; 419fe2caefcSParav Pandit 420fe2caefcSParav Pandit struct ocrdma_ae_qp_mcqe { 421fe2caefcSParav Pandit u32 qp_id_state; 422fe2caefcSParav Pandit u32 w1; 423fe2caefcSParav Pandit u32 w2; 424fe2caefcSParav Pandit u32 valid_ae_event; 4257b9b1a59SNaresh Gottumukkala }; 426fe2caefcSParav Pandit 42784b105dbSNaresh Gottumukkala #define OCRDMA_ASYNC_RDMA_EVE_CODE 0x14 42884b105dbSNaresh Gottumukkala #define OCRDMA_ASYNC_GRP5_EVE_CODE 0x5 42931dbdd9aSSelvin Xavier 43031dbdd9aSSelvin Xavier enum ocrdma_async_grp5_events { 43131dbdd9aSSelvin Xavier OCRDMA_ASYNC_EVENT_QOS_VALUE = 0x01, 43231dbdd9aSSelvin Xavier OCRDMA_ASYNC_EVENT_COS_VALUE = 0x02, 43331dbdd9aSSelvin Xavier OCRDMA_ASYNC_EVENT_PVID_STATE = 0x03 43431dbdd9aSSelvin Xavier }; 435fe2caefcSParav Pandit 436fe2caefcSParav Pandit enum OCRDMA_ASYNC_EVENT_TYPE { 437fe2caefcSParav Pandit OCRDMA_CQ_ERROR = 0x00, 438fe2caefcSParav Pandit OCRDMA_CQ_OVERRUN_ERROR = 0x01, 439fe2caefcSParav Pandit OCRDMA_CQ_QPCAT_ERROR = 0x02, 440fe2caefcSParav Pandit OCRDMA_QP_ACCESS_ERROR = 0x03, 441fe2caefcSParav Pandit OCRDMA_QP_COMM_EST_EVENT = 0x04, 442fe2caefcSParav Pandit OCRDMA_SQ_DRAINED_EVENT = 0x05, 443fe2caefcSParav Pandit OCRDMA_DEVICE_FATAL_EVENT = 0x08, 444fe2caefcSParav Pandit OCRDMA_SRQCAT_ERROR = 0x0E, 445fe2caefcSParav Pandit OCRDMA_SRQ_LIMIT_EVENT = 0x0F, 446ad56ebb4SSelvin Xavier OCRDMA_QP_LAST_WQE_EVENT = 0x10, 447ad56ebb4SSelvin Xavier 448ad56ebb4SSelvin Xavier OCRDMA_MAX_ASYNC_ERRORS 449fe2caefcSParav Pandit }; 450fe2caefcSParav Pandit 451fe2caefcSParav Pandit /* mailbox command request and responses */ 452fe2caefcSParav Pandit enum { 453fe2caefcSParav Pandit OCRDMA_MBX_QUERY_CFG_CQ_OVERFLOW_SHIFT = 2, 454de123485SJes Sorensen OCRDMA_MBX_QUERY_CFG_CQ_OVERFLOW_MASK = BIT(2), 455fe2caefcSParav Pandit OCRDMA_MBX_QUERY_CFG_SRQ_SUPPORTED_SHIFT = 3, 456de123485SJes Sorensen OCRDMA_MBX_QUERY_CFG_SRQ_SUPPORTED_MASK = BIT(3), 457fe2caefcSParav Pandit OCRDMA_MBX_QUERY_CFG_MAX_QP_SHIFT = 8, 458fe2caefcSParav Pandit OCRDMA_MBX_QUERY_CFG_MAX_QP_MASK = 0xFFFFFF << 459fe2caefcSParav Pandit OCRDMA_MBX_QUERY_CFG_MAX_QP_SHIFT, 460fe2caefcSParav Pandit 461fe2caefcSParav Pandit OCRDMA_MBX_QUERY_CFG_MAX_PD_SHIFT = 16, 462fe2caefcSParav Pandit OCRDMA_MBX_QUERY_CFG_MAX_PD_MASK = 0xFFFF << 463fe2caefcSParav Pandit OCRDMA_MBX_QUERY_CFG_MAX_PD_SHIFT, 464fe2caefcSParav Pandit OCRDMA_MBX_QUERY_CFG_CA_ACK_DELAY_SHIFT = 8, 465fe2caefcSParav Pandit OCRDMA_MBX_QUERY_CFG_CA_ACK_DELAY_MASK = 0xFF << 466fe2caefcSParav Pandit OCRDMA_MBX_QUERY_CFG_CA_ACK_DELAY_SHIFT, 467fe2caefcSParav Pandit 468fe2caefcSParav Pandit OCRDMA_MBX_QUERY_CFG_MAX_SEND_SGE_SHIFT = 0, 469fe2caefcSParav Pandit OCRDMA_MBX_QUERY_CFG_MAX_SEND_SGE_MASK = 0xFFFF, 470634c5796SMahesh Vardhamanaiah OCRDMA_MBX_QUERY_CFG_MAX_WRITE_SGE_SHIFT = 16, 471634c5796SMahesh Vardhamanaiah OCRDMA_MBX_QUERY_CFG_MAX_WRITE_SGE_MASK = 0xFFFF << 472634c5796SMahesh Vardhamanaiah OCRDMA_MBX_QUERY_CFG_MAX_WRITE_SGE_SHIFT, 473fe2caefcSParav Pandit 474fe2caefcSParav Pandit OCRDMA_MBX_QUERY_CFG_MAX_ORD_PER_QP_SHIFT = 0, 475fe2caefcSParav Pandit OCRDMA_MBX_QUERY_CFG_MAX_ORD_PER_QP_MASK = 0xFFFF, 476fe2caefcSParav Pandit OCRDMA_MBX_QUERY_CFG_MAX_IRD_PER_QP_SHIFT = 16, 477fe2caefcSParav Pandit OCRDMA_MBX_QUERY_CFG_MAX_IRD_PER_QP_MASK = 0xFFFF << 478fe2caefcSParav Pandit OCRDMA_MBX_QUERY_CFG_MAX_IRD_PER_QP_SHIFT, 479fe2caefcSParav Pandit 480fe2caefcSParav Pandit OCRDMA_MBX_QUERY_CFG_MAX_WQE_SIZE_OFFSET = 24, 481fe2caefcSParav Pandit OCRDMA_MBX_QUERY_CFG_MAX_WQE_SIZE_MASK = 0xFF << 482fe2caefcSParav Pandit OCRDMA_MBX_QUERY_CFG_MAX_WQE_SIZE_OFFSET, 483fe2caefcSParav Pandit OCRDMA_MBX_QUERY_CFG_MAX_RQE_SIZE_OFFSET = 16, 484fe2caefcSParav Pandit OCRDMA_MBX_QUERY_CFG_MAX_RQE_SIZE_MASK = 0xFF << 485fe2caefcSParav Pandit OCRDMA_MBX_QUERY_CFG_MAX_RQE_SIZE_OFFSET, 486fe2caefcSParav Pandit OCRDMA_MBX_QUERY_CFG_MAX_DPP_CQES_OFFSET = 0, 487fe2caefcSParav Pandit OCRDMA_MBX_QUERY_CFG_MAX_DPP_CQES_MASK = 0xFFFF << 488fe2caefcSParav Pandit OCRDMA_MBX_QUERY_CFG_MAX_DPP_CQES_OFFSET, 489fe2caefcSParav Pandit 490fe2caefcSParav Pandit OCRDMA_MBX_QUERY_CFG_MAX_SRQ_OFFSET = 16, 491fe2caefcSParav Pandit OCRDMA_MBX_QUERY_CFG_MAX_SRQ_MASK = 0xFFFF << 492fe2caefcSParav Pandit OCRDMA_MBX_QUERY_CFG_MAX_SRQ_OFFSET, 493fe2caefcSParav Pandit OCRDMA_MBX_QUERY_CFG_MAX_RPIR_QPS_OFFSET = 0, 494fe2caefcSParav Pandit OCRDMA_MBX_QUERY_CFG_MAX_RPIR_QPS_MASK = 0xFFFF << 495fe2caefcSParav Pandit OCRDMA_MBX_QUERY_CFG_MAX_RPIR_QPS_OFFSET, 496fe2caefcSParav Pandit 497fe2caefcSParav Pandit OCRDMA_MBX_QUERY_CFG_MAX_DPP_PDS_OFFSET = 16, 498fe2caefcSParav Pandit OCRDMA_MBX_QUERY_CFG_MAX_DPP_PDS_MASK = 0xFFFF << 499fe2caefcSParav Pandit OCRDMA_MBX_QUERY_CFG_MAX_DPP_PDS_OFFSET, 500fe2caefcSParav Pandit OCRDMA_MBX_QUERY_CFG_MAX_DPP_CREDITS_OFFSET = 0, 501fe2caefcSParav Pandit OCRDMA_MBX_QUERY_CFG_MAX_DPP_CREDITS_MASK = 0xFFFF << 502fe2caefcSParav Pandit OCRDMA_MBX_QUERY_CFG_MAX_DPP_CREDITS_OFFSET, 503fe2caefcSParav Pandit 504fe2caefcSParav Pandit OCRDMA_MBX_QUERY_CFG_MAX_DPP_QPS_OFFSET = 0, 505fe2caefcSParav Pandit OCRDMA_MBX_QUERY_CFG_MAX_DPP_QPS_MASK = 0xFFFF << 506fe2caefcSParav Pandit OCRDMA_MBX_QUERY_CFG_MAX_DPP_QPS_OFFSET, 507fe2caefcSParav Pandit 508fe2caefcSParav Pandit OCRDMA_MBX_QUERY_CFG_MAX_WQES_PER_WQ_OFFSET = 16, 509fe2caefcSParav Pandit OCRDMA_MBX_QUERY_CFG_MAX_WQES_PER_WQ_MASK = 0xFFFF << 510fe2caefcSParav Pandit OCRDMA_MBX_QUERY_CFG_MAX_WQES_PER_WQ_OFFSET, 511fe2caefcSParav Pandit OCRDMA_MBX_QUERY_CFG_MAX_RQES_PER_RQ_OFFSET = 0, 512fe2caefcSParav Pandit OCRDMA_MBX_QUERY_CFG_MAX_RQES_PER_RQ_MASK = 0xFFFF << 51307bb5424SMahesh Vardhamanaiah OCRDMA_MBX_QUERY_CFG_MAX_RQES_PER_RQ_OFFSET, 514fe2caefcSParav Pandit 515fe2caefcSParav Pandit OCRDMA_MBX_QUERY_CFG_MAX_CQ_OFFSET = 16, 516fe2caefcSParav Pandit OCRDMA_MBX_QUERY_CFG_MAX_CQ_MASK = 0xFFFF << 517fe2caefcSParav Pandit OCRDMA_MBX_QUERY_CFG_MAX_CQ_OFFSET, 518fe2caefcSParav Pandit OCRDMA_MBX_QUERY_CFG_MAX_CQES_PER_CQ_OFFSET = 0, 519fe2caefcSParav Pandit OCRDMA_MBX_QUERY_CFG_MAX_CQES_PER_CQ_MASK = 0xFFFF << 520fe2caefcSParav Pandit OCRDMA_MBX_QUERY_CFG_MAX_CQES_PER_CQ_OFFSET, 521fe2caefcSParav Pandit 522fe2caefcSParav Pandit OCRDMA_MBX_QUERY_CFG_MAX_SRQ_RQE_OFFSET = 16, 523fe2caefcSParav Pandit OCRDMA_MBX_QUERY_CFG_MAX_SRQ_RQE_MASK = 0xFFFF << 524fe2caefcSParav Pandit OCRDMA_MBX_QUERY_CFG_MAX_SRQ_RQE_OFFSET, 525fe2caefcSParav Pandit OCRDMA_MBX_QUERY_CFG_MAX_SRQ_SGE_OFFSET = 0, 526fe2caefcSParav Pandit OCRDMA_MBX_QUERY_CFG_MAX_SRQ_SGE_MASK = 0xFFFF << 527fe2caefcSParav Pandit OCRDMA_MBX_QUERY_CFG_MAX_SRQ_SGE_OFFSET, 528fe2caefcSParav Pandit }; 529fe2caefcSParav Pandit 530fe2caefcSParav Pandit struct ocrdma_mbx_query_config { 531fe2caefcSParav Pandit struct ocrdma_mqe_hdr hdr; 532fe2caefcSParav Pandit struct ocrdma_mbx_rsp rsp; 533fe2caefcSParav Pandit u32 qp_srq_cq_ird_ord; 534fe2caefcSParav Pandit u32 max_pd_ca_ack_delay; 535fe2caefcSParav Pandit u32 max_write_send_sge; 536fe2caefcSParav Pandit u32 max_ird_ord_per_qp; 537fe2caefcSParav Pandit u32 max_shared_ird_ord; 538fe2caefcSParav Pandit u32 max_mr; 5397b9b1a59SNaresh Gottumukkala u32 max_mr_size_hi; 540033edd4dSMitesh Ahuja u32 max_mr_size_lo; 541fe2caefcSParav Pandit u32 max_num_mr_pbl; 542fe2caefcSParav Pandit u32 max_mw; 543fe2caefcSParav Pandit u32 max_fmr; 544fe2caefcSParav Pandit u32 max_pages_per_frmr; 545fe2caefcSParav Pandit u32 max_mcast_group; 546fe2caefcSParav Pandit u32 max_mcast_qp_attach; 547fe2caefcSParav Pandit u32 max_total_mcast_qp_attach; 548fe2caefcSParav Pandit u32 wqe_rqe_stride_max_dpp_cqs; 549fe2caefcSParav Pandit u32 max_srq_rpir_qps; 550fe2caefcSParav Pandit u32 max_dpp_pds_credits; 551fe2caefcSParav Pandit u32 max_dpp_credits_pds_per_pd; 552fe2caefcSParav Pandit u32 max_wqes_rqes_per_q; 553fe2caefcSParav Pandit u32 max_cq_cqes_per_cq; 554fe2caefcSParav Pandit u32 max_srq_rqe_sge; 5557b9b1a59SNaresh Gottumukkala }; 556fe2caefcSParav Pandit 557fe2caefcSParav Pandit struct ocrdma_fw_ver_rsp { 558fe2caefcSParav Pandit struct ocrdma_mqe_hdr hdr; 559fe2caefcSParav Pandit struct ocrdma_mbx_rsp rsp; 560fe2caefcSParav Pandit 561fe2caefcSParav Pandit u8 running_ver[32]; 5627b9b1a59SNaresh Gottumukkala }; 563fe2caefcSParav Pandit 564fe2caefcSParav Pandit struct ocrdma_fw_conf_rsp { 565fe2caefcSParav Pandit struct ocrdma_mqe_hdr hdr; 566fe2caefcSParav Pandit struct ocrdma_mbx_rsp rsp; 567fe2caefcSParav Pandit 568fe2caefcSParav Pandit u32 config_num; 569fe2caefcSParav Pandit u32 asic_revision; 570fe2caefcSParav Pandit u32 phy_port; 571fe2caefcSParav Pandit u32 fn_mode; 572fe2caefcSParav Pandit struct { 573fe2caefcSParav Pandit u32 mode; 574fe2caefcSParav Pandit u32 nic_wqid_base; 575fe2caefcSParav Pandit u32 nic_wq_tot; 576fe2caefcSParav Pandit u32 prot_wqid_base; 577fe2caefcSParav Pandit u32 prot_wq_tot; 578fe2caefcSParav Pandit u32 prot_rqid_base; 579fe2caefcSParav Pandit u32 prot_rqid_tot; 580fe2caefcSParav Pandit u32 rsvd[6]; 581fe2caefcSParav Pandit } ulp[2]; 582fe2caefcSParav Pandit u32 fn_capabilities; 583fe2caefcSParav Pandit u32 rsvd1; 584fe2caefcSParav Pandit u32 rsvd2; 585fe2caefcSParav Pandit u32 base_eqid; 586fe2caefcSParav Pandit u32 max_eq; 587fe2caefcSParav Pandit 5887b9b1a59SNaresh Gottumukkala }; 589fe2caefcSParav Pandit 590fe2caefcSParav Pandit enum { 591fe2caefcSParav Pandit OCRDMA_FN_MODE_RDMA = 0x4 592fe2caefcSParav Pandit }; 593fe2caefcSParav Pandit 5948ac0c7c7SDevesh Sharma enum { 5958ac0c7c7SDevesh Sharma OCRDMA_IF_TYPE_MASK = 0xFFFF0000, 5968ac0c7c7SDevesh Sharma OCRDMA_IF_TYPE_SHIFT = 0x10, 5978ac0c7c7SDevesh Sharma OCRDMA_PHY_TYPE_MASK = 0x0000FFFF, 5988ac0c7c7SDevesh Sharma OCRDMA_FUTURE_DETAILS_MASK = 0xFFFF0000, 5998ac0c7c7SDevesh Sharma OCRDMA_FUTURE_DETAILS_SHIFT = 0x10, 6008ac0c7c7SDevesh Sharma OCRDMA_EX_PHY_DETAILS_MASK = 0x0000FFFF, 6018ac0c7c7SDevesh Sharma OCRDMA_FSPEED_SUPP_MASK = 0xFFFF0000, 6028ac0c7c7SDevesh Sharma OCRDMA_FSPEED_SUPP_SHIFT = 0x10, 6038ac0c7c7SDevesh Sharma OCRDMA_ASPEED_SUPP_MASK = 0x0000FFFF 6048ac0c7c7SDevesh Sharma }; 6058ac0c7c7SDevesh Sharma 606a51f06e1SSelvin Xavier struct ocrdma_get_phy_info_rsp { 607a51f06e1SSelvin Xavier struct ocrdma_mqe_hdr hdr; 608a51f06e1SSelvin Xavier struct ocrdma_mbx_rsp rsp; 609a51f06e1SSelvin Xavier 6108ac0c7c7SDevesh Sharma u32 ityp_ptyp; 611a51f06e1SSelvin Xavier u32 misc_params; 6128ac0c7c7SDevesh Sharma u32 ftrdtl_exphydtl; 6138ac0c7c7SDevesh Sharma u32 fspeed_aspeed; 614a51f06e1SSelvin Xavier u32 future_use[2]; 615a51f06e1SSelvin Xavier }; 616a51f06e1SSelvin Xavier 617a51f06e1SSelvin Xavier enum { 618a51f06e1SSelvin Xavier OCRDMA_PHY_SPEED_ZERO = 0x0, 619a51f06e1SSelvin Xavier OCRDMA_PHY_SPEED_10MBPS = 0x1, 620a51f06e1SSelvin Xavier OCRDMA_PHY_SPEED_100MBPS = 0x2, 621a51f06e1SSelvin Xavier OCRDMA_PHY_SPEED_1GBPS = 0x4, 622a51f06e1SSelvin Xavier OCRDMA_PHY_SPEED_10GBPS = 0x8, 623a51f06e1SSelvin Xavier OCRDMA_PHY_SPEED_40GBPS = 0x20 624a51f06e1SSelvin Xavier }; 625a51f06e1SSelvin Xavier 6268ac0c7c7SDevesh Sharma enum { 6278ac0c7c7SDevesh Sharma OCRDMA_PORT_NUM_MASK = 0x3F, 6288ac0c7c7SDevesh Sharma OCRDMA_PT_MASK = 0xC0, 6298ac0c7c7SDevesh Sharma OCRDMA_PT_SHIFT = 0x6, 6308ac0c7c7SDevesh Sharma OCRDMA_LINK_DUP_MASK = 0x0000FF00, 6318ac0c7c7SDevesh Sharma OCRDMA_LINK_DUP_SHIFT = 0x8, 6328ac0c7c7SDevesh Sharma OCRDMA_PHY_PS_MASK = 0x00FF0000, 6338ac0c7c7SDevesh Sharma OCRDMA_PHY_PS_SHIFT = 0x10, 6348ac0c7c7SDevesh Sharma OCRDMA_PHY_PFLT_MASK = 0xFF000000, 6358ac0c7c7SDevesh Sharma OCRDMA_PHY_PFLT_SHIFT = 0x18, 6368ac0c7c7SDevesh Sharma OCRDMA_QOS_LNKSP_MASK = 0xFFFF0000, 6378ac0c7c7SDevesh Sharma OCRDMA_QOS_LNKSP_SHIFT = 0x10, 6388ac0c7c7SDevesh Sharma OCRDMA_LLST_MASK = 0xFF, 6398ac0c7c7SDevesh Sharma OCRDMA_PLFC_MASK = 0x00000400, 6408ac0c7c7SDevesh Sharma OCRDMA_PLFC_SHIFT = 0x8, 6418ac0c7c7SDevesh Sharma OCRDMA_PLRFC_MASK = 0x00000200, 6428ac0c7c7SDevesh Sharma OCRDMA_PLRFC_SHIFT = 0x8, 6438ac0c7c7SDevesh Sharma OCRDMA_PLTFC_MASK = 0x00000100, 6448ac0c7c7SDevesh Sharma OCRDMA_PLTFC_SHIFT = 0x8 6458ac0c7c7SDevesh Sharma }; 646a51f06e1SSelvin Xavier 647f24ceba6SNaresh Gottumukkala struct ocrdma_get_link_speed_rsp { 648f24ceba6SNaresh Gottumukkala struct ocrdma_mqe_hdr hdr; 649f24ceba6SNaresh Gottumukkala struct ocrdma_mbx_rsp rsp; 650f24ceba6SNaresh Gottumukkala 6518ac0c7c7SDevesh Sharma u32 pflt_pps_ld_pnum; 6528ac0c7c7SDevesh Sharma u32 qos_lsp; 6538ac0c7c7SDevesh Sharma u32 res_lls; 654f24ceba6SNaresh Gottumukkala }; 655f24ceba6SNaresh Gottumukkala 656f24ceba6SNaresh Gottumukkala enum { 657f24ceba6SNaresh Gottumukkala OCRDMA_PHYS_LINK_SPEED_ZERO = 0x0, 658f24ceba6SNaresh Gottumukkala OCRDMA_PHYS_LINK_SPEED_10MBPS = 0x1, 659f24ceba6SNaresh Gottumukkala OCRDMA_PHYS_LINK_SPEED_100MBPS = 0x2, 660f24ceba6SNaresh Gottumukkala OCRDMA_PHYS_LINK_SPEED_1GBPS = 0x3, 661f24ceba6SNaresh Gottumukkala OCRDMA_PHYS_LINK_SPEED_10GBPS = 0x4, 662f24ceba6SNaresh Gottumukkala OCRDMA_PHYS_LINK_SPEED_20GBPS = 0x5, 663f24ceba6SNaresh Gottumukkala OCRDMA_PHYS_LINK_SPEED_25GBPS = 0x6, 664f24ceba6SNaresh Gottumukkala OCRDMA_PHYS_LINK_SPEED_40GBPS = 0x7, 665f24ceba6SNaresh Gottumukkala OCRDMA_PHYS_LINK_SPEED_100GBPS = 0x8 666f24ceba6SNaresh Gottumukkala }; 667f24ceba6SNaresh Gottumukkala 668fe2caefcSParav Pandit enum { 669fe2caefcSParav Pandit OCRDMA_CREATE_CQ_VER2 = 2, 670cffce990SNaresh Gottumukkala OCRDMA_CREATE_CQ_VER3 = 3, 671fe2caefcSParav Pandit 672fe2caefcSParav Pandit OCRDMA_CREATE_CQ_PAGE_CNT_MASK = 0xFFFF, 673fe2caefcSParav Pandit OCRDMA_CREATE_CQ_PAGE_SIZE_SHIFT = 16, 674fe2caefcSParav Pandit OCRDMA_CREATE_CQ_PAGE_SIZE_MASK = 0xFF, 675fe2caefcSParav Pandit 676fe2caefcSParav Pandit OCRDMA_CREATE_CQ_COALESCWM_SHIFT = 12, 677de123485SJes Sorensen OCRDMA_CREATE_CQ_COALESCWM_MASK = BIT(13) | BIT(12), 678de123485SJes Sorensen OCRDMA_CREATE_CQ_FLAGS_NODELAY = BIT(14), 679de123485SJes Sorensen OCRDMA_CREATE_CQ_FLAGS_AUTO_VALID = BIT(15), 680fe2caefcSParav Pandit 681fe2caefcSParav Pandit OCRDMA_CREATE_CQ_EQ_ID_MASK = 0xFFFF, 682fe2caefcSParav Pandit OCRDMA_CREATE_CQ_CQE_COUNT_MASK = 0xFFFF 683fe2caefcSParav Pandit }; 684fe2caefcSParav Pandit 685fe2caefcSParav Pandit enum { 686fe2caefcSParav Pandit OCRDMA_CREATE_CQ_VER0 = 0, 687fe2caefcSParav Pandit OCRDMA_CREATE_CQ_DPP = 1, 688fe2caefcSParav Pandit OCRDMA_CREATE_CQ_TYPE_SHIFT = 24, 689fe2caefcSParav Pandit OCRDMA_CREATE_CQ_EQID_SHIFT = 22, 690fe2caefcSParav Pandit 691fe2caefcSParav Pandit OCRDMA_CREATE_CQ_CNT_SHIFT = 27, 692de123485SJes Sorensen OCRDMA_CREATE_CQ_FLAGS_VALID = BIT(29), 693de123485SJes Sorensen OCRDMA_CREATE_CQ_FLAGS_EVENTABLE = BIT(31), 694fe2caefcSParav Pandit OCRDMA_CREATE_CQ_DEF_FLAGS = OCRDMA_CREATE_CQ_FLAGS_VALID | 695fe2caefcSParav Pandit OCRDMA_CREATE_CQ_FLAGS_EVENTABLE | 696fe2caefcSParav Pandit OCRDMA_CREATE_CQ_FLAGS_NODELAY 697fe2caefcSParav Pandit }; 698fe2caefcSParav Pandit 699fe2caefcSParav Pandit struct ocrdma_create_cq_cmd { 700fe2caefcSParav Pandit struct ocrdma_mbx_hdr req; 701fe2caefcSParav Pandit u32 pgsz_pgcnt; 702fe2caefcSParav Pandit u32 ev_cnt_flags; 703fe2caefcSParav Pandit u32 eqn; 7048ac0c7c7SDevesh Sharma u32 pdid_cqecnt; 705fe2caefcSParav Pandit u32 rsvd6; 706fe2caefcSParav Pandit struct ocrdma_pa pa[OCRDMA_CREATE_CQ_MAX_PAGES]; 707fe2caefcSParav Pandit }; 708fe2caefcSParav Pandit 709fe2caefcSParav Pandit struct ocrdma_create_cq { 710fe2caefcSParav Pandit struct ocrdma_mqe_hdr hdr; 711fe2caefcSParav Pandit struct ocrdma_create_cq_cmd cmd; 7127b9b1a59SNaresh Gottumukkala }; 713fe2caefcSParav Pandit 714fe2caefcSParav Pandit enum { 7158ac0c7c7SDevesh Sharma OCRDMA_CREATE_CQ_CMD_PDID_SHIFT = 0x10 7168ac0c7c7SDevesh Sharma }; 7178ac0c7c7SDevesh Sharma 7188ac0c7c7SDevesh Sharma enum { 719fe2caefcSParav Pandit OCRDMA_CREATE_CQ_RSP_CQ_ID_MASK = 0xFFFF 720fe2caefcSParav Pandit }; 721fe2caefcSParav Pandit 722fe2caefcSParav Pandit struct ocrdma_create_cq_cmd_rsp { 723fe2caefcSParav Pandit struct ocrdma_mbx_rsp rsp; 724fe2caefcSParav Pandit u32 cq_id; 7257b9b1a59SNaresh Gottumukkala }; 726fe2caefcSParav Pandit 727fe2caefcSParav Pandit struct ocrdma_create_cq_rsp { 728fe2caefcSParav Pandit struct ocrdma_mqe_hdr hdr; 729fe2caefcSParav Pandit struct ocrdma_create_cq_cmd_rsp rsp; 7307b9b1a59SNaresh Gottumukkala }; 731fe2caefcSParav Pandit 732fe2caefcSParav Pandit enum { 733fe2caefcSParav Pandit OCRDMA_CREATE_MQ_V0_CQ_ID_SHIFT = 22, 734fe2caefcSParav Pandit OCRDMA_CREATE_MQ_CQ_ID_SHIFT = 16, 735fe2caefcSParav Pandit OCRDMA_CREATE_MQ_RING_SIZE_SHIFT = 16, 736de123485SJes Sorensen OCRDMA_CREATE_MQ_VALID = BIT(31), 737de123485SJes Sorensen OCRDMA_CREATE_MQ_ASYNC_CQ_VALID = BIT(0) 738fe2caefcSParav Pandit }; 739fe2caefcSParav Pandit 740b1d58b99SNaresh Gottumukkala struct ocrdma_create_mq_req { 741b1d58b99SNaresh Gottumukkala struct ocrdma_mbx_hdr req; 742fe2caefcSParav Pandit u32 cqid_pages; 743fe2caefcSParav Pandit u32 async_event_bitmap; 744fe2caefcSParav Pandit u32 async_cqid_ringsize; 745fe2caefcSParav Pandit u32 valid; 746fe2caefcSParav Pandit u32 async_cqid_valid; 747fe2caefcSParav Pandit u32 rsvd; 748fe2caefcSParav Pandit struct ocrdma_pa pa[8]; 7497b9b1a59SNaresh Gottumukkala }; 750fe2caefcSParav Pandit 751fe2caefcSParav Pandit struct ocrdma_create_mq_rsp { 752fe2caefcSParav Pandit struct ocrdma_mbx_rsp rsp; 753fe2caefcSParav Pandit u32 id; 7547b9b1a59SNaresh Gottumukkala }; 755fe2caefcSParav Pandit 756fe2caefcSParav Pandit enum { 757fe2caefcSParav Pandit OCRDMA_DESTROY_CQ_QID_SHIFT = 0, 758fe2caefcSParav Pandit OCRDMA_DESTROY_CQ_QID_MASK = 0xFFFF, 759fe2caefcSParav Pandit OCRDMA_DESTROY_CQ_QID_BYPASS_FLUSH_SHIFT = 16, 760fe2caefcSParav Pandit OCRDMA_DESTROY_CQ_QID_BYPASS_FLUSH_MASK = 0xFFFF << 761fe2caefcSParav Pandit OCRDMA_DESTROY_CQ_QID_BYPASS_FLUSH_SHIFT 762fe2caefcSParav Pandit }; 763fe2caefcSParav Pandit 764fe2caefcSParav Pandit struct ocrdma_destroy_cq { 765fe2caefcSParav Pandit struct ocrdma_mqe_hdr hdr; 766fe2caefcSParav Pandit struct ocrdma_mbx_hdr req; 767fe2caefcSParav Pandit 768fe2caefcSParav Pandit u32 bypass_flush_qid; 7697b9b1a59SNaresh Gottumukkala }; 770fe2caefcSParav Pandit 771fe2caefcSParav Pandit struct ocrdma_destroy_cq_rsp { 772fe2caefcSParav Pandit struct ocrdma_mqe_hdr hdr; 773fe2caefcSParav Pandit struct ocrdma_mbx_rsp rsp; 7747b9b1a59SNaresh Gottumukkala }; 775fe2caefcSParav Pandit 776fe2caefcSParav Pandit enum { 777fe2caefcSParav Pandit OCRDMA_QPT_GSI = 1, 778fe2caefcSParav Pandit OCRDMA_QPT_RC = 2, 779fe2caefcSParav Pandit OCRDMA_QPT_UD = 4, 780fe2caefcSParav Pandit }; 781fe2caefcSParav Pandit 782fe2caefcSParav Pandit enum { 783fe2caefcSParav Pandit OCRDMA_CREATE_QP_REQ_PD_ID_SHIFT = 0, 784fe2caefcSParav Pandit OCRDMA_CREATE_QP_REQ_PD_ID_MASK = 0xFFFF, 785fe2caefcSParav Pandit OCRDMA_CREATE_QP_REQ_SQ_PAGE_SIZE_SHIFT = 16, 786fe2caefcSParav Pandit OCRDMA_CREATE_QP_REQ_RQ_PAGE_SIZE_SHIFT = 19, 787fe2caefcSParav Pandit OCRDMA_CREATE_QP_REQ_QPT_SHIFT = 29, 788de123485SJes Sorensen OCRDMA_CREATE_QP_REQ_QPT_MASK = BIT(31) | BIT(30) | BIT(29), 789fe2caefcSParav Pandit 790fe2caefcSParav Pandit OCRDMA_CREATE_QP_REQ_MAX_RQE_SHIFT = 0, 791fe2caefcSParav Pandit OCRDMA_CREATE_QP_REQ_MAX_RQE_MASK = 0xFFFF, 792fe2caefcSParav Pandit OCRDMA_CREATE_QP_REQ_MAX_WQE_SHIFT = 16, 793fe2caefcSParav Pandit OCRDMA_CREATE_QP_REQ_MAX_WQE_MASK = 0xFFFF << 794fe2caefcSParav Pandit OCRDMA_CREATE_QP_REQ_MAX_WQE_SHIFT, 795fe2caefcSParav Pandit 796fe2caefcSParav Pandit OCRDMA_CREATE_QP_REQ_MAX_SGE_WRITE_SHIFT = 0, 797fe2caefcSParav Pandit OCRDMA_CREATE_QP_REQ_MAX_SGE_WRITE_MASK = 0xFFFF, 798fe2caefcSParav Pandit OCRDMA_CREATE_QP_REQ_MAX_SGE_SEND_SHIFT = 16, 799fe2caefcSParav Pandit OCRDMA_CREATE_QP_REQ_MAX_SGE_SEND_MASK = 0xFFFF << 800fe2caefcSParav Pandit OCRDMA_CREATE_QP_REQ_MAX_SGE_SEND_SHIFT, 801fe2caefcSParav Pandit 802fe2caefcSParav Pandit OCRDMA_CREATE_QP_REQ_FMR_EN_SHIFT = 0, 803de123485SJes Sorensen OCRDMA_CREATE_QP_REQ_FMR_EN_MASK = BIT(0), 804fe2caefcSParav Pandit OCRDMA_CREATE_QP_REQ_ZERO_LKEYEN_SHIFT = 1, 805de123485SJes Sorensen OCRDMA_CREATE_QP_REQ_ZERO_LKEYEN_MASK = BIT(1), 806fe2caefcSParav Pandit OCRDMA_CREATE_QP_REQ_BIND_MEMWIN_SHIFT = 2, 807de123485SJes Sorensen OCRDMA_CREATE_QP_REQ_BIND_MEMWIN_MASK = BIT(2), 808fe2caefcSParav Pandit OCRDMA_CREATE_QP_REQ_INB_WREN_SHIFT = 3, 809de123485SJes Sorensen OCRDMA_CREATE_QP_REQ_INB_WREN_MASK = BIT(3), 810fe2caefcSParav Pandit OCRDMA_CREATE_QP_REQ_INB_RDEN_SHIFT = 4, 811de123485SJes Sorensen OCRDMA_CREATE_QP_REQ_INB_RDEN_MASK = BIT(4), 812fe2caefcSParav Pandit OCRDMA_CREATE_QP_REQ_USE_SRQ_SHIFT = 5, 813de123485SJes Sorensen OCRDMA_CREATE_QP_REQ_USE_SRQ_MASK = BIT(5), 814fe2caefcSParav Pandit OCRDMA_CREATE_QP_REQ_ENABLE_RPIR_SHIFT = 6, 815de123485SJes Sorensen OCRDMA_CREATE_QP_REQ_ENABLE_RPIR_MASK = BIT(6), 816fe2caefcSParav Pandit OCRDMA_CREATE_QP_REQ_ENABLE_DPP_SHIFT = 7, 817de123485SJes Sorensen OCRDMA_CREATE_QP_REQ_ENABLE_DPP_MASK = BIT(7), 818fe2caefcSParav Pandit OCRDMA_CREATE_QP_REQ_ENABLE_DPP_CQ_SHIFT = 8, 819de123485SJes Sorensen OCRDMA_CREATE_QP_REQ_ENABLE_DPP_CQ_MASK = BIT(8), 820fe2caefcSParav Pandit OCRDMA_CREATE_QP_REQ_MAX_SGE_RECV_SHIFT = 16, 821fe2caefcSParav Pandit OCRDMA_CREATE_QP_REQ_MAX_SGE_RECV_MASK = 0xFFFF << 822fe2caefcSParav Pandit OCRDMA_CREATE_QP_REQ_MAX_SGE_RECV_SHIFT, 823fe2caefcSParav Pandit 824fe2caefcSParav Pandit OCRDMA_CREATE_QP_REQ_MAX_IRD_SHIFT = 0, 825fe2caefcSParav Pandit OCRDMA_CREATE_QP_REQ_MAX_IRD_MASK = 0xFFFF, 826fe2caefcSParav Pandit OCRDMA_CREATE_QP_REQ_MAX_ORD_SHIFT = 16, 827fe2caefcSParav Pandit OCRDMA_CREATE_QP_REQ_MAX_ORD_MASK = 0xFFFF << 828fe2caefcSParav Pandit OCRDMA_CREATE_QP_REQ_MAX_ORD_SHIFT, 829fe2caefcSParav Pandit 830fe2caefcSParav Pandit OCRDMA_CREATE_QP_REQ_NUM_RQ_PAGES_SHIFT = 0, 831fe2caefcSParav Pandit OCRDMA_CREATE_QP_REQ_NUM_RQ_PAGES_MASK = 0xFFFF, 832fe2caefcSParav Pandit OCRDMA_CREATE_QP_REQ_NUM_WQ_PAGES_SHIFT = 16, 833fe2caefcSParav Pandit OCRDMA_CREATE_QP_REQ_NUM_WQ_PAGES_MASK = 0xFFFF << 834fe2caefcSParav Pandit OCRDMA_CREATE_QP_REQ_NUM_WQ_PAGES_SHIFT, 835fe2caefcSParav Pandit 836fe2caefcSParav Pandit OCRDMA_CREATE_QP_REQ_RQE_SIZE_SHIFT = 0, 837fe2caefcSParav Pandit OCRDMA_CREATE_QP_REQ_RQE_SIZE_MASK = 0xFFFF, 838fe2caefcSParav Pandit OCRDMA_CREATE_QP_REQ_WQE_SIZE_SHIFT = 16, 839fe2caefcSParav Pandit OCRDMA_CREATE_QP_REQ_WQE_SIZE_MASK = 0xFFFF << 840fe2caefcSParav Pandit OCRDMA_CREATE_QP_REQ_WQE_SIZE_SHIFT, 841fe2caefcSParav Pandit 842fe2caefcSParav Pandit OCRDMA_CREATE_QP_REQ_RQ_CQID_SHIFT = 0, 843fe2caefcSParav Pandit OCRDMA_CREATE_QP_REQ_RQ_CQID_MASK = 0xFFFF, 844fe2caefcSParav Pandit OCRDMA_CREATE_QP_REQ_WQ_CQID_SHIFT = 16, 845fe2caefcSParav Pandit OCRDMA_CREATE_QP_REQ_WQ_CQID_MASK = 0xFFFF << 846fe2caefcSParav Pandit OCRDMA_CREATE_QP_REQ_WQ_CQID_SHIFT, 847fe2caefcSParav Pandit 848fe2caefcSParav Pandit OCRDMA_CREATE_QP_REQ_DPP_CQPID_SHIFT = 0, 849fe2caefcSParav Pandit OCRDMA_CREATE_QP_REQ_DPP_CQPID_MASK = 0xFFFF, 850fe2caefcSParav Pandit OCRDMA_CREATE_QP_REQ_DPP_CREDIT_SHIFT = 16, 851fe2caefcSParav Pandit OCRDMA_CREATE_QP_REQ_DPP_CREDIT_MASK = 0xFFFF << 852fe2caefcSParav Pandit OCRDMA_CREATE_QP_REQ_DPP_CREDIT_SHIFT 853fe2caefcSParav Pandit }; 854fe2caefcSParav Pandit 855fe2caefcSParav Pandit enum { 856fe2caefcSParav Pandit OCRDMA_CREATE_QP_REQ_DPP_CREDIT_LIMIT = 16, 857fe2caefcSParav Pandit OCRDMA_CREATE_QP_RSP_DPP_PAGE_SHIFT = 1 858fe2caefcSParav Pandit }; 859fe2caefcSParav Pandit 860fe2caefcSParav Pandit #define MAX_OCRDMA_IRD_PAGES 4 861fe2caefcSParav Pandit 862fe2caefcSParav Pandit enum ocrdma_qp_flags { 863fe2caefcSParav Pandit OCRDMA_QP_MW_BIND = 1, 864fe2caefcSParav Pandit OCRDMA_QP_LKEY0 = (1 << 1), 865fe2caefcSParav Pandit OCRDMA_QP_FAST_REG = (1 << 2), 866fe2caefcSParav Pandit OCRDMA_QP_INB_RD = (1 << 6), 867fe2caefcSParav Pandit OCRDMA_QP_INB_WR = (1 << 7), 868fe2caefcSParav Pandit }; 869fe2caefcSParav Pandit 870fe2caefcSParav Pandit enum ocrdma_qp_state { 871fe2caefcSParav Pandit OCRDMA_QPS_RST = 0, 872fe2caefcSParav Pandit OCRDMA_QPS_INIT = 1, 873fe2caefcSParav Pandit OCRDMA_QPS_RTR = 2, 874fe2caefcSParav Pandit OCRDMA_QPS_RTS = 3, 875fe2caefcSParav Pandit OCRDMA_QPS_SQE = 4, 876fe2caefcSParav Pandit OCRDMA_QPS_SQ_DRAINING = 5, 877fe2caefcSParav Pandit OCRDMA_QPS_ERR = 6, 878fe2caefcSParav Pandit OCRDMA_QPS_SQD = 7 879fe2caefcSParav Pandit }; 880fe2caefcSParav Pandit 881fe2caefcSParav Pandit struct ocrdma_create_qp_req { 882fe2caefcSParav Pandit struct ocrdma_mqe_hdr hdr; 883fe2caefcSParav Pandit struct ocrdma_mbx_hdr req; 884fe2caefcSParav Pandit 885fe2caefcSParav Pandit u32 type_pgsz_pdn; 886fe2caefcSParav Pandit u32 max_wqe_rqe; 887fe2caefcSParav Pandit u32 max_sge_send_write; 888fe2caefcSParav Pandit u32 max_sge_recv_flags; 889fe2caefcSParav Pandit u32 max_ord_ird; 890fe2caefcSParav Pandit u32 num_wq_rq_pages; 891fe2caefcSParav Pandit u32 wqe_rqe_size; 892fe2caefcSParav Pandit u32 wq_rq_cqid; 893fe2caefcSParav Pandit struct ocrdma_pa wq_addr[MAX_OCRDMA_QP_PAGES]; 894fe2caefcSParav Pandit struct ocrdma_pa rq_addr[MAX_OCRDMA_QP_PAGES]; 895fe2caefcSParav Pandit u32 dpp_credits_cqid; 896fe2caefcSParav Pandit u32 rpir_lkey; 897fe2caefcSParav Pandit struct ocrdma_pa ird_addr[MAX_OCRDMA_IRD_PAGES]; 8987b9b1a59SNaresh Gottumukkala }; 899fe2caefcSParav Pandit 900fe2caefcSParav Pandit enum { 901fe2caefcSParav Pandit OCRDMA_CREATE_QP_RSP_QP_ID_SHIFT = 0, 902fe2caefcSParav Pandit OCRDMA_CREATE_QP_RSP_QP_ID_MASK = 0xFFFF, 903fe2caefcSParav Pandit 904fe2caefcSParav Pandit OCRDMA_CREATE_QP_RSP_MAX_RQE_SHIFT = 0, 905fe2caefcSParav Pandit OCRDMA_CREATE_QP_RSP_MAX_RQE_MASK = 0xFFFF, 906fe2caefcSParav Pandit OCRDMA_CREATE_QP_RSP_MAX_WQE_SHIFT = 16, 907fe2caefcSParav Pandit OCRDMA_CREATE_QP_RSP_MAX_WQE_MASK = 0xFFFF << 908fe2caefcSParav Pandit OCRDMA_CREATE_QP_RSP_MAX_WQE_SHIFT, 909fe2caefcSParav Pandit 910fe2caefcSParav Pandit OCRDMA_CREATE_QP_RSP_MAX_SGE_WRITE_SHIFT = 0, 911fe2caefcSParav Pandit OCRDMA_CREATE_QP_RSP_MAX_SGE_WRITE_MASK = 0xFFFF, 912fe2caefcSParav Pandit OCRDMA_CREATE_QP_RSP_MAX_SGE_SEND_SHIFT = 16, 913fe2caefcSParav Pandit OCRDMA_CREATE_QP_RSP_MAX_SGE_SEND_MASK = 0xFFFF << 914fe2caefcSParav Pandit OCRDMA_CREATE_QP_RSP_MAX_SGE_SEND_SHIFT, 915fe2caefcSParav Pandit 916fe2caefcSParav Pandit OCRDMA_CREATE_QP_RSP_MAX_SGE_RECV_SHIFT = 16, 917fe2caefcSParav Pandit OCRDMA_CREATE_QP_RSP_MAX_SGE_RECV_MASK = 0xFFFF << 918fe2caefcSParav Pandit OCRDMA_CREATE_QP_RSP_MAX_SGE_RECV_SHIFT, 919fe2caefcSParav Pandit 920fe2caefcSParav Pandit OCRDMA_CREATE_QP_RSP_MAX_IRD_SHIFT = 0, 921fe2caefcSParav Pandit OCRDMA_CREATE_QP_RSP_MAX_IRD_MASK = 0xFFFF, 922fe2caefcSParav Pandit OCRDMA_CREATE_QP_RSP_MAX_ORD_SHIFT = 16, 923fe2caefcSParav Pandit OCRDMA_CREATE_QP_RSP_MAX_ORD_MASK = 0xFFFF << 924fe2caefcSParav Pandit OCRDMA_CREATE_QP_RSP_MAX_ORD_SHIFT, 925fe2caefcSParav Pandit 926fe2caefcSParav Pandit OCRDMA_CREATE_QP_RSP_RQ_ID_SHIFT = 0, 927fe2caefcSParav Pandit OCRDMA_CREATE_QP_RSP_RQ_ID_MASK = 0xFFFF, 928fe2caefcSParav Pandit OCRDMA_CREATE_QP_RSP_SQ_ID_SHIFT = 16, 929fe2caefcSParav Pandit OCRDMA_CREATE_QP_RSP_SQ_ID_MASK = 0xFFFF << 930fe2caefcSParav Pandit OCRDMA_CREATE_QP_RSP_SQ_ID_SHIFT, 931fe2caefcSParav Pandit 932de123485SJes Sorensen OCRDMA_CREATE_QP_RSP_DPP_ENABLED_MASK = BIT(0), 933fe2caefcSParav Pandit OCRDMA_CREATE_QP_RSP_DPP_PAGE_OFFSET_SHIFT = 1, 934fe2caefcSParav Pandit OCRDMA_CREATE_QP_RSP_DPP_PAGE_OFFSET_MASK = 0x7FFF << 935fe2caefcSParav Pandit OCRDMA_CREATE_QP_RSP_DPP_PAGE_OFFSET_SHIFT, 936fe2caefcSParav Pandit OCRDMA_CREATE_QP_RSP_DPP_CREDITS_SHIFT = 16, 937fe2caefcSParav Pandit OCRDMA_CREATE_QP_RSP_DPP_CREDITS_MASK = 0xFFFF << 938fe2caefcSParav Pandit OCRDMA_CREATE_QP_RSP_DPP_CREDITS_SHIFT, 939fe2caefcSParav Pandit }; 940fe2caefcSParav Pandit 941fe2caefcSParav Pandit struct ocrdma_create_qp_rsp { 942fe2caefcSParav Pandit struct ocrdma_mqe_hdr hdr; 943fe2caefcSParav Pandit struct ocrdma_mbx_rsp rsp; 944fe2caefcSParav Pandit 945fe2caefcSParav Pandit u32 qp_id; 946fe2caefcSParav Pandit u32 max_wqe_rqe; 947fe2caefcSParav Pandit u32 max_sge_send_write; 948fe2caefcSParav Pandit u32 max_sge_recv; 949fe2caefcSParav Pandit u32 max_ord_ird; 950fe2caefcSParav Pandit u32 sq_rq_id; 951fe2caefcSParav Pandit u32 dpp_response; 9527b9b1a59SNaresh Gottumukkala }; 953fe2caefcSParav Pandit 954fe2caefcSParav Pandit struct ocrdma_destroy_qp { 955fe2caefcSParav Pandit struct ocrdma_mqe_hdr hdr; 956fe2caefcSParav Pandit struct ocrdma_mbx_hdr req; 957fe2caefcSParav Pandit u32 qp_id; 9587b9b1a59SNaresh Gottumukkala }; 959fe2caefcSParav Pandit 960fe2caefcSParav Pandit struct ocrdma_destroy_qp_rsp { 961fe2caefcSParav Pandit struct ocrdma_mqe_hdr hdr; 962fe2caefcSParav Pandit struct ocrdma_mbx_rsp rsp; 9637b9b1a59SNaresh Gottumukkala }; 964fe2caefcSParav Pandit 965fe2caefcSParav Pandit enum { 966fe2caefcSParav Pandit OCRDMA_MODIFY_QP_ID_SHIFT = 0, 967fe2caefcSParav Pandit OCRDMA_MODIFY_QP_ID_MASK = 0xFFFF, 968fe2caefcSParav Pandit 969de123485SJes Sorensen OCRDMA_QP_PARA_QPS_VALID = BIT(0), 970de123485SJes Sorensen OCRDMA_QP_PARA_SQD_ASYNC_VALID = BIT(1), 971de123485SJes Sorensen OCRDMA_QP_PARA_PKEY_VALID = BIT(2), 972de123485SJes Sorensen OCRDMA_QP_PARA_QKEY_VALID = BIT(3), 973de123485SJes Sorensen OCRDMA_QP_PARA_PMTU_VALID = BIT(4), 974de123485SJes Sorensen OCRDMA_QP_PARA_ACK_TO_VALID = BIT(5), 975de123485SJes Sorensen OCRDMA_QP_PARA_RETRY_CNT_VALID = BIT(6), 976de123485SJes Sorensen OCRDMA_QP_PARA_RRC_VALID = BIT(7), 977de123485SJes Sorensen OCRDMA_QP_PARA_RQPSN_VALID = BIT(8), 978de123485SJes Sorensen OCRDMA_QP_PARA_MAX_IRD_VALID = BIT(9), 979de123485SJes Sorensen OCRDMA_QP_PARA_MAX_ORD_VALID = BIT(10), 980de123485SJes Sorensen OCRDMA_QP_PARA_RNT_VALID = BIT(11), 981de123485SJes Sorensen OCRDMA_QP_PARA_SQPSN_VALID = BIT(12), 982de123485SJes Sorensen OCRDMA_QP_PARA_DST_QPN_VALID = BIT(13), 983de123485SJes Sorensen OCRDMA_QP_PARA_MAX_WQE_VALID = BIT(14), 984de123485SJes Sorensen OCRDMA_QP_PARA_MAX_RQE_VALID = BIT(15), 985de123485SJes Sorensen OCRDMA_QP_PARA_SGE_SEND_VALID = BIT(16), 986de123485SJes Sorensen OCRDMA_QP_PARA_SGE_RECV_VALID = BIT(17), 987de123485SJes Sorensen OCRDMA_QP_PARA_SGE_WR_VALID = BIT(18), 988de123485SJes Sorensen OCRDMA_QP_PARA_INB_RDEN_VALID = BIT(19), 989de123485SJes Sorensen OCRDMA_QP_PARA_INB_WREN_VALID = BIT(20), 990de123485SJes Sorensen OCRDMA_QP_PARA_FLOW_LBL_VALID = BIT(21), 991de123485SJes Sorensen OCRDMA_QP_PARA_BIND_EN_VALID = BIT(22), 992de123485SJes Sorensen OCRDMA_QP_PARA_ZLKEY_EN_VALID = BIT(23), 993de123485SJes Sorensen OCRDMA_QP_PARA_FMR_EN_VALID = BIT(24), 994de123485SJes Sorensen OCRDMA_QP_PARA_INBAT_EN_VALID = BIT(25), 995de123485SJes Sorensen OCRDMA_QP_PARA_VLAN_EN_VALID = BIT(26), 996fe2caefcSParav Pandit 997de123485SJes Sorensen OCRDMA_MODIFY_QP_FLAGS_RD = BIT(0), 998de123485SJes Sorensen OCRDMA_MODIFY_QP_FLAGS_WR = BIT(1), 999de123485SJes Sorensen OCRDMA_MODIFY_QP_FLAGS_SEND = BIT(2), 1000de123485SJes Sorensen OCRDMA_MODIFY_QP_FLAGS_ATOMIC = BIT(3) 1001fe2caefcSParav Pandit }; 1002fe2caefcSParav Pandit 1003fe2caefcSParav Pandit enum { 1004fe2caefcSParav Pandit OCRDMA_QP_PARAMS_SRQ_ID_SHIFT = 0, 1005fe2caefcSParav Pandit OCRDMA_QP_PARAMS_SRQ_ID_MASK = 0xFFFF, 1006fe2caefcSParav Pandit 1007fe2caefcSParav Pandit OCRDMA_QP_PARAMS_MAX_RQE_SHIFT = 0, 1008fe2caefcSParav Pandit OCRDMA_QP_PARAMS_MAX_RQE_MASK = 0xFFFF, 1009fe2caefcSParav Pandit OCRDMA_QP_PARAMS_MAX_WQE_SHIFT = 16, 1010fe2caefcSParav Pandit OCRDMA_QP_PARAMS_MAX_WQE_MASK = 0xFFFF << 1011fe2caefcSParav Pandit OCRDMA_QP_PARAMS_MAX_WQE_SHIFT, 1012fe2caefcSParav Pandit 1013fe2caefcSParav Pandit OCRDMA_QP_PARAMS_MAX_SGE_WRITE_SHIFT = 0, 1014fe2caefcSParav Pandit OCRDMA_QP_PARAMS_MAX_SGE_WRITE_MASK = 0xFFFF, 1015fe2caefcSParav Pandit OCRDMA_QP_PARAMS_MAX_SGE_SEND_SHIFT = 16, 1016fe2caefcSParav Pandit OCRDMA_QP_PARAMS_MAX_SGE_SEND_MASK = 0xFFFF << 1017fe2caefcSParav Pandit OCRDMA_QP_PARAMS_MAX_SGE_SEND_SHIFT, 1018fe2caefcSParav Pandit 1019de123485SJes Sorensen OCRDMA_QP_PARAMS_FLAGS_FMR_EN = BIT(0), 1020de123485SJes Sorensen OCRDMA_QP_PARAMS_FLAGS_LKEY_0_EN = BIT(1), 1021de123485SJes Sorensen OCRDMA_QP_PARAMS_FLAGS_BIND_MW_EN = BIT(2), 1022de123485SJes Sorensen OCRDMA_QP_PARAMS_FLAGS_INBWR_EN = BIT(3), 1023de123485SJes Sorensen OCRDMA_QP_PARAMS_FLAGS_INBRD_EN = BIT(4), 1024fe2caefcSParav Pandit OCRDMA_QP_PARAMS_STATE_SHIFT = 5, 1025de123485SJes Sorensen OCRDMA_QP_PARAMS_STATE_MASK = BIT(5) | BIT(6) | BIT(7), 1026de123485SJes Sorensen OCRDMA_QP_PARAMS_FLAGS_SQD_ASYNC = BIT(8), 1027de123485SJes Sorensen OCRDMA_QP_PARAMS_FLAGS_INB_ATEN = BIT(9), 1028fe2caefcSParav Pandit OCRDMA_QP_PARAMS_MAX_SGE_RECV_SHIFT = 16, 1029fe2caefcSParav Pandit OCRDMA_QP_PARAMS_MAX_SGE_RECV_MASK = 0xFFFF << 1030fe2caefcSParav Pandit OCRDMA_QP_PARAMS_MAX_SGE_RECV_SHIFT, 1031fe2caefcSParav Pandit 1032fe2caefcSParav Pandit OCRDMA_QP_PARAMS_MAX_IRD_SHIFT = 0, 1033fe2caefcSParav Pandit OCRDMA_QP_PARAMS_MAX_IRD_MASK = 0xFFFF, 1034fe2caefcSParav Pandit OCRDMA_QP_PARAMS_MAX_ORD_SHIFT = 16, 1035fe2caefcSParav Pandit OCRDMA_QP_PARAMS_MAX_ORD_MASK = 0xFFFF << 1036fe2caefcSParav Pandit OCRDMA_QP_PARAMS_MAX_ORD_SHIFT, 1037fe2caefcSParav Pandit 1038fe2caefcSParav Pandit OCRDMA_QP_PARAMS_RQ_CQID_SHIFT = 0, 1039fe2caefcSParav Pandit OCRDMA_QP_PARAMS_RQ_CQID_MASK = 0xFFFF, 1040fe2caefcSParav Pandit OCRDMA_QP_PARAMS_WQ_CQID_SHIFT = 16, 1041fe2caefcSParav Pandit OCRDMA_QP_PARAMS_WQ_CQID_MASK = 0xFFFF << 1042fe2caefcSParav Pandit OCRDMA_QP_PARAMS_WQ_CQID_SHIFT, 1043fe2caefcSParav Pandit 1044fe2caefcSParav Pandit OCRDMA_QP_PARAMS_RQ_PSN_SHIFT = 0, 1045fe2caefcSParav Pandit OCRDMA_QP_PARAMS_RQ_PSN_MASK = 0xFFFFFF, 1046fe2caefcSParav Pandit OCRDMA_QP_PARAMS_HOP_LMT_SHIFT = 24, 1047fe2caefcSParav Pandit OCRDMA_QP_PARAMS_HOP_LMT_MASK = 0xFF << 1048fe2caefcSParav Pandit OCRDMA_QP_PARAMS_HOP_LMT_SHIFT, 1049fe2caefcSParav Pandit 1050fe2caefcSParav Pandit OCRDMA_QP_PARAMS_SQ_PSN_SHIFT = 0, 1051fe2caefcSParav Pandit OCRDMA_QP_PARAMS_SQ_PSN_MASK = 0xFFFFFF, 1052fe2caefcSParav Pandit OCRDMA_QP_PARAMS_TCLASS_SHIFT = 24, 1053fe2caefcSParav Pandit OCRDMA_QP_PARAMS_TCLASS_MASK = 0xFF << 1054fe2caefcSParav Pandit OCRDMA_QP_PARAMS_TCLASS_SHIFT, 1055fe2caefcSParav Pandit 1056fe2caefcSParav Pandit OCRDMA_QP_PARAMS_DEST_QPN_SHIFT = 0, 1057fe2caefcSParav Pandit OCRDMA_QP_PARAMS_DEST_QPN_MASK = 0xFFFFFF, 1058fe2caefcSParav Pandit OCRDMA_QP_PARAMS_RNR_RETRY_CNT_SHIFT = 24, 1059fe2caefcSParav Pandit OCRDMA_QP_PARAMS_RNR_RETRY_CNT_MASK = 0x7 << 1060fe2caefcSParav Pandit OCRDMA_QP_PARAMS_RNR_RETRY_CNT_SHIFT, 1061fe2caefcSParav Pandit OCRDMA_QP_PARAMS_ACK_TIMEOUT_SHIFT = 27, 1062fe2caefcSParav Pandit OCRDMA_QP_PARAMS_ACK_TIMEOUT_MASK = 0x1F << 1063fe2caefcSParav Pandit OCRDMA_QP_PARAMS_ACK_TIMEOUT_SHIFT, 1064fe2caefcSParav Pandit 1065fe2caefcSParav Pandit OCRDMA_QP_PARAMS_PKEY_IDNEX_SHIFT = 0, 1066fe2caefcSParav Pandit OCRDMA_QP_PARAMS_PKEY_INDEX_MASK = 0xFFFF, 1067fe2caefcSParav Pandit OCRDMA_QP_PARAMS_PATH_MTU_SHIFT = 18, 1068fe2caefcSParav Pandit OCRDMA_QP_PARAMS_PATH_MTU_MASK = 0x3FFF << 1069fe2caefcSParav Pandit OCRDMA_QP_PARAMS_PATH_MTU_SHIFT, 1070fe2caefcSParav Pandit 1071fe2caefcSParav Pandit OCRDMA_QP_PARAMS_FLOW_LABEL_SHIFT = 0, 1072fe2caefcSParav Pandit OCRDMA_QP_PARAMS_FLOW_LABEL_MASK = 0xFFFFF, 1073fe2caefcSParav Pandit OCRDMA_QP_PARAMS_SL_SHIFT = 20, 1074fe2caefcSParav Pandit OCRDMA_QP_PARAMS_SL_MASK = 0xF << 1075fe2caefcSParav Pandit OCRDMA_QP_PARAMS_SL_SHIFT, 1076fe2caefcSParav Pandit OCRDMA_QP_PARAMS_RETRY_CNT_SHIFT = 24, 1077fe2caefcSParav Pandit OCRDMA_QP_PARAMS_RETRY_CNT_MASK = 0x7 << 1078fe2caefcSParav Pandit OCRDMA_QP_PARAMS_RETRY_CNT_SHIFT, 1079fe2caefcSParav Pandit OCRDMA_QP_PARAMS_RNR_NAK_TIMER_SHIFT = 27, 1080fe2caefcSParav Pandit OCRDMA_QP_PARAMS_RNR_NAK_TIMER_MASK = 0x1F << 1081fe2caefcSParav Pandit OCRDMA_QP_PARAMS_RNR_NAK_TIMER_SHIFT, 1082fe2caefcSParav Pandit 1083fe2caefcSParav Pandit OCRDMA_QP_PARAMS_DMAC_B4_TO_B5_SHIFT = 0, 1084fe2caefcSParav Pandit OCRDMA_QP_PARAMS_DMAC_B4_TO_B5_MASK = 0xFFFF, 1085fe2caefcSParav Pandit OCRDMA_QP_PARAMS_VLAN_SHIFT = 16, 1086fe2caefcSParav Pandit OCRDMA_QP_PARAMS_VLAN_MASK = 0xFFFF << 1087fe2caefcSParav Pandit OCRDMA_QP_PARAMS_VLAN_SHIFT 1088fe2caefcSParav Pandit }; 1089fe2caefcSParav Pandit 1090fe2caefcSParav Pandit struct ocrdma_qp_params { 1091fe2caefcSParav Pandit u32 id; 1092fe2caefcSParav Pandit u32 max_wqe_rqe; 1093fe2caefcSParav Pandit u32 max_sge_send_write; 1094fe2caefcSParav Pandit u32 max_sge_recv_flags; 1095fe2caefcSParav Pandit u32 max_ord_ird; 1096fe2caefcSParav Pandit u32 wq_rq_cqid; 1097fe2caefcSParav Pandit u32 hop_lmt_rq_psn; 1098fe2caefcSParav Pandit u32 tclass_sq_psn; 1099fe2caefcSParav Pandit u32 ack_to_rnr_rtc_dest_qpn; 1100fe2caefcSParav Pandit u32 path_mtu_pkey_indx; 1101fe2caefcSParav Pandit u32 rnt_rc_sl_fl; 1102fe2caefcSParav Pandit u8 sgid[16]; 1103fe2caefcSParav Pandit u8 dgid[16]; 1104fe2caefcSParav Pandit u32 dmac_b0_to_b3; 1105fe2caefcSParav Pandit u32 vlan_dmac_b4_to_b5; 1106fe2caefcSParav Pandit u32 qkey; 11077b9b1a59SNaresh Gottumukkala }; 1108fe2caefcSParav Pandit 1109fe2caefcSParav Pandit 1110fe2caefcSParav Pandit struct ocrdma_modify_qp { 1111fe2caefcSParav Pandit struct ocrdma_mqe_hdr hdr; 1112fe2caefcSParav Pandit struct ocrdma_mbx_hdr req; 1113fe2caefcSParav Pandit 1114fe2caefcSParav Pandit struct ocrdma_qp_params params; 1115fe2caefcSParav Pandit u32 flags; 1116fe2caefcSParav Pandit u32 rdma_flags; 1117fe2caefcSParav Pandit u32 num_outstanding_atomic_rd; 11187b9b1a59SNaresh Gottumukkala }; 1119fe2caefcSParav Pandit 1120fe2caefcSParav Pandit enum { 1121fe2caefcSParav Pandit OCRDMA_MODIFY_QP_RSP_MAX_RQE_SHIFT = 0, 1122fe2caefcSParav Pandit OCRDMA_MODIFY_QP_RSP_MAX_RQE_MASK = 0xFFFF, 1123fe2caefcSParav Pandit OCRDMA_MODIFY_QP_RSP_MAX_WQE_SHIFT = 16, 1124fe2caefcSParav Pandit OCRDMA_MODIFY_QP_RSP_MAX_WQE_MASK = 0xFFFF << 1125fe2caefcSParav Pandit OCRDMA_MODIFY_QP_RSP_MAX_WQE_SHIFT, 1126fe2caefcSParav Pandit 1127fe2caefcSParav Pandit OCRDMA_MODIFY_QP_RSP_MAX_IRD_SHIFT = 0, 1128fe2caefcSParav Pandit OCRDMA_MODIFY_QP_RSP_MAX_IRD_MASK = 0xFFFF, 1129fe2caefcSParav Pandit OCRDMA_MODIFY_QP_RSP_MAX_ORD_SHIFT = 16, 1130fe2caefcSParav Pandit OCRDMA_MODIFY_QP_RSP_MAX_ORD_MASK = 0xFFFF << 1131fe2caefcSParav Pandit OCRDMA_MODIFY_QP_RSP_MAX_ORD_SHIFT 1132fe2caefcSParav Pandit }; 1133fad51b7dSDevesh Sharma 1134fe2caefcSParav Pandit struct ocrdma_modify_qp_rsp { 1135fe2caefcSParav Pandit struct ocrdma_mqe_hdr hdr; 1136fe2caefcSParav Pandit struct ocrdma_mbx_rsp rsp; 1137fe2caefcSParav Pandit 1138fe2caefcSParav Pandit u32 max_wqe_rqe; 1139fe2caefcSParav Pandit u32 max_ord_ird; 11407b9b1a59SNaresh Gottumukkala }; 1141fe2caefcSParav Pandit 1142fe2caefcSParav Pandit struct ocrdma_query_qp { 1143fe2caefcSParav Pandit struct ocrdma_mqe_hdr hdr; 1144fe2caefcSParav Pandit struct ocrdma_mbx_hdr req; 1145fe2caefcSParav Pandit 1146fe2caefcSParav Pandit #define OCRDMA_QUERY_UP_QP_ID_SHIFT 0 1147fe2caefcSParav Pandit #define OCRDMA_QUERY_UP_QP_ID_MASK 0xFFFFFF 1148fe2caefcSParav Pandit u32 qp_id; 11497b9b1a59SNaresh Gottumukkala }; 1150fe2caefcSParav Pandit 1151fe2caefcSParav Pandit struct ocrdma_query_qp_rsp { 1152fe2caefcSParav Pandit struct ocrdma_mqe_hdr hdr; 1153fe2caefcSParav Pandit struct ocrdma_mbx_rsp rsp; 1154fe2caefcSParav Pandit struct ocrdma_qp_params params; 11557b9b1a59SNaresh Gottumukkala }; 1156fe2caefcSParav Pandit 1157fe2caefcSParav Pandit enum { 1158fe2caefcSParav Pandit OCRDMA_CREATE_SRQ_PD_ID_SHIFT = 0, 1159fe2caefcSParav Pandit OCRDMA_CREATE_SRQ_PD_ID_MASK = 0xFFFF, 1160fe2caefcSParav Pandit OCRDMA_CREATE_SRQ_PG_SZ_SHIFT = 16, 1161fe2caefcSParav Pandit OCRDMA_CREATE_SRQ_PG_SZ_MASK = 0x3 << 1162fe2caefcSParav Pandit OCRDMA_CREATE_SRQ_PG_SZ_SHIFT, 1163fe2caefcSParav Pandit 1164fe2caefcSParav Pandit OCRDMA_CREATE_SRQ_MAX_RQE_SHIFT = 0, 1165fe2caefcSParav Pandit OCRDMA_CREATE_SRQ_MAX_SGE_RECV_SHIFT = 16, 1166fe2caefcSParav Pandit OCRDMA_CREATE_SRQ_MAX_SGE_RECV_MASK = 0xFFFF << 1167fe2caefcSParav Pandit OCRDMA_CREATE_SRQ_MAX_SGE_RECV_SHIFT, 1168fe2caefcSParav Pandit 1169fe2caefcSParav Pandit OCRDMA_CREATE_SRQ_RQE_SIZE_SHIFT = 0, 1170fe2caefcSParav Pandit OCRDMA_CREATE_SRQ_RQE_SIZE_MASK = 0xFFFF, 1171fe2caefcSParav Pandit OCRDMA_CREATE_SRQ_NUM_RQ_PAGES_SHIFT = 16, 1172fe2caefcSParav Pandit OCRDMA_CREATE_SRQ_NUM_RQ_PAGES_MASK = 0xFFFF << 1173fe2caefcSParav Pandit OCRDMA_CREATE_SRQ_NUM_RQ_PAGES_SHIFT 1174fe2caefcSParav Pandit }; 1175fe2caefcSParav Pandit 1176fe2caefcSParav Pandit struct ocrdma_create_srq { 1177fe2caefcSParav Pandit struct ocrdma_mqe_hdr hdr; 1178fe2caefcSParav Pandit struct ocrdma_mbx_hdr req; 1179fe2caefcSParav Pandit 1180fe2caefcSParav Pandit u32 pgsz_pdid; 1181fe2caefcSParav Pandit u32 max_sge_rqe; 1182fe2caefcSParav Pandit u32 pages_rqe_sz; 1183fe2caefcSParav Pandit struct ocrdma_pa rq_addr[MAX_OCRDMA_SRQ_PAGES]; 11847b9b1a59SNaresh Gottumukkala }; 1185fe2caefcSParav Pandit 1186fe2caefcSParav Pandit enum { 1187fe2caefcSParav Pandit OCRDMA_CREATE_SRQ_RSP_SRQ_ID_SHIFT = 0, 1188fe2caefcSParav Pandit OCRDMA_CREATE_SRQ_RSP_SRQ_ID_MASK = 0xFFFFFF, 1189fe2caefcSParav Pandit 1190fe2caefcSParav Pandit OCRDMA_CREATE_SRQ_RSP_MAX_RQE_ALLOCATED_SHIFT = 0, 1191fe2caefcSParav Pandit OCRDMA_CREATE_SRQ_RSP_MAX_RQE_ALLOCATED_MASK = 0xFFFF, 1192fe2caefcSParav Pandit OCRDMA_CREATE_SRQ_RSP_MAX_SGE_RECV_ALLOCATED_SHIFT = 16, 1193fe2caefcSParav Pandit OCRDMA_CREATE_SRQ_RSP_MAX_SGE_RECV_ALLOCATED_MASK = 0xFFFF << 1194fe2caefcSParav Pandit OCRDMA_CREATE_SRQ_RSP_MAX_SGE_RECV_ALLOCATED_SHIFT 1195fe2caefcSParav Pandit }; 1196fe2caefcSParav Pandit 1197fe2caefcSParav Pandit struct ocrdma_create_srq_rsp { 1198fe2caefcSParav Pandit struct ocrdma_mqe_hdr hdr; 1199fe2caefcSParav Pandit struct ocrdma_mbx_rsp rsp; 1200fe2caefcSParav Pandit 1201fe2caefcSParav Pandit u32 id; 1202fe2caefcSParav Pandit u32 max_sge_rqe_allocated; 12037b9b1a59SNaresh Gottumukkala }; 1204fe2caefcSParav Pandit 1205fe2caefcSParav Pandit enum { 1206fe2caefcSParav Pandit OCRDMA_MODIFY_SRQ_ID_SHIFT = 0, 1207fe2caefcSParav Pandit OCRDMA_MODIFY_SRQ_ID_MASK = 0xFFFFFF, 1208fe2caefcSParav Pandit 1209fe2caefcSParav Pandit OCRDMA_MODIFY_SRQ_MAX_RQE_SHIFT = 0, 1210fe2caefcSParav Pandit OCRDMA_MODIFY_SRQ_MAX_RQE_MASK = 0xFFFF, 1211fe2caefcSParav Pandit OCRDMA_MODIFY_SRQ_LIMIT_SHIFT = 16, 1212fe2caefcSParav Pandit OCRDMA_MODIFY_SRQ__LIMIT_MASK = 0xFFFF << 1213fe2caefcSParav Pandit OCRDMA_MODIFY_SRQ_LIMIT_SHIFT 1214fe2caefcSParav Pandit }; 1215fe2caefcSParav Pandit 1216fe2caefcSParav Pandit struct ocrdma_modify_srq { 1217fe2caefcSParav Pandit struct ocrdma_mqe_hdr hdr; 1218fe2caefcSParav Pandit struct ocrdma_mbx_rsp rep; 1219fe2caefcSParav Pandit 1220fe2caefcSParav Pandit u32 id; 1221fe2caefcSParav Pandit u32 limit_max_rqe; 12227b9b1a59SNaresh Gottumukkala }; 1223fe2caefcSParav Pandit 1224fe2caefcSParav Pandit enum { 1225fe2caefcSParav Pandit OCRDMA_QUERY_SRQ_ID_SHIFT = 0, 1226fe2caefcSParav Pandit OCRDMA_QUERY_SRQ_ID_MASK = 0xFFFFFF 1227fe2caefcSParav Pandit }; 1228fe2caefcSParav Pandit 1229fe2caefcSParav Pandit struct ocrdma_query_srq { 1230fe2caefcSParav Pandit struct ocrdma_mqe_hdr hdr; 1231fe2caefcSParav Pandit struct ocrdma_mbx_rsp req; 1232fe2caefcSParav Pandit 1233fe2caefcSParav Pandit u32 id; 12347b9b1a59SNaresh Gottumukkala }; 1235fe2caefcSParav Pandit 1236fe2caefcSParav Pandit enum { 1237fe2caefcSParav Pandit OCRDMA_QUERY_SRQ_RSP_PD_ID_SHIFT = 0, 1238fe2caefcSParav Pandit OCRDMA_QUERY_SRQ_RSP_PD_ID_MASK = 0xFFFF, 1239fe2caefcSParav Pandit OCRDMA_QUERY_SRQ_RSP_MAX_RQE_SHIFT = 16, 1240fe2caefcSParav Pandit OCRDMA_QUERY_SRQ_RSP_MAX_RQE_MASK = 0xFFFF << 1241fe2caefcSParav Pandit OCRDMA_QUERY_SRQ_RSP_MAX_RQE_SHIFT, 1242fe2caefcSParav Pandit 1243fe2caefcSParav Pandit OCRDMA_QUERY_SRQ_RSP_MAX_SGE_RECV_SHIFT = 0, 1244fe2caefcSParav Pandit OCRDMA_QUERY_SRQ_RSP_MAX_SGE_RECV_MASK = 0xFFFF, 1245fe2caefcSParav Pandit OCRDMA_QUERY_SRQ_RSP_SRQ_LIMIT_SHIFT = 16, 1246fe2caefcSParav Pandit OCRDMA_QUERY_SRQ_RSP_SRQ_LIMIT_MASK = 0xFFFF << 1247fe2caefcSParav Pandit OCRDMA_QUERY_SRQ_RSP_SRQ_LIMIT_SHIFT 1248fe2caefcSParav Pandit }; 1249fe2caefcSParav Pandit 1250fe2caefcSParav Pandit struct ocrdma_query_srq_rsp { 1251fe2caefcSParav Pandit struct ocrdma_mqe_hdr hdr; 1252fe2caefcSParav Pandit struct ocrdma_mbx_rsp req; 1253fe2caefcSParav Pandit 1254fe2caefcSParav Pandit u32 max_rqe_pdid; 1255fe2caefcSParav Pandit u32 srq_lmt_max_sge; 12567b9b1a59SNaresh Gottumukkala }; 1257fe2caefcSParav Pandit 1258fe2caefcSParav Pandit enum { 1259fe2caefcSParav Pandit OCRDMA_DESTROY_SRQ_ID_SHIFT = 0, 1260fe2caefcSParav Pandit OCRDMA_DESTROY_SRQ_ID_MASK = 0xFFFFFF 1261fe2caefcSParav Pandit }; 1262fe2caefcSParav Pandit 1263fe2caefcSParav Pandit struct ocrdma_destroy_srq { 1264fe2caefcSParav Pandit struct ocrdma_mqe_hdr hdr; 1265fe2caefcSParav Pandit struct ocrdma_mbx_rsp req; 1266fe2caefcSParav Pandit 1267fe2caefcSParav Pandit u32 id; 12687b9b1a59SNaresh Gottumukkala }; 1269fe2caefcSParav Pandit 1270fe2caefcSParav Pandit enum { 1271fe2caefcSParav Pandit OCRDMA_ALLOC_PD_ENABLE_DPP = BIT(16), 1272fe2caefcSParav Pandit OCRDMA_DPP_PAGE_SIZE = 4096 1273fe2caefcSParav Pandit }; 1274fe2caefcSParav Pandit 1275fe2caefcSParav Pandit struct ocrdma_alloc_pd { 1276fe2caefcSParav Pandit struct ocrdma_mqe_hdr hdr; 1277fe2caefcSParav Pandit struct ocrdma_mbx_hdr req; 1278fe2caefcSParav Pandit u32 enable_dpp_rsvd; 12797b9b1a59SNaresh Gottumukkala }; 1280fe2caefcSParav Pandit 1281fe2caefcSParav Pandit enum { 1282de123485SJes Sorensen OCRDMA_ALLOC_PD_RSP_DPP = BIT(16), 1283fe2caefcSParav Pandit OCRDMA_ALLOC_PD_RSP_DPP_PAGE_SHIFT = 20, 1284fe2caefcSParav Pandit OCRDMA_ALLOC_PD_RSP_PDID_MASK = 0xFFFF, 1285fe2caefcSParav Pandit }; 1286fe2caefcSParav Pandit 1287fe2caefcSParav Pandit struct ocrdma_alloc_pd_rsp { 1288fe2caefcSParav Pandit struct ocrdma_mqe_hdr hdr; 1289fe2caefcSParav Pandit struct ocrdma_mbx_rsp rsp; 1290fe2caefcSParav Pandit u32 dpp_page_pdid; 12917b9b1a59SNaresh Gottumukkala }; 1292fe2caefcSParav Pandit 1293fe2caefcSParav Pandit struct ocrdma_dealloc_pd { 1294fe2caefcSParav Pandit struct ocrdma_mqe_hdr hdr; 1295fe2caefcSParav Pandit struct ocrdma_mbx_hdr req; 1296fe2caefcSParav Pandit u32 id; 12977b9b1a59SNaresh Gottumukkala }; 1298fe2caefcSParav Pandit 1299fe2caefcSParav Pandit struct ocrdma_dealloc_pd_rsp { 1300fe2caefcSParav Pandit struct ocrdma_mqe_hdr hdr; 1301fe2caefcSParav Pandit struct ocrdma_mbx_rsp rsp; 13027b9b1a59SNaresh Gottumukkala }; 1303fe2caefcSParav Pandit 13049ba1377dSMitesh Ahuja struct ocrdma_alloc_pd_range { 13059ba1377dSMitesh Ahuja struct ocrdma_mqe_hdr hdr; 13069ba1377dSMitesh Ahuja struct ocrdma_mbx_hdr req; 13079ba1377dSMitesh Ahuja u32 enable_dpp_rsvd; 13089ba1377dSMitesh Ahuja u32 pd_count; 13099ba1377dSMitesh Ahuja }; 13109ba1377dSMitesh Ahuja 13119ba1377dSMitesh Ahuja struct ocrdma_alloc_pd_range_rsp { 13129ba1377dSMitesh Ahuja struct ocrdma_mqe_hdr hdr; 13139ba1377dSMitesh Ahuja struct ocrdma_mbx_rsp rsp; 13149ba1377dSMitesh Ahuja u32 dpp_page_pdid; 13159ba1377dSMitesh Ahuja u32 pd_count; 13169ba1377dSMitesh Ahuja }; 13179ba1377dSMitesh Ahuja 13189ba1377dSMitesh Ahuja enum { 13199ba1377dSMitesh Ahuja OCRDMA_ALLOC_PD_RNG_RSP_START_PDID_MASK = 0xFFFF, 13209ba1377dSMitesh Ahuja }; 13219ba1377dSMitesh Ahuja 13229ba1377dSMitesh Ahuja struct ocrdma_dealloc_pd_range { 13239ba1377dSMitesh Ahuja struct ocrdma_mqe_hdr hdr; 13249ba1377dSMitesh Ahuja struct ocrdma_mbx_hdr req; 13259ba1377dSMitesh Ahuja u32 start_pd_id; 13269ba1377dSMitesh Ahuja u32 pd_count; 13279ba1377dSMitesh Ahuja }; 13289ba1377dSMitesh Ahuja 13299ba1377dSMitesh Ahuja struct ocrdma_dealloc_pd_range_rsp { 13309ba1377dSMitesh Ahuja struct ocrdma_mqe_hdr hdr; 13319ba1377dSMitesh Ahuja struct ocrdma_mbx_hdr req; 13329ba1377dSMitesh Ahuja u32 rsvd; 13339ba1377dSMitesh Ahuja }; 13349ba1377dSMitesh Ahuja 1335fe2caefcSParav Pandit enum { 1336fe2caefcSParav Pandit OCRDMA_ADDR_CHECK_ENABLE = 1, 1337fe2caefcSParav Pandit OCRDMA_ADDR_CHECK_DISABLE = 0 1338fe2caefcSParav Pandit }; 1339fe2caefcSParav Pandit 1340fe2caefcSParav Pandit enum { 1341fe2caefcSParav Pandit OCRDMA_ALLOC_LKEY_PD_ID_SHIFT = 0, 1342fe2caefcSParav Pandit OCRDMA_ALLOC_LKEY_PD_ID_MASK = 0xFFFF, 1343fe2caefcSParav Pandit 1344fe2caefcSParav Pandit OCRDMA_ALLOC_LKEY_ADDR_CHECK_SHIFT = 0, 1345de123485SJes Sorensen OCRDMA_ALLOC_LKEY_ADDR_CHECK_MASK = BIT(0), 1346fe2caefcSParav Pandit OCRDMA_ALLOC_LKEY_FMR_SHIFT = 1, 1347de123485SJes Sorensen OCRDMA_ALLOC_LKEY_FMR_MASK = BIT(1), 1348fe2caefcSParav Pandit OCRDMA_ALLOC_LKEY_REMOTE_INV_SHIFT = 2, 1349de123485SJes Sorensen OCRDMA_ALLOC_LKEY_REMOTE_INV_MASK = BIT(2), 1350fe2caefcSParav Pandit OCRDMA_ALLOC_LKEY_REMOTE_WR_SHIFT = 3, 1351de123485SJes Sorensen OCRDMA_ALLOC_LKEY_REMOTE_WR_MASK = BIT(3), 1352fe2caefcSParav Pandit OCRDMA_ALLOC_LKEY_REMOTE_RD_SHIFT = 4, 1353de123485SJes Sorensen OCRDMA_ALLOC_LKEY_REMOTE_RD_MASK = BIT(4), 1354fe2caefcSParav Pandit OCRDMA_ALLOC_LKEY_LOCAL_WR_SHIFT = 5, 1355de123485SJes Sorensen OCRDMA_ALLOC_LKEY_LOCAL_WR_MASK = BIT(5), 1356de123485SJes Sorensen OCRDMA_ALLOC_LKEY_REMOTE_ATOMIC_MASK = BIT(6), 1357fe2caefcSParav Pandit OCRDMA_ALLOC_LKEY_REMOTE_ATOMIC_SHIFT = 6, 1358fe2caefcSParav Pandit OCRDMA_ALLOC_LKEY_PBL_SIZE_SHIFT = 16, 1359fe2caefcSParav Pandit OCRDMA_ALLOC_LKEY_PBL_SIZE_MASK = 0xFFFF << 1360fe2caefcSParav Pandit OCRDMA_ALLOC_LKEY_PBL_SIZE_SHIFT 1361fe2caefcSParav Pandit }; 1362fe2caefcSParav Pandit 1363fe2caefcSParav Pandit struct ocrdma_alloc_lkey { 1364fe2caefcSParav Pandit struct ocrdma_mqe_hdr hdr; 1365fe2caefcSParav Pandit struct ocrdma_mbx_hdr req; 1366fe2caefcSParav Pandit 1367fe2caefcSParav Pandit u32 pdid; 1368fe2caefcSParav Pandit u32 pbl_sz_flags; 13697b9b1a59SNaresh Gottumukkala }; 1370fe2caefcSParav Pandit 1371fe2caefcSParav Pandit struct ocrdma_alloc_lkey_rsp { 1372fe2caefcSParav Pandit struct ocrdma_mqe_hdr hdr; 1373fe2caefcSParav Pandit struct ocrdma_mbx_rsp rsp; 1374fe2caefcSParav Pandit 1375fe2caefcSParav Pandit u32 lrkey; 1376fe2caefcSParav Pandit u32 num_pbl_rsvd; 13777b9b1a59SNaresh Gottumukkala }; 1378fe2caefcSParav Pandit 1379fe2caefcSParav Pandit struct ocrdma_dealloc_lkey { 1380fe2caefcSParav Pandit struct ocrdma_mqe_hdr hdr; 1381fe2caefcSParav Pandit struct ocrdma_mbx_hdr req; 1382fe2caefcSParav Pandit 1383fe2caefcSParav Pandit u32 lkey; 1384fe2caefcSParav Pandit u32 rsvd_frmr; 13857b9b1a59SNaresh Gottumukkala }; 1386fe2caefcSParav Pandit 1387fe2caefcSParav Pandit struct ocrdma_dealloc_lkey_rsp { 1388fe2caefcSParav Pandit struct ocrdma_mqe_hdr hdr; 1389fe2caefcSParav Pandit struct ocrdma_mbx_rsp rsp; 13907b9b1a59SNaresh Gottumukkala }; 1391fe2caefcSParav Pandit 1392fe2caefcSParav Pandit #define MAX_OCRDMA_NSMR_PBL (u32)22 1393fe2caefcSParav Pandit #define MAX_OCRDMA_PBL_SIZE 65536 1394fe2caefcSParav Pandit #define MAX_OCRDMA_PBL_PER_LKEY 32767 1395fe2caefcSParav Pandit 1396fe2caefcSParav Pandit enum { 1397fe2caefcSParav Pandit OCRDMA_REG_NSMR_LRKEY_INDEX_SHIFT = 0, 1398fe2caefcSParav Pandit OCRDMA_REG_NSMR_LRKEY_INDEX_MASK = 0xFFFFFF, 1399fe2caefcSParav Pandit OCRDMA_REG_NSMR_LRKEY_SHIFT = 24, 1400fe2caefcSParav Pandit OCRDMA_REG_NSMR_LRKEY_MASK = 0xFF << 1401fe2caefcSParav Pandit OCRDMA_REG_NSMR_LRKEY_SHIFT, 1402fe2caefcSParav Pandit 1403fe2caefcSParav Pandit OCRDMA_REG_NSMR_PD_ID_SHIFT = 0, 1404fe2caefcSParav Pandit OCRDMA_REG_NSMR_PD_ID_MASK = 0xFFFF, 1405fe2caefcSParav Pandit OCRDMA_REG_NSMR_NUM_PBL_SHIFT = 16, 1406fe2caefcSParav Pandit OCRDMA_REG_NSMR_NUM_PBL_MASK = 0xFFFF << 1407fe2caefcSParav Pandit OCRDMA_REG_NSMR_NUM_PBL_SHIFT, 1408fe2caefcSParav Pandit 1409fe2caefcSParav Pandit OCRDMA_REG_NSMR_PBE_SIZE_SHIFT = 0, 1410fe2caefcSParav Pandit OCRDMA_REG_NSMR_PBE_SIZE_MASK = 0xFFFF, 1411fe2caefcSParav Pandit OCRDMA_REG_NSMR_HPAGE_SIZE_SHIFT = 16, 1412fe2caefcSParav Pandit OCRDMA_REG_NSMR_HPAGE_SIZE_MASK = 0xFF << 1413fe2caefcSParav Pandit OCRDMA_REG_NSMR_HPAGE_SIZE_SHIFT, 1414fe2caefcSParav Pandit OCRDMA_REG_NSMR_BIND_MEMWIN_SHIFT = 24, 1415de123485SJes Sorensen OCRDMA_REG_NSMR_BIND_MEMWIN_MASK = BIT(24), 1416fe2caefcSParav Pandit OCRDMA_REG_NSMR_ZB_SHIFT = 25, 1417de123485SJes Sorensen OCRDMA_REG_NSMR_ZB_SHIFT_MASK = BIT(25), 1418fe2caefcSParav Pandit OCRDMA_REG_NSMR_REMOTE_INV_SHIFT = 26, 1419de123485SJes Sorensen OCRDMA_REG_NSMR_REMOTE_INV_MASK = BIT(26), 1420fe2caefcSParav Pandit OCRDMA_REG_NSMR_REMOTE_WR_SHIFT = 27, 1421de123485SJes Sorensen OCRDMA_REG_NSMR_REMOTE_WR_MASK = BIT(27), 1422fe2caefcSParav Pandit OCRDMA_REG_NSMR_REMOTE_RD_SHIFT = 28, 1423de123485SJes Sorensen OCRDMA_REG_NSMR_REMOTE_RD_MASK = BIT(28), 1424fe2caefcSParav Pandit OCRDMA_REG_NSMR_LOCAL_WR_SHIFT = 29, 1425de123485SJes Sorensen OCRDMA_REG_NSMR_LOCAL_WR_MASK = BIT(29), 1426fe2caefcSParav Pandit OCRDMA_REG_NSMR_REMOTE_ATOMIC_SHIFT = 30, 1427de123485SJes Sorensen OCRDMA_REG_NSMR_REMOTE_ATOMIC_MASK = BIT(30), 1428fe2caefcSParav Pandit OCRDMA_REG_NSMR_LAST_SHIFT = 31, 1429de123485SJes Sorensen OCRDMA_REG_NSMR_LAST_MASK = BIT(31) 1430fe2caefcSParav Pandit }; 1431fe2caefcSParav Pandit 1432fe2caefcSParav Pandit struct ocrdma_reg_nsmr { 1433fe2caefcSParav Pandit struct ocrdma_mqe_hdr hdr; 1434fe2caefcSParav Pandit struct ocrdma_mbx_hdr cmd; 1435fe2caefcSParav Pandit 14362b51a9b9SNaresh Gottumukkala u32 fr_mr; 1437fe2caefcSParav Pandit u32 num_pbl_pdid; 1438fe2caefcSParav Pandit u32 flags_hpage_pbe_sz; 1439fe2caefcSParav Pandit u32 totlen_low; 1440fe2caefcSParav Pandit u32 totlen_high; 1441fe2caefcSParav Pandit u32 fbo_low; 1442fe2caefcSParav Pandit u32 fbo_high; 1443fe2caefcSParav Pandit u32 va_loaddr; 1444fe2caefcSParav Pandit u32 va_hiaddr; 1445fe2caefcSParav Pandit struct ocrdma_pa pbl[MAX_OCRDMA_NSMR_PBL]; 14467b9b1a59SNaresh Gottumukkala }; 1447fe2caefcSParav Pandit 1448fe2caefcSParav Pandit enum { 1449fe2caefcSParav Pandit OCRDMA_REG_NSMR_CONT_PBL_SHIFT = 0, 1450fe2caefcSParav Pandit OCRDMA_REG_NSMR_CONT_PBL_SHIFT_MASK = 0xFFFF, 1451fe2caefcSParav Pandit OCRDMA_REG_NSMR_CONT_NUM_PBL_SHIFT = 16, 1452fe2caefcSParav Pandit OCRDMA_REG_NSMR_CONT_NUM_PBL_MASK = 0xFFFF << 1453fe2caefcSParav Pandit OCRDMA_REG_NSMR_CONT_NUM_PBL_SHIFT, 1454fe2caefcSParav Pandit 1455fe2caefcSParav Pandit OCRDMA_REG_NSMR_CONT_LAST_SHIFT = 31, 1456de123485SJes Sorensen OCRDMA_REG_NSMR_CONT_LAST_MASK = BIT(31) 1457fe2caefcSParav Pandit }; 1458fe2caefcSParav Pandit 1459fe2caefcSParav Pandit struct ocrdma_reg_nsmr_cont { 1460fe2caefcSParav Pandit struct ocrdma_mqe_hdr hdr; 1461fe2caefcSParav Pandit struct ocrdma_mbx_hdr cmd; 1462fe2caefcSParav Pandit 1463fe2caefcSParav Pandit u32 lrkey; 1464fe2caefcSParav Pandit u32 num_pbl_offset; 1465fe2caefcSParav Pandit u32 last; 1466fe2caefcSParav Pandit 1467fe2caefcSParav Pandit struct ocrdma_pa pbl[MAX_OCRDMA_NSMR_PBL]; 146845e86b33SNaresh Gottumukkala }; 1469fe2caefcSParav Pandit 1470fe2caefcSParav Pandit struct ocrdma_pbe { 1471fe2caefcSParav Pandit u32 pa_hi; 1472fe2caefcSParav Pandit u32 pa_lo; 14737b9b1a59SNaresh Gottumukkala }; 1474fe2caefcSParav Pandit 1475fe2caefcSParav Pandit enum { 1476fe2caefcSParav Pandit OCRDMA_REG_NSMR_RSP_NUM_PBL_SHIFT = 16, 1477fe2caefcSParav Pandit OCRDMA_REG_NSMR_RSP_NUM_PBL_MASK = 0xFFFF0000 1478fe2caefcSParav Pandit }; 1479fe2caefcSParav Pandit struct ocrdma_reg_nsmr_rsp { 1480fe2caefcSParav Pandit struct ocrdma_mqe_hdr hdr; 1481fe2caefcSParav Pandit struct ocrdma_mbx_rsp rsp; 1482fe2caefcSParav Pandit 1483fe2caefcSParav Pandit u32 lrkey; 1484fe2caefcSParav Pandit u32 num_pbl; 14857b9b1a59SNaresh Gottumukkala }; 1486fe2caefcSParav Pandit 1487fe2caefcSParav Pandit enum { 1488fe2caefcSParav Pandit OCRDMA_REG_NSMR_CONT_RSP_LRKEY_INDEX_SHIFT = 0, 1489fe2caefcSParav Pandit OCRDMA_REG_NSMR_CONT_RSP_LRKEY_INDEX_MASK = 0xFFFFFF, 1490fe2caefcSParav Pandit OCRDMA_REG_NSMR_CONT_RSP_LRKEY_SHIFT = 24, 1491fe2caefcSParav Pandit OCRDMA_REG_NSMR_CONT_RSP_LRKEY_MASK = 0xFF << 1492fe2caefcSParav Pandit OCRDMA_REG_NSMR_CONT_RSP_LRKEY_SHIFT, 1493fe2caefcSParav Pandit 1494fe2caefcSParav Pandit OCRDMA_REG_NSMR_CONT_RSP_NUM_PBL_SHIFT = 16, 1495fe2caefcSParav Pandit OCRDMA_REG_NSMR_CONT_RSP_NUM_PBL_MASK = 0xFFFF << 1496fe2caefcSParav Pandit OCRDMA_REG_NSMR_CONT_RSP_NUM_PBL_SHIFT 1497fe2caefcSParav Pandit }; 1498fe2caefcSParav Pandit 1499fe2caefcSParav Pandit struct ocrdma_reg_nsmr_cont_rsp { 1500fe2caefcSParav Pandit struct ocrdma_mqe_hdr hdr; 1501fe2caefcSParav Pandit struct ocrdma_mbx_rsp rsp; 1502fe2caefcSParav Pandit 1503fe2caefcSParav Pandit u32 lrkey_key_index; 1504fe2caefcSParav Pandit u32 num_pbl; 15057b9b1a59SNaresh Gottumukkala }; 1506fe2caefcSParav Pandit 1507fe2caefcSParav Pandit enum { 1508fe2caefcSParav Pandit OCRDMA_ALLOC_MW_PD_ID_SHIFT = 0, 1509fe2caefcSParav Pandit OCRDMA_ALLOC_MW_PD_ID_MASK = 0xFFFF 1510fe2caefcSParav Pandit }; 1511fe2caefcSParav Pandit 1512fe2caefcSParav Pandit struct ocrdma_alloc_mw { 1513fe2caefcSParav Pandit struct ocrdma_mqe_hdr hdr; 1514fe2caefcSParav Pandit struct ocrdma_mbx_hdr req; 1515fe2caefcSParav Pandit 1516fe2caefcSParav Pandit u32 pdid; 15177b9b1a59SNaresh Gottumukkala }; 1518fe2caefcSParav Pandit 1519fe2caefcSParav Pandit enum { 1520fe2caefcSParav Pandit OCRDMA_ALLOC_MW_RSP_LRKEY_INDEX_SHIFT = 0, 1521fe2caefcSParav Pandit OCRDMA_ALLOC_MW_RSP_LRKEY_INDEX_MASK = 0xFFFFFF 1522fe2caefcSParav Pandit }; 1523fe2caefcSParav Pandit 1524fe2caefcSParav Pandit struct ocrdma_alloc_mw_rsp { 1525fe2caefcSParav Pandit struct ocrdma_mqe_hdr hdr; 1526fe2caefcSParav Pandit struct ocrdma_mbx_rsp rsp; 1527fe2caefcSParav Pandit 1528fe2caefcSParav Pandit u32 lrkey_index; 15297b9b1a59SNaresh Gottumukkala }; 1530fe2caefcSParav Pandit 1531fe2caefcSParav Pandit struct ocrdma_attach_mcast { 1532fe2caefcSParav Pandit struct ocrdma_mqe_hdr hdr; 1533fe2caefcSParav Pandit struct ocrdma_mbx_hdr req; 1534fe2caefcSParav Pandit u32 qp_id; 1535fe2caefcSParav Pandit u8 mgid[16]; 1536fe2caefcSParav Pandit u32 mac_b0_to_b3; 1537fe2caefcSParav Pandit u32 vlan_mac_b4_to_b5; 15387b9b1a59SNaresh Gottumukkala }; 1539fe2caefcSParav Pandit 1540fe2caefcSParav Pandit struct ocrdma_attach_mcast_rsp { 1541fe2caefcSParav Pandit struct ocrdma_mqe_hdr hdr; 1542fe2caefcSParav Pandit struct ocrdma_mbx_rsp rsp; 15437b9b1a59SNaresh Gottumukkala }; 1544fe2caefcSParav Pandit 1545fe2caefcSParav Pandit struct ocrdma_detach_mcast { 1546fe2caefcSParav Pandit struct ocrdma_mqe_hdr hdr; 1547fe2caefcSParav Pandit struct ocrdma_mbx_hdr req; 1548fe2caefcSParav Pandit u32 qp_id; 1549fe2caefcSParav Pandit u8 mgid[16]; 1550fe2caefcSParav Pandit u32 mac_b0_to_b3; 1551fe2caefcSParav Pandit u32 vlan_mac_b4_to_b5; 15527b9b1a59SNaresh Gottumukkala }; 1553fe2caefcSParav Pandit 1554fe2caefcSParav Pandit struct ocrdma_detach_mcast_rsp { 1555fe2caefcSParav Pandit struct ocrdma_mqe_hdr hdr; 1556fe2caefcSParav Pandit struct ocrdma_mbx_rsp rsp; 15577b9b1a59SNaresh Gottumukkala }; 1558fe2caefcSParav Pandit 1559fe2caefcSParav Pandit enum { 1560fe2caefcSParav Pandit OCRDMA_CREATE_AH_NUM_PAGES_SHIFT = 19, 1561fe2caefcSParav Pandit OCRDMA_CREATE_AH_NUM_PAGES_MASK = 0xF << 1562fe2caefcSParav Pandit OCRDMA_CREATE_AH_NUM_PAGES_SHIFT, 1563fe2caefcSParav Pandit 1564fe2caefcSParav Pandit OCRDMA_CREATE_AH_PAGE_SIZE_SHIFT = 16, 1565fe2caefcSParav Pandit OCRDMA_CREATE_AH_PAGE_SIZE_MASK = 0x7 << 1566fe2caefcSParav Pandit OCRDMA_CREATE_AH_PAGE_SIZE_SHIFT, 1567fe2caefcSParav Pandit 1568fe2caefcSParav Pandit OCRDMA_CREATE_AH_ENTRY_SIZE_SHIFT = 23, 1569fe2caefcSParav Pandit OCRDMA_CREATE_AH_ENTRY_SIZE_MASK = 0x1FF << 1570fe2caefcSParav Pandit OCRDMA_CREATE_AH_ENTRY_SIZE_SHIFT, 1571fe2caefcSParav Pandit }; 1572fe2caefcSParav Pandit 1573fe2caefcSParav Pandit #define OCRDMA_AH_TBL_PAGES 8 1574fe2caefcSParav Pandit 1575fe2caefcSParav Pandit struct ocrdma_create_ah_tbl { 1576fe2caefcSParav Pandit struct ocrdma_mqe_hdr hdr; 1577fe2caefcSParav Pandit struct ocrdma_mbx_hdr req; 1578fe2caefcSParav Pandit 1579fe2caefcSParav Pandit u32 ah_conf; 1580fe2caefcSParav Pandit struct ocrdma_pa tbl_addr[8]; 15817b9b1a59SNaresh Gottumukkala }; 1582fe2caefcSParav Pandit 1583fe2caefcSParav Pandit struct ocrdma_create_ah_tbl_rsp { 1584fe2caefcSParav Pandit struct ocrdma_mqe_hdr hdr; 1585fe2caefcSParav Pandit struct ocrdma_mbx_rsp rsp; 1586fe2caefcSParav Pandit u32 ahid; 15877b9b1a59SNaresh Gottumukkala }; 1588fe2caefcSParav Pandit 1589fe2caefcSParav Pandit struct ocrdma_delete_ah_tbl { 1590fe2caefcSParav Pandit struct ocrdma_mqe_hdr hdr; 1591fe2caefcSParav Pandit struct ocrdma_mbx_hdr req; 1592fe2caefcSParav Pandit u32 ahid; 15937b9b1a59SNaresh Gottumukkala }; 1594fe2caefcSParav Pandit 1595fe2caefcSParav Pandit struct ocrdma_delete_ah_tbl_rsp { 1596fe2caefcSParav Pandit struct ocrdma_mqe_hdr hdr; 1597fe2caefcSParav Pandit struct ocrdma_mbx_rsp rsp; 15987b9b1a59SNaresh Gottumukkala }; 1599fe2caefcSParav Pandit 1600fe2caefcSParav Pandit enum { 1601fe2caefcSParav Pandit OCRDMA_EQE_VALID_SHIFT = 0, 1602de123485SJes Sorensen OCRDMA_EQE_VALID_MASK = BIT(0), 1603fe2caefcSParav Pandit OCRDMA_EQE_FOR_CQE_MASK = 0xFFFE, 1604fe2caefcSParav Pandit OCRDMA_EQE_RESOURCE_ID_SHIFT = 16, 1605fe2caefcSParav Pandit OCRDMA_EQE_RESOURCE_ID_MASK = 0xFFFF << 1606fe2caefcSParav Pandit OCRDMA_EQE_RESOURCE_ID_SHIFT, 1607fe2caefcSParav Pandit }; 1608fe2caefcSParav Pandit 1609fe2caefcSParav Pandit struct ocrdma_eqe { 1610fe2caefcSParav Pandit u32 id_valid; 16117b9b1a59SNaresh Gottumukkala }; 1612fe2caefcSParav Pandit 1613fe2caefcSParav Pandit enum OCRDMA_CQE_STATUS { 1614fe2caefcSParav Pandit OCRDMA_CQE_SUCCESS = 0, 1615fe2caefcSParav Pandit OCRDMA_CQE_LOC_LEN_ERR, 1616fe2caefcSParav Pandit OCRDMA_CQE_LOC_QP_OP_ERR, 1617fe2caefcSParav Pandit OCRDMA_CQE_LOC_EEC_OP_ERR, 1618fe2caefcSParav Pandit OCRDMA_CQE_LOC_PROT_ERR, 1619fe2caefcSParav Pandit OCRDMA_CQE_WR_FLUSH_ERR, 1620fe2caefcSParav Pandit OCRDMA_CQE_MW_BIND_ERR, 1621fe2caefcSParav Pandit OCRDMA_CQE_BAD_RESP_ERR, 1622fe2caefcSParav Pandit OCRDMA_CQE_LOC_ACCESS_ERR, 1623fe2caefcSParav Pandit OCRDMA_CQE_REM_INV_REQ_ERR, 1624fe2caefcSParav Pandit OCRDMA_CQE_REM_ACCESS_ERR, 1625fe2caefcSParav Pandit OCRDMA_CQE_REM_OP_ERR, 1626fe2caefcSParav Pandit OCRDMA_CQE_RETRY_EXC_ERR, 1627fe2caefcSParav Pandit OCRDMA_CQE_RNR_RETRY_EXC_ERR, 1628fe2caefcSParav Pandit OCRDMA_CQE_LOC_RDD_VIOL_ERR, 1629fe2caefcSParav Pandit OCRDMA_CQE_REM_INV_RD_REQ_ERR, 1630fe2caefcSParav Pandit OCRDMA_CQE_REM_ABORT_ERR, 1631fe2caefcSParav Pandit OCRDMA_CQE_INV_EECN_ERR, 1632fe2caefcSParav Pandit OCRDMA_CQE_INV_EEC_STATE_ERR, 1633fe2caefcSParav Pandit OCRDMA_CQE_FATAL_ERR, 1634fe2caefcSParav Pandit OCRDMA_CQE_RESP_TIMEOUT_ERR, 1635ad56ebb4SSelvin Xavier OCRDMA_CQE_GENERAL_ERR, 1636ad56ebb4SSelvin Xavier 1637ad56ebb4SSelvin Xavier OCRDMA_MAX_CQE_ERR 1638fe2caefcSParav Pandit }; 1639fe2caefcSParav Pandit 1640fe2caefcSParav Pandit enum { 1641fe2caefcSParav Pandit /* w0 */ 1642fe2caefcSParav Pandit OCRDMA_CQE_WQEIDX_SHIFT = 0, 1643fe2caefcSParav Pandit OCRDMA_CQE_WQEIDX_MASK = 0xFFFF, 1644fe2caefcSParav Pandit 1645fe2caefcSParav Pandit /* w1 */ 1646fe2caefcSParav Pandit OCRDMA_CQE_UD_XFER_LEN_SHIFT = 16, 1647fe2caefcSParav Pandit OCRDMA_CQE_PKEY_SHIFT = 0, 1648fe2caefcSParav Pandit OCRDMA_CQE_PKEY_MASK = 0xFFFF, 1649fe2caefcSParav Pandit 1650fe2caefcSParav Pandit /* w2 */ 1651fe2caefcSParav Pandit OCRDMA_CQE_QPN_SHIFT = 0, 1652fe2caefcSParav Pandit OCRDMA_CQE_QPN_MASK = 0x0000FFFF, 1653fe2caefcSParav Pandit 1654fe2caefcSParav Pandit OCRDMA_CQE_BUFTAG_SHIFT = 16, 1655fe2caefcSParav Pandit OCRDMA_CQE_BUFTAG_MASK = 0xFFFF << OCRDMA_CQE_BUFTAG_SHIFT, 1656fe2caefcSParav Pandit 1657fe2caefcSParav Pandit /* w3 */ 1658fe2caefcSParav Pandit OCRDMA_CQE_UD_STATUS_SHIFT = 24, 1659fe2caefcSParav Pandit OCRDMA_CQE_UD_STATUS_MASK = 0x7 << OCRDMA_CQE_UD_STATUS_SHIFT, 1660fe2caefcSParav Pandit OCRDMA_CQE_STATUS_SHIFT = 16, 1661fe2caefcSParav Pandit OCRDMA_CQE_STATUS_MASK = 0xFF << OCRDMA_CQE_STATUS_SHIFT, 1662de123485SJes Sorensen OCRDMA_CQE_VALID = BIT(31), 1663de123485SJes Sorensen OCRDMA_CQE_INVALIDATE = BIT(30), 1664de123485SJes Sorensen OCRDMA_CQE_QTYPE = BIT(29), 1665de123485SJes Sorensen OCRDMA_CQE_IMM = BIT(28), 1666de123485SJes Sorensen OCRDMA_CQE_WRITE_IMM = BIT(27), 1667fe2caefcSParav Pandit OCRDMA_CQE_QTYPE_SQ = 0, 1668fe2caefcSParav Pandit OCRDMA_CQE_QTYPE_RQ = 1, 1669fe2caefcSParav Pandit OCRDMA_CQE_SRCQP_MASK = 0xFFFFFF 1670fe2caefcSParav Pandit }; 1671fe2caefcSParav Pandit 1672fe2caefcSParav Pandit struct ocrdma_cqe { 1673fe2caefcSParav Pandit union { 1674fe2caefcSParav Pandit /* w0 to w2 */ 1675fe2caefcSParav Pandit struct { 1676fe2caefcSParav Pandit u32 wqeidx; 1677fe2caefcSParav Pandit u32 bytes_xfered; 1678fe2caefcSParav Pandit u32 qpn; 1679fe2caefcSParav Pandit } wq; 1680fe2caefcSParav Pandit struct { 1681fe2caefcSParav Pandit u32 lkey_immdt; 1682fe2caefcSParav Pandit u32 rxlen; 1683fe2caefcSParav Pandit u32 buftag_qpn; 1684fe2caefcSParav Pandit } rq; 1685fe2caefcSParav Pandit struct { 1686fe2caefcSParav Pandit u32 lkey_immdt; 1687fe2caefcSParav Pandit u32 rxlen_pkey; 1688fe2caefcSParav Pandit u32 buftag_qpn; 1689fe2caefcSParav Pandit } ud; 1690fe2caefcSParav Pandit struct { 1691fe2caefcSParav Pandit u32 word_0; 1692fe2caefcSParav Pandit u32 word_1; 1693fe2caefcSParav Pandit u32 qpn; 1694fe2caefcSParav Pandit } cmn; 1695fe2caefcSParav Pandit }; 1696fe2caefcSParav Pandit u32 flags_status_srcqpn; /* w3 */ 16977b9b1a59SNaresh Gottumukkala }; 1698fe2caefcSParav Pandit 1699fe2caefcSParav Pandit struct ocrdma_sge { 1700fe2caefcSParav Pandit u32 addr_hi; 1701fe2caefcSParav Pandit u32 addr_lo; 1702fe2caefcSParav Pandit u32 lrkey; 1703fe2caefcSParav Pandit u32 len; 17047b9b1a59SNaresh Gottumukkala }; 1705fe2caefcSParav Pandit 1706fe2caefcSParav Pandit enum { 1707fe2caefcSParav Pandit OCRDMA_FLAG_SIG = 0x1, 1708fe2caefcSParav Pandit OCRDMA_FLAG_INV = 0x2, 1709fe2caefcSParav Pandit OCRDMA_FLAG_FENCE_L = 0x4, 1710fe2caefcSParav Pandit OCRDMA_FLAG_FENCE_R = 0x8, 1711fe2caefcSParav Pandit OCRDMA_FLAG_SOLICIT = 0x10, 1712fe2caefcSParav Pandit OCRDMA_FLAG_IMM = 0x20, 1713fe2caefcSParav Pandit 1714fe2caefcSParav Pandit /* Stag flags */ 1715fe2caefcSParav Pandit OCRDMA_LKEY_FLAG_LOCAL_WR = 0x1, 1716fe2caefcSParav Pandit OCRDMA_LKEY_FLAG_REMOTE_RD = 0x2, 1717fe2caefcSParav Pandit OCRDMA_LKEY_FLAG_REMOTE_WR = 0x4, 1718fe2caefcSParav Pandit OCRDMA_LKEY_FLAG_VATO = 0x8, 1719fe2caefcSParav Pandit }; 1720fe2caefcSParav Pandit 1721fe2caefcSParav Pandit enum OCRDMA_WQE_OPCODE { 1722fe2caefcSParav Pandit OCRDMA_WRITE = 0x06, 1723fe2caefcSParav Pandit OCRDMA_READ = 0x0C, 1724fe2caefcSParav Pandit OCRDMA_RESV0 = 0x02, 1725fe2caefcSParav Pandit OCRDMA_SEND = 0x00, 1726fe2caefcSParav Pandit OCRDMA_CMP_SWP = 0x14, 1727fe2caefcSParav Pandit OCRDMA_BIND_MW = 0x10, 17287c33880cSNaresh Gottumukkala OCRDMA_FR_MR = 0x11, 1729fe2caefcSParav Pandit OCRDMA_RESV1 = 0x0A, 1730fe2caefcSParav Pandit OCRDMA_LKEY_INV = 0x15, 1731fe2caefcSParav Pandit OCRDMA_FETCH_ADD = 0x13, 1732fe2caefcSParav Pandit OCRDMA_POST_RQ = 0x12 1733fe2caefcSParav Pandit }; 1734fe2caefcSParav Pandit 1735fe2caefcSParav Pandit enum { 1736fe2caefcSParav Pandit OCRDMA_TYPE_INLINE = 0x0, 1737fe2caefcSParav Pandit OCRDMA_TYPE_LKEY = 0x1, 1738fe2caefcSParav Pandit }; 1739fe2caefcSParav Pandit 1740fe2caefcSParav Pandit enum { 1741fe2caefcSParav Pandit OCRDMA_WQE_OPCODE_SHIFT = 0, 1742fe2caefcSParav Pandit OCRDMA_WQE_OPCODE_MASK = 0x0000001F, 1743fe2caefcSParav Pandit OCRDMA_WQE_FLAGS_SHIFT = 5, 1744fe2caefcSParav Pandit OCRDMA_WQE_TYPE_SHIFT = 16, 1745fe2caefcSParav Pandit OCRDMA_WQE_TYPE_MASK = 0x00030000, 1746fe2caefcSParav Pandit OCRDMA_WQE_SIZE_SHIFT = 18, 1747fe2caefcSParav Pandit OCRDMA_WQE_SIZE_MASK = 0xFF, 1748fe2caefcSParav Pandit OCRDMA_WQE_NXT_WQE_SIZE_SHIFT = 25, 1749fe2caefcSParav Pandit 1750fe2caefcSParav Pandit OCRDMA_WQE_LKEY_FLAGS_SHIFT = 0, 1751fe2caefcSParav Pandit OCRDMA_WQE_LKEY_FLAGS_MASK = 0xF 1752fe2caefcSParav Pandit }; 1753fe2caefcSParav Pandit 1754fe2caefcSParav Pandit /* header WQE for all the SQ and RQ operations */ 1755fe2caefcSParav Pandit struct ocrdma_hdr_wqe { 1756fe2caefcSParav Pandit u32 cw; 1757fe2caefcSParav Pandit union { 1758fe2caefcSParav Pandit u32 rsvd_tag; 1759fe2caefcSParav Pandit u32 rsvd_lkey_flags; 1760fe2caefcSParav Pandit }; 1761fe2caefcSParav Pandit union { 1762fe2caefcSParav Pandit u32 immdt; 1763fe2caefcSParav Pandit u32 lkey; 1764fe2caefcSParav Pandit }; 1765fe2caefcSParav Pandit u32 total_len; 17667b9b1a59SNaresh Gottumukkala }; 1767fe2caefcSParav Pandit 1768fe2caefcSParav Pandit struct ocrdma_ewqe_ud_hdr { 1769fe2caefcSParav Pandit u32 rsvd_dest_qpn; 1770fe2caefcSParav Pandit u32 qkey; 1771fe2caefcSParav Pandit u32 rsvd_ahid; 1772fe2caefcSParav Pandit u32 rsvd; 17737b9b1a59SNaresh Gottumukkala }; 1774fe2caefcSParav Pandit 17757c33880cSNaresh Gottumukkala /* extended wqe followed by hdr_wqe for Fast Memory register */ 17767c33880cSNaresh Gottumukkala struct ocrdma_ewqe_fr { 17777c33880cSNaresh Gottumukkala u32 va_hi; 17787c33880cSNaresh Gottumukkala u32 va_lo; 17797c33880cSNaresh Gottumukkala u32 fbo_hi; 17807c33880cSNaresh Gottumukkala u32 fbo_lo; 17817c33880cSNaresh Gottumukkala u32 size_sge; 17827c33880cSNaresh Gottumukkala u32 num_sges; 17832b51a9b9SNaresh Gottumukkala u32 rsvd; 17842b51a9b9SNaresh Gottumukkala u32 rsvd2; 17857c33880cSNaresh Gottumukkala }; 17867c33880cSNaresh Gottumukkala 1787fe2caefcSParav Pandit struct ocrdma_eth_basic { 1788fe2caefcSParav Pandit u8 dmac[6]; 1789fe2caefcSParav Pandit u8 smac[6]; 1790fe2caefcSParav Pandit __be16 eth_type; 1791fe2caefcSParav Pandit } __packed; 1792fe2caefcSParav Pandit 1793fe2caefcSParav Pandit struct ocrdma_eth_vlan { 1794fe2caefcSParav Pandit u8 dmac[6]; 1795fe2caefcSParav Pandit u8 smac[6]; 1796fe2caefcSParav Pandit __be16 eth_type; 1797fe2caefcSParav Pandit __be16 vlan_tag; 1798fe2caefcSParav Pandit #define OCRDMA_ROCE_ETH_TYPE 0x8915 1799fe2caefcSParav Pandit __be16 roce_eth_type; 1800fe2caefcSParav Pandit } __packed; 1801fe2caefcSParav Pandit 1802fe2caefcSParav Pandit struct ocrdma_grh { 1803fe2caefcSParav Pandit __be32 tclass_flow; 1804fe2caefcSParav Pandit __be32 pdid_hoplimit; 1805fe2caefcSParav Pandit u8 sgid[16]; 1806fe2caefcSParav Pandit u8 dgid[16]; 1807fe2caefcSParav Pandit u16 rsvd; 1808fe2caefcSParav Pandit } __packed; 1809fe2caefcSParav Pandit 1810de123485SJes Sorensen #define OCRDMA_AV_VALID BIT(7) 1811de123485SJes Sorensen #define OCRDMA_AV_VLAN_VALID BIT(1) 1812fe2caefcSParav Pandit 1813fe2caefcSParav Pandit struct ocrdma_av { 1814fe2caefcSParav Pandit struct ocrdma_eth_vlan eth_hdr; 1815fe2caefcSParav Pandit struct ocrdma_grh grh; 1816fe2caefcSParav Pandit u32 valid; 1817fe2caefcSParav Pandit } __packed; 1818fe2caefcSParav Pandit 1819a51f06e1SSelvin Xavier struct ocrdma_rsrc_stats { 1820a51f06e1SSelvin Xavier u32 dpp_pds; 1821a51f06e1SSelvin Xavier u32 non_dpp_pds; 1822a51f06e1SSelvin Xavier u32 rc_dpp_qps; 1823a51f06e1SSelvin Xavier u32 uc_dpp_qps; 1824a51f06e1SSelvin Xavier u32 ud_dpp_qps; 1825a51f06e1SSelvin Xavier u32 rc_non_dpp_qps; 1826a51f06e1SSelvin Xavier u32 rsvd; 1827a51f06e1SSelvin Xavier u32 uc_non_dpp_qps; 1828a51f06e1SSelvin Xavier u32 ud_non_dpp_qps; 1829a51f06e1SSelvin Xavier u32 rsvd1; 1830a51f06e1SSelvin Xavier u32 srqs; 1831a51f06e1SSelvin Xavier u32 rbqs; 1832a51f06e1SSelvin Xavier u32 r64K_nsmr; 1833a51f06e1SSelvin Xavier u32 r64K_to_2M_nsmr; 1834a51f06e1SSelvin Xavier u32 r2M_to_44M_nsmr; 1835a51f06e1SSelvin Xavier u32 r44M_to_1G_nsmr; 1836a51f06e1SSelvin Xavier u32 r1G_to_4G_nsmr; 1837a51f06e1SSelvin Xavier u32 nsmr_count_4G_to_32G; 1838a51f06e1SSelvin Xavier u32 r32G_to_64G_nsmr; 1839a51f06e1SSelvin Xavier u32 r64G_to_128G_nsmr; 1840a51f06e1SSelvin Xavier u32 r128G_to_higher_nsmr; 1841a51f06e1SSelvin Xavier u32 embedded_nsmr; 1842a51f06e1SSelvin Xavier u32 frmr; 1843a51f06e1SSelvin Xavier u32 prefetch_qps; 1844a51f06e1SSelvin Xavier u32 ondemand_qps; 1845a51f06e1SSelvin Xavier u32 phy_mr; 1846a51f06e1SSelvin Xavier u32 mw; 1847a51f06e1SSelvin Xavier u32 rsvd2[7]; 1848a51f06e1SSelvin Xavier }; 1849a51f06e1SSelvin Xavier 1850a51f06e1SSelvin Xavier struct ocrdma_db_err_stats { 1851a51f06e1SSelvin Xavier u32 sq_doorbell_errors; 1852a51f06e1SSelvin Xavier u32 cq_doorbell_errors; 1853a51f06e1SSelvin Xavier u32 rq_srq_doorbell_errors; 1854a51f06e1SSelvin Xavier u32 cq_overflow_errors; 1855a51f06e1SSelvin Xavier u32 rsvd[4]; 1856a51f06e1SSelvin Xavier }; 1857a51f06e1SSelvin Xavier 1858a51f06e1SSelvin Xavier struct ocrdma_wqe_stats { 1859a51f06e1SSelvin Xavier u32 large_send_rc_wqes_lo; 1860a51f06e1SSelvin Xavier u32 large_send_rc_wqes_hi; 1861a51f06e1SSelvin Xavier u32 large_write_rc_wqes_lo; 1862a51f06e1SSelvin Xavier u32 large_write_rc_wqes_hi; 1863a51f06e1SSelvin Xavier u32 rsvd[4]; 1864a51f06e1SSelvin Xavier u32 read_wqes_lo; 1865a51f06e1SSelvin Xavier u32 read_wqes_hi; 1866a51f06e1SSelvin Xavier u32 frmr_wqes_lo; 1867a51f06e1SSelvin Xavier u32 frmr_wqes_hi; 1868a51f06e1SSelvin Xavier u32 mw_bind_wqes_lo; 1869a51f06e1SSelvin Xavier u32 mw_bind_wqes_hi; 1870a51f06e1SSelvin Xavier u32 invalidate_wqes_lo; 1871a51f06e1SSelvin Xavier u32 invalidate_wqes_hi; 1872a51f06e1SSelvin Xavier u32 rsvd1[2]; 1873a51f06e1SSelvin Xavier u32 dpp_wqe_drops; 1874a51f06e1SSelvin Xavier u32 rsvd2[5]; 1875a51f06e1SSelvin Xavier }; 1876a51f06e1SSelvin Xavier 1877a51f06e1SSelvin Xavier struct ocrdma_tx_stats { 1878a51f06e1SSelvin Xavier u32 send_pkts_lo; 1879a51f06e1SSelvin Xavier u32 send_pkts_hi; 1880a51f06e1SSelvin Xavier u32 write_pkts_lo; 1881a51f06e1SSelvin Xavier u32 write_pkts_hi; 1882a51f06e1SSelvin Xavier u32 read_pkts_lo; 1883a51f06e1SSelvin Xavier u32 read_pkts_hi; 1884a51f06e1SSelvin Xavier u32 read_rsp_pkts_lo; 1885a51f06e1SSelvin Xavier u32 read_rsp_pkts_hi; 1886a51f06e1SSelvin Xavier u32 ack_pkts_lo; 1887a51f06e1SSelvin Xavier u32 ack_pkts_hi; 1888a51f06e1SSelvin Xavier u32 send_bytes_lo; 1889a51f06e1SSelvin Xavier u32 send_bytes_hi; 1890a51f06e1SSelvin Xavier u32 write_bytes_lo; 1891a51f06e1SSelvin Xavier u32 write_bytes_hi; 1892a51f06e1SSelvin Xavier u32 read_req_bytes_lo; 1893a51f06e1SSelvin Xavier u32 read_req_bytes_hi; 1894a51f06e1SSelvin Xavier u32 read_rsp_bytes_lo; 1895a51f06e1SSelvin Xavier u32 read_rsp_bytes_hi; 1896a51f06e1SSelvin Xavier u32 ack_timeouts; 1897a51f06e1SSelvin Xavier u32 rsvd[5]; 1898a51f06e1SSelvin Xavier }; 1899a51f06e1SSelvin Xavier 1900a51f06e1SSelvin Xavier 1901a51f06e1SSelvin Xavier struct ocrdma_tx_qp_err_stats { 1902a51f06e1SSelvin Xavier u32 local_length_errors; 1903a51f06e1SSelvin Xavier u32 local_protection_errors; 1904a51f06e1SSelvin Xavier u32 local_qp_operation_errors; 1905a51f06e1SSelvin Xavier u32 retry_count_exceeded_errors; 1906a51f06e1SSelvin Xavier u32 rnr_retry_count_exceeded_errors; 1907a51f06e1SSelvin Xavier u32 rsvd[3]; 1908a51f06e1SSelvin Xavier }; 1909a51f06e1SSelvin Xavier 1910a51f06e1SSelvin Xavier struct ocrdma_rx_stats { 1911a51f06e1SSelvin Xavier u32 roce_frame_bytes_lo; 1912a51f06e1SSelvin Xavier u32 roce_frame_bytes_hi; 1913a51f06e1SSelvin Xavier u32 roce_frame_icrc_drops; 1914a51f06e1SSelvin Xavier u32 roce_frame_payload_len_drops; 1915a51f06e1SSelvin Xavier u32 ud_drops; 1916a51f06e1SSelvin Xavier u32 qp1_drops; 1917a51f06e1SSelvin Xavier u32 psn_error_request_packets; 1918a51f06e1SSelvin Xavier u32 psn_error_resp_packets; 1919a51f06e1SSelvin Xavier u32 rnr_nak_timeouts; 1920a51f06e1SSelvin Xavier u32 rnr_nak_receives; 1921a51f06e1SSelvin Xavier u32 roce_frame_rxmt_drops; 1922a51f06e1SSelvin Xavier u32 nak_count_psn_sequence_errors; 1923a51f06e1SSelvin Xavier u32 rc_drop_count_lookup_errors; 1924a51f06e1SSelvin Xavier u32 rq_rnr_naks; 1925a51f06e1SSelvin Xavier u32 srq_rnr_naks; 1926a51f06e1SSelvin Xavier u32 roce_frames_lo; 1927a51f06e1SSelvin Xavier u32 roce_frames_hi; 1928a51f06e1SSelvin Xavier u32 rsvd; 1929a51f06e1SSelvin Xavier }; 1930a51f06e1SSelvin Xavier 1931a51f06e1SSelvin Xavier struct ocrdma_rx_qp_err_stats { 1932a51f06e1SSelvin Xavier u32 nak_invalid_requst_errors; 1933a51f06e1SSelvin Xavier u32 nak_remote_operation_errors; 1934a51f06e1SSelvin Xavier u32 nak_count_remote_access_errors; 1935a51f06e1SSelvin Xavier u32 local_length_errors; 1936a51f06e1SSelvin Xavier u32 local_protection_errors; 1937a51f06e1SSelvin Xavier u32 local_qp_operation_errors; 1938a51f06e1SSelvin Xavier u32 rsvd[2]; 1939a51f06e1SSelvin Xavier }; 1940a51f06e1SSelvin Xavier 1941a51f06e1SSelvin Xavier struct ocrdma_tx_dbg_stats { 1942a51f06e1SSelvin Xavier u32 data[100]; 1943a51f06e1SSelvin Xavier }; 1944a51f06e1SSelvin Xavier 1945a51f06e1SSelvin Xavier struct ocrdma_rx_dbg_stats { 1946a51f06e1SSelvin Xavier u32 data[200]; 1947a51f06e1SSelvin Xavier }; 1948a51f06e1SSelvin Xavier 1949a51f06e1SSelvin Xavier struct ocrdma_rdma_stats_req { 1950a51f06e1SSelvin Xavier struct ocrdma_mbx_hdr hdr; 1951a51f06e1SSelvin Xavier u8 reset_stats; 1952a51f06e1SSelvin Xavier u8 rsvd[3]; 1953a51f06e1SSelvin Xavier } __packed; 1954a51f06e1SSelvin Xavier 1955a51f06e1SSelvin Xavier struct ocrdma_rdma_stats_resp { 1956a51f06e1SSelvin Xavier struct ocrdma_mbx_hdr hdr; 1957a51f06e1SSelvin Xavier struct ocrdma_rsrc_stats act_rsrc_stats; 1958a51f06e1SSelvin Xavier struct ocrdma_rsrc_stats th_rsrc_stats; 1959a51f06e1SSelvin Xavier struct ocrdma_db_err_stats db_err_stats; 1960a51f06e1SSelvin Xavier struct ocrdma_wqe_stats wqe_stats; 1961a51f06e1SSelvin Xavier struct ocrdma_tx_stats tx_stats; 1962a51f06e1SSelvin Xavier struct ocrdma_tx_qp_err_stats tx_qp_err_stats; 1963a51f06e1SSelvin Xavier struct ocrdma_rx_stats rx_stats; 1964a51f06e1SSelvin Xavier struct ocrdma_rx_qp_err_stats rx_qp_err_stats; 1965a51f06e1SSelvin Xavier struct ocrdma_tx_dbg_stats tx_dbg_stats; 1966a51f06e1SSelvin Xavier struct ocrdma_rx_dbg_stats rx_dbg_stats; 1967a51f06e1SSelvin Xavier } __packed; 1968a51f06e1SSelvin Xavier 19698ac0c7c7SDevesh Sharma enum { 19708ac0c7c7SDevesh Sharma OCRDMA_HBA_ATTRB_EPROM_VER_LO_MASK = 0xFF, 19718ac0c7c7SDevesh Sharma OCRDMA_HBA_ATTRB_EPROM_VER_HI_MASK = 0xFF00, 19728ac0c7c7SDevesh Sharma OCRDMA_HBA_ATTRB_EPROM_VER_HI_SHIFT = 0x08, 19738ac0c7c7SDevesh Sharma OCRDMA_HBA_ATTRB_CDBLEN_MASK = 0xFFFF, 19748ac0c7c7SDevesh Sharma OCRDMA_HBA_ATTRB_ASIC_REV_MASK = 0xFF0000, 19758ac0c7c7SDevesh Sharma OCRDMA_HBA_ATTRB_ASIC_REV_SHIFT = 0x10, 19768ac0c7c7SDevesh Sharma OCRDMA_HBA_ATTRB_GUID0_MASK = 0xFF000000, 19778ac0c7c7SDevesh Sharma OCRDMA_HBA_ATTRB_GUID0_SHIFT = 0x18, 19788ac0c7c7SDevesh Sharma OCRDMA_HBA_ATTRB_GUID13_MASK = 0xFF, 19798ac0c7c7SDevesh Sharma OCRDMA_HBA_ATTRB_GUID14_MASK = 0xFF00, 19808ac0c7c7SDevesh Sharma OCRDMA_HBA_ATTRB_GUID14_SHIFT = 0x08, 19818ac0c7c7SDevesh Sharma OCRDMA_HBA_ATTRB_GUID15_MASK = 0xFF0000, 19828ac0c7c7SDevesh Sharma OCRDMA_HBA_ATTRB_GUID15_SHIFT = 0x10, 19838ac0c7c7SDevesh Sharma OCRDMA_HBA_ATTRB_PCNT_MASK = 0xFF000000, 19848ac0c7c7SDevesh Sharma OCRDMA_HBA_ATTRB_PCNT_SHIFT = 0x18, 19858ac0c7c7SDevesh Sharma OCRDMA_HBA_ATTRB_LDTOUT_MASK = 0xFFFF, 19868ac0c7c7SDevesh Sharma OCRDMA_HBA_ATTRB_ISCSI_VER_MASK = 0xFF0000, 19878ac0c7c7SDevesh Sharma OCRDMA_HBA_ATTRB_ISCSI_VER_SHIFT = 0x10, 19888ac0c7c7SDevesh Sharma OCRDMA_HBA_ATTRB_MFUNC_DEV_MASK = 0xFF000000, 19898ac0c7c7SDevesh Sharma OCRDMA_HBA_ATTRB_MFUNC_DEV_SHIFT = 0x18, 19908ac0c7c7SDevesh Sharma OCRDMA_HBA_ATTRB_CV_MASK = 0xFF, 19918ac0c7c7SDevesh Sharma OCRDMA_HBA_ATTRB_HBA_ST_MASK = 0xFF00, 19928ac0c7c7SDevesh Sharma OCRDMA_HBA_ATTRB_HBA_ST_SHIFT = 0x08, 19938ac0c7c7SDevesh Sharma OCRDMA_HBA_ATTRB_MAX_DOMS_MASK = 0xFF0000, 19948ac0c7c7SDevesh Sharma OCRDMA_HBA_ATTRB_MAX_DOMS_SHIFT = 0x10, 19958ac0c7c7SDevesh Sharma OCRDMA_HBA_ATTRB_PTNUM_MASK = 0x3F000000, 19968ac0c7c7SDevesh Sharma OCRDMA_HBA_ATTRB_PTNUM_SHIFT = 0x18, 19978ac0c7c7SDevesh Sharma OCRDMA_HBA_ATTRB_PT_MASK = 0xC0000000, 19988ac0c7c7SDevesh Sharma OCRDMA_HBA_ATTRB_PT_SHIFT = 0x1E, 19998ac0c7c7SDevesh Sharma OCRDMA_HBA_ATTRB_ISCSI_FET_MASK = 0xFF, 20008ac0c7c7SDevesh Sharma OCRDMA_HBA_ATTRB_ASIC_GEN_MASK = 0xFF00, 20018ac0c7c7SDevesh Sharma OCRDMA_HBA_ATTRB_ASIC_GEN_SHIFT = 0x08, 20028ac0c7c7SDevesh Sharma OCRDMA_HBA_ATTRB_PCI_VID_MASK = 0xFFFF, 20038ac0c7c7SDevesh Sharma OCRDMA_HBA_ATTRB_PCI_DID_MASK = 0xFFFF0000, 20048ac0c7c7SDevesh Sharma OCRDMA_HBA_ATTRB_PCI_DID_SHIFT = 0x10, 20058ac0c7c7SDevesh Sharma OCRDMA_HBA_ATTRB_PCI_SVID_MASK = 0xFFFF, 20068ac0c7c7SDevesh Sharma OCRDMA_HBA_ATTRB_PCI_SSID_MASK = 0xFFFF0000, 20078ac0c7c7SDevesh Sharma OCRDMA_HBA_ATTRB_PCI_SSID_SHIFT = 0x10, 20088ac0c7c7SDevesh Sharma OCRDMA_HBA_ATTRB_PCI_BUSNUM_MASK = 0xFF, 20098ac0c7c7SDevesh Sharma OCRDMA_HBA_ATTRB_PCI_DEVNUM_MASK = 0xFF00, 20108ac0c7c7SDevesh Sharma OCRDMA_HBA_ATTRB_PCI_DEVNUM_SHIFT = 0x08, 20118ac0c7c7SDevesh Sharma OCRDMA_HBA_ATTRB_PCI_FUNCNUM_MASK = 0xFF0000, 20128ac0c7c7SDevesh Sharma OCRDMA_HBA_ATTRB_PCI_FUNCNUM_SHIFT = 0x10, 20138ac0c7c7SDevesh Sharma OCRDMA_HBA_ATTRB_IF_TYPE_MASK = 0xFF000000, 20148ac0c7c7SDevesh Sharma OCRDMA_HBA_ATTRB_IF_TYPE_SHIFT = 0x18, 20158ac0c7c7SDevesh Sharma OCRDMA_HBA_ATTRB_NETFIL_MASK =0xFF 20168ac0c7c7SDevesh Sharma }; 2017a51f06e1SSelvin Xavier 2018a51f06e1SSelvin Xavier struct mgmt_hba_attribs { 2019a51f06e1SSelvin Xavier u8 flashrom_version_string[32]; 2020a51f06e1SSelvin Xavier u8 manufacturer_name[32]; 2021a51f06e1SSelvin Xavier u32 supported_modes; 20228ac0c7c7SDevesh Sharma u32 rsvd_eprom_verhi_verlo; 20238ac0c7c7SDevesh Sharma u32 mbx_ds_ver; 20248ac0c7c7SDevesh Sharma u32 epfw_ds_ver; 2025a51f06e1SSelvin Xavier u8 ncsi_ver_string[12]; 2026a51f06e1SSelvin Xavier u32 default_extended_timeout; 2027a51f06e1SSelvin Xavier u8 controller_model_number[32]; 2028a51f06e1SSelvin Xavier u8 controller_description[64]; 2029a51f06e1SSelvin Xavier u8 controller_serial_number[32]; 2030a51f06e1SSelvin Xavier u8 ip_version_string[32]; 2031a51f06e1SSelvin Xavier u8 firmware_version_string[32]; 2032a51f06e1SSelvin Xavier u8 bios_version_string[32]; 2033a51f06e1SSelvin Xavier u8 redboot_version_string[32]; 2034a51f06e1SSelvin Xavier u8 driver_version_string[32]; 2035a51f06e1SSelvin Xavier u8 fw_on_flash_version_string[32]; 2036a51f06e1SSelvin Xavier u32 functionalities_supported; 20378ac0c7c7SDevesh Sharma u32 guid0_asicrev_cdblen; 20388ac0c7c7SDevesh Sharma u8 generational_guid[12]; 20398ac0c7c7SDevesh Sharma u32 portcnt_guid15; 20408ac0c7c7SDevesh Sharma u32 mfuncdev_iscsi_ldtout; 20418ac0c7c7SDevesh Sharma u32 ptpnum_maxdoms_hbast_cv; 2042a51f06e1SSelvin Xavier u32 firmware_post_status; 2043a51f06e1SSelvin Xavier u32 hba_mtu[8]; 20448ac0c7c7SDevesh Sharma u32 res_asicgen_iscsi_feaures; 20458ac0c7c7SDevesh Sharma u32 rsvd1[3]; 2046a51f06e1SSelvin Xavier }; 2047a51f06e1SSelvin Xavier 2048a51f06e1SSelvin Xavier struct mgmt_controller_attrib { 2049a51f06e1SSelvin Xavier struct mgmt_hba_attribs hba_attribs; 20508ac0c7c7SDevesh Sharma u32 pci_did_vid; 20518ac0c7c7SDevesh Sharma u32 pci_ssid_svid; 20528ac0c7c7SDevesh Sharma u32 ityp_fnum_devnum_bnum; 20538ac0c7c7SDevesh Sharma u32 uid_hi; 20548ac0c7c7SDevesh Sharma u32 uid_lo; 20558ac0c7c7SDevesh Sharma u32 res_nnetfil; 20568ac0c7c7SDevesh Sharma u32 rsvd0[4]; 2057a51f06e1SSelvin Xavier }; 2058a51f06e1SSelvin Xavier 2059a51f06e1SSelvin Xavier struct ocrdma_get_ctrl_attribs_rsp { 2060a51f06e1SSelvin Xavier struct ocrdma_mbx_hdr hdr; 2061a51f06e1SSelvin Xavier struct mgmt_controller_attrib ctrl_attribs; 2062a51f06e1SSelvin Xavier }; 2063a51f06e1SSelvin Xavier 206431dbdd9aSSelvin Xavier #define OCRDMA_SUBSYS_DCBX 0x10 206531dbdd9aSSelvin Xavier 206631dbdd9aSSelvin Xavier enum OCRDMA_DCBX_OPCODE { 206731dbdd9aSSelvin Xavier OCRDMA_CMD_GET_DCBX_CONFIG = 0x01 206831dbdd9aSSelvin Xavier }; 206931dbdd9aSSelvin Xavier 207031dbdd9aSSelvin Xavier enum OCRDMA_DCBX_PARAM_TYPE { 207131dbdd9aSSelvin Xavier OCRDMA_PARAMETER_TYPE_ADMIN = 0x00, 207231dbdd9aSSelvin Xavier OCRDMA_PARAMETER_TYPE_OPER = 0x01, 207331dbdd9aSSelvin Xavier OCRDMA_PARAMETER_TYPE_PEER = 0x02 207431dbdd9aSSelvin Xavier }; 207531dbdd9aSSelvin Xavier 207631dbdd9aSSelvin Xavier enum OCRDMA_DCBX_APP_PROTO { 207731dbdd9aSSelvin Xavier OCRDMA_APP_PROTO_ROCE = 0x8915 207831dbdd9aSSelvin Xavier }; 207931dbdd9aSSelvin Xavier 208031dbdd9aSSelvin Xavier enum OCRDMA_DCBX_PROTO { 208131dbdd9aSSelvin Xavier OCRDMA_PROTO_SELECT_L2 = 0x00, 208231dbdd9aSSelvin Xavier OCRDMA_PROTO_SELECT_L4 = 0x01 208331dbdd9aSSelvin Xavier }; 208431dbdd9aSSelvin Xavier 208531dbdd9aSSelvin Xavier enum OCRDMA_DCBX_APP_PARAM { 208631dbdd9aSSelvin Xavier OCRDMA_APP_PARAM_APP_PROTO_MASK = 0xFFFF, 208731dbdd9aSSelvin Xavier OCRDMA_APP_PARAM_PROTO_SEL_MASK = 0xFF, 208831dbdd9aSSelvin Xavier OCRDMA_APP_PARAM_PROTO_SEL_SHIFT = 0x10, 208931dbdd9aSSelvin Xavier OCRDMA_APP_PARAM_VALID_MASK = 0xFF, 209031dbdd9aSSelvin Xavier OCRDMA_APP_PARAM_VALID_SHIFT = 0x18 209131dbdd9aSSelvin Xavier }; 209231dbdd9aSSelvin Xavier 209331dbdd9aSSelvin Xavier enum OCRDMA_DCBX_STATE_FLAGS { 209431dbdd9aSSelvin Xavier OCRDMA_STATE_FLAG_ENABLED = 0x01, 209531dbdd9aSSelvin Xavier OCRDMA_STATE_FLAG_ADDVERTISED = 0x02, 209631dbdd9aSSelvin Xavier OCRDMA_STATE_FLAG_WILLING = 0x04, 209731dbdd9aSSelvin Xavier OCRDMA_STATE_FLAG_SYNC = 0x08, 209831dbdd9aSSelvin Xavier OCRDMA_STATE_FLAG_UNSUPPORTED = 0x40000000, 209931dbdd9aSSelvin Xavier OCRDMA_STATE_FLAG_NEG_FAILD = 0x80000000 210031dbdd9aSSelvin Xavier }; 210131dbdd9aSSelvin Xavier 210231dbdd9aSSelvin Xavier enum OCRDMA_TCV_AEV_OPV_ST { 210331dbdd9aSSelvin Xavier OCRDMA_DCBX_TC_SUPPORT_MASK = 0xFF, 210431dbdd9aSSelvin Xavier OCRDMA_DCBX_TC_SUPPORT_SHIFT = 0x18, 210531dbdd9aSSelvin Xavier OCRDMA_DCBX_APP_ENTRY_SHIFT = 0x10, 210631dbdd9aSSelvin Xavier OCRDMA_DCBX_OP_PARAM_SHIFT = 0x08, 210731dbdd9aSSelvin Xavier OCRDMA_DCBX_STATE_MASK = 0xFF 210831dbdd9aSSelvin Xavier }; 210931dbdd9aSSelvin Xavier 211031dbdd9aSSelvin Xavier struct ocrdma_app_parameter { 211131dbdd9aSSelvin Xavier u32 valid_proto_app; 211231dbdd9aSSelvin Xavier u32 oui; 211331dbdd9aSSelvin Xavier u32 app_prio[2]; 211431dbdd9aSSelvin Xavier }; 211531dbdd9aSSelvin Xavier 211631dbdd9aSSelvin Xavier struct ocrdma_dcbx_cfg { 211731dbdd9aSSelvin Xavier u32 tcv_aev_opv_st; 211831dbdd9aSSelvin Xavier u32 tc_state; 211931dbdd9aSSelvin Xavier u32 pfc_state; 212031dbdd9aSSelvin Xavier u32 qcn_state; 212131dbdd9aSSelvin Xavier u32 appl_state; 212231dbdd9aSSelvin Xavier u32 ll_state; 212331dbdd9aSSelvin Xavier u32 tc_bw[2]; 212431dbdd9aSSelvin Xavier u32 tc_prio[8]; 212531dbdd9aSSelvin Xavier u32 pfc_prio[2]; 212631dbdd9aSSelvin Xavier struct ocrdma_app_parameter app_param[15]; 212731dbdd9aSSelvin Xavier }; 212831dbdd9aSSelvin Xavier 212931dbdd9aSSelvin Xavier struct ocrdma_get_dcbx_cfg_req { 213031dbdd9aSSelvin Xavier struct ocrdma_mbx_hdr hdr; 213131dbdd9aSSelvin Xavier u32 param_type; 213231dbdd9aSSelvin Xavier } __packed; 213331dbdd9aSSelvin Xavier 213431dbdd9aSSelvin Xavier struct ocrdma_get_dcbx_cfg_rsp { 213531dbdd9aSSelvin Xavier struct ocrdma_mbx_rsp hdr; 213631dbdd9aSSelvin Xavier struct ocrdma_dcbx_cfg cfg; 213731dbdd9aSSelvin Xavier } __packed; 2138a51f06e1SSelvin Xavier 2139fe2caefcSParav Pandit #endif /* __OCRDMA_SLI_H__ */ 2140