1 /* 2 * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved. 3 * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved. 4 * Copyright (c) 2005 Mellanox Technologies. All rights reserved. 5 * 6 * This software is available to you under a choice of one of two 7 * licenses. You may choose to be licensed under the terms of the GNU 8 * General Public License (GPL) Version 2, available from the file 9 * COPYING in the main directory of this source tree, or the 10 * OpenIB.org BSD license below: 11 * 12 * Redistribution and use in source and binary forms, with or 13 * without modification, are permitted provided that the following 14 * conditions are met: 15 * 16 * - Redistributions of source code must retain the above 17 * copyright notice, this list of conditions and the following 18 * disclaimer. 19 * 20 * - Redistributions in binary form must reproduce the above 21 * copyright notice, this list of conditions and the following 22 * disclaimer in the documentation and/or other materials 23 * provided with the distribution. 24 * 25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 32 * SOFTWARE. 33 * 34 * $Id: mthca_main.c 1396 2004-12-28 04:10:27Z roland $ 35 */ 36 37 #include <linux/module.h> 38 #include <linux/init.h> 39 #include <linux/errno.h> 40 #include <linux/pci.h> 41 #include <linux/interrupt.h> 42 43 #include "mthca_dev.h" 44 #include "mthca_config_reg.h" 45 #include "mthca_cmd.h" 46 #include "mthca_profile.h" 47 #include "mthca_memfree.h" 48 49 MODULE_AUTHOR("Roland Dreier"); 50 MODULE_DESCRIPTION("Mellanox InfiniBand HCA low-level driver"); 51 MODULE_LICENSE("Dual BSD/GPL"); 52 MODULE_VERSION(DRV_VERSION); 53 54 #ifdef CONFIG_INFINIBAND_MTHCA_DEBUG 55 56 int mthca_debug_level = 0; 57 module_param_named(debug_level, mthca_debug_level, int, 0644); 58 MODULE_PARM_DESC(debug_level, "Enable debug tracing if > 0"); 59 60 #endif /* CONFIG_INFINIBAND_MTHCA_DEBUG */ 61 62 #ifdef CONFIG_PCI_MSI 63 64 static int msi_x = 1; 65 module_param(msi_x, int, 0444); 66 MODULE_PARM_DESC(msi_x, "attempt to use MSI-X if nonzero"); 67 68 #else /* CONFIG_PCI_MSI */ 69 70 #define msi_x (0) 71 72 #endif /* CONFIG_PCI_MSI */ 73 74 static int tune_pci = 0; 75 module_param(tune_pci, int, 0444); 76 MODULE_PARM_DESC(tune_pci, "increase PCI burst from the default set by BIOS if nonzero"); 77 78 DEFINE_MUTEX(mthca_device_mutex); 79 80 #define MTHCA_DEFAULT_NUM_QP (1 << 16) 81 #define MTHCA_DEFAULT_RDB_PER_QP (1 << 2) 82 #define MTHCA_DEFAULT_NUM_CQ (1 << 16) 83 #define MTHCA_DEFAULT_NUM_MCG (1 << 13) 84 #define MTHCA_DEFAULT_NUM_MPT (1 << 17) 85 #define MTHCA_DEFAULT_NUM_MTT (1 << 20) 86 #define MTHCA_DEFAULT_NUM_UDAV (1 << 15) 87 #define MTHCA_DEFAULT_NUM_RESERVED_MTTS (1 << 18) 88 #define MTHCA_DEFAULT_NUM_UARC_SIZE (1 << 18) 89 90 static struct mthca_profile hca_profile = { 91 .num_qp = MTHCA_DEFAULT_NUM_QP, 92 .rdb_per_qp = MTHCA_DEFAULT_RDB_PER_QP, 93 .num_cq = MTHCA_DEFAULT_NUM_CQ, 94 .num_mcg = MTHCA_DEFAULT_NUM_MCG, 95 .num_mpt = MTHCA_DEFAULT_NUM_MPT, 96 .num_mtt = MTHCA_DEFAULT_NUM_MTT, 97 .num_udav = MTHCA_DEFAULT_NUM_UDAV, /* Tavor only */ 98 .fmr_reserved_mtts = MTHCA_DEFAULT_NUM_RESERVED_MTTS, /* Tavor only */ 99 .uarc_size = MTHCA_DEFAULT_NUM_UARC_SIZE, /* Arbel only */ 100 }; 101 102 module_param_named(num_qp, hca_profile.num_qp, int, 0444); 103 MODULE_PARM_DESC(num_qp, "maximum number of QPs per HCA"); 104 105 module_param_named(rdb_per_qp, hca_profile.rdb_per_qp, int, 0444); 106 MODULE_PARM_DESC(rdb_per_qp, "number of RDB buffers per QP"); 107 108 module_param_named(num_cq, hca_profile.num_cq, int, 0444); 109 MODULE_PARM_DESC(num_cq, "maximum number of CQs per HCA"); 110 111 module_param_named(num_mcg, hca_profile.num_mcg, int, 0444); 112 MODULE_PARM_DESC(num_mcg, "maximum number of multicast groups per HCA"); 113 114 module_param_named(num_mpt, hca_profile.num_mpt, int, 0444); 115 MODULE_PARM_DESC(num_mpt, 116 "maximum number of memory protection table entries per HCA"); 117 118 module_param_named(num_mtt, hca_profile.num_mtt, int, 0444); 119 MODULE_PARM_DESC(num_mtt, 120 "maximum number of memory translation table segments per HCA"); 121 122 module_param_named(num_udav, hca_profile.num_udav, int, 0444); 123 MODULE_PARM_DESC(num_udav, "maximum number of UD address vectors per HCA"); 124 125 module_param_named(fmr_reserved_mtts, hca_profile.fmr_reserved_mtts, int, 0444); 126 MODULE_PARM_DESC(fmr_reserved_mtts, 127 "number of memory translation table segments reserved for FMR"); 128 129 static char mthca_version[] __devinitdata = 130 DRV_NAME ": Mellanox InfiniBand HCA driver v" 131 DRV_VERSION " (" DRV_RELDATE ")\n"; 132 133 static int mthca_tune_pci(struct mthca_dev *mdev) 134 { 135 if (!tune_pci) 136 return 0; 137 138 /* First try to max out Read Byte Count */ 139 if (pci_find_capability(mdev->pdev, PCI_CAP_ID_PCIX)) { 140 if (pcix_set_mmrbc(mdev->pdev, pcix_get_max_mmrbc(mdev->pdev))) { 141 mthca_err(mdev, "Couldn't set PCI-X max read count, " 142 "aborting.\n"); 143 return -ENODEV; 144 } 145 } else if (!(mdev->mthca_flags & MTHCA_FLAG_PCIE)) 146 mthca_info(mdev, "No PCI-X capability, not setting RBC.\n"); 147 148 if (pci_find_capability(mdev->pdev, PCI_CAP_ID_EXP)) { 149 if (pcie_set_readrq(mdev->pdev, 4096)) { 150 mthca_err(mdev, "Couldn't write PCI Express read request, " 151 "aborting.\n"); 152 return -ENODEV; 153 } 154 } else if (mdev->mthca_flags & MTHCA_FLAG_PCIE) 155 mthca_info(mdev, "No PCI Express capability, " 156 "not setting Max Read Request Size.\n"); 157 158 return 0; 159 } 160 161 static int mthca_dev_lim(struct mthca_dev *mdev, struct mthca_dev_lim *dev_lim) 162 { 163 int err; 164 u8 status; 165 166 err = mthca_QUERY_DEV_LIM(mdev, dev_lim, &status); 167 if (err) { 168 mthca_err(mdev, "QUERY_DEV_LIM command failed, aborting.\n"); 169 return err; 170 } 171 if (status) { 172 mthca_err(mdev, "QUERY_DEV_LIM returned status 0x%02x, " 173 "aborting.\n", status); 174 return -EINVAL; 175 } 176 if (dev_lim->min_page_sz > PAGE_SIZE) { 177 mthca_err(mdev, "HCA minimum page size of %d bigger than " 178 "kernel PAGE_SIZE of %ld, aborting.\n", 179 dev_lim->min_page_sz, PAGE_SIZE); 180 return -ENODEV; 181 } 182 if (dev_lim->num_ports > MTHCA_MAX_PORTS) { 183 mthca_err(mdev, "HCA has %d ports, but we only support %d, " 184 "aborting.\n", 185 dev_lim->num_ports, MTHCA_MAX_PORTS); 186 return -ENODEV; 187 } 188 189 if (dev_lim->uar_size > pci_resource_len(mdev->pdev, 2)) { 190 mthca_err(mdev, "HCA reported UAR size of 0x%x bigger than " 191 "PCI resource 2 size of 0x%llx, aborting.\n", 192 dev_lim->uar_size, 193 (unsigned long long)pci_resource_len(mdev->pdev, 2)); 194 return -ENODEV; 195 } 196 197 mdev->limits.num_ports = dev_lim->num_ports; 198 mdev->limits.vl_cap = dev_lim->max_vl; 199 mdev->limits.mtu_cap = dev_lim->max_mtu; 200 mdev->limits.gid_table_len = dev_lim->max_gids; 201 mdev->limits.pkey_table_len = dev_lim->max_pkeys; 202 mdev->limits.local_ca_ack_delay = dev_lim->local_ca_ack_delay; 203 mdev->limits.max_sg = dev_lim->max_sg; 204 mdev->limits.max_wqes = dev_lim->max_qp_sz; 205 mdev->limits.max_qp_init_rdma = dev_lim->max_requester_per_qp; 206 mdev->limits.reserved_qps = dev_lim->reserved_qps; 207 mdev->limits.max_srq_wqes = dev_lim->max_srq_sz; 208 mdev->limits.reserved_srqs = dev_lim->reserved_srqs; 209 mdev->limits.reserved_eecs = dev_lim->reserved_eecs; 210 mdev->limits.max_desc_sz = dev_lim->max_desc_sz; 211 mdev->limits.max_srq_sge = mthca_max_srq_sge(mdev); 212 /* 213 * Subtract 1 from the limit because we need to allocate a 214 * spare CQE so the HCA HW can tell the difference between an 215 * empty CQ and a full CQ. 216 */ 217 mdev->limits.max_cqes = dev_lim->max_cq_sz - 1; 218 mdev->limits.reserved_cqs = dev_lim->reserved_cqs; 219 mdev->limits.reserved_eqs = dev_lim->reserved_eqs; 220 mdev->limits.reserved_mtts = dev_lim->reserved_mtts; 221 mdev->limits.reserved_mrws = dev_lim->reserved_mrws; 222 mdev->limits.reserved_uars = dev_lim->reserved_uars; 223 mdev->limits.reserved_pds = dev_lim->reserved_pds; 224 mdev->limits.port_width_cap = dev_lim->max_port_width; 225 mdev->limits.page_size_cap = ~(u32) (dev_lim->min_page_sz - 1); 226 mdev->limits.flags = dev_lim->flags; 227 /* 228 * For old FW that doesn't return static rate support, use a 229 * value of 0x3 (only static rate values of 0 or 1 are handled), 230 * except on Sinai, where even old FW can handle static rate 231 * values of 2 and 3. 232 */ 233 if (dev_lim->stat_rate_support) 234 mdev->limits.stat_rate_support = dev_lim->stat_rate_support; 235 else if (mdev->mthca_flags & MTHCA_FLAG_SINAI_OPT) 236 mdev->limits.stat_rate_support = 0xf; 237 else 238 mdev->limits.stat_rate_support = 0x3; 239 240 /* IB_DEVICE_RESIZE_MAX_WR not supported by driver. 241 May be doable since hardware supports it for SRQ. 242 243 IB_DEVICE_N_NOTIFY_CQ is supported by hardware but not by driver. 244 245 IB_DEVICE_SRQ_RESIZE is supported by hardware but SRQ is not 246 supported by driver. */ 247 mdev->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT | 248 IB_DEVICE_PORT_ACTIVE_EVENT | 249 IB_DEVICE_SYS_IMAGE_GUID | 250 IB_DEVICE_RC_RNR_NAK_GEN; 251 252 if (dev_lim->flags & DEV_LIM_FLAG_BAD_PKEY_CNTR) 253 mdev->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR; 254 255 if (dev_lim->flags & DEV_LIM_FLAG_BAD_QKEY_CNTR) 256 mdev->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR; 257 258 if (dev_lim->flags & DEV_LIM_FLAG_RAW_MULTI) 259 mdev->device_cap_flags |= IB_DEVICE_RAW_MULTI; 260 261 if (dev_lim->flags & DEV_LIM_FLAG_AUTO_PATH_MIG) 262 mdev->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG; 263 264 if (dev_lim->flags & DEV_LIM_FLAG_UD_AV_PORT_ENFORCE) 265 mdev->device_cap_flags |= IB_DEVICE_UD_AV_PORT_ENFORCE; 266 267 if (dev_lim->flags & DEV_LIM_FLAG_SRQ) 268 mdev->mthca_flags |= MTHCA_FLAG_SRQ; 269 270 return 0; 271 } 272 273 static int mthca_init_tavor(struct mthca_dev *mdev) 274 { 275 u8 status; 276 int err; 277 struct mthca_dev_lim dev_lim; 278 struct mthca_profile profile; 279 struct mthca_init_hca_param init_hca; 280 281 err = mthca_SYS_EN(mdev, &status); 282 if (err) { 283 mthca_err(mdev, "SYS_EN command failed, aborting.\n"); 284 return err; 285 } 286 if (status) { 287 mthca_err(mdev, "SYS_EN returned status 0x%02x, " 288 "aborting.\n", status); 289 return -EINVAL; 290 } 291 292 err = mthca_QUERY_FW(mdev, &status); 293 if (err) { 294 mthca_err(mdev, "QUERY_FW command failed, aborting.\n"); 295 goto err_disable; 296 } 297 if (status) { 298 mthca_err(mdev, "QUERY_FW returned status 0x%02x, " 299 "aborting.\n", status); 300 err = -EINVAL; 301 goto err_disable; 302 } 303 err = mthca_QUERY_DDR(mdev, &status); 304 if (err) { 305 mthca_err(mdev, "QUERY_DDR command failed, aborting.\n"); 306 goto err_disable; 307 } 308 if (status) { 309 mthca_err(mdev, "QUERY_DDR returned status 0x%02x, " 310 "aborting.\n", status); 311 err = -EINVAL; 312 goto err_disable; 313 } 314 315 err = mthca_dev_lim(mdev, &dev_lim); 316 if (err) { 317 mthca_err(mdev, "QUERY_DEV_LIM command failed, aborting.\n"); 318 goto err_disable; 319 } 320 321 profile = hca_profile; 322 profile.num_uar = dev_lim.uar_size / PAGE_SIZE; 323 profile.uarc_size = 0; 324 if (mdev->mthca_flags & MTHCA_FLAG_SRQ) 325 profile.num_srq = dev_lim.max_srqs; 326 327 err = mthca_make_profile(mdev, &profile, &dev_lim, &init_hca); 328 if (err < 0) 329 goto err_disable; 330 331 err = mthca_INIT_HCA(mdev, &init_hca, &status); 332 if (err) { 333 mthca_err(mdev, "INIT_HCA command failed, aborting.\n"); 334 goto err_disable; 335 } 336 if (status) { 337 mthca_err(mdev, "INIT_HCA returned status 0x%02x, " 338 "aborting.\n", status); 339 err = -EINVAL; 340 goto err_disable; 341 } 342 343 return 0; 344 345 err_disable: 346 mthca_SYS_DIS(mdev, &status); 347 348 return err; 349 } 350 351 static int mthca_load_fw(struct mthca_dev *mdev) 352 { 353 u8 status; 354 int err; 355 356 /* FIXME: use HCA-attached memory for FW if present */ 357 358 mdev->fw.arbel.fw_icm = 359 mthca_alloc_icm(mdev, mdev->fw.arbel.fw_pages, 360 GFP_HIGHUSER | __GFP_NOWARN, 0); 361 if (!mdev->fw.arbel.fw_icm) { 362 mthca_err(mdev, "Couldn't allocate FW area, aborting.\n"); 363 return -ENOMEM; 364 } 365 366 err = mthca_MAP_FA(mdev, mdev->fw.arbel.fw_icm, &status); 367 if (err) { 368 mthca_err(mdev, "MAP_FA command failed, aborting.\n"); 369 goto err_free; 370 } 371 if (status) { 372 mthca_err(mdev, "MAP_FA returned status 0x%02x, aborting.\n", status); 373 err = -EINVAL; 374 goto err_free; 375 } 376 err = mthca_RUN_FW(mdev, &status); 377 if (err) { 378 mthca_err(mdev, "RUN_FW command failed, aborting.\n"); 379 goto err_unmap_fa; 380 } 381 if (status) { 382 mthca_err(mdev, "RUN_FW returned status 0x%02x, aborting.\n", status); 383 err = -EINVAL; 384 goto err_unmap_fa; 385 } 386 387 return 0; 388 389 err_unmap_fa: 390 mthca_UNMAP_FA(mdev, &status); 391 392 err_free: 393 mthca_free_icm(mdev, mdev->fw.arbel.fw_icm, 0); 394 return err; 395 } 396 397 static int mthca_init_icm(struct mthca_dev *mdev, 398 struct mthca_dev_lim *dev_lim, 399 struct mthca_init_hca_param *init_hca, 400 u64 icm_size) 401 { 402 u64 aux_pages; 403 u8 status; 404 int err; 405 406 err = mthca_SET_ICM_SIZE(mdev, icm_size, &aux_pages, &status); 407 if (err) { 408 mthca_err(mdev, "SET_ICM_SIZE command failed, aborting.\n"); 409 return err; 410 } 411 if (status) { 412 mthca_err(mdev, "SET_ICM_SIZE returned status 0x%02x, " 413 "aborting.\n", status); 414 return -EINVAL; 415 } 416 417 mthca_dbg(mdev, "%lld KB of HCA context requires %lld KB aux memory.\n", 418 (unsigned long long) icm_size >> 10, 419 (unsigned long long) aux_pages << 2); 420 421 mdev->fw.arbel.aux_icm = mthca_alloc_icm(mdev, aux_pages, 422 GFP_HIGHUSER | __GFP_NOWARN, 0); 423 if (!mdev->fw.arbel.aux_icm) { 424 mthca_err(mdev, "Couldn't allocate aux memory, aborting.\n"); 425 return -ENOMEM; 426 } 427 428 err = mthca_MAP_ICM_AUX(mdev, mdev->fw.arbel.aux_icm, &status); 429 if (err) { 430 mthca_err(mdev, "MAP_ICM_AUX command failed, aborting.\n"); 431 goto err_free_aux; 432 } 433 if (status) { 434 mthca_err(mdev, "MAP_ICM_AUX returned status 0x%02x, aborting.\n", status); 435 err = -EINVAL; 436 goto err_free_aux; 437 } 438 439 err = mthca_map_eq_icm(mdev, init_hca->eqc_base); 440 if (err) { 441 mthca_err(mdev, "Failed to map EQ context memory, aborting.\n"); 442 goto err_unmap_aux; 443 } 444 445 /* CPU writes to non-reserved MTTs, while HCA might DMA to reserved mtts */ 446 mdev->limits.reserved_mtts = ALIGN(mdev->limits.reserved_mtts * MTHCA_MTT_SEG_SIZE, 447 dma_get_cache_alignment()) / MTHCA_MTT_SEG_SIZE; 448 449 mdev->mr_table.mtt_table = mthca_alloc_icm_table(mdev, init_hca->mtt_base, 450 MTHCA_MTT_SEG_SIZE, 451 mdev->limits.num_mtt_segs, 452 mdev->limits.reserved_mtts, 453 1, 0); 454 if (!mdev->mr_table.mtt_table) { 455 mthca_err(mdev, "Failed to map MTT context memory, aborting.\n"); 456 err = -ENOMEM; 457 goto err_unmap_eq; 458 } 459 460 mdev->mr_table.mpt_table = mthca_alloc_icm_table(mdev, init_hca->mpt_base, 461 dev_lim->mpt_entry_sz, 462 mdev->limits.num_mpts, 463 mdev->limits.reserved_mrws, 464 1, 1); 465 if (!mdev->mr_table.mpt_table) { 466 mthca_err(mdev, "Failed to map MPT context memory, aborting.\n"); 467 err = -ENOMEM; 468 goto err_unmap_mtt; 469 } 470 471 mdev->qp_table.qp_table = mthca_alloc_icm_table(mdev, init_hca->qpc_base, 472 dev_lim->qpc_entry_sz, 473 mdev->limits.num_qps, 474 mdev->limits.reserved_qps, 475 0, 0); 476 if (!mdev->qp_table.qp_table) { 477 mthca_err(mdev, "Failed to map QP context memory, aborting.\n"); 478 err = -ENOMEM; 479 goto err_unmap_mpt; 480 } 481 482 mdev->qp_table.eqp_table = mthca_alloc_icm_table(mdev, init_hca->eqpc_base, 483 dev_lim->eqpc_entry_sz, 484 mdev->limits.num_qps, 485 mdev->limits.reserved_qps, 486 0, 0); 487 if (!mdev->qp_table.eqp_table) { 488 mthca_err(mdev, "Failed to map EQP context memory, aborting.\n"); 489 err = -ENOMEM; 490 goto err_unmap_qp; 491 } 492 493 mdev->qp_table.rdb_table = mthca_alloc_icm_table(mdev, init_hca->rdb_base, 494 MTHCA_RDB_ENTRY_SIZE, 495 mdev->limits.num_qps << 496 mdev->qp_table.rdb_shift, 0, 497 0, 0); 498 if (!mdev->qp_table.rdb_table) { 499 mthca_err(mdev, "Failed to map RDB context memory, aborting\n"); 500 err = -ENOMEM; 501 goto err_unmap_eqp; 502 } 503 504 mdev->cq_table.table = mthca_alloc_icm_table(mdev, init_hca->cqc_base, 505 dev_lim->cqc_entry_sz, 506 mdev->limits.num_cqs, 507 mdev->limits.reserved_cqs, 508 0, 0); 509 if (!mdev->cq_table.table) { 510 mthca_err(mdev, "Failed to map CQ context memory, aborting.\n"); 511 err = -ENOMEM; 512 goto err_unmap_rdb; 513 } 514 515 if (mdev->mthca_flags & MTHCA_FLAG_SRQ) { 516 mdev->srq_table.table = 517 mthca_alloc_icm_table(mdev, init_hca->srqc_base, 518 dev_lim->srq_entry_sz, 519 mdev->limits.num_srqs, 520 mdev->limits.reserved_srqs, 521 0, 0); 522 if (!mdev->srq_table.table) { 523 mthca_err(mdev, "Failed to map SRQ context memory, " 524 "aborting.\n"); 525 err = -ENOMEM; 526 goto err_unmap_cq; 527 } 528 } 529 530 /* 531 * It's not strictly required, but for simplicity just map the 532 * whole multicast group table now. The table isn't very big 533 * and it's a lot easier than trying to track ref counts. 534 */ 535 mdev->mcg_table.table = mthca_alloc_icm_table(mdev, init_hca->mc_base, 536 MTHCA_MGM_ENTRY_SIZE, 537 mdev->limits.num_mgms + 538 mdev->limits.num_amgms, 539 mdev->limits.num_mgms + 540 mdev->limits.num_amgms, 541 0, 0); 542 if (!mdev->mcg_table.table) { 543 mthca_err(mdev, "Failed to map MCG context memory, aborting.\n"); 544 err = -ENOMEM; 545 goto err_unmap_srq; 546 } 547 548 return 0; 549 550 err_unmap_srq: 551 if (mdev->mthca_flags & MTHCA_FLAG_SRQ) 552 mthca_free_icm_table(mdev, mdev->srq_table.table); 553 554 err_unmap_cq: 555 mthca_free_icm_table(mdev, mdev->cq_table.table); 556 557 err_unmap_rdb: 558 mthca_free_icm_table(mdev, mdev->qp_table.rdb_table); 559 560 err_unmap_eqp: 561 mthca_free_icm_table(mdev, mdev->qp_table.eqp_table); 562 563 err_unmap_qp: 564 mthca_free_icm_table(mdev, mdev->qp_table.qp_table); 565 566 err_unmap_mpt: 567 mthca_free_icm_table(mdev, mdev->mr_table.mpt_table); 568 569 err_unmap_mtt: 570 mthca_free_icm_table(mdev, mdev->mr_table.mtt_table); 571 572 err_unmap_eq: 573 mthca_unmap_eq_icm(mdev); 574 575 err_unmap_aux: 576 mthca_UNMAP_ICM_AUX(mdev, &status); 577 578 err_free_aux: 579 mthca_free_icm(mdev, mdev->fw.arbel.aux_icm, 0); 580 581 return err; 582 } 583 584 static void mthca_free_icms(struct mthca_dev *mdev) 585 { 586 u8 status; 587 588 mthca_free_icm_table(mdev, mdev->mcg_table.table); 589 if (mdev->mthca_flags & MTHCA_FLAG_SRQ) 590 mthca_free_icm_table(mdev, mdev->srq_table.table); 591 mthca_free_icm_table(mdev, mdev->cq_table.table); 592 mthca_free_icm_table(mdev, mdev->qp_table.rdb_table); 593 mthca_free_icm_table(mdev, mdev->qp_table.eqp_table); 594 mthca_free_icm_table(mdev, mdev->qp_table.qp_table); 595 mthca_free_icm_table(mdev, mdev->mr_table.mpt_table); 596 mthca_free_icm_table(mdev, mdev->mr_table.mtt_table); 597 mthca_unmap_eq_icm(mdev); 598 599 mthca_UNMAP_ICM_AUX(mdev, &status); 600 mthca_free_icm(mdev, mdev->fw.arbel.aux_icm, 0); 601 } 602 603 static int mthca_init_arbel(struct mthca_dev *mdev) 604 { 605 struct mthca_dev_lim dev_lim; 606 struct mthca_profile profile; 607 struct mthca_init_hca_param init_hca; 608 u64 icm_size; 609 u8 status; 610 int err; 611 612 err = mthca_QUERY_FW(mdev, &status); 613 if (err) { 614 mthca_err(mdev, "QUERY_FW command failed, aborting.\n"); 615 return err; 616 } 617 if (status) { 618 mthca_err(mdev, "QUERY_FW returned status 0x%02x, " 619 "aborting.\n", status); 620 return -EINVAL; 621 } 622 623 err = mthca_ENABLE_LAM(mdev, &status); 624 if (err) { 625 mthca_err(mdev, "ENABLE_LAM command failed, aborting.\n"); 626 return err; 627 } 628 if (status == MTHCA_CMD_STAT_LAM_NOT_PRE) { 629 mthca_dbg(mdev, "No HCA-attached memory (running in MemFree mode)\n"); 630 mdev->mthca_flags |= MTHCA_FLAG_NO_LAM; 631 } else if (status) { 632 mthca_err(mdev, "ENABLE_LAM returned status 0x%02x, " 633 "aborting.\n", status); 634 return -EINVAL; 635 } 636 637 err = mthca_load_fw(mdev); 638 if (err) { 639 mthca_err(mdev, "Failed to start FW, aborting.\n"); 640 goto err_disable; 641 } 642 643 err = mthca_dev_lim(mdev, &dev_lim); 644 if (err) { 645 mthca_err(mdev, "QUERY_DEV_LIM command failed, aborting.\n"); 646 goto err_stop_fw; 647 } 648 649 profile = hca_profile; 650 profile.num_uar = dev_lim.uar_size / PAGE_SIZE; 651 profile.num_udav = 0; 652 if (mdev->mthca_flags & MTHCA_FLAG_SRQ) 653 profile.num_srq = dev_lim.max_srqs; 654 655 icm_size = mthca_make_profile(mdev, &profile, &dev_lim, &init_hca); 656 if ((int) icm_size < 0) { 657 err = icm_size; 658 goto err_stop_fw; 659 } 660 661 err = mthca_init_icm(mdev, &dev_lim, &init_hca, icm_size); 662 if (err) 663 goto err_stop_fw; 664 665 err = mthca_INIT_HCA(mdev, &init_hca, &status); 666 if (err) { 667 mthca_err(mdev, "INIT_HCA command failed, aborting.\n"); 668 goto err_free_icm; 669 } 670 if (status) { 671 mthca_err(mdev, "INIT_HCA returned status 0x%02x, " 672 "aborting.\n", status); 673 err = -EINVAL; 674 goto err_free_icm; 675 } 676 677 return 0; 678 679 err_free_icm: 680 mthca_free_icms(mdev); 681 682 err_stop_fw: 683 mthca_UNMAP_FA(mdev, &status); 684 mthca_free_icm(mdev, mdev->fw.arbel.fw_icm, 0); 685 686 err_disable: 687 if (!(mdev->mthca_flags & MTHCA_FLAG_NO_LAM)) 688 mthca_DISABLE_LAM(mdev, &status); 689 690 return err; 691 } 692 693 static void mthca_close_hca(struct mthca_dev *mdev) 694 { 695 u8 status; 696 697 mthca_CLOSE_HCA(mdev, 0, &status); 698 699 if (mthca_is_memfree(mdev)) { 700 mthca_free_icms(mdev); 701 702 mthca_UNMAP_FA(mdev, &status); 703 mthca_free_icm(mdev, mdev->fw.arbel.fw_icm, 0); 704 705 if (!(mdev->mthca_flags & MTHCA_FLAG_NO_LAM)) 706 mthca_DISABLE_LAM(mdev, &status); 707 } else 708 mthca_SYS_DIS(mdev, &status); 709 } 710 711 static int mthca_init_hca(struct mthca_dev *mdev) 712 { 713 u8 status; 714 int err; 715 struct mthca_adapter adapter; 716 717 if (mthca_is_memfree(mdev)) 718 err = mthca_init_arbel(mdev); 719 else 720 err = mthca_init_tavor(mdev); 721 722 if (err) 723 return err; 724 725 err = mthca_QUERY_ADAPTER(mdev, &adapter, &status); 726 if (err) { 727 mthca_err(mdev, "QUERY_ADAPTER command failed, aborting.\n"); 728 goto err_close; 729 } 730 if (status) { 731 mthca_err(mdev, "QUERY_ADAPTER returned status 0x%02x, " 732 "aborting.\n", status); 733 err = -EINVAL; 734 goto err_close; 735 } 736 737 mdev->eq_table.inta_pin = adapter.inta_pin; 738 if (!mthca_is_memfree(mdev)) 739 mdev->rev_id = adapter.revision_id; 740 memcpy(mdev->board_id, adapter.board_id, sizeof mdev->board_id); 741 742 return 0; 743 744 err_close: 745 mthca_close_hca(mdev); 746 return err; 747 } 748 749 static int mthca_setup_hca(struct mthca_dev *dev) 750 { 751 int err; 752 u8 status; 753 754 MTHCA_INIT_DOORBELL_LOCK(&dev->doorbell_lock); 755 756 err = mthca_init_uar_table(dev); 757 if (err) { 758 mthca_err(dev, "Failed to initialize " 759 "user access region table, aborting.\n"); 760 return err; 761 } 762 763 err = mthca_uar_alloc(dev, &dev->driver_uar); 764 if (err) { 765 mthca_err(dev, "Failed to allocate driver access region, " 766 "aborting.\n"); 767 goto err_uar_table_free; 768 } 769 770 dev->kar = ioremap(dev->driver_uar.pfn << PAGE_SHIFT, PAGE_SIZE); 771 if (!dev->kar) { 772 mthca_err(dev, "Couldn't map kernel access region, " 773 "aborting.\n"); 774 err = -ENOMEM; 775 goto err_uar_free; 776 } 777 778 err = mthca_init_pd_table(dev); 779 if (err) { 780 mthca_err(dev, "Failed to initialize " 781 "protection domain table, aborting.\n"); 782 goto err_kar_unmap; 783 } 784 785 err = mthca_init_mr_table(dev); 786 if (err) { 787 mthca_err(dev, "Failed to initialize " 788 "memory region table, aborting.\n"); 789 goto err_pd_table_free; 790 } 791 792 err = mthca_pd_alloc(dev, 1, &dev->driver_pd); 793 if (err) { 794 mthca_err(dev, "Failed to create driver PD, " 795 "aborting.\n"); 796 goto err_mr_table_free; 797 } 798 799 err = mthca_init_eq_table(dev); 800 if (err) { 801 mthca_err(dev, "Failed to initialize " 802 "event queue table, aborting.\n"); 803 goto err_pd_free; 804 } 805 806 err = mthca_cmd_use_events(dev); 807 if (err) { 808 mthca_err(dev, "Failed to switch to event-driven " 809 "firmware commands, aborting.\n"); 810 goto err_eq_table_free; 811 } 812 813 err = mthca_NOP(dev, &status); 814 if (err || status) { 815 if (dev->mthca_flags & MTHCA_FLAG_MSI_X) { 816 mthca_warn(dev, "NOP command failed to generate interrupt " 817 "(IRQ %d).\n", 818 dev->eq_table.eq[MTHCA_EQ_CMD].msi_x_vector); 819 mthca_warn(dev, "Trying again with MSI-X disabled.\n"); 820 } else { 821 mthca_err(dev, "NOP command failed to generate interrupt " 822 "(IRQ %d), aborting.\n", 823 dev->pdev->irq); 824 mthca_err(dev, "BIOS or ACPI interrupt routing problem?\n"); 825 } 826 827 goto err_cmd_poll; 828 } 829 830 mthca_dbg(dev, "NOP command IRQ test passed\n"); 831 832 err = mthca_init_cq_table(dev); 833 if (err) { 834 mthca_err(dev, "Failed to initialize " 835 "completion queue table, aborting.\n"); 836 goto err_cmd_poll; 837 } 838 839 err = mthca_init_srq_table(dev); 840 if (err) { 841 mthca_err(dev, "Failed to initialize " 842 "shared receive queue table, aborting.\n"); 843 goto err_cq_table_free; 844 } 845 846 err = mthca_init_qp_table(dev); 847 if (err) { 848 mthca_err(dev, "Failed to initialize " 849 "queue pair table, aborting.\n"); 850 goto err_srq_table_free; 851 } 852 853 err = mthca_init_av_table(dev); 854 if (err) { 855 mthca_err(dev, "Failed to initialize " 856 "address vector table, aborting.\n"); 857 goto err_qp_table_free; 858 } 859 860 err = mthca_init_mcg_table(dev); 861 if (err) { 862 mthca_err(dev, "Failed to initialize " 863 "multicast group table, aborting.\n"); 864 goto err_av_table_free; 865 } 866 867 return 0; 868 869 err_av_table_free: 870 mthca_cleanup_av_table(dev); 871 872 err_qp_table_free: 873 mthca_cleanup_qp_table(dev); 874 875 err_srq_table_free: 876 mthca_cleanup_srq_table(dev); 877 878 err_cq_table_free: 879 mthca_cleanup_cq_table(dev); 880 881 err_cmd_poll: 882 mthca_cmd_use_polling(dev); 883 884 err_eq_table_free: 885 mthca_cleanup_eq_table(dev); 886 887 err_pd_free: 888 mthca_pd_free(dev, &dev->driver_pd); 889 890 err_mr_table_free: 891 mthca_cleanup_mr_table(dev); 892 893 err_pd_table_free: 894 mthca_cleanup_pd_table(dev); 895 896 err_kar_unmap: 897 iounmap(dev->kar); 898 899 err_uar_free: 900 mthca_uar_free(dev, &dev->driver_uar); 901 902 err_uar_table_free: 903 mthca_cleanup_uar_table(dev); 904 return err; 905 } 906 907 static int mthca_request_regions(struct pci_dev *pdev, int ddr_hidden) 908 { 909 int err; 910 911 /* 912 * We can't just use pci_request_regions() because the MSI-X 913 * table is right in the middle of the first BAR. If we did 914 * pci_request_region and grab all of the first BAR, then 915 * setting up MSI-X would fail, since the PCI core wants to do 916 * request_mem_region on the MSI-X vector table. 917 * 918 * So just request what we need right now, and request any 919 * other regions we need when setting up EQs. 920 */ 921 if (!request_mem_region(pci_resource_start(pdev, 0) + MTHCA_HCR_BASE, 922 MTHCA_HCR_SIZE, DRV_NAME)) 923 return -EBUSY; 924 925 err = pci_request_region(pdev, 2, DRV_NAME); 926 if (err) 927 goto err_bar2_failed; 928 929 if (!ddr_hidden) { 930 err = pci_request_region(pdev, 4, DRV_NAME); 931 if (err) 932 goto err_bar4_failed; 933 } 934 935 return 0; 936 937 err_bar4_failed: 938 pci_release_region(pdev, 2); 939 940 err_bar2_failed: 941 release_mem_region(pci_resource_start(pdev, 0) + MTHCA_HCR_BASE, 942 MTHCA_HCR_SIZE); 943 944 return err; 945 } 946 947 static void mthca_release_regions(struct pci_dev *pdev, 948 int ddr_hidden) 949 { 950 if (!ddr_hidden) 951 pci_release_region(pdev, 4); 952 953 pci_release_region(pdev, 2); 954 955 release_mem_region(pci_resource_start(pdev, 0) + MTHCA_HCR_BASE, 956 MTHCA_HCR_SIZE); 957 } 958 959 static int mthca_enable_msi_x(struct mthca_dev *mdev) 960 { 961 struct msix_entry entries[3]; 962 int err; 963 964 entries[0].entry = 0; 965 entries[1].entry = 1; 966 entries[2].entry = 2; 967 968 err = pci_enable_msix(mdev->pdev, entries, ARRAY_SIZE(entries)); 969 if (err) { 970 if (err > 0) 971 mthca_info(mdev, "Only %d MSI-X vectors available, " 972 "not using MSI-X\n", err); 973 return err; 974 } 975 976 mdev->eq_table.eq[MTHCA_EQ_COMP ].msi_x_vector = entries[0].vector; 977 mdev->eq_table.eq[MTHCA_EQ_ASYNC].msi_x_vector = entries[1].vector; 978 mdev->eq_table.eq[MTHCA_EQ_CMD ].msi_x_vector = entries[2].vector; 979 980 return 0; 981 } 982 983 /* Types of supported HCA */ 984 enum { 985 TAVOR, /* MT23108 */ 986 ARBEL_COMPAT, /* MT25208 in Tavor compat mode */ 987 ARBEL_NATIVE, /* MT25208 with extended features */ 988 SINAI /* MT25204 */ 989 }; 990 991 #define MTHCA_FW_VER(major, minor, subminor) \ 992 (((u64) (major) << 32) | ((u64) (minor) << 16) | (u64) (subminor)) 993 994 static struct { 995 u64 latest_fw; 996 u32 flags; 997 } mthca_hca_table[] = { 998 [TAVOR] = { .latest_fw = MTHCA_FW_VER(3, 5, 0), 999 .flags = 0 }, 1000 [ARBEL_COMPAT] = { .latest_fw = MTHCA_FW_VER(4, 8, 200), 1001 .flags = MTHCA_FLAG_PCIE }, 1002 [ARBEL_NATIVE] = { .latest_fw = MTHCA_FW_VER(5, 3, 0), 1003 .flags = MTHCA_FLAG_MEMFREE | 1004 MTHCA_FLAG_PCIE }, 1005 [SINAI] = { .latest_fw = MTHCA_FW_VER(1, 2, 0), 1006 .flags = MTHCA_FLAG_MEMFREE | 1007 MTHCA_FLAG_PCIE | 1008 MTHCA_FLAG_SINAI_OPT } 1009 }; 1010 1011 static int __mthca_init_one(struct pci_dev *pdev, int hca_type) 1012 { 1013 int ddr_hidden = 0; 1014 int err; 1015 struct mthca_dev *mdev; 1016 1017 printk(KERN_INFO PFX "Initializing %s\n", 1018 pci_name(pdev)); 1019 1020 err = pci_enable_device(pdev); 1021 if (err) { 1022 dev_err(&pdev->dev, "Cannot enable PCI device, " 1023 "aborting.\n"); 1024 return err; 1025 } 1026 1027 /* 1028 * Check for BARs. We expect 0: 1MB, 2: 8MB, 4: DDR (may not 1029 * be present) 1030 */ 1031 if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM) || 1032 pci_resource_len(pdev, 0) != 1 << 20) { 1033 dev_err(&pdev->dev, "Missing DCS, aborting.\n"); 1034 err = -ENODEV; 1035 goto err_disable_pdev; 1036 } 1037 if (!(pci_resource_flags(pdev, 2) & IORESOURCE_MEM)) { 1038 dev_err(&pdev->dev, "Missing UAR, aborting.\n"); 1039 err = -ENODEV; 1040 goto err_disable_pdev; 1041 } 1042 if (!(pci_resource_flags(pdev, 4) & IORESOURCE_MEM)) 1043 ddr_hidden = 1; 1044 1045 err = mthca_request_regions(pdev, ddr_hidden); 1046 if (err) { 1047 dev_err(&pdev->dev, "Cannot obtain PCI resources, " 1048 "aborting.\n"); 1049 goto err_disable_pdev; 1050 } 1051 1052 pci_set_master(pdev); 1053 1054 err = pci_set_dma_mask(pdev, DMA_64BIT_MASK); 1055 if (err) { 1056 dev_warn(&pdev->dev, "Warning: couldn't set 64-bit PCI DMA mask.\n"); 1057 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK); 1058 if (err) { 1059 dev_err(&pdev->dev, "Can't set PCI DMA mask, aborting.\n"); 1060 goto err_free_res; 1061 } 1062 } 1063 err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK); 1064 if (err) { 1065 dev_warn(&pdev->dev, "Warning: couldn't set 64-bit " 1066 "consistent PCI DMA mask.\n"); 1067 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK); 1068 if (err) { 1069 dev_err(&pdev->dev, "Can't set consistent PCI DMA mask, " 1070 "aborting.\n"); 1071 goto err_free_res; 1072 } 1073 } 1074 1075 mdev = (struct mthca_dev *) ib_alloc_device(sizeof *mdev); 1076 if (!mdev) { 1077 dev_err(&pdev->dev, "Device struct alloc failed, " 1078 "aborting.\n"); 1079 err = -ENOMEM; 1080 goto err_free_res; 1081 } 1082 1083 mdev->pdev = pdev; 1084 1085 mdev->mthca_flags = mthca_hca_table[hca_type].flags; 1086 if (ddr_hidden) 1087 mdev->mthca_flags |= MTHCA_FLAG_DDR_HIDDEN; 1088 1089 /* 1090 * Now reset the HCA before we touch the PCI capabilities or 1091 * attempt a firmware command, since a boot ROM may have left 1092 * the HCA in an undefined state. 1093 */ 1094 err = mthca_reset(mdev); 1095 if (err) { 1096 mthca_err(mdev, "Failed to reset HCA, aborting.\n"); 1097 goto err_free_dev; 1098 } 1099 1100 if (mthca_cmd_init(mdev)) { 1101 mthca_err(mdev, "Failed to init command interface, aborting.\n"); 1102 goto err_free_dev; 1103 } 1104 1105 err = mthca_tune_pci(mdev); 1106 if (err) 1107 goto err_cmd; 1108 1109 err = mthca_init_hca(mdev); 1110 if (err) 1111 goto err_cmd; 1112 1113 if (mdev->fw_ver < mthca_hca_table[hca_type].latest_fw) { 1114 mthca_warn(mdev, "HCA FW version %d.%d.%03d is old (%d.%d.%03d is current).\n", 1115 (int) (mdev->fw_ver >> 32), (int) (mdev->fw_ver >> 16) & 0xffff, 1116 (int) (mdev->fw_ver & 0xffff), 1117 (int) (mthca_hca_table[hca_type].latest_fw >> 32), 1118 (int) (mthca_hca_table[hca_type].latest_fw >> 16) & 0xffff, 1119 (int) (mthca_hca_table[hca_type].latest_fw & 0xffff)); 1120 mthca_warn(mdev, "If you have problems, try updating your HCA FW.\n"); 1121 } 1122 1123 if (msi_x && !mthca_enable_msi_x(mdev)) 1124 mdev->mthca_flags |= MTHCA_FLAG_MSI_X; 1125 1126 err = mthca_setup_hca(mdev); 1127 if (err == -EBUSY && (mdev->mthca_flags & MTHCA_FLAG_MSI_X)) { 1128 if (mdev->mthca_flags & MTHCA_FLAG_MSI_X) 1129 pci_disable_msix(pdev); 1130 mdev->mthca_flags &= ~MTHCA_FLAG_MSI_X; 1131 1132 err = mthca_setup_hca(mdev); 1133 } 1134 1135 if (err) 1136 goto err_close; 1137 1138 err = mthca_register_device(mdev); 1139 if (err) 1140 goto err_cleanup; 1141 1142 err = mthca_create_agents(mdev); 1143 if (err) 1144 goto err_unregister; 1145 1146 pci_set_drvdata(pdev, mdev); 1147 mdev->hca_type = hca_type; 1148 1149 return 0; 1150 1151 err_unregister: 1152 mthca_unregister_device(mdev); 1153 1154 err_cleanup: 1155 mthca_cleanup_mcg_table(mdev); 1156 mthca_cleanup_av_table(mdev); 1157 mthca_cleanup_qp_table(mdev); 1158 mthca_cleanup_srq_table(mdev); 1159 mthca_cleanup_cq_table(mdev); 1160 mthca_cmd_use_polling(mdev); 1161 mthca_cleanup_eq_table(mdev); 1162 1163 mthca_pd_free(mdev, &mdev->driver_pd); 1164 1165 mthca_cleanup_mr_table(mdev); 1166 mthca_cleanup_pd_table(mdev); 1167 mthca_cleanup_uar_table(mdev); 1168 1169 err_close: 1170 if (mdev->mthca_flags & MTHCA_FLAG_MSI_X) 1171 pci_disable_msix(pdev); 1172 1173 mthca_close_hca(mdev); 1174 1175 err_cmd: 1176 mthca_cmd_cleanup(mdev); 1177 1178 err_free_dev: 1179 ib_dealloc_device(&mdev->ib_dev); 1180 1181 err_free_res: 1182 mthca_release_regions(pdev, ddr_hidden); 1183 1184 err_disable_pdev: 1185 pci_disable_device(pdev); 1186 pci_set_drvdata(pdev, NULL); 1187 return err; 1188 } 1189 1190 static void __mthca_remove_one(struct pci_dev *pdev) 1191 { 1192 struct mthca_dev *mdev = pci_get_drvdata(pdev); 1193 u8 status; 1194 int p; 1195 1196 if (mdev) { 1197 mthca_free_agents(mdev); 1198 mthca_unregister_device(mdev); 1199 1200 for (p = 1; p <= mdev->limits.num_ports; ++p) 1201 mthca_CLOSE_IB(mdev, p, &status); 1202 1203 mthca_cleanup_mcg_table(mdev); 1204 mthca_cleanup_av_table(mdev); 1205 mthca_cleanup_qp_table(mdev); 1206 mthca_cleanup_srq_table(mdev); 1207 mthca_cleanup_cq_table(mdev); 1208 mthca_cmd_use_polling(mdev); 1209 mthca_cleanup_eq_table(mdev); 1210 1211 mthca_pd_free(mdev, &mdev->driver_pd); 1212 1213 mthca_cleanup_mr_table(mdev); 1214 mthca_cleanup_pd_table(mdev); 1215 1216 iounmap(mdev->kar); 1217 mthca_uar_free(mdev, &mdev->driver_uar); 1218 mthca_cleanup_uar_table(mdev); 1219 mthca_close_hca(mdev); 1220 mthca_cmd_cleanup(mdev); 1221 1222 if (mdev->mthca_flags & MTHCA_FLAG_MSI_X) 1223 pci_disable_msix(pdev); 1224 1225 ib_dealloc_device(&mdev->ib_dev); 1226 mthca_release_regions(pdev, mdev->mthca_flags & 1227 MTHCA_FLAG_DDR_HIDDEN); 1228 pci_disable_device(pdev); 1229 pci_set_drvdata(pdev, NULL); 1230 } 1231 } 1232 1233 int __mthca_restart_one(struct pci_dev *pdev) 1234 { 1235 struct mthca_dev *mdev; 1236 int hca_type; 1237 1238 mdev = pci_get_drvdata(pdev); 1239 if (!mdev) 1240 return -ENODEV; 1241 hca_type = mdev->hca_type; 1242 __mthca_remove_one(pdev); 1243 return __mthca_init_one(pdev, hca_type); 1244 } 1245 1246 static int __devinit mthca_init_one(struct pci_dev *pdev, 1247 const struct pci_device_id *id) 1248 { 1249 static int mthca_version_printed = 0; 1250 int ret; 1251 1252 mutex_lock(&mthca_device_mutex); 1253 1254 if (!mthca_version_printed) { 1255 printk(KERN_INFO "%s", mthca_version); 1256 ++mthca_version_printed; 1257 } 1258 1259 if (id->driver_data >= ARRAY_SIZE(mthca_hca_table)) { 1260 printk(KERN_ERR PFX "%s has invalid driver data %lx\n", 1261 pci_name(pdev), id->driver_data); 1262 mutex_unlock(&mthca_device_mutex); 1263 return -ENODEV; 1264 } 1265 1266 ret = __mthca_init_one(pdev, id->driver_data); 1267 1268 mutex_unlock(&mthca_device_mutex); 1269 1270 return ret; 1271 } 1272 1273 static void __devexit mthca_remove_one(struct pci_dev *pdev) 1274 { 1275 mutex_lock(&mthca_device_mutex); 1276 __mthca_remove_one(pdev); 1277 mutex_unlock(&mthca_device_mutex); 1278 } 1279 1280 static struct pci_device_id mthca_pci_table[] = { 1281 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_TAVOR), 1282 .driver_data = TAVOR }, 1283 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_TAVOR), 1284 .driver_data = TAVOR }, 1285 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT), 1286 .driver_data = ARBEL_COMPAT }, 1287 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT), 1288 .driver_data = ARBEL_COMPAT }, 1289 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_ARBEL), 1290 .driver_data = ARBEL_NATIVE }, 1291 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_ARBEL), 1292 .driver_data = ARBEL_NATIVE }, 1293 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_SINAI), 1294 .driver_data = SINAI }, 1295 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_SINAI), 1296 .driver_data = SINAI }, 1297 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_SINAI_OLD), 1298 .driver_data = SINAI }, 1299 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_SINAI_OLD), 1300 .driver_data = SINAI }, 1301 { 0, } 1302 }; 1303 1304 MODULE_DEVICE_TABLE(pci, mthca_pci_table); 1305 1306 static struct pci_driver mthca_driver = { 1307 .name = DRV_NAME, 1308 .id_table = mthca_pci_table, 1309 .probe = mthca_init_one, 1310 .remove = __devexit_p(mthca_remove_one) 1311 }; 1312 1313 static void __init __mthca_check_profile_val(const char *name, int *pval, 1314 int pval_default) 1315 { 1316 /* value must be positive and power of 2 */ 1317 int old_pval = *pval; 1318 1319 if (old_pval <= 0) 1320 *pval = pval_default; 1321 else 1322 *pval = roundup_pow_of_two(old_pval); 1323 1324 if (old_pval != *pval) { 1325 printk(KERN_WARNING PFX "Invalid value %d for %s in module parameter.\n", 1326 old_pval, name); 1327 printk(KERN_WARNING PFX "Corrected %s to %d.\n", name, *pval); 1328 } 1329 } 1330 1331 #define mthca_check_profile_val(name, default) \ 1332 __mthca_check_profile_val(#name, &hca_profile.name, default) 1333 1334 static void __init mthca_validate_profile(void) 1335 { 1336 mthca_check_profile_val(num_qp, MTHCA_DEFAULT_NUM_QP); 1337 mthca_check_profile_val(rdb_per_qp, MTHCA_DEFAULT_RDB_PER_QP); 1338 mthca_check_profile_val(num_cq, MTHCA_DEFAULT_NUM_CQ); 1339 mthca_check_profile_val(num_mcg, MTHCA_DEFAULT_NUM_MCG); 1340 mthca_check_profile_val(num_mpt, MTHCA_DEFAULT_NUM_MPT); 1341 mthca_check_profile_val(num_mtt, MTHCA_DEFAULT_NUM_MTT); 1342 mthca_check_profile_val(num_udav, MTHCA_DEFAULT_NUM_UDAV); 1343 mthca_check_profile_val(fmr_reserved_mtts, MTHCA_DEFAULT_NUM_RESERVED_MTTS); 1344 1345 if (hca_profile.fmr_reserved_mtts >= hca_profile.num_mtt) { 1346 printk(KERN_WARNING PFX "Invalid fmr_reserved_mtts module parameter %d.\n", 1347 hca_profile.fmr_reserved_mtts); 1348 printk(KERN_WARNING PFX "(Must be smaller than num_mtt %d)\n", 1349 hca_profile.num_mtt); 1350 hca_profile.fmr_reserved_mtts = hca_profile.num_mtt / 2; 1351 printk(KERN_WARNING PFX "Corrected fmr_reserved_mtts to %d.\n", 1352 hca_profile.fmr_reserved_mtts); 1353 } 1354 } 1355 1356 static int __init mthca_init(void) 1357 { 1358 int ret; 1359 1360 mthca_validate_profile(); 1361 1362 ret = mthca_catas_init(); 1363 if (ret) 1364 return ret; 1365 1366 ret = pci_register_driver(&mthca_driver); 1367 if (ret < 0) { 1368 mthca_catas_cleanup(); 1369 return ret; 1370 } 1371 1372 return 0; 1373 } 1374 1375 static void __exit mthca_cleanup(void) 1376 { 1377 pci_unregister_driver(&mthca_driver); 1378 mthca_catas_cleanup(); 1379 } 1380 1381 module_init(mthca_init); 1382 module_exit(mthca_cleanup); 1383