1 /* 2 * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved. 3 * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved. 4 * Copyright (c) 2005 Mellanox Technologies. All rights reserved. 5 * 6 * This software is available to you under a choice of one of two 7 * licenses. You may choose to be licensed under the terms of the GNU 8 * General Public License (GPL) Version 2, available from the file 9 * COPYING in the main directory of this source tree, or the 10 * OpenIB.org BSD license below: 11 * 12 * Redistribution and use in source and binary forms, with or 13 * without modification, are permitted provided that the following 14 * conditions are met: 15 * 16 * - Redistributions of source code must retain the above 17 * copyright notice, this list of conditions and the following 18 * disclaimer. 19 * 20 * - Redistributions in binary form must reproduce the above 21 * copyright notice, this list of conditions and the following 22 * disclaimer in the documentation and/or other materials 23 * provided with the distribution. 24 * 25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 32 * SOFTWARE. 33 * 34 * $Id: mthca_main.c 1396 2004-12-28 04:10:27Z roland $ 35 */ 36 37 #include <linux/config.h> 38 #include <linux/module.h> 39 #include <linux/init.h> 40 #include <linux/errno.h> 41 #include <linux/pci.h> 42 #include <linux/interrupt.h> 43 44 #include "mthca_dev.h" 45 #include "mthca_config_reg.h" 46 #include "mthca_cmd.h" 47 #include "mthca_profile.h" 48 #include "mthca_memfree.h" 49 50 MODULE_AUTHOR("Roland Dreier"); 51 MODULE_DESCRIPTION("Mellanox InfiniBand HCA low-level driver"); 52 MODULE_LICENSE("Dual BSD/GPL"); 53 MODULE_VERSION(DRV_VERSION); 54 55 #ifdef CONFIG_PCI_MSI 56 57 static int msi_x = 0; 58 module_param(msi_x, int, 0444); 59 MODULE_PARM_DESC(msi_x, "attempt to use MSI-X if nonzero"); 60 61 static int msi = 0; 62 module_param(msi, int, 0444); 63 MODULE_PARM_DESC(msi, "attempt to use MSI if nonzero"); 64 65 #else /* CONFIG_PCI_MSI */ 66 67 #define msi_x (0) 68 #define msi (0) 69 70 #endif /* CONFIG_PCI_MSI */ 71 72 static const char mthca_version[] __devinitdata = 73 DRV_NAME ": Mellanox InfiniBand HCA driver v" 74 DRV_VERSION " (" DRV_RELDATE ")\n"; 75 76 static struct mthca_profile default_profile = { 77 .num_qp = 1 << 16, 78 .rdb_per_qp = 4, 79 .num_cq = 1 << 16, 80 .num_mcg = 1 << 13, 81 .num_mpt = 1 << 17, 82 .num_mtt = 1 << 20, 83 .num_udav = 1 << 15, /* Tavor only */ 84 .fmr_reserved_mtts = 1 << 18, /* Tavor only */ 85 .uarc_size = 1 << 18, /* Arbel only */ 86 }; 87 88 static int __devinit mthca_tune_pci(struct mthca_dev *mdev) 89 { 90 int cap; 91 u16 val; 92 93 /* First try to max out Read Byte Count */ 94 cap = pci_find_capability(mdev->pdev, PCI_CAP_ID_PCIX); 95 if (cap) { 96 if (pci_read_config_word(mdev->pdev, cap + PCI_X_CMD, &val)) { 97 mthca_err(mdev, "Couldn't read PCI-X command register, " 98 "aborting.\n"); 99 return -ENODEV; 100 } 101 val = (val & ~PCI_X_CMD_MAX_READ) | (3 << 2); 102 if (pci_write_config_word(mdev->pdev, cap + PCI_X_CMD, val)) { 103 mthca_err(mdev, "Couldn't write PCI-X command register, " 104 "aborting.\n"); 105 return -ENODEV; 106 } 107 } else if (!(mdev->mthca_flags & MTHCA_FLAG_PCIE)) 108 mthca_info(mdev, "No PCI-X capability, not setting RBC.\n"); 109 110 cap = pci_find_capability(mdev->pdev, PCI_CAP_ID_EXP); 111 if (cap) { 112 if (pci_read_config_word(mdev->pdev, cap + PCI_EXP_DEVCTL, &val)) { 113 mthca_err(mdev, "Couldn't read PCI Express device control " 114 "register, aborting.\n"); 115 return -ENODEV; 116 } 117 val = (val & ~PCI_EXP_DEVCTL_READRQ) | (5 << 12); 118 if (pci_write_config_word(mdev->pdev, cap + PCI_EXP_DEVCTL, val)) { 119 mthca_err(mdev, "Couldn't write PCI Express device control " 120 "register, aborting.\n"); 121 return -ENODEV; 122 } 123 } else if (mdev->mthca_flags & MTHCA_FLAG_PCIE) 124 mthca_info(mdev, "No PCI Express capability, " 125 "not setting Max Read Request Size.\n"); 126 127 return 0; 128 } 129 130 static int __devinit mthca_dev_lim(struct mthca_dev *mdev, struct mthca_dev_lim *dev_lim) 131 { 132 int err; 133 u8 status; 134 135 err = mthca_QUERY_DEV_LIM(mdev, dev_lim, &status); 136 if (err) { 137 mthca_err(mdev, "QUERY_DEV_LIM command failed, aborting.\n"); 138 return err; 139 } 140 if (status) { 141 mthca_err(mdev, "QUERY_DEV_LIM returned status 0x%02x, " 142 "aborting.\n", status); 143 return -EINVAL; 144 } 145 if (dev_lim->min_page_sz > PAGE_SIZE) { 146 mthca_err(mdev, "HCA minimum page size of %d bigger than " 147 "kernel PAGE_SIZE of %ld, aborting.\n", 148 dev_lim->min_page_sz, PAGE_SIZE); 149 return -ENODEV; 150 } 151 if (dev_lim->num_ports > MTHCA_MAX_PORTS) { 152 mthca_err(mdev, "HCA has %d ports, but we only support %d, " 153 "aborting.\n", 154 dev_lim->num_ports, MTHCA_MAX_PORTS); 155 return -ENODEV; 156 } 157 158 mdev->limits.num_ports = dev_lim->num_ports; 159 mdev->limits.vl_cap = dev_lim->max_vl; 160 mdev->limits.mtu_cap = dev_lim->max_mtu; 161 mdev->limits.gid_table_len = dev_lim->max_gids; 162 mdev->limits.pkey_table_len = dev_lim->max_pkeys; 163 mdev->limits.local_ca_ack_delay = dev_lim->local_ca_ack_delay; 164 mdev->limits.max_sg = dev_lim->max_sg; 165 mdev->limits.max_wqes = dev_lim->max_qp_sz; 166 mdev->limits.max_qp_init_rdma = dev_lim->max_requester_per_qp; 167 mdev->limits.reserved_qps = dev_lim->reserved_qps; 168 mdev->limits.max_srq_wqes = dev_lim->max_srq_sz; 169 mdev->limits.reserved_srqs = dev_lim->reserved_srqs; 170 mdev->limits.reserved_eecs = dev_lim->reserved_eecs; 171 mdev->limits.max_desc_sz = dev_lim->max_desc_sz; 172 /* 173 * Subtract 1 from the limit because we need to allocate a 174 * spare CQE so the HCA HW can tell the difference between an 175 * empty CQ and a full CQ. 176 */ 177 mdev->limits.max_cqes = dev_lim->max_cq_sz - 1; 178 mdev->limits.reserved_cqs = dev_lim->reserved_cqs; 179 mdev->limits.reserved_eqs = dev_lim->reserved_eqs; 180 mdev->limits.reserved_mtts = dev_lim->reserved_mtts; 181 mdev->limits.reserved_mrws = dev_lim->reserved_mrws; 182 mdev->limits.reserved_uars = dev_lim->reserved_uars; 183 mdev->limits.reserved_pds = dev_lim->reserved_pds; 184 mdev->limits.port_width_cap = dev_lim->max_port_width; 185 mdev->limits.page_size_cap = ~(u32) (dev_lim->min_page_sz - 1); 186 mdev->limits.flags = dev_lim->flags; 187 188 /* IB_DEVICE_RESIZE_MAX_WR not supported by driver. 189 May be doable since hardware supports it for SRQ. 190 191 IB_DEVICE_N_NOTIFY_CQ is supported by hardware but not by driver. 192 193 IB_DEVICE_SRQ_RESIZE is supported by hardware but SRQ is not 194 supported by driver. */ 195 mdev->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT | 196 IB_DEVICE_PORT_ACTIVE_EVENT | 197 IB_DEVICE_SYS_IMAGE_GUID | 198 IB_DEVICE_RC_RNR_NAK_GEN; 199 200 if (dev_lim->flags & DEV_LIM_FLAG_BAD_PKEY_CNTR) 201 mdev->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR; 202 203 if (dev_lim->flags & DEV_LIM_FLAG_BAD_QKEY_CNTR) 204 mdev->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR; 205 206 if (dev_lim->flags & DEV_LIM_FLAG_RAW_MULTI) 207 mdev->device_cap_flags |= IB_DEVICE_RAW_MULTI; 208 209 if (dev_lim->flags & DEV_LIM_FLAG_AUTO_PATH_MIG) 210 mdev->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG; 211 212 if (dev_lim->flags & DEV_LIM_FLAG_UD_AV_PORT_ENFORCE) 213 mdev->device_cap_flags |= IB_DEVICE_UD_AV_PORT_ENFORCE; 214 215 if (dev_lim->flags & DEV_LIM_FLAG_SRQ) 216 mdev->mthca_flags |= MTHCA_FLAG_SRQ; 217 218 return 0; 219 } 220 221 static int __devinit mthca_init_tavor(struct mthca_dev *mdev) 222 { 223 u8 status; 224 int err; 225 struct mthca_dev_lim dev_lim; 226 struct mthca_profile profile; 227 struct mthca_init_hca_param init_hca; 228 229 err = mthca_SYS_EN(mdev, &status); 230 if (err) { 231 mthca_err(mdev, "SYS_EN command failed, aborting.\n"); 232 return err; 233 } 234 if (status) { 235 mthca_err(mdev, "SYS_EN returned status 0x%02x, " 236 "aborting.\n", status); 237 return -EINVAL; 238 } 239 240 err = mthca_QUERY_FW(mdev, &status); 241 if (err) { 242 mthca_err(mdev, "QUERY_FW command failed, aborting.\n"); 243 goto err_disable; 244 } 245 if (status) { 246 mthca_err(mdev, "QUERY_FW returned status 0x%02x, " 247 "aborting.\n", status); 248 err = -EINVAL; 249 goto err_disable; 250 } 251 err = mthca_QUERY_DDR(mdev, &status); 252 if (err) { 253 mthca_err(mdev, "QUERY_DDR command failed, aborting.\n"); 254 goto err_disable; 255 } 256 if (status) { 257 mthca_err(mdev, "QUERY_DDR returned status 0x%02x, " 258 "aborting.\n", status); 259 err = -EINVAL; 260 goto err_disable; 261 } 262 263 err = mthca_dev_lim(mdev, &dev_lim); 264 if (err) { 265 mthca_err(mdev, "QUERY_DEV_LIM command failed, aborting.\n"); 266 goto err_disable; 267 } 268 269 profile = default_profile; 270 profile.num_uar = dev_lim.uar_size / PAGE_SIZE; 271 profile.uarc_size = 0; 272 if (mdev->mthca_flags & MTHCA_FLAG_SRQ) 273 profile.num_srq = dev_lim.max_srqs; 274 275 err = mthca_make_profile(mdev, &profile, &dev_lim, &init_hca); 276 if (err < 0) 277 goto err_disable; 278 279 err = mthca_INIT_HCA(mdev, &init_hca, &status); 280 if (err) { 281 mthca_err(mdev, "INIT_HCA command failed, aborting.\n"); 282 goto err_disable; 283 } 284 if (status) { 285 mthca_err(mdev, "INIT_HCA returned status 0x%02x, " 286 "aborting.\n", status); 287 err = -EINVAL; 288 goto err_disable; 289 } 290 291 return 0; 292 293 err_disable: 294 mthca_SYS_DIS(mdev, &status); 295 296 return err; 297 } 298 299 static int __devinit mthca_load_fw(struct mthca_dev *mdev) 300 { 301 u8 status; 302 int err; 303 304 /* FIXME: use HCA-attached memory for FW if present */ 305 306 mdev->fw.arbel.fw_icm = 307 mthca_alloc_icm(mdev, mdev->fw.arbel.fw_pages, 308 GFP_HIGHUSER | __GFP_NOWARN); 309 if (!mdev->fw.arbel.fw_icm) { 310 mthca_err(mdev, "Couldn't allocate FW area, aborting.\n"); 311 return -ENOMEM; 312 } 313 314 err = mthca_MAP_FA(mdev, mdev->fw.arbel.fw_icm, &status); 315 if (err) { 316 mthca_err(mdev, "MAP_FA command failed, aborting.\n"); 317 goto err_free; 318 } 319 if (status) { 320 mthca_err(mdev, "MAP_FA returned status 0x%02x, aborting.\n", status); 321 err = -EINVAL; 322 goto err_free; 323 } 324 err = mthca_RUN_FW(mdev, &status); 325 if (err) { 326 mthca_err(mdev, "RUN_FW command failed, aborting.\n"); 327 goto err_unmap_fa; 328 } 329 if (status) { 330 mthca_err(mdev, "RUN_FW returned status 0x%02x, aborting.\n", status); 331 err = -EINVAL; 332 goto err_unmap_fa; 333 } 334 335 return 0; 336 337 err_unmap_fa: 338 mthca_UNMAP_FA(mdev, &status); 339 340 err_free: 341 mthca_free_icm(mdev, mdev->fw.arbel.fw_icm); 342 return err; 343 } 344 345 static int __devinit mthca_init_icm(struct mthca_dev *mdev, 346 struct mthca_dev_lim *dev_lim, 347 struct mthca_init_hca_param *init_hca, 348 u64 icm_size) 349 { 350 u64 aux_pages; 351 u8 status; 352 int err; 353 354 err = mthca_SET_ICM_SIZE(mdev, icm_size, &aux_pages, &status); 355 if (err) { 356 mthca_err(mdev, "SET_ICM_SIZE command failed, aborting.\n"); 357 return err; 358 } 359 if (status) { 360 mthca_err(mdev, "SET_ICM_SIZE returned status 0x%02x, " 361 "aborting.\n", status); 362 return -EINVAL; 363 } 364 365 mthca_dbg(mdev, "%lld KB of HCA context requires %lld KB aux memory.\n", 366 (unsigned long long) icm_size >> 10, 367 (unsigned long long) aux_pages << 2); 368 369 mdev->fw.arbel.aux_icm = mthca_alloc_icm(mdev, aux_pages, 370 GFP_HIGHUSER | __GFP_NOWARN); 371 if (!mdev->fw.arbel.aux_icm) { 372 mthca_err(mdev, "Couldn't allocate aux memory, aborting.\n"); 373 return -ENOMEM; 374 } 375 376 err = mthca_MAP_ICM_AUX(mdev, mdev->fw.arbel.aux_icm, &status); 377 if (err) { 378 mthca_err(mdev, "MAP_ICM_AUX command failed, aborting.\n"); 379 goto err_free_aux; 380 } 381 if (status) { 382 mthca_err(mdev, "MAP_ICM_AUX returned status 0x%02x, aborting.\n", status); 383 err = -EINVAL; 384 goto err_free_aux; 385 } 386 387 err = mthca_map_eq_icm(mdev, init_hca->eqc_base); 388 if (err) { 389 mthca_err(mdev, "Failed to map EQ context memory, aborting.\n"); 390 goto err_unmap_aux; 391 } 392 393 mdev->mr_table.mtt_table = mthca_alloc_icm_table(mdev, init_hca->mtt_base, 394 MTHCA_MTT_SEG_SIZE, 395 mdev->limits.num_mtt_segs, 396 mdev->limits.reserved_mtts, 1); 397 if (!mdev->mr_table.mtt_table) { 398 mthca_err(mdev, "Failed to map MTT context memory, aborting.\n"); 399 err = -ENOMEM; 400 goto err_unmap_eq; 401 } 402 403 mdev->mr_table.mpt_table = mthca_alloc_icm_table(mdev, init_hca->mpt_base, 404 dev_lim->mpt_entry_sz, 405 mdev->limits.num_mpts, 406 mdev->limits.reserved_mrws, 1); 407 if (!mdev->mr_table.mpt_table) { 408 mthca_err(mdev, "Failed to map MPT context memory, aborting.\n"); 409 err = -ENOMEM; 410 goto err_unmap_mtt; 411 } 412 413 mdev->qp_table.qp_table = mthca_alloc_icm_table(mdev, init_hca->qpc_base, 414 dev_lim->qpc_entry_sz, 415 mdev->limits.num_qps, 416 mdev->limits.reserved_qps, 0); 417 if (!mdev->qp_table.qp_table) { 418 mthca_err(mdev, "Failed to map QP context memory, aborting.\n"); 419 err = -ENOMEM; 420 goto err_unmap_mpt; 421 } 422 423 mdev->qp_table.eqp_table = mthca_alloc_icm_table(mdev, init_hca->eqpc_base, 424 dev_lim->eqpc_entry_sz, 425 mdev->limits.num_qps, 426 mdev->limits.reserved_qps, 0); 427 if (!mdev->qp_table.eqp_table) { 428 mthca_err(mdev, "Failed to map EQP context memory, aborting.\n"); 429 err = -ENOMEM; 430 goto err_unmap_qp; 431 } 432 433 mdev->qp_table.rdb_table = mthca_alloc_icm_table(mdev, init_hca->rdb_base, 434 MTHCA_RDB_ENTRY_SIZE, 435 mdev->limits.num_qps << 436 mdev->qp_table.rdb_shift, 437 0, 0); 438 if (!mdev->qp_table.rdb_table) { 439 mthca_err(mdev, "Failed to map RDB context memory, aborting\n"); 440 err = -ENOMEM; 441 goto err_unmap_eqp; 442 } 443 444 mdev->cq_table.table = mthca_alloc_icm_table(mdev, init_hca->cqc_base, 445 dev_lim->cqc_entry_sz, 446 mdev->limits.num_cqs, 447 mdev->limits.reserved_cqs, 0); 448 if (!mdev->cq_table.table) { 449 mthca_err(mdev, "Failed to map CQ context memory, aborting.\n"); 450 err = -ENOMEM; 451 goto err_unmap_rdb; 452 } 453 454 if (mdev->mthca_flags & MTHCA_FLAG_SRQ) { 455 mdev->srq_table.table = 456 mthca_alloc_icm_table(mdev, init_hca->srqc_base, 457 dev_lim->srq_entry_sz, 458 mdev->limits.num_srqs, 459 mdev->limits.reserved_srqs, 0); 460 if (!mdev->srq_table.table) { 461 mthca_err(mdev, "Failed to map SRQ context memory, " 462 "aborting.\n"); 463 err = -ENOMEM; 464 goto err_unmap_cq; 465 } 466 } 467 468 /* 469 * It's not strictly required, but for simplicity just map the 470 * whole multicast group table now. The table isn't very big 471 * and it's a lot easier than trying to track ref counts. 472 */ 473 mdev->mcg_table.table = mthca_alloc_icm_table(mdev, init_hca->mc_base, 474 MTHCA_MGM_ENTRY_SIZE, 475 mdev->limits.num_mgms + 476 mdev->limits.num_amgms, 477 mdev->limits.num_mgms + 478 mdev->limits.num_amgms, 479 0); 480 if (!mdev->mcg_table.table) { 481 mthca_err(mdev, "Failed to map MCG context memory, aborting.\n"); 482 err = -ENOMEM; 483 goto err_unmap_srq; 484 } 485 486 return 0; 487 488 err_unmap_srq: 489 if (mdev->mthca_flags & MTHCA_FLAG_SRQ) 490 mthca_free_icm_table(mdev, mdev->srq_table.table); 491 492 err_unmap_cq: 493 mthca_free_icm_table(mdev, mdev->cq_table.table); 494 495 err_unmap_rdb: 496 mthca_free_icm_table(mdev, mdev->qp_table.rdb_table); 497 498 err_unmap_eqp: 499 mthca_free_icm_table(mdev, mdev->qp_table.eqp_table); 500 501 err_unmap_qp: 502 mthca_free_icm_table(mdev, mdev->qp_table.qp_table); 503 504 err_unmap_mpt: 505 mthca_free_icm_table(mdev, mdev->mr_table.mpt_table); 506 507 err_unmap_mtt: 508 mthca_free_icm_table(mdev, mdev->mr_table.mtt_table); 509 510 err_unmap_eq: 511 mthca_unmap_eq_icm(mdev); 512 513 err_unmap_aux: 514 mthca_UNMAP_ICM_AUX(mdev, &status); 515 516 err_free_aux: 517 mthca_free_icm(mdev, mdev->fw.arbel.aux_icm); 518 519 return err; 520 } 521 522 static void mthca_free_icms(struct mthca_dev *mdev) 523 { 524 u8 status; 525 526 mthca_free_icm_table(mdev, mdev->mcg_table.table); 527 if (mdev->mthca_flags & MTHCA_FLAG_SRQ) 528 mthca_free_icm_table(mdev, mdev->srq_table.table); 529 mthca_free_icm_table(mdev, mdev->cq_table.table); 530 mthca_free_icm_table(mdev, mdev->qp_table.rdb_table); 531 mthca_free_icm_table(mdev, mdev->qp_table.eqp_table); 532 mthca_free_icm_table(mdev, mdev->qp_table.qp_table); 533 mthca_free_icm_table(mdev, mdev->mr_table.mpt_table); 534 mthca_free_icm_table(mdev, mdev->mr_table.mtt_table); 535 mthca_unmap_eq_icm(mdev); 536 537 mthca_UNMAP_ICM_AUX(mdev, &status); 538 mthca_free_icm(mdev, mdev->fw.arbel.aux_icm); 539 } 540 541 static int __devinit mthca_init_arbel(struct mthca_dev *mdev) 542 { 543 struct mthca_dev_lim dev_lim; 544 struct mthca_profile profile; 545 struct mthca_init_hca_param init_hca; 546 u64 icm_size; 547 u8 status; 548 int err; 549 550 err = mthca_QUERY_FW(mdev, &status); 551 if (err) { 552 mthca_err(mdev, "QUERY_FW command failed, aborting.\n"); 553 return err; 554 } 555 if (status) { 556 mthca_err(mdev, "QUERY_FW returned status 0x%02x, " 557 "aborting.\n", status); 558 return -EINVAL; 559 } 560 561 err = mthca_ENABLE_LAM(mdev, &status); 562 if (err) { 563 mthca_err(mdev, "ENABLE_LAM command failed, aborting.\n"); 564 return err; 565 } 566 if (status == MTHCA_CMD_STAT_LAM_NOT_PRE) { 567 mthca_dbg(mdev, "No HCA-attached memory (running in MemFree mode)\n"); 568 mdev->mthca_flags |= MTHCA_FLAG_NO_LAM; 569 } else if (status) { 570 mthca_err(mdev, "ENABLE_LAM returned status 0x%02x, " 571 "aborting.\n", status); 572 return -EINVAL; 573 } 574 575 err = mthca_load_fw(mdev); 576 if (err) { 577 mthca_err(mdev, "Failed to start FW, aborting.\n"); 578 goto err_disable; 579 } 580 581 err = mthca_dev_lim(mdev, &dev_lim); 582 if (err) { 583 mthca_err(mdev, "QUERY_DEV_LIM command failed, aborting.\n"); 584 goto err_stop_fw; 585 } 586 587 profile = default_profile; 588 profile.num_uar = dev_lim.uar_size / PAGE_SIZE; 589 profile.num_udav = 0; 590 if (mdev->mthca_flags & MTHCA_FLAG_SRQ) 591 profile.num_srq = dev_lim.max_srqs; 592 593 icm_size = mthca_make_profile(mdev, &profile, &dev_lim, &init_hca); 594 if ((int) icm_size < 0) { 595 err = icm_size; 596 goto err_stop_fw; 597 } 598 599 err = mthca_init_icm(mdev, &dev_lim, &init_hca, icm_size); 600 if (err) 601 goto err_stop_fw; 602 603 err = mthca_INIT_HCA(mdev, &init_hca, &status); 604 if (err) { 605 mthca_err(mdev, "INIT_HCA command failed, aborting.\n"); 606 goto err_free_icm; 607 } 608 if (status) { 609 mthca_err(mdev, "INIT_HCA returned status 0x%02x, " 610 "aborting.\n", status); 611 err = -EINVAL; 612 goto err_free_icm; 613 } 614 615 return 0; 616 617 err_free_icm: 618 mthca_free_icms(mdev); 619 620 err_stop_fw: 621 mthca_UNMAP_FA(mdev, &status); 622 mthca_free_icm(mdev, mdev->fw.arbel.fw_icm); 623 624 err_disable: 625 if (!(mdev->mthca_flags & MTHCA_FLAG_NO_LAM)) 626 mthca_DISABLE_LAM(mdev, &status); 627 628 return err; 629 } 630 631 static void mthca_close_hca(struct mthca_dev *mdev) 632 { 633 u8 status; 634 635 mthca_CLOSE_HCA(mdev, 0, &status); 636 637 if (mthca_is_memfree(mdev)) { 638 mthca_free_icms(mdev); 639 640 mthca_UNMAP_FA(mdev, &status); 641 mthca_free_icm(mdev, mdev->fw.arbel.fw_icm); 642 643 if (!(mdev->mthca_flags & MTHCA_FLAG_NO_LAM)) 644 mthca_DISABLE_LAM(mdev, &status); 645 } else 646 mthca_SYS_DIS(mdev, &status); 647 } 648 649 static int __devinit mthca_init_hca(struct mthca_dev *mdev) 650 { 651 u8 status; 652 int err; 653 struct mthca_adapter adapter; 654 655 if (mthca_is_memfree(mdev)) 656 err = mthca_init_arbel(mdev); 657 else 658 err = mthca_init_tavor(mdev); 659 660 if (err) 661 return err; 662 663 err = mthca_QUERY_ADAPTER(mdev, &adapter, &status); 664 if (err) { 665 mthca_err(mdev, "QUERY_ADAPTER command failed, aborting.\n"); 666 goto err_close; 667 } 668 if (status) { 669 mthca_err(mdev, "QUERY_ADAPTER returned status 0x%02x, " 670 "aborting.\n", status); 671 err = -EINVAL; 672 goto err_close; 673 } 674 675 mdev->eq_table.inta_pin = adapter.inta_pin; 676 mdev->rev_id = adapter.revision_id; 677 memcpy(mdev->board_id, adapter.board_id, sizeof mdev->board_id); 678 679 return 0; 680 681 err_close: 682 mthca_close_hca(mdev); 683 return err; 684 } 685 686 static int __devinit mthca_setup_hca(struct mthca_dev *dev) 687 { 688 int err; 689 u8 status; 690 691 MTHCA_INIT_DOORBELL_LOCK(&dev->doorbell_lock); 692 693 err = mthca_init_uar_table(dev); 694 if (err) { 695 mthca_err(dev, "Failed to initialize " 696 "user access region table, aborting.\n"); 697 return err; 698 } 699 700 err = mthca_uar_alloc(dev, &dev->driver_uar); 701 if (err) { 702 mthca_err(dev, "Failed to allocate driver access region, " 703 "aborting.\n"); 704 goto err_uar_table_free; 705 } 706 707 dev->kar = ioremap(dev->driver_uar.pfn << PAGE_SHIFT, PAGE_SIZE); 708 if (!dev->kar) { 709 mthca_err(dev, "Couldn't map kernel access region, " 710 "aborting.\n"); 711 err = -ENOMEM; 712 goto err_uar_free; 713 } 714 715 err = mthca_init_pd_table(dev); 716 if (err) { 717 mthca_err(dev, "Failed to initialize " 718 "protection domain table, aborting.\n"); 719 goto err_kar_unmap; 720 } 721 722 err = mthca_init_mr_table(dev); 723 if (err) { 724 mthca_err(dev, "Failed to initialize " 725 "memory region table, aborting.\n"); 726 goto err_pd_table_free; 727 } 728 729 err = mthca_pd_alloc(dev, 1, &dev->driver_pd); 730 if (err) { 731 mthca_err(dev, "Failed to create driver PD, " 732 "aborting.\n"); 733 goto err_mr_table_free; 734 } 735 736 err = mthca_init_eq_table(dev); 737 if (err) { 738 mthca_err(dev, "Failed to initialize " 739 "event queue table, aborting.\n"); 740 goto err_pd_free; 741 } 742 743 err = mthca_cmd_use_events(dev); 744 if (err) { 745 mthca_err(dev, "Failed to switch to event-driven " 746 "firmware commands, aborting.\n"); 747 goto err_eq_table_free; 748 } 749 750 err = mthca_NOP(dev, &status); 751 if (err || status) { 752 mthca_err(dev, "NOP command failed to generate interrupt (IRQ %d), aborting.\n", 753 dev->mthca_flags & MTHCA_FLAG_MSI_X ? 754 dev->eq_table.eq[MTHCA_EQ_CMD].msi_x_vector : 755 dev->pdev->irq); 756 if (dev->mthca_flags & (MTHCA_FLAG_MSI | MTHCA_FLAG_MSI_X)) 757 mthca_err(dev, "Try again with MSI/MSI-X disabled.\n"); 758 else 759 mthca_err(dev, "BIOS or ACPI interrupt routing problem?\n"); 760 761 goto err_cmd_poll; 762 } 763 764 mthca_dbg(dev, "NOP command IRQ test passed\n"); 765 766 err = mthca_init_cq_table(dev); 767 if (err) { 768 mthca_err(dev, "Failed to initialize " 769 "completion queue table, aborting.\n"); 770 goto err_cmd_poll; 771 } 772 773 err = mthca_init_srq_table(dev); 774 if (err) { 775 mthca_err(dev, "Failed to initialize " 776 "shared receive queue table, aborting.\n"); 777 goto err_cq_table_free; 778 } 779 780 err = mthca_init_qp_table(dev); 781 if (err) { 782 mthca_err(dev, "Failed to initialize " 783 "queue pair table, aborting.\n"); 784 goto err_srq_table_free; 785 } 786 787 err = mthca_init_av_table(dev); 788 if (err) { 789 mthca_err(dev, "Failed to initialize " 790 "address vector table, aborting.\n"); 791 goto err_qp_table_free; 792 } 793 794 err = mthca_init_mcg_table(dev); 795 if (err) { 796 mthca_err(dev, "Failed to initialize " 797 "multicast group table, aborting.\n"); 798 goto err_av_table_free; 799 } 800 801 return 0; 802 803 err_av_table_free: 804 mthca_cleanup_av_table(dev); 805 806 err_qp_table_free: 807 mthca_cleanup_qp_table(dev); 808 809 err_srq_table_free: 810 mthca_cleanup_srq_table(dev); 811 812 err_cq_table_free: 813 mthca_cleanup_cq_table(dev); 814 815 err_cmd_poll: 816 mthca_cmd_use_polling(dev); 817 818 err_eq_table_free: 819 mthca_cleanup_eq_table(dev); 820 821 err_pd_free: 822 mthca_pd_free(dev, &dev->driver_pd); 823 824 err_mr_table_free: 825 mthca_cleanup_mr_table(dev); 826 827 err_pd_table_free: 828 mthca_cleanup_pd_table(dev); 829 830 err_kar_unmap: 831 iounmap(dev->kar); 832 833 err_uar_free: 834 mthca_uar_free(dev, &dev->driver_uar); 835 836 err_uar_table_free: 837 mthca_cleanup_uar_table(dev); 838 return err; 839 } 840 841 static int __devinit mthca_request_regions(struct pci_dev *pdev, 842 int ddr_hidden) 843 { 844 int err; 845 846 /* 847 * We can't just use pci_request_regions() because the MSI-X 848 * table is right in the middle of the first BAR. If we did 849 * pci_request_region and grab all of the first BAR, then 850 * setting up MSI-X would fail, since the PCI core wants to do 851 * request_mem_region on the MSI-X vector table. 852 * 853 * So just request what we need right now, and request any 854 * other regions we need when setting up EQs. 855 */ 856 if (!request_mem_region(pci_resource_start(pdev, 0) + MTHCA_HCR_BASE, 857 MTHCA_HCR_SIZE, DRV_NAME)) 858 return -EBUSY; 859 860 err = pci_request_region(pdev, 2, DRV_NAME); 861 if (err) 862 goto err_bar2_failed; 863 864 if (!ddr_hidden) { 865 err = pci_request_region(pdev, 4, DRV_NAME); 866 if (err) 867 goto err_bar4_failed; 868 } 869 870 return 0; 871 872 err_bar4_failed: 873 pci_release_region(pdev, 2); 874 875 err_bar2_failed: 876 release_mem_region(pci_resource_start(pdev, 0) + MTHCA_HCR_BASE, 877 MTHCA_HCR_SIZE); 878 879 return err; 880 } 881 882 static void mthca_release_regions(struct pci_dev *pdev, 883 int ddr_hidden) 884 { 885 if (!ddr_hidden) 886 pci_release_region(pdev, 4); 887 888 pci_release_region(pdev, 2); 889 890 release_mem_region(pci_resource_start(pdev, 0) + MTHCA_HCR_BASE, 891 MTHCA_HCR_SIZE); 892 } 893 894 static int __devinit mthca_enable_msi_x(struct mthca_dev *mdev) 895 { 896 struct msix_entry entries[3]; 897 int err; 898 899 entries[0].entry = 0; 900 entries[1].entry = 1; 901 entries[2].entry = 2; 902 903 err = pci_enable_msix(mdev->pdev, entries, ARRAY_SIZE(entries)); 904 if (err) { 905 if (err > 0) 906 mthca_info(mdev, "Only %d MSI-X vectors available, " 907 "not using MSI-X\n", err); 908 return err; 909 } 910 911 mdev->eq_table.eq[MTHCA_EQ_COMP ].msi_x_vector = entries[0].vector; 912 mdev->eq_table.eq[MTHCA_EQ_ASYNC].msi_x_vector = entries[1].vector; 913 mdev->eq_table.eq[MTHCA_EQ_CMD ].msi_x_vector = entries[2].vector; 914 915 return 0; 916 } 917 918 /* Types of supported HCA */ 919 enum { 920 TAVOR, /* MT23108 */ 921 ARBEL_COMPAT, /* MT25208 in Tavor compat mode */ 922 ARBEL_NATIVE, /* MT25208 with extended features */ 923 SINAI /* MT25204 */ 924 }; 925 926 #define MTHCA_FW_VER(major, minor, subminor) \ 927 (((u64) (major) << 32) | ((u64) (minor) << 16) | (u64) (subminor)) 928 929 static struct { 930 u64 latest_fw; 931 int is_memfree; 932 int is_pcie; 933 } mthca_hca_table[] = { 934 [TAVOR] = { .latest_fw = MTHCA_FW_VER(3, 3, 3), .is_memfree = 0, .is_pcie = 0 }, 935 [ARBEL_COMPAT] = { .latest_fw = MTHCA_FW_VER(4, 7, 0), .is_memfree = 0, .is_pcie = 1 }, 936 [ARBEL_NATIVE] = { .latest_fw = MTHCA_FW_VER(5, 1, 0), .is_memfree = 1, .is_pcie = 1 }, 937 [SINAI] = { .latest_fw = MTHCA_FW_VER(1, 0, 1), .is_memfree = 1, .is_pcie = 1 } 938 }; 939 940 static int __devinit mthca_init_one(struct pci_dev *pdev, 941 const struct pci_device_id *id) 942 { 943 static int mthca_version_printed = 0; 944 int ddr_hidden = 0; 945 int err; 946 struct mthca_dev *mdev; 947 948 if (!mthca_version_printed) { 949 printk(KERN_INFO "%s", mthca_version); 950 ++mthca_version_printed; 951 } 952 953 printk(KERN_INFO PFX "Initializing %s\n", 954 pci_name(pdev)); 955 956 if (id->driver_data >= ARRAY_SIZE(mthca_hca_table)) { 957 printk(KERN_ERR PFX "%s has invalid driver data %lx\n", 958 pci_name(pdev), id->driver_data); 959 return -ENODEV; 960 } 961 962 err = pci_enable_device(pdev); 963 if (err) { 964 dev_err(&pdev->dev, "Cannot enable PCI device, " 965 "aborting.\n"); 966 return err; 967 } 968 969 /* 970 * Check for BARs. We expect 0: 1MB, 2: 8MB, 4: DDR (may not 971 * be present) 972 */ 973 if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM) || 974 pci_resource_len(pdev, 0) != 1 << 20) { 975 dev_err(&pdev->dev, "Missing DCS, aborting.\n"); 976 err = -ENODEV; 977 goto err_disable_pdev; 978 } 979 if (!(pci_resource_flags(pdev, 2) & IORESOURCE_MEM) || 980 pci_resource_len(pdev, 2) != 1 << 23) { 981 dev_err(&pdev->dev, "Missing UAR, aborting.\n"); 982 err = -ENODEV; 983 goto err_disable_pdev; 984 } 985 if (!(pci_resource_flags(pdev, 4) & IORESOURCE_MEM)) 986 ddr_hidden = 1; 987 988 err = mthca_request_regions(pdev, ddr_hidden); 989 if (err) { 990 dev_err(&pdev->dev, "Cannot obtain PCI resources, " 991 "aborting.\n"); 992 goto err_disable_pdev; 993 } 994 995 pci_set_master(pdev); 996 997 err = pci_set_dma_mask(pdev, DMA_64BIT_MASK); 998 if (err) { 999 dev_warn(&pdev->dev, "Warning: couldn't set 64-bit PCI DMA mask.\n"); 1000 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK); 1001 if (err) { 1002 dev_err(&pdev->dev, "Can't set PCI DMA mask, aborting.\n"); 1003 goto err_free_res; 1004 } 1005 } 1006 err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK); 1007 if (err) { 1008 dev_warn(&pdev->dev, "Warning: couldn't set 64-bit " 1009 "consistent PCI DMA mask.\n"); 1010 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK); 1011 if (err) { 1012 dev_err(&pdev->dev, "Can't set consistent PCI DMA mask, " 1013 "aborting.\n"); 1014 goto err_free_res; 1015 } 1016 } 1017 1018 mdev = (struct mthca_dev *) ib_alloc_device(sizeof *mdev); 1019 if (!mdev) { 1020 dev_err(&pdev->dev, "Device struct alloc failed, " 1021 "aborting.\n"); 1022 err = -ENOMEM; 1023 goto err_free_res; 1024 } 1025 1026 mdev->pdev = pdev; 1027 1028 if (ddr_hidden) 1029 mdev->mthca_flags |= MTHCA_FLAG_DDR_HIDDEN; 1030 if (mthca_hca_table[id->driver_data].is_memfree) 1031 mdev->mthca_flags |= MTHCA_FLAG_MEMFREE; 1032 if (mthca_hca_table[id->driver_data].is_pcie) 1033 mdev->mthca_flags |= MTHCA_FLAG_PCIE; 1034 1035 /* 1036 * Now reset the HCA before we touch the PCI capabilities or 1037 * attempt a firmware command, since a boot ROM may have left 1038 * the HCA in an undefined state. 1039 */ 1040 err = mthca_reset(mdev); 1041 if (err) { 1042 mthca_err(mdev, "Failed to reset HCA, aborting.\n"); 1043 goto err_free_dev; 1044 } 1045 1046 if (msi_x && !mthca_enable_msi_x(mdev)) 1047 mdev->mthca_flags |= MTHCA_FLAG_MSI_X; 1048 if (msi && !(mdev->mthca_flags & MTHCA_FLAG_MSI_X) && 1049 !pci_enable_msi(pdev)) 1050 mdev->mthca_flags |= MTHCA_FLAG_MSI; 1051 1052 if (mthca_cmd_init(mdev)) { 1053 mthca_err(mdev, "Failed to init command interface, aborting.\n"); 1054 goto err_free_dev; 1055 } 1056 1057 err = mthca_tune_pci(mdev); 1058 if (err) 1059 goto err_cmd; 1060 1061 err = mthca_init_hca(mdev); 1062 if (err) 1063 goto err_cmd; 1064 1065 if (mdev->fw_ver < mthca_hca_table[id->driver_data].latest_fw) { 1066 mthca_warn(mdev, "HCA FW version %d.%d.%d is old (%d.%d.%d is current).\n", 1067 (int) (mdev->fw_ver >> 32), (int) (mdev->fw_ver >> 16) & 0xffff, 1068 (int) (mdev->fw_ver & 0xffff), 1069 (int) (mthca_hca_table[id->driver_data].latest_fw >> 32), 1070 (int) (mthca_hca_table[id->driver_data].latest_fw >> 16) & 0xffff, 1071 (int) (mthca_hca_table[id->driver_data].latest_fw & 0xffff)); 1072 mthca_warn(mdev, "If you have problems, try updating your HCA FW.\n"); 1073 } 1074 1075 err = mthca_setup_hca(mdev); 1076 if (err) 1077 goto err_close; 1078 1079 err = mthca_register_device(mdev); 1080 if (err) 1081 goto err_cleanup; 1082 1083 err = mthca_create_agents(mdev); 1084 if (err) 1085 goto err_unregister; 1086 1087 pci_set_drvdata(pdev, mdev); 1088 1089 return 0; 1090 1091 err_unregister: 1092 mthca_unregister_device(mdev); 1093 1094 err_cleanup: 1095 mthca_cleanup_mcg_table(mdev); 1096 mthca_cleanup_av_table(mdev); 1097 mthca_cleanup_qp_table(mdev); 1098 mthca_cleanup_srq_table(mdev); 1099 mthca_cleanup_cq_table(mdev); 1100 mthca_cmd_use_polling(mdev); 1101 mthca_cleanup_eq_table(mdev); 1102 1103 mthca_pd_free(mdev, &mdev->driver_pd); 1104 1105 mthca_cleanup_mr_table(mdev); 1106 mthca_cleanup_pd_table(mdev); 1107 mthca_cleanup_uar_table(mdev); 1108 1109 err_close: 1110 mthca_close_hca(mdev); 1111 1112 err_cmd: 1113 mthca_cmd_cleanup(mdev); 1114 1115 err_free_dev: 1116 if (mdev->mthca_flags & MTHCA_FLAG_MSI_X) 1117 pci_disable_msix(pdev); 1118 if (mdev->mthca_flags & MTHCA_FLAG_MSI) 1119 pci_disable_msi(pdev); 1120 1121 ib_dealloc_device(&mdev->ib_dev); 1122 1123 err_free_res: 1124 mthca_release_regions(pdev, ddr_hidden); 1125 1126 err_disable_pdev: 1127 pci_disable_device(pdev); 1128 pci_set_drvdata(pdev, NULL); 1129 return err; 1130 } 1131 1132 static void __devexit mthca_remove_one(struct pci_dev *pdev) 1133 { 1134 struct mthca_dev *mdev = pci_get_drvdata(pdev); 1135 u8 status; 1136 int p; 1137 1138 if (mdev) { 1139 mthca_free_agents(mdev); 1140 mthca_unregister_device(mdev); 1141 1142 for (p = 1; p <= mdev->limits.num_ports; ++p) 1143 mthca_CLOSE_IB(mdev, p, &status); 1144 1145 mthca_cleanup_mcg_table(mdev); 1146 mthca_cleanup_av_table(mdev); 1147 mthca_cleanup_qp_table(mdev); 1148 mthca_cleanup_srq_table(mdev); 1149 mthca_cleanup_cq_table(mdev); 1150 mthca_cmd_use_polling(mdev); 1151 mthca_cleanup_eq_table(mdev); 1152 1153 mthca_pd_free(mdev, &mdev->driver_pd); 1154 1155 mthca_cleanup_mr_table(mdev); 1156 mthca_cleanup_pd_table(mdev); 1157 1158 iounmap(mdev->kar); 1159 mthca_uar_free(mdev, &mdev->driver_uar); 1160 mthca_cleanup_uar_table(mdev); 1161 mthca_close_hca(mdev); 1162 mthca_cmd_cleanup(mdev); 1163 1164 if (mdev->mthca_flags & MTHCA_FLAG_MSI_X) 1165 pci_disable_msix(pdev); 1166 if (mdev->mthca_flags & MTHCA_FLAG_MSI) 1167 pci_disable_msi(pdev); 1168 1169 ib_dealloc_device(&mdev->ib_dev); 1170 mthca_release_regions(pdev, mdev->mthca_flags & 1171 MTHCA_FLAG_DDR_HIDDEN); 1172 pci_disable_device(pdev); 1173 pci_set_drvdata(pdev, NULL); 1174 } 1175 } 1176 1177 static struct pci_device_id mthca_pci_table[] = { 1178 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_TAVOR), 1179 .driver_data = TAVOR }, 1180 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_TAVOR), 1181 .driver_data = TAVOR }, 1182 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT), 1183 .driver_data = ARBEL_COMPAT }, 1184 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT), 1185 .driver_data = ARBEL_COMPAT }, 1186 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_ARBEL), 1187 .driver_data = ARBEL_NATIVE }, 1188 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_ARBEL), 1189 .driver_data = ARBEL_NATIVE }, 1190 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_SINAI), 1191 .driver_data = SINAI }, 1192 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_SINAI), 1193 .driver_data = SINAI }, 1194 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_SINAI_OLD), 1195 .driver_data = SINAI }, 1196 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_SINAI_OLD), 1197 .driver_data = SINAI }, 1198 { 0, } 1199 }; 1200 1201 MODULE_DEVICE_TABLE(pci, mthca_pci_table); 1202 1203 static struct pci_driver mthca_driver = { 1204 .name = DRV_NAME, 1205 .id_table = mthca_pci_table, 1206 .probe = mthca_init_one, 1207 .remove = __devexit_p(mthca_remove_one) 1208 }; 1209 1210 static int __init mthca_init(void) 1211 { 1212 int ret; 1213 1214 ret = pci_register_driver(&mthca_driver); 1215 return ret < 0 ? ret : 0; 1216 } 1217 1218 static void __exit mthca_cleanup(void) 1219 { 1220 pci_unregister_driver(&mthca_driver); 1221 } 1222 1223 module_init(mthca_init); 1224 module_exit(mthca_cleanup); 1225