1e126ba97SEli Cohen /* 26cf0a15fSSaeed Mahameed * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved. 3e126ba97SEli Cohen * 4e126ba97SEli Cohen * This software is available to you under a choice of one of two 5e126ba97SEli Cohen * licenses. You may choose to be licensed under the terms of the GNU 6e126ba97SEli Cohen * General Public License (GPL) Version 2, available from the file 7e126ba97SEli Cohen * COPYING in the main directory of this source tree, or the 8e126ba97SEli Cohen * OpenIB.org BSD license below: 9e126ba97SEli Cohen * 10e126ba97SEli Cohen * Redistribution and use in source and binary forms, with or 11e126ba97SEli Cohen * without modification, are permitted provided that the following 12e126ba97SEli Cohen * conditions are met: 13e126ba97SEli Cohen * 14e126ba97SEli Cohen * - Redistributions of source code must retain the above 15e126ba97SEli Cohen * copyright notice, this list of conditions and the following 16e126ba97SEli Cohen * disclaimer. 17e126ba97SEli Cohen * 18e126ba97SEli Cohen * - Redistributions in binary form must reproduce the above 19e126ba97SEli Cohen * copyright notice, this list of conditions and the following 20e126ba97SEli Cohen * disclaimer in the documentation and/or other materials 21e126ba97SEli Cohen * provided with the distribution. 22e126ba97SEli Cohen * 23e126ba97SEli Cohen * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24e126ba97SEli Cohen * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25e126ba97SEli Cohen * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26e126ba97SEli Cohen * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27e126ba97SEli Cohen * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28e126ba97SEli Cohen * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29e126ba97SEli Cohen * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30e126ba97SEli Cohen * SOFTWARE. 31e126ba97SEli Cohen */ 32e126ba97SEli Cohen 33e126ba97SEli Cohen #include <linux/module.h> 34e126ba97SEli Cohen #include <rdma/ib_umem.h> 352811ba51SAchiad Shochat #include <rdma/ib_cache.h> 36cfb5e088SHaggai Abramovsky #include <rdma/ib_user_verbs.h> 37d14133ddSMark Zhang #include <rdma/rdma_counter.h> 38c2e53b2cSYishai Hadas #include <linux/mlx5/fs.h> 39e126ba97SEli Cohen #include "mlx5_ib.h" 40b96c9ddeSMark Bloch #include "ib_rep.h" 41443c1cf9SYishai Hadas #include "cmd.h" 42333fbaa0SLeon Romanovsky #include "qp.h" 43e126ba97SEli Cohen 44e126ba97SEli Cohen enum { 45e126ba97SEli Cohen MLX5_IB_ACK_REQ_FREQ = 8, 46e126ba97SEli Cohen }; 47e126ba97SEli Cohen 48e126ba97SEli Cohen enum { 49e126ba97SEli Cohen MLX5_IB_DEFAULT_SCHED_QUEUE = 0x83, 50e126ba97SEli Cohen MLX5_IB_DEFAULT_QP0_SCHED_QUEUE = 0x3f, 51e126ba97SEli Cohen MLX5_IB_LINK_TYPE_IB = 0, 52e126ba97SEli Cohen MLX5_IB_LINK_TYPE_ETH = 1 53e126ba97SEli Cohen }; 54e126ba97SEli Cohen 55e126ba97SEli Cohen enum { 56e126ba97SEli Cohen MLX5_IB_SQ_STRIDE = 6, 57064e5262SIdan Burstein MLX5_IB_SQ_UMR_INLINE_THRESHOLD = 64, 58e126ba97SEli Cohen }; 59e126ba97SEli Cohen 60e126ba97SEli Cohen static const u32 mlx5_ib_opcode[] = { 61e126ba97SEli Cohen [IB_WR_SEND] = MLX5_OPCODE_SEND, 62f0313965SErez Shitrit [IB_WR_LSO] = MLX5_OPCODE_LSO, 63e126ba97SEli Cohen [IB_WR_SEND_WITH_IMM] = MLX5_OPCODE_SEND_IMM, 64e126ba97SEli Cohen [IB_WR_RDMA_WRITE] = MLX5_OPCODE_RDMA_WRITE, 65e126ba97SEli Cohen [IB_WR_RDMA_WRITE_WITH_IMM] = MLX5_OPCODE_RDMA_WRITE_IMM, 66e126ba97SEli Cohen [IB_WR_RDMA_READ] = MLX5_OPCODE_RDMA_READ, 67e126ba97SEli Cohen [IB_WR_ATOMIC_CMP_AND_SWP] = MLX5_OPCODE_ATOMIC_CS, 68e126ba97SEli Cohen [IB_WR_ATOMIC_FETCH_AND_ADD] = MLX5_OPCODE_ATOMIC_FA, 69e126ba97SEli Cohen [IB_WR_SEND_WITH_INV] = MLX5_OPCODE_SEND_INVAL, 70e126ba97SEli Cohen [IB_WR_LOCAL_INV] = MLX5_OPCODE_UMR, 718a187ee5SSagi Grimberg [IB_WR_REG_MR] = MLX5_OPCODE_UMR, 72e126ba97SEli Cohen [IB_WR_MASKED_ATOMIC_CMP_AND_SWP] = MLX5_OPCODE_ATOMIC_MASKED_CS, 73e126ba97SEli Cohen [IB_WR_MASKED_ATOMIC_FETCH_AND_ADD] = MLX5_OPCODE_ATOMIC_MASKED_FA, 74e126ba97SEli Cohen [MLX5_IB_WR_UMR] = MLX5_OPCODE_UMR, 75e126ba97SEli Cohen }; 76e126ba97SEli Cohen 77f0313965SErez Shitrit struct mlx5_wqe_eth_pad { 78f0313965SErez Shitrit u8 rsvd0[16]; 79f0313965SErez Shitrit }; 80e126ba97SEli Cohen 81eb49ab0cSAlex Vesker enum raw_qp_set_mask_map { 82eb49ab0cSAlex Vesker MLX5_RAW_QP_MOD_SET_RQ_Q_CTR_ID = 1UL << 0, 837d29f349SBodong Wang MLX5_RAW_QP_RATE_LIMIT = 1UL << 1, 84eb49ab0cSAlex Vesker }; 85eb49ab0cSAlex Vesker 860680efa2SAlex Vesker struct mlx5_modify_raw_qp_param { 870680efa2SAlex Vesker u16 operation; 88eb49ab0cSAlex Vesker 89eb49ab0cSAlex Vesker u32 set_mask; /* raw_qp_set_mask_map */ 9061147f39SBodong Wang 9161147f39SBodong Wang struct mlx5_rate_limit rl; 9261147f39SBodong Wang 93eb49ab0cSAlex Vesker u8 rq_q_ctr_id; 94d5ed8ac3SMark Bloch u16 port; 950680efa2SAlex Vesker }; 960680efa2SAlex Vesker 9789ea94a7SMaor Gottlieb static void get_cqs(enum ib_qp_type qp_type, 9889ea94a7SMaor Gottlieb struct ib_cq *ib_send_cq, struct ib_cq *ib_recv_cq, 9989ea94a7SMaor Gottlieb struct mlx5_ib_cq **send_cq, struct mlx5_ib_cq **recv_cq); 10089ea94a7SMaor Gottlieb 101e126ba97SEli Cohen static int is_qp0(enum ib_qp_type qp_type) 102e126ba97SEli Cohen { 103e126ba97SEli Cohen return qp_type == IB_QPT_SMI; 104e126ba97SEli Cohen } 105e126ba97SEli Cohen 106e126ba97SEli Cohen static int is_sqp(enum ib_qp_type qp_type) 107e126ba97SEli Cohen { 108e126ba97SEli Cohen return is_qp0(qp_type) || is_qp1(qp_type); 109e126ba97SEli Cohen } 110e126ba97SEli Cohen 111c1395a2aSHaggai Eran /** 112fbeb4075SMoni Shoua * mlx5_ib_read_user_wqe_common() - Copy a WQE (or part of) from user WQ 113fbeb4075SMoni Shoua * to kernel buffer 114c1395a2aSHaggai Eran * 115fbeb4075SMoni Shoua * @umem: User space memory where the WQ is 116fbeb4075SMoni Shoua * @buffer: buffer to copy to 117fbeb4075SMoni Shoua * @buflen: buffer length 118fbeb4075SMoni Shoua * @wqe_index: index of WQE to copy from 119fbeb4075SMoni Shoua * @wq_offset: offset to start of WQ 120fbeb4075SMoni Shoua * @wq_wqe_cnt: number of WQEs in WQ 121fbeb4075SMoni Shoua * @wq_wqe_shift: log2 of WQE size 122fbeb4075SMoni Shoua * @bcnt: number of bytes to copy 123fbeb4075SMoni Shoua * @bytes_copied: number of bytes to copy (return value) 124c1395a2aSHaggai Eran * 125fbeb4075SMoni Shoua * Copies from start of WQE bcnt or less bytes. 126fbeb4075SMoni Shoua * Does not gurantee to copy the entire WQE. 127c1395a2aSHaggai Eran * 128fbeb4075SMoni Shoua * Return: zero on success, or an error code. 129c1395a2aSHaggai Eran */ 130da9ee9d8SMoni Shoua static int mlx5_ib_read_user_wqe_common(struct ib_umem *umem, void *buffer, 131da9ee9d8SMoni Shoua size_t buflen, int wqe_index, 132da9ee9d8SMoni Shoua int wq_offset, int wq_wqe_cnt, 133da9ee9d8SMoni Shoua int wq_wqe_shift, int bcnt, 134fbeb4075SMoni Shoua size_t *bytes_copied) 135c1395a2aSHaggai Eran { 136fbeb4075SMoni Shoua size_t offset = wq_offset + ((wqe_index % wq_wqe_cnt) << wq_wqe_shift); 137fbeb4075SMoni Shoua size_t wq_end = wq_offset + (wq_wqe_cnt << wq_wqe_shift); 138fbeb4075SMoni Shoua size_t copy_length; 139c1395a2aSHaggai Eran int ret; 140c1395a2aSHaggai Eran 141fbeb4075SMoni Shoua /* don't copy more than requested, more than buffer length or 142fbeb4075SMoni Shoua * beyond WQ end 143fbeb4075SMoni Shoua */ 144fbeb4075SMoni Shoua copy_length = min_t(u32, buflen, wq_end - offset); 145fbeb4075SMoni Shoua copy_length = min_t(u32, copy_length, bcnt); 146c1395a2aSHaggai Eran 147fbeb4075SMoni Shoua ret = ib_umem_copy_from(buffer, umem, offset, copy_length); 148c1395a2aSHaggai Eran if (ret) 149c1395a2aSHaggai Eran return ret; 150c1395a2aSHaggai Eran 151fbeb4075SMoni Shoua if (!ret && bytes_copied) 152fbeb4075SMoni Shoua *bytes_copied = copy_length; 153c1395a2aSHaggai Eran 154fbeb4075SMoni Shoua return 0; 155fbeb4075SMoni Shoua } 156fbeb4075SMoni Shoua 157da9ee9d8SMoni Shoua static int mlx5_ib_read_kernel_wqe_sq(struct mlx5_ib_qp *qp, int wqe_index, 158da9ee9d8SMoni Shoua void *buffer, size_t buflen, size_t *bc) 159da9ee9d8SMoni Shoua { 160da9ee9d8SMoni Shoua struct mlx5_wqe_ctrl_seg *ctrl; 161da9ee9d8SMoni Shoua size_t bytes_copied = 0; 162da9ee9d8SMoni Shoua size_t wqe_length; 163da9ee9d8SMoni Shoua void *p; 164da9ee9d8SMoni Shoua int ds; 165da9ee9d8SMoni Shoua 166da9ee9d8SMoni Shoua wqe_index = wqe_index & qp->sq.fbc.sz_m1; 167da9ee9d8SMoni Shoua 168da9ee9d8SMoni Shoua /* read the control segment first */ 169da9ee9d8SMoni Shoua p = mlx5_frag_buf_get_wqe(&qp->sq.fbc, wqe_index); 170da9ee9d8SMoni Shoua ctrl = p; 171da9ee9d8SMoni Shoua ds = be32_to_cpu(ctrl->qpn_ds) & MLX5_WQE_CTRL_DS_MASK; 172da9ee9d8SMoni Shoua wqe_length = ds * MLX5_WQE_DS_UNITS; 173da9ee9d8SMoni Shoua 174da9ee9d8SMoni Shoua /* read rest of WQE if it spreads over more than one stride */ 175da9ee9d8SMoni Shoua while (bytes_copied < wqe_length) { 176da9ee9d8SMoni Shoua size_t copy_length = 177da9ee9d8SMoni Shoua min_t(size_t, buflen - bytes_copied, MLX5_SEND_WQE_BB); 178da9ee9d8SMoni Shoua 179da9ee9d8SMoni Shoua if (!copy_length) 180da9ee9d8SMoni Shoua break; 181da9ee9d8SMoni Shoua 182da9ee9d8SMoni Shoua memcpy(buffer + bytes_copied, p, copy_length); 183da9ee9d8SMoni Shoua bytes_copied += copy_length; 184da9ee9d8SMoni Shoua 185da9ee9d8SMoni Shoua wqe_index = (wqe_index + 1) & qp->sq.fbc.sz_m1; 186da9ee9d8SMoni Shoua p = mlx5_frag_buf_get_wqe(&qp->sq.fbc, wqe_index); 187da9ee9d8SMoni Shoua } 188da9ee9d8SMoni Shoua *bc = bytes_copied; 189da9ee9d8SMoni Shoua return 0; 190da9ee9d8SMoni Shoua } 191da9ee9d8SMoni Shoua 192da9ee9d8SMoni Shoua static int mlx5_ib_read_user_wqe_sq(struct mlx5_ib_qp *qp, int wqe_index, 193da9ee9d8SMoni Shoua void *buffer, size_t buflen, size_t *bc) 194fbeb4075SMoni Shoua { 195fbeb4075SMoni Shoua struct mlx5_ib_qp_base *base = &qp->trans_qp.base; 196fbeb4075SMoni Shoua struct ib_umem *umem = base->ubuffer.umem; 197fbeb4075SMoni Shoua struct mlx5_ib_wq *wq = &qp->sq; 198fbeb4075SMoni Shoua struct mlx5_wqe_ctrl_seg *ctrl; 199fbeb4075SMoni Shoua size_t bytes_copied; 200fbeb4075SMoni Shoua size_t bytes_copied2; 201fbeb4075SMoni Shoua size_t wqe_length; 202fbeb4075SMoni Shoua int ret; 203fbeb4075SMoni Shoua int ds; 204fbeb4075SMoni Shoua 205fbeb4075SMoni Shoua /* at first read as much as possible */ 206da9ee9d8SMoni Shoua ret = mlx5_ib_read_user_wqe_common(umem, buffer, buflen, wqe_index, 207da9ee9d8SMoni Shoua wq->offset, wq->wqe_cnt, 208da9ee9d8SMoni Shoua wq->wqe_shift, buflen, 209fbeb4075SMoni Shoua &bytes_copied); 210fbeb4075SMoni Shoua if (ret) 211fbeb4075SMoni Shoua return ret; 212fbeb4075SMoni Shoua 213fbeb4075SMoni Shoua /* we need at least control segment size to proceed */ 214fbeb4075SMoni Shoua if (bytes_copied < sizeof(*ctrl)) 215fbeb4075SMoni Shoua return -EINVAL; 216fbeb4075SMoni Shoua 217fbeb4075SMoni Shoua ctrl = buffer; 218fbeb4075SMoni Shoua ds = be32_to_cpu(ctrl->qpn_ds) & MLX5_WQE_CTRL_DS_MASK; 219c1395a2aSHaggai Eran wqe_length = ds * MLX5_WQE_DS_UNITS; 220fbeb4075SMoni Shoua 221fbeb4075SMoni Shoua /* if we copied enough then we are done */ 222fbeb4075SMoni Shoua if (bytes_copied >= wqe_length) { 223fbeb4075SMoni Shoua *bc = bytes_copied; 224fbeb4075SMoni Shoua return 0; 225c1395a2aSHaggai Eran } 226c1395a2aSHaggai Eran 227fbeb4075SMoni Shoua /* otherwise this a wrapped around wqe 228fbeb4075SMoni Shoua * so read the remaining bytes starting 229fbeb4075SMoni Shoua * from wqe_index 0 230fbeb4075SMoni Shoua */ 231da9ee9d8SMoni Shoua ret = mlx5_ib_read_user_wqe_common(umem, buffer + bytes_copied, 232da9ee9d8SMoni Shoua buflen - bytes_copied, 0, wq->offset, 233da9ee9d8SMoni Shoua wq->wqe_cnt, wq->wqe_shift, 234fbeb4075SMoni Shoua wqe_length - bytes_copied, 235fbeb4075SMoni Shoua &bytes_copied2); 236c1395a2aSHaggai Eran 237c1395a2aSHaggai Eran if (ret) 238c1395a2aSHaggai Eran return ret; 239fbeb4075SMoni Shoua *bc = bytes_copied + bytes_copied2; 240fbeb4075SMoni Shoua return 0; 241fbeb4075SMoni Shoua } 242c1395a2aSHaggai Eran 243da9ee9d8SMoni Shoua int mlx5_ib_read_wqe_sq(struct mlx5_ib_qp *qp, int wqe_index, void *buffer, 244da9ee9d8SMoni Shoua size_t buflen, size_t *bc) 245da9ee9d8SMoni Shoua { 246da9ee9d8SMoni Shoua struct mlx5_ib_qp_base *base = &qp->trans_qp.base; 247da9ee9d8SMoni Shoua struct ib_umem *umem = base->ubuffer.umem; 248da9ee9d8SMoni Shoua 249da9ee9d8SMoni Shoua if (buflen < sizeof(struct mlx5_wqe_ctrl_seg)) 250da9ee9d8SMoni Shoua return -EINVAL; 251da9ee9d8SMoni Shoua 252da9ee9d8SMoni Shoua if (!umem) 253da9ee9d8SMoni Shoua return mlx5_ib_read_kernel_wqe_sq(qp, wqe_index, buffer, 254da9ee9d8SMoni Shoua buflen, bc); 255da9ee9d8SMoni Shoua 256da9ee9d8SMoni Shoua return mlx5_ib_read_user_wqe_sq(qp, wqe_index, buffer, buflen, bc); 257da9ee9d8SMoni Shoua } 258da9ee9d8SMoni Shoua 259da9ee9d8SMoni Shoua static int mlx5_ib_read_user_wqe_rq(struct mlx5_ib_qp *qp, int wqe_index, 260da9ee9d8SMoni Shoua void *buffer, size_t buflen, size_t *bc) 261fbeb4075SMoni Shoua { 262fbeb4075SMoni Shoua struct mlx5_ib_qp_base *base = &qp->trans_qp.base; 263fbeb4075SMoni Shoua struct ib_umem *umem = base->ubuffer.umem; 264fbeb4075SMoni Shoua struct mlx5_ib_wq *wq = &qp->rq; 265fbeb4075SMoni Shoua size_t bytes_copied; 266fbeb4075SMoni Shoua int ret; 267fbeb4075SMoni Shoua 268da9ee9d8SMoni Shoua ret = mlx5_ib_read_user_wqe_common(umem, buffer, buflen, wqe_index, 269da9ee9d8SMoni Shoua wq->offset, wq->wqe_cnt, 270da9ee9d8SMoni Shoua wq->wqe_shift, buflen, 271fbeb4075SMoni Shoua &bytes_copied); 272fbeb4075SMoni Shoua 273fbeb4075SMoni Shoua if (ret) 274fbeb4075SMoni Shoua return ret; 275fbeb4075SMoni Shoua *bc = bytes_copied; 276fbeb4075SMoni Shoua return 0; 277fbeb4075SMoni Shoua } 278fbeb4075SMoni Shoua 279da9ee9d8SMoni Shoua int mlx5_ib_read_wqe_rq(struct mlx5_ib_qp *qp, int wqe_index, void *buffer, 280da9ee9d8SMoni Shoua size_t buflen, size_t *bc) 281da9ee9d8SMoni Shoua { 282da9ee9d8SMoni Shoua struct mlx5_ib_qp_base *base = &qp->trans_qp.base; 283da9ee9d8SMoni Shoua struct ib_umem *umem = base->ubuffer.umem; 284da9ee9d8SMoni Shoua struct mlx5_ib_wq *wq = &qp->rq; 285da9ee9d8SMoni Shoua size_t wqe_size = 1 << wq->wqe_shift; 286da9ee9d8SMoni Shoua 287da9ee9d8SMoni Shoua if (buflen < wqe_size) 288da9ee9d8SMoni Shoua return -EINVAL; 289da9ee9d8SMoni Shoua 290da9ee9d8SMoni Shoua if (!umem) 291da9ee9d8SMoni Shoua return -EOPNOTSUPP; 292da9ee9d8SMoni Shoua 293da9ee9d8SMoni Shoua return mlx5_ib_read_user_wqe_rq(qp, wqe_index, buffer, buflen, bc); 294da9ee9d8SMoni Shoua } 295da9ee9d8SMoni Shoua 296da9ee9d8SMoni Shoua static int mlx5_ib_read_user_wqe_srq(struct mlx5_ib_srq *srq, int wqe_index, 297da9ee9d8SMoni Shoua void *buffer, size_t buflen, size_t *bc) 298fbeb4075SMoni Shoua { 299fbeb4075SMoni Shoua struct ib_umem *umem = srq->umem; 300fbeb4075SMoni Shoua size_t bytes_copied; 301fbeb4075SMoni Shoua int ret; 302fbeb4075SMoni Shoua 303da9ee9d8SMoni Shoua ret = mlx5_ib_read_user_wqe_common(umem, buffer, buflen, wqe_index, 0, 304da9ee9d8SMoni Shoua srq->msrq.max, srq->msrq.wqe_shift, 305da9ee9d8SMoni Shoua buflen, &bytes_copied); 306fbeb4075SMoni Shoua 307fbeb4075SMoni Shoua if (ret) 308fbeb4075SMoni Shoua return ret; 309fbeb4075SMoni Shoua *bc = bytes_copied; 310fbeb4075SMoni Shoua return 0; 311c1395a2aSHaggai Eran } 312c1395a2aSHaggai Eran 313da9ee9d8SMoni Shoua int mlx5_ib_read_wqe_srq(struct mlx5_ib_srq *srq, int wqe_index, void *buffer, 314da9ee9d8SMoni Shoua size_t buflen, size_t *bc) 315da9ee9d8SMoni Shoua { 316da9ee9d8SMoni Shoua struct ib_umem *umem = srq->umem; 317da9ee9d8SMoni Shoua size_t wqe_size = 1 << srq->msrq.wqe_shift; 318da9ee9d8SMoni Shoua 319da9ee9d8SMoni Shoua if (buflen < wqe_size) 320da9ee9d8SMoni Shoua return -EINVAL; 321da9ee9d8SMoni Shoua 322da9ee9d8SMoni Shoua if (!umem) 323da9ee9d8SMoni Shoua return -EOPNOTSUPP; 324da9ee9d8SMoni Shoua 325da9ee9d8SMoni Shoua return mlx5_ib_read_user_wqe_srq(srq, wqe_index, buffer, buflen, bc); 326da9ee9d8SMoni Shoua } 327da9ee9d8SMoni Shoua 328e126ba97SEli Cohen static void mlx5_ib_qp_event(struct mlx5_core_qp *qp, int type) 329e126ba97SEli Cohen { 330e126ba97SEli Cohen struct ib_qp *ibqp = &to_mibqp(qp)->ibqp; 331e126ba97SEli Cohen struct ib_event event; 332e126ba97SEli Cohen 33319098df2Smajd@mellanox.com if (type == MLX5_EVENT_TYPE_PATH_MIG) { 33419098df2Smajd@mellanox.com /* This event is only valid for trans_qps */ 33519098df2Smajd@mellanox.com to_mibqp(qp)->port = to_mibqp(qp)->trans_qp.alt_port; 33619098df2Smajd@mellanox.com } 337e126ba97SEli Cohen 338e126ba97SEli Cohen if (ibqp->event_handler) { 339e126ba97SEli Cohen event.device = ibqp->device; 340e126ba97SEli Cohen event.element.qp = ibqp; 341e126ba97SEli Cohen switch (type) { 342e126ba97SEli Cohen case MLX5_EVENT_TYPE_PATH_MIG: 343e126ba97SEli Cohen event.event = IB_EVENT_PATH_MIG; 344e126ba97SEli Cohen break; 345e126ba97SEli Cohen case MLX5_EVENT_TYPE_COMM_EST: 346e126ba97SEli Cohen event.event = IB_EVENT_COMM_EST; 347e126ba97SEli Cohen break; 348e126ba97SEli Cohen case MLX5_EVENT_TYPE_SQ_DRAINED: 349e126ba97SEli Cohen event.event = IB_EVENT_SQ_DRAINED; 350e126ba97SEli Cohen break; 351e126ba97SEli Cohen case MLX5_EVENT_TYPE_SRQ_LAST_WQE: 352e126ba97SEli Cohen event.event = IB_EVENT_QP_LAST_WQE_REACHED; 353e126ba97SEli Cohen break; 354e126ba97SEli Cohen case MLX5_EVENT_TYPE_WQ_CATAS_ERROR: 355e126ba97SEli Cohen event.event = IB_EVENT_QP_FATAL; 356e126ba97SEli Cohen break; 357e126ba97SEli Cohen case MLX5_EVENT_TYPE_PATH_MIG_FAILED: 358e126ba97SEli Cohen event.event = IB_EVENT_PATH_MIG_ERR; 359e126ba97SEli Cohen break; 360e126ba97SEli Cohen case MLX5_EVENT_TYPE_WQ_INVAL_REQ_ERROR: 361e126ba97SEli Cohen event.event = IB_EVENT_QP_REQ_ERR; 362e126ba97SEli Cohen break; 363e126ba97SEli Cohen case MLX5_EVENT_TYPE_WQ_ACCESS_ERROR: 364e126ba97SEli Cohen event.event = IB_EVENT_QP_ACCESS_ERR; 365e126ba97SEli Cohen break; 366e126ba97SEli Cohen default: 367e126ba97SEli Cohen pr_warn("mlx5_ib: Unexpected event type %d on QP %06x\n", type, qp->qpn); 368e126ba97SEli Cohen return; 369e126ba97SEli Cohen } 370e126ba97SEli Cohen 371e126ba97SEli Cohen ibqp->event_handler(&event, ibqp->qp_context); 372e126ba97SEli Cohen } 373e126ba97SEli Cohen } 374e126ba97SEli Cohen 375e126ba97SEli Cohen static int set_rq_size(struct mlx5_ib_dev *dev, struct ib_qp_cap *cap, 376e126ba97SEli Cohen int has_rq, struct mlx5_ib_qp *qp, struct mlx5_ib_create_qp *ucmd) 377e126ba97SEli Cohen { 378e126ba97SEli Cohen int wqe_size; 379e126ba97SEli Cohen int wq_size; 380e126ba97SEli Cohen 381e126ba97SEli Cohen /* Sanity check RQ size before proceeding */ 382938fe83cSSaeed Mahameed if (cap->max_recv_wr > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz))) 383e126ba97SEli Cohen return -EINVAL; 384e126ba97SEli Cohen 385e126ba97SEli Cohen if (!has_rq) { 386e126ba97SEli Cohen qp->rq.max_gs = 0; 387e126ba97SEli Cohen qp->rq.wqe_cnt = 0; 388e126ba97SEli Cohen qp->rq.wqe_shift = 0; 3890540d814SNoa Osherovich cap->max_recv_wr = 0; 3900540d814SNoa Osherovich cap->max_recv_sge = 0; 391e126ba97SEli Cohen } else { 392c95e6d53SLeon Romanovsky int wq_sig = !!(qp->flags_en & MLX5_QP_FLAG_SIGNATURE); 393c95e6d53SLeon Romanovsky 394e126ba97SEli Cohen if (ucmd) { 395e126ba97SEli Cohen qp->rq.wqe_cnt = ucmd->rq_wqe_count; 396002bf228SLeon Romanovsky if (ucmd->rq_wqe_shift > BITS_PER_BYTE * sizeof(ucmd->rq_wqe_shift)) 397002bf228SLeon Romanovsky return -EINVAL; 398e126ba97SEli Cohen qp->rq.wqe_shift = ucmd->rq_wqe_shift; 399c95e6d53SLeon Romanovsky if ((1 << qp->rq.wqe_shift) / 400c95e6d53SLeon Romanovsky sizeof(struct mlx5_wqe_data_seg) < 401c95e6d53SLeon Romanovsky wq_sig) 402002bf228SLeon Romanovsky return -EINVAL; 403c95e6d53SLeon Romanovsky qp->rq.max_gs = 404c95e6d53SLeon Romanovsky (1 << qp->rq.wqe_shift) / 405c95e6d53SLeon Romanovsky sizeof(struct mlx5_wqe_data_seg) - 406c95e6d53SLeon Romanovsky wq_sig; 407e126ba97SEli Cohen qp->rq.max_post = qp->rq.wqe_cnt; 408e126ba97SEli Cohen } else { 409c95e6d53SLeon Romanovsky wqe_size = 410c95e6d53SLeon Romanovsky wq_sig ? sizeof(struct mlx5_wqe_signature_seg) : 411c95e6d53SLeon Romanovsky 0; 412e126ba97SEli Cohen wqe_size += cap->max_recv_sge * sizeof(struct mlx5_wqe_data_seg); 413e126ba97SEli Cohen wqe_size = roundup_pow_of_two(wqe_size); 414e126ba97SEli Cohen wq_size = roundup_pow_of_two(cap->max_recv_wr) * wqe_size; 415e126ba97SEli Cohen wq_size = max_t(int, wq_size, MLX5_SEND_WQE_BB); 416e126ba97SEli Cohen qp->rq.wqe_cnt = wq_size / wqe_size; 417938fe83cSSaeed Mahameed if (wqe_size > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_rq)) { 418e126ba97SEli Cohen mlx5_ib_dbg(dev, "wqe_size %d, max %d\n", 419e126ba97SEli Cohen wqe_size, 420938fe83cSSaeed Mahameed MLX5_CAP_GEN(dev->mdev, 421938fe83cSSaeed Mahameed max_wqe_sz_rq)); 422e126ba97SEli Cohen return -EINVAL; 423e126ba97SEli Cohen } 424e126ba97SEli Cohen qp->rq.wqe_shift = ilog2(wqe_size); 425c95e6d53SLeon Romanovsky qp->rq.max_gs = 426c95e6d53SLeon Romanovsky (1 << qp->rq.wqe_shift) / 427c95e6d53SLeon Romanovsky sizeof(struct mlx5_wqe_data_seg) - 428c95e6d53SLeon Romanovsky wq_sig; 429e126ba97SEli Cohen qp->rq.max_post = qp->rq.wqe_cnt; 430e126ba97SEli Cohen } 431e126ba97SEli Cohen } 432e126ba97SEli Cohen 433e126ba97SEli Cohen return 0; 434e126ba97SEli Cohen } 435e126ba97SEli Cohen 436f0313965SErez Shitrit static int sq_overhead(struct ib_qp_init_attr *attr) 437e126ba97SEli Cohen { 438618af384SAndi Shyti int size = 0; 439e126ba97SEli Cohen 440f0313965SErez Shitrit switch (attr->qp_type) { 441e126ba97SEli Cohen case IB_QPT_XRC_INI: 442b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_xrc_seg); 443e126ba97SEli Cohen /* fall through */ 444e126ba97SEli Cohen case IB_QPT_RC: 445e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 44675c1657eSLeon Romanovsky max(sizeof(struct mlx5_wqe_atomic_seg) + 44775c1657eSLeon Romanovsky sizeof(struct mlx5_wqe_raddr_seg), 44875c1657eSLeon Romanovsky sizeof(struct mlx5_wqe_umr_ctrl_seg) + 449064e5262SIdan Burstein sizeof(struct mlx5_mkey_seg) + 450064e5262SIdan Burstein MLX5_IB_SQ_UMR_INLINE_THRESHOLD / 451064e5262SIdan Burstein MLX5_IB_UMR_OCTOWORD); 452e126ba97SEli Cohen break; 453e126ba97SEli Cohen 454b125a54bSEli Cohen case IB_QPT_XRC_TGT: 455b125a54bSEli Cohen return 0; 456b125a54bSEli Cohen 457e126ba97SEli Cohen case IB_QPT_UC: 458b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 45975c1657eSLeon Romanovsky max(sizeof(struct mlx5_wqe_raddr_seg), 4609e65dc37SEli Cohen sizeof(struct mlx5_wqe_umr_ctrl_seg) + 46175c1657eSLeon Romanovsky sizeof(struct mlx5_mkey_seg)); 462e126ba97SEli Cohen break; 463e126ba97SEli Cohen 464e126ba97SEli Cohen case IB_QPT_UD: 465f0313965SErez Shitrit if (attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO) 466f0313965SErez Shitrit size += sizeof(struct mlx5_wqe_eth_pad) + 467f0313965SErez Shitrit sizeof(struct mlx5_wqe_eth_seg); 468f0313965SErez Shitrit /* fall through */ 469e126ba97SEli Cohen case IB_QPT_SMI: 470d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: 471b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 472e126ba97SEli Cohen sizeof(struct mlx5_wqe_datagram_seg); 473e126ba97SEli Cohen break; 474e126ba97SEli Cohen 475e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 476b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 477e126ba97SEli Cohen sizeof(struct mlx5_wqe_umr_ctrl_seg) + 478e126ba97SEli Cohen sizeof(struct mlx5_mkey_seg); 479e126ba97SEli Cohen break; 480e126ba97SEli Cohen 481e126ba97SEli Cohen default: 482e126ba97SEli Cohen return -EINVAL; 483e126ba97SEli Cohen } 484e126ba97SEli Cohen 485e126ba97SEli Cohen return size; 486e126ba97SEli Cohen } 487e126ba97SEli Cohen 488e126ba97SEli Cohen static int calc_send_wqe(struct ib_qp_init_attr *attr) 489e126ba97SEli Cohen { 490e126ba97SEli Cohen int inl_size = 0; 491e126ba97SEli Cohen int size; 492e126ba97SEli Cohen 493f0313965SErez Shitrit size = sq_overhead(attr); 494e126ba97SEli Cohen if (size < 0) 495e126ba97SEli Cohen return size; 496e126ba97SEli Cohen 497e126ba97SEli Cohen if (attr->cap.max_inline_data) { 498e126ba97SEli Cohen inl_size = size + sizeof(struct mlx5_wqe_inline_seg) + 499e126ba97SEli Cohen attr->cap.max_inline_data; 500e126ba97SEli Cohen } 501e126ba97SEli Cohen 502e126ba97SEli Cohen size += attr->cap.max_send_sge * sizeof(struct mlx5_wqe_data_seg); 503c0a6cbb9SIsrael Rukshin if (attr->create_flags & IB_QP_CREATE_INTEGRITY_EN && 504e1e66cc2SSagi Grimberg ALIGN(max_t(int, inl_size, size), MLX5_SEND_WQE_BB) < MLX5_SIG_WQE_SIZE) 505e1e66cc2SSagi Grimberg return MLX5_SIG_WQE_SIZE; 506e1e66cc2SSagi Grimberg else 507e126ba97SEli Cohen return ALIGN(max_t(int, inl_size, size), MLX5_SEND_WQE_BB); 508e126ba97SEli Cohen } 509e126ba97SEli Cohen 510288c01b7SEli Cohen static int get_send_sge(struct ib_qp_init_attr *attr, int wqe_size) 511288c01b7SEli Cohen { 512288c01b7SEli Cohen int max_sge; 513288c01b7SEli Cohen 514288c01b7SEli Cohen if (attr->qp_type == IB_QPT_RC) 515288c01b7SEli Cohen max_sge = (min_t(int, wqe_size, 512) - 516288c01b7SEli Cohen sizeof(struct mlx5_wqe_ctrl_seg) - 517288c01b7SEli Cohen sizeof(struct mlx5_wqe_raddr_seg)) / 518288c01b7SEli Cohen sizeof(struct mlx5_wqe_data_seg); 519288c01b7SEli Cohen else if (attr->qp_type == IB_QPT_XRC_INI) 520288c01b7SEli Cohen max_sge = (min_t(int, wqe_size, 512) - 521288c01b7SEli Cohen sizeof(struct mlx5_wqe_ctrl_seg) - 522288c01b7SEli Cohen sizeof(struct mlx5_wqe_xrc_seg) - 523288c01b7SEli Cohen sizeof(struct mlx5_wqe_raddr_seg)) / 524288c01b7SEli Cohen sizeof(struct mlx5_wqe_data_seg); 525288c01b7SEli Cohen else 526288c01b7SEli Cohen max_sge = (wqe_size - sq_overhead(attr)) / 527288c01b7SEli Cohen sizeof(struct mlx5_wqe_data_seg); 528288c01b7SEli Cohen 529288c01b7SEli Cohen return min_t(int, max_sge, wqe_size - sq_overhead(attr) / 530288c01b7SEli Cohen sizeof(struct mlx5_wqe_data_seg)); 531288c01b7SEli Cohen } 532288c01b7SEli Cohen 533e126ba97SEli Cohen static int calc_sq_size(struct mlx5_ib_dev *dev, struct ib_qp_init_attr *attr, 534e126ba97SEli Cohen struct mlx5_ib_qp *qp) 535e126ba97SEli Cohen { 536e126ba97SEli Cohen int wqe_size; 537e126ba97SEli Cohen int wq_size; 538e126ba97SEli Cohen 539e126ba97SEli Cohen if (!attr->cap.max_send_wr) 540e126ba97SEli Cohen return 0; 541e126ba97SEli Cohen 542e126ba97SEli Cohen wqe_size = calc_send_wqe(attr); 543e126ba97SEli Cohen mlx5_ib_dbg(dev, "wqe_size %d\n", wqe_size); 544e126ba97SEli Cohen if (wqe_size < 0) 545e126ba97SEli Cohen return wqe_size; 546e126ba97SEli Cohen 547938fe83cSSaeed Mahameed if (wqe_size > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)) { 548b125a54bSEli Cohen mlx5_ib_dbg(dev, "wqe_size(%d) > max_sq_desc_sz(%d)\n", 549938fe83cSSaeed Mahameed wqe_size, MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)); 550e126ba97SEli Cohen return -EINVAL; 551e126ba97SEli Cohen } 552e126ba97SEli Cohen 553f0313965SErez Shitrit qp->max_inline_data = wqe_size - sq_overhead(attr) - 554e126ba97SEli Cohen sizeof(struct mlx5_wqe_inline_seg); 555e126ba97SEli Cohen attr->cap.max_inline_data = qp->max_inline_data; 556e126ba97SEli Cohen 557e126ba97SEli Cohen wq_size = roundup_pow_of_two(attr->cap.max_send_wr * wqe_size); 558e126ba97SEli Cohen qp->sq.wqe_cnt = wq_size / MLX5_SEND_WQE_BB; 559938fe83cSSaeed Mahameed if (qp->sq.wqe_cnt > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz))) { 5601974ab9dSBart Van Assche mlx5_ib_dbg(dev, "send queue size (%d * %d / %d -> %d) exceeds limits(%d)\n", 5611974ab9dSBart Van Assche attr->cap.max_send_wr, wqe_size, MLX5_SEND_WQE_BB, 562938fe83cSSaeed Mahameed qp->sq.wqe_cnt, 563938fe83cSSaeed Mahameed 1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz)); 564b125a54bSEli Cohen return -ENOMEM; 565b125a54bSEli Cohen } 566e126ba97SEli Cohen qp->sq.wqe_shift = ilog2(MLX5_SEND_WQE_BB); 567288c01b7SEli Cohen qp->sq.max_gs = get_send_sge(attr, wqe_size); 568288c01b7SEli Cohen if (qp->sq.max_gs < attr->cap.max_send_sge) 569288c01b7SEli Cohen return -ENOMEM; 570288c01b7SEli Cohen 571288c01b7SEli Cohen attr->cap.max_send_sge = qp->sq.max_gs; 572b125a54bSEli Cohen qp->sq.max_post = wq_size / wqe_size; 573b125a54bSEli Cohen attr->cap.max_send_wr = qp->sq.max_post; 574e126ba97SEli Cohen 575e126ba97SEli Cohen return wq_size; 576e126ba97SEli Cohen } 577e126ba97SEli Cohen 578e126ba97SEli Cohen static int set_user_buf_size(struct mlx5_ib_dev *dev, 579e126ba97SEli Cohen struct mlx5_ib_qp *qp, 58019098df2Smajd@mellanox.com struct mlx5_ib_create_qp *ucmd, 5810fb2ed66Smajd@mellanox.com struct mlx5_ib_qp_base *base, 5820fb2ed66Smajd@mellanox.com struct ib_qp_init_attr *attr) 583e126ba97SEli Cohen { 584e126ba97SEli Cohen int desc_sz = 1 << qp->sq.wqe_shift; 585e126ba97SEli Cohen 586938fe83cSSaeed Mahameed if (desc_sz > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)) { 587e126ba97SEli Cohen mlx5_ib_warn(dev, "desc_sz %d, max_sq_desc_sz %d\n", 588938fe83cSSaeed Mahameed desc_sz, MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)); 589e126ba97SEli Cohen return -EINVAL; 590e126ba97SEli Cohen } 591e126ba97SEli Cohen 592af8b38edSGal Pressman if (ucmd->sq_wqe_count && !is_power_of_2(ucmd->sq_wqe_count)) { 593af8b38edSGal Pressman mlx5_ib_warn(dev, "sq_wqe_count %d is not a power of two\n", 594af8b38edSGal Pressman ucmd->sq_wqe_count); 595e126ba97SEli Cohen return -EINVAL; 596e126ba97SEli Cohen } 597e126ba97SEli Cohen 598e126ba97SEli Cohen qp->sq.wqe_cnt = ucmd->sq_wqe_count; 599e126ba97SEli Cohen 600938fe83cSSaeed Mahameed if (qp->sq.wqe_cnt > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz))) { 601e126ba97SEli Cohen mlx5_ib_warn(dev, "wqe_cnt %d, max_wqes %d\n", 602938fe83cSSaeed Mahameed qp->sq.wqe_cnt, 603938fe83cSSaeed Mahameed 1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz)); 604e126ba97SEli Cohen return -EINVAL; 605e126ba97SEli Cohen } 606e126ba97SEli Cohen 607c2e53b2cSYishai Hadas if (attr->qp_type == IB_QPT_RAW_PACKET || 6082be08c30SLeon Romanovsky qp->flags & IB_QP_CREATE_SOURCE_QPN) { 6090fb2ed66Smajd@mellanox.com base->ubuffer.buf_size = qp->rq.wqe_cnt << qp->rq.wqe_shift; 6100fb2ed66Smajd@mellanox.com qp->raw_packet_qp.sq.ubuffer.buf_size = qp->sq.wqe_cnt << 6; 6110fb2ed66Smajd@mellanox.com } else { 61219098df2Smajd@mellanox.com base->ubuffer.buf_size = (qp->rq.wqe_cnt << qp->rq.wqe_shift) + 613e126ba97SEli Cohen (qp->sq.wqe_cnt << 6); 6140fb2ed66Smajd@mellanox.com } 615e126ba97SEli Cohen 616e126ba97SEli Cohen return 0; 617e126ba97SEli Cohen } 618e126ba97SEli Cohen 619e126ba97SEli Cohen static int qp_has_rq(struct ib_qp_init_attr *attr) 620e126ba97SEli Cohen { 621e126ba97SEli Cohen if (attr->qp_type == IB_QPT_XRC_INI || 622e126ba97SEli Cohen attr->qp_type == IB_QPT_XRC_TGT || attr->srq || 623e126ba97SEli Cohen attr->qp_type == MLX5_IB_QPT_REG_UMR || 624e126ba97SEli Cohen !attr->cap.max_recv_wr) 625e126ba97SEli Cohen return 0; 626e126ba97SEli Cohen 627e126ba97SEli Cohen return 1; 628e126ba97SEli Cohen } 629e126ba97SEli Cohen 6300b80c14fSEli Cohen enum { 6310b80c14fSEli Cohen /* this is the first blue flame register in the array of bfregs assigned 6320b80c14fSEli Cohen * to a processes. Since we do not use it for blue flame but rather 6330b80c14fSEli Cohen * regular 64 bit doorbells, we do not need a lock for maintaiing 6340b80c14fSEli Cohen * "odd/even" order 6350b80c14fSEli Cohen */ 6360b80c14fSEli Cohen NUM_NON_BLUE_FLAME_BFREGS = 1, 6370b80c14fSEli Cohen }; 6380b80c14fSEli Cohen 639b037c29aSEli Cohen static int max_bfregs(struct mlx5_ib_dev *dev, struct mlx5_bfreg_info *bfregi) 640b037c29aSEli Cohen { 64131a78a5aSYishai Hadas return get_num_static_uars(dev, bfregi) * MLX5_NON_FP_BFREGS_PER_UAR; 642b037c29aSEli Cohen } 643b037c29aSEli Cohen 644b037c29aSEli Cohen static int num_med_bfreg(struct mlx5_ib_dev *dev, 645b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi) 646c1be5232SEli Cohen { 647c1be5232SEli Cohen int n; 648c1be5232SEli Cohen 649b037c29aSEli Cohen n = max_bfregs(dev, bfregi) - bfregi->num_low_latency_bfregs - 650b037c29aSEli Cohen NUM_NON_BLUE_FLAME_BFREGS; 651c1be5232SEli Cohen 652c1be5232SEli Cohen return n >= 0 ? n : 0; 653c1be5232SEli Cohen } 654c1be5232SEli Cohen 65518b0362eSYishai Hadas static int first_med_bfreg(struct mlx5_ib_dev *dev, 65618b0362eSYishai Hadas struct mlx5_bfreg_info *bfregi) 65718b0362eSYishai Hadas { 65818b0362eSYishai Hadas return num_med_bfreg(dev, bfregi) ? 1 : -ENOMEM; 65918b0362eSYishai Hadas } 66018b0362eSYishai Hadas 661b037c29aSEli Cohen static int first_hi_bfreg(struct mlx5_ib_dev *dev, 662b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi) 663c1be5232SEli Cohen { 664c1be5232SEli Cohen int med; 665c1be5232SEli Cohen 666b037c29aSEli Cohen med = num_med_bfreg(dev, bfregi); 667b037c29aSEli Cohen return ++med; 668c1be5232SEli Cohen } 669c1be5232SEli Cohen 670b037c29aSEli Cohen static int alloc_high_class_bfreg(struct mlx5_ib_dev *dev, 671b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi) 672e126ba97SEli Cohen { 673e126ba97SEli Cohen int i; 674e126ba97SEli Cohen 675b037c29aSEli Cohen for (i = first_hi_bfreg(dev, bfregi); i < max_bfregs(dev, bfregi); i++) { 676b037c29aSEli Cohen if (!bfregi->count[i]) { 6772f5ff264SEli Cohen bfregi->count[i]++; 678e126ba97SEli Cohen return i; 679e126ba97SEli Cohen } 680e126ba97SEli Cohen } 681e126ba97SEli Cohen 682e126ba97SEli Cohen return -ENOMEM; 683e126ba97SEli Cohen } 684e126ba97SEli Cohen 685b037c29aSEli Cohen static int alloc_med_class_bfreg(struct mlx5_ib_dev *dev, 686b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi) 687e126ba97SEli Cohen { 68818b0362eSYishai Hadas int minidx = first_med_bfreg(dev, bfregi); 689e126ba97SEli Cohen int i; 690e126ba97SEli Cohen 69118b0362eSYishai Hadas if (minidx < 0) 69218b0362eSYishai Hadas return minidx; 69318b0362eSYishai Hadas 69418b0362eSYishai Hadas for (i = minidx; i < first_hi_bfreg(dev, bfregi); i++) { 6952f5ff264SEli Cohen if (bfregi->count[i] < bfregi->count[minidx]) 696e126ba97SEli Cohen minidx = i; 6970b80c14fSEli Cohen if (!bfregi->count[minidx]) 6980b80c14fSEli Cohen break; 699e126ba97SEli Cohen } 700e126ba97SEli Cohen 7012f5ff264SEli Cohen bfregi->count[minidx]++; 702e126ba97SEli Cohen return minidx; 703e126ba97SEli Cohen } 704e126ba97SEli Cohen 705b037c29aSEli Cohen static int alloc_bfreg(struct mlx5_ib_dev *dev, 706ffaf58deSLeon Romanovsky struct mlx5_bfreg_info *bfregi) 707e126ba97SEli Cohen { 708ffaf58deSLeon Romanovsky int bfregn = -ENOMEM; 709e126ba97SEli Cohen 7100a2fd01cSYishai Hadas if (bfregi->lib_uar_dyn) 7110a2fd01cSYishai Hadas return -EINVAL; 7120a2fd01cSYishai Hadas 7132f5ff264SEli Cohen mutex_lock(&bfregi->lock); 714ffaf58deSLeon Romanovsky if (bfregi->ver >= 2) { 715ffaf58deSLeon Romanovsky bfregn = alloc_high_class_bfreg(dev, bfregi); 716ffaf58deSLeon Romanovsky if (bfregn < 0) 717ffaf58deSLeon Romanovsky bfregn = alloc_med_class_bfreg(dev, bfregi); 718ffaf58deSLeon Romanovsky } 719ffaf58deSLeon Romanovsky 720ffaf58deSLeon Romanovsky if (bfregn < 0) { 7210b80c14fSEli Cohen BUILD_BUG_ON(NUM_NON_BLUE_FLAME_BFREGS != 1); 7222f5ff264SEli Cohen bfregn = 0; 7232f5ff264SEli Cohen bfregi->count[bfregn]++; 724e126ba97SEli Cohen } 7252f5ff264SEli Cohen mutex_unlock(&bfregi->lock); 726e126ba97SEli Cohen 7272f5ff264SEli Cohen return bfregn; 728e126ba97SEli Cohen } 729e126ba97SEli Cohen 7304ed131d0SYishai Hadas void mlx5_ib_free_bfreg(struct mlx5_ib_dev *dev, struct mlx5_bfreg_info *bfregi, int bfregn) 731e126ba97SEli Cohen { 7322f5ff264SEli Cohen mutex_lock(&bfregi->lock); 733b037c29aSEli Cohen bfregi->count[bfregn]--; 7342f5ff264SEli Cohen mutex_unlock(&bfregi->lock); 735e126ba97SEli Cohen } 736e126ba97SEli Cohen 737e126ba97SEli Cohen static enum mlx5_qp_state to_mlx5_state(enum ib_qp_state state) 738e126ba97SEli Cohen { 739e126ba97SEli Cohen switch (state) { 740e126ba97SEli Cohen case IB_QPS_RESET: return MLX5_QP_STATE_RST; 741e126ba97SEli Cohen case IB_QPS_INIT: return MLX5_QP_STATE_INIT; 742e126ba97SEli Cohen case IB_QPS_RTR: return MLX5_QP_STATE_RTR; 743e126ba97SEli Cohen case IB_QPS_RTS: return MLX5_QP_STATE_RTS; 744e126ba97SEli Cohen case IB_QPS_SQD: return MLX5_QP_STATE_SQD; 745e126ba97SEli Cohen case IB_QPS_SQE: return MLX5_QP_STATE_SQER; 746e126ba97SEli Cohen case IB_QPS_ERR: return MLX5_QP_STATE_ERR; 747e126ba97SEli Cohen default: return -1; 748e126ba97SEli Cohen } 749e126ba97SEli Cohen } 750e126ba97SEli Cohen 751e126ba97SEli Cohen static int to_mlx5_st(enum ib_qp_type type) 752e126ba97SEli Cohen { 753e126ba97SEli Cohen switch (type) { 754e126ba97SEli Cohen case IB_QPT_RC: return MLX5_QP_ST_RC; 755e126ba97SEli Cohen case IB_QPT_UC: return MLX5_QP_ST_UC; 756e126ba97SEli Cohen case IB_QPT_UD: return MLX5_QP_ST_UD; 757e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: return MLX5_QP_ST_REG_UMR; 758e126ba97SEli Cohen case IB_QPT_XRC_INI: 759e126ba97SEli Cohen case IB_QPT_XRC_TGT: return MLX5_QP_ST_XRC; 760e126ba97SEli Cohen case IB_QPT_SMI: return MLX5_QP_ST_QP0; 761d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: return MLX5_QP_ST_QP1; 762c32a4f29SMoni Shoua case MLX5_IB_QPT_DCI: return MLX5_QP_ST_DCI; 7633ae7e66aSLeon Romanovsky case IB_QPT_RAW_PACKET: return MLX5_QP_ST_RAW_ETHERTYPE; 764e126ba97SEli Cohen default: return -EINVAL; 765e126ba97SEli Cohen } 766e126ba97SEli Cohen } 767e126ba97SEli Cohen 76889ea94a7SMaor Gottlieb static void mlx5_ib_lock_cqs(struct mlx5_ib_cq *send_cq, 76989ea94a7SMaor Gottlieb struct mlx5_ib_cq *recv_cq); 77089ea94a7SMaor Gottlieb static void mlx5_ib_unlock_cqs(struct mlx5_ib_cq *send_cq, 77189ea94a7SMaor Gottlieb struct mlx5_ib_cq *recv_cq); 77289ea94a7SMaor Gottlieb 7737c043e90SYishai Hadas int bfregn_to_uar_index(struct mlx5_ib_dev *dev, 77405f58cebSLeon Romanovsky struct mlx5_bfreg_info *bfregi, u32 bfregn, 7751ee47ab3SYishai Hadas bool dyn_bfreg) 776e126ba97SEli Cohen { 77705f58cebSLeon Romanovsky unsigned int bfregs_per_sys_page; 77805f58cebSLeon Romanovsky u32 index_of_sys_page; 77905f58cebSLeon Romanovsky u32 offset; 780b037c29aSEli Cohen 7810a2fd01cSYishai Hadas if (bfregi->lib_uar_dyn) 7820a2fd01cSYishai Hadas return -EINVAL; 7830a2fd01cSYishai Hadas 784b037c29aSEli Cohen bfregs_per_sys_page = get_uars_per_sys_page(dev, bfregi->lib_uar_4k) * 785b037c29aSEli Cohen MLX5_NON_FP_BFREGS_PER_UAR; 786b037c29aSEli Cohen index_of_sys_page = bfregn / bfregs_per_sys_page; 787b037c29aSEli Cohen 78805f58cebSLeon Romanovsky if (dyn_bfreg) { 78905f58cebSLeon Romanovsky index_of_sys_page += bfregi->num_static_sys_pages; 79005f58cebSLeon Romanovsky 7917c043e90SYishai Hadas if (index_of_sys_page >= bfregi->num_sys_pages) 7927c043e90SYishai Hadas return -EINVAL; 7937c043e90SYishai Hadas 7941ee47ab3SYishai Hadas if (bfregn > bfregi->num_dyn_bfregs || 7951ee47ab3SYishai Hadas bfregi->sys_pages[index_of_sys_page] == MLX5_IB_INVALID_UAR_INDEX) { 7961ee47ab3SYishai Hadas mlx5_ib_dbg(dev, "Invalid dynamic uar index\n"); 7971ee47ab3SYishai Hadas return -EINVAL; 7981ee47ab3SYishai Hadas } 7991ee47ab3SYishai Hadas } 800b037c29aSEli Cohen 8011ee47ab3SYishai Hadas offset = bfregn % bfregs_per_sys_page / MLX5_NON_FP_BFREGS_PER_UAR; 802b037c29aSEli Cohen return bfregi->sys_pages[index_of_sys_page] + offset; 803e126ba97SEli Cohen } 804e126ba97SEli Cohen 805b0ea0fa5SJason Gunthorpe static int mlx5_ib_umem_get(struct mlx5_ib_dev *dev, struct ib_udata *udata, 80619098df2Smajd@mellanox.com unsigned long addr, size_t size, 807b0ea0fa5SJason Gunthorpe struct ib_umem **umem, int *npages, int *page_shift, 808b0ea0fa5SJason Gunthorpe int *ncont, u32 *offset) 80919098df2Smajd@mellanox.com { 81019098df2Smajd@mellanox.com int err; 81119098df2Smajd@mellanox.com 812c320e527SMoni Shoua *umem = ib_umem_get(&dev->ib_dev, addr, size, 0); 81319098df2Smajd@mellanox.com if (IS_ERR(*umem)) { 81419098df2Smajd@mellanox.com mlx5_ib_dbg(dev, "umem_get failed\n"); 81519098df2Smajd@mellanox.com return PTR_ERR(*umem); 81619098df2Smajd@mellanox.com } 81719098df2Smajd@mellanox.com 818762f899aSMajd Dibbiny mlx5_ib_cont_pages(*umem, addr, 0, npages, page_shift, ncont, NULL); 81919098df2Smajd@mellanox.com 82019098df2Smajd@mellanox.com err = mlx5_ib_get_buf_offset(addr, *page_shift, offset); 82119098df2Smajd@mellanox.com if (err) { 82219098df2Smajd@mellanox.com mlx5_ib_warn(dev, "bad offset\n"); 82319098df2Smajd@mellanox.com goto err_umem; 82419098df2Smajd@mellanox.com } 82519098df2Smajd@mellanox.com 82619098df2Smajd@mellanox.com mlx5_ib_dbg(dev, "addr 0x%lx, size %zu, npages %d, page_shift %d, ncont %d, offset %d\n", 82719098df2Smajd@mellanox.com addr, size, *npages, *page_shift, *ncont, *offset); 82819098df2Smajd@mellanox.com 82919098df2Smajd@mellanox.com return 0; 83019098df2Smajd@mellanox.com 83119098df2Smajd@mellanox.com err_umem: 83219098df2Smajd@mellanox.com ib_umem_release(*umem); 83319098df2Smajd@mellanox.com *umem = NULL; 83419098df2Smajd@mellanox.com 83519098df2Smajd@mellanox.com return err; 83619098df2Smajd@mellanox.com } 83719098df2Smajd@mellanox.com 838fe248c3aSMaor Gottlieb static void destroy_user_rq(struct mlx5_ib_dev *dev, struct ib_pd *pd, 839bdeacabdSShamir Rabinovitch struct mlx5_ib_rwq *rwq, struct ib_udata *udata) 84079b20a6cSYishai Hadas { 841bdeacabdSShamir Rabinovitch struct mlx5_ib_ucontext *context = 842bdeacabdSShamir Rabinovitch rdma_udata_to_drv_context( 843bdeacabdSShamir Rabinovitch udata, 844bdeacabdSShamir Rabinovitch struct mlx5_ib_ucontext, 845bdeacabdSShamir Rabinovitch ibucontext); 84679b20a6cSYishai Hadas 847fe248c3aSMaor Gottlieb if (rwq->create_flags & MLX5_IB_WQ_FLAGS_DELAY_DROP) 848fe248c3aSMaor Gottlieb atomic_dec(&dev->delay_drop.rqs_cnt); 849fe248c3aSMaor Gottlieb 85079b20a6cSYishai Hadas mlx5_ib_db_unmap_user(context, &rwq->db); 85179b20a6cSYishai Hadas ib_umem_release(rwq->umem); 85279b20a6cSYishai Hadas } 85379b20a6cSYishai Hadas 85479b20a6cSYishai Hadas static int create_user_rq(struct mlx5_ib_dev *dev, struct ib_pd *pd, 855b0ea0fa5SJason Gunthorpe struct ib_udata *udata, struct mlx5_ib_rwq *rwq, 85679b20a6cSYishai Hadas struct mlx5_ib_create_wq *ucmd) 85779b20a6cSYishai Hadas { 85889944450SShamir Rabinovitch struct mlx5_ib_ucontext *ucontext = rdma_udata_to_drv_context( 85989944450SShamir Rabinovitch udata, struct mlx5_ib_ucontext, ibucontext); 86079b20a6cSYishai Hadas int page_shift = 0; 86179b20a6cSYishai Hadas int npages; 86279b20a6cSYishai Hadas u32 offset = 0; 86379b20a6cSYishai Hadas int ncont = 0; 86479b20a6cSYishai Hadas int err; 86579b20a6cSYishai Hadas 86679b20a6cSYishai Hadas if (!ucmd->buf_addr) 86779b20a6cSYishai Hadas return -EINVAL; 86879b20a6cSYishai Hadas 869c320e527SMoni Shoua rwq->umem = ib_umem_get(&dev->ib_dev, ucmd->buf_addr, rwq->buf_size, 0); 87079b20a6cSYishai Hadas if (IS_ERR(rwq->umem)) { 87179b20a6cSYishai Hadas mlx5_ib_dbg(dev, "umem_get failed\n"); 87279b20a6cSYishai Hadas err = PTR_ERR(rwq->umem); 87379b20a6cSYishai Hadas return err; 87479b20a6cSYishai Hadas } 87579b20a6cSYishai Hadas 876762f899aSMajd Dibbiny mlx5_ib_cont_pages(rwq->umem, ucmd->buf_addr, 0, &npages, &page_shift, 87779b20a6cSYishai Hadas &ncont, NULL); 87879b20a6cSYishai Hadas err = mlx5_ib_get_buf_offset(ucmd->buf_addr, page_shift, 87979b20a6cSYishai Hadas &rwq->rq_page_offset); 88079b20a6cSYishai Hadas if (err) { 88179b20a6cSYishai Hadas mlx5_ib_warn(dev, "bad offset\n"); 88279b20a6cSYishai Hadas goto err_umem; 88379b20a6cSYishai Hadas } 88479b20a6cSYishai Hadas 88579b20a6cSYishai Hadas rwq->rq_num_pas = ncont; 88679b20a6cSYishai Hadas rwq->page_shift = page_shift; 88779b20a6cSYishai Hadas rwq->log_page_size = page_shift - MLX5_ADAPTER_PAGE_SHIFT; 88879b20a6cSYishai Hadas rwq->wq_sig = !!(ucmd->flags & MLX5_WQ_FLAG_SIGNATURE); 88979b20a6cSYishai Hadas 89079b20a6cSYishai Hadas mlx5_ib_dbg(dev, "addr 0x%llx, size %zd, npages %d, page_shift %d, ncont %d, offset %d\n", 89179b20a6cSYishai Hadas (unsigned long long)ucmd->buf_addr, rwq->buf_size, 89279b20a6cSYishai Hadas npages, page_shift, ncont, offset); 89379b20a6cSYishai Hadas 89489944450SShamir Rabinovitch err = mlx5_ib_db_map_user(ucontext, udata, ucmd->db_addr, &rwq->db); 89579b20a6cSYishai Hadas if (err) { 89679b20a6cSYishai Hadas mlx5_ib_dbg(dev, "map failed\n"); 89779b20a6cSYishai Hadas goto err_umem; 89879b20a6cSYishai Hadas } 89979b20a6cSYishai Hadas 90079b20a6cSYishai Hadas return 0; 90179b20a6cSYishai Hadas 90279b20a6cSYishai Hadas err_umem: 90379b20a6cSYishai Hadas ib_umem_release(rwq->umem); 90479b20a6cSYishai Hadas return err; 90579b20a6cSYishai Hadas } 90679b20a6cSYishai Hadas 907b037c29aSEli Cohen static int adjust_bfregn(struct mlx5_ib_dev *dev, 908b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi, int bfregn) 909b037c29aSEli Cohen { 910b037c29aSEli Cohen return bfregn / MLX5_NON_FP_BFREGS_PER_UAR * MLX5_BFREGS_PER_UAR + 911b037c29aSEli Cohen bfregn % MLX5_NON_FP_BFREGS_PER_UAR; 912b037c29aSEli Cohen } 913b037c29aSEli Cohen 91498fc1126SLeon Romanovsky static int _create_user_qp(struct mlx5_ib_dev *dev, struct ib_pd *pd, 915e126ba97SEli Cohen struct mlx5_ib_qp *qp, struct ib_udata *udata, 91676883a6cSLeon Romanovsky struct ib_qp_init_attr *attr, u32 **in, 91719098df2Smajd@mellanox.com struct mlx5_ib_create_qp_resp *resp, int *inlen, 91876883a6cSLeon Romanovsky struct mlx5_ib_qp_base *base, 91976883a6cSLeon Romanovsky struct mlx5_ib_create_qp *ucmd) 920e126ba97SEli Cohen { 921e126ba97SEli Cohen struct mlx5_ib_ucontext *context; 92219098df2Smajd@mellanox.com struct mlx5_ib_ubuffer *ubuffer = &base->ubuffer; 9239e9c47d0SEli Cohen int page_shift = 0; 9241ee47ab3SYishai Hadas int uar_index = 0; 925e126ba97SEli Cohen int npages; 9269e9c47d0SEli Cohen u32 offset = 0; 9272f5ff264SEli Cohen int bfregn; 9289e9c47d0SEli Cohen int ncont = 0; 92909a7d9ecSSaeed Mahameed __be64 *pas; 93009a7d9ecSSaeed Mahameed void *qpc; 931e126ba97SEli Cohen int err; 9325aa3771dSYishai Hadas u16 uid; 933ac42a5eeSYishai Hadas u32 uar_flags; 934e126ba97SEli Cohen 93589944450SShamir Rabinovitch context = rdma_udata_to_drv_context(udata, struct mlx5_ib_ucontext, 93689944450SShamir Rabinovitch ibucontext); 93776883a6cSLeon Romanovsky uar_flags = qp->flags_en & 93876883a6cSLeon Romanovsky (MLX5_QP_FLAG_UAR_PAGE_INDEX | MLX5_QP_FLAG_BFREG_INDEX); 939ac42a5eeSYishai Hadas switch (uar_flags) { 940ac42a5eeSYishai Hadas case MLX5_QP_FLAG_UAR_PAGE_INDEX: 94176883a6cSLeon Romanovsky uar_index = ucmd->bfreg_index; 942ac42a5eeSYishai Hadas bfregn = MLX5_IB_INVALID_BFREG; 943ac42a5eeSYishai Hadas break; 944ac42a5eeSYishai Hadas case MLX5_QP_FLAG_BFREG_INDEX: 9451ee47ab3SYishai Hadas uar_index = bfregn_to_uar_index(dev, &context->bfregi, 94676883a6cSLeon Romanovsky ucmd->bfreg_index, true); 9471ee47ab3SYishai Hadas if (uar_index < 0) 9481ee47ab3SYishai Hadas return uar_index; 9491ee47ab3SYishai Hadas bfregn = MLX5_IB_INVALID_BFREG; 950ac42a5eeSYishai Hadas break; 951ac42a5eeSYishai Hadas case 0: 9522be08c30SLeon Romanovsky if (qp->flags & IB_QP_CREATE_CROSS_CHANNEL) 953ac42a5eeSYishai Hadas return -EINVAL; 954ffaf58deSLeon Romanovsky bfregn = alloc_bfreg(dev, &context->bfregi); 955ffaf58deSLeon Romanovsky if (bfregn < 0) 9562f5ff264SEli Cohen return bfregn; 957ac42a5eeSYishai Hadas break; 958ac42a5eeSYishai Hadas default: 959ac42a5eeSYishai Hadas return -EINVAL; 960e126ba97SEli Cohen } 961e126ba97SEli Cohen 9622f5ff264SEli Cohen mlx5_ib_dbg(dev, "bfregn 0x%x, uar_index 0x%x\n", bfregn, uar_index); 9631ee47ab3SYishai Hadas if (bfregn != MLX5_IB_INVALID_BFREG) 9641ee47ab3SYishai Hadas uar_index = bfregn_to_uar_index(dev, &context->bfregi, bfregn, 9651ee47ab3SYishai Hadas false); 966e126ba97SEli Cohen 96748fea837SHaggai Eran qp->rq.offset = 0; 96848fea837SHaggai Eran qp->sq.wqe_shift = ilog2(MLX5_SEND_WQE_BB); 96948fea837SHaggai Eran qp->sq.offset = qp->rq.wqe_cnt << qp->rq.wqe_shift; 97048fea837SHaggai Eran 97176883a6cSLeon Romanovsky err = set_user_buf_size(dev, qp, ucmd, base, attr); 972e126ba97SEli Cohen if (err) 9732f5ff264SEli Cohen goto err_bfreg; 974e126ba97SEli Cohen 97576883a6cSLeon Romanovsky if (ucmd->buf_addr && ubuffer->buf_size) { 97676883a6cSLeon Romanovsky ubuffer->buf_addr = ucmd->buf_addr; 977b0ea0fa5SJason Gunthorpe err = mlx5_ib_umem_get(dev, udata, ubuffer->buf_addr, 978b0ea0fa5SJason Gunthorpe ubuffer->buf_size, &ubuffer->umem, 979b0ea0fa5SJason Gunthorpe &npages, &page_shift, &ncont, &offset); 98019098df2Smajd@mellanox.com if (err) 9812f5ff264SEli Cohen goto err_bfreg; 9829e9c47d0SEli Cohen } else { 98319098df2Smajd@mellanox.com ubuffer->umem = NULL; 9849e9c47d0SEli Cohen } 985e126ba97SEli Cohen 98609a7d9ecSSaeed Mahameed *inlen = MLX5_ST_SZ_BYTES(create_qp_in) + 98709a7d9ecSSaeed Mahameed MLX5_FLD_SZ_BYTES(create_qp_in, pas[0]) * ncont; 9881b9a07eeSLeon Romanovsky *in = kvzalloc(*inlen, GFP_KERNEL); 989e126ba97SEli Cohen if (!*in) { 990e126ba97SEli Cohen err = -ENOMEM; 991e126ba97SEli Cohen goto err_umem; 992e126ba97SEli Cohen } 993e126ba97SEli Cohen 99404bcc1c2SLeon Romanovsky uid = (attr->qp_type != IB_QPT_XRC_INI) ? to_mpd(pd)->uid : 0; 9955aa3771dSYishai Hadas MLX5_SET(create_qp_in, *in, uid, uid); 99609a7d9ecSSaeed Mahameed pas = (__be64 *)MLX5_ADDR_OF(create_qp_in, *in, pas); 99709a7d9ecSSaeed Mahameed if (ubuffer->umem) 99809a7d9ecSSaeed Mahameed mlx5_ib_populate_pas(dev, ubuffer->umem, page_shift, pas, 0); 99909a7d9ecSSaeed Mahameed 100009a7d9ecSSaeed Mahameed qpc = MLX5_ADDR_OF(create_qp_in, *in, qpc); 100109a7d9ecSSaeed Mahameed 100209a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_page_size, page_shift - MLX5_ADAPTER_PAGE_SHIFT); 100309a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, page_offset, offset); 100409a7d9ecSSaeed Mahameed 100509a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, uar_page, uar_index); 10061ee47ab3SYishai Hadas if (bfregn != MLX5_IB_INVALID_BFREG) 1007b037c29aSEli Cohen resp->bfreg_index = adjust_bfregn(dev, &context->bfregi, bfregn); 10081ee47ab3SYishai Hadas else 10091ee47ab3SYishai Hadas resp->bfreg_index = MLX5_IB_INVALID_BFREG; 10102f5ff264SEli Cohen qp->bfregn = bfregn; 1011e126ba97SEli Cohen 101276883a6cSLeon Romanovsky err = mlx5_ib_db_map_user(context, udata, ucmd->db_addr, &qp->db); 1013e126ba97SEli Cohen if (err) { 1014e126ba97SEli Cohen mlx5_ib_dbg(dev, "map failed\n"); 1015e126ba97SEli Cohen goto err_free; 1016e126ba97SEli Cohen } 1017e126ba97SEli Cohen 101841d902cbSJason Gunthorpe err = ib_copy_to_udata(udata, resp, min(udata->outlen, sizeof(*resp))); 1019e126ba97SEli Cohen if (err) { 1020e126ba97SEli Cohen mlx5_ib_dbg(dev, "copy failed\n"); 1021e126ba97SEli Cohen goto err_unmap; 1022e126ba97SEli Cohen } 1023e126ba97SEli Cohen 1024e126ba97SEli Cohen return 0; 1025e126ba97SEli Cohen 1026e126ba97SEli Cohen err_unmap: 1027e126ba97SEli Cohen mlx5_ib_db_unmap_user(context, &qp->db); 1028e126ba97SEli Cohen 1029e126ba97SEli Cohen err_free: 1030479163f4SAl Viro kvfree(*in); 1031e126ba97SEli Cohen 1032e126ba97SEli Cohen err_umem: 103319098df2Smajd@mellanox.com ib_umem_release(ubuffer->umem); 1034e126ba97SEli Cohen 10352f5ff264SEli Cohen err_bfreg: 10361ee47ab3SYishai Hadas if (bfregn != MLX5_IB_INVALID_BFREG) 10374ed131d0SYishai Hadas mlx5_ib_free_bfreg(dev, &context->bfregi, bfregn); 1038e126ba97SEli Cohen return err; 1039e126ba97SEli Cohen } 1040e126ba97SEli Cohen 1041747c519cSLeon Romanovsky static void destroy_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 1042747c519cSLeon Romanovsky struct mlx5_ib_qp_base *base, struct ib_udata *udata) 1043e126ba97SEli Cohen { 1044747c519cSLeon Romanovsky struct mlx5_ib_ucontext *context = rdma_udata_to_drv_context( 1045747c519cSLeon Romanovsky udata, struct mlx5_ib_ucontext, ibucontext); 1046e126ba97SEli Cohen 1047747c519cSLeon Romanovsky if (udata) { 1048747c519cSLeon Romanovsky /* User QP */ 1049e126ba97SEli Cohen mlx5_ib_db_unmap_user(context, &qp->db); 105019098df2Smajd@mellanox.com ib_umem_release(base->ubuffer.umem); 10511ee47ab3SYishai Hadas 10521ee47ab3SYishai Hadas /* 10531ee47ab3SYishai Hadas * Free only the BFREGs which are handled by the kernel. 10541ee47ab3SYishai Hadas * BFREGs of UARs allocated dynamically are handled by user. 10551ee47ab3SYishai Hadas */ 10561ee47ab3SYishai Hadas if (qp->bfregn != MLX5_IB_INVALID_BFREG) 10574ed131d0SYishai Hadas mlx5_ib_free_bfreg(dev, &context->bfregi, qp->bfregn); 1058747c519cSLeon Romanovsky return; 1059747c519cSLeon Romanovsky } 1060747c519cSLeon Romanovsky 1061747c519cSLeon Romanovsky /* Kernel QP */ 1062747c519cSLeon Romanovsky kvfree(qp->sq.wqe_head); 1063747c519cSLeon Romanovsky kvfree(qp->sq.w_list); 1064747c519cSLeon Romanovsky kvfree(qp->sq.wrid); 1065747c519cSLeon Romanovsky kvfree(qp->sq.wr_data); 1066747c519cSLeon Romanovsky kvfree(qp->rq.wrid); 1067747c519cSLeon Romanovsky if (qp->db.db) 1068747c519cSLeon Romanovsky mlx5_db_free(dev->mdev, &qp->db); 1069747c519cSLeon Romanovsky if (qp->buf.frags) 1070747c519cSLeon Romanovsky mlx5_frag_buf_free(dev->mdev, &qp->buf); 1071e126ba97SEli Cohen } 1072e126ba97SEli Cohen 107334f4c955SGuy Levi /* get_sq_edge - Get the next nearby edge. 107434f4c955SGuy Levi * 107534f4c955SGuy Levi * An 'edge' is defined as the first following address after the end 107634f4c955SGuy Levi * of the fragment or the SQ. Accordingly, during the WQE construction 107734f4c955SGuy Levi * which repetitively increases the pointer to write the next data, it 107834f4c955SGuy Levi * simply should check if it gets to an edge. 107934f4c955SGuy Levi * 108034f4c955SGuy Levi * @sq - SQ buffer. 108134f4c955SGuy Levi * @idx - Stride index in the SQ buffer. 108234f4c955SGuy Levi * 108334f4c955SGuy Levi * Return: 108434f4c955SGuy Levi * The new edge. 108534f4c955SGuy Levi */ 108634f4c955SGuy Levi static void *get_sq_edge(struct mlx5_ib_wq *sq, u32 idx) 108734f4c955SGuy Levi { 108834f4c955SGuy Levi void *fragment_end; 108934f4c955SGuy Levi 109034f4c955SGuy Levi fragment_end = mlx5_frag_buf_get_wqe 109134f4c955SGuy Levi (&sq->fbc, 109234f4c955SGuy Levi mlx5_frag_buf_get_idx_last_contig_stride(&sq->fbc, idx)); 109334f4c955SGuy Levi 109434f4c955SGuy Levi return fragment_end + MLX5_SEND_WQE_BB; 109534f4c955SGuy Levi } 109634f4c955SGuy Levi 109798fc1126SLeon Romanovsky static int _create_kernel_qp(struct mlx5_ib_dev *dev, 1098e126ba97SEli Cohen struct ib_qp_init_attr *init_attr, 109998fc1126SLeon Romanovsky struct mlx5_ib_qp *qp, u32 **in, int *inlen, 110019098df2Smajd@mellanox.com struct mlx5_ib_qp_base *base) 1101e126ba97SEli Cohen { 1102e126ba97SEli Cohen int uar_index; 110309a7d9ecSSaeed Mahameed void *qpc; 1104e126ba97SEli Cohen int err; 1105e126ba97SEli Cohen 1106e126ba97SEli Cohen if (init_attr->qp_type == MLX5_IB_QPT_REG_UMR) 11075fe9dec0SEli Cohen qp->bf.bfreg = &dev->fp_bfreg; 11082978975cSLeon Romanovsky else if (qp->flags & MLX5_IB_QP_CREATE_WC_TEST) 110911f552e2SMichael Guralnik qp->bf.bfreg = &dev->wc_bfreg; 11105fe9dec0SEli Cohen else 11115fe9dec0SEli Cohen qp->bf.bfreg = &dev->bfreg; 1112e126ba97SEli Cohen 1113d8030b0dSEli Cohen /* We need to divide by two since each register is comprised of 1114d8030b0dSEli Cohen * two buffers of identical size, namely odd and even 1115d8030b0dSEli Cohen */ 1116d8030b0dSEli Cohen qp->bf.buf_size = (1 << MLX5_CAP_GEN(dev->mdev, log_bf_reg_size)) / 2; 11175fe9dec0SEli Cohen uar_index = qp->bf.bfreg->index; 1118e126ba97SEli Cohen 1119e126ba97SEli Cohen err = calc_sq_size(dev, init_attr, qp); 1120e126ba97SEli Cohen if (err < 0) { 1121e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 11225fe9dec0SEli Cohen return err; 1123e126ba97SEli Cohen } 1124e126ba97SEli Cohen 1125e126ba97SEli Cohen qp->rq.offset = 0; 1126e126ba97SEli Cohen qp->sq.offset = qp->rq.wqe_cnt << qp->rq.wqe_shift; 112719098df2Smajd@mellanox.com base->ubuffer.buf_size = err + (qp->rq.wqe_cnt << qp->rq.wqe_shift); 1128e126ba97SEli Cohen 112934f4c955SGuy Levi err = mlx5_frag_buf_alloc_node(dev->mdev, base->ubuffer.buf_size, 113034f4c955SGuy Levi &qp->buf, dev->mdev->priv.numa_node); 1131e126ba97SEli Cohen if (err) { 1132e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 11335fe9dec0SEli Cohen return err; 1134e126ba97SEli Cohen } 1135e126ba97SEli Cohen 113634f4c955SGuy Levi if (qp->rq.wqe_cnt) 113734f4c955SGuy Levi mlx5_init_fbc(qp->buf.frags, qp->rq.wqe_shift, 113834f4c955SGuy Levi ilog2(qp->rq.wqe_cnt), &qp->rq.fbc); 113934f4c955SGuy Levi 114034f4c955SGuy Levi if (qp->sq.wqe_cnt) { 114134f4c955SGuy Levi int sq_strides_offset = (qp->sq.offset & (PAGE_SIZE - 1)) / 114234f4c955SGuy Levi MLX5_SEND_WQE_BB; 114334f4c955SGuy Levi mlx5_init_fbc_offset(qp->buf.frags + 114434f4c955SGuy Levi (qp->sq.offset / PAGE_SIZE), 114534f4c955SGuy Levi ilog2(MLX5_SEND_WQE_BB), 114634f4c955SGuy Levi ilog2(qp->sq.wqe_cnt), 114734f4c955SGuy Levi sq_strides_offset, &qp->sq.fbc); 114834f4c955SGuy Levi 114934f4c955SGuy Levi qp->sq.cur_edge = get_sq_edge(&qp->sq, 0); 115034f4c955SGuy Levi } 115134f4c955SGuy Levi 115209a7d9ecSSaeed Mahameed *inlen = MLX5_ST_SZ_BYTES(create_qp_in) + 115309a7d9ecSSaeed Mahameed MLX5_FLD_SZ_BYTES(create_qp_in, pas[0]) * qp->buf.npages; 11541b9a07eeSLeon Romanovsky *in = kvzalloc(*inlen, GFP_KERNEL); 1155e126ba97SEli Cohen if (!*in) { 1156e126ba97SEli Cohen err = -ENOMEM; 1157e126ba97SEli Cohen goto err_buf; 1158e126ba97SEli Cohen } 115909a7d9ecSSaeed Mahameed 116009a7d9ecSSaeed Mahameed qpc = MLX5_ADDR_OF(create_qp_in, *in, qpc); 116109a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, uar_page, uar_index); 116209a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_page_size, qp->buf.page_shift - MLX5_ADAPTER_PAGE_SHIFT); 116309a7d9ecSSaeed Mahameed 1164e126ba97SEli Cohen /* Set "fast registration enabled" for all kernel QPs */ 116509a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, fre, 1); 116609a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, rlky, 1); 1167e126ba97SEli Cohen 11682978975cSLeon Romanovsky if (qp->flags & MLX5_IB_QP_CREATE_SQPN_QP1) 116909a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, deth_sqpn, 1); 1170b11a4f9cSHaggai Eran 117134f4c955SGuy Levi mlx5_fill_page_frag_array(&qp->buf, 117234f4c955SGuy Levi (__be64 *)MLX5_ADDR_OF(create_qp_in, 117334f4c955SGuy Levi *in, pas)); 1174e126ba97SEli Cohen 11759603b61dSJack Morgenstein err = mlx5_db_alloc(dev->mdev, &qp->db); 1176e126ba97SEli Cohen if (err) { 1177e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 1178e126ba97SEli Cohen goto err_free; 1179e126ba97SEli Cohen } 1180e126ba97SEli Cohen 1181b5883008SLi Dongyang qp->sq.wrid = kvmalloc_array(qp->sq.wqe_cnt, 1182b5883008SLi Dongyang sizeof(*qp->sq.wrid), GFP_KERNEL); 1183b5883008SLi Dongyang qp->sq.wr_data = kvmalloc_array(qp->sq.wqe_cnt, 1184b5883008SLi Dongyang sizeof(*qp->sq.wr_data), GFP_KERNEL); 1185b5883008SLi Dongyang qp->rq.wrid = kvmalloc_array(qp->rq.wqe_cnt, 1186b5883008SLi Dongyang sizeof(*qp->rq.wrid), GFP_KERNEL); 1187b5883008SLi Dongyang qp->sq.w_list = kvmalloc_array(qp->sq.wqe_cnt, 1188b5883008SLi Dongyang sizeof(*qp->sq.w_list), GFP_KERNEL); 1189b5883008SLi Dongyang qp->sq.wqe_head = kvmalloc_array(qp->sq.wqe_cnt, 1190b5883008SLi Dongyang sizeof(*qp->sq.wqe_head), GFP_KERNEL); 1191e126ba97SEli Cohen 1192e126ba97SEli Cohen if (!qp->sq.wrid || !qp->sq.wr_data || !qp->rq.wrid || 1193e126ba97SEli Cohen !qp->sq.w_list || !qp->sq.wqe_head) { 1194e126ba97SEli Cohen err = -ENOMEM; 1195e126ba97SEli Cohen goto err_wrid; 1196e126ba97SEli Cohen } 1197e126ba97SEli Cohen 1198e126ba97SEli Cohen return 0; 1199e126ba97SEli Cohen 1200e126ba97SEli Cohen err_wrid: 1201b5883008SLi Dongyang kvfree(qp->sq.wqe_head); 1202b5883008SLi Dongyang kvfree(qp->sq.w_list); 1203b5883008SLi Dongyang kvfree(qp->sq.wrid); 1204b5883008SLi Dongyang kvfree(qp->sq.wr_data); 1205b5883008SLi Dongyang kvfree(qp->rq.wrid); 1206f4044dacSEli Cohen mlx5_db_free(dev->mdev, &qp->db); 1207e126ba97SEli Cohen 1208e126ba97SEli Cohen err_free: 1209479163f4SAl Viro kvfree(*in); 1210e126ba97SEli Cohen 1211e126ba97SEli Cohen err_buf: 121234f4c955SGuy Levi mlx5_frag_buf_free(dev->mdev, &qp->buf); 1213e126ba97SEli Cohen return err; 1214e126ba97SEli Cohen } 1215e126ba97SEli Cohen 121609a7d9ecSSaeed Mahameed static u32 get_rx_type(struct mlx5_ib_qp *qp, struct ib_qp_init_attr *attr) 1217e126ba97SEli Cohen { 12187aede1a2SLeon Romanovsky if (attr->srq || (qp->type == IB_QPT_XRC_TGT) || 12197aede1a2SLeon Romanovsky (qp->type == MLX5_IB_QPT_DCI) || (qp->type == IB_QPT_XRC_INI)) 122009a7d9ecSSaeed Mahameed return MLX5_SRQ_RQ; 1221e126ba97SEli Cohen else if (!qp->has_rq) 122209a7d9ecSSaeed Mahameed return MLX5_ZERO_LEN_RQ; 12237aede1a2SLeon Romanovsky 122409a7d9ecSSaeed Mahameed return MLX5_NON_ZERO_RQ; 1225e126ba97SEli Cohen } 1226e126ba97SEli Cohen 12270fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_tis(struct mlx5_ib_dev *dev, 1228c2e53b2cSYishai Hadas struct mlx5_ib_qp *qp, 12291cd6dbd3SYishai Hadas struct mlx5_ib_sq *sq, u32 tdn, 12301cd6dbd3SYishai Hadas struct ib_pd *pd) 12310fb2ed66Smajd@mellanox.com { 1232e0b4b472SLeon Romanovsky u32 in[MLX5_ST_SZ_DW(create_tis_in)] = {}; 12330fb2ed66Smajd@mellanox.com void *tisc = MLX5_ADDR_OF(create_tis_in, in, ctx); 12340fb2ed66Smajd@mellanox.com 12351cd6dbd3SYishai Hadas MLX5_SET(create_tis_in, in, uid, to_mpd(pd)->uid); 12360fb2ed66Smajd@mellanox.com MLX5_SET(tisc, tisc, transport_domain, tdn); 12372be08c30SLeon Romanovsky if (qp->flags & IB_QP_CREATE_SOURCE_QPN) 1238c2e53b2cSYishai Hadas MLX5_SET(tisc, tisc, underlay_qpn, qp->underlay_qpn); 1239c2e53b2cSYishai Hadas 1240e0b4b472SLeon Romanovsky return mlx5_core_create_tis(dev->mdev, in, &sq->tisn); 12410fb2ed66Smajd@mellanox.com } 12420fb2ed66Smajd@mellanox.com 12430fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp_tis(struct mlx5_ib_dev *dev, 12441cd6dbd3SYishai Hadas struct mlx5_ib_sq *sq, struct ib_pd *pd) 12450fb2ed66Smajd@mellanox.com { 12461cd6dbd3SYishai Hadas mlx5_cmd_destroy_tis(dev->mdev, sq->tisn, to_mpd(pd)->uid); 12470fb2ed66Smajd@mellanox.com } 12480fb2ed66Smajd@mellanox.com 1249d5ed8ac3SMark Bloch static void destroy_flow_rule_vport_sq(struct mlx5_ib_sq *sq) 1250b96c9ddeSMark Bloch { 1251b96c9ddeSMark Bloch if (sq->flow_rule) 1252b96c9ddeSMark Bloch mlx5_del_flow_rules(sq->flow_rule); 1253d5ed8ac3SMark Bloch sq->flow_rule = NULL; 1254b96c9ddeSMark Bloch } 1255b96c9ddeSMark Bloch 12560fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_sq(struct mlx5_ib_dev *dev, 1257b0ea0fa5SJason Gunthorpe struct ib_udata *udata, 12580fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq, void *qpin, 12590fb2ed66Smajd@mellanox.com struct ib_pd *pd) 12600fb2ed66Smajd@mellanox.com { 12610fb2ed66Smajd@mellanox.com struct mlx5_ib_ubuffer *ubuffer = &sq->ubuffer; 12620fb2ed66Smajd@mellanox.com __be64 *pas; 12630fb2ed66Smajd@mellanox.com void *in; 12640fb2ed66Smajd@mellanox.com void *sqc; 12650fb2ed66Smajd@mellanox.com void *qpc = MLX5_ADDR_OF(create_qp_in, qpin, qpc); 12660fb2ed66Smajd@mellanox.com void *wq; 12670fb2ed66Smajd@mellanox.com int inlen; 12680fb2ed66Smajd@mellanox.com int err; 12690fb2ed66Smajd@mellanox.com int page_shift = 0; 12700fb2ed66Smajd@mellanox.com int npages; 12710fb2ed66Smajd@mellanox.com int ncont = 0; 12720fb2ed66Smajd@mellanox.com u32 offset = 0; 12730fb2ed66Smajd@mellanox.com 1274b0ea0fa5SJason Gunthorpe err = mlx5_ib_umem_get(dev, udata, ubuffer->buf_addr, ubuffer->buf_size, 1275b0ea0fa5SJason Gunthorpe &sq->ubuffer.umem, &npages, &page_shift, &ncont, 1276b0ea0fa5SJason Gunthorpe &offset); 12770fb2ed66Smajd@mellanox.com if (err) 12780fb2ed66Smajd@mellanox.com return err; 12790fb2ed66Smajd@mellanox.com 12800fb2ed66Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(create_sq_in) + sizeof(u64) * ncont; 12811b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 12820fb2ed66Smajd@mellanox.com if (!in) { 12830fb2ed66Smajd@mellanox.com err = -ENOMEM; 12840fb2ed66Smajd@mellanox.com goto err_umem; 12850fb2ed66Smajd@mellanox.com } 12860fb2ed66Smajd@mellanox.com 1287c14003f0SYishai Hadas MLX5_SET(create_sq_in, in, uid, to_mpd(pd)->uid); 12880fb2ed66Smajd@mellanox.com sqc = MLX5_ADDR_OF(create_sq_in, in, ctx); 12890fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, flush_in_error_en, 1); 1290795b609cSBodong Wang if (MLX5_CAP_ETH(dev->mdev, multi_pkt_send_wqe)) 1291795b609cSBodong Wang MLX5_SET(sqc, sqc, allow_multi_pkt_send_wqe, 1); 12920fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, state, MLX5_SQC_STATE_RST); 12930fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, user_index, MLX5_GET(qpc, qpc, user_index)); 12940fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, cqn, MLX5_GET(qpc, qpc, cqn_snd)); 12950fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, tis_lst_sz, 1); 12960fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, tis_num_0, sq->tisn); 129796dc3fc5SNoa Osherovich if (MLX5_CAP_GEN(dev->mdev, eth_net_offloads) && 129896dc3fc5SNoa Osherovich MLX5_CAP_ETH(dev->mdev, swp)) 129996dc3fc5SNoa Osherovich MLX5_SET(sqc, sqc, allow_swp, 1); 13000fb2ed66Smajd@mellanox.com 13010fb2ed66Smajd@mellanox.com wq = MLX5_ADDR_OF(sqc, sqc, wq); 13020fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, wq_type, MLX5_WQ_TYPE_CYCLIC); 13030fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, pd, MLX5_GET(qpc, qpc, pd)); 13040fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, uar_page, MLX5_GET(qpc, qpc, uar_page)); 13050fb2ed66Smajd@mellanox.com MLX5_SET64(wq, wq, dbr_addr, MLX5_GET64(qpc, qpc, dbr_addr)); 13060fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_stride, ilog2(MLX5_SEND_WQE_BB)); 13070fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_sz, MLX5_GET(qpc, qpc, log_sq_size)); 13080fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_pg_sz, page_shift - MLX5_ADAPTER_PAGE_SHIFT); 13090fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, page_offset, offset); 13100fb2ed66Smajd@mellanox.com 13110fb2ed66Smajd@mellanox.com pas = (__be64 *)MLX5_ADDR_OF(wq, wq, pas); 13120fb2ed66Smajd@mellanox.com mlx5_ib_populate_pas(dev, sq->ubuffer.umem, page_shift, pas, 0); 13130fb2ed66Smajd@mellanox.com 1314333fbaa0SLeon Romanovsky err = mlx5_core_create_sq_tracked(dev, in, inlen, &sq->base.mqp); 13150fb2ed66Smajd@mellanox.com 13160fb2ed66Smajd@mellanox.com kvfree(in); 13170fb2ed66Smajd@mellanox.com 13180fb2ed66Smajd@mellanox.com if (err) 13190fb2ed66Smajd@mellanox.com goto err_umem; 13200fb2ed66Smajd@mellanox.com 13210fb2ed66Smajd@mellanox.com return 0; 13220fb2ed66Smajd@mellanox.com 13230fb2ed66Smajd@mellanox.com err_umem: 13240fb2ed66Smajd@mellanox.com ib_umem_release(sq->ubuffer.umem); 13250fb2ed66Smajd@mellanox.com sq->ubuffer.umem = NULL; 13260fb2ed66Smajd@mellanox.com 13270fb2ed66Smajd@mellanox.com return err; 13280fb2ed66Smajd@mellanox.com } 13290fb2ed66Smajd@mellanox.com 13300fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp_sq(struct mlx5_ib_dev *dev, 13310fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq) 13320fb2ed66Smajd@mellanox.com { 1333d5ed8ac3SMark Bloch destroy_flow_rule_vport_sq(sq); 1334333fbaa0SLeon Romanovsky mlx5_core_destroy_sq_tracked(dev, &sq->base.mqp); 13350fb2ed66Smajd@mellanox.com ib_umem_release(sq->ubuffer.umem); 13360fb2ed66Smajd@mellanox.com } 13370fb2ed66Smajd@mellanox.com 13382c292dbbSBoris Pismenny static size_t get_rq_pas_size(void *qpc) 13390fb2ed66Smajd@mellanox.com { 13400fb2ed66Smajd@mellanox.com u32 log_page_size = MLX5_GET(qpc, qpc, log_page_size) + 12; 13410fb2ed66Smajd@mellanox.com u32 log_rq_stride = MLX5_GET(qpc, qpc, log_rq_stride); 13420fb2ed66Smajd@mellanox.com u32 log_rq_size = MLX5_GET(qpc, qpc, log_rq_size); 13430fb2ed66Smajd@mellanox.com u32 page_offset = MLX5_GET(qpc, qpc, page_offset); 13440fb2ed66Smajd@mellanox.com u32 po_quanta = 1 << (log_page_size - 6); 13450fb2ed66Smajd@mellanox.com u32 rq_sz = 1 << (log_rq_size + 4 + log_rq_stride); 13460fb2ed66Smajd@mellanox.com u32 page_size = 1 << log_page_size; 13470fb2ed66Smajd@mellanox.com u32 rq_sz_po = rq_sz + (page_offset * po_quanta); 13480fb2ed66Smajd@mellanox.com u32 rq_num_pas = (rq_sz_po + page_size - 1) / page_size; 13490fb2ed66Smajd@mellanox.com 13500fb2ed66Smajd@mellanox.com return rq_num_pas * sizeof(u64); 13510fb2ed66Smajd@mellanox.com } 13520fb2ed66Smajd@mellanox.com 13530fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_rq(struct mlx5_ib_dev *dev, 13542c292dbbSBoris Pismenny struct mlx5_ib_rq *rq, void *qpin, 135534d57585SYishai Hadas size_t qpinlen, struct ib_pd *pd) 13560fb2ed66Smajd@mellanox.com { 1357358e42eaSMajd Dibbiny struct mlx5_ib_qp *mqp = rq->base.container_mibqp; 13580fb2ed66Smajd@mellanox.com __be64 *pas; 13590fb2ed66Smajd@mellanox.com __be64 *qp_pas; 13600fb2ed66Smajd@mellanox.com void *in; 13610fb2ed66Smajd@mellanox.com void *rqc; 13620fb2ed66Smajd@mellanox.com void *wq; 13630fb2ed66Smajd@mellanox.com void *qpc = MLX5_ADDR_OF(create_qp_in, qpin, qpc); 13642c292dbbSBoris Pismenny size_t rq_pas_size = get_rq_pas_size(qpc); 13652c292dbbSBoris Pismenny size_t inlen; 13660fb2ed66Smajd@mellanox.com int err; 13672c292dbbSBoris Pismenny 13682c292dbbSBoris Pismenny if (qpinlen < rq_pas_size + MLX5_BYTE_OFF(create_qp_in, pas)) 13692c292dbbSBoris Pismenny return -EINVAL; 13700fb2ed66Smajd@mellanox.com 13710fb2ed66Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(create_rq_in) + rq_pas_size; 13721b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 13730fb2ed66Smajd@mellanox.com if (!in) 13740fb2ed66Smajd@mellanox.com return -ENOMEM; 13750fb2ed66Smajd@mellanox.com 137634d57585SYishai Hadas MLX5_SET(create_rq_in, in, uid, to_mpd(pd)->uid); 13770fb2ed66Smajd@mellanox.com rqc = MLX5_ADDR_OF(create_rq_in, in, ctx); 1378e4cc4fa7SNoa Osherovich if (!(rq->flags & MLX5_IB_RQ_CVLAN_STRIPPING)) 13790fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, vsd, 1); 13800fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, mem_rq_type, MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE); 13810fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, state, MLX5_RQC_STATE_RST); 13820fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, flush_in_error_en, 1); 13830fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, user_index, MLX5_GET(qpc, qpc, user_index)); 13840fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, cqn, MLX5_GET(qpc, qpc, cqn_rcv)); 13850fb2ed66Smajd@mellanox.com 13862be08c30SLeon Romanovsky if (mqp->flags & IB_QP_CREATE_SCATTER_FCS) 1387358e42eaSMajd Dibbiny MLX5_SET(rqc, rqc, scatter_fcs, 1); 1388358e42eaSMajd Dibbiny 13890fb2ed66Smajd@mellanox.com wq = MLX5_ADDR_OF(rqc, rqc, wq); 13900fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, wq_type, MLX5_WQ_TYPE_CYCLIC); 1391b1383aa6SNoa Osherovich if (rq->flags & MLX5_IB_RQ_PCI_WRITE_END_PADDING) 1392b1383aa6SNoa Osherovich MLX5_SET(wq, wq, end_padding_mode, MLX5_WQ_END_PAD_MODE_ALIGN); 13930fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, page_offset, MLX5_GET(qpc, qpc, page_offset)); 13940fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, pd, MLX5_GET(qpc, qpc, pd)); 13950fb2ed66Smajd@mellanox.com MLX5_SET64(wq, wq, dbr_addr, MLX5_GET64(qpc, qpc, dbr_addr)); 13960fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_stride, MLX5_GET(qpc, qpc, log_rq_stride) + 4); 13970fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_pg_sz, MLX5_GET(qpc, qpc, log_page_size)); 13980fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_sz, MLX5_GET(qpc, qpc, log_rq_size)); 13990fb2ed66Smajd@mellanox.com 14000fb2ed66Smajd@mellanox.com pas = (__be64 *)MLX5_ADDR_OF(wq, wq, pas); 14010fb2ed66Smajd@mellanox.com qp_pas = (__be64 *)MLX5_ADDR_OF(create_qp_in, qpin, pas); 14020fb2ed66Smajd@mellanox.com memcpy(pas, qp_pas, rq_pas_size); 14030fb2ed66Smajd@mellanox.com 1404333fbaa0SLeon Romanovsky err = mlx5_core_create_rq_tracked(dev, in, inlen, &rq->base.mqp); 14050fb2ed66Smajd@mellanox.com 14060fb2ed66Smajd@mellanox.com kvfree(in); 14070fb2ed66Smajd@mellanox.com 14080fb2ed66Smajd@mellanox.com return err; 14090fb2ed66Smajd@mellanox.com } 14100fb2ed66Smajd@mellanox.com 14110fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp_rq(struct mlx5_ib_dev *dev, 14120fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq) 14130fb2ed66Smajd@mellanox.com { 1414333fbaa0SLeon Romanovsky mlx5_core_destroy_rq_tracked(dev, &rq->base.mqp); 14150fb2ed66Smajd@mellanox.com } 14160fb2ed66Smajd@mellanox.com 14170042f9e4SMark Bloch static void destroy_raw_packet_qp_tir(struct mlx5_ib_dev *dev, 14180042f9e4SMark Bloch struct mlx5_ib_rq *rq, 1419443c1cf9SYishai Hadas u32 qp_flags_en, 1420443c1cf9SYishai Hadas struct ib_pd *pd) 14210042f9e4SMark Bloch { 14220042f9e4SMark Bloch if (qp_flags_en & (MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC | 14230042f9e4SMark Bloch MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC)) 14240042f9e4SMark Bloch mlx5_ib_disable_lb(dev, false, true); 1425443c1cf9SYishai Hadas mlx5_cmd_destroy_tir(dev->mdev, rq->tirn, to_mpd(pd)->uid); 14260042f9e4SMark Bloch } 14270042f9e4SMark Bloch 14280fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_tir(struct mlx5_ib_dev *dev, 1429f95ef6cbSMaor Gottlieb struct mlx5_ib_rq *rq, u32 tdn, 1430e0b4b472SLeon Romanovsky u32 *qp_flags_en, struct ib_pd *pd, 1431e0b4b472SLeon Romanovsky u32 *out) 14320fb2ed66Smajd@mellanox.com { 1433175edba8SMark Bloch u8 lb_flag = 0; 14340fb2ed66Smajd@mellanox.com u32 *in; 14350fb2ed66Smajd@mellanox.com void *tirc; 14360fb2ed66Smajd@mellanox.com int inlen; 14370fb2ed66Smajd@mellanox.com int err; 14380fb2ed66Smajd@mellanox.com 14390fb2ed66Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(create_tir_in); 14401b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 14410fb2ed66Smajd@mellanox.com if (!in) 14420fb2ed66Smajd@mellanox.com return -ENOMEM; 14430fb2ed66Smajd@mellanox.com 1444443c1cf9SYishai Hadas MLX5_SET(create_tir_in, in, uid, to_mpd(pd)->uid); 14450fb2ed66Smajd@mellanox.com tirc = MLX5_ADDR_OF(create_tir_in, in, ctx); 14460fb2ed66Smajd@mellanox.com MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_DIRECT); 14470fb2ed66Smajd@mellanox.com MLX5_SET(tirc, tirc, inline_rqn, rq->base.mqp.qpn); 14480fb2ed66Smajd@mellanox.com MLX5_SET(tirc, tirc, transport_domain, tdn); 1449175edba8SMark Bloch if (*qp_flags_en & MLX5_QP_FLAG_TUNNEL_OFFLOADS) 1450f95ef6cbSMaor Gottlieb MLX5_SET(tirc, tirc, tunneled_offload_en, 1); 14510fb2ed66Smajd@mellanox.com 1452175edba8SMark Bloch if (*qp_flags_en & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC) 1453175edba8SMark Bloch lb_flag |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST; 1454175edba8SMark Bloch 1455175edba8SMark Bloch if (*qp_flags_en & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC) 1456175edba8SMark Bloch lb_flag |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST; 1457175edba8SMark Bloch 14586a4d00beSMark Bloch if (dev->is_rep) { 1459175edba8SMark Bloch lb_flag |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST; 1460175edba8SMark Bloch *qp_flags_en |= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC; 1461175edba8SMark Bloch } 1462175edba8SMark Bloch 1463175edba8SMark Bloch MLX5_SET(tirc, tirc, self_lb_block, lb_flag); 1464e0b4b472SLeon Romanovsky MLX5_SET(create_tir_in, in, opcode, MLX5_CMD_OP_CREATE_TIR); 1465e0b4b472SLeon Romanovsky err = mlx5_cmd_exec_inout(dev->mdev, create_tir, in, out); 14661f1d6abbSAriel Levkovich rq->tirn = MLX5_GET(create_tir_out, out, tirn); 14670042f9e4SMark Bloch if (!err && MLX5_GET(tirc, tirc, self_lb_block)) { 14680042f9e4SMark Bloch err = mlx5_ib_enable_lb(dev, false, true); 14690042f9e4SMark Bloch 14700042f9e4SMark Bloch if (err) 1471443c1cf9SYishai Hadas destroy_raw_packet_qp_tir(dev, rq, 0, pd); 14720042f9e4SMark Bloch } 14730fb2ed66Smajd@mellanox.com kvfree(in); 14740fb2ed66Smajd@mellanox.com 14750fb2ed66Smajd@mellanox.com return err; 14760fb2ed66Smajd@mellanox.com } 14770fb2ed66Smajd@mellanox.com 14780fb2ed66Smajd@mellanox.com static int create_raw_packet_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 14792c292dbbSBoris Pismenny u32 *in, size_t inlen, 14807f72052cSYishai Hadas struct ib_pd *pd, 14817f72052cSYishai Hadas struct ib_udata *udata, 14827f72052cSYishai Hadas struct mlx5_ib_create_qp_resp *resp) 14830fb2ed66Smajd@mellanox.com { 14840fb2ed66Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 14850fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 14860fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 148789944450SShamir Rabinovitch struct mlx5_ib_ucontext *mucontext = rdma_udata_to_drv_context( 148889944450SShamir Rabinovitch udata, struct mlx5_ib_ucontext, ibucontext); 14890fb2ed66Smajd@mellanox.com int err; 14900fb2ed66Smajd@mellanox.com u32 tdn = mucontext->tdn; 14917f72052cSYishai Hadas u16 uid = to_mpd(pd)->uid; 14921f1d6abbSAriel Levkovich u32 out[MLX5_ST_SZ_DW(create_tir_out)] = {}; 14930fb2ed66Smajd@mellanox.com 14940fb2ed66Smajd@mellanox.com if (qp->sq.wqe_cnt) { 14951cd6dbd3SYishai Hadas err = create_raw_packet_qp_tis(dev, qp, sq, tdn, pd); 14960fb2ed66Smajd@mellanox.com if (err) 14970fb2ed66Smajd@mellanox.com return err; 14980fb2ed66Smajd@mellanox.com 1499b0ea0fa5SJason Gunthorpe err = create_raw_packet_qp_sq(dev, udata, sq, in, pd); 15000fb2ed66Smajd@mellanox.com if (err) 15010fb2ed66Smajd@mellanox.com goto err_destroy_tis; 15020fb2ed66Smajd@mellanox.com 15037f72052cSYishai Hadas if (uid) { 15047f72052cSYishai Hadas resp->tisn = sq->tisn; 15057f72052cSYishai Hadas resp->comp_mask |= MLX5_IB_CREATE_QP_RESP_MASK_TISN; 15067f72052cSYishai Hadas resp->sqn = sq->base.mqp.qpn; 15077f72052cSYishai Hadas resp->comp_mask |= MLX5_IB_CREATE_QP_RESP_MASK_SQN; 15087f72052cSYishai Hadas } 15097f72052cSYishai Hadas 15100fb2ed66Smajd@mellanox.com sq->base.container_mibqp = qp; 15111d31e9c0SMajd Dibbiny sq->base.mqp.event = mlx5_ib_qp_event; 15120fb2ed66Smajd@mellanox.com } 15130fb2ed66Smajd@mellanox.com 15140fb2ed66Smajd@mellanox.com if (qp->rq.wqe_cnt) { 1515358e42eaSMajd Dibbiny rq->base.container_mibqp = qp; 1516358e42eaSMajd Dibbiny 15172be08c30SLeon Romanovsky if (qp->flags & IB_QP_CREATE_CVLAN_STRIPPING) 1518e4cc4fa7SNoa Osherovich rq->flags |= MLX5_IB_RQ_CVLAN_STRIPPING; 15192be08c30SLeon Romanovsky if (qp->flags & IB_QP_CREATE_PCI_WRITE_END_PADDING) 1520b1383aa6SNoa Osherovich rq->flags |= MLX5_IB_RQ_PCI_WRITE_END_PADDING; 152134d57585SYishai Hadas err = create_raw_packet_qp_rq(dev, rq, in, inlen, pd); 15220fb2ed66Smajd@mellanox.com if (err) 15230fb2ed66Smajd@mellanox.com goto err_destroy_sq; 15240fb2ed66Smajd@mellanox.com 1525e0b4b472SLeon Romanovsky err = create_raw_packet_qp_tir(dev, rq, tdn, &qp->flags_en, pd, 1526e0b4b472SLeon Romanovsky out); 15270fb2ed66Smajd@mellanox.com if (err) 15280fb2ed66Smajd@mellanox.com goto err_destroy_rq; 15297f72052cSYishai Hadas 15307f72052cSYishai Hadas if (uid) { 15317f72052cSYishai Hadas resp->rqn = rq->base.mqp.qpn; 15327f72052cSYishai Hadas resp->comp_mask |= MLX5_IB_CREATE_QP_RESP_MASK_RQN; 15337f72052cSYishai Hadas resp->tirn = rq->tirn; 15347f72052cSYishai Hadas resp->comp_mask |= MLX5_IB_CREATE_QP_RESP_MASK_TIRN; 15351f1d6abbSAriel Levkovich if (MLX5_CAP_FLOWTABLE_NIC_RX(dev->mdev, sw_owner)) { 15361f1d6abbSAriel Levkovich resp->tir_icm_addr = MLX5_GET( 15371f1d6abbSAriel Levkovich create_tir_out, out, icm_address_31_0); 15381f1d6abbSAriel Levkovich resp->tir_icm_addr |= 15391f1d6abbSAriel Levkovich (u64)MLX5_GET(create_tir_out, out, 15401f1d6abbSAriel Levkovich icm_address_39_32) 15411f1d6abbSAriel Levkovich << 32; 15421f1d6abbSAriel Levkovich resp->tir_icm_addr |= 15431f1d6abbSAriel Levkovich (u64)MLX5_GET(create_tir_out, out, 15441f1d6abbSAriel Levkovich icm_address_63_40) 15451f1d6abbSAriel Levkovich << 40; 15461f1d6abbSAriel Levkovich resp->comp_mask |= 15471f1d6abbSAriel Levkovich MLX5_IB_CREATE_QP_RESP_MASK_TIR_ICM_ADDR; 15481f1d6abbSAriel Levkovich } 15497f72052cSYishai Hadas } 15500fb2ed66Smajd@mellanox.com } 15510fb2ed66Smajd@mellanox.com 15520fb2ed66Smajd@mellanox.com qp->trans_qp.base.mqp.qpn = qp->sq.wqe_cnt ? sq->base.mqp.qpn : 15530fb2ed66Smajd@mellanox.com rq->base.mqp.qpn; 15547f72052cSYishai Hadas err = ib_copy_to_udata(udata, resp, min(udata->outlen, sizeof(*resp))); 15557f72052cSYishai Hadas if (err) 15567f72052cSYishai Hadas goto err_destroy_tir; 15570fb2ed66Smajd@mellanox.com 15580fb2ed66Smajd@mellanox.com return 0; 15590fb2ed66Smajd@mellanox.com 15607f72052cSYishai Hadas err_destroy_tir: 15617f72052cSYishai Hadas destroy_raw_packet_qp_tir(dev, rq, qp->flags_en, pd); 15620fb2ed66Smajd@mellanox.com err_destroy_rq: 15630fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_rq(dev, rq); 15640fb2ed66Smajd@mellanox.com err_destroy_sq: 15650fb2ed66Smajd@mellanox.com if (!qp->sq.wqe_cnt) 15660fb2ed66Smajd@mellanox.com return err; 15670fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_sq(dev, sq); 15680fb2ed66Smajd@mellanox.com err_destroy_tis: 15691cd6dbd3SYishai Hadas destroy_raw_packet_qp_tis(dev, sq, pd); 15700fb2ed66Smajd@mellanox.com 15710fb2ed66Smajd@mellanox.com return err; 15720fb2ed66Smajd@mellanox.com } 15730fb2ed66Smajd@mellanox.com 15740fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp(struct mlx5_ib_dev *dev, 15750fb2ed66Smajd@mellanox.com struct mlx5_ib_qp *qp) 15760fb2ed66Smajd@mellanox.com { 15770fb2ed66Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 15780fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 15790fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 15800fb2ed66Smajd@mellanox.com 15810fb2ed66Smajd@mellanox.com if (qp->rq.wqe_cnt) { 1582443c1cf9SYishai Hadas destroy_raw_packet_qp_tir(dev, rq, qp->flags_en, qp->ibqp.pd); 15830fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_rq(dev, rq); 15840fb2ed66Smajd@mellanox.com } 15850fb2ed66Smajd@mellanox.com 15860fb2ed66Smajd@mellanox.com if (qp->sq.wqe_cnt) { 15870fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_sq(dev, sq); 15881cd6dbd3SYishai Hadas destroy_raw_packet_qp_tis(dev, sq, qp->ibqp.pd); 15890fb2ed66Smajd@mellanox.com } 15900fb2ed66Smajd@mellanox.com } 15910fb2ed66Smajd@mellanox.com 15920fb2ed66Smajd@mellanox.com static void raw_packet_qp_copy_info(struct mlx5_ib_qp *qp, 15930fb2ed66Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp) 15940fb2ed66Smajd@mellanox.com { 15950fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 15960fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 15970fb2ed66Smajd@mellanox.com 15980fb2ed66Smajd@mellanox.com sq->sq = &qp->sq; 15990fb2ed66Smajd@mellanox.com rq->rq = &qp->rq; 16000fb2ed66Smajd@mellanox.com sq->doorbell = &qp->db; 16010fb2ed66Smajd@mellanox.com rq->doorbell = &qp->db; 16020fb2ed66Smajd@mellanox.com } 16030fb2ed66Smajd@mellanox.com 160428d61370SYishai Hadas static void destroy_rss_raw_qp_tir(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp) 160528d61370SYishai Hadas { 16060042f9e4SMark Bloch if (qp->flags_en & (MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC | 16070042f9e4SMark Bloch MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC)) 16080042f9e4SMark Bloch mlx5_ib_disable_lb(dev, false, true); 1609443c1cf9SYishai Hadas mlx5_cmd_destroy_tir(dev->mdev, qp->rss_qp.tirn, 1610443c1cf9SYishai Hadas to_mpd(qp->ibqp.pd)->uid); 161128d61370SYishai Hadas } 161228d61370SYishai Hadas 1613f78d358cSLeon Romanovsky struct mlx5_create_qp_params { 1614f78d358cSLeon Romanovsky struct ib_udata *udata; 1615f78d358cSLeon Romanovsky size_t inlen; 1616f78d358cSLeon Romanovsky void *ucmd; 1617f78d358cSLeon Romanovsky u8 is_rss_raw : 1; 1618f78d358cSLeon Romanovsky struct ib_qp_init_attr *attr; 1619f78d358cSLeon Romanovsky u32 uidx; 1620f78d358cSLeon Romanovsky }; 1621f78d358cSLeon Romanovsky 1622f78d358cSLeon Romanovsky static int create_rss_raw_qp_tir(struct mlx5_ib_dev *dev, struct ib_pd *pd, 1623f78d358cSLeon Romanovsky struct mlx5_ib_qp *qp, 1624f78d358cSLeon Romanovsky struct mlx5_create_qp_params *params) 162528d61370SYishai Hadas { 1626f78d358cSLeon Romanovsky struct ib_qp_init_attr *init_attr = params->attr; 1627f78d358cSLeon Romanovsky struct mlx5_ib_create_qp_rss *ucmd = params->ucmd; 1628f78d358cSLeon Romanovsky struct ib_udata *udata = params->udata; 162989944450SShamir Rabinovitch struct mlx5_ib_ucontext *mucontext = rdma_udata_to_drv_context( 163089944450SShamir Rabinovitch udata, struct mlx5_ib_ucontext, ibucontext); 163128d61370SYishai Hadas struct mlx5_ib_create_qp_resp resp = {}; 163228d61370SYishai Hadas int inlen; 16331f1d6abbSAriel Levkovich int outlen; 163428d61370SYishai Hadas int err; 163528d61370SYishai Hadas u32 *in; 16361f1d6abbSAriel Levkovich u32 *out; 163728d61370SYishai Hadas void *tirc; 163828d61370SYishai Hadas void *hfso; 163928d61370SYishai Hadas u32 selected_fields = 0; 16402d93fc85SMatan Barak u32 outer_l4; 164128d61370SYishai Hadas size_t min_resp_len; 164228d61370SYishai Hadas u32 tdn = mucontext->tdn; 1643175edba8SMark Bloch u8 lb_flag = 0; 164428d61370SYishai Hadas 1645f78d358cSLeon Romanovsky min_resp_len = 1646f78d358cSLeon Romanovsky offsetof(typeof(resp), bfreg_index) + sizeof(resp.bfreg_index); 164728d61370SYishai Hadas if (udata->outlen < min_resp_len) 164828d61370SYishai Hadas return -EINVAL; 164928d61370SYishai Hadas 16505ce0592bSLeon Romanovsky if (ucmd->comp_mask) { 165128d61370SYishai Hadas mlx5_ib_dbg(dev, "invalid comp mask\n"); 165228d61370SYishai Hadas return -EOPNOTSUPP; 165328d61370SYishai Hadas } 165428d61370SYishai Hadas 16555ce0592bSLeon Romanovsky if (ucmd->flags & ~(MLX5_QP_FLAG_TUNNEL_OFFLOADS | 1656175edba8SMark Bloch MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC | 1657175edba8SMark Bloch MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC)) { 1658f95ef6cbSMaor Gottlieb mlx5_ib_dbg(dev, "invalid flags\n"); 1659f95ef6cbSMaor Gottlieb return -EOPNOTSUPP; 1660f95ef6cbSMaor Gottlieb } 1661f95ef6cbSMaor Gottlieb 16625ce0592bSLeon Romanovsky if (ucmd->rx_hash_fields_mask & MLX5_RX_HASH_INNER && 16635ce0592bSLeon Romanovsky !(ucmd->flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS)) { 1664309fa347SMaor Gottlieb mlx5_ib_dbg(dev, "Tunnel offloads must be set for inner RSS\n"); 1665309fa347SMaor Gottlieb return -EOPNOTSUPP; 1666309fa347SMaor Gottlieb } 1667309fa347SMaor Gottlieb 166837518fa4SLeon Romanovsky if (dev->is_rep) 1669175edba8SMark Bloch qp->flags_en |= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC; 1670175edba8SMark Bloch 167137518fa4SLeon Romanovsky if (qp->flags_en & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC) 167237518fa4SLeon Romanovsky lb_flag |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST; 167337518fa4SLeon Romanovsky 167437518fa4SLeon Romanovsky if (qp->flags_en & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC) 1675175edba8SMark Bloch lb_flag |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST; 1676175edba8SMark Bloch 167741d902cbSJason Gunthorpe err = ib_copy_to_udata(udata, &resp, min(udata->outlen, sizeof(resp))); 167828d61370SYishai Hadas if (err) { 167928d61370SYishai Hadas mlx5_ib_dbg(dev, "copy failed\n"); 168028d61370SYishai Hadas return -EINVAL; 168128d61370SYishai Hadas } 168228d61370SYishai Hadas 168328d61370SYishai Hadas inlen = MLX5_ST_SZ_BYTES(create_tir_in); 16841f1d6abbSAriel Levkovich outlen = MLX5_ST_SZ_BYTES(create_tir_out); 16851f1d6abbSAriel Levkovich in = kvzalloc(inlen + outlen, GFP_KERNEL); 168628d61370SYishai Hadas if (!in) 168728d61370SYishai Hadas return -ENOMEM; 168828d61370SYishai Hadas 16891f1d6abbSAriel Levkovich out = in + MLX5_ST_SZ_DW(create_tir_in); 1690443c1cf9SYishai Hadas MLX5_SET(create_tir_in, in, uid, to_mpd(pd)->uid); 169128d61370SYishai Hadas tirc = MLX5_ADDR_OF(create_tir_in, in, ctx); 169228d61370SYishai Hadas MLX5_SET(tirc, tirc, disp_type, 169328d61370SYishai Hadas MLX5_TIRC_DISP_TYPE_INDIRECT); 169428d61370SYishai Hadas MLX5_SET(tirc, tirc, indirect_table, 169528d61370SYishai Hadas init_attr->rwq_ind_tbl->ind_tbl_num); 169628d61370SYishai Hadas MLX5_SET(tirc, tirc, transport_domain, tdn); 169728d61370SYishai Hadas 169828d61370SYishai Hadas hfso = MLX5_ADDR_OF(tirc, tirc, rx_hash_field_selector_outer); 1699f95ef6cbSMaor Gottlieb 17005ce0592bSLeon Romanovsky if (ucmd->flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS) 1701f95ef6cbSMaor Gottlieb MLX5_SET(tirc, tirc, tunneled_offload_en, 1); 1702f95ef6cbSMaor Gottlieb 1703175edba8SMark Bloch MLX5_SET(tirc, tirc, self_lb_block, lb_flag); 1704175edba8SMark Bloch 17055ce0592bSLeon Romanovsky if (ucmd->rx_hash_fields_mask & MLX5_RX_HASH_INNER) 1706309fa347SMaor Gottlieb hfso = MLX5_ADDR_OF(tirc, tirc, rx_hash_field_selector_inner); 1707309fa347SMaor Gottlieb else 1708309fa347SMaor Gottlieb hfso = MLX5_ADDR_OF(tirc, tirc, rx_hash_field_selector_outer); 1709309fa347SMaor Gottlieb 17105ce0592bSLeon Romanovsky switch (ucmd->rx_hash_function) { 171128d61370SYishai Hadas case MLX5_RX_HASH_FUNC_TOEPLITZ: 171228d61370SYishai Hadas { 171328d61370SYishai Hadas void *rss_key = MLX5_ADDR_OF(tirc, tirc, rx_hash_toeplitz_key); 171428d61370SYishai Hadas size_t len = MLX5_FLD_SZ_BYTES(tirc, rx_hash_toeplitz_key); 171528d61370SYishai Hadas 17165ce0592bSLeon Romanovsky if (len != ucmd->rx_key_len) { 171728d61370SYishai Hadas err = -EINVAL; 171828d61370SYishai Hadas goto err; 171928d61370SYishai Hadas } 172028d61370SYishai Hadas 172128d61370SYishai Hadas MLX5_SET(tirc, tirc, rx_hash_fn, MLX5_RX_HASH_FN_TOEPLITZ); 17225ce0592bSLeon Romanovsky memcpy(rss_key, ucmd->rx_hash_key, len); 172328d61370SYishai Hadas break; 172428d61370SYishai Hadas } 172528d61370SYishai Hadas default: 172628d61370SYishai Hadas err = -EOPNOTSUPP; 172728d61370SYishai Hadas goto err; 172828d61370SYishai Hadas } 172928d61370SYishai Hadas 17305ce0592bSLeon Romanovsky if (!ucmd->rx_hash_fields_mask) { 173128d61370SYishai Hadas /* special case when this TIR serves as steering entry without hashing */ 173228d61370SYishai Hadas if (!init_attr->rwq_ind_tbl->log_ind_tbl_size) 173328d61370SYishai Hadas goto create_tir; 173428d61370SYishai Hadas err = -EINVAL; 173528d61370SYishai Hadas goto err; 173628d61370SYishai Hadas } 173728d61370SYishai Hadas 17385ce0592bSLeon Romanovsky if (((ucmd->rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV4) || 17395ce0592bSLeon Romanovsky (ucmd->rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV4)) && 17405ce0592bSLeon Romanovsky ((ucmd->rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV6) || 17415ce0592bSLeon Romanovsky (ucmd->rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV6))) { 174228d61370SYishai Hadas err = -EINVAL; 174328d61370SYishai Hadas goto err; 174428d61370SYishai Hadas } 174528d61370SYishai Hadas 174628d61370SYishai Hadas /* If none of IPV4 & IPV6 SRC/DST was set - this bit field is ignored */ 17475ce0592bSLeon Romanovsky if ((ucmd->rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV4) || 17485ce0592bSLeon Romanovsky (ucmd->rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV4)) 174928d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, l3_prot_type, 175028d61370SYishai Hadas MLX5_L3_PROT_TYPE_IPV4); 17515ce0592bSLeon Romanovsky else if ((ucmd->rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV6) || 17525ce0592bSLeon Romanovsky (ucmd->rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV6)) 175328d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, l3_prot_type, 175428d61370SYishai Hadas MLX5_L3_PROT_TYPE_IPV6); 175528d61370SYishai Hadas 17565ce0592bSLeon Romanovsky outer_l4 = ((ucmd->rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_TCP) || 17575ce0592bSLeon Romanovsky (ucmd->rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_TCP)) 17585ce0592bSLeon Romanovsky << 0 | 17595ce0592bSLeon Romanovsky ((ucmd->rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_UDP) || 17605ce0592bSLeon Romanovsky (ucmd->rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_UDP)) 17615ce0592bSLeon Romanovsky << 1 | 17625ce0592bSLeon Romanovsky (ucmd->rx_hash_fields_mask & MLX5_RX_HASH_IPSEC_SPI) << 2; 17632d93fc85SMatan Barak 17642d93fc85SMatan Barak /* Check that only one l4 protocol is set */ 17652d93fc85SMatan Barak if (outer_l4 & (outer_l4 - 1)) { 176628d61370SYishai Hadas err = -EINVAL; 176728d61370SYishai Hadas goto err; 176828d61370SYishai Hadas } 176928d61370SYishai Hadas 177028d61370SYishai Hadas /* If none of TCP & UDP SRC/DST was set - this bit field is ignored */ 17715ce0592bSLeon Romanovsky if ((ucmd->rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_TCP) || 17725ce0592bSLeon Romanovsky (ucmd->rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_TCP)) 177328d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, l4_prot_type, 177428d61370SYishai Hadas MLX5_L4_PROT_TYPE_TCP); 17755ce0592bSLeon Romanovsky else if ((ucmd->rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_UDP) || 17765ce0592bSLeon Romanovsky (ucmd->rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_UDP)) 177728d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, l4_prot_type, 177828d61370SYishai Hadas MLX5_L4_PROT_TYPE_UDP); 177928d61370SYishai Hadas 17805ce0592bSLeon Romanovsky if ((ucmd->rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV4) || 17815ce0592bSLeon Romanovsky (ucmd->rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV6)) 178228d61370SYishai Hadas selected_fields |= MLX5_HASH_FIELD_SEL_SRC_IP; 178328d61370SYishai Hadas 17845ce0592bSLeon Romanovsky if ((ucmd->rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV4) || 17855ce0592bSLeon Romanovsky (ucmd->rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV6)) 178628d61370SYishai Hadas selected_fields |= MLX5_HASH_FIELD_SEL_DST_IP; 178728d61370SYishai Hadas 17885ce0592bSLeon Romanovsky if ((ucmd->rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_TCP) || 17895ce0592bSLeon Romanovsky (ucmd->rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_UDP)) 179028d61370SYishai Hadas selected_fields |= MLX5_HASH_FIELD_SEL_L4_SPORT; 179128d61370SYishai Hadas 17925ce0592bSLeon Romanovsky if ((ucmd->rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_TCP) || 17935ce0592bSLeon Romanovsky (ucmd->rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_UDP)) 179428d61370SYishai Hadas selected_fields |= MLX5_HASH_FIELD_SEL_L4_DPORT; 179528d61370SYishai Hadas 17965ce0592bSLeon Romanovsky if (ucmd->rx_hash_fields_mask & MLX5_RX_HASH_IPSEC_SPI) 17972d93fc85SMatan Barak selected_fields |= MLX5_HASH_FIELD_SEL_IPSEC_SPI; 17982d93fc85SMatan Barak 179928d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, selected_fields, selected_fields); 180028d61370SYishai Hadas 180128d61370SYishai Hadas create_tir: 1802e0b4b472SLeon Romanovsky MLX5_SET(create_tir_in, in, opcode, MLX5_CMD_OP_CREATE_TIR); 1803e0b4b472SLeon Romanovsky err = mlx5_cmd_exec_inout(dev->mdev, create_tir, in, out); 180428d61370SYishai Hadas 18051f1d6abbSAriel Levkovich qp->rss_qp.tirn = MLX5_GET(create_tir_out, out, tirn); 18060042f9e4SMark Bloch if (!err && MLX5_GET(tirc, tirc, self_lb_block)) { 18070042f9e4SMark Bloch err = mlx5_ib_enable_lb(dev, false, true); 18080042f9e4SMark Bloch 18090042f9e4SMark Bloch if (err) 1810443c1cf9SYishai Hadas mlx5_cmd_destroy_tir(dev->mdev, qp->rss_qp.tirn, 1811443c1cf9SYishai Hadas to_mpd(pd)->uid); 18120042f9e4SMark Bloch } 18130042f9e4SMark Bloch 181428d61370SYishai Hadas if (err) 181528d61370SYishai Hadas goto err; 181628d61370SYishai Hadas 18177f72052cSYishai Hadas if (mucontext->devx_uid) { 18187f72052cSYishai Hadas resp.comp_mask |= MLX5_IB_CREATE_QP_RESP_MASK_TIRN; 18197f72052cSYishai Hadas resp.tirn = qp->rss_qp.tirn; 18201f1d6abbSAriel Levkovich if (MLX5_CAP_FLOWTABLE_NIC_RX(dev->mdev, sw_owner)) { 18211f1d6abbSAriel Levkovich resp.tir_icm_addr = 18221f1d6abbSAriel Levkovich MLX5_GET(create_tir_out, out, icm_address_31_0); 18231f1d6abbSAriel Levkovich resp.tir_icm_addr |= (u64)MLX5_GET(create_tir_out, out, 18241f1d6abbSAriel Levkovich icm_address_39_32) 18251f1d6abbSAriel Levkovich << 32; 18261f1d6abbSAriel Levkovich resp.tir_icm_addr |= (u64)MLX5_GET(create_tir_out, out, 18271f1d6abbSAriel Levkovich icm_address_63_40) 18281f1d6abbSAriel Levkovich << 40; 18291f1d6abbSAriel Levkovich resp.comp_mask |= 18301f1d6abbSAriel Levkovich MLX5_IB_CREATE_QP_RESP_MASK_TIR_ICM_ADDR; 18311f1d6abbSAriel Levkovich } 18327f72052cSYishai Hadas } 18337f72052cSYishai Hadas 18347f72052cSYishai Hadas err = ib_copy_to_udata(udata, &resp, min(udata->outlen, sizeof(resp))); 18357f72052cSYishai Hadas if (err) 18367f72052cSYishai Hadas goto err_copy; 18377f72052cSYishai Hadas 183828d61370SYishai Hadas kvfree(in); 183928d61370SYishai Hadas /* qpn is reserved for that QP */ 184028d61370SYishai Hadas qp->trans_qp.base.mqp.qpn = 0; 18412be08c30SLeon Romanovsky qp->is_rss = true; 184228d61370SYishai Hadas return 0; 184328d61370SYishai Hadas 18447f72052cSYishai Hadas err_copy: 18457f72052cSYishai Hadas mlx5_cmd_destroy_tir(dev->mdev, qp->rss_qp.tirn, mucontext->devx_uid); 184628d61370SYishai Hadas err: 184728d61370SYishai Hadas kvfree(in); 184828d61370SYishai Hadas return err; 184928d61370SYishai Hadas } 185028d61370SYishai Hadas 18515d6ff1baSYonatan Cohen static void configure_requester_scat_cqe(struct mlx5_ib_dev *dev, 18525d6ff1baSYonatan Cohen struct ib_qp_init_attr *init_attr, 18536f4bc0eaSYonatan Cohen struct mlx5_ib_create_qp *ucmd, 18545d6ff1baSYonatan Cohen void *qpc) 18555d6ff1baSYonatan Cohen { 18565d6ff1baSYonatan Cohen int scqe_sz; 18572ab367a7Szhengbin bool allow_scat_cqe = false; 18585d6ff1baSYonatan Cohen 18596f4bc0eaSYonatan Cohen if (ucmd) 18606f4bc0eaSYonatan Cohen allow_scat_cqe = ucmd->flags & MLX5_QP_FLAG_ALLOW_SCATTER_CQE; 18616f4bc0eaSYonatan Cohen 18626f4bc0eaSYonatan Cohen if (!allow_scat_cqe && init_attr->sq_sig_type != IB_SIGNAL_ALL_WR) 18635d6ff1baSYonatan Cohen return; 18645d6ff1baSYonatan Cohen 18655d6ff1baSYonatan Cohen scqe_sz = mlx5_ib_get_cqe_size(init_attr->send_cq); 18665d6ff1baSYonatan Cohen if (scqe_sz == 128) { 18675d6ff1baSYonatan Cohen MLX5_SET(qpc, qpc, cs_req, MLX5_REQ_SCAT_DATA64_CQE); 18685d6ff1baSYonatan Cohen return; 18695d6ff1baSYonatan Cohen } 18705d6ff1baSYonatan Cohen 18715d6ff1baSYonatan Cohen if (init_attr->qp_type != MLX5_IB_QPT_DCI || 18725d6ff1baSYonatan Cohen MLX5_CAP_GEN(dev->mdev, dc_req_scat_data_cqe)) 18735d6ff1baSYonatan Cohen MLX5_SET(qpc, qpc, cs_req, MLX5_REQ_SCAT_DATA32_CQE); 18745d6ff1baSYonatan Cohen } 18755d6ff1baSYonatan Cohen 1876a60109dcSYonatan Cohen static int atomic_size_to_mode(int size_mask) 1877a60109dcSYonatan Cohen { 1878a60109dcSYonatan Cohen /* driver does not support atomic_size > 256B 1879a60109dcSYonatan Cohen * and does not know how to translate bigger sizes 1880a60109dcSYonatan Cohen */ 1881a60109dcSYonatan Cohen int supported_size_mask = size_mask & 0x1ff; 1882a60109dcSYonatan Cohen int log_max_size; 1883a60109dcSYonatan Cohen 1884a60109dcSYonatan Cohen if (!supported_size_mask) 1885a60109dcSYonatan Cohen return -EOPNOTSUPP; 1886a60109dcSYonatan Cohen 1887a60109dcSYonatan Cohen log_max_size = __fls(supported_size_mask); 1888a60109dcSYonatan Cohen 1889a60109dcSYonatan Cohen if (log_max_size > 3) 1890a60109dcSYonatan Cohen return log_max_size; 1891a60109dcSYonatan Cohen 1892a60109dcSYonatan Cohen return MLX5_ATOMIC_MODE_8B; 1893a60109dcSYonatan Cohen } 1894a60109dcSYonatan Cohen 1895a60109dcSYonatan Cohen static int get_atomic_mode(struct mlx5_ib_dev *dev, 1896a60109dcSYonatan Cohen enum ib_qp_type qp_type) 1897a60109dcSYonatan Cohen { 1898a60109dcSYonatan Cohen u8 atomic_operations = MLX5_CAP_ATOMIC(dev->mdev, atomic_operations); 1899a60109dcSYonatan Cohen u8 atomic = MLX5_CAP_GEN(dev->mdev, atomic); 1900a60109dcSYonatan Cohen int atomic_mode = -EOPNOTSUPP; 1901a60109dcSYonatan Cohen int atomic_size_mask; 1902a60109dcSYonatan Cohen 1903a60109dcSYonatan Cohen if (!atomic) 1904a60109dcSYonatan Cohen return -EOPNOTSUPP; 1905a60109dcSYonatan Cohen 1906a60109dcSYonatan Cohen if (qp_type == MLX5_IB_QPT_DCT) 1907a60109dcSYonatan Cohen atomic_size_mask = MLX5_CAP_ATOMIC(dev->mdev, atomic_size_dc); 1908a60109dcSYonatan Cohen else 1909a60109dcSYonatan Cohen atomic_size_mask = MLX5_CAP_ATOMIC(dev->mdev, atomic_size_qp); 1910a60109dcSYonatan Cohen 1911a60109dcSYonatan Cohen if ((atomic_operations & MLX5_ATOMIC_OPS_EXTENDED_CMP_SWAP) || 1912a60109dcSYonatan Cohen (atomic_operations & MLX5_ATOMIC_OPS_EXTENDED_FETCH_ADD)) 1913a60109dcSYonatan Cohen atomic_mode = atomic_size_to_mode(atomic_size_mask); 1914a60109dcSYonatan Cohen 1915a60109dcSYonatan Cohen if (atomic_mode <= 0 && 1916a60109dcSYonatan Cohen (atomic_operations & MLX5_ATOMIC_OPS_CMP_SWAP && 1917a60109dcSYonatan Cohen atomic_operations & MLX5_ATOMIC_OPS_FETCH_ADD)) 1918a60109dcSYonatan Cohen atomic_mode = MLX5_ATOMIC_MODE_IB_COMP; 1919a60109dcSYonatan Cohen 1920a60109dcSYonatan Cohen return atomic_mode; 1921a60109dcSYonatan Cohen } 1922a60109dcSYonatan Cohen 1923f78d358cSLeon Romanovsky static int create_xrc_tgt_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 1924f78d358cSLeon Romanovsky struct mlx5_create_qp_params *params) 192504bcc1c2SLeon Romanovsky { 1926f78d358cSLeon Romanovsky struct ib_qp_init_attr *attr = params->attr; 1927f78d358cSLeon Romanovsky struct ib_udata *udata = params->udata; 1928f78d358cSLeon Romanovsky u32 uidx = params->uidx; 192904bcc1c2SLeon Romanovsky struct mlx5_ib_resources *devr = &dev->devr; 193004bcc1c2SLeon Romanovsky int inlen = MLX5_ST_SZ_BYTES(create_qp_in); 193104bcc1c2SLeon Romanovsky struct mlx5_core_dev *mdev = dev->mdev; 193204bcc1c2SLeon Romanovsky struct mlx5_ib_qp_base *base; 193304bcc1c2SLeon Romanovsky unsigned long flags; 193404bcc1c2SLeon Romanovsky void *qpc; 193504bcc1c2SLeon Romanovsky u32 *in; 193604bcc1c2SLeon Romanovsky int err; 193704bcc1c2SLeon Romanovsky 193804bcc1c2SLeon Romanovsky mutex_init(&qp->mutex); 193904bcc1c2SLeon Romanovsky 194004bcc1c2SLeon Romanovsky if (attr->sq_sig_type == IB_SIGNAL_ALL_WR) 194104bcc1c2SLeon Romanovsky qp->sq_signal_bits = MLX5_WQE_CTRL_CQ_UPDATE; 194204bcc1c2SLeon Romanovsky 194304bcc1c2SLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 194404bcc1c2SLeon Romanovsky if (!in) 194504bcc1c2SLeon Romanovsky return -ENOMEM; 194604bcc1c2SLeon Romanovsky 194704bcc1c2SLeon Romanovsky qpc = MLX5_ADDR_OF(create_qp_in, in, qpc); 194804bcc1c2SLeon Romanovsky 194904bcc1c2SLeon Romanovsky MLX5_SET(qpc, qpc, st, MLX5_QP_ST_XRC); 195004bcc1c2SLeon Romanovsky MLX5_SET(qpc, qpc, pm_state, MLX5_QP_PM_MIGRATED); 195104bcc1c2SLeon Romanovsky MLX5_SET(qpc, qpc, pd, to_mpd(devr->p0)->pdn); 195204bcc1c2SLeon Romanovsky 195304bcc1c2SLeon Romanovsky if (qp->flags & IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK) 195404bcc1c2SLeon Romanovsky MLX5_SET(qpc, qpc, block_lb_mc, 1); 195504bcc1c2SLeon Romanovsky if (qp->flags & IB_QP_CREATE_CROSS_CHANNEL) 195604bcc1c2SLeon Romanovsky MLX5_SET(qpc, qpc, cd_master, 1); 195704bcc1c2SLeon Romanovsky if (qp->flags & IB_QP_CREATE_MANAGED_SEND) 195804bcc1c2SLeon Romanovsky MLX5_SET(qpc, qpc, cd_slave_send, 1); 195904bcc1c2SLeon Romanovsky if (qp->flags & IB_QP_CREATE_MANAGED_RECV) 196004bcc1c2SLeon Romanovsky MLX5_SET(qpc, qpc, cd_slave_receive, 1); 196104bcc1c2SLeon Romanovsky 196204bcc1c2SLeon Romanovsky MLX5_SET(qpc, qpc, rq_type, MLX5_SRQ_RQ); 196304bcc1c2SLeon Romanovsky MLX5_SET(qpc, qpc, no_sq, 1); 196404bcc1c2SLeon Romanovsky MLX5_SET(qpc, qpc, cqn_rcv, to_mcq(devr->c0)->mcq.cqn); 196504bcc1c2SLeon Romanovsky MLX5_SET(qpc, qpc, cqn_snd, to_mcq(devr->c0)->mcq.cqn); 196604bcc1c2SLeon Romanovsky MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(devr->s0)->msrq.srqn); 196704bcc1c2SLeon Romanovsky MLX5_SET(qpc, qpc, xrcd, to_mxrcd(attr->xrcd)->xrcdn); 196804bcc1c2SLeon Romanovsky MLX5_SET64(qpc, qpc, dbr_addr, qp->db.dma); 196904bcc1c2SLeon Romanovsky 197004bcc1c2SLeon Romanovsky /* 0xffffff means we ask to work with cqe version 0 */ 197104bcc1c2SLeon Romanovsky if (MLX5_CAP_GEN(mdev, cqe_version) == MLX5_CQE_VERSION_V1) 197204bcc1c2SLeon Romanovsky MLX5_SET(qpc, qpc, user_index, uidx); 197304bcc1c2SLeon Romanovsky 197404bcc1c2SLeon Romanovsky if (qp->flags & IB_QP_CREATE_PCI_WRITE_END_PADDING) { 197504bcc1c2SLeon Romanovsky MLX5_SET(qpc, qpc, end_padding_mode, 197604bcc1c2SLeon Romanovsky MLX5_WQ_END_PAD_MODE_ALIGN); 197704bcc1c2SLeon Romanovsky /* Special case to clean flag */ 197804bcc1c2SLeon Romanovsky qp->flags &= ~IB_QP_CREATE_PCI_WRITE_END_PADDING; 197904bcc1c2SLeon Romanovsky } 198004bcc1c2SLeon Romanovsky 198104bcc1c2SLeon Romanovsky base = &qp->trans_qp.base; 198204bcc1c2SLeon Romanovsky err = mlx5_core_create_qp(dev, &base->mqp, in, inlen); 198304bcc1c2SLeon Romanovsky kvfree(in); 198404bcc1c2SLeon Romanovsky if (err) { 1985747c519cSLeon Romanovsky destroy_qp(dev, qp, base, udata); 198604bcc1c2SLeon Romanovsky return err; 198704bcc1c2SLeon Romanovsky } 198804bcc1c2SLeon Romanovsky 198904bcc1c2SLeon Romanovsky base->container_mibqp = qp; 199004bcc1c2SLeon Romanovsky base->mqp.event = mlx5_ib_qp_event; 199104bcc1c2SLeon Romanovsky 199204bcc1c2SLeon Romanovsky spin_lock_irqsave(&dev->reset_flow_resource_lock, flags); 199304bcc1c2SLeon Romanovsky list_add_tail(&qp->qps_list, &dev->qp_list); 199404bcc1c2SLeon Romanovsky spin_unlock_irqrestore(&dev->reset_flow_resource_lock, flags); 199504bcc1c2SLeon Romanovsky 199604bcc1c2SLeon Romanovsky return 0; 199704bcc1c2SLeon Romanovsky } 199804bcc1c2SLeon Romanovsky 199998fc1126SLeon Romanovsky static int create_user_qp(struct mlx5_ib_dev *dev, struct ib_pd *pd, 2000f78d358cSLeon Romanovsky struct mlx5_ib_qp *qp, 2001f78d358cSLeon Romanovsky struct mlx5_create_qp_params *params) 2002e126ba97SEli Cohen { 2003f78d358cSLeon Romanovsky struct ib_qp_init_attr *init_attr = params->attr; 2004f78d358cSLeon Romanovsky struct mlx5_ib_create_qp *ucmd = params->ucmd; 2005f78d358cSLeon Romanovsky struct ib_udata *udata = params->udata; 2006f78d358cSLeon Romanovsky u32 uidx = params->uidx; 2007e126ba97SEli Cohen struct mlx5_ib_resources *devr = &dev->devr; 200809a7d9ecSSaeed Mahameed int inlen = MLX5_ST_SZ_BYTES(create_qp_in); 2009938fe83cSSaeed Mahameed struct mlx5_core_dev *mdev = dev->mdev; 20100625b4baSJason Gunthorpe struct mlx5_ib_create_qp_resp resp = {}; 201189ea94a7SMaor Gottlieb struct mlx5_ib_cq *send_cq; 201289ea94a7SMaor Gottlieb struct mlx5_ib_cq *recv_cq; 201389ea94a7SMaor Gottlieb unsigned long flags; 201409a7d9ecSSaeed Mahameed struct mlx5_ib_qp_base *base; 2015e7b169f3SNoa Osherovich int mlx5_st; 2016cfb5e088SHaggai Abramovsky void *qpc; 201709a7d9ecSSaeed Mahameed u32 *in; 201809a7d9ecSSaeed Mahameed int err; 2019e126ba97SEli Cohen 2020e126ba97SEli Cohen mutex_init(&qp->mutex); 2021e126ba97SEli Cohen spin_lock_init(&qp->sq.lock); 2022e126ba97SEli Cohen spin_lock_init(&qp->rq.lock); 2023e126ba97SEli Cohen 20247aede1a2SLeon Romanovsky mlx5_st = to_mlx5_st(qp->type); 2025e7b169f3SNoa Osherovich if (mlx5_st < 0) 2026e7b169f3SNoa Osherovich return -EINVAL; 2027e7b169f3SNoa Osherovich 2028e126ba97SEli Cohen if (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR) 2029e126ba97SEli Cohen qp->sq_signal_bits = MLX5_WQE_CTRL_CQ_UPDATE; 2030e126ba97SEli Cohen 20312978975cSLeon Romanovsky if (qp->flags & IB_QP_CREATE_SOURCE_QPN) 20322978975cSLeon Romanovsky qp->underlay_qpn = init_attr->source_qpn; 20332978975cSLeon Romanovsky 2034c2e53b2cSYishai Hadas base = (init_attr->qp_type == IB_QPT_RAW_PACKET || 20352be08c30SLeon Romanovsky qp->flags & IB_QP_CREATE_SOURCE_QPN) ? 2036c2e53b2cSYishai Hadas &qp->raw_packet_qp.rq.base : 2037c2e53b2cSYishai Hadas &qp->trans_qp.base; 2038c2e53b2cSYishai Hadas 2039e126ba97SEli Cohen qp->has_rq = qp_has_rq(init_attr); 20402dfac92dSLeon Romanovsky err = set_rq_size(dev, &init_attr->cap, qp->has_rq, qp, ucmd); 2041e126ba97SEli Cohen if (err) { 2042e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 2043e126ba97SEli Cohen return err; 2044e126ba97SEli Cohen } 2045e126ba97SEli Cohen 20462dfac92dSLeon Romanovsky if (ucmd->rq_wqe_shift != qp->rq.wqe_shift || 204798fc1126SLeon Romanovsky ucmd->rq_wqe_count != qp->rq.wqe_cnt) 2048e126ba97SEli Cohen return -EINVAL; 2049e126ba97SEli Cohen 205098fc1126SLeon Romanovsky if (ucmd->sq_wqe_count > (1 << MLX5_CAP_GEN(mdev, log_max_qp_sz))) 205198fc1126SLeon Romanovsky return -EINVAL; 205298fc1126SLeon Romanovsky 205398fc1126SLeon Romanovsky err = _create_user_qp(dev, pd, qp, udata, init_attr, &in, &resp, &inlen, 205498fc1126SLeon Romanovsky base, ucmd); 2055e126ba97SEli Cohen if (err) 2056e126ba97SEli Cohen return err; 2057e126ba97SEli Cohen 2058e126ba97SEli Cohen if (is_sqp(init_attr->qp_type)) 2059e126ba97SEli Cohen qp->port = init_attr->port_num; 2060e126ba97SEli Cohen 206109a7d9ecSSaeed Mahameed qpc = MLX5_ADDR_OF(create_qp_in, in, qpc); 206209a7d9ecSSaeed Mahameed 2063e7b169f3SNoa Osherovich MLX5_SET(qpc, qpc, st, mlx5_st); 206409a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, pm_state, MLX5_QP_PM_MIGRATED); 206598fc1126SLeon Romanovsky MLX5_SET(qpc, qpc, pd, to_mpd(pd)->pdn); 2066e126ba97SEli Cohen 2067c95e6d53SLeon Romanovsky if (qp->flags_en & MLX5_QP_FLAG_SIGNATURE) 206809a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, wq_signature, 1); 2069e126ba97SEli Cohen 20702be08c30SLeon Romanovsky if (qp->flags & IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK) 207109a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, block_lb_mc, 1); 2072f360d88aSEli Cohen 20732be08c30SLeon Romanovsky if (qp->flags & IB_QP_CREATE_CROSS_CHANNEL) 207409a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cd_master, 1); 20752be08c30SLeon Romanovsky if (qp->flags & IB_QP_CREATE_MANAGED_SEND) 207609a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cd_slave_send, 1); 20772be08c30SLeon Romanovsky if (qp->flags & IB_QP_CREATE_MANAGED_RECV) 207809a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cd_slave_receive, 1); 20792be08c30SLeon Romanovsky if (qp->flags_en & MLX5_QP_FLAG_PACKET_BASED_CREDIT_MODE) 2080569c6651SDanit Goldberg MLX5_SET(qpc, qpc, req_e2e_credit_mode, 1); 208190ecb37aSLeon Romanovsky if ((qp->flags_en & MLX5_QP_FLAG_SCATTER_CQE) && 208290ecb37aSLeon Romanovsky (init_attr->qp_type == IB_QPT_RC || 20838bde2c50SLeon Romanovsky init_attr->qp_type == IB_QPT_UC)) { 20848bde2c50SLeon Romanovsky int rcqe_sz = rcqe_sz = 20858bde2c50SLeon Romanovsky mlx5_ib_get_cqe_size(init_attr->recv_cq); 20868bde2c50SLeon Romanovsky 20878bde2c50SLeon Romanovsky MLX5_SET(qpc, qpc, cs_res, 20888bde2c50SLeon Romanovsky rcqe_sz == 128 ? MLX5_RES_SCAT_DATA64_CQE : 20898bde2c50SLeon Romanovsky MLX5_RES_SCAT_DATA32_CQE); 20908bde2c50SLeon Romanovsky } 209190ecb37aSLeon Romanovsky if ((qp->flags_en & MLX5_QP_FLAG_SCATTER_CQE) && 20927aede1a2SLeon Romanovsky (qp->type == MLX5_IB_QPT_DCI || qp->type == IB_QPT_RC)) 20932dfac92dSLeon Romanovsky configure_requester_scat_cqe(dev, init_attr, ucmd, qpc); 2094e126ba97SEli Cohen 2095e126ba97SEli Cohen if (qp->rq.wqe_cnt) { 209609a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_rq_stride, qp->rq.wqe_shift - 4); 209709a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_rq_size, ilog2(qp->rq.wqe_cnt)); 2098e126ba97SEli Cohen } 2099e126ba97SEli Cohen 210009a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, rq_type, get_rx_type(qp, init_attr)); 2101e126ba97SEli Cohen 21023fd3307eSArtemy Kovalyov if (qp->sq.wqe_cnt) { 210309a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_sq_size, ilog2(qp->sq.wqe_cnt)); 21043fd3307eSArtemy Kovalyov } else { 210509a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, no_sq, 1); 21063fd3307eSArtemy Kovalyov if (init_attr->srq && 21073fd3307eSArtemy Kovalyov init_attr->srq->srq_type == IB_SRQT_TM) 21083fd3307eSArtemy Kovalyov MLX5_SET(qpc, qpc, offload_type, 21093fd3307eSArtemy Kovalyov MLX5_QPC_OFFLOAD_TYPE_RNDV); 21103fd3307eSArtemy Kovalyov } 2111e126ba97SEli Cohen 2112e126ba97SEli Cohen /* Set default resources */ 2113e126ba97SEli Cohen switch (init_attr->qp_type) { 2114e126ba97SEli Cohen case IB_QPT_XRC_INI: 211509a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_rcv, to_mcq(devr->c0)->mcq.cqn); 211609a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, xrcd, to_mxrcd(devr->x1)->xrcdn); 211709a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(devr->s0)->msrq.srqn); 2118e126ba97SEli Cohen break; 2119e126ba97SEli Cohen default: 2120e126ba97SEli Cohen if (init_attr->srq) { 212109a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, xrcd, to_mxrcd(devr->x0)->xrcdn); 212209a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(init_attr->srq)->msrq.srqn); 2123e126ba97SEli Cohen } else { 212409a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, xrcd, to_mxrcd(devr->x1)->xrcdn); 212509a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(devr->s1)->msrq.srqn); 2126e126ba97SEli Cohen } 2127e126ba97SEli Cohen } 2128e126ba97SEli Cohen 2129e126ba97SEli Cohen if (init_attr->send_cq) 213009a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_snd, to_mcq(init_attr->send_cq)->mcq.cqn); 2131e126ba97SEli Cohen 2132e126ba97SEli Cohen if (init_attr->recv_cq) 213309a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_rcv, to_mcq(init_attr->recv_cq)->mcq.cqn); 2134e126ba97SEli Cohen 213509a7d9ecSSaeed Mahameed MLX5_SET64(qpc, qpc, dbr_addr, qp->db.dma); 2136e126ba97SEli Cohen 2137cfb5e088SHaggai Abramovsky /* 0xffffff means we ask to work with cqe version 0 */ 213809a7d9ecSSaeed Mahameed if (MLX5_CAP_GEN(mdev, cqe_version) == MLX5_CQE_VERSION_V1) 2139cfb5e088SHaggai Abramovsky MLX5_SET(qpc, qpc, user_index, uidx); 214009a7d9ecSSaeed Mahameed 21412978975cSLeon Romanovsky if (qp->flags & IB_QP_CREATE_PCI_WRITE_END_PADDING && 21422978975cSLeon Romanovsky init_attr->qp_type != IB_QPT_RAW_PACKET) { 2143b1383aa6SNoa Osherovich MLX5_SET(qpc, qpc, end_padding_mode, 2144b1383aa6SNoa Osherovich MLX5_WQ_END_PAD_MODE_ALIGN); 21452978975cSLeon Romanovsky /* Special case to clean flag */ 21462978975cSLeon Romanovsky qp->flags &= ~IB_QP_CREATE_PCI_WRITE_END_PADDING; 2147b1383aa6SNoa Osherovich } 2148b1383aa6SNoa Osherovich 2149c2e53b2cSYishai Hadas if (init_attr->qp_type == IB_QPT_RAW_PACKET || 21502be08c30SLeon Romanovsky qp->flags & IB_QP_CREATE_SOURCE_QPN) { 21512dfac92dSLeon Romanovsky qp->raw_packet_qp.sq.ubuffer.buf_addr = ucmd->sq_buf_addr; 21520fb2ed66Smajd@mellanox.com raw_packet_qp_copy_info(qp, &qp->raw_packet_qp); 21537f72052cSYishai Hadas err = create_raw_packet_qp(dev, qp, in, inlen, pd, udata, 21547f72052cSYishai Hadas &resp); 215504bcc1c2SLeon Romanovsky } else 2156333fbaa0SLeon Romanovsky err = mlx5_core_create_qp(dev, &base->mqp, in, inlen); 2157e126ba97SEli Cohen 2158479163f4SAl Viro kvfree(in); 215904bcc1c2SLeon Romanovsky if (err) 216004bcc1c2SLeon Romanovsky goto err_create; 2161e126ba97SEli Cohen 216219098df2Smajd@mellanox.com base->container_mibqp = qp; 216319098df2Smajd@mellanox.com base->mqp.event = mlx5_ib_qp_event; 2164e126ba97SEli Cohen 21657aede1a2SLeon Romanovsky get_cqs(qp->type, init_attr->send_cq, init_attr->recv_cq, 216689ea94a7SMaor Gottlieb &send_cq, &recv_cq); 216789ea94a7SMaor Gottlieb spin_lock_irqsave(&dev->reset_flow_resource_lock, flags); 216889ea94a7SMaor Gottlieb mlx5_ib_lock_cqs(send_cq, recv_cq); 216989ea94a7SMaor Gottlieb /* Maintain device to QPs access, needed for further handling via reset 217089ea94a7SMaor Gottlieb * flow 217189ea94a7SMaor Gottlieb */ 217289ea94a7SMaor Gottlieb list_add_tail(&qp->qps_list, &dev->qp_list); 217389ea94a7SMaor Gottlieb /* Maintain CQ to QPs access, needed for further handling via reset flow 217489ea94a7SMaor Gottlieb */ 217589ea94a7SMaor Gottlieb if (send_cq) 217689ea94a7SMaor Gottlieb list_add_tail(&qp->cq_send_list, &send_cq->list_send_qp); 217789ea94a7SMaor Gottlieb if (recv_cq) 217889ea94a7SMaor Gottlieb list_add_tail(&qp->cq_recv_list, &recv_cq->list_recv_qp); 217989ea94a7SMaor Gottlieb mlx5_ib_unlock_cqs(send_cq, recv_cq); 218089ea94a7SMaor Gottlieb spin_unlock_irqrestore(&dev->reset_flow_resource_lock, flags); 218189ea94a7SMaor Gottlieb 2182e126ba97SEli Cohen return 0; 2183e126ba97SEli Cohen 2184e126ba97SEli Cohen err_create: 2185747c519cSLeon Romanovsky destroy_qp(dev, qp, base, udata); 2186e126ba97SEli Cohen return err; 2187e126ba97SEli Cohen } 2188e126ba97SEli Cohen 218998fc1126SLeon Romanovsky static int create_kernel_qp(struct mlx5_ib_dev *dev, struct ib_pd *pd, 2190f78d358cSLeon Romanovsky struct mlx5_ib_qp *qp, 2191f78d358cSLeon Romanovsky struct mlx5_create_qp_params *params) 219298fc1126SLeon Romanovsky { 2193f78d358cSLeon Romanovsky struct ib_qp_init_attr *attr = params->attr; 2194f78d358cSLeon Romanovsky u32 uidx = params->uidx; 219598fc1126SLeon Romanovsky struct mlx5_ib_resources *devr = &dev->devr; 219698fc1126SLeon Romanovsky int inlen = MLX5_ST_SZ_BYTES(create_qp_in); 219798fc1126SLeon Romanovsky struct mlx5_core_dev *mdev = dev->mdev; 219898fc1126SLeon Romanovsky struct mlx5_ib_cq *send_cq; 219998fc1126SLeon Romanovsky struct mlx5_ib_cq *recv_cq; 220098fc1126SLeon Romanovsky unsigned long flags; 220198fc1126SLeon Romanovsky struct mlx5_ib_qp_base *base; 220298fc1126SLeon Romanovsky int mlx5_st; 220398fc1126SLeon Romanovsky void *qpc; 220498fc1126SLeon Romanovsky u32 *in; 220598fc1126SLeon Romanovsky int err; 220698fc1126SLeon Romanovsky 220798fc1126SLeon Romanovsky mutex_init(&qp->mutex); 220898fc1126SLeon Romanovsky spin_lock_init(&qp->sq.lock); 220998fc1126SLeon Romanovsky spin_lock_init(&qp->rq.lock); 221098fc1126SLeon Romanovsky 221198fc1126SLeon Romanovsky mlx5_st = to_mlx5_st(qp->type); 221298fc1126SLeon Romanovsky if (mlx5_st < 0) 221398fc1126SLeon Romanovsky return -EINVAL; 221498fc1126SLeon Romanovsky 221598fc1126SLeon Romanovsky if (attr->sq_sig_type == IB_SIGNAL_ALL_WR) 221698fc1126SLeon Romanovsky qp->sq_signal_bits = MLX5_WQE_CTRL_CQ_UPDATE; 221798fc1126SLeon Romanovsky 221898fc1126SLeon Romanovsky base = &qp->trans_qp.base; 221998fc1126SLeon Romanovsky 222098fc1126SLeon Romanovsky qp->has_rq = qp_has_rq(attr); 222198fc1126SLeon Romanovsky err = set_rq_size(dev, &attr->cap, qp->has_rq, qp, NULL); 222298fc1126SLeon Romanovsky if (err) { 222398fc1126SLeon Romanovsky mlx5_ib_dbg(dev, "err %d\n", err); 222498fc1126SLeon Romanovsky return err; 222598fc1126SLeon Romanovsky } 222698fc1126SLeon Romanovsky 222798fc1126SLeon Romanovsky err = _create_kernel_qp(dev, attr, qp, &in, &inlen, base); 222898fc1126SLeon Romanovsky if (err) 222998fc1126SLeon Romanovsky return err; 223098fc1126SLeon Romanovsky 223198fc1126SLeon Romanovsky if (is_sqp(attr->qp_type)) 223298fc1126SLeon Romanovsky qp->port = attr->port_num; 223398fc1126SLeon Romanovsky 223498fc1126SLeon Romanovsky qpc = MLX5_ADDR_OF(create_qp_in, in, qpc); 223598fc1126SLeon Romanovsky 223698fc1126SLeon Romanovsky MLX5_SET(qpc, qpc, st, mlx5_st); 223798fc1126SLeon Romanovsky MLX5_SET(qpc, qpc, pm_state, MLX5_QP_PM_MIGRATED); 223898fc1126SLeon Romanovsky 223998fc1126SLeon Romanovsky if (attr->qp_type != MLX5_IB_QPT_REG_UMR) 224098fc1126SLeon Romanovsky MLX5_SET(qpc, qpc, pd, to_mpd(pd ? pd : devr->p0)->pdn); 224198fc1126SLeon Romanovsky else 224298fc1126SLeon Romanovsky MLX5_SET(qpc, qpc, latency_sensitive, 1); 224398fc1126SLeon Romanovsky 224498fc1126SLeon Romanovsky 224598fc1126SLeon Romanovsky if (qp->flags & IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK) 224698fc1126SLeon Romanovsky MLX5_SET(qpc, qpc, block_lb_mc, 1); 224798fc1126SLeon Romanovsky 224898fc1126SLeon Romanovsky if (qp->rq.wqe_cnt) { 224998fc1126SLeon Romanovsky MLX5_SET(qpc, qpc, log_rq_stride, qp->rq.wqe_shift - 4); 225098fc1126SLeon Romanovsky MLX5_SET(qpc, qpc, log_rq_size, ilog2(qp->rq.wqe_cnt)); 225198fc1126SLeon Romanovsky } 225298fc1126SLeon Romanovsky 225398fc1126SLeon Romanovsky MLX5_SET(qpc, qpc, rq_type, get_rx_type(qp, attr)); 225498fc1126SLeon Romanovsky 225598fc1126SLeon Romanovsky if (qp->sq.wqe_cnt) 225698fc1126SLeon Romanovsky MLX5_SET(qpc, qpc, log_sq_size, ilog2(qp->sq.wqe_cnt)); 225798fc1126SLeon Romanovsky else 225898fc1126SLeon Romanovsky MLX5_SET(qpc, qpc, no_sq, 1); 225998fc1126SLeon Romanovsky 226098fc1126SLeon Romanovsky if (attr->srq) { 226198fc1126SLeon Romanovsky MLX5_SET(qpc, qpc, xrcd, to_mxrcd(devr->x0)->xrcdn); 226298fc1126SLeon Romanovsky MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, 226398fc1126SLeon Romanovsky to_msrq(attr->srq)->msrq.srqn); 226498fc1126SLeon Romanovsky } else { 226598fc1126SLeon Romanovsky MLX5_SET(qpc, qpc, xrcd, to_mxrcd(devr->x1)->xrcdn); 226698fc1126SLeon Romanovsky MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, 226798fc1126SLeon Romanovsky to_msrq(devr->s1)->msrq.srqn); 226898fc1126SLeon Romanovsky } 226998fc1126SLeon Romanovsky 227098fc1126SLeon Romanovsky if (attr->send_cq) 227198fc1126SLeon Romanovsky MLX5_SET(qpc, qpc, cqn_snd, to_mcq(attr->send_cq)->mcq.cqn); 227298fc1126SLeon Romanovsky 227398fc1126SLeon Romanovsky if (attr->recv_cq) 227498fc1126SLeon Romanovsky MLX5_SET(qpc, qpc, cqn_rcv, to_mcq(attr->recv_cq)->mcq.cqn); 227598fc1126SLeon Romanovsky 227698fc1126SLeon Romanovsky MLX5_SET64(qpc, qpc, dbr_addr, qp->db.dma); 227798fc1126SLeon Romanovsky 227898fc1126SLeon Romanovsky /* 0xffffff means we ask to work with cqe version 0 */ 227998fc1126SLeon Romanovsky if (MLX5_CAP_GEN(mdev, cqe_version) == MLX5_CQE_VERSION_V1) 228098fc1126SLeon Romanovsky MLX5_SET(qpc, qpc, user_index, uidx); 228198fc1126SLeon Romanovsky 228298fc1126SLeon Romanovsky /* we use IB_QP_CREATE_IPOIB_UD_LSO to indicates ipoib qp */ 228398fc1126SLeon Romanovsky if (qp->flags & IB_QP_CREATE_IPOIB_UD_LSO) 228498fc1126SLeon Romanovsky MLX5_SET(qpc, qpc, ulp_stateless_offload_mode, 1); 228598fc1126SLeon Romanovsky 228698fc1126SLeon Romanovsky err = mlx5_core_create_qp(dev, &base->mqp, in, inlen); 228798fc1126SLeon Romanovsky kvfree(in); 228898fc1126SLeon Romanovsky if (err) 228998fc1126SLeon Romanovsky goto err_create; 229098fc1126SLeon Romanovsky 229198fc1126SLeon Romanovsky base->container_mibqp = qp; 229298fc1126SLeon Romanovsky base->mqp.event = mlx5_ib_qp_event; 229398fc1126SLeon Romanovsky 229498fc1126SLeon Romanovsky get_cqs(qp->type, attr->send_cq, attr->recv_cq, 229598fc1126SLeon Romanovsky &send_cq, &recv_cq); 229698fc1126SLeon Romanovsky spin_lock_irqsave(&dev->reset_flow_resource_lock, flags); 229798fc1126SLeon Romanovsky mlx5_ib_lock_cqs(send_cq, recv_cq); 229898fc1126SLeon Romanovsky /* Maintain device to QPs access, needed for further handling via reset 229998fc1126SLeon Romanovsky * flow 230098fc1126SLeon Romanovsky */ 230198fc1126SLeon Romanovsky list_add_tail(&qp->qps_list, &dev->qp_list); 230298fc1126SLeon Romanovsky /* Maintain CQ to QPs access, needed for further handling via reset flow 230398fc1126SLeon Romanovsky */ 230498fc1126SLeon Romanovsky if (send_cq) 230598fc1126SLeon Romanovsky list_add_tail(&qp->cq_send_list, &send_cq->list_send_qp); 230698fc1126SLeon Romanovsky if (recv_cq) 230798fc1126SLeon Romanovsky list_add_tail(&qp->cq_recv_list, &recv_cq->list_recv_qp); 230898fc1126SLeon Romanovsky mlx5_ib_unlock_cqs(send_cq, recv_cq); 230998fc1126SLeon Romanovsky spin_unlock_irqrestore(&dev->reset_flow_resource_lock, flags); 231098fc1126SLeon Romanovsky 231198fc1126SLeon Romanovsky return 0; 231298fc1126SLeon Romanovsky 231398fc1126SLeon Romanovsky err_create: 2314747c519cSLeon Romanovsky destroy_qp(dev, qp, base, NULL); 231598fc1126SLeon Romanovsky return err; 231698fc1126SLeon Romanovsky } 231798fc1126SLeon Romanovsky 2318e126ba97SEli Cohen static void mlx5_ib_lock_cqs(struct mlx5_ib_cq *send_cq, struct mlx5_ib_cq *recv_cq) 2319e126ba97SEli Cohen __acquires(&send_cq->lock) __acquires(&recv_cq->lock) 2320e126ba97SEli Cohen { 2321e126ba97SEli Cohen if (send_cq) { 2322e126ba97SEli Cohen if (recv_cq) { 2323e126ba97SEli Cohen if (send_cq->mcq.cqn < recv_cq->mcq.cqn) { 232489ea94a7SMaor Gottlieb spin_lock(&send_cq->lock); 2325e126ba97SEli Cohen spin_lock_nested(&recv_cq->lock, 2326e126ba97SEli Cohen SINGLE_DEPTH_NESTING); 2327e126ba97SEli Cohen } else if (send_cq->mcq.cqn == recv_cq->mcq.cqn) { 232889ea94a7SMaor Gottlieb spin_lock(&send_cq->lock); 2329e126ba97SEli Cohen __acquire(&recv_cq->lock); 2330e126ba97SEli Cohen } else { 233189ea94a7SMaor Gottlieb spin_lock(&recv_cq->lock); 2332e126ba97SEli Cohen spin_lock_nested(&send_cq->lock, 2333e126ba97SEli Cohen SINGLE_DEPTH_NESTING); 2334e126ba97SEli Cohen } 2335e126ba97SEli Cohen } else { 233689ea94a7SMaor Gottlieb spin_lock(&send_cq->lock); 23376a4f139aSEli Cohen __acquire(&recv_cq->lock); 2338e126ba97SEli Cohen } 2339e126ba97SEli Cohen } else if (recv_cq) { 234089ea94a7SMaor Gottlieb spin_lock(&recv_cq->lock); 23416a4f139aSEli Cohen __acquire(&send_cq->lock); 23426a4f139aSEli Cohen } else { 23436a4f139aSEli Cohen __acquire(&send_cq->lock); 23446a4f139aSEli Cohen __acquire(&recv_cq->lock); 2345e126ba97SEli Cohen } 2346e126ba97SEli Cohen } 2347e126ba97SEli Cohen 2348e126ba97SEli Cohen static void mlx5_ib_unlock_cqs(struct mlx5_ib_cq *send_cq, struct mlx5_ib_cq *recv_cq) 2349e126ba97SEli Cohen __releases(&send_cq->lock) __releases(&recv_cq->lock) 2350e126ba97SEli Cohen { 2351e126ba97SEli Cohen if (send_cq) { 2352e126ba97SEli Cohen if (recv_cq) { 2353e126ba97SEli Cohen if (send_cq->mcq.cqn < recv_cq->mcq.cqn) { 2354e126ba97SEli Cohen spin_unlock(&recv_cq->lock); 235589ea94a7SMaor Gottlieb spin_unlock(&send_cq->lock); 2356e126ba97SEli Cohen } else if (send_cq->mcq.cqn == recv_cq->mcq.cqn) { 2357e126ba97SEli Cohen __release(&recv_cq->lock); 235889ea94a7SMaor Gottlieb spin_unlock(&send_cq->lock); 2359e126ba97SEli Cohen } else { 2360e126ba97SEli Cohen spin_unlock(&send_cq->lock); 236189ea94a7SMaor Gottlieb spin_unlock(&recv_cq->lock); 2362e126ba97SEli Cohen } 2363e126ba97SEli Cohen } else { 23646a4f139aSEli Cohen __release(&recv_cq->lock); 236589ea94a7SMaor Gottlieb spin_unlock(&send_cq->lock); 2366e126ba97SEli Cohen } 2367e126ba97SEli Cohen } else if (recv_cq) { 23686a4f139aSEli Cohen __release(&send_cq->lock); 236989ea94a7SMaor Gottlieb spin_unlock(&recv_cq->lock); 23706a4f139aSEli Cohen } else { 23716a4f139aSEli Cohen __release(&recv_cq->lock); 23726a4f139aSEli Cohen __release(&send_cq->lock); 2373e126ba97SEli Cohen } 2374e126ba97SEli Cohen } 2375e126ba97SEli Cohen 2376e126ba97SEli Cohen static struct mlx5_ib_pd *get_pd(struct mlx5_ib_qp *qp) 2377e126ba97SEli Cohen { 2378e126ba97SEli Cohen return to_mpd(qp->ibqp.pd); 2379e126ba97SEli Cohen } 2380e126ba97SEli Cohen 238189ea94a7SMaor Gottlieb static void get_cqs(enum ib_qp_type qp_type, 238289ea94a7SMaor Gottlieb struct ib_cq *ib_send_cq, struct ib_cq *ib_recv_cq, 2383e126ba97SEli Cohen struct mlx5_ib_cq **send_cq, struct mlx5_ib_cq **recv_cq) 2384e126ba97SEli Cohen { 238589ea94a7SMaor Gottlieb switch (qp_type) { 2386e126ba97SEli Cohen case IB_QPT_XRC_TGT: 2387e126ba97SEli Cohen *send_cq = NULL; 2388e126ba97SEli Cohen *recv_cq = NULL; 2389e126ba97SEli Cohen break; 2390e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 2391e126ba97SEli Cohen case IB_QPT_XRC_INI: 239289ea94a7SMaor Gottlieb *send_cq = ib_send_cq ? to_mcq(ib_send_cq) : NULL; 2393e126ba97SEli Cohen *recv_cq = NULL; 2394e126ba97SEli Cohen break; 2395e126ba97SEli Cohen 2396e126ba97SEli Cohen case IB_QPT_SMI: 2397d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: 2398e126ba97SEli Cohen case IB_QPT_RC: 2399e126ba97SEli Cohen case IB_QPT_UC: 2400e126ba97SEli Cohen case IB_QPT_UD: 24010fb2ed66Smajd@mellanox.com case IB_QPT_RAW_PACKET: 240289ea94a7SMaor Gottlieb *send_cq = ib_send_cq ? to_mcq(ib_send_cq) : NULL; 240389ea94a7SMaor Gottlieb *recv_cq = ib_recv_cq ? to_mcq(ib_recv_cq) : NULL; 2404e126ba97SEli Cohen break; 2405e126ba97SEli Cohen default: 2406e126ba97SEli Cohen *send_cq = NULL; 2407e126ba97SEli Cohen *recv_cq = NULL; 2408e126ba97SEli Cohen break; 2409e126ba97SEli Cohen } 2410e126ba97SEli Cohen } 2411e126ba97SEli Cohen 2412ad5f8e96Smajd@mellanox.com static int modify_raw_packet_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 241313eab21fSAviv Heller const struct mlx5_modify_raw_qp_param *raw_qp_param, 241413eab21fSAviv Heller u8 lag_tx_affinity); 2415ad5f8e96Smajd@mellanox.com 2416bdeacabdSShamir Rabinovitch static void destroy_qp_common(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 2417bdeacabdSShamir Rabinovitch struct ib_udata *udata) 2418e126ba97SEli Cohen { 2419e126ba97SEli Cohen struct mlx5_ib_cq *send_cq, *recv_cq; 2420c2e53b2cSYishai Hadas struct mlx5_ib_qp_base *base; 242189ea94a7SMaor Gottlieb unsigned long flags; 2422e126ba97SEli Cohen int err; 2423e126ba97SEli Cohen 242428d61370SYishai Hadas if (qp->ibqp.rwq_ind_tbl) { 242528d61370SYishai Hadas destroy_rss_raw_qp_tir(dev, qp); 242628d61370SYishai Hadas return; 242728d61370SYishai Hadas } 242828d61370SYishai Hadas 2429c2e53b2cSYishai Hadas base = (qp->ibqp.qp_type == IB_QPT_RAW_PACKET || 24302be08c30SLeon Romanovsky qp->flags & IB_QP_CREATE_SOURCE_QPN) ? 24310fb2ed66Smajd@mellanox.com &qp->raw_packet_qp.rq.base : 24320fb2ed66Smajd@mellanox.com &qp->trans_qp.base; 24330fb2ed66Smajd@mellanox.com 24346aec21f6SHaggai Eran if (qp->state != IB_QPS_RESET) { 2435c2e53b2cSYishai Hadas if (qp->ibqp.qp_type != IB_QPT_RAW_PACKET && 24362be08c30SLeon Romanovsky !(qp->flags & IB_QP_CREATE_SOURCE_QPN)) { 2437333fbaa0SLeon Romanovsky err = mlx5_core_qp_modify(dev, MLX5_CMD_OP_2RST_QP, 0, 24381a412fb1SSaeed Mahameed NULL, &base->mqp); 2439ad5f8e96Smajd@mellanox.com } else { 24400680efa2SAlex Vesker struct mlx5_modify_raw_qp_param raw_qp_param = { 24410680efa2SAlex Vesker .operation = MLX5_CMD_OP_2RST_QP 24420680efa2SAlex Vesker }; 24430680efa2SAlex Vesker 244413eab21fSAviv Heller err = modify_raw_packet_qp(dev, qp, &raw_qp_param, 0); 2445ad5f8e96Smajd@mellanox.com } 2446ad5f8e96Smajd@mellanox.com if (err) 2447427c1e7bSmajd@mellanox.com mlx5_ib_warn(dev, "mlx5_ib: modify QP 0x%06x to RESET failed\n", 244819098df2Smajd@mellanox.com base->mqp.qpn); 24496aec21f6SHaggai Eran } 2450e126ba97SEli Cohen 245189ea94a7SMaor Gottlieb get_cqs(qp->ibqp.qp_type, qp->ibqp.send_cq, qp->ibqp.recv_cq, 245289ea94a7SMaor Gottlieb &send_cq, &recv_cq); 245389ea94a7SMaor Gottlieb 245489ea94a7SMaor Gottlieb spin_lock_irqsave(&dev->reset_flow_resource_lock, flags); 245589ea94a7SMaor Gottlieb mlx5_ib_lock_cqs(send_cq, recv_cq); 245689ea94a7SMaor Gottlieb /* del from lists under both locks above to protect reset flow paths */ 245789ea94a7SMaor Gottlieb list_del(&qp->qps_list); 245889ea94a7SMaor Gottlieb if (send_cq) 245989ea94a7SMaor Gottlieb list_del(&qp->cq_send_list); 246089ea94a7SMaor Gottlieb 246189ea94a7SMaor Gottlieb if (recv_cq) 246289ea94a7SMaor Gottlieb list_del(&qp->cq_recv_list); 2463e126ba97SEli Cohen 246403c4077bSLeon Romanovsky if (!udata) { 246519098df2Smajd@mellanox.com __mlx5_ib_cq_clean(recv_cq, base->mqp.qpn, 2466e126ba97SEli Cohen qp->ibqp.srq ? to_msrq(qp->ibqp.srq) : NULL); 2467e126ba97SEli Cohen if (send_cq != recv_cq) 246819098df2Smajd@mellanox.com __mlx5_ib_cq_clean(send_cq, base->mqp.qpn, 246919098df2Smajd@mellanox.com NULL); 2470e126ba97SEli Cohen } 247189ea94a7SMaor Gottlieb mlx5_ib_unlock_cqs(send_cq, recv_cq); 247289ea94a7SMaor Gottlieb spin_unlock_irqrestore(&dev->reset_flow_resource_lock, flags); 2473e126ba97SEli Cohen 2474c2e53b2cSYishai Hadas if (qp->ibqp.qp_type == IB_QPT_RAW_PACKET || 24752be08c30SLeon Romanovsky qp->flags & IB_QP_CREATE_SOURCE_QPN) { 24760fb2ed66Smajd@mellanox.com destroy_raw_packet_qp(dev, qp); 24770fb2ed66Smajd@mellanox.com } else { 2478333fbaa0SLeon Romanovsky err = mlx5_core_destroy_qp(dev, &base->mqp); 2479e126ba97SEli Cohen if (err) 24800fb2ed66Smajd@mellanox.com mlx5_ib_warn(dev, "failed to destroy QP 0x%x\n", 24810fb2ed66Smajd@mellanox.com base->mqp.qpn); 24820fb2ed66Smajd@mellanox.com } 2483e126ba97SEli Cohen 2484747c519cSLeon Romanovsky destroy_qp(dev, qp, base, udata); 2485e126ba97SEli Cohen } 2486e126ba97SEli Cohen 248747c80612SLeon Romanovsky static int create_dct(struct ib_pd *pd, struct mlx5_ib_qp *qp, 2488f78d358cSLeon Romanovsky struct mlx5_create_qp_params *params) 2489b4aaa1f0SMoni Shoua { 2490f78d358cSLeon Romanovsky struct ib_qp_init_attr *attr = params->attr; 2491f78d358cSLeon Romanovsky struct mlx5_ib_create_qp *ucmd = params->ucmd; 2492f78d358cSLeon Romanovsky u32 uidx = params->uidx; 2493b4aaa1f0SMoni Shoua void *dctc; 2494b4aaa1f0SMoni Shoua 2495b4aaa1f0SMoni Shoua qp->dct.in = kzalloc(MLX5_ST_SZ_BYTES(create_dct_in), GFP_KERNEL); 24969c2ba4edSLeon Romanovsky if (!qp->dct.in) 249747c80612SLeon Romanovsky return -ENOMEM; 2498b4aaa1f0SMoni Shoua 2499a01a5860SYishai Hadas MLX5_SET(create_dct_in, qp->dct.in, uid, to_mpd(pd)->uid); 2500b4aaa1f0SMoni Shoua dctc = MLX5_ADDR_OF(create_dct_in, qp->dct.in, dct_context_entry); 2501b4aaa1f0SMoni Shoua MLX5_SET(dctc, dctc, pd, to_mpd(pd)->pdn); 2502b4aaa1f0SMoni Shoua MLX5_SET(dctc, dctc, srqn_xrqn, to_msrq(attr->srq)->msrq.srqn); 2503b4aaa1f0SMoni Shoua MLX5_SET(dctc, dctc, cqn, to_mcq(attr->recv_cq)->mcq.cqn); 2504b4aaa1f0SMoni Shoua MLX5_SET64(dctc, dctc, dc_access_key, ucmd->access_key); 2505b4aaa1f0SMoni Shoua MLX5_SET(dctc, dctc, user_index, uidx); 2506b4aaa1f0SMoni Shoua 250737518fa4SLeon Romanovsky if (qp->flags_en & MLX5_QP_FLAG_SCATTER_CQE) { 2508fd9dab7eSLeon Romanovsky int rcqe_sz = mlx5_ib_get_cqe_size(attr->recv_cq); 2509fd9dab7eSLeon Romanovsky 2510fd9dab7eSLeon Romanovsky if (rcqe_sz == 128) 2511fd9dab7eSLeon Romanovsky MLX5_SET(dctc, dctc, cs_res, MLX5_RES_SCAT_DATA64_CQE); 2512fd9dab7eSLeon Romanovsky } 25135d6ff1baSYonatan Cohen 2514b4aaa1f0SMoni Shoua qp->state = IB_QPS_RESET; 2515b4aaa1f0SMoni Shoua 251647c80612SLeon Romanovsky return 0; 2517b4aaa1f0SMoni Shoua } 2518b4aaa1f0SMoni Shoua 25197aede1a2SLeon Romanovsky static int check_qp_type(struct mlx5_ib_dev *dev, struct ib_qp_init_attr *attr, 25207aede1a2SLeon Romanovsky enum ib_qp_type *type) 25216eb7edffSLeon Romanovsky { 25226eb7edffSLeon Romanovsky if (attr->qp_type == IB_QPT_DRIVER && !MLX5_CAP_GEN(dev->mdev, dct)) 25236eb7edffSLeon Romanovsky goto out; 25246eb7edffSLeon Romanovsky 25256eb7edffSLeon Romanovsky switch (attr->qp_type) { 25266eb7edffSLeon Romanovsky case IB_QPT_XRC_TGT: 25276eb7edffSLeon Romanovsky case IB_QPT_XRC_INI: 25286eb7edffSLeon Romanovsky if (!MLX5_CAP_GEN(dev->mdev, xrc)) 25296eb7edffSLeon Romanovsky goto out; 25306eb7edffSLeon Romanovsky fallthrough; 25316eb7edffSLeon Romanovsky case IB_QPT_RAW_PACKET: 25326eb7edffSLeon Romanovsky case IB_QPT_RC: 25336eb7edffSLeon Romanovsky case IB_QPT_UC: 25346eb7edffSLeon Romanovsky case IB_QPT_UD: 25356eb7edffSLeon Romanovsky case IB_QPT_SMI: 25366eb7edffSLeon Romanovsky case MLX5_IB_QPT_HW_GSI: 25376eb7edffSLeon Romanovsky case MLX5_IB_QPT_REG_UMR: 25386eb7edffSLeon Romanovsky case IB_QPT_DRIVER: 25396eb7edffSLeon Romanovsky case IB_QPT_GSI: 25407aede1a2SLeon Romanovsky break; 25416eb7edffSLeon Romanovsky default: 25426eb7edffSLeon Romanovsky goto out; 2543b4aaa1f0SMoni Shoua } 2544b4aaa1f0SMoni Shoua 25457aede1a2SLeon Romanovsky *type = attr->qp_type; 2546b4aaa1f0SMoni Shoua return 0; 25476eb7edffSLeon Romanovsky 25486eb7edffSLeon Romanovsky out: 25496eb7edffSLeon Romanovsky mlx5_ib_dbg(dev, "Unsupported QP type %d\n", attr->qp_type); 25506eb7edffSLeon Romanovsky return -EOPNOTSUPP; 2551b4aaa1f0SMoni Shoua } 2552b4aaa1f0SMoni Shoua 25532242cc25SLeon Romanovsky static int check_valid_flow(struct mlx5_ib_dev *dev, struct ib_pd *pd, 25542242cc25SLeon Romanovsky struct ib_qp_init_attr *attr, 25552242cc25SLeon Romanovsky struct ib_udata *udata) 25562242cc25SLeon Romanovsky { 25572242cc25SLeon Romanovsky struct mlx5_ib_ucontext *ucontext = rdma_udata_to_drv_context( 25582242cc25SLeon Romanovsky udata, struct mlx5_ib_ucontext, ibucontext); 25592242cc25SLeon Romanovsky 25602242cc25SLeon Romanovsky if (!udata) { 25612242cc25SLeon Romanovsky /* Kernel create_qp callers */ 25622242cc25SLeon Romanovsky if (attr->rwq_ind_tbl) 25632242cc25SLeon Romanovsky return -EOPNOTSUPP; 25642242cc25SLeon Romanovsky 25652242cc25SLeon Romanovsky switch (attr->qp_type) { 25662242cc25SLeon Romanovsky case IB_QPT_RAW_PACKET: 25672242cc25SLeon Romanovsky case IB_QPT_DRIVER: 25682242cc25SLeon Romanovsky return -EOPNOTSUPP; 25692242cc25SLeon Romanovsky default: 25702242cc25SLeon Romanovsky return 0; 25712242cc25SLeon Romanovsky } 25722242cc25SLeon Romanovsky } 25732242cc25SLeon Romanovsky 25742242cc25SLeon Romanovsky /* Userspace create_qp callers */ 25752242cc25SLeon Romanovsky if (attr->qp_type == IB_QPT_RAW_PACKET && !ucontext->cqe_version) { 25762242cc25SLeon Romanovsky mlx5_ib_dbg(dev, 25772242cc25SLeon Romanovsky "Raw Packet QP is only supported for CQE version > 0\n"); 25782242cc25SLeon Romanovsky return -EINVAL; 25792242cc25SLeon Romanovsky } 25802242cc25SLeon Romanovsky 25812242cc25SLeon Romanovsky if (attr->qp_type != IB_QPT_RAW_PACKET && attr->rwq_ind_tbl) { 25822242cc25SLeon Romanovsky mlx5_ib_dbg(dev, 25832242cc25SLeon Romanovsky "Wrong QP type %d for the RWQ indirect table\n", 25842242cc25SLeon Romanovsky attr->qp_type); 25852242cc25SLeon Romanovsky return -EINVAL; 25862242cc25SLeon Romanovsky } 25872242cc25SLeon Romanovsky 25882242cc25SLeon Romanovsky switch (attr->qp_type) { 25892242cc25SLeon Romanovsky case IB_QPT_SMI: 25902242cc25SLeon Romanovsky case MLX5_IB_QPT_HW_GSI: 25912242cc25SLeon Romanovsky case MLX5_IB_QPT_REG_UMR: 25922242cc25SLeon Romanovsky case IB_QPT_GSI: 25932242cc25SLeon Romanovsky mlx5_ib_dbg(dev, "Kernel doesn't support QP type %d\n", 25942242cc25SLeon Romanovsky attr->qp_type); 25952242cc25SLeon Romanovsky return -EINVAL; 25962242cc25SLeon Romanovsky default: 25972242cc25SLeon Romanovsky break; 25982242cc25SLeon Romanovsky } 25992242cc25SLeon Romanovsky 26002242cc25SLeon Romanovsky /* 26012242cc25SLeon Romanovsky * We don't need to see this warning, it means that kernel code 26022242cc25SLeon Romanovsky * missing ib_pd. Placed here to catch developer's mistakes. 26032242cc25SLeon Romanovsky */ 26042242cc25SLeon Romanovsky WARN_ONCE(!pd && attr->qp_type != IB_QPT_XRC_TGT, 26052242cc25SLeon Romanovsky "There is a missing PD pointer assignment\n"); 26062242cc25SLeon Romanovsky return 0; 26072242cc25SLeon Romanovsky } 26082242cc25SLeon Romanovsky 260937518fa4SLeon Romanovsky static void process_vendor_flag(struct mlx5_ib_dev *dev, int *flags, int flag, 261037518fa4SLeon Romanovsky bool cond, struct mlx5_ib_qp *qp) 261137518fa4SLeon Romanovsky { 261237518fa4SLeon Romanovsky if (!(*flags & flag)) 261337518fa4SLeon Romanovsky return; 261437518fa4SLeon Romanovsky 261537518fa4SLeon Romanovsky if (cond) { 261637518fa4SLeon Romanovsky qp->flags_en |= flag; 261737518fa4SLeon Romanovsky *flags &= ~flag; 261837518fa4SLeon Romanovsky return; 261937518fa4SLeon Romanovsky } 262037518fa4SLeon Romanovsky 262137518fa4SLeon Romanovsky if (flag == MLX5_QP_FLAG_SCATTER_CQE) { 262237518fa4SLeon Romanovsky /* 262337518fa4SLeon Romanovsky * We don't return error if this flag was provided, 262437518fa4SLeon Romanovsky * and mlx5 doesn't have right capability. 262537518fa4SLeon Romanovsky */ 262637518fa4SLeon Romanovsky *flags &= ~MLX5_QP_FLAG_SCATTER_CQE; 262737518fa4SLeon Romanovsky return; 262837518fa4SLeon Romanovsky } 262937518fa4SLeon Romanovsky mlx5_ib_dbg(dev, "Vendor create QP flag 0x%X is not supported\n", flag); 263037518fa4SLeon Romanovsky } 263137518fa4SLeon Romanovsky 263237518fa4SLeon Romanovsky static int process_vendor_flags(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 26335ce0592bSLeon Romanovsky void *ucmd, struct ib_qp_init_attr *attr) 26342fdddbd5SLeon Romanovsky { 263537518fa4SLeon Romanovsky struct mlx5_core_dev *mdev = dev->mdev; 263637518fa4SLeon Romanovsky bool cond; 26375ce0592bSLeon Romanovsky int flags; 26385ce0592bSLeon Romanovsky 26395ce0592bSLeon Romanovsky if (attr->rwq_ind_tbl) 26405ce0592bSLeon Romanovsky flags = ((struct mlx5_ib_create_qp_rss *)ucmd)->flags; 26415ce0592bSLeon Romanovsky else 26425ce0592bSLeon Romanovsky flags = ((struct mlx5_ib_create_qp *)ucmd)->flags; 264337518fa4SLeon Romanovsky 264437518fa4SLeon Romanovsky switch (flags & (MLX5_QP_FLAG_TYPE_DCT | MLX5_QP_FLAG_TYPE_DCI)) { 26452fdddbd5SLeon Romanovsky case MLX5_QP_FLAG_TYPE_DCI: 26467aede1a2SLeon Romanovsky qp->type = MLX5_IB_QPT_DCI; 26472fdddbd5SLeon Romanovsky break; 26482fdddbd5SLeon Romanovsky case MLX5_QP_FLAG_TYPE_DCT: 26497aede1a2SLeon Romanovsky qp->type = MLX5_IB_QPT_DCT; 265037518fa4SLeon Romanovsky break; 26517aede1a2SLeon Romanovsky default: 26527aede1a2SLeon Romanovsky if (qp->type != IB_QPT_DRIVER) 26537aede1a2SLeon Romanovsky break; 26547aede1a2SLeon Romanovsky /* 26557aede1a2SLeon Romanovsky * It is IB_QPT_DRIVER and or no subtype or 26567aede1a2SLeon Romanovsky * wrong subtype were provided. 26577aede1a2SLeon Romanovsky */ 265837518fa4SLeon Romanovsky return -EINVAL; 26597aede1a2SLeon Romanovsky } 266037518fa4SLeon Romanovsky 266137518fa4SLeon Romanovsky process_vendor_flag(dev, &flags, MLX5_QP_FLAG_TYPE_DCI, true, qp); 266237518fa4SLeon Romanovsky process_vendor_flag(dev, &flags, MLX5_QP_FLAG_TYPE_DCT, true, qp); 266337518fa4SLeon Romanovsky 266437518fa4SLeon Romanovsky process_vendor_flag(dev, &flags, MLX5_QP_FLAG_SIGNATURE, true, qp); 266537518fa4SLeon Romanovsky process_vendor_flag(dev, &flags, MLX5_QP_FLAG_SCATTER_CQE, 266637518fa4SLeon Romanovsky MLX5_CAP_GEN(mdev, sctr_data_cqe), qp); 266737518fa4SLeon Romanovsky 26687aede1a2SLeon Romanovsky if (qp->type == IB_QPT_RAW_PACKET) { 266937518fa4SLeon Romanovsky cond = MLX5_CAP_ETH(mdev, tunnel_stateless_vxlan) || 267037518fa4SLeon Romanovsky MLX5_CAP_ETH(mdev, tunnel_stateless_gre) || 267137518fa4SLeon Romanovsky MLX5_CAP_ETH(mdev, tunnel_stateless_geneve_rx); 267237518fa4SLeon Romanovsky process_vendor_flag(dev, &flags, MLX5_QP_FLAG_TUNNEL_OFFLOADS, 267337518fa4SLeon Romanovsky cond, qp); 267437518fa4SLeon Romanovsky process_vendor_flag(dev, &flags, 267537518fa4SLeon Romanovsky MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC, true, 267637518fa4SLeon Romanovsky qp); 267737518fa4SLeon Romanovsky process_vendor_flag(dev, &flags, 267837518fa4SLeon Romanovsky MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC, true, 267937518fa4SLeon Romanovsky qp); 268037518fa4SLeon Romanovsky } 268137518fa4SLeon Romanovsky 26827aede1a2SLeon Romanovsky if (qp->type == IB_QPT_RC) 268337518fa4SLeon Romanovsky process_vendor_flag(dev, &flags, 268437518fa4SLeon Romanovsky MLX5_QP_FLAG_PACKET_BASED_CREDIT_MODE, 268537518fa4SLeon Romanovsky MLX5_CAP_GEN(mdev, qp_packet_based), qp); 268637518fa4SLeon Romanovsky 268776883a6cSLeon Romanovsky process_vendor_flag(dev, &flags, MLX5_QP_FLAG_BFREG_INDEX, true, qp); 268876883a6cSLeon Romanovsky process_vendor_flag(dev, &flags, MLX5_QP_FLAG_UAR_PAGE_INDEX, true, qp); 268976883a6cSLeon Romanovsky 269037518fa4SLeon Romanovsky if (flags) 269137518fa4SLeon Romanovsky mlx5_ib_dbg(dev, "udata has unsupported flags 0x%X\n", flags); 269237518fa4SLeon Romanovsky 269337518fa4SLeon Romanovsky return (flags) ? -EINVAL : 0; 26942fdddbd5SLeon Romanovsky } 26952fdddbd5SLeon Romanovsky 26962978975cSLeon Romanovsky static void process_create_flag(struct mlx5_ib_dev *dev, int *flags, int flag, 26972978975cSLeon Romanovsky bool cond, struct mlx5_ib_qp *qp) 26982978975cSLeon Romanovsky { 26992978975cSLeon Romanovsky if (!(*flags & flag)) 27002978975cSLeon Romanovsky return; 27012978975cSLeon Romanovsky 27022978975cSLeon Romanovsky if (cond) { 27032978975cSLeon Romanovsky qp->flags |= flag; 27042978975cSLeon Romanovsky *flags &= ~flag; 27052978975cSLeon Romanovsky return; 27062978975cSLeon Romanovsky } 27072978975cSLeon Romanovsky 27082978975cSLeon Romanovsky if (flag == MLX5_IB_QP_CREATE_WC_TEST) { 27092978975cSLeon Romanovsky /* 27102978975cSLeon Romanovsky * Special case, if condition didn't meet, it won't be error, 27112978975cSLeon Romanovsky * just different in-kernel flow. 27122978975cSLeon Romanovsky */ 27132978975cSLeon Romanovsky *flags &= ~MLX5_IB_QP_CREATE_WC_TEST; 27142978975cSLeon Romanovsky return; 27152978975cSLeon Romanovsky } 27162978975cSLeon Romanovsky mlx5_ib_dbg(dev, "Verbs create QP flag 0x%X is not supported\n", flag); 27172978975cSLeon Romanovsky } 27182978975cSLeon Romanovsky 27192978975cSLeon Romanovsky static int process_create_flags(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 27202978975cSLeon Romanovsky struct ib_qp_init_attr *attr) 27212978975cSLeon Romanovsky { 27227aede1a2SLeon Romanovsky enum ib_qp_type qp_type = qp->type; 27232978975cSLeon Romanovsky struct mlx5_core_dev *mdev = dev->mdev; 27242978975cSLeon Romanovsky int create_flags = attr->create_flags; 27252978975cSLeon Romanovsky bool cond; 27262978975cSLeon Romanovsky 27277aede1a2SLeon Romanovsky if (qp_type == MLX5_IB_QPT_DCT) 27282978975cSLeon Romanovsky return (create_flags) ? -EINVAL : 0; 27292978975cSLeon Romanovsky 27302978975cSLeon Romanovsky if (qp_type == IB_QPT_RAW_PACKET && attr->rwq_ind_tbl) 27312978975cSLeon Romanovsky return (create_flags) ? -EINVAL : 0; 27322978975cSLeon Romanovsky 27332978975cSLeon Romanovsky process_create_flag(dev, &create_flags, 27342978975cSLeon Romanovsky IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK, 27352978975cSLeon Romanovsky MLX5_CAP_GEN(mdev, block_lb_mc), qp); 27362978975cSLeon Romanovsky process_create_flag(dev, &create_flags, IB_QP_CREATE_CROSS_CHANNEL, 27372978975cSLeon Romanovsky MLX5_CAP_GEN(mdev, cd), qp); 27382978975cSLeon Romanovsky process_create_flag(dev, &create_flags, IB_QP_CREATE_MANAGED_SEND, 27392978975cSLeon Romanovsky MLX5_CAP_GEN(mdev, cd), qp); 27402978975cSLeon Romanovsky process_create_flag(dev, &create_flags, IB_QP_CREATE_MANAGED_RECV, 27412978975cSLeon Romanovsky MLX5_CAP_GEN(mdev, cd), qp); 27422978975cSLeon Romanovsky 27432978975cSLeon Romanovsky if (qp_type == IB_QPT_UD) { 27442978975cSLeon Romanovsky process_create_flag(dev, &create_flags, 27452978975cSLeon Romanovsky IB_QP_CREATE_IPOIB_UD_LSO, 27462978975cSLeon Romanovsky MLX5_CAP_GEN(mdev, ipoib_basic_offloads), 27472978975cSLeon Romanovsky qp); 27482978975cSLeon Romanovsky cond = MLX5_CAP_GEN(mdev, port_type) == MLX5_CAP_PORT_TYPE_IB; 27492978975cSLeon Romanovsky process_create_flag(dev, &create_flags, IB_QP_CREATE_SOURCE_QPN, 27502978975cSLeon Romanovsky cond, qp); 27512978975cSLeon Romanovsky } 27522978975cSLeon Romanovsky 27532978975cSLeon Romanovsky if (qp_type == IB_QPT_RAW_PACKET) { 27542978975cSLeon Romanovsky cond = MLX5_CAP_GEN(mdev, eth_net_offloads) && 27552978975cSLeon Romanovsky MLX5_CAP_ETH(mdev, scatter_fcs); 27562978975cSLeon Romanovsky process_create_flag(dev, &create_flags, 27572978975cSLeon Romanovsky IB_QP_CREATE_SCATTER_FCS, cond, qp); 27582978975cSLeon Romanovsky 27592978975cSLeon Romanovsky cond = MLX5_CAP_GEN(mdev, eth_net_offloads) && 27602978975cSLeon Romanovsky MLX5_CAP_ETH(mdev, vlan_cap); 27612978975cSLeon Romanovsky process_create_flag(dev, &create_flags, 27622978975cSLeon Romanovsky IB_QP_CREATE_CVLAN_STRIPPING, cond, qp); 27632978975cSLeon Romanovsky } 27642978975cSLeon Romanovsky 27652978975cSLeon Romanovsky process_create_flag(dev, &create_flags, 27662978975cSLeon Romanovsky IB_QP_CREATE_PCI_WRITE_END_PADDING, 27672978975cSLeon Romanovsky MLX5_CAP_GEN(mdev, end_pad), qp); 27682978975cSLeon Romanovsky 27692978975cSLeon Romanovsky process_create_flag(dev, &create_flags, MLX5_IB_QP_CREATE_WC_TEST, 27702978975cSLeon Romanovsky qp_type != MLX5_IB_QPT_REG_UMR, qp); 27712978975cSLeon Romanovsky process_create_flag(dev, &create_flags, MLX5_IB_QP_CREATE_SQPN_QP1, 27722978975cSLeon Romanovsky true, qp); 27732978975cSLeon Romanovsky 27742978975cSLeon Romanovsky if (create_flags) 27752978975cSLeon Romanovsky mlx5_ib_dbg(dev, "Create QP has unsupported flags 0x%X\n", 27762978975cSLeon Romanovsky create_flags); 27772978975cSLeon Romanovsky 27782978975cSLeon Romanovsky return (create_flags) ? -EINVAL : 0; 27792978975cSLeon Romanovsky } 27802978975cSLeon Romanovsky 27812fdddbd5SLeon Romanovsky static size_t process_udata_size(struct ib_qp_init_attr *attr, 27822fdddbd5SLeon Romanovsky struct ib_udata *udata) 27832fdddbd5SLeon Romanovsky { 27842fdddbd5SLeon Romanovsky size_t ucmd = sizeof(struct mlx5_ib_create_qp); 27855ce0592bSLeon Romanovsky size_t inlen = udata->inlen; 27862fdddbd5SLeon Romanovsky 27872dfac92dSLeon Romanovsky if (attr->qp_type == IB_QPT_DRIVER) 27885ce0592bSLeon Romanovsky return (inlen < ucmd) ? 0 : ucmd; 27892dfac92dSLeon Romanovsky 27905ce0592bSLeon Romanovsky if (!attr->rwq_ind_tbl) 27912dfac92dSLeon Romanovsky return ucmd; 27925ce0592bSLeon Romanovsky 27935ce0592bSLeon Romanovsky if (inlen < offsetofend(struct mlx5_ib_create_qp_rss, flags)) 27945ce0592bSLeon Romanovsky return 0; 27955ce0592bSLeon Romanovsky 27965ce0592bSLeon Romanovsky ucmd = sizeof(struct mlx5_ib_create_qp_rss); 27975ce0592bSLeon Romanovsky if (inlen > ucmd && !ib_is_udata_cleared(udata, ucmd, inlen - ucmd)) 27985ce0592bSLeon Romanovsky return 0; 27995ce0592bSLeon Romanovsky 28005ce0592bSLeon Romanovsky return min(ucmd, inlen); 28012fdddbd5SLeon Romanovsky } 28022fdddbd5SLeon Romanovsky 2803f78d358cSLeon Romanovsky static int create_raw_qp(struct mlx5_ib_dev *dev, struct ib_pd *pd, 2804f78d358cSLeon Romanovsky struct mlx5_ib_qp *qp, 2805f78d358cSLeon Romanovsky struct mlx5_create_qp_params *params) 28065d0dc3d9SLeon Romanovsky { 2807f78d358cSLeon Romanovsky if (params->is_rss_raw) 2808f78d358cSLeon Romanovsky return create_rss_raw_qp_tir(dev, pd, qp, params); 28095d0dc3d9SLeon Romanovsky 2810f78d358cSLeon Romanovsky return create_user_qp(dev, pd, qp, params); 28115d0dc3d9SLeon Romanovsky } 28125d0dc3d9SLeon Romanovsky 28137aede1a2SLeon Romanovsky static int check_qp_attr(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 28147aede1a2SLeon Romanovsky struct ib_qp_init_attr *attr) 28157aede1a2SLeon Romanovsky { 28167aede1a2SLeon Romanovsky int ret = 0; 28177aede1a2SLeon Romanovsky 28187aede1a2SLeon Romanovsky switch (qp->type) { 28197aede1a2SLeon Romanovsky case MLX5_IB_QPT_DCT: 28207aede1a2SLeon Romanovsky ret = (!attr->srq || !attr->recv_cq) ? -EINVAL : 0; 28217aede1a2SLeon Romanovsky break; 28227aede1a2SLeon Romanovsky case MLX5_IB_QPT_DCI: 28237aede1a2SLeon Romanovsky ret = (attr->cap.max_recv_wr || attr->cap.max_recv_sge) ? 28247aede1a2SLeon Romanovsky -EINVAL : 28257aede1a2SLeon Romanovsky 0; 28267aede1a2SLeon Romanovsky break; 2827266424ebSLeon Romanovsky case IB_QPT_RAW_PACKET: 2828266424ebSLeon Romanovsky ret = (attr->rwq_ind_tbl && attr->send_cq) ? -EINVAL : 0; 2829266424ebSLeon Romanovsky break; 28307aede1a2SLeon Romanovsky default: 28317aede1a2SLeon Romanovsky break; 28327aede1a2SLeon Romanovsky } 28337aede1a2SLeon Romanovsky 28347aede1a2SLeon Romanovsky if (ret) 28357aede1a2SLeon Romanovsky mlx5_ib_dbg(dev, "QP type %d has wrong attributes\n", qp->type); 28367aede1a2SLeon Romanovsky 28377aede1a2SLeon Romanovsky return ret; 28387aede1a2SLeon Romanovsky } 28397aede1a2SLeon Romanovsky 2840f78d358cSLeon Romanovsky static int get_qp_uidx(struct mlx5_ib_qp *qp, 2841f78d358cSLeon Romanovsky struct mlx5_create_qp_params *params) 284221aad80bSLeon Romanovsky { 2843f78d358cSLeon Romanovsky struct mlx5_ib_create_qp *ucmd = params->ucmd; 2844f78d358cSLeon Romanovsky struct ib_udata *udata = params->udata; 284521aad80bSLeon Romanovsky struct mlx5_ib_ucontext *ucontext = rdma_udata_to_drv_context( 284621aad80bSLeon Romanovsky udata, struct mlx5_ib_ucontext, ibucontext); 284721aad80bSLeon Romanovsky 2848f78d358cSLeon Romanovsky if (params->is_rss_raw) 284921aad80bSLeon Romanovsky return 0; 285021aad80bSLeon Romanovsky 2851f78d358cSLeon Romanovsky return get_qp_user_index(ucontext, ucmd, sizeof(*ucmd), ¶ms->uidx); 285221aad80bSLeon Romanovsky } 285321aad80bSLeon Romanovsky 2854f78d358cSLeon Romanovsky struct ib_qp *mlx5_ib_create_qp(struct ib_pd *pd, struct ib_qp_init_attr *attr, 2855e126ba97SEli Cohen struct ib_udata *udata) 2856e126ba97SEli Cohen { 2857f78d358cSLeon Romanovsky struct mlx5_create_qp_params params = {}; 2858e126ba97SEli Cohen struct mlx5_ib_dev *dev; 2859e126ba97SEli Cohen struct mlx5_ib_qp *qp; 28607aede1a2SLeon Romanovsky enum ib_qp_type type; 2861e126ba97SEli Cohen u16 xrcdn = 0; 2862e126ba97SEli Cohen int err; 2863e126ba97SEli Cohen 28646eb7edffSLeon Romanovsky dev = pd ? to_mdev(pd->device) : 2865f78d358cSLeon Romanovsky to_mdev(to_mxrcd(attr->xrcd)->ibxrcd.device); 28660fb2ed66Smajd@mellanox.com 2867f78d358cSLeon Romanovsky err = check_qp_type(dev, attr, &type); 28682242cc25SLeon Romanovsky if (err) 28692242cc25SLeon Romanovsky return ERR_PTR(err); 2870e126ba97SEli Cohen 2871f78d358cSLeon Romanovsky err = check_valid_flow(dev, pd, attr, udata); 2872f78d358cSLeon Romanovsky if (err) 2873f78d358cSLeon Romanovsky return ERR_PTR(err); 2874f78d358cSLeon Romanovsky 2875f78d358cSLeon Romanovsky if (attr->qp_type == IB_QPT_GSI) 2876f78d358cSLeon Romanovsky return mlx5_ib_gsi_create_qp(pd, attr); 2877f78d358cSLeon Romanovsky 2878f78d358cSLeon Romanovsky params.udata = udata; 2879f78d358cSLeon Romanovsky params.uidx = MLX5_IB_DEFAULT_UIDX; 2880f78d358cSLeon Romanovsky params.attr = attr; 2881f78d358cSLeon Romanovsky params.is_rss_raw = !!attr->rwq_ind_tbl; 28829c2ba4edSLeon Romanovsky 28835ce0592bSLeon Romanovsky if (udata) { 2884f78d358cSLeon Romanovsky params.inlen = process_udata_size(attr, udata); 2885f78d358cSLeon Romanovsky if (!params.inlen) 28862fdddbd5SLeon Romanovsky return ERR_PTR(-EINVAL); 28872fdddbd5SLeon Romanovsky 2888f78d358cSLeon Romanovsky params.ucmd = kzalloc(params.inlen, GFP_KERNEL); 2889f78d358cSLeon Romanovsky if (!params.ucmd) 28905ce0592bSLeon Romanovsky return ERR_PTR(-ENOMEM); 28915ce0592bSLeon Romanovsky 2892f78d358cSLeon Romanovsky err = ib_copy_from_udata(params.ucmd, udata, params.inlen); 28932fdddbd5SLeon Romanovsky if (err) 28945ce0592bSLeon Romanovsky goto free_ucmd; 28952fdddbd5SLeon Romanovsky } 28962fdddbd5SLeon Romanovsky 28979c2ba4edSLeon Romanovsky qp = kzalloc(sizeof(*qp), GFP_KERNEL); 28985ce0592bSLeon Romanovsky if (!qp) { 28995ce0592bSLeon Romanovsky err = -ENOMEM; 29005ce0592bSLeon Romanovsky goto free_ucmd; 29015ce0592bSLeon Romanovsky } 29029c2ba4edSLeon Romanovsky 29037aede1a2SLeon Romanovsky qp->type = type; 290437518fa4SLeon Romanovsky if (udata) { 2905f78d358cSLeon Romanovsky err = process_vendor_flags(dev, qp, params.ucmd, attr); 2906b4aaa1f0SMoni Shoua if (err) 29079c2ba4edSLeon Romanovsky goto free_qp; 290821aad80bSLeon Romanovsky 2909f78d358cSLeon Romanovsky err = get_qp_uidx(qp, ¶ms); 291021aad80bSLeon Romanovsky if (err) 291121aad80bSLeon Romanovsky goto free_qp; 2912b4aaa1f0SMoni Shoua } 2913f78d358cSLeon Romanovsky err = process_create_flags(dev, qp, attr); 29142978975cSLeon Romanovsky if (err) 29152978975cSLeon Romanovsky goto free_qp; 2916b4aaa1f0SMoni Shoua 2917f78d358cSLeon Romanovsky err = check_qp_attr(dev, qp, attr); 29187aede1a2SLeon Romanovsky if (err) 29197aede1a2SLeon Romanovsky goto free_qp; 29207aede1a2SLeon Romanovsky 29217aede1a2SLeon Romanovsky switch (qp->type) { 29225d0dc3d9SLeon Romanovsky case IB_QPT_RAW_PACKET: 2923f78d358cSLeon Romanovsky err = create_raw_qp(dev, pd, qp, ¶ms); 29245d0dc3d9SLeon Romanovsky break; 29257aede1a2SLeon Romanovsky case MLX5_IB_QPT_DCT: 2926f78d358cSLeon Romanovsky err = create_dct(pd, qp, ¶ms); 29277aede1a2SLeon Romanovsky break; 292804bcc1c2SLeon Romanovsky case IB_QPT_XRC_TGT: 2929f78d358cSLeon Romanovsky xrcdn = to_mxrcd(attr->xrcd)->xrcdn; 2930f78d358cSLeon Romanovsky err = create_xrc_tgt_qp(dev, qp, ¶ms); 293104bcc1c2SLeon Romanovsky break; 293247c80612SLeon Romanovsky default: 293398fc1126SLeon Romanovsky if (udata) 2934f78d358cSLeon Romanovsky err = create_user_qp(dev, pd, qp, ¶ms); 293598fc1126SLeon Romanovsky else 2936f78d358cSLeon Romanovsky err = create_kernel_qp(dev, pd, qp, ¶ms); 293747c80612SLeon Romanovsky } 2938e126ba97SEli Cohen if (err) { 2939f78d358cSLeon Romanovsky mlx5_ib_err(dev, "create_qp failed %d\n", err); 29409c2ba4edSLeon Romanovsky goto free_qp; 2941e126ba97SEli Cohen } 2942e126ba97SEli Cohen 2943f78d358cSLeon Romanovsky kfree(params.ucmd); 29445ce0592bSLeon Romanovsky 2945f78d358cSLeon Romanovsky if (is_qp0(attr->qp_type)) 2946e126ba97SEli Cohen qp->ibqp.qp_num = 0; 2947f78d358cSLeon Romanovsky else if (is_qp1(attr->qp_type)) 2948e126ba97SEli Cohen qp->ibqp.qp_num = 1; 2949e126ba97SEli Cohen else 295019098df2Smajd@mellanox.com qp->ibqp.qp_num = qp->trans_qp.base.mqp.qpn; 2951e126ba97SEli Cohen 295219098df2Smajd@mellanox.com qp->trans_qp.xrcdn = xrcdn; 2953e126ba97SEli Cohen 2954e126ba97SEli Cohen return &qp->ibqp; 29559c2ba4edSLeon Romanovsky 29569c2ba4edSLeon Romanovsky free_qp: 29579c2ba4edSLeon Romanovsky kfree(qp); 29585ce0592bSLeon Romanovsky free_ucmd: 2959f78d358cSLeon Romanovsky kfree(params.ucmd); 29609c2ba4edSLeon Romanovsky return ERR_PTR(err); 2961e126ba97SEli Cohen } 2962e126ba97SEli Cohen 2963776a3906SMoni Shoua static int mlx5_ib_destroy_dct(struct mlx5_ib_qp *mqp) 2964776a3906SMoni Shoua { 2965776a3906SMoni Shoua struct mlx5_ib_dev *dev = to_mdev(mqp->ibqp.device); 2966776a3906SMoni Shoua 2967776a3906SMoni Shoua if (mqp->state == IB_QPS_RTR) { 2968776a3906SMoni Shoua int err; 2969776a3906SMoni Shoua 2970333fbaa0SLeon Romanovsky err = mlx5_core_destroy_dct(dev, &mqp->dct.mdct); 2971776a3906SMoni Shoua if (err) { 2972776a3906SMoni Shoua mlx5_ib_warn(dev, "failed to destroy DCT %d\n", err); 2973776a3906SMoni Shoua return err; 2974776a3906SMoni Shoua } 2975776a3906SMoni Shoua } 2976776a3906SMoni Shoua 2977776a3906SMoni Shoua kfree(mqp->dct.in); 2978776a3906SMoni Shoua kfree(mqp); 2979776a3906SMoni Shoua return 0; 2980776a3906SMoni Shoua } 2981776a3906SMoni Shoua 2982c4367a26SShamir Rabinovitch int mlx5_ib_destroy_qp(struct ib_qp *qp, struct ib_udata *udata) 2983e126ba97SEli Cohen { 2984e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(qp->device); 2985e126ba97SEli Cohen struct mlx5_ib_qp *mqp = to_mqp(qp); 2986e126ba97SEli Cohen 2987d16e91daSHaggai Eran if (unlikely(qp->qp_type == IB_QPT_GSI)) 2988d16e91daSHaggai Eran return mlx5_ib_gsi_destroy_qp(qp); 2989d16e91daSHaggai Eran 29907aede1a2SLeon Romanovsky if (mqp->type == MLX5_IB_QPT_DCT) 2991776a3906SMoni Shoua return mlx5_ib_destroy_dct(mqp); 2992776a3906SMoni Shoua 2993bdeacabdSShamir Rabinovitch destroy_qp_common(dev, mqp, udata); 2994e126ba97SEli Cohen 2995e126ba97SEli Cohen kfree(mqp); 2996e126ba97SEli Cohen 2997e126ba97SEli Cohen return 0; 2998e126ba97SEli Cohen } 2999e126ba97SEli Cohen 3000a60109dcSYonatan Cohen static int to_mlx5_access_flags(struct mlx5_ib_qp *qp, 3001a60109dcSYonatan Cohen const struct ib_qp_attr *attr, 3002bf3b4f06SBart Van Assche int attr_mask, __be32 *hw_access_flags_be) 3003e126ba97SEli Cohen { 3004e126ba97SEli Cohen u8 dest_rd_atomic; 3005bf3b4f06SBart Van Assche u32 access_flags, hw_access_flags = 0; 3006e126ba97SEli Cohen 3007a60109dcSYonatan Cohen struct mlx5_ib_dev *dev = to_mdev(qp->ibqp.device); 3008a60109dcSYonatan Cohen 3009e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) 3010e126ba97SEli Cohen dest_rd_atomic = attr->max_dest_rd_atomic; 3011e126ba97SEli Cohen else 301219098df2Smajd@mellanox.com dest_rd_atomic = qp->trans_qp.resp_depth; 3013e126ba97SEli Cohen 3014e126ba97SEli Cohen if (attr_mask & IB_QP_ACCESS_FLAGS) 3015e126ba97SEli Cohen access_flags = attr->qp_access_flags; 3016e126ba97SEli Cohen else 301719098df2Smajd@mellanox.com access_flags = qp->trans_qp.atomic_rd_en; 3018e126ba97SEli Cohen 3019e126ba97SEli Cohen if (!dest_rd_atomic) 3020e126ba97SEli Cohen access_flags &= IB_ACCESS_REMOTE_WRITE; 3021e126ba97SEli Cohen 3022e126ba97SEli Cohen if (access_flags & IB_ACCESS_REMOTE_READ) 3023bf3b4f06SBart Van Assche hw_access_flags |= MLX5_QP_BIT_RRE; 302413f8d9c1SYonatan Cohen if (access_flags & IB_ACCESS_REMOTE_ATOMIC) { 3025a60109dcSYonatan Cohen int atomic_mode; 3026e126ba97SEli Cohen 3027a60109dcSYonatan Cohen atomic_mode = get_atomic_mode(dev, qp->ibqp.qp_type); 3028a60109dcSYonatan Cohen if (atomic_mode < 0) 3029a60109dcSYonatan Cohen return -EOPNOTSUPP; 3030a60109dcSYonatan Cohen 3031bf3b4f06SBart Van Assche hw_access_flags |= MLX5_QP_BIT_RAE; 3032bf3b4f06SBart Van Assche hw_access_flags |= atomic_mode << MLX5_ATOMIC_MODE_OFFSET; 3033a60109dcSYonatan Cohen } 3034a60109dcSYonatan Cohen 3035a60109dcSYonatan Cohen if (access_flags & IB_ACCESS_REMOTE_WRITE) 3036bf3b4f06SBart Van Assche hw_access_flags |= MLX5_QP_BIT_RWE; 3037a60109dcSYonatan Cohen 3038bf3b4f06SBart Van Assche *hw_access_flags_be = cpu_to_be32(hw_access_flags); 3039a60109dcSYonatan Cohen 3040a60109dcSYonatan Cohen return 0; 3041e126ba97SEli Cohen } 3042e126ba97SEli Cohen 3043e126ba97SEli Cohen enum { 3044e126ba97SEli Cohen MLX5_PATH_FLAG_FL = 1 << 0, 3045e126ba97SEli Cohen MLX5_PATH_FLAG_FREE_AR = 1 << 1, 3046e126ba97SEli Cohen MLX5_PATH_FLAG_COUNTER = 1 << 2, 3047e126ba97SEli Cohen }; 3048e126ba97SEli Cohen 3049e126ba97SEli Cohen static int ib_rate_to_mlx5(struct mlx5_ib_dev *dev, u8 rate) 3050e126ba97SEli Cohen { 30514f32ac2eSDanit Goldberg if (rate == IB_RATE_PORT_CURRENT) 3052e126ba97SEli Cohen return 0; 30534f32ac2eSDanit Goldberg 3054a5a5d199SMichael Guralnik if (rate < IB_RATE_2_5_GBPS || rate > IB_RATE_600_GBPS) 3055e126ba97SEli Cohen return -EINVAL; 30564f32ac2eSDanit Goldberg 30574f32ac2eSDanit Goldberg while (rate != IB_RATE_PORT_CURRENT && 3058e126ba97SEli Cohen !(1 << (rate + MLX5_STAT_RATE_OFFSET) & 3059938fe83cSSaeed Mahameed MLX5_CAP_GEN(dev->mdev, stat_rate_support))) 3060e126ba97SEli Cohen --rate; 3061e126ba97SEli Cohen 30624f32ac2eSDanit Goldberg return rate ? rate + MLX5_STAT_RATE_OFFSET : rate; 3063e126ba97SEli Cohen } 3064e126ba97SEli Cohen 306575850d0bSmajd@mellanox.com static int modify_raw_packet_eth_prio(struct mlx5_core_dev *dev, 30661cd6dbd3SYishai Hadas struct mlx5_ib_sq *sq, u8 sl, 30671cd6dbd3SYishai Hadas struct ib_pd *pd) 306875850d0bSmajd@mellanox.com { 306975850d0bSmajd@mellanox.com void *in; 307075850d0bSmajd@mellanox.com void *tisc; 307175850d0bSmajd@mellanox.com int inlen; 307275850d0bSmajd@mellanox.com int err; 307375850d0bSmajd@mellanox.com 307475850d0bSmajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(modify_tis_in); 30751b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 307675850d0bSmajd@mellanox.com if (!in) 307775850d0bSmajd@mellanox.com return -ENOMEM; 307875850d0bSmajd@mellanox.com 307975850d0bSmajd@mellanox.com MLX5_SET(modify_tis_in, in, bitmask.prio, 1); 30801cd6dbd3SYishai Hadas MLX5_SET(modify_tis_in, in, uid, to_mpd(pd)->uid); 308175850d0bSmajd@mellanox.com 308275850d0bSmajd@mellanox.com tisc = MLX5_ADDR_OF(modify_tis_in, in, ctx); 308375850d0bSmajd@mellanox.com MLX5_SET(tisc, tisc, prio, ((sl & 0x7) << 1)); 308475850d0bSmajd@mellanox.com 3085e0b4b472SLeon Romanovsky err = mlx5_core_modify_tis(dev, sq->tisn, in); 308675850d0bSmajd@mellanox.com 308775850d0bSmajd@mellanox.com kvfree(in); 308875850d0bSmajd@mellanox.com 308975850d0bSmajd@mellanox.com return err; 309075850d0bSmajd@mellanox.com } 309175850d0bSmajd@mellanox.com 309213eab21fSAviv Heller static int modify_raw_packet_tx_affinity(struct mlx5_core_dev *dev, 30931cd6dbd3SYishai Hadas struct mlx5_ib_sq *sq, u8 tx_affinity, 30941cd6dbd3SYishai Hadas struct ib_pd *pd) 309513eab21fSAviv Heller { 309613eab21fSAviv Heller void *in; 309713eab21fSAviv Heller void *tisc; 309813eab21fSAviv Heller int inlen; 309913eab21fSAviv Heller int err; 310013eab21fSAviv Heller 310113eab21fSAviv Heller inlen = MLX5_ST_SZ_BYTES(modify_tis_in); 31021b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 310313eab21fSAviv Heller if (!in) 310413eab21fSAviv Heller return -ENOMEM; 310513eab21fSAviv Heller 310613eab21fSAviv Heller MLX5_SET(modify_tis_in, in, bitmask.lag_tx_port_affinity, 1); 31071cd6dbd3SYishai Hadas MLX5_SET(modify_tis_in, in, uid, to_mpd(pd)->uid); 310813eab21fSAviv Heller 310913eab21fSAviv Heller tisc = MLX5_ADDR_OF(modify_tis_in, in, ctx); 311013eab21fSAviv Heller MLX5_SET(tisc, tisc, lag_tx_port_affinity, tx_affinity); 311113eab21fSAviv Heller 3112e0b4b472SLeon Romanovsky err = mlx5_core_modify_tis(dev, sq->tisn, in); 311313eab21fSAviv Heller 311413eab21fSAviv Heller kvfree(in); 311513eab21fSAviv Heller 311613eab21fSAviv Heller return err; 311713eab21fSAviv Heller } 311813eab21fSAviv Heller 311975850d0bSmajd@mellanox.com static int mlx5_set_path(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 312090898850SDasaratharaman Chandramouli const struct rdma_ah_attr *ah, 3121e126ba97SEli Cohen struct mlx5_qp_path *path, u8 port, int attr_mask, 3122f879ee8dSAchiad Shochat u32 path_flags, const struct ib_qp_attr *attr, 3123f879ee8dSAchiad Shochat bool alt) 3124e126ba97SEli Cohen { 3125d8966fcdSDasaratharaman Chandramouli const struct ib_global_route *grh = rdma_ah_read_grh(ah); 3126e126ba97SEli Cohen int err; 3127ed88451eSMajd Dibbiny enum ib_gid_type gid_type; 3128d8966fcdSDasaratharaman Chandramouli u8 ah_flags = rdma_ah_get_ah_flags(ah); 3129d8966fcdSDasaratharaman Chandramouli u8 sl = rdma_ah_get_sl(ah); 3130e126ba97SEli Cohen 3131e126ba97SEli Cohen if (attr_mask & IB_QP_PKEY_INDEX) 3132f879ee8dSAchiad Shochat path->pkey_index = cpu_to_be16(alt ? attr->alt_pkey_index : 3133f879ee8dSAchiad Shochat attr->pkey_index); 3134e126ba97SEli Cohen 3135d8966fcdSDasaratharaman Chandramouli if (ah_flags & IB_AH_GRH) { 3136d8966fcdSDasaratharaman Chandramouli if (grh->sgid_index >= 3137938fe83cSSaeed Mahameed dev->mdev->port_caps[port - 1].gid_table_len) { 3138f4f01b54SJoe Perches pr_err("sgid_index (%u) too large. max is %d\n", 3139d8966fcdSDasaratharaman Chandramouli grh->sgid_index, 3140938fe83cSSaeed Mahameed dev->mdev->port_caps[port - 1].gid_table_len); 3141f83b4263SEli Cohen return -EINVAL; 3142f83b4263SEli Cohen } 31432811ba51SAchiad Shochat } 314444c58487SDasaratharaman Chandramouli 314544c58487SDasaratharaman Chandramouli if (ah->type == RDMA_AH_ATTR_TYPE_ROCE) { 3146d8966fcdSDasaratharaman Chandramouli if (!(ah_flags & IB_AH_GRH)) 31472811ba51SAchiad Shochat return -EINVAL; 314847ec3866SParav Pandit 314944c58487SDasaratharaman Chandramouli memcpy(path->rmac, ah->roce.dmac, sizeof(ah->roce.dmac)); 31502b621851SMajd Dibbiny if (qp->ibqp.qp_type == IB_QPT_RC || 31512b621851SMajd Dibbiny qp->ibqp.qp_type == IB_QPT_UC || 31522b621851SMajd Dibbiny qp->ibqp.qp_type == IB_QPT_XRC_INI || 31532b621851SMajd Dibbiny qp->ibqp.qp_type == IB_QPT_XRC_TGT) 315447ec3866SParav Pandit path->udp_sport = 315547ec3866SParav Pandit mlx5_get_roce_udp_sport(dev, ah->grh.sgid_attr); 3156d8966fcdSDasaratharaman Chandramouli path->dci_cfi_prio_sl = (sl & 0x7) << 4; 315747ec3866SParav Pandit gid_type = ah->grh.sgid_attr->gid_type; 3158ed88451eSMajd Dibbiny if (gid_type == IB_GID_TYPE_ROCE_UDP_ENCAP) 3159d8966fcdSDasaratharaman Chandramouli path->ecn_dscp = (grh->traffic_class >> 2) & 0x3f; 31602811ba51SAchiad Shochat } else { 3161d3ae2bdeSNoa Osherovich path->fl_free_ar = (path_flags & MLX5_PATH_FLAG_FL) ? 0x80 : 0; 3162d3ae2bdeSNoa Osherovich path->fl_free_ar |= 3163d3ae2bdeSNoa Osherovich (path_flags & MLX5_PATH_FLAG_FREE_AR) ? 0x40 : 0; 3164d8966fcdSDasaratharaman Chandramouli path->rlid = cpu_to_be16(rdma_ah_get_dlid(ah)); 3165d8966fcdSDasaratharaman Chandramouli path->grh_mlid = rdma_ah_get_path_bits(ah) & 0x7f; 3166d8966fcdSDasaratharaman Chandramouli if (ah_flags & IB_AH_GRH) 3167e126ba97SEli Cohen path->grh_mlid |= 1 << 7; 3168d8966fcdSDasaratharaman Chandramouli path->dci_cfi_prio_sl = sl & 0xf; 31692811ba51SAchiad Shochat } 31702811ba51SAchiad Shochat 3171d8966fcdSDasaratharaman Chandramouli if (ah_flags & IB_AH_GRH) { 3172d8966fcdSDasaratharaman Chandramouli path->mgid_index = grh->sgid_index; 3173d8966fcdSDasaratharaman Chandramouli path->hop_limit = grh->hop_limit; 3174e126ba97SEli Cohen path->tclass_flowlabel = 3175d8966fcdSDasaratharaman Chandramouli cpu_to_be32((grh->traffic_class << 20) | 3176d8966fcdSDasaratharaman Chandramouli (grh->flow_label)); 3177d8966fcdSDasaratharaman Chandramouli memcpy(path->rgid, grh->dgid.raw, 16); 3178e126ba97SEli Cohen } 3179e126ba97SEli Cohen 3180d8966fcdSDasaratharaman Chandramouli err = ib_rate_to_mlx5(dev, rdma_ah_get_static_rate(ah)); 3181e126ba97SEli Cohen if (err < 0) 3182e126ba97SEli Cohen return err; 3183e126ba97SEli Cohen path->static_rate = err; 3184e126ba97SEli Cohen path->port = port; 3185e126ba97SEli Cohen 3186e126ba97SEli Cohen if (attr_mask & IB_QP_TIMEOUT) 3187f879ee8dSAchiad Shochat path->ackto_lt = (alt ? attr->alt_timeout : attr->timeout) << 3; 3188e126ba97SEli Cohen 318975850d0bSmajd@mellanox.com if ((qp->ibqp.qp_type == IB_QPT_RAW_PACKET) && qp->sq.wqe_cnt) 319075850d0bSmajd@mellanox.com return modify_raw_packet_eth_prio(dev->mdev, 319175850d0bSmajd@mellanox.com &qp->raw_packet_qp.sq, 31921cd6dbd3SYishai Hadas sl & 0xf, qp->ibqp.pd); 319375850d0bSmajd@mellanox.com 3194e126ba97SEli Cohen return 0; 3195e126ba97SEli Cohen } 3196e126ba97SEli Cohen 3197e126ba97SEli Cohen static enum mlx5_qp_optpar opt_mask[MLX5_QP_NUM_STATE][MLX5_QP_NUM_STATE][MLX5_QP_ST_MAX] = { 3198e126ba97SEli Cohen [MLX5_QP_STATE_INIT] = { 3199e126ba97SEli Cohen [MLX5_QP_STATE_INIT] = { 3200e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_RRE | 3201e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 3202e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 3203e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX | 3204e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT, 3205e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_RWE | 3206e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX | 3207e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT, 3208e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_PKEY_INDEX | 3209e126ba97SEli Cohen MLX5_QP_OPTPAR_Q_KEY | 3210e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT, 32118f4426aaSJack Morgenstein [MLX5_QP_ST_XRC] = MLX5_QP_OPTPAR_RRE | 32128f4426aaSJack Morgenstein MLX5_QP_OPTPAR_RAE | 32138f4426aaSJack Morgenstein MLX5_QP_OPTPAR_RWE | 32148f4426aaSJack Morgenstein MLX5_QP_OPTPAR_PKEY_INDEX | 32158f4426aaSJack Morgenstein MLX5_QP_OPTPAR_PRI_PORT, 3216e126ba97SEli Cohen }, 3217e126ba97SEli Cohen [MLX5_QP_STATE_RTR] = { 3218e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 3219e126ba97SEli Cohen MLX5_QP_OPTPAR_RRE | 3220e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 3221e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 3222e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX, 3223e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 3224e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 3225e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX, 3226e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_PKEY_INDEX | 3227e126ba97SEli Cohen MLX5_QP_OPTPAR_Q_KEY, 3228e126ba97SEli Cohen [MLX5_QP_ST_MLX] = MLX5_QP_OPTPAR_PKEY_INDEX | 3229e126ba97SEli Cohen MLX5_QP_OPTPAR_Q_KEY, 3230a4774e90SEli Cohen [MLX5_QP_ST_XRC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 3231a4774e90SEli Cohen MLX5_QP_OPTPAR_RRE | 3232a4774e90SEli Cohen MLX5_QP_OPTPAR_RAE | 3233a4774e90SEli Cohen MLX5_QP_OPTPAR_RWE | 3234a4774e90SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX, 3235e126ba97SEli Cohen }, 3236e126ba97SEli Cohen }, 3237e126ba97SEli Cohen [MLX5_QP_STATE_RTR] = { 3238e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 3239e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 3240e126ba97SEli Cohen MLX5_QP_OPTPAR_RRE | 3241e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 3242e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 3243e126ba97SEli Cohen MLX5_QP_OPTPAR_PM_STATE | 3244e126ba97SEli Cohen MLX5_QP_OPTPAR_RNR_TIMEOUT, 3245e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 3246e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 3247e126ba97SEli Cohen MLX5_QP_OPTPAR_PM_STATE, 3248e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_Q_KEY, 32498f4426aaSJack Morgenstein [MLX5_QP_ST_XRC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 32508f4426aaSJack Morgenstein MLX5_QP_OPTPAR_RRE | 32518f4426aaSJack Morgenstein MLX5_QP_OPTPAR_RAE | 32528f4426aaSJack Morgenstein MLX5_QP_OPTPAR_RWE | 32538f4426aaSJack Morgenstein MLX5_QP_OPTPAR_PM_STATE | 32548f4426aaSJack Morgenstein MLX5_QP_OPTPAR_RNR_TIMEOUT, 3255e126ba97SEli Cohen }, 3256e126ba97SEli Cohen }, 3257e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 3258e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 3259e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_RRE | 3260e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 3261e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 3262e126ba97SEli Cohen MLX5_QP_OPTPAR_RNR_TIMEOUT | 3263c2a3431eSEli Cohen MLX5_QP_OPTPAR_PM_STATE | 3264c2a3431eSEli Cohen MLX5_QP_OPTPAR_ALT_ADDR_PATH, 3265e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_RWE | 3266c2a3431eSEli Cohen MLX5_QP_OPTPAR_PM_STATE | 3267c2a3431eSEli Cohen MLX5_QP_OPTPAR_ALT_ADDR_PATH, 3268e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_Q_KEY | 3269e126ba97SEli Cohen MLX5_QP_OPTPAR_SRQN | 3270e126ba97SEli Cohen MLX5_QP_OPTPAR_CQN_RCV, 32718f4426aaSJack Morgenstein [MLX5_QP_ST_XRC] = MLX5_QP_OPTPAR_RRE | 32728f4426aaSJack Morgenstein MLX5_QP_OPTPAR_RAE | 32738f4426aaSJack Morgenstein MLX5_QP_OPTPAR_RWE | 32748f4426aaSJack Morgenstein MLX5_QP_OPTPAR_RNR_TIMEOUT | 32758f4426aaSJack Morgenstein MLX5_QP_OPTPAR_PM_STATE | 32768f4426aaSJack Morgenstein MLX5_QP_OPTPAR_ALT_ADDR_PATH, 3277e126ba97SEli Cohen }, 3278e126ba97SEli Cohen }, 3279e126ba97SEli Cohen [MLX5_QP_STATE_SQER] = { 3280e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 3281e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_Q_KEY, 3282e126ba97SEli Cohen [MLX5_QP_ST_MLX] = MLX5_QP_OPTPAR_Q_KEY, 328375959f56SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_RWE, 3284a4774e90SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_RNR_TIMEOUT | 3285a4774e90SEli Cohen MLX5_QP_OPTPAR_RWE | 3286a4774e90SEli Cohen MLX5_QP_OPTPAR_RAE | 3287a4774e90SEli Cohen MLX5_QP_OPTPAR_RRE, 32888f4426aaSJack Morgenstein [MLX5_QP_ST_XRC] = MLX5_QP_OPTPAR_RNR_TIMEOUT | 32898f4426aaSJack Morgenstein MLX5_QP_OPTPAR_RWE | 32908f4426aaSJack Morgenstein MLX5_QP_OPTPAR_RAE | 32918f4426aaSJack Morgenstein MLX5_QP_OPTPAR_RRE, 3292e126ba97SEli Cohen }, 3293e126ba97SEli Cohen }, 3294e126ba97SEli Cohen }; 3295e126ba97SEli Cohen 3296e126ba97SEli Cohen static int ib_nr_to_mlx5_nr(int ib_mask) 3297e126ba97SEli Cohen { 3298e126ba97SEli Cohen switch (ib_mask) { 3299e126ba97SEli Cohen case IB_QP_STATE: 3300e126ba97SEli Cohen return 0; 3301e126ba97SEli Cohen case IB_QP_CUR_STATE: 3302e126ba97SEli Cohen return 0; 3303e126ba97SEli Cohen case IB_QP_EN_SQD_ASYNC_NOTIFY: 3304e126ba97SEli Cohen return 0; 3305e126ba97SEli Cohen case IB_QP_ACCESS_FLAGS: 3306e126ba97SEli Cohen return MLX5_QP_OPTPAR_RWE | MLX5_QP_OPTPAR_RRE | 3307e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE; 3308e126ba97SEli Cohen case IB_QP_PKEY_INDEX: 3309e126ba97SEli Cohen return MLX5_QP_OPTPAR_PKEY_INDEX; 3310e126ba97SEli Cohen case IB_QP_PORT: 3311e126ba97SEli Cohen return MLX5_QP_OPTPAR_PRI_PORT; 3312e126ba97SEli Cohen case IB_QP_QKEY: 3313e126ba97SEli Cohen return MLX5_QP_OPTPAR_Q_KEY; 3314e126ba97SEli Cohen case IB_QP_AV: 3315e126ba97SEli Cohen return MLX5_QP_OPTPAR_PRIMARY_ADDR_PATH | 3316e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT; 3317e126ba97SEli Cohen case IB_QP_PATH_MTU: 3318e126ba97SEli Cohen return 0; 3319e126ba97SEli Cohen case IB_QP_TIMEOUT: 3320e126ba97SEli Cohen return MLX5_QP_OPTPAR_ACK_TIMEOUT; 3321e126ba97SEli Cohen case IB_QP_RETRY_CNT: 3322e126ba97SEli Cohen return MLX5_QP_OPTPAR_RETRY_COUNT; 3323e126ba97SEli Cohen case IB_QP_RNR_RETRY: 3324e126ba97SEli Cohen return MLX5_QP_OPTPAR_RNR_RETRY; 3325e126ba97SEli Cohen case IB_QP_RQ_PSN: 3326e126ba97SEli Cohen return 0; 3327e126ba97SEli Cohen case IB_QP_MAX_QP_RD_ATOMIC: 3328e126ba97SEli Cohen return MLX5_QP_OPTPAR_SRA_MAX; 3329e126ba97SEli Cohen case IB_QP_ALT_PATH: 3330e126ba97SEli Cohen return MLX5_QP_OPTPAR_ALT_ADDR_PATH; 3331e126ba97SEli Cohen case IB_QP_MIN_RNR_TIMER: 3332e126ba97SEli Cohen return MLX5_QP_OPTPAR_RNR_TIMEOUT; 3333e126ba97SEli Cohen case IB_QP_SQ_PSN: 3334e126ba97SEli Cohen return 0; 3335e126ba97SEli Cohen case IB_QP_MAX_DEST_RD_ATOMIC: 3336e126ba97SEli Cohen return MLX5_QP_OPTPAR_RRA_MAX | MLX5_QP_OPTPAR_RWE | 3337e126ba97SEli Cohen MLX5_QP_OPTPAR_RRE | MLX5_QP_OPTPAR_RAE; 3338e126ba97SEli Cohen case IB_QP_PATH_MIG_STATE: 3339e126ba97SEli Cohen return MLX5_QP_OPTPAR_PM_STATE; 3340e126ba97SEli Cohen case IB_QP_CAP: 3341e126ba97SEli Cohen return 0; 3342e126ba97SEli Cohen case IB_QP_DEST_QPN: 3343e126ba97SEli Cohen return 0; 3344e126ba97SEli Cohen } 3345e126ba97SEli Cohen return 0; 3346e126ba97SEli Cohen } 3347e126ba97SEli Cohen 3348e126ba97SEli Cohen static int ib_mask_to_mlx5_opt(int ib_mask) 3349e126ba97SEli Cohen { 3350e126ba97SEli Cohen int result = 0; 3351e126ba97SEli Cohen int i; 3352e126ba97SEli Cohen 3353e126ba97SEli Cohen for (i = 0; i < 8 * sizeof(int); i++) { 3354e126ba97SEli Cohen if ((1 << i) & ib_mask) 3355e126ba97SEli Cohen result |= ib_nr_to_mlx5_nr(1 << i); 3356e126ba97SEli Cohen } 3357e126ba97SEli Cohen 3358e126ba97SEli Cohen return result; 3359e126ba97SEli Cohen } 3360e126ba97SEli Cohen 336134d57585SYishai Hadas static int modify_raw_packet_qp_rq( 336234d57585SYishai Hadas struct mlx5_ib_dev *dev, struct mlx5_ib_rq *rq, int new_state, 336334d57585SYishai Hadas const struct mlx5_modify_raw_qp_param *raw_qp_param, struct ib_pd *pd) 3364ad5f8e96Smajd@mellanox.com { 3365ad5f8e96Smajd@mellanox.com void *in; 3366ad5f8e96Smajd@mellanox.com void *rqc; 3367ad5f8e96Smajd@mellanox.com int inlen; 3368ad5f8e96Smajd@mellanox.com int err; 3369ad5f8e96Smajd@mellanox.com 3370ad5f8e96Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(modify_rq_in); 33711b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 3372ad5f8e96Smajd@mellanox.com if (!in) 3373ad5f8e96Smajd@mellanox.com return -ENOMEM; 3374ad5f8e96Smajd@mellanox.com 3375ad5f8e96Smajd@mellanox.com MLX5_SET(modify_rq_in, in, rq_state, rq->state); 337634d57585SYishai Hadas MLX5_SET(modify_rq_in, in, uid, to_mpd(pd)->uid); 3377ad5f8e96Smajd@mellanox.com 3378ad5f8e96Smajd@mellanox.com rqc = MLX5_ADDR_OF(modify_rq_in, in, ctx); 3379ad5f8e96Smajd@mellanox.com MLX5_SET(rqc, rqc, state, new_state); 3380ad5f8e96Smajd@mellanox.com 3381eb49ab0cSAlex Vesker if (raw_qp_param->set_mask & MLX5_RAW_QP_MOD_SET_RQ_Q_CTR_ID) { 3382eb49ab0cSAlex Vesker if (MLX5_CAP_GEN(dev->mdev, modify_rq_counter_set_id)) { 3383eb49ab0cSAlex Vesker MLX5_SET64(modify_rq_in, in, modify_bitmask, 338423a6964eSMajd Dibbiny MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID); 3385eb49ab0cSAlex Vesker MLX5_SET(rqc, rqc, counter_set_id, raw_qp_param->rq_q_ctr_id); 3386eb49ab0cSAlex Vesker } else 33875a738b5dSJason Gunthorpe dev_info_once( 33885a738b5dSJason Gunthorpe &dev->ib_dev.dev, 33895a738b5dSJason Gunthorpe "RAW PACKET QP counters are not supported on current FW\n"); 3390eb49ab0cSAlex Vesker } 3391eb49ab0cSAlex Vesker 3392e0b4b472SLeon Romanovsky err = mlx5_core_modify_rq(dev->mdev, rq->base.mqp.qpn, in); 3393ad5f8e96Smajd@mellanox.com if (err) 3394ad5f8e96Smajd@mellanox.com goto out; 3395ad5f8e96Smajd@mellanox.com 3396ad5f8e96Smajd@mellanox.com rq->state = new_state; 3397ad5f8e96Smajd@mellanox.com 3398ad5f8e96Smajd@mellanox.com out: 3399ad5f8e96Smajd@mellanox.com kvfree(in); 3400ad5f8e96Smajd@mellanox.com return err; 3401ad5f8e96Smajd@mellanox.com } 3402ad5f8e96Smajd@mellanox.com 3403c14003f0SYishai Hadas static int modify_raw_packet_qp_sq( 3404c14003f0SYishai Hadas struct mlx5_core_dev *dev, struct mlx5_ib_sq *sq, int new_state, 3405c14003f0SYishai Hadas const struct mlx5_modify_raw_qp_param *raw_qp_param, struct ib_pd *pd) 3406ad5f8e96Smajd@mellanox.com { 34077d29f349SBodong Wang struct mlx5_ib_qp *ibqp = sq->base.container_mibqp; 340861147f39SBodong Wang struct mlx5_rate_limit old_rl = ibqp->rl; 340961147f39SBodong Wang struct mlx5_rate_limit new_rl = old_rl; 341061147f39SBodong Wang bool new_rate_added = false; 34117d29f349SBodong Wang u16 rl_index = 0; 3412ad5f8e96Smajd@mellanox.com void *in; 3413ad5f8e96Smajd@mellanox.com void *sqc; 3414ad5f8e96Smajd@mellanox.com int inlen; 3415ad5f8e96Smajd@mellanox.com int err; 3416ad5f8e96Smajd@mellanox.com 3417ad5f8e96Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(modify_sq_in); 34181b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 3419ad5f8e96Smajd@mellanox.com if (!in) 3420ad5f8e96Smajd@mellanox.com return -ENOMEM; 3421ad5f8e96Smajd@mellanox.com 3422c14003f0SYishai Hadas MLX5_SET(modify_sq_in, in, uid, to_mpd(pd)->uid); 3423ad5f8e96Smajd@mellanox.com MLX5_SET(modify_sq_in, in, sq_state, sq->state); 3424ad5f8e96Smajd@mellanox.com 3425ad5f8e96Smajd@mellanox.com sqc = MLX5_ADDR_OF(modify_sq_in, in, ctx); 3426ad5f8e96Smajd@mellanox.com MLX5_SET(sqc, sqc, state, new_state); 3427ad5f8e96Smajd@mellanox.com 34287d29f349SBodong Wang if (raw_qp_param->set_mask & MLX5_RAW_QP_RATE_LIMIT) { 34297d29f349SBodong Wang if (new_state != MLX5_SQC_STATE_RDY) 34307d29f349SBodong Wang pr_warn("%s: Rate limit can only be changed when SQ is moving to RDY\n", 34317d29f349SBodong Wang __func__); 34327d29f349SBodong Wang else 343361147f39SBodong Wang new_rl = raw_qp_param->rl; 34347d29f349SBodong Wang } 3435ad5f8e96Smajd@mellanox.com 343661147f39SBodong Wang if (!mlx5_rl_are_equal(&old_rl, &new_rl)) { 343761147f39SBodong Wang if (new_rl.rate) { 343861147f39SBodong Wang err = mlx5_rl_add_rate(dev, &rl_index, &new_rl); 34397d29f349SBodong Wang if (err) { 344061147f39SBodong Wang pr_err("Failed configuring rate limit(err %d): \ 344161147f39SBodong Wang rate %u, max_burst_sz %u, typical_pkt_sz %u\n", 344261147f39SBodong Wang err, new_rl.rate, new_rl.max_burst_sz, 344361147f39SBodong Wang new_rl.typical_pkt_sz); 344461147f39SBodong Wang 34457d29f349SBodong Wang goto out; 34467d29f349SBodong Wang } 344761147f39SBodong Wang new_rate_added = true; 34487d29f349SBodong Wang } 34497d29f349SBodong Wang 34507d29f349SBodong Wang MLX5_SET64(modify_sq_in, in, modify_bitmask, 1); 345161147f39SBodong Wang /* index 0 means no limit */ 34527d29f349SBodong Wang MLX5_SET(sqc, sqc, packet_pacing_rate_limit_index, rl_index); 34537d29f349SBodong Wang } 34547d29f349SBodong Wang 3455e0b4b472SLeon Romanovsky err = mlx5_core_modify_sq(dev, sq->base.mqp.qpn, in); 34567d29f349SBodong Wang if (err) { 34577d29f349SBodong Wang /* Remove new rate from table if failed */ 345861147f39SBodong Wang if (new_rate_added) 345961147f39SBodong Wang mlx5_rl_remove_rate(dev, &new_rl); 34607d29f349SBodong Wang goto out; 34617d29f349SBodong Wang } 34627d29f349SBodong Wang 34637d29f349SBodong Wang /* Only remove the old rate after new rate was set */ 3464c8973df2SRafi Wiener if ((old_rl.rate && !mlx5_rl_are_equal(&old_rl, &new_rl)) || 3465c8973df2SRafi Wiener (new_state != MLX5_SQC_STATE_RDY)) { 346661147f39SBodong Wang mlx5_rl_remove_rate(dev, &old_rl); 3467c8973df2SRafi Wiener if (new_state != MLX5_SQC_STATE_RDY) 3468c8973df2SRafi Wiener memset(&new_rl, 0, sizeof(new_rl)); 3469c8973df2SRafi Wiener } 34707d29f349SBodong Wang 347161147f39SBodong Wang ibqp->rl = new_rl; 3472ad5f8e96Smajd@mellanox.com sq->state = new_state; 3473ad5f8e96Smajd@mellanox.com 3474ad5f8e96Smajd@mellanox.com out: 3475ad5f8e96Smajd@mellanox.com kvfree(in); 3476ad5f8e96Smajd@mellanox.com return err; 3477ad5f8e96Smajd@mellanox.com } 3478ad5f8e96Smajd@mellanox.com 3479ad5f8e96Smajd@mellanox.com static int modify_raw_packet_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 348013eab21fSAviv Heller const struct mlx5_modify_raw_qp_param *raw_qp_param, 348113eab21fSAviv Heller u8 tx_affinity) 3482ad5f8e96Smajd@mellanox.com { 3483ad5f8e96Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 3484ad5f8e96Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 3485ad5f8e96Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 34867d29f349SBodong Wang int modify_rq = !!qp->rq.wqe_cnt; 34877d29f349SBodong Wang int modify_sq = !!qp->sq.wqe_cnt; 3488ad5f8e96Smajd@mellanox.com int rq_state; 3489ad5f8e96Smajd@mellanox.com int sq_state; 3490ad5f8e96Smajd@mellanox.com int err; 3491ad5f8e96Smajd@mellanox.com 34920680efa2SAlex Vesker switch (raw_qp_param->operation) { 3493ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_RST2INIT_QP: 3494ad5f8e96Smajd@mellanox.com rq_state = MLX5_RQC_STATE_RDY; 3495ad5f8e96Smajd@mellanox.com sq_state = MLX5_SQC_STATE_RDY; 3496ad5f8e96Smajd@mellanox.com break; 3497ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_2ERR_QP: 3498ad5f8e96Smajd@mellanox.com rq_state = MLX5_RQC_STATE_ERR; 3499ad5f8e96Smajd@mellanox.com sq_state = MLX5_SQC_STATE_ERR; 3500ad5f8e96Smajd@mellanox.com break; 3501ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_2RST_QP: 3502ad5f8e96Smajd@mellanox.com rq_state = MLX5_RQC_STATE_RST; 3503ad5f8e96Smajd@mellanox.com sq_state = MLX5_SQC_STATE_RST; 3504ad5f8e96Smajd@mellanox.com break; 3505ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_RTR2RTS_QP: 3506ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_RTS2RTS_QP: 35077d29f349SBodong Wang if (raw_qp_param->set_mask == 35087d29f349SBodong Wang MLX5_RAW_QP_RATE_LIMIT) { 35097d29f349SBodong Wang modify_rq = 0; 35107d29f349SBodong Wang sq_state = sq->state; 35117d29f349SBodong Wang } else { 35127d29f349SBodong Wang return raw_qp_param->set_mask ? -EINVAL : 0; 35137d29f349SBodong Wang } 35147d29f349SBodong Wang break; 35157d29f349SBodong Wang case MLX5_CMD_OP_INIT2INIT_QP: 35167d29f349SBodong Wang case MLX5_CMD_OP_INIT2RTR_QP: 3517eb49ab0cSAlex Vesker if (raw_qp_param->set_mask) 3518eb49ab0cSAlex Vesker return -EINVAL; 3519eb49ab0cSAlex Vesker else 3520ad5f8e96Smajd@mellanox.com return 0; 3521ad5f8e96Smajd@mellanox.com default: 3522ad5f8e96Smajd@mellanox.com WARN_ON(1); 3523ad5f8e96Smajd@mellanox.com return -EINVAL; 3524ad5f8e96Smajd@mellanox.com } 3525ad5f8e96Smajd@mellanox.com 35267d29f349SBodong Wang if (modify_rq) { 352734d57585SYishai Hadas err = modify_raw_packet_qp_rq(dev, rq, rq_state, raw_qp_param, 352834d57585SYishai Hadas qp->ibqp.pd); 3529ad5f8e96Smajd@mellanox.com if (err) 3530ad5f8e96Smajd@mellanox.com return err; 3531ad5f8e96Smajd@mellanox.com } 3532ad5f8e96Smajd@mellanox.com 35337d29f349SBodong Wang if (modify_sq) { 3534d5ed8ac3SMark Bloch struct mlx5_flow_handle *flow_rule; 3535d5ed8ac3SMark Bloch 353613eab21fSAviv Heller if (tx_affinity) { 353713eab21fSAviv Heller err = modify_raw_packet_tx_affinity(dev->mdev, sq, 35381cd6dbd3SYishai Hadas tx_affinity, 35391cd6dbd3SYishai Hadas qp->ibqp.pd); 354013eab21fSAviv Heller if (err) 354113eab21fSAviv Heller return err; 354213eab21fSAviv Heller } 354313eab21fSAviv Heller 3544d5ed8ac3SMark Bloch flow_rule = create_flow_rule_vport_sq(dev, sq, 3545d5ed8ac3SMark Bloch raw_qp_param->port); 3546d5ed8ac3SMark Bloch if (IS_ERR(flow_rule)) 35471db86318SColin Ian King return PTR_ERR(flow_rule); 3548d5ed8ac3SMark Bloch 3549d5ed8ac3SMark Bloch err = modify_raw_packet_qp_sq(dev->mdev, sq, sq_state, 3550c14003f0SYishai Hadas raw_qp_param, qp->ibqp.pd); 3551d5ed8ac3SMark Bloch if (err) { 3552d5ed8ac3SMark Bloch if (flow_rule) 3553d5ed8ac3SMark Bloch mlx5_del_flow_rules(flow_rule); 3554d5ed8ac3SMark Bloch return err; 3555d5ed8ac3SMark Bloch } 3556d5ed8ac3SMark Bloch 3557d5ed8ac3SMark Bloch if (flow_rule) { 3558d5ed8ac3SMark Bloch destroy_flow_rule_vport_sq(sq); 3559d5ed8ac3SMark Bloch sq->flow_rule = flow_rule; 3560d5ed8ac3SMark Bloch } 3561d5ed8ac3SMark Bloch 3562d5ed8ac3SMark Bloch return err; 356313eab21fSAviv Heller } 3564ad5f8e96Smajd@mellanox.com 3565ad5f8e96Smajd@mellanox.com return 0; 3566ad5f8e96Smajd@mellanox.com } 3567ad5f8e96Smajd@mellanox.com 3568c6a21c38SMajd Dibbiny static unsigned int get_tx_affinity(struct mlx5_ib_dev *dev, 3569c6a21c38SMajd Dibbiny struct mlx5_ib_pd *pd, 3570c6a21c38SMajd Dibbiny struct mlx5_ib_qp_base *qp_base, 357189944450SShamir Rabinovitch u8 port_num, struct ib_udata *udata) 3572c6a21c38SMajd Dibbiny { 357389944450SShamir Rabinovitch struct mlx5_ib_ucontext *ucontext = rdma_udata_to_drv_context( 357489944450SShamir Rabinovitch udata, struct mlx5_ib_ucontext, ibucontext); 3575c6a21c38SMajd Dibbiny unsigned int tx_port_affinity; 3576c6a21c38SMajd Dibbiny 3577c6a21c38SMajd Dibbiny if (ucontext) { 3578c6a21c38SMajd Dibbiny tx_port_affinity = (unsigned int)atomic_add_return( 3579c6a21c38SMajd Dibbiny 1, &ucontext->tx_port_affinity) % 3580c6a21c38SMajd Dibbiny MLX5_MAX_PORTS + 3581c6a21c38SMajd Dibbiny 1; 3582c6a21c38SMajd Dibbiny mlx5_ib_dbg(dev, "Set tx affinity 0x%x to qpn 0x%x ucontext %p\n", 3583c6a21c38SMajd Dibbiny tx_port_affinity, qp_base->mqp.qpn, ucontext); 3584c6a21c38SMajd Dibbiny } else { 3585c6a21c38SMajd Dibbiny tx_port_affinity = 3586c6a21c38SMajd Dibbiny (unsigned int)atomic_add_return( 358795579e78SMark Bloch 1, &dev->port[port_num].roce.tx_port_affinity) % 3588c6a21c38SMajd Dibbiny MLX5_MAX_PORTS + 3589c6a21c38SMajd Dibbiny 1; 3590c6a21c38SMajd Dibbiny mlx5_ib_dbg(dev, "Set tx affinity 0x%x to qpn 0x%x\n", 3591c6a21c38SMajd Dibbiny tx_port_affinity, qp_base->mqp.qpn); 3592c6a21c38SMajd Dibbiny } 3593c6a21c38SMajd Dibbiny 3594c6a21c38SMajd Dibbiny return tx_port_affinity; 3595c6a21c38SMajd Dibbiny } 3596c6a21c38SMajd Dibbiny 3597d14133ddSMark Zhang static int __mlx5_ib_qp_set_counter(struct ib_qp *qp, 3598d14133ddSMark Zhang struct rdma_counter *counter) 3599d14133ddSMark Zhang { 3600d14133ddSMark Zhang struct mlx5_ib_dev *dev = to_mdev(qp->device); 3601d14133ddSMark Zhang struct mlx5_ib_qp *mqp = to_mqp(qp); 3602d14133ddSMark Zhang struct mlx5_qp_context context = {}; 3603d14133ddSMark Zhang struct mlx5_ib_qp_base *base; 3604d14133ddSMark Zhang u32 set_id; 3605d14133ddSMark Zhang 36063e1f000fSParav Pandit if (counter) 3607d14133ddSMark Zhang set_id = counter->id; 36083e1f000fSParav Pandit else 36093e1f000fSParav Pandit set_id = mlx5_ib_get_counters_id(dev, mqp->port - 1); 3610d14133ddSMark Zhang 3611d14133ddSMark Zhang base = &mqp->trans_qp.base; 3612d14133ddSMark Zhang context.qp_counter_set_usr_page &= cpu_to_be32(0xffffff); 3613d14133ddSMark Zhang context.qp_counter_set_usr_page |= cpu_to_be32(set_id << 24); 3614333fbaa0SLeon Romanovsky return mlx5_core_qp_modify(dev, MLX5_CMD_OP_RTS2RTS_QP, 3615333fbaa0SLeon Romanovsky MLX5_QP_OPTPAR_COUNTER_SET_ID, &context, 3616333fbaa0SLeon Romanovsky &base->mqp); 3617d14133ddSMark Zhang } 3618d14133ddSMark Zhang 3619e126ba97SEli Cohen static int __mlx5_ib_modify_qp(struct ib_qp *ibqp, 3620e126ba97SEli Cohen const struct ib_qp_attr *attr, int attr_mask, 362189944450SShamir Rabinovitch enum ib_qp_state cur_state, 362289944450SShamir Rabinovitch enum ib_qp_state new_state, 362389944450SShamir Rabinovitch const struct mlx5_ib_modify_qp *ucmd, 362489944450SShamir Rabinovitch struct ib_udata *udata) 3625e126ba97SEli Cohen { 3626427c1e7bSmajd@mellanox.com static const u16 optab[MLX5_QP_NUM_STATE][MLX5_QP_NUM_STATE] = { 3627427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = { 3628427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3629427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3630427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_INIT] = MLX5_CMD_OP_RST2INIT_QP, 3631427c1e7bSmajd@mellanox.com }, 3632427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_INIT] = { 3633427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3634427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3635427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_INIT] = MLX5_CMD_OP_INIT2INIT_QP, 3636427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTR] = MLX5_CMD_OP_INIT2RTR_QP, 3637427c1e7bSmajd@mellanox.com }, 3638427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTR] = { 3639427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3640427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3641427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = MLX5_CMD_OP_RTR2RTS_QP, 3642427c1e7bSmajd@mellanox.com }, 3643427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = { 3644427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3645427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3646427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = MLX5_CMD_OP_RTS2RTS_QP, 3647427c1e7bSmajd@mellanox.com }, 3648427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_SQD] = { 3649427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3650427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3651427c1e7bSmajd@mellanox.com }, 3652427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_SQER] = { 3653427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3654427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3655427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = MLX5_CMD_OP_SQERR2RTS_QP, 3656427c1e7bSmajd@mellanox.com }, 3657427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = { 3658427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3659427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3660427c1e7bSmajd@mellanox.com } 3661427c1e7bSmajd@mellanox.com }; 3662427c1e7bSmajd@mellanox.com 3663e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 3664e126ba97SEli Cohen struct mlx5_ib_qp *qp = to_mqp(ibqp); 366519098df2Smajd@mellanox.com struct mlx5_ib_qp_base *base = &qp->trans_qp.base; 3666e126ba97SEli Cohen struct mlx5_ib_cq *send_cq, *recv_cq; 3667e126ba97SEli Cohen struct mlx5_qp_context *context; 3668e126ba97SEli Cohen struct mlx5_ib_pd *pd; 3669e126ba97SEli Cohen enum mlx5_qp_state mlx5_cur, mlx5_new; 3670e126ba97SEli Cohen enum mlx5_qp_optpar optpar; 3671d14133ddSMark Zhang u32 set_id = 0; 3672e126ba97SEli Cohen int mlx5_st; 3673e126ba97SEli Cohen int err; 3674427c1e7bSmajd@mellanox.com u16 op; 367513eab21fSAviv Heller u8 tx_affinity = 0; 3676e126ba97SEli Cohen 36777aede1a2SLeon Romanovsky mlx5_st = to_mlx5_st(qp->type); 367855de9a77SLeon Romanovsky if (mlx5_st < 0) 367955de9a77SLeon Romanovsky return -EINVAL; 368055de9a77SLeon Romanovsky 36811a412fb1SSaeed Mahameed context = kzalloc(sizeof(*context), GFP_KERNEL); 36821a412fb1SSaeed Mahameed if (!context) 3683e126ba97SEli Cohen return -ENOMEM; 3684e126ba97SEli Cohen 3685c6a21c38SMajd Dibbiny pd = get_pd(qp); 368655de9a77SLeon Romanovsky context->flags = cpu_to_be32(mlx5_st << 16); 3687e126ba97SEli Cohen 3688e126ba97SEli Cohen if (!(attr_mask & IB_QP_PATH_MIG_STATE)) { 3689e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_MIGRATED << 11); 3690e126ba97SEli Cohen } else { 3691e126ba97SEli Cohen switch (attr->path_mig_state) { 3692e126ba97SEli Cohen case IB_MIG_MIGRATED: 3693e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_MIGRATED << 11); 3694e126ba97SEli Cohen break; 3695e126ba97SEli Cohen case IB_MIG_REARM: 3696e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_REARM << 11); 3697e126ba97SEli Cohen break; 3698e126ba97SEli Cohen case IB_MIG_ARMED: 3699e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_ARMED << 11); 3700e126ba97SEli Cohen break; 3701e126ba97SEli Cohen } 3702e126ba97SEli Cohen } 3703e126ba97SEli Cohen 370413eab21fSAviv Heller if ((cur_state == IB_QPS_RESET) && (new_state == IB_QPS_INIT)) { 370513eab21fSAviv Heller if ((ibqp->qp_type == IB_QPT_RC) || 370613eab21fSAviv Heller (ibqp->qp_type == IB_QPT_UD && 37072be08c30SLeon Romanovsky !(qp->flags & MLX5_IB_QP_CREATE_SQPN_QP1)) || 370813eab21fSAviv Heller (ibqp->qp_type == IB_QPT_UC) || 370913eab21fSAviv Heller (ibqp->qp_type == IB_QPT_RAW_PACKET) || 371013eab21fSAviv Heller (ibqp->qp_type == IB_QPT_XRC_INI) || 371113eab21fSAviv Heller (ibqp->qp_type == IB_QPT_XRC_TGT)) { 37127c34ec19SAviv Heller if (dev->lag_active) { 371395579e78SMark Bloch u8 p = mlx5_core_native_port_num(dev->mdev) - 1; 371489944450SShamir Rabinovitch tx_affinity = get_tx_affinity(dev, pd, base, p, 371589944450SShamir Rabinovitch udata); 371613eab21fSAviv Heller context->flags |= cpu_to_be32(tx_affinity << 24); 371713eab21fSAviv Heller } 371813eab21fSAviv Heller } 371913eab21fSAviv Heller } 372013eab21fSAviv Heller 3721d16e91daSHaggai Eran if (is_sqp(ibqp->qp_type)) { 3722e126ba97SEli Cohen context->mtu_msgmax = (IB_MTU_256 << 5) | 8; 3723c2e53b2cSYishai Hadas } else if ((ibqp->qp_type == IB_QPT_UD && 37242be08c30SLeon Romanovsky !(qp->flags & IB_QP_CREATE_SOURCE_QPN)) || 3725e126ba97SEli Cohen ibqp->qp_type == MLX5_IB_QPT_REG_UMR) { 3726e126ba97SEli Cohen context->mtu_msgmax = (IB_MTU_4096 << 5) | 12; 3727e126ba97SEli Cohen } else if (attr_mask & IB_QP_PATH_MTU) { 3728e126ba97SEli Cohen if (attr->path_mtu < IB_MTU_256 || 3729e126ba97SEli Cohen attr->path_mtu > IB_MTU_4096) { 3730e126ba97SEli Cohen mlx5_ib_warn(dev, "invalid mtu %d\n", attr->path_mtu); 3731e126ba97SEli Cohen err = -EINVAL; 3732e126ba97SEli Cohen goto out; 3733e126ba97SEli Cohen } 3734938fe83cSSaeed Mahameed context->mtu_msgmax = (attr->path_mtu << 5) | 3735938fe83cSSaeed Mahameed (u8)MLX5_CAP_GEN(dev->mdev, log_max_msg); 3736e126ba97SEli Cohen } 3737e126ba97SEli Cohen 3738e126ba97SEli Cohen if (attr_mask & IB_QP_DEST_QPN) 3739e126ba97SEli Cohen context->log_pg_sz_remote_qpn = cpu_to_be32(attr->dest_qp_num); 3740e126ba97SEli Cohen 3741e126ba97SEli Cohen if (attr_mask & IB_QP_PKEY_INDEX) 3742d3ae2bdeSNoa Osherovich context->pri_path.pkey_index = cpu_to_be16(attr->pkey_index); 3743e126ba97SEli Cohen 3744e126ba97SEli Cohen /* todo implement counter_index functionality */ 3745e126ba97SEli Cohen 3746e126ba97SEli Cohen if (is_sqp(ibqp->qp_type)) 3747e126ba97SEli Cohen context->pri_path.port = qp->port; 3748e126ba97SEli Cohen 3749e126ba97SEli Cohen if (attr_mask & IB_QP_PORT) 3750e126ba97SEli Cohen context->pri_path.port = attr->port_num; 3751e126ba97SEli Cohen 3752e126ba97SEli Cohen if (attr_mask & IB_QP_AV) { 375375850d0bSmajd@mellanox.com err = mlx5_set_path(dev, qp, &attr->ah_attr, &context->pri_path, 3754e126ba97SEli Cohen attr_mask & IB_QP_PORT ? attr->port_num : qp->port, 3755f879ee8dSAchiad Shochat attr_mask, 0, attr, false); 3756e126ba97SEli Cohen if (err) 3757e126ba97SEli Cohen goto out; 3758e126ba97SEli Cohen } 3759e126ba97SEli Cohen 3760e126ba97SEli Cohen if (attr_mask & IB_QP_TIMEOUT) 3761e126ba97SEli Cohen context->pri_path.ackto_lt |= attr->timeout << 3; 3762e126ba97SEli Cohen 3763e126ba97SEli Cohen if (attr_mask & IB_QP_ALT_PATH) { 376475850d0bSmajd@mellanox.com err = mlx5_set_path(dev, qp, &attr->alt_ah_attr, 376575850d0bSmajd@mellanox.com &context->alt_path, 3766f879ee8dSAchiad Shochat attr->alt_port_num, 3767f879ee8dSAchiad Shochat attr_mask | IB_QP_PKEY_INDEX | IB_QP_TIMEOUT, 3768f879ee8dSAchiad Shochat 0, attr, true); 3769e126ba97SEli Cohen if (err) 3770e126ba97SEli Cohen goto out; 3771e126ba97SEli Cohen } 3772e126ba97SEli Cohen 377389ea94a7SMaor Gottlieb get_cqs(qp->ibqp.qp_type, qp->ibqp.send_cq, qp->ibqp.recv_cq, 377489ea94a7SMaor Gottlieb &send_cq, &recv_cq); 3775e126ba97SEli Cohen 3776e126ba97SEli Cohen context->flags_pd = cpu_to_be32(pd ? pd->pdn : to_mpd(dev->devr.p0)->pdn); 3777e126ba97SEli Cohen context->cqn_send = send_cq ? cpu_to_be32(send_cq->mcq.cqn) : 0; 3778e126ba97SEli Cohen context->cqn_recv = recv_cq ? cpu_to_be32(recv_cq->mcq.cqn) : 0; 3779e126ba97SEli Cohen context->params1 = cpu_to_be32(MLX5_IB_ACK_REQ_FREQ << 28); 3780e126ba97SEli Cohen 3781e126ba97SEli Cohen if (attr_mask & IB_QP_RNR_RETRY) 3782e126ba97SEli Cohen context->params1 |= cpu_to_be32(attr->rnr_retry << 13); 3783e126ba97SEli Cohen 3784e126ba97SEli Cohen if (attr_mask & IB_QP_RETRY_CNT) 3785e126ba97SEli Cohen context->params1 |= cpu_to_be32(attr->retry_cnt << 16); 3786e126ba97SEli Cohen 3787e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC) { 3788e126ba97SEli Cohen if (attr->max_rd_atomic) 3789e126ba97SEli Cohen context->params1 |= 3790e126ba97SEli Cohen cpu_to_be32(fls(attr->max_rd_atomic - 1) << 21); 3791e126ba97SEli Cohen } 3792e126ba97SEli Cohen 3793e126ba97SEli Cohen if (attr_mask & IB_QP_SQ_PSN) 3794e126ba97SEli Cohen context->next_send_psn = cpu_to_be32(attr->sq_psn); 3795e126ba97SEli Cohen 3796e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) { 3797e126ba97SEli Cohen if (attr->max_dest_rd_atomic) 3798e126ba97SEli Cohen context->params2 |= 3799e126ba97SEli Cohen cpu_to_be32(fls(attr->max_dest_rd_atomic - 1) << 21); 3800e126ba97SEli Cohen } 3801e126ba97SEli Cohen 3802a60109dcSYonatan Cohen if (attr_mask & (IB_QP_ACCESS_FLAGS | IB_QP_MAX_DEST_RD_ATOMIC)) { 3803bf3b4f06SBart Van Assche __be32 access_flags; 3804a60109dcSYonatan Cohen 3805a60109dcSYonatan Cohen err = to_mlx5_access_flags(qp, attr, attr_mask, &access_flags); 3806a60109dcSYonatan Cohen if (err) 3807a60109dcSYonatan Cohen goto out; 3808a60109dcSYonatan Cohen 3809a60109dcSYonatan Cohen context->params2 |= access_flags; 3810a60109dcSYonatan Cohen } 3811e126ba97SEli Cohen 3812e126ba97SEli Cohen if (attr_mask & IB_QP_MIN_RNR_TIMER) 3813e126ba97SEli Cohen context->rnr_nextrecvpsn |= cpu_to_be32(attr->min_rnr_timer << 24); 3814e126ba97SEli Cohen 3815e126ba97SEli Cohen if (attr_mask & IB_QP_RQ_PSN) 3816e126ba97SEli Cohen context->rnr_nextrecvpsn |= cpu_to_be32(attr->rq_psn); 3817e126ba97SEli Cohen 3818e126ba97SEli Cohen if (attr_mask & IB_QP_QKEY) 3819e126ba97SEli Cohen context->qkey = cpu_to_be32(attr->qkey); 3820e126ba97SEli Cohen 3821e126ba97SEli Cohen if (qp->rq.wqe_cnt && cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) 3822e126ba97SEli Cohen context->db_rec_addr = cpu_to_be64(qp->db.dma); 3823e126ba97SEli Cohen 38240837e86aSMark Bloch if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { 38250837e86aSMark Bloch u8 port_num = (attr_mask & IB_QP_PORT ? attr->port_num : 38260837e86aSMark Bloch qp->port) - 1; 3827c2e53b2cSYishai Hadas 3828c2e53b2cSYishai Hadas /* Underlay port should be used - index 0 function per port */ 38292be08c30SLeon Romanovsky if (qp->flags & IB_QP_CREATE_SOURCE_QPN) 3830c2e53b2cSYishai Hadas port_num = 0; 3831c2e53b2cSYishai Hadas 3832d14133ddSMark Zhang if (ibqp->counter) 3833d14133ddSMark Zhang set_id = ibqp->counter->id; 3834d14133ddSMark Zhang else 38353e1f000fSParav Pandit set_id = mlx5_ib_get_counters_id(dev, port_num); 38360837e86aSMark Bloch context->qp_counter_set_usr_page |= 3837d14133ddSMark Zhang cpu_to_be32(set_id << 24); 38380837e86aSMark Bloch } 38390837e86aSMark Bloch 3840e126ba97SEli Cohen if (!ibqp->uobject && cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) 3841e126ba97SEli Cohen context->sq_crq_size |= cpu_to_be16(1 << 4); 3842e126ba97SEli Cohen 38432be08c30SLeon Romanovsky if (qp->flags & MLX5_IB_QP_CREATE_SQPN_QP1) 3844b11a4f9cSHaggai Eran context->deth_sqpn = cpu_to_be32(1); 3845e126ba97SEli Cohen 3846e126ba97SEli Cohen mlx5_cur = to_mlx5_state(cur_state); 3847e126ba97SEli Cohen mlx5_new = to_mlx5_state(new_state); 3848e126ba97SEli Cohen 3849427c1e7bSmajd@mellanox.com if (mlx5_cur >= MLX5_QP_NUM_STATE || mlx5_new >= MLX5_QP_NUM_STATE || 38505d414b17SDan Carpenter !optab[mlx5_cur][mlx5_new]) { 38515d414b17SDan Carpenter err = -EINVAL; 3852427c1e7bSmajd@mellanox.com goto out; 38535d414b17SDan Carpenter } 3854427c1e7bSmajd@mellanox.com 3855427c1e7bSmajd@mellanox.com op = optab[mlx5_cur][mlx5_new]; 3856e126ba97SEli Cohen optpar = ib_mask_to_mlx5_opt(attr_mask); 3857e126ba97SEli Cohen optpar &= opt_mask[mlx5_cur][mlx5_new][mlx5_st]; 3858ad5f8e96Smajd@mellanox.com 3859c2e53b2cSYishai Hadas if (qp->ibqp.qp_type == IB_QPT_RAW_PACKET || 38602be08c30SLeon Romanovsky qp->flags & IB_QP_CREATE_SOURCE_QPN) { 38610680efa2SAlex Vesker struct mlx5_modify_raw_qp_param raw_qp_param = {}; 38620680efa2SAlex Vesker 38630680efa2SAlex Vesker raw_qp_param.operation = op; 3864eb49ab0cSAlex Vesker if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { 3865d14133ddSMark Zhang raw_qp_param.rq_q_ctr_id = set_id; 3866eb49ab0cSAlex Vesker raw_qp_param.set_mask |= MLX5_RAW_QP_MOD_SET_RQ_Q_CTR_ID; 3867eb49ab0cSAlex Vesker } 38687d29f349SBodong Wang 3869d5ed8ac3SMark Bloch if (attr_mask & IB_QP_PORT) 3870d5ed8ac3SMark Bloch raw_qp_param.port = attr->port_num; 3871d5ed8ac3SMark Bloch 38727d29f349SBodong Wang if (attr_mask & IB_QP_RATE_LIMIT) { 387361147f39SBodong Wang raw_qp_param.rl.rate = attr->rate_limit; 387461147f39SBodong Wang 387561147f39SBodong Wang if (ucmd->burst_info.max_burst_sz) { 387661147f39SBodong Wang if (attr->rate_limit && 387761147f39SBodong Wang MLX5_CAP_QOS(dev->mdev, packet_pacing_burst_bound)) { 387861147f39SBodong Wang raw_qp_param.rl.max_burst_sz = 387961147f39SBodong Wang ucmd->burst_info.max_burst_sz; 388061147f39SBodong Wang } else { 388161147f39SBodong Wang err = -EINVAL; 388261147f39SBodong Wang goto out; 388361147f39SBodong Wang } 388461147f39SBodong Wang } 388561147f39SBodong Wang 388661147f39SBodong Wang if (ucmd->burst_info.typical_pkt_sz) { 388761147f39SBodong Wang if (attr->rate_limit && 388861147f39SBodong Wang MLX5_CAP_QOS(dev->mdev, packet_pacing_typical_size)) { 388961147f39SBodong Wang raw_qp_param.rl.typical_pkt_sz = 389061147f39SBodong Wang ucmd->burst_info.typical_pkt_sz; 389161147f39SBodong Wang } else { 389261147f39SBodong Wang err = -EINVAL; 389361147f39SBodong Wang goto out; 389461147f39SBodong Wang } 389561147f39SBodong Wang } 389661147f39SBodong Wang 38977d29f349SBodong Wang raw_qp_param.set_mask |= MLX5_RAW_QP_RATE_LIMIT; 38987d29f349SBodong Wang } 38997d29f349SBodong Wang 390013eab21fSAviv Heller err = modify_raw_packet_qp(dev, qp, &raw_qp_param, tx_affinity); 39010680efa2SAlex Vesker } else { 3902333fbaa0SLeon Romanovsky err = mlx5_core_qp_modify(dev, op, optpar, context, &base->mqp); 39030680efa2SAlex Vesker } 39040680efa2SAlex Vesker 3905e126ba97SEli Cohen if (err) 3906e126ba97SEli Cohen goto out; 3907e126ba97SEli Cohen 3908e126ba97SEli Cohen qp->state = new_state; 3909e126ba97SEli Cohen 3910e126ba97SEli Cohen if (attr_mask & IB_QP_ACCESS_FLAGS) 391119098df2Smajd@mellanox.com qp->trans_qp.atomic_rd_en = attr->qp_access_flags; 3912e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) 391319098df2Smajd@mellanox.com qp->trans_qp.resp_depth = attr->max_dest_rd_atomic; 3914e126ba97SEli Cohen if (attr_mask & IB_QP_PORT) 3915e126ba97SEli Cohen qp->port = attr->port_num; 3916e126ba97SEli Cohen if (attr_mask & IB_QP_ALT_PATH) 391719098df2Smajd@mellanox.com qp->trans_qp.alt_port = attr->alt_port_num; 3918e126ba97SEli Cohen 3919e126ba97SEli Cohen /* 3920e126ba97SEli Cohen * If we moved a kernel QP to RESET, clean up all old CQ 3921e126ba97SEli Cohen * entries and reinitialize the QP. 3922e126ba97SEli Cohen */ 392375a45982SLeon Romanovsky if (new_state == IB_QPS_RESET && 392475a45982SLeon Romanovsky !ibqp->uobject && ibqp->qp_type != IB_QPT_XRC_TGT) { 392519098df2Smajd@mellanox.com mlx5_ib_cq_clean(recv_cq, base->mqp.qpn, 3926e126ba97SEli Cohen ibqp->srq ? to_msrq(ibqp->srq) : NULL); 3927e126ba97SEli Cohen if (send_cq != recv_cq) 392819098df2Smajd@mellanox.com mlx5_ib_cq_clean(send_cq, base->mqp.qpn, NULL); 3929e126ba97SEli Cohen 3930e126ba97SEli Cohen qp->rq.head = 0; 3931e126ba97SEli Cohen qp->rq.tail = 0; 3932e126ba97SEli Cohen qp->sq.head = 0; 3933e126ba97SEli Cohen qp->sq.tail = 0; 3934e126ba97SEli Cohen qp->sq.cur_post = 0; 393534f4c955SGuy Levi if (qp->sq.wqe_cnt) 393634f4c955SGuy Levi qp->sq.cur_edge = get_sq_edge(&qp->sq, 0); 3937950bf4f1SLeon Romanovsky qp->sq.last_poll = 0; 3938e126ba97SEli Cohen qp->db.db[MLX5_RCV_DBR] = 0; 3939e126ba97SEli Cohen qp->db.db[MLX5_SND_DBR] = 0; 3940e126ba97SEli Cohen } 3941e126ba97SEli Cohen 3942d14133ddSMark Zhang if ((new_state == IB_QPS_RTS) && qp->counter_pending) { 3943d14133ddSMark Zhang err = __mlx5_ib_qp_set_counter(ibqp, ibqp->counter); 3944d14133ddSMark Zhang if (!err) 3945d14133ddSMark Zhang qp->counter_pending = 0; 3946d14133ddSMark Zhang } 3947d14133ddSMark Zhang 3948e126ba97SEli Cohen out: 39491a412fb1SSaeed Mahameed kfree(context); 3950e126ba97SEli Cohen return err; 3951e126ba97SEli Cohen } 3952e126ba97SEli Cohen 3953c32a4f29SMoni Shoua static inline bool is_valid_mask(int mask, int req, int opt) 3954c32a4f29SMoni Shoua { 3955c32a4f29SMoni Shoua if ((mask & req) != req) 3956c32a4f29SMoni Shoua return false; 3957c32a4f29SMoni Shoua 3958c32a4f29SMoni Shoua if (mask & ~(req | opt)) 3959c32a4f29SMoni Shoua return false; 3960c32a4f29SMoni Shoua 3961c32a4f29SMoni Shoua return true; 3962c32a4f29SMoni Shoua } 3963c32a4f29SMoni Shoua 3964c32a4f29SMoni Shoua /* check valid transition for driver QP types 3965c32a4f29SMoni Shoua * for now the only QP type that this function supports is DCI 3966c32a4f29SMoni Shoua */ 3967c32a4f29SMoni Shoua static bool modify_dci_qp_is_ok(enum ib_qp_state cur_state, enum ib_qp_state new_state, 3968c32a4f29SMoni Shoua enum ib_qp_attr_mask attr_mask) 3969c32a4f29SMoni Shoua { 3970c32a4f29SMoni Shoua int req = IB_QP_STATE; 3971c32a4f29SMoni Shoua int opt = 0; 3972c32a4f29SMoni Shoua 397399ed748eSMoni Shoua if (new_state == IB_QPS_RESET) { 397499ed748eSMoni Shoua return is_valid_mask(attr_mask, req, opt); 397599ed748eSMoni Shoua } else if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { 3976c32a4f29SMoni Shoua req |= IB_QP_PKEY_INDEX | IB_QP_PORT; 3977c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3978c32a4f29SMoni Shoua } else if (cur_state == IB_QPS_INIT && new_state == IB_QPS_INIT) { 3979c32a4f29SMoni Shoua opt = IB_QP_PKEY_INDEX | IB_QP_PORT; 3980c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3981c32a4f29SMoni Shoua } else if (cur_state == IB_QPS_INIT && new_state == IB_QPS_RTR) { 3982c32a4f29SMoni Shoua req |= IB_QP_PATH_MTU; 39835ec0304cSArtemy Kovalyov opt = IB_QP_PKEY_INDEX | IB_QP_AV; 3984c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3985c32a4f29SMoni Shoua } else if (cur_state == IB_QPS_RTR && new_state == IB_QPS_RTS) { 3986c32a4f29SMoni Shoua req |= IB_QP_TIMEOUT | IB_QP_RETRY_CNT | IB_QP_RNR_RETRY | 3987c32a4f29SMoni Shoua IB_QP_MAX_QP_RD_ATOMIC | IB_QP_SQ_PSN; 3988c32a4f29SMoni Shoua opt = IB_QP_MIN_RNR_TIMER; 3989c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3990c32a4f29SMoni Shoua } else if (cur_state == IB_QPS_RTS && new_state == IB_QPS_RTS) { 3991c32a4f29SMoni Shoua opt = IB_QP_MIN_RNR_TIMER; 3992c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3993c32a4f29SMoni Shoua } else if (cur_state != IB_QPS_RESET && new_state == IB_QPS_ERR) { 3994c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3995c32a4f29SMoni Shoua } 3996c32a4f29SMoni Shoua return false; 3997c32a4f29SMoni Shoua } 3998c32a4f29SMoni Shoua 3999776a3906SMoni Shoua /* mlx5_ib_modify_dct: modify a DCT QP 4000776a3906SMoni Shoua * valid transitions are: 4001776a3906SMoni Shoua * RESET to INIT: must set access_flags, pkey_index and port 4002776a3906SMoni Shoua * INIT to RTR : must set min_rnr_timer, tclass, flow_label, 4003776a3906SMoni Shoua * mtu, gid_index and hop_limit 4004776a3906SMoni Shoua * Other transitions and attributes are illegal 4005776a3906SMoni Shoua */ 4006776a3906SMoni Shoua static int mlx5_ib_modify_dct(struct ib_qp *ibqp, struct ib_qp_attr *attr, 4007776a3906SMoni Shoua int attr_mask, struct ib_udata *udata) 4008776a3906SMoni Shoua { 4009776a3906SMoni Shoua struct mlx5_ib_qp *qp = to_mqp(ibqp); 4010776a3906SMoni Shoua struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 4011776a3906SMoni Shoua enum ib_qp_state cur_state, new_state; 4012776a3906SMoni Shoua int err = 0; 4013776a3906SMoni Shoua int required = IB_QP_STATE; 4014776a3906SMoni Shoua void *dctc; 4015776a3906SMoni Shoua 4016776a3906SMoni Shoua if (!(attr_mask & IB_QP_STATE)) 4017776a3906SMoni Shoua return -EINVAL; 4018776a3906SMoni Shoua 4019776a3906SMoni Shoua cur_state = qp->state; 4020776a3906SMoni Shoua new_state = attr->qp_state; 4021776a3906SMoni Shoua 4022776a3906SMoni Shoua dctc = MLX5_ADDR_OF(create_dct_in, qp->dct.in, dct_context_entry); 4023776a3906SMoni Shoua if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { 40243e1f000fSParav Pandit u16 set_id; 40253e1f000fSParav Pandit 4026776a3906SMoni Shoua required |= IB_QP_ACCESS_FLAGS | IB_QP_PKEY_INDEX | IB_QP_PORT; 4027776a3906SMoni Shoua if (!is_valid_mask(attr_mask, required, 0)) 4028776a3906SMoni Shoua return -EINVAL; 4029776a3906SMoni Shoua 4030776a3906SMoni Shoua if (attr->port_num == 0 || 4031776a3906SMoni Shoua attr->port_num > MLX5_CAP_GEN(dev->mdev, num_ports)) { 4032776a3906SMoni Shoua mlx5_ib_dbg(dev, "invalid port number %d. number of ports is %d\n", 4033776a3906SMoni Shoua attr->port_num, dev->num_ports); 4034776a3906SMoni Shoua return -EINVAL; 4035776a3906SMoni Shoua } 4036776a3906SMoni Shoua if (attr->qp_access_flags & IB_ACCESS_REMOTE_READ) 4037776a3906SMoni Shoua MLX5_SET(dctc, dctc, rre, 1); 4038776a3906SMoni Shoua if (attr->qp_access_flags & IB_ACCESS_REMOTE_WRITE) 4039776a3906SMoni Shoua MLX5_SET(dctc, dctc, rwe, 1); 4040776a3906SMoni Shoua if (attr->qp_access_flags & IB_ACCESS_REMOTE_ATOMIC) { 4041a60109dcSYonatan Cohen int atomic_mode; 4042a60109dcSYonatan Cohen 4043a60109dcSYonatan Cohen atomic_mode = get_atomic_mode(dev, MLX5_IB_QPT_DCT); 4044a60109dcSYonatan Cohen if (atomic_mode < 0) 4045776a3906SMoni Shoua return -EOPNOTSUPP; 4046a60109dcSYonatan Cohen 4047a60109dcSYonatan Cohen MLX5_SET(dctc, dctc, atomic_mode, atomic_mode); 4048776a3906SMoni Shoua MLX5_SET(dctc, dctc, rae, 1); 4049776a3906SMoni Shoua } 4050776a3906SMoni Shoua MLX5_SET(dctc, dctc, pkey_index, attr->pkey_index); 4051776a3906SMoni Shoua MLX5_SET(dctc, dctc, port, attr->port_num); 40523e1f000fSParav Pandit 40533e1f000fSParav Pandit set_id = mlx5_ib_get_counters_id(dev, attr->port_num - 1); 40543e1f000fSParav Pandit MLX5_SET(dctc, dctc, counter_set_id, set_id); 4055776a3906SMoni Shoua 4056776a3906SMoni Shoua } else if (cur_state == IB_QPS_INIT && new_state == IB_QPS_RTR) { 4057776a3906SMoni Shoua struct mlx5_ib_modify_qp_resp resp = {}; 4058c5ae1954SYishai Hadas u32 out[MLX5_ST_SZ_DW(create_dct_out)] = {0}; 4059776a3906SMoni Shoua u32 min_resp_len = offsetof(typeof(resp), dctn) + 4060776a3906SMoni Shoua sizeof(resp.dctn); 4061776a3906SMoni Shoua 4062776a3906SMoni Shoua if (udata->outlen < min_resp_len) 4063776a3906SMoni Shoua return -EINVAL; 4064776a3906SMoni Shoua resp.response_length = min_resp_len; 4065776a3906SMoni Shoua 4066776a3906SMoni Shoua required |= IB_QP_MIN_RNR_TIMER | IB_QP_AV | IB_QP_PATH_MTU; 4067776a3906SMoni Shoua if (!is_valid_mask(attr_mask, required, 0)) 4068776a3906SMoni Shoua return -EINVAL; 4069776a3906SMoni Shoua MLX5_SET(dctc, dctc, min_rnr_nak, attr->min_rnr_timer); 4070776a3906SMoni Shoua MLX5_SET(dctc, dctc, tclass, attr->ah_attr.grh.traffic_class); 4071776a3906SMoni Shoua MLX5_SET(dctc, dctc, flow_label, attr->ah_attr.grh.flow_label); 4072776a3906SMoni Shoua MLX5_SET(dctc, dctc, mtu, attr->path_mtu); 4073776a3906SMoni Shoua MLX5_SET(dctc, dctc, my_addr_index, attr->ah_attr.grh.sgid_index); 4074776a3906SMoni Shoua MLX5_SET(dctc, dctc, hop_limit, attr->ah_attr.grh.hop_limit); 4075776a3906SMoni Shoua 4076333fbaa0SLeon Romanovsky err = mlx5_core_create_dct(dev, &qp->dct.mdct, qp->dct.in, 4077c5ae1954SYishai Hadas MLX5_ST_SZ_BYTES(create_dct_in), out, 4078c5ae1954SYishai Hadas sizeof(out)); 4079776a3906SMoni Shoua if (err) 4080776a3906SMoni Shoua return err; 4081776a3906SMoni Shoua resp.dctn = qp->dct.mdct.mqp.qpn; 4082776a3906SMoni Shoua err = ib_copy_to_udata(udata, &resp, resp.response_length); 4083776a3906SMoni Shoua if (err) { 4084333fbaa0SLeon Romanovsky mlx5_core_destroy_dct(dev, &qp->dct.mdct); 4085776a3906SMoni Shoua return err; 4086776a3906SMoni Shoua } 4087776a3906SMoni Shoua } else { 4088776a3906SMoni Shoua mlx5_ib_warn(dev, "Modify DCT: Invalid transition from %d to %d\n", cur_state, new_state); 4089776a3906SMoni Shoua return -EINVAL; 4090776a3906SMoni Shoua } 4091776a3906SMoni Shoua if (err) 4092776a3906SMoni Shoua qp->state = IB_QPS_ERR; 4093776a3906SMoni Shoua else 4094776a3906SMoni Shoua qp->state = new_state; 4095776a3906SMoni Shoua return err; 4096776a3906SMoni Shoua } 4097776a3906SMoni Shoua 4098e126ba97SEli Cohen int mlx5_ib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, 4099e126ba97SEli Cohen int attr_mask, struct ib_udata *udata) 4100e126ba97SEli Cohen { 4101e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 4102e126ba97SEli Cohen struct mlx5_ib_qp *qp = to_mqp(ibqp); 410361147f39SBodong Wang struct mlx5_ib_modify_qp ucmd = {}; 4104d16e91daSHaggai Eran enum ib_qp_type qp_type; 4105e126ba97SEli Cohen enum ib_qp_state cur_state, new_state; 410661147f39SBodong Wang size_t required_cmd_sz; 4107e126ba97SEli Cohen int err = -EINVAL; 4108e126ba97SEli Cohen int port; 4109e126ba97SEli Cohen 411028d61370SYishai Hadas if (ibqp->rwq_ind_tbl) 411128d61370SYishai Hadas return -ENOSYS; 411228d61370SYishai Hadas 411361147f39SBodong Wang if (udata && udata->inlen) { 411461147f39SBodong Wang required_cmd_sz = offsetof(typeof(ucmd), reserved) + 411561147f39SBodong Wang sizeof(ucmd.reserved); 411661147f39SBodong Wang if (udata->inlen < required_cmd_sz) 411761147f39SBodong Wang return -EINVAL; 411861147f39SBodong Wang 411961147f39SBodong Wang if (udata->inlen > sizeof(ucmd) && 412061147f39SBodong Wang !ib_is_udata_cleared(udata, sizeof(ucmd), 412161147f39SBodong Wang udata->inlen - sizeof(ucmd))) 412261147f39SBodong Wang return -EOPNOTSUPP; 412361147f39SBodong Wang 412461147f39SBodong Wang if (ib_copy_from_udata(&ucmd, udata, 412561147f39SBodong Wang min(udata->inlen, sizeof(ucmd)))) 412661147f39SBodong Wang return -EFAULT; 412761147f39SBodong Wang 412861147f39SBodong Wang if (ucmd.comp_mask || 412961147f39SBodong Wang memchr_inv(&ucmd.reserved, 0, sizeof(ucmd.reserved)) || 413061147f39SBodong Wang memchr_inv(&ucmd.burst_info.reserved, 0, 413161147f39SBodong Wang sizeof(ucmd.burst_info.reserved))) 413261147f39SBodong Wang return -EOPNOTSUPP; 413361147f39SBodong Wang } 413461147f39SBodong Wang 4135d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 4136d16e91daSHaggai Eran return mlx5_ib_gsi_modify_qp(ibqp, attr, attr_mask); 4137d16e91daSHaggai Eran 41387aede1a2SLeon Romanovsky qp_type = (unlikely(ibqp->qp_type == MLX5_IB_QPT_HW_GSI)) ? IB_QPT_GSI : 41397aede1a2SLeon Romanovsky qp->type; 4140d16e91daSHaggai Eran 4141776a3906SMoni Shoua if (qp_type == MLX5_IB_QPT_DCT) 4142776a3906SMoni Shoua return mlx5_ib_modify_dct(ibqp, attr, attr_mask, udata); 4143c32a4f29SMoni Shoua 4144e126ba97SEli Cohen mutex_lock(&qp->mutex); 4145e126ba97SEli Cohen 4146e126ba97SEli Cohen cur_state = attr_mask & IB_QP_CUR_STATE ? attr->cur_qp_state : qp->state; 4147e126ba97SEli Cohen new_state = attr_mask & IB_QP_STATE ? attr->qp_state : cur_state; 4148e126ba97SEli Cohen 41492811ba51SAchiad Shochat if (!(cur_state == new_state && cur_state == IB_QPS_RESET)) { 41502811ba51SAchiad Shochat port = attr_mask & IB_QP_PORT ? attr->port_num : qp->port; 41512811ba51SAchiad Shochat } 41522811ba51SAchiad Shochat 41532be08c30SLeon Romanovsky if (qp->flags & IB_QP_CREATE_SOURCE_QPN) { 4154c2e53b2cSYishai Hadas if (attr_mask & ~(IB_QP_STATE | IB_QP_CUR_STATE)) { 4155c2e53b2cSYishai Hadas mlx5_ib_dbg(dev, "invalid attr_mask 0x%x when underlay QP is used\n", 4156c2e53b2cSYishai Hadas attr_mask); 4157c2e53b2cSYishai Hadas goto out; 4158c2e53b2cSYishai Hadas } 4159c2e53b2cSYishai Hadas } else if (qp_type != MLX5_IB_QPT_REG_UMR && 4160c32a4f29SMoni Shoua qp_type != MLX5_IB_QPT_DCI && 4161d31131bbSKamal Heib !ib_modify_qp_is_ok(cur_state, new_state, qp_type, 4162d31131bbSKamal Heib attr_mask)) { 4163158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid QP state transition from %d to %d, qp_type %d, attr_mask 0x%x\n", 4164158abf86SHaggai Eran cur_state, new_state, ibqp->qp_type, attr_mask); 4165e126ba97SEli Cohen goto out; 4166c32a4f29SMoni Shoua } else if (qp_type == MLX5_IB_QPT_DCI && 4167c32a4f29SMoni Shoua !modify_dci_qp_is_ok(cur_state, new_state, attr_mask)) { 4168c32a4f29SMoni Shoua mlx5_ib_dbg(dev, "invalid QP state transition from %d to %d, qp_type %d, attr_mask 0x%x\n", 4169c32a4f29SMoni Shoua cur_state, new_state, qp_type, attr_mask); 4170c32a4f29SMoni Shoua goto out; 4171158abf86SHaggai Eran } 4172e126ba97SEli Cohen 4173e126ba97SEli Cohen if ((attr_mask & IB_QP_PORT) && 4174938fe83cSSaeed Mahameed (attr->port_num == 0 || 4175508562d6SDaniel Jurgens attr->port_num > dev->num_ports)) { 4176158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid port number %d. number of ports is %d\n", 4177158abf86SHaggai Eran attr->port_num, dev->num_ports); 4178e126ba97SEli Cohen goto out; 4179158abf86SHaggai Eran } 4180e126ba97SEli Cohen 4181e126ba97SEli Cohen if (attr_mask & IB_QP_PKEY_INDEX) { 4182e126ba97SEli Cohen port = attr_mask & IB_QP_PORT ? attr->port_num : qp->port; 4183938fe83cSSaeed Mahameed if (attr->pkey_index >= 4184158abf86SHaggai Eran dev->mdev->port_caps[port - 1].pkey_table_len) { 4185158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid pkey index %d\n", 4186158abf86SHaggai Eran attr->pkey_index); 4187e126ba97SEli Cohen goto out; 4188e126ba97SEli Cohen } 4189158abf86SHaggai Eran } 4190e126ba97SEli Cohen 4191e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC && 4192938fe83cSSaeed Mahameed attr->max_rd_atomic > 4193158abf86SHaggai Eran (1 << MLX5_CAP_GEN(dev->mdev, log_max_ra_res_qp))) { 4194158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid max_rd_atomic value %d\n", 4195158abf86SHaggai Eran attr->max_rd_atomic); 4196e126ba97SEli Cohen goto out; 4197158abf86SHaggai Eran } 4198e126ba97SEli Cohen 4199e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC && 4200938fe83cSSaeed Mahameed attr->max_dest_rd_atomic > 4201158abf86SHaggai Eran (1 << MLX5_CAP_GEN(dev->mdev, log_max_ra_req_qp))) { 4202158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid max_dest_rd_atomic value %d\n", 4203158abf86SHaggai Eran attr->max_dest_rd_atomic); 4204e126ba97SEli Cohen goto out; 4205158abf86SHaggai Eran } 4206e126ba97SEli Cohen 4207e126ba97SEli Cohen if (cur_state == new_state && cur_state == IB_QPS_RESET) { 4208e126ba97SEli Cohen err = 0; 4209e126ba97SEli Cohen goto out; 4210e126ba97SEli Cohen } 4211e126ba97SEli Cohen 421261147f39SBodong Wang err = __mlx5_ib_modify_qp(ibqp, attr, attr_mask, cur_state, 421389944450SShamir Rabinovitch new_state, &ucmd, udata); 4214e126ba97SEli Cohen 4215e126ba97SEli Cohen out: 4216e126ba97SEli Cohen mutex_unlock(&qp->mutex); 4217e126ba97SEli Cohen return err; 4218e126ba97SEli Cohen } 4219e126ba97SEli Cohen 422034f4c955SGuy Levi static void _handle_post_send_edge(struct mlx5_ib_wq *sq, void **seg, 422134f4c955SGuy Levi u32 wqe_sz, void **cur_edge) 422234f4c955SGuy Levi { 422334f4c955SGuy Levi u32 idx; 422434f4c955SGuy Levi 422534f4c955SGuy Levi idx = (sq->cur_post + (wqe_sz >> 2)) & (sq->wqe_cnt - 1); 422634f4c955SGuy Levi *cur_edge = get_sq_edge(sq, idx); 422734f4c955SGuy Levi 422834f4c955SGuy Levi *seg = mlx5_frag_buf_get_wqe(&sq->fbc, idx); 422934f4c955SGuy Levi } 423034f4c955SGuy Levi 423134f4c955SGuy Levi /* handle_post_send_edge - Check if we get to SQ edge. If yes, update to the 423234f4c955SGuy Levi * next nearby edge and get new address translation for current WQE position. 423334f4c955SGuy Levi * @sq - SQ buffer. 423434f4c955SGuy Levi * @seg: Current WQE position (16B aligned). 423534f4c955SGuy Levi * @wqe_sz: Total current WQE size [16B]. 423634f4c955SGuy Levi * @cur_edge: Updated current edge. 423734f4c955SGuy Levi */ 423834f4c955SGuy Levi static inline void handle_post_send_edge(struct mlx5_ib_wq *sq, void **seg, 423934f4c955SGuy Levi u32 wqe_sz, void **cur_edge) 424034f4c955SGuy Levi { 424134f4c955SGuy Levi if (likely(*seg != *cur_edge)) 424234f4c955SGuy Levi return; 424334f4c955SGuy Levi 424434f4c955SGuy Levi _handle_post_send_edge(sq, seg, wqe_sz, cur_edge); 424534f4c955SGuy Levi } 424634f4c955SGuy Levi 424734f4c955SGuy Levi /* memcpy_send_wqe - copy data from src to WQE and update the relevant WQ's 424834f4c955SGuy Levi * pointers. At the end @seg is aligned to 16B regardless the copied size. 424934f4c955SGuy Levi * @sq - SQ buffer. 425034f4c955SGuy Levi * @cur_edge: Updated current edge. 425134f4c955SGuy Levi * @seg: Current WQE position (16B aligned). 425234f4c955SGuy Levi * @wqe_sz: Total current WQE size [16B]. 425334f4c955SGuy Levi * @src: Pointer to copy from. 425434f4c955SGuy Levi * @n: Number of bytes to copy. 425534f4c955SGuy Levi */ 425634f4c955SGuy Levi static inline void memcpy_send_wqe(struct mlx5_ib_wq *sq, void **cur_edge, 425734f4c955SGuy Levi void **seg, u32 *wqe_sz, const void *src, 425834f4c955SGuy Levi size_t n) 425934f4c955SGuy Levi { 426034f4c955SGuy Levi while (likely(n)) { 426134f4c955SGuy Levi size_t leftlen = *cur_edge - *seg; 426234f4c955SGuy Levi size_t copysz = min_t(size_t, leftlen, n); 426334f4c955SGuy Levi size_t stride; 426434f4c955SGuy Levi 426534f4c955SGuy Levi memcpy(*seg, src, copysz); 426634f4c955SGuy Levi 426734f4c955SGuy Levi n -= copysz; 426834f4c955SGuy Levi src += copysz; 426934f4c955SGuy Levi stride = !n ? ALIGN(copysz, 16) : copysz; 427034f4c955SGuy Levi *seg += stride; 427134f4c955SGuy Levi *wqe_sz += stride >> 4; 427234f4c955SGuy Levi handle_post_send_edge(sq, seg, *wqe_sz, cur_edge); 427334f4c955SGuy Levi } 427434f4c955SGuy Levi } 427534f4c955SGuy Levi 4276e126ba97SEli Cohen static int mlx5_wq_overflow(struct mlx5_ib_wq *wq, int nreq, struct ib_cq *ib_cq) 4277e126ba97SEli Cohen { 4278e126ba97SEli Cohen struct mlx5_ib_cq *cq; 4279e126ba97SEli Cohen unsigned cur; 4280e126ba97SEli Cohen 4281e126ba97SEli Cohen cur = wq->head - wq->tail; 4282e126ba97SEli Cohen if (likely(cur + nreq < wq->max_post)) 4283e126ba97SEli Cohen return 0; 4284e126ba97SEli Cohen 4285e126ba97SEli Cohen cq = to_mcq(ib_cq); 4286e126ba97SEli Cohen spin_lock(&cq->lock); 4287e126ba97SEli Cohen cur = wq->head - wq->tail; 4288e126ba97SEli Cohen spin_unlock(&cq->lock); 4289e126ba97SEli Cohen 4290e126ba97SEli Cohen return cur + nreq >= wq->max_post; 4291e126ba97SEli Cohen } 4292e126ba97SEli Cohen 4293e126ba97SEli Cohen static __always_inline void set_raddr_seg(struct mlx5_wqe_raddr_seg *rseg, 4294e126ba97SEli Cohen u64 remote_addr, u32 rkey) 4295e126ba97SEli Cohen { 4296e126ba97SEli Cohen rseg->raddr = cpu_to_be64(remote_addr); 4297e126ba97SEli Cohen rseg->rkey = cpu_to_be32(rkey); 4298e126ba97SEli Cohen rseg->reserved = 0; 4299e126ba97SEli Cohen } 4300e126ba97SEli Cohen 430134f4c955SGuy Levi static void set_eth_seg(const struct ib_send_wr *wr, struct mlx5_ib_qp *qp, 430234f4c955SGuy Levi void **seg, int *size, void **cur_edge) 4303f0313965SErez Shitrit { 430434f4c955SGuy Levi struct mlx5_wqe_eth_seg *eseg = *seg; 4305f0313965SErez Shitrit 4306f0313965SErez Shitrit memset(eseg, 0, sizeof(struct mlx5_wqe_eth_seg)); 4307f0313965SErez Shitrit 4308f0313965SErez Shitrit if (wr->send_flags & IB_SEND_IP_CSUM) 4309f0313965SErez Shitrit eseg->cs_flags = MLX5_ETH_WQE_L3_CSUM | 4310f0313965SErez Shitrit MLX5_ETH_WQE_L4_CSUM; 4311f0313965SErez Shitrit 4312f0313965SErez Shitrit if (wr->opcode == IB_WR_LSO) { 4313f0313965SErez Shitrit struct ib_ud_wr *ud_wr = container_of(wr, struct ib_ud_wr, wr); 431434f4c955SGuy Levi size_t left, copysz; 4315f0313965SErez Shitrit void *pdata = ud_wr->header; 431634f4c955SGuy Levi size_t stride; 4317f0313965SErez Shitrit 4318f0313965SErez Shitrit left = ud_wr->hlen; 4319f0313965SErez Shitrit eseg->mss = cpu_to_be16(ud_wr->mss); 43202b31f7aeSSaeed Mahameed eseg->inline_hdr.sz = cpu_to_be16(left); 4321f0313965SErez Shitrit 432234f4c955SGuy Levi /* memcpy_send_wqe should get a 16B align address. Hence, we 432334f4c955SGuy Levi * first copy up to the current edge and then, if needed, 432434f4c955SGuy Levi * fall-through to memcpy_send_wqe. 4325f0313965SErez Shitrit */ 432634f4c955SGuy Levi copysz = min_t(u64, *cur_edge - (void *)eseg->inline_hdr.start, 432734f4c955SGuy Levi left); 432834f4c955SGuy Levi memcpy(eseg->inline_hdr.start, pdata, copysz); 432934f4c955SGuy Levi stride = ALIGN(sizeof(struct mlx5_wqe_eth_seg) - 433034f4c955SGuy Levi sizeof(eseg->inline_hdr.start) + copysz, 16); 433134f4c955SGuy Levi *size += stride / 16; 433234f4c955SGuy Levi *seg += stride; 4333f0313965SErez Shitrit 433434f4c955SGuy Levi if (copysz < left) { 433534f4c955SGuy Levi handle_post_send_edge(&qp->sq, seg, *size, cur_edge); 4336f0313965SErez Shitrit left -= copysz; 4337f0313965SErez Shitrit pdata += copysz; 433834f4c955SGuy Levi memcpy_send_wqe(&qp->sq, cur_edge, seg, size, pdata, 433934f4c955SGuy Levi left); 4340f0313965SErez Shitrit } 4341f0313965SErez Shitrit 434234f4c955SGuy Levi return; 434334f4c955SGuy Levi } 434434f4c955SGuy Levi 434534f4c955SGuy Levi *seg += sizeof(struct mlx5_wqe_eth_seg); 434634f4c955SGuy Levi *size += sizeof(struct mlx5_wqe_eth_seg) / 16; 4347f0313965SErez Shitrit } 4348f0313965SErez Shitrit 4349e126ba97SEli Cohen static void set_datagram_seg(struct mlx5_wqe_datagram_seg *dseg, 4350f696bf6dSBart Van Assche const struct ib_send_wr *wr) 4351e126ba97SEli Cohen { 4352e622f2f4SChristoph Hellwig memcpy(&dseg->av, &to_mah(ud_wr(wr)->ah)->av, sizeof(struct mlx5_av)); 4353e622f2f4SChristoph Hellwig dseg->av.dqp_dct = cpu_to_be32(ud_wr(wr)->remote_qpn | MLX5_EXTENDED_UD_AV); 4354e622f2f4SChristoph Hellwig dseg->av.key.qkey.qkey = cpu_to_be32(ud_wr(wr)->remote_qkey); 4355e126ba97SEli Cohen } 4356e126ba97SEli Cohen 4357e126ba97SEli Cohen static void set_data_ptr_seg(struct mlx5_wqe_data_seg *dseg, struct ib_sge *sg) 4358e126ba97SEli Cohen { 4359e126ba97SEli Cohen dseg->byte_count = cpu_to_be32(sg->length); 4360e126ba97SEli Cohen dseg->lkey = cpu_to_be32(sg->lkey); 4361e126ba97SEli Cohen dseg->addr = cpu_to_be64(sg->addr); 4362e126ba97SEli Cohen } 4363e126ba97SEli Cohen 436431616255SArtemy Kovalyov static u64 get_xlt_octo(u64 bytes) 4365e126ba97SEli Cohen { 436631616255SArtemy Kovalyov return ALIGN(bytes, MLX5_IB_UMR_XLT_ALIGNMENT) / 436731616255SArtemy Kovalyov MLX5_IB_UMR_OCTOWORD; 4368e126ba97SEli Cohen } 4369e126ba97SEli Cohen 4370841b07f9SMoni Shoua static __be64 frwr_mkey_mask(bool atomic) 4371e126ba97SEli Cohen { 4372e126ba97SEli Cohen u64 result; 4373e126ba97SEli Cohen 4374e126ba97SEli Cohen result = MLX5_MKEY_MASK_LEN | 4375e126ba97SEli Cohen MLX5_MKEY_MASK_PAGE_SIZE | 4376e126ba97SEli Cohen MLX5_MKEY_MASK_START_ADDR | 4377e126ba97SEli Cohen MLX5_MKEY_MASK_EN_RINVAL | 4378e126ba97SEli Cohen MLX5_MKEY_MASK_KEY | 4379e126ba97SEli Cohen MLX5_MKEY_MASK_LR | 4380e126ba97SEli Cohen MLX5_MKEY_MASK_LW | 4381e126ba97SEli Cohen MLX5_MKEY_MASK_RR | 4382e126ba97SEli Cohen MLX5_MKEY_MASK_RW | 4383e126ba97SEli Cohen MLX5_MKEY_MASK_SMALL_FENCE | 4384e126ba97SEli Cohen MLX5_MKEY_MASK_FREE; 4385e126ba97SEli Cohen 4386841b07f9SMoni Shoua if (atomic) 4387841b07f9SMoni Shoua result |= MLX5_MKEY_MASK_A; 4388841b07f9SMoni Shoua 4389e126ba97SEli Cohen return cpu_to_be64(result); 4390e126ba97SEli Cohen } 4391e126ba97SEli Cohen 4392e6631814SSagi Grimberg static __be64 sig_mkey_mask(void) 4393e6631814SSagi Grimberg { 4394e6631814SSagi Grimberg u64 result; 4395e6631814SSagi Grimberg 4396e6631814SSagi Grimberg result = MLX5_MKEY_MASK_LEN | 4397e6631814SSagi Grimberg MLX5_MKEY_MASK_PAGE_SIZE | 4398e6631814SSagi Grimberg MLX5_MKEY_MASK_START_ADDR | 4399d5436ba0SSagi Grimberg MLX5_MKEY_MASK_EN_SIGERR | 4400e6631814SSagi Grimberg MLX5_MKEY_MASK_EN_RINVAL | 4401e6631814SSagi Grimberg MLX5_MKEY_MASK_KEY | 4402e6631814SSagi Grimberg MLX5_MKEY_MASK_LR | 4403e6631814SSagi Grimberg MLX5_MKEY_MASK_LW | 4404e6631814SSagi Grimberg MLX5_MKEY_MASK_RR | 4405e6631814SSagi Grimberg MLX5_MKEY_MASK_RW | 4406e6631814SSagi Grimberg MLX5_MKEY_MASK_SMALL_FENCE | 4407e6631814SSagi Grimberg MLX5_MKEY_MASK_FREE | 4408e6631814SSagi Grimberg MLX5_MKEY_MASK_BSF_EN; 4409e6631814SSagi Grimberg 4410e6631814SSagi Grimberg return cpu_to_be64(result); 4411e6631814SSagi Grimberg } 4412e6631814SSagi Grimberg 44138a187ee5SSagi Grimberg static void set_reg_umr_seg(struct mlx5_wqe_umr_ctrl_seg *umr, 4414841b07f9SMoni Shoua struct mlx5_ib_mr *mr, u8 flags, bool atomic) 44158a187ee5SSagi Grimberg { 441638ca87c6SMax Gurtovoy int size = (mr->ndescs + mr->meta_ndescs) * mr->desc_size; 44178a187ee5SSagi Grimberg 44188a187ee5SSagi Grimberg memset(umr, 0, sizeof(*umr)); 4419b005d316SSagi Grimberg 44209ac7c4bcSMax Gurtovoy umr->flags = flags; 442131616255SArtemy Kovalyov umr->xlt_octowords = cpu_to_be16(get_xlt_octo(size)); 4422841b07f9SMoni Shoua umr->mkey_mask = frwr_mkey_mask(atomic); 44238a187ee5SSagi Grimberg } 44248a187ee5SSagi Grimberg 4425dd01e66aSSagi Grimberg static void set_linv_umr_seg(struct mlx5_wqe_umr_ctrl_seg *umr) 4426e126ba97SEli Cohen { 4427e126ba97SEli Cohen memset(umr, 0, sizeof(*umr)); 4428e126ba97SEli Cohen umr->mkey_mask = cpu_to_be64(MLX5_MKEY_MASK_FREE); 44292d221588SMax Gurtovoy umr->flags = MLX5_UMR_INLINE; 4430e126ba97SEli Cohen } 4431e126ba97SEli Cohen 443231616255SArtemy Kovalyov static __be64 get_umr_enable_mr_mask(void) 4433e126ba97SEli Cohen { 4434968e78ddSHaggai Eran u64 result; 4435e126ba97SEli Cohen 443631616255SArtemy Kovalyov result = MLX5_MKEY_MASK_KEY | 4437e126ba97SEli Cohen MLX5_MKEY_MASK_FREE; 4438968e78ddSHaggai Eran 4439968e78ddSHaggai Eran return cpu_to_be64(result); 4440968e78ddSHaggai Eran } 4441968e78ddSHaggai Eran 444231616255SArtemy Kovalyov static __be64 get_umr_disable_mr_mask(void) 4443968e78ddSHaggai Eran { 4444968e78ddSHaggai Eran u64 result; 4445968e78ddSHaggai Eran 4446968e78ddSHaggai Eran result = MLX5_MKEY_MASK_FREE; 4447968e78ddSHaggai Eran 4448968e78ddSHaggai Eran return cpu_to_be64(result); 4449968e78ddSHaggai Eran } 4450968e78ddSHaggai Eran 445156e11d62SNoa Osherovich static __be64 get_umr_update_translation_mask(void) 445256e11d62SNoa Osherovich { 445356e11d62SNoa Osherovich u64 result; 445456e11d62SNoa Osherovich 445556e11d62SNoa Osherovich result = MLX5_MKEY_MASK_LEN | 445656e11d62SNoa Osherovich MLX5_MKEY_MASK_PAGE_SIZE | 445731616255SArtemy Kovalyov MLX5_MKEY_MASK_START_ADDR; 445856e11d62SNoa Osherovich 445956e11d62SNoa Osherovich return cpu_to_be64(result); 446056e11d62SNoa Osherovich } 446156e11d62SNoa Osherovich 446231616255SArtemy Kovalyov static __be64 get_umr_update_access_mask(int atomic) 446356e11d62SNoa Osherovich { 446456e11d62SNoa Osherovich u64 result; 446556e11d62SNoa Osherovich 446631616255SArtemy Kovalyov result = MLX5_MKEY_MASK_LR | 446731616255SArtemy Kovalyov MLX5_MKEY_MASK_LW | 446856e11d62SNoa Osherovich MLX5_MKEY_MASK_RR | 446931616255SArtemy Kovalyov MLX5_MKEY_MASK_RW; 447031616255SArtemy Kovalyov 447131616255SArtemy Kovalyov if (atomic) 447231616255SArtemy Kovalyov result |= MLX5_MKEY_MASK_A; 447356e11d62SNoa Osherovich 447456e11d62SNoa Osherovich return cpu_to_be64(result); 447556e11d62SNoa Osherovich } 447656e11d62SNoa Osherovich 447756e11d62SNoa Osherovich static __be64 get_umr_update_pd_mask(void) 447856e11d62SNoa Osherovich { 447956e11d62SNoa Osherovich u64 result; 448056e11d62SNoa Osherovich 448131616255SArtemy Kovalyov result = MLX5_MKEY_MASK_PD; 448256e11d62SNoa Osherovich 448356e11d62SNoa Osherovich return cpu_to_be64(result); 448456e11d62SNoa Osherovich } 448556e11d62SNoa Osherovich 4486c8d75a98SMajd Dibbiny static int umr_check_mkey_mask(struct mlx5_ib_dev *dev, u64 mask) 4487c8d75a98SMajd Dibbiny { 4488c8d75a98SMajd Dibbiny if ((mask & MLX5_MKEY_MASK_PAGE_SIZE && 4489c8d75a98SMajd Dibbiny MLX5_CAP_GEN(dev->mdev, umr_modify_entity_size_disabled)) || 4490c8d75a98SMajd Dibbiny (mask & MLX5_MKEY_MASK_A && 4491c8d75a98SMajd Dibbiny MLX5_CAP_GEN(dev->mdev, umr_modify_atomic_disabled))) 4492c8d75a98SMajd Dibbiny return -EPERM; 4493c8d75a98SMajd Dibbiny return 0; 4494c8d75a98SMajd Dibbiny } 4495c8d75a98SMajd Dibbiny 4496c8d75a98SMajd Dibbiny static int set_reg_umr_segment(struct mlx5_ib_dev *dev, 4497c8d75a98SMajd Dibbiny struct mlx5_wqe_umr_ctrl_seg *umr, 4498f696bf6dSBart Van Assche const struct ib_send_wr *wr, int atomic) 4499968e78ddSHaggai Eran { 4500f696bf6dSBart Van Assche const struct mlx5_umr_wr *umrwr = umr_wr(wr); 4501968e78ddSHaggai Eran 4502968e78ddSHaggai Eran memset(umr, 0, sizeof(*umr)); 4503968e78ddSHaggai Eran 45046a053953SYishai Hadas if (!umrwr->ignore_free_state) { 4505968e78ddSHaggai Eran if (wr->send_flags & MLX5_IB_SEND_UMR_FAIL_IF_FREE) 45066a053953SYishai Hadas /* fail if free */ 45076a053953SYishai Hadas umr->flags = MLX5_UMR_CHECK_FREE; 4508968e78ddSHaggai Eran else 45096a053953SYishai Hadas /* fail if not free */ 45106a053953SYishai Hadas umr->flags = MLX5_UMR_CHECK_NOT_FREE; 45116a053953SYishai Hadas } 4512968e78ddSHaggai Eran 451331616255SArtemy Kovalyov umr->xlt_octowords = cpu_to_be16(get_xlt_octo(umrwr->xlt_size)); 451431616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_XLT) { 451531616255SArtemy Kovalyov u64 offset = get_xlt_octo(umrwr->offset); 451631616255SArtemy Kovalyov 451731616255SArtemy Kovalyov umr->xlt_offset = cpu_to_be16(offset & 0xffff); 451831616255SArtemy Kovalyov umr->xlt_offset_47_16 = cpu_to_be32(offset >> 16); 4519968e78ddSHaggai Eran umr->flags |= MLX5_UMR_TRANSLATION_OFFSET_EN; 4520968e78ddSHaggai Eran } 452156e11d62SNoa Osherovich if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_TRANSLATION) 452256e11d62SNoa Osherovich umr->mkey_mask |= get_umr_update_translation_mask(); 452331616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_PD_ACCESS) { 452431616255SArtemy Kovalyov umr->mkey_mask |= get_umr_update_access_mask(atomic); 452556e11d62SNoa Osherovich umr->mkey_mask |= get_umr_update_pd_mask(); 4526e126ba97SEli Cohen } 452731616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_ENABLE_MR) 452831616255SArtemy Kovalyov umr->mkey_mask |= get_umr_enable_mr_mask(); 452931616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_DISABLE_MR) 453031616255SArtemy Kovalyov umr->mkey_mask |= get_umr_disable_mr_mask(); 4531e126ba97SEli Cohen 4532e126ba97SEli Cohen if (!wr->num_sge) 4533968e78ddSHaggai Eran umr->flags |= MLX5_UMR_INLINE; 4534c8d75a98SMajd Dibbiny 4535c8d75a98SMajd Dibbiny return umr_check_mkey_mask(dev, be64_to_cpu(umr->mkey_mask)); 4536e126ba97SEli Cohen } 4537e126ba97SEli Cohen 4538e126ba97SEli Cohen static u8 get_umr_flags(int acc) 4539e126ba97SEli Cohen { 4540e126ba97SEli Cohen return (acc & IB_ACCESS_REMOTE_ATOMIC ? MLX5_PERM_ATOMIC : 0) | 4541e126ba97SEli Cohen (acc & IB_ACCESS_REMOTE_WRITE ? MLX5_PERM_REMOTE_WRITE : 0) | 4542e126ba97SEli Cohen (acc & IB_ACCESS_REMOTE_READ ? MLX5_PERM_REMOTE_READ : 0) | 4543e126ba97SEli Cohen (acc & IB_ACCESS_LOCAL_WRITE ? MLX5_PERM_LOCAL_WRITE : 0) | 45442ac45934SSagi Grimberg MLX5_PERM_LOCAL_READ | MLX5_PERM_UMR_EN; 4545e126ba97SEli Cohen } 4546e126ba97SEli Cohen 45478a187ee5SSagi Grimberg static void set_reg_mkey_seg(struct mlx5_mkey_seg *seg, 45488a187ee5SSagi Grimberg struct mlx5_ib_mr *mr, 45498a187ee5SSagi Grimberg u32 key, int access) 45508a187ee5SSagi Grimberg { 455138ca87c6SMax Gurtovoy int ndescs = ALIGN(mr->ndescs + mr->meta_ndescs, 8) >> 1; 45528a187ee5SSagi Grimberg 45538a187ee5SSagi Grimberg memset(seg, 0, sizeof(*seg)); 4554b005d316SSagi Grimberg 4555ec22eb53SSaeed Mahameed if (mr->access_mode == MLX5_MKC_ACCESS_MODE_MTT) 4556b005d316SSagi Grimberg seg->log2_page_size = ilog2(mr->ibmr.page_size); 4557ec22eb53SSaeed Mahameed else if (mr->access_mode == MLX5_MKC_ACCESS_MODE_KLMS) 4558b005d316SSagi Grimberg /* KLMs take twice the size of MTTs */ 4559b005d316SSagi Grimberg ndescs *= 2; 4560b005d316SSagi Grimberg 4561b005d316SSagi Grimberg seg->flags = get_umr_flags(access) | mr->access_mode; 45628a187ee5SSagi Grimberg seg->qpn_mkey7_0 = cpu_to_be32((key & 0xff) | 0xffffff00); 45638a187ee5SSagi Grimberg seg->flags_pd = cpu_to_be32(MLX5_MKEY_REMOTE_INVAL); 45648a187ee5SSagi Grimberg seg->start_addr = cpu_to_be64(mr->ibmr.iova); 45658a187ee5SSagi Grimberg seg->len = cpu_to_be64(mr->ibmr.length); 45668a187ee5SSagi Grimberg seg->xlt_oct_size = cpu_to_be32(ndescs); 45678a187ee5SSagi Grimberg } 45688a187ee5SSagi Grimberg 4569dd01e66aSSagi Grimberg static void set_linv_mkey_seg(struct mlx5_mkey_seg *seg) 4570e126ba97SEli Cohen { 4571e126ba97SEli Cohen memset(seg, 0, sizeof(*seg)); 4572968e78ddSHaggai Eran seg->status = MLX5_MKEY_STATUS_FREE; 4573e126ba97SEli Cohen } 4574e126ba97SEli Cohen 4575f696bf6dSBart Van Assche static void set_reg_mkey_segment(struct mlx5_mkey_seg *seg, 4576f696bf6dSBart Van Assche const struct ib_send_wr *wr) 4577e126ba97SEli Cohen { 4578f696bf6dSBart Van Assche const struct mlx5_umr_wr *umrwr = umr_wr(wr); 4579968e78ddSHaggai Eran 4580e126ba97SEli Cohen memset(seg, 0, sizeof(*seg)); 458131616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_DISABLE_MR) 4582968e78ddSHaggai Eran seg->status = MLX5_MKEY_STATUS_FREE; 4583e126ba97SEli Cohen 4584968e78ddSHaggai Eran seg->flags = convert_access(umrwr->access_flags); 458556e11d62SNoa Osherovich if (umrwr->pd) 4586968e78ddSHaggai Eran seg->flags_pd = cpu_to_be32(to_mpd(umrwr->pd)->pdn); 458731616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_TRANSLATION && 458831616255SArtemy Kovalyov !umrwr->length) 458931616255SArtemy Kovalyov seg->flags_pd |= cpu_to_be32(MLX5_MKEY_LEN64); 459031616255SArtemy Kovalyov 459131616255SArtemy Kovalyov seg->start_addr = cpu_to_be64(umrwr->virt_addr); 4592968e78ddSHaggai Eran seg->len = cpu_to_be64(umrwr->length); 4593968e78ddSHaggai Eran seg->log2_page_size = umrwr->page_shift; 4594746b5583SEli Cohen seg->qpn_mkey7_0 = cpu_to_be32(0xffffff00 | 4595968e78ddSHaggai Eran mlx5_mkey_variant(umrwr->mkey)); 4596e126ba97SEli Cohen } 4597e126ba97SEli Cohen 45988a187ee5SSagi Grimberg static void set_reg_data_seg(struct mlx5_wqe_data_seg *dseg, 45998a187ee5SSagi Grimberg struct mlx5_ib_mr *mr, 46008a187ee5SSagi Grimberg struct mlx5_ib_pd *pd) 46018a187ee5SSagi Grimberg { 460238ca87c6SMax Gurtovoy int bcount = mr->desc_size * (mr->ndescs + mr->meta_ndescs); 46038a187ee5SSagi Grimberg 46048a187ee5SSagi Grimberg dseg->addr = cpu_to_be64(mr->desc_map); 46058a187ee5SSagi Grimberg dseg->byte_count = cpu_to_be32(ALIGN(bcount, 64)); 46068a187ee5SSagi Grimberg dseg->lkey = cpu_to_be32(pd->ibpd.local_dma_lkey); 46078a187ee5SSagi Grimberg } 46088a187ee5SSagi Grimberg 4609f696bf6dSBart Van Assche static __be32 send_ieth(const struct ib_send_wr *wr) 4610e126ba97SEli Cohen { 4611e126ba97SEli Cohen switch (wr->opcode) { 4612e126ba97SEli Cohen case IB_WR_SEND_WITH_IMM: 4613e126ba97SEli Cohen case IB_WR_RDMA_WRITE_WITH_IMM: 4614e126ba97SEli Cohen return wr->ex.imm_data; 4615e126ba97SEli Cohen 4616e126ba97SEli Cohen case IB_WR_SEND_WITH_INV: 4617e126ba97SEli Cohen return cpu_to_be32(wr->ex.invalidate_rkey); 4618e126ba97SEli Cohen 4619e126ba97SEli Cohen default: 4620e126ba97SEli Cohen return 0; 4621e126ba97SEli Cohen } 4622e126ba97SEli Cohen } 4623e126ba97SEli Cohen 4624e126ba97SEli Cohen static u8 calc_sig(void *wqe, int size) 4625e126ba97SEli Cohen { 4626e126ba97SEli Cohen u8 *p = wqe; 4627e126ba97SEli Cohen u8 res = 0; 4628e126ba97SEli Cohen int i; 4629e126ba97SEli Cohen 4630e126ba97SEli Cohen for (i = 0; i < size; i++) 4631e126ba97SEli Cohen res ^= p[i]; 4632e126ba97SEli Cohen 4633e126ba97SEli Cohen return ~res; 4634e126ba97SEli Cohen } 4635e126ba97SEli Cohen 4636e126ba97SEli Cohen static u8 wq_sig(void *wqe) 4637e126ba97SEli Cohen { 4638e126ba97SEli Cohen return calc_sig(wqe, (*((u8 *)wqe + 8) & 0x3f) << 4); 4639e126ba97SEli Cohen } 4640e126ba97SEli Cohen 4641f696bf6dSBart Van Assche static int set_data_inl_seg(struct mlx5_ib_qp *qp, const struct ib_send_wr *wr, 464234f4c955SGuy Levi void **wqe, int *wqe_sz, void **cur_edge) 4643e126ba97SEli Cohen { 4644e126ba97SEli Cohen struct mlx5_wqe_inline_seg *seg; 464534f4c955SGuy Levi size_t offset; 4646e126ba97SEli Cohen int inl = 0; 4647e126ba97SEli Cohen int i; 4648e126ba97SEli Cohen 464934f4c955SGuy Levi seg = *wqe; 465034f4c955SGuy Levi *wqe += sizeof(*seg); 465134f4c955SGuy Levi offset = sizeof(*seg); 465234f4c955SGuy Levi 4653e126ba97SEli Cohen for (i = 0; i < wr->num_sge; i++) { 465434f4c955SGuy Levi size_t len = wr->sg_list[i].length; 465534f4c955SGuy Levi void *addr = (void *)(unsigned long)(wr->sg_list[i].addr); 465634f4c955SGuy Levi 4657e126ba97SEli Cohen inl += len; 4658e126ba97SEli Cohen 4659e126ba97SEli Cohen if (unlikely(inl > qp->max_inline_data)) 4660e126ba97SEli Cohen return -ENOMEM; 4661e126ba97SEli Cohen 466234f4c955SGuy Levi while (likely(len)) { 466334f4c955SGuy Levi size_t leftlen; 466434f4c955SGuy Levi size_t copysz; 466534f4c955SGuy Levi 466634f4c955SGuy Levi handle_post_send_edge(&qp->sq, wqe, 466734f4c955SGuy Levi *wqe_sz + (offset >> 4), 466834f4c955SGuy Levi cur_edge); 466934f4c955SGuy Levi 467034f4c955SGuy Levi leftlen = *cur_edge - *wqe; 467134f4c955SGuy Levi copysz = min_t(size_t, leftlen, len); 467234f4c955SGuy Levi 467334f4c955SGuy Levi memcpy(*wqe, addr, copysz); 467434f4c955SGuy Levi len -= copysz; 467534f4c955SGuy Levi addr += copysz; 467634f4c955SGuy Levi *wqe += copysz; 467734f4c955SGuy Levi offset += copysz; 4678e126ba97SEli Cohen } 4679e126ba97SEli Cohen } 4680e126ba97SEli Cohen 4681e126ba97SEli Cohen seg->byte_count = cpu_to_be32(inl | MLX5_INLINE_SEG); 4682e126ba97SEli Cohen 468334f4c955SGuy Levi *wqe_sz += ALIGN(inl + sizeof(seg->byte_count), 16) / 16; 4684e126ba97SEli Cohen 4685e126ba97SEli Cohen return 0; 4686e126ba97SEli Cohen } 4687e126ba97SEli Cohen 4688e6631814SSagi Grimberg static u16 prot_field_size(enum ib_signature_type type) 4689e6631814SSagi Grimberg { 4690e6631814SSagi Grimberg switch (type) { 4691e6631814SSagi Grimberg case IB_SIG_TYPE_T10_DIF: 4692e6631814SSagi Grimberg return MLX5_DIF_SIZE; 4693e6631814SSagi Grimberg default: 4694e6631814SSagi Grimberg return 0; 4695e6631814SSagi Grimberg } 4696e6631814SSagi Grimberg } 4697e6631814SSagi Grimberg 4698e6631814SSagi Grimberg static u8 bs_selector(int block_size) 4699e6631814SSagi Grimberg { 4700e6631814SSagi Grimberg switch (block_size) { 4701e6631814SSagi Grimberg case 512: return 0x1; 4702e6631814SSagi Grimberg case 520: return 0x2; 4703e6631814SSagi Grimberg case 4096: return 0x3; 4704e6631814SSagi Grimberg case 4160: return 0x4; 4705e6631814SSagi Grimberg case 1073741824: return 0x5; 4706e6631814SSagi Grimberg default: return 0; 4707e6631814SSagi Grimberg } 4708e6631814SSagi Grimberg } 4709e6631814SSagi Grimberg 471078eda2bbSSagi Grimberg static void mlx5_fill_inl_bsf(struct ib_sig_domain *domain, 4711142537f4SSagi Grimberg struct mlx5_bsf_inl *inl) 4712e6631814SSagi Grimberg { 4713142537f4SSagi Grimberg /* Valid inline section and allow BSF refresh */ 4714142537f4SSagi Grimberg inl->vld_refresh = cpu_to_be16(MLX5_BSF_INL_VALID | 4715142537f4SSagi Grimberg MLX5_BSF_REFRESH_DIF); 4716142537f4SSagi Grimberg inl->dif_apptag = cpu_to_be16(domain->sig.dif.app_tag); 4717142537f4SSagi Grimberg inl->dif_reftag = cpu_to_be32(domain->sig.dif.ref_tag); 4718142537f4SSagi Grimberg /* repeating block */ 4719142537f4SSagi Grimberg inl->rp_inv_seed = MLX5_BSF_REPEAT_BLOCK; 4720142537f4SSagi Grimberg inl->sig_type = domain->sig.dif.bg_type == IB_T10DIF_CRC ? 4721142537f4SSagi Grimberg MLX5_DIF_CRC : MLX5_DIF_IPCS; 4722e6631814SSagi Grimberg 472378eda2bbSSagi Grimberg if (domain->sig.dif.ref_remap) 472478eda2bbSSagi Grimberg inl->dif_inc_ref_guard_check |= MLX5_BSF_INC_REFTAG; 4725e6631814SSagi Grimberg 472678eda2bbSSagi Grimberg if (domain->sig.dif.app_escape) { 472778eda2bbSSagi Grimberg if (domain->sig.dif.ref_escape) 472878eda2bbSSagi Grimberg inl->dif_inc_ref_guard_check |= MLX5_BSF_APPREF_ESCAPE; 472978eda2bbSSagi Grimberg else 473078eda2bbSSagi Grimberg inl->dif_inc_ref_guard_check |= MLX5_BSF_APPTAG_ESCAPE; 4731e6631814SSagi Grimberg } 4732e6631814SSagi Grimberg 473378eda2bbSSagi Grimberg inl->dif_app_bitmask_check = 473478eda2bbSSagi Grimberg cpu_to_be16(domain->sig.dif.apptag_check_mask); 4735e6631814SSagi Grimberg } 4736e6631814SSagi Grimberg 4737e6631814SSagi Grimberg static int mlx5_set_bsf(struct ib_mr *sig_mr, 4738e6631814SSagi Grimberg struct ib_sig_attrs *sig_attrs, 4739e6631814SSagi Grimberg struct mlx5_bsf *bsf, u32 data_size) 4740e6631814SSagi Grimberg { 4741e6631814SSagi Grimberg struct mlx5_core_sig_ctx *msig = to_mmr(sig_mr)->sig; 4742e6631814SSagi Grimberg struct mlx5_bsf_basic *basic = &bsf->basic; 4743e6631814SSagi Grimberg struct ib_sig_domain *mem = &sig_attrs->mem; 4744e6631814SSagi Grimberg struct ib_sig_domain *wire = &sig_attrs->wire; 4745e6631814SSagi Grimberg 4746c7f44fbdSSagi Grimberg memset(bsf, 0, sizeof(*bsf)); 4747e6631814SSagi Grimberg 4748142537f4SSagi Grimberg /* Basic + Extended + Inline */ 4749142537f4SSagi Grimberg basic->bsf_size_sbs = 1 << 7; 4750e6631814SSagi Grimberg /* Input domain check byte mask */ 4751e6631814SSagi Grimberg basic->check_byte_mask = sig_attrs->check_mask; 475278eda2bbSSagi Grimberg basic->raw_data_size = cpu_to_be32(data_size); 475378eda2bbSSagi Grimberg 475478eda2bbSSagi Grimberg /* Memory domain */ 475578eda2bbSSagi Grimberg switch (sig_attrs->mem.sig_type) { 475678eda2bbSSagi Grimberg case IB_SIG_TYPE_NONE: 475778eda2bbSSagi Grimberg break; 475878eda2bbSSagi Grimberg case IB_SIG_TYPE_T10_DIF: 475978eda2bbSSagi Grimberg basic->mem.bs_selector = bs_selector(mem->sig.dif.pi_interval); 476078eda2bbSSagi Grimberg basic->m_bfs_psv = cpu_to_be32(msig->psv_memory.psv_idx); 476178eda2bbSSagi Grimberg mlx5_fill_inl_bsf(mem, &bsf->m_inl); 476278eda2bbSSagi Grimberg break; 476378eda2bbSSagi Grimberg default: 476478eda2bbSSagi Grimberg return -EINVAL; 476578eda2bbSSagi Grimberg } 476678eda2bbSSagi Grimberg 476778eda2bbSSagi Grimberg /* Wire domain */ 476878eda2bbSSagi Grimberg switch (sig_attrs->wire.sig_type) { 476978eda2bbSSagi Grimberg case IB_SIG_TYPE_NONE: 477078eda2bbSSagi Grimberg break; 477178eda2bbSSagi Grimberg case IB_SIG_TYPE_T10_DIF: 4772e6631814SSagi Grimberg if (mem->sig.dif.pi_interval == wire->sig.dif.pi_interval && 477378eda2bbSSagi Grimberg mem->sig_type == wire->sig_type) { 4774e6631814SSagi Grimberg /* Same block structure */ 4775142537f4SSagi Grimberg basic->bsf_size_sbs |= 1 << 4; 4776e6631814SSagi Grimberg if (mem->sig.dif.bg_type == wire->sig.dif.bg_type) 4777fd22f78cSSagi Grimberg basic->wire.copy_byte_mask |= MLX5_CPY_GRD_MASK; 4778c7f44fbdSSagi Grimberg if (mem->sig.dif.app_tag == wire->sig.dif.app_tag) 4779fd22f78cSSagi Grimberg basic->wire.copy_byte_mask |= MLX5_CPY_APP_MASK; 4780c7f44fbdSSagi Grimberg if (mem->sig.dif.ref_tag == wire->sig.dif.ref_tag) 4781fd22f78cSSagi Grimberg basic->wire.copy_byte_mask |= MLX5_CPY_REF_MASK; 4782e6631814SSagi Grimberg } else 4783e6631814SSagi Grimberg basic->wire.bs_selector = bs_selector(wire->sig.dif.pi_interval); 4784e6631814SSagi Grimberg 4785142537f4SSagi Grimberg basic->w_bfs_psv = cpu_to_be32(msig->psv_wire.psv_idx); 478678eda2bbSSagi Grimberg mlx5_fill_inl_bsf(wire, &bsf->w_inl); 4787e6631814SSagi Grimberg break; 4788e6631814SSagi Grimberg default: 4789e6631814SSagi Grimberg return -EINVAL; 4790e6631814SSagi Grimberg } 4791e6631814SSagi Grimberg 4792e6631814SSagi Grimberg return 0; 4793e6631814SSagi Grimberg } 4794e6631814SSagi Grimberg 479538ca87c6SMax Gurtovoy static int set_sig_data_segment(const struct ib_send_wr *send_wr, 479638ca87c6SMax Gurtovoy struct ib_mr *sig_mr, 479738ca87c6SMax Gurtovoy struct ib_sig_attrs *sig_attrs, 479838ca87c6SMax Gurtovoy struct mlx5_ib_qp *qp, void **seg, int *size, 479938ca87c6SMax Gurtovoy void **cur_edge) 4800e6631814SSagi Grimberg { 4801e6631814SSagi Grimberg struct mlx5_bsf *bsf; 480238ca87c6SMax Gurtovoy u32 data_len; 480338ca87c6SMax Gurtovoy u32 data_key; 480438ca87c6SMax Gurtovoy u64 data_va; 480538ca87c6SMax Gurtovoy u32 prot_len = 0; 480638ca87c6SMax Gurtovoy u32 prot_key = 0; 480738ca87c6SMax Gurtovoy u64 prot_va = 0; 480838ca87c6SMax Gurtovoy bool prot = false; 4809e6631814SSagi Grimberg int ret; 4810e6631814SSagi Grimberg int wqe_size; 481138ca87c6SMax Gurtovoy struct mlx5_ib_mr *mr = to_mmr(sig_mr); 481238ca87c6SMax Gurtovoy struct mlx5_ib_mr *pi_mr = mr->pi_mr; 481338ca87c6SMax Gurtovoy 481438ca87c6SMax Gurtovoy data_len = pi_mr->data_length; 481538ca87c6SMax Gurtovoy data_key = pi_mr->ibmr.lkey; 48162563e2f3SMax Gurtovoy data_va = pi_mr->data_iova; 481738ca87c6SMax Gurtovoy if (pi_mr->meta_ndescs) { 481838ca87c6SMax Gurtovoy prot_len = pi_mr->meta_length; 481938ca87c6SMax Gurtovoy prot_key = pi_mr->ibmr.lkey; 4820de0ae958SIsrael Rukshin prot_va = pi_mr->pi_iova; 482138ca87c6SMax Gurtovoy prot = true; 482238ca87c6SMax Gurtovoy } 482338ca87c6SMax Gurtovoy 482438ca87c6SMax Gurtovoy if (!prot || (data_key == prot_key && data_va == prot_va && 482538ca87c6SMax Gurtovoy data_len == prot_len)) { 4826e6631814SSagi Grimberg /** 4827e6631814SSagi Grimberg * Source domain doesn't contain signature information 48285c273b16SSagi Grimberg * or data and protection are interleaved in memory. 4829e6631814SSagi Grimberg * So need construct: 4830e6631814SSagi Grimberg * ------------------ 4831e6631814SSagi Grimberg * | data_klm | 4832e6631814SSagi Grimberg * ------------------ 4833e6631814SSagi Grimberg * | BSF | 4834e6631814SSagi Grimberg * ------------------ 4835e6631814SSagi Grimberg **/ 4836e6631814SSagi Grimberg struct mlx5_klm *data_klm = *seg; 4837e6631814SSagi Grimberg 4838e6631814SSagi Grimberg data_klm->bcount = cpu_to_be32(data_len); 4839e6631814SSagi Grimberg data_klm->key = cpu_to_be32(data_key); 4840e6631814SSagi Grimberg data_klm->va = cpu_to_be64(data_va); 4841e6631814SSagi Grimberg wqe_size = ALIGN(sizeof(*data_klm), 64); 4842e6631814SSagi Grimberg } else { 4843e6631814SSagi Grimberg /** 4844e6631814SSagi Grimberg * Source domain contains signature information 4845e6631814SSagi Grimberg * So need construct a strided block format: 4846e6631814SSagi Grimberg * --------------------------- 4847e6631814SSagi Grimberg * | stride_block_ctrl | 4848e6631814SSagi Grimberg * --------------------------- 4849e6631814SSagi Grimberg * | data_klm | 4850e6631814SSagi Grimberg * --------------------------- 4851e6631814SSagi Grimberg * | prot_klm | 4852e6631814SSagi Grimberg * --------------------------- 4853e6631814SSagi Grimberg * | BSF | 4854e6631814SSagi Grimberg * --------------------------- 4855e6631814SSagi Grimberg **/ 4856e6631814SSagi Grimberg struct mlx5_stride_block_ctrl_seg *sblock_ctrl; 4857e6631814SSagi Grimberg struct mlx5_stride_block_entry *data_sentry; 4858e6631814SSagi Grimberg struct mlx5_stride_block_entry *prot_sentry; 4859e6631814SSagi Grimberg u16 block_size = sig_attrs->mem.sig.dif.pi_interval; 4860e6631814SSagi Grimberg int prot_size; 4861e6631814SSagi Grimberg 4862e6631814SSagi Grimberg sblock_ctrl = *seg; 4863e6631814SSagi Grimberg data_sentry = (void *)sblock_ctrl + sizeof(*sblock_ctrl); 4864e6631814SSagi Grimberg prot_sentry = (void *)data_sentry + sizeof(*data_sentry); 4865e6631814SSagi Grimberg 4866e6631814SSagi Grimberg prot_size = prot_field_size(sig_attrs->mem.sig_type); 4867e6631814SSagi Grimberg if (!prot_size) { 4868e6631814SSagi Grimberg pr_err("Bad block size given: %u\n", block_size); 4869e6631814SSagi Grimberg return -EINVAL; 4870e6631814SSagi Grimberg } 4871e6631814SSagi Grimberg sblock_ctrl->bcount_per_cycle = cpu_to_be32(block_size + 4872e6631814SSagi Grimberg prot_size); 4873e6631814SSagi Grimberg sblock_ctrl->op = cpu_to_be32(MLX5_STRIDE_BLOCK_OP); 4874e6631814SSagi Grimberg sblock_ctrl->repeat_count = cpu_to_be32(data_len / block_size); 4875e6631814SSagi Grimberg sblock_ctrl->num_entries = cpu_to_be16(2); 4876e6631814SSagi Grimberg 4877e6631814SSagi Grimberg data_sentry->bcount = cpu_to_be16(block_size); 4878e6631814SSagi Grimberg data_sentry->key = cpu_to_be32(data_key); 4879e6631814SSagi Grimberg data_sentry->va = cpu_to_be64(data_va); 48805c273b16SSagi Grimberg data_sentry->stride = cpu_to_be16(block_size); 48815c273b16SSagi Grimberg 4882e6631814SSagi Grimberg prot_sentry->bcount = cpu_to_be16(prot_size); 4883e6631814SSagi Grimberg prot_sentry->key = cpu_to_be32(prot_key); 4884e6631814SSagi Grimberg prot_sentry->va = cpu_to_be64(prot_va); 4885e6631814SSagi Grimberg prot_sentry->stride = cpu_to_be16(prot_size); 48865c273b16SSagi Grimberg 4887e6631814SSagi Grimberg wqe_size = ALIGN(sizeof(*sblock_ctrl) + sizeof(*data_sentry) + 4888e6631814SSagi Grimberg sizeof(*prot_sentry), 64); 4889e6631814SSagi Grimberg } 4890e6631814SSagi Grimberg 4891e6631814SSagi Grimberg *seg += wqe_size; 4892e6631814SSagi Grimberg *size += wqe_size / 16; 489334f4c955SGuy Levi handle_post_send_edge(&qp->sq, seg, *size, cur_edge); 4894e6631814SSagi Grimberg 4895e6631814SSagi Grimberg bsf = *seg; 4896e6631814SSagi Grimberg ret = mlx5_set_bsf(sig_mr, sig_attrs, bsf, data_len); 4897e6631814SSagi Grimberg if (ret) 4898e6631814SSagi Grimberg return -EINVAL; 4899e6631814SSagi Grimberg 4900e6631814SSagi Grimberg *seg += sizeof(*bsf); 4901e6631814SSagi Grimberg *size += sizeof(*bsf) / 16; 490234f4c955SGuy Levi handle_post_send_edge(&qp->sq, seg, *size, cur_edge); 4903e6631814SSagi Grimberg 4904e6631814SSagi Grimberg return 0; 4905e6631814SSagi Grimberg } 4906e6631814SSagi Grimberg 4907e6631814SSagi Grimberg static void set_sig_mkey_segment(struct mlx5_mkey_seg *seg, 490822465bbaSMax Gurtovoy struct ib_mr *sig_mr, int access_flags, 490922465bbaSMax Gurtovoy u32 size, u32 length, u32 pdn) 4910e6631814SSagi Grimberg { 4911e6631814SSagi Grimberg u32 sig_key = sig_mr->rkey; 4912d5436ba0SSagi Grimberg u8 sigerr = to_mmr(sig_mr)->sig->sigerr_count & 1; 4913e6631814SSagi Grimberg 4914e6631814SSagi Grimberg memset(seg, 0, sizeof(*seg)); 4915e6631814SSagi Grimberg 491622465bbaSMax Gurtovoy seg->flags = get_umr_flags(access_flags) | MLX5_MKC_ACCESS_MODE_KLMS; 4917e6631814SSagi Grimberg seg->qpn_mkey7_0 = cpu_to_be32((sig_key & 0xff) | 0xffffff00); 4918d5436ba0SSagi Grimberg seg->flags_pd = cpu_to_be32(MLX5_MKEY_REMOTE_INVAL | sigerr << 26 | 4919e6631814SSagi Grimberg MLX5_MKEY_BSF_EN | pdn); 4920e6631814SSagi Grimberg seg->len = cpu_to_be64(length); 492131616255SArtemy Kovalyov seg->xlt_oct_size = cpu_to_be32(get_xlt_octo(size)); 4922e6631814SSagi Grimberg seg->bsfs_octo_size = cpu_to_be32(MLX5_MKEY_BSF_OCTO_SIZE); 4923e6631814SSagi Grimberg } 4924e6631814SSagi Grimberg 4925e6631814SSagi Grimberg static void set_sig_umr_segment(struct mlx5_wqe_umr_ctrl_seg *umr, 492631616255SArtemy Kovalyov u32 size) 4927e6631814SSagi Grimberg { 4928e6631814SSagi Grimberg memset(umr, 0, sizeof(*umr)); 4929e6631814SSagi Grimberg 4930e6631814SSagi Grimberg umr->flags = MLX5_FLAGS_INLINE | MLX5_FLAGS_CHECK_FREE; 493131616255SArtemy Kovalyov umr->xlt_octowords = cpu_to_be16(get_xlt_octo(size)); 4932e6631814SSagi Grimberg umr->bsf_octowords = cpu_to_be16(MLX5_MKEY_BSF_OCTO_SIZE); 4933e6631814SSagi Grimberg umr->mkey_mask = sig_mkey_mask(); 4934e6631814SSagi Grimberg } 4935e6631814SSagi Grimberg 493638ca87c6SMax Gurtovoy static int set_pi_umr_wr(const struct ib_send_wr *send_wr, 493738ca87c6SMax Gurtovoy struct mlx5_ib_qp *qp, void **seg, int *size, 493838ca87c6SMax Gurtovoy void **cur_edge) 493938ca87c6SMax Gurtovoy { 494038ca87c6SMax Gurtovoy const struct ib_reg_wr *wr = reg_wr(send_wr); 494138ca87c6SMax Gurtovoy struct mlx5_ib_mr *sig_mr = to_mmr(wr->mr); 494238ca87c6SMax Gurtovoy struct mlx5_ib_mr *pi_mr = sig_mr->pi_mr; 494338ca87c6SMax Gurtovoy struct ib_sig_attrs *sig_attrs = sig_mr->ibmr.sig_attrs; 494438ca87c6SMax Gurtovoy u32 pdn = get_pd(qp)->pdn; 494538ca87c6SMax Gurtovoy u32 xlt_size; 494638ca87c6SMax Gurtovoy int region_len, ret; 494738ca87c6SMax Gurtovoy 494838ca87c6SMax Gurtovoy if (unlikely(send_wr->num_sge != 0) || 494938ca87c6SMax Gurtovoy unlikely(wr->access & IB_ACCESS_REMOTE_ATOMIC) || 4950185eddc4SMax Gurtovoy unlikely(!sig_mr->sig) || unlikely(!qp->ibqp.integrity_en) || 495138ca87c6SMax Gurtovoy unlikely(!sig_mr->sig->sig_status_checked)) 495238ca87c6SMax Gurtovoy return -EINVAL; 495338ca87c6SMax Gurtovoy 495438ca87c6SMax Gurtovoy /* length of the protected region, data + protection */ 495538ca87c6SMax Gurtovoy region_len = pi_mr->ibmr.length; 495638ca87c6SMax Gurtovoy 495738ca87c6SMax Gurtovoy /** 495838ca87c6SMax Gurtovoy * KLM octoword size - if protection was provided 495938ca87c6SMax Gurtovoy * then we use strided block format (3 octowords), 496038ca87c6SMax Gurtovoy * else we use single KLM (1 octoword) 496138ca87c6SMax Gurtovoy **/ 496238ca87c6SMax Gurtovoy if (sig_attrs->mem.sig_type != IB_SIG_TYPE_NONE) 496338ca87c6SMax Gurtovoy xlt_size = 0x30; 496438ca87c6SMax Gurtovoy else 496538ca87c6SMax Gurtovoy xlt_size = sizeof(struct mlx5_klm); 496638ca87c6SMax Gurtovoy 496738ca87c6SMax Gurtovoy set_sig_umr_segment(*seg, xlt_size); 496838ca87c6SMax Gurtovoy *seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 496938ca87c6SMax Gurtovoy *size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 497038ca87c6SMax Gurtovoy handle_post_send_edge(&qp->sq, seg, *size, cur_edge); 497138ca87c6SMax Gurtovoy 497238ca87c6SMax Gurtovoy set_sig_mkey_segment(*seg, wr->mr, wr->access, xlt_size, region_len, 497338ca87c6SMax Gurtovoy pdn); 497438ca87c6SMax Gurtovoy *seg += sizeof(struct mlx5_mkey_seg); 497538ca87c6SMax Gurtovoy *size += sizeof(struct mlx5_mkey_seg) / 16; 497638ca87c6SMax Gurtovoy handle_post_send_edge(&qp->sq, seg, *size, cur_edge); 497738ca87c6SMax Gurtovoy 497838ca87c6SMax Gurtovoy ret = set_sig_data_segment(send_wr, wr->mr, sig_attrs, qp, seg, size, 497938ca87c6SMax Gurtovoy cur_edge); 498038ca87c6SMax Gurtovoy if (ret) 498138ca87c6SMax Gurtovoy return ret; 498238ca87c6SMax Gurtovoy 498338ca87c6SMax Gurtovoy sig_mr->sig->sig_status_checked = false; 498438ca87c6SMax Gurtovoy return 0; 498538ca87c6SMax Gurtovoy } 4986e6631814SSagi Grimberg 4987e6631814SSagi Grimberg static int set_psv_wr(struct ib_sig_domain *domain, 4988e6631814SSagi Grimberg u32 psv_idx, void **seg, int *size) 4989e6631814SSagi Grimberg { 4990e6631814SSagi Grimberg struct mlx5_seg_set_psv *psv_seg = *seg; 4991e6631814SSagi Grimberg 4992e6631814SSagi Grimberg memset(psv_seg, 0, sizeof(*psv_seg)); 4993e6631814SSagi Grimberg psv_seg->psv_num = cpu_to_be32(psv_idx); 4994e6631814SSagi Grimberg switch (domain->sig_type) { 499578eda2bbSSagi Grimberg case IB_SIG_TYPE_NONE: 499678eda2bbSSagi Grimberg break; 4997e6631814SSagi Grimberg case IB_SIG_TYPE_T10_DIF: 4998e6631814SSagi Grimberg psv_seg->transient_sig = cpu_to_be32(domain->sig.dif.bg << 16 | 4999e6631814SSagi Grimberg domain->sig.dif.app_tag); 5000e6631814SSagi Grimberg psv_seg->ref_tag = cpu_to_be32(domain->sig.dif.ref_tag); 5001e6631814SSagi Grimberg break; 5002e6631814SSagi Grimberg default: 500312bbf1eaSLeon Romanovsky pr_err("Bad signature type (%d) is given.\n", 500412bbf1eaSLeon Romanovsky domain->sig_type); 500512bbf1eaSLeon Romanovsky return -EINVAL; 5006e6631814SSagi Grimberg } 5007e6631814SSagi Grimberg 500878eda2bbSSagi Grimberg *seg += sizeof(*psv_seg); 500978eda2bbSSagi Grimberg *size += sizeof(*psv_seg) / 16; 501078eda2bbSSagi Grimberg 5011e6631814SSagi Grimberg return 0; 5012e6631814SSagi Grimberg } 5013e6631814SSagi Grimberg 50148a187ee5SSagi Grimberg static int set_reg_wr(struct mlx5_ib_qp *qp, 5015f696bf6dSBart Van Assche const struct ib_reg_wr *wr, 50169ac7c4bcSMax Gurtovoy void **seg, int *size, void **cur_edge, 50179ac7c4bcSMax Gurtovoy bool check_not_free) 50188a187ee5SSagi Grimberg { 50198a187ee5SSagi Grimberg struct mlx5_ib_mr *mr = to_mmr(wr->mr); 50208a187ee5SSagi Grimberg struct mlx5_ib_pd *pd = to_mpd(qp->ibqp.pd); 5021841b07f9SMoni Shoua struct mlx5_ib_dev *dev = to_mdev(pd->ibpd.device); 502238ca87c6SMax Gurtovoy int mr_list_size = (mr->ndescs + mr->meta_ndescs) * mr->desc_size; 5023064e5262SIdan Burstein bool umr_inline = mr_list_size <= MLX5_IB_SQ_UMR_INLINE_THRESHOLD; 5024841b07f9SMoni Shoua bool atomic = wr->access & IB_ACCESS_REMOTE_ATOMIC; 50259ac7c4bcSMax Gurtovoy u8 flags = 0; 50268a187ee5SSagi Grimberg 5027d6de0bb1SMichael Guralnik if (!mlx5_ib_can_use_umr(dev, atomic, wr->access)) { 5028841b07f9SMoni Shoua mlx5_ib_warn(to_mdev(qp->ibqp.device), 5029841b07f9SMoni Shoua "Fast update of %s for MR is disabled\n", 5030841b07f9SMoni Shoua (MLX5_CAP_GEN(dev->mdev, 5031841b07f9SMoni Shoua umr_modify_entity_size_disabled)) ? 5032841b07f9SMoni Shoua "entity size" : 5033841b07f9SMoni Shoua "atomic access"); 5034841b07f9SMoni Shoua return -EINVAL; 5035841b07f9SMoni Shoua } 5036841b07f9SMoni Shoua 50378a187ee5SSagi Grimberg if (unlikely(wr->wr.send_flags & IB_SEND_INLINE)) { 50388a187ee5SSagi Grimberg mlx5_ib_warn(to_mdev(qp->ibqp.device), 50398a187ee5SSagi Grimberg "Invalid IB_SEND_INLINE send flag\n"); 50408a187ee5SSagi Grimberg return -EINVAL; 50418a187ee5SSagi Grimberg } 50428a187ee5SSagi Grimberg 50439ac7c4bcSMax Gurtovoy if (check_not_free) 50449ac7c4bcSMax Gurtovoy flags |= MLX5_UMR_CHECK_NOT_FREE; 50459ac7c4bcSMax Gurtovoy if (umr_inline) 50469ac7c4bcSMax Gurtovoy flags |= MLX5_UMR_INLINE; 50479ac7c4bcSMax Gurtovoy 5048841b07f9SMoni Shoua set_reg_umr_seg(*seg, mr, flags, atomic); 50498a187ee5SSagi Grimberg *seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 50508a187ee5SSagi Grimberg *size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 505134f4c955SGuy Levi handle_post_send_edge(&qp->sq, seg, *size, cur_edge); 50528a187ee5SSagi Grimberg 50538a187ee5SSagi Grimberg set_reg_mkey_seg(*seg, mr, wr->key, wr->access); 50548a187ee5SSagi Grimberg *seg += sizeof(struct mlx5_mkey_seg); 50558a187ee5SSagi Grimberg *size += sizeof(struct mlx5_mkey_seg) / 16; 505634f4c955SGuy Levi handle_post_send_edge(&qp->sq, seg, *size, cur_edge); 50578a187ee5SSagi Grimberg 5058064e5262SIdan Burstein if (umr_inline) { 505934f4c955SGuy Levi memcpy_send_wqe(&qp->sq, cur_edge, seg, size, mr->descs, 506034f4c955SGuy Levi mr_list_size); 506134f4c955SGuy Levi *size = ALIGN(*size, MLX5_SEND_WQE_BB >> 4); 5062064e5262SIdan Burstein } else { 50638a187ee5SSagi Grimberg set_reg_data_seg(*seg, mr, pd); 50648a187ee5SSagi Grimberg *seg += sizeof(struct mlx5_wqe_data_seg); 50658a187ee5SSagi Grimberg *size += (sizeof(struct mlx5_wqe_data_seg) / 16); 5066064e5262SIdan Burstein } 50678a187ee5SSagi Grimberg return 0; 50688a187ee5SSagi Grimberg } 50698a187ee5SSagi Grimberg 507034f4c955SGuy Levi static void set_linv_wr(struct mlx5_ib_qp *qp, void **seg, int *size, 507134f4c955SGuy Levi void **cur_edge) 5072e126ba97SEli Cohen { 5073dd01e66aSSagi Grimberg set_linv_umr_seg(*seg); 5074e126ba97SEli Cohen *seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 5075e126ba97SEli Cohen *size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 507634f4c955SGuy Levi handle_post_send_edge(&qp->sq, seg, *size, cur_edge); 5077dd01e66aSSagi Grimberg set_linv_mkey_seg(*seg); 5078e126ba97SEli Cohen *seg += sizeof(struct mlx5_mkey_seg); 5079e126ba97SEli Cohen *size += sizeof(struct mlx5_mkey_seg) / 16; 508034f4c955SGuy Levi handle_post_send_edge(&qp->sq, seg, *size, cur_edge); 5081e126ba97SEli Cohen } 5082e126ba97SEli Cohen 508334f4c955SGuy Levi static void dump_wqe(struct mlx5_ib_qp *qp, u32 idx, int size_16) 5084e126ba97SEli Cohen { 5085e126ba97SEli Cohen __be32 *p = NULL; 5086e126ba97SEli Cohen int i, j; 5087e126ba97SEli Cohen 508834f4c955SGuy Levi pr_debug("dump WQE index %u:\n", idx); 5089e126ba97SEli Cohen for (i = 0, j = 0; i < size_16 * 4; i += 4, j += 4) { 5090e126ba97SEli Cohen if ((i & 0xf) == 0) { 50911e5887b7SArtemy Kovalyov p = mlx5_frag_buf_get_wqe(&qp->sq.fbc, idx); 509234f4c955SGuy Levi pr_debug("WQBB at %p:\n", (void *)p); 5093e126ba97SEli Cohen j = 0; 50941e5887b7SArtemy Kovalyov idx = (idx + 1) & (qp->sq.wqe_cnt - 1); 5095e126ba97SEli Cohen } 5096e126ba97SEli Cohen pr_debug("%08x %08x %08x %08x\n", be32_to_cpu(p[j]), 5097e126ba97SEli Cohen be32_to_cpu(p[j + 1]), be32_to_cpu(p[j + 2]), 5098e126ba97SEli Cohen be32_to_cpu(p[j + 3])); 5099e126ba97SEli Cohen } 5100e126ba97SEli Cohen } 5101e126ba97SEli Cohen 51027bb1fafcSBart Van Assche static int __begin_wqe(struct mlx5_ib_qp *qp, void **seg, 51036e5eadacSSagi Grimberg struct mlx5_wqe_ctrl_seg **ctrl, 510434f4c955SGuy Levi const struct ib_send_wr *wr, unsigned int *idx, 510534f4c955SGuy Levi int *size, void **cur_edge, int nreq, 510634f4c955SGuy Levi bool send_signaled, bool solicited) 51076e5eadacSSagi Grimberg { 5108b2a232d2SLeon Romanovsky if (unlikely(mlx5_wq_overflow(&qp->sq, nreq, qp->ibqp.send_cq))) 5109b2a232d2SLeon Romanovsky return -ENOMEM; 51106e5eadacSSagi Grimberg 51116e5eadacSSagi Grimberg *idx = qp->sq.cur_post & (qp->sq.wqe_cnt - 1); 511234f4c955SGuy Levi *seg = mlx5_frag_buf_get_wqe(&qp->sq.fbc, *idx); 51136e5eadacSSagi Grimberg *ctrl = *seg; 51146e5eadacSSagi Grimberg *(uint32_t *)(*seg + 8) = 0; 51156e5eadacSSagi Grimberg (*ctrl)->imm = send_ieth(wr); 51166e5eadacSSagi Grimberg (*ctrl)->fm_ce_se = qp->sq_signal_bits | 51177bb1fafcSBart Van Assche (send_signaled ? MLX5_WQE_CTRL_CQ_UPDATE : 0) | 51187bb1fafcSBart Van Assche (solicited ? MLX5_WQE_CTRL_SOLICITED : 0); 51196e5eadacSSagi Grimberg 51206e5eadacSSagi Grimberg *seg += sizeof(**ctrl); 51216e5eadacSSagi Grimberg *size = sizeof(**ctrl) / 16; 512234f4c955SGuy Levi *cur_edge = qp->sq.cur_edge; 51236e5eadacSSagi Grimberg 5124b2a232d2SLeon Romanovsky return 0; 51256e5eadacSSagi Grimberg } 51266e5eadacSSagi Grimberg 51277bb1fafcSBart Van Assche static int begin_wqe(struct mlx5_ib_qp *qp, void **seg, 51287bb1fafcSBart Van Assche struct mlx5_wqe_ctrl_seg **ctrl, 51297bb1fafcSBart Van Assche const struct ib_send_wr *wr, unsigned *idx, 513034f4c955SGuy Levi int *size, void **cur_edge, int nreq) 51317bb1fafcSBart Van Assche { 513234f4c955SGuy Levi return __begin_wqe(qp, seg, ctrl, wr, idx, size, cur_edge, nreq, 51337bb1fafcSBart Van Assche wr->send_flags & IB_SEND_SIGNALED, 51347bb1fafcSBart Van Assche wr->send_flags & IB_SEND_SOLICITED); 51357bb1fafcSBart Van Assche } 51367bb1fafcSBart Van Assche 51376e5eadacSSagi Grimberg static void finish_wqe(struct mlx5_ib_qp *qp, 51386e5eadacSSagi Grimberg struct mlx5_wqe_ctrl_seg *ctrl, 513934f4c955SGuy Levi void *seg, u8 size, void *cur_edge, 514034f4c955SGuy Levi unsigned int idx, u64 wr_id, int nreq, u8 fence, 514134f4c955SGuy Levi u32 mlx5_opcode) 51426e5eadacSSagi Grimberg { 51436e5eadacSSagi Grimberg u8 opmod = 0; 51446e5eadacSSagi Grimberg 51456e5eadacSSagi Grimberg ctrl->opmod_idx_opcode = cpu_to_be32(((u32)(qp->sq.cur_post) << 8) | 51466e5eadacSSagi Grimberg mlx5_opcode | ((u32)opmod << 24)); 514719098df2Smajd@mellanox.com ctrl->qpn_ds = cpu_to_be32(size | (qp->trans_qp.base.mqp.qpn << 8)); 51486e5eadacSSagi Grimberg ctrl->fm_ce_se |= fence; 5149c95e6d53SLeon Romanovsky if (unlikely(qp->flags_en & MLX5_QP_FLAG_SIGNATURE)) 51506e5eadacSSagi Grimberg ctrl->signature = wq_sig(ctrl); 51516e5eadacSSagi Grimberg 51526e5eadacSSagi Grimberg qp->sq.wrid[idx] = wr_id; 51536e5eadacSSagi Grimberg qp->sq.w_list[idx].opcode = mlx5_opcode; 51546e5eadacSSagi Grimberg qp->sq.wqe_head[idx] = qp->sq.head + nreq; 51556e5eadacSSagi Grimberg qp->sq.cur_post += DIV_ROUND_UP(size * 16, MLX5_SEND_WQE_BB); 51566e5eadacSSagi Grimberg qp->sq.w_list[idx].next = qp->sq.cur_post; 515734f4c955SGuy Levi 515834f4c955SGuy Levi /* We save the edge which was possibly updated during the WQE 515934f4c955SGuy Levi * construction, into SQ's cache. 516034f4c955SGuy Levi */ 516134f4c955SGuy Levi seg = PTR_ALIGN(seg, MLX5_SEND_WQE_BB); 516234f4c955SGuy Levi qp->sq.cur_edge = (unlikely(seg == cur_edge)) ? 516334f4c955SGuy Levi get_sq_edge(&qp->sq, qp->sq.cur_post & 516434f4c955SGuy Levi (qp->sq.wqe_cnt - 1)) : 516534f4c955SGuy Levi cur_edge; 51666e5eadacSSagi Grimberg } 51676e5eadacSSagi Grimberg 5168d34ac5cdSBart Van Assche static int _mlx5_ib_post_send(struct ib_qp *ibqp, const struct ib_send_wr *wr, 5169d34ac5cdSBart Van Assche const struct ib_send_wr **bad_wr, bool drain) 5170e126ba97SEli Cohen { 5171e126ba97SEli Cohen struct mlx5_wqe_ctrl_seg *ctrl = NULL; /* compiler warning */ 5172e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 517389ea94a7SMaor Gottlieb struct mlx5_core_dev *mdev = dev->mdev; 517438ca87c6SMax Gurtovoy struct ib_reg_wr reg_pi_wr; 5175d16e91daSHaggai Eran struct mlx5_ib_qp *qp; 5176e6631814SSagi Grimberg struct mlx5_ib_mr *mr; 517738ca87c6SMax Gurtovoy struct mlx5_ib_mr *pi_mr; 51782563e2f3SMax Gurtovoy struct mlx5_ib_mr pa_pi_mr; 517938ca87c6SMax Gurtovoy struct ib_sig_attrs *sig_attrs; 5180e126ba97SEli Cohen struct mlx5_wqe_xrc_seg *xrc; 5181d16e91daSHaggai Eran struct mlx5_bf *bf; 518234f4c955SGuy Levi void *cur_edge; 5183e126ba97SEli Cohen int uninitialized_var(size); 5184e126ba97SEli Cohen unsigned long flags; 5185e126ba97SEli Cohen unsigned idx; 5186e126ba97SEli Cohen int err = 0; 5187e126ba97SEli Cohen int num_sge; 5188e126ba97SEli Cohen void *seg; 5189e126ba97SEli Cohen int nreq; 5190e126ba97SEli Cohen int i; 5191e126ba97SEli Cohen u8 next_fence = 0; 5192e126ba97SEli Cohen u8 fence; 5193e126ba97SEli Cohen 51946c75520fSParav Pandit if (unlikely(mdev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR && 51956c75520fSParav Pandit !drain)) { 51966c75520fSParav Pandit *bad_wr = wr; 51976c75520fSParav Pandit return -EIO; 51986c75520fSParav Pandit } 51996c75520fSParav Pandit 5200d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 5201d16e91daSHaggai Eran return mlx5_ib_gsi_post_send(ibqp, wr, bad_wr); 5202d16e91daSHaggai Eran 5203d16e91daSHaggai Eran qp = to_mqp(ibqp); 52045fe9dec0SEli Cohen bf = &qp->bf; 5205d16e91daSHaggai Eran 5206e126ba97SEli Cohen spin_lock_irqsave(&qp->sq.lock, flags); 5207e126ba97SEli Cohen 5208e126ba97SEli Cohen for (nreq = 0; wr; nreq++, wr = wr->next) { 5209a8f731ebSFabian Frederick if (unlikely(wr->opcode >= ARRAY_SIZE(mlx5_ib_opcode))) { 5210e126ba97SEli Cohen mlx5_ib_warn(dev, "\n"); 5211e126ba97SEli Cohen err = -EINVAL; 5212e126ba97SEli Cohen *bad_wr = wr; 5213e126ba97SEli Cohen goto out; 5214e126ba97SEli Cohen } 5215e126ba97SEli Cohen 5216e126ba97SEli Cohen num_sge = wr->num_sge; 5217e126ba97SEli Cohen if (unlikely(num_sge > qp->sq.max_gs)) { 5218e126ba97SEli Cohen mlx5_ib_warn(dev, "\n"); 521924be409bSChuck Lever err = -EINVAL; 5220e126ba97SEli Cohen *bad_wr = wr; 5221e126ba97SEli Cohen goto out; 5222e126ba97SEli Cohen } 5223e126ba97SEli Cohen 522434f4c955SGuy Levi err = begin_wqe(qp, &seg, &ctrl, wr, &idx, &size, &cur_edge, 522534f4c955SGuy Levi nreq); 52266e5eadacSSagi Grimberg if (err) { 52276e5eadacSSagi Grimberg mlx5_ib_warn(dev, "\n"); 52286e5eadacSSagi Grimberg err = -ENOMEM; 52296e5eadacSSagi Grimberg *bad_wr = wr; 52306e5eadacSSagi Grimberg goto out; 52316e5eadacSSagi Grimberg } 5232e126ba97SEli Cohen 523338ca87c6SMax Gurtovoy if (wr->opcode == IB_WR_REG_MR || 523438ca87c6SMax Gurtovoy wr->opcode == IB_WR_REG_MR_INTEGRITY) { 52356e8484c5SMax Gurtovoy fence = dev->umr_fence; 52366e8484c5SMax Gurtovoy next_fence = MLX5_FENCE_MODE_INITIATOR_SMALL; 5237074fca3aSMajd Dibbiny } else { 5238074fca3aSMajd Dibbiny if (wr->send_flags & IB_SEND_FENCE) { 52396e8484c5SMax Gurtovoy if (qp->next_fence) 52406e8484c5SMax Gurtovoy fence = MLX5_FENCE_MODE_SMALL_AND_FENCE; 52416e8484c5SMax Gurtovoy else 52426e8484c5SMax Gurtovoy fence = MLX5_FENCE_MODE_FENCE; 52436e8484c5SMax Gurtovoy } else { 52446e8484c5SMax Gurtovoy fence = qp->next_fence; 52456e8484c5SMax Gurtovoy } 5246074fca3aSMajd Dibbiny } 52476e8484c5SMax Gurtovoy 5248e126ba97SEli Cohen switch (ibqp->qp_type) { 5249e126ba97SEli Cohen case IB_QPT_XRC_INI: 5250e126ba97SEli Cohen xrc = seg; 5251e126ba97SEli Cohen seg += sizeof(*xrc); 5252e126ba97SEli Cohen size += sizeof(*xrc) / 16; 5253e126ba97SEli Cohen /* fall through */ 5254e126ba97SEli Cohen case IB_QPT_RC: 5255e126ba97SEli Cohen switch (wr->opcode) { 5256e126ba97SEli Cohen case IB_WR_RDMA_READ: 5257e126ba97SEli Cohen case IB_WR_RDMA_WRITE: 5258e126ba97SEli Cohen case IB_WR_RDMA_WRITE_WITH_IMM: 5259e622f2f4SChristoph Hellwig set_raddr_seg(seg, rdma_wr(wr)->remote_addr, 5260e622f2f4SChristoph Hellwig rdma_wr(wr)->rkey); 5261e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_raddr_seg); 5262e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_raddr_seg) / 16; 5263e126ba97SEli Cohen break; 5264e126ba97SEli Cohen 5265e126ba97SEli Cohen case IB_WR_ATOMIC_CMP_AND_SWP: 5266e126ba97SEli Cohen case IB_WR_ATOMIC_FETCH_AND_ADD: 5267e126ba97SEli Cohen case IB_WR_MASKED_ATOMIC_CMP_AND_SWP: 526881bea28fSEli Cohen mlx5_ib_warn(dev, "Atomic operations are not supported yet\n"); 526981bea28fSEli Cohen err = -ENOSYS; 527081bea28fSEli Cohen *bad_wr = wr; 527181bea28fSEli Cohen goto out; 5272e126ba97SEli Cohen 5273e126ba97SEli Cohen case IB_WR_LOCAL_INV: 5274e126ba97SEli Cohen qp->sq.wr_data[idx] = IB_WR_LOCAL_INV; 5275e126ba97SEli Cohen ctrl->imm = cpu_to_be32(wr->ex.invalidate_rkey); 527634f4c955SGuy Levi set_linv_wr(qp, &seg, &size, &cur_edge); 5277e126ba97SEli Cohen num_sge = 0; 5278e126ba97SEli Cohen break; 5279e126ba97SEli Cohen 52808a187ee5SSagi Grimberg case IB_WR_REG_MR: 52818a187ee5SSagi Grimberg qp->sq.wr_data[idx] = IB_WR_REG_MR; 52828a187ee5SSagi Grimberg ctrl->imm = cpu_to_be32(reg_wr(wr)->key); 528334f4c955SGuy Levi err = set_reg_wr(qp, reg_wr(wr), &seg, &size, 52849ac7c4bcSMax Gurtovoy &cur_edge, true); 52858a187ee5SSagi Grimberg if (err) { 52868a187ee5SSagi Grimberg *bad_wr = wr; 52878a187ee5SSagi Grimberg goto out; 52888a187ee5SSagi Grimberg } 52898a187ee5SSagi Grimberg num_sge = 0; 52908a187ee5SSagi Grimberg break; 52918a187ee5SSagi Grimberg 529238ca87c6SMax Gurtovoy case IB_WR_REG_MR_INTEGRITY: 52932563e2f3SMax Gurtovoy qp->sq.wr_data[idx] = IB_WR_REG_MR_INTEGRITY; 529438ca87c6SMax Gurtovoy 529538ca87c6SMax Gurtovoy mr = to_mmr(reg_wr(wr)->mr); 529638ca87c6SMax Gurtovoy pi_mr = mr->pi_mr; 529738ca87c6SMax Gurtovoy 52982563e2f3SMax Gurtovoy if (pi_mr) { 52992563e2f3SMax Gurtovoy memset(®_pi_wr, 0, 53002563e2f3SMax Gurtovoy sizeof(struct ib_reg_wr)); 53012563e2f3SMax Gurtovoy 530238ca87c6SMax Gurtovoy reg_pi_wr.mr = &pi_mr->ibmr; 530338ca87c6SMax Gurtovoy reg_pi_wr.access = reg_wr(wr)->access; 530438ca87c6SMax Gurtovoy reg_pi_wr.key = pi_mr->ibmr.rkey; 530538ca87c6SMax Gurtovoy 530638ca87c6SMax Gurtovoy ctrl->imm = cpu_to_be32(reg_pi_wr.key); 53072563e2f3SMax Gurtovoy /* UMR for data + prot registration */ 53082563e2f3SMax Gurtovoy err = set_reg_wr(qp, ®_pi_wr, &seg, 53092563e2f3SMax Gurtovoy &size, &cur_edge, 53102563e2f3SMax Gurtovoy false); 531138ca87c6SMax Gurtovoy if (err) { 531238ca87c6SMax Gurtovoy *bad_wr = wr; 531338ca87c6SMax Gurtovoy goto out; 531438ca87c6SMax Gurtovoy } 53152563e2f3SMax Gurtovoy finish_wqe(qp, ctrl, seg, size, 53162563e2f3SMax Gurtovoy cur_edge, idx, wr->wr_id, 53172563e2f3SMax Gurtovoy nreq, fence, 531838ca87c6SMax Gurtovoy MLX5_OPCODE_UMR); 531938ca87c6SMax Gurtovoy 53202563e2f3SMax Gurtovoy err = begin_wqe(qp, &seg, &ctrl, wr, 53212563e2f3SMax Gurtovoy &idx, &size, &cur_edge, 53222563e2f3SMax Gurtovoy nreq); 532338ca87c6SMax Gurtovoy if (err) { 532438ca87c6SMax Gurtovoy mlx5_ib_warn(dev, "\n"); 532538ca87c6SMax Gurtovoy err = -ENOMEM; 532638ca87c6SMax Gurtovoy *bad_wr = wr; 532738ca87c6SMax Gurtovoy goto out; 532838ca87c6SMax Gurtovoy } 53292563e2f3SMax Gurtovoy } else { 53302563e2f3SMax Gurtovoy memset(&pa_pi_mr, 0, 53312563e2f3SMax Gurtovoy sizeof(struct mlx5_ib_mr)); 53322563e2f3SMax Gurtovoy /* No UMR, use local_dma_lkey */ 53332563e2f3SMax Gurtovoy pa_pi_mr.ibmr.lkey = 53342563e2f3SMax Gurtovoy mr->ibmr.pd->local_dma_lkey; 53352563e2f3SMax Gurtovoy 53362563e2f3SMax Gurtovoy pa_pi_mr.ndescs = mr->ndescs; 53372563e2f3SMax Gurtovoy pa_pi_mr.data_length = mr->data_length; 53382563e2f3SMax Gurtovoy pa_pi_mr.data_iova = mr->data_iova; 53392563e2f3SMax Gurtovoy if (mr->meta_ndescs) { 53402563e2f3SMax Gurtovoy pa_pi_mr.meta_ndescs = 53412563e2f3SMax Gurtovoy mr->meta_ndescs; 53422563e2f3SMax Gurtovoy pa_pi_mr.meta_length = 53432563e2f3SMax Gurtovoy mr->meta_length; 53442563e2f3SMax Gurtovoy pa_pi_mr.pi_iova = mr->pi_iova; 53452563e2f3SMax Gurtovoy } 53462563e2f3SMax Gurtovoy 53472563e2f3SMax Gurtovoy pa_pi_mr.ibmr.length = mr->ibmr.length; 53482563e2f3SMax Gurtovoy mr->pi_mr = &pa_pi_mr; 53492563e2f3SMax Gurtovoy } 535038ca87c6SMax Gurtovoy ctrl->imm = cpu_to_be32(mr->ibmr.rkey); 535138ca87c6SMax Gurtovoy /* UMR for sig MR */ 535238ca87c6SMax Gurtovoy err = set_pi_umr_wr(wr, qp, &seg, &size, 535338ca87c6SMax Gurtovoy &cur_edge); 535438ca87c6SMax Gurtovoy if (err) { 535538ca87c6SMax Gurtovoy mlx5_ib_warn(dev, "\n"); 535638ca87c6SMax Gurtovoy *bad_wr = wr; 535738ca87c6SMax Gurtovoy goto out; 535838ca87c6SMax Gurtovoy } 535938ca87c6SMax Gurtovoy finish_wqe(qp, ctrl, seg, size, cur_edge, idx, 536038ca87c6SMax Gurtovoy wr->wr_id, nreq, fence, 536138ca87c6SMax Gurtovoy MLX5_OPCODE_UMR); 536238ca87c6SMax Gurtovoy 536338ca87c6SMax Gurtovoy /* 536438ca87c6SMax Gurtovoy * SET_PSV WQEs are not signaled and solicited 536538ca87c6SMax Gurtovoy * on error 536638ca87c6SMax Gurtovoy */ 536738ca87c6SMax Gurtovoy sig_attrs = mr->ibmr.sig_attrs; 536838ca87c6SMax Gurtovoy err = __begin_wqe(qp, &seg, &ctrl, wr, &idx, 536938ca87c6SMax Gurtovoy &size, &cur_edge, nreq, false, 537038ca87c6SMax Gurtovoy true); 537138ca87c6SMax Gurtovoy if (err) { 537238ca87c6SMax Gurtovoy mlx5_ib_warn(dev, "\n"); 537338ca87c6SMax Gurtovoy err = -ENOMEM; 537438ca87c6SMax Gurtovoy *bad_wr = wr; 537538ca87c6SMax Gurtovoy goto out; 537638ca87c6SMax Gurtovoy } 537738ca87c6SMax Gurtovoy err = set_psv_wr(&sig_attrs->mem, 537838ca87c6SMax Gurtovoy mr->sig->psv_memory.psv_idx, 537938ca87c6SMax Gurtovoy &seg, &size); 538038ca87c6SMax Gurtovoy if (err) { 538138ca87c6SMax Gurtovoy mlx5_ib_warn(dev, "\n"); 538238ca87c6SMax Gurtovoy *bad_wr = wr; 538338ca87c6SMax Gurtovoy goto out; 538438ca87c6SMax Gurtovoy } 538538ca87c6SMax Gurtovoy finish_wqe(qp, ctrl, seg, size, cur_edge, idx, 538638ca87c6SMax Gurtovoy wr->wr_id, nreq, next_fence, 538738ca87c6SMax Gurtovoy MLX5_OPCODE_SET_PSV); 538838ca87c6SMax Gurtovoy 538938ca87c6SMax Gurtovoy err = __begin_wqe(qp, &seg, &ctrl, wr, &idx, 539038ca87c6SMax Gurtovoy &size, &cur_edge, nreq, false, 539138ca87c6SMax Gurtovoy true); 539238ca87c6SMax Gurtovoy if (err) { 539338ca87c6SMax Gurtovoy mlx5_ib_warn(dev, "\n"); 539438ca87c6SMax Gurtovoy err = -ENOMEM; 539538ca87c6SMax Gurtovoy *bad_wr = wr; 539638ca87c6SMax Gurtovoy goto out; 539738ca87c6SMax Gurtovoy } 539838ca87c6SMax Gurtovoy err = set_psv_wr(&sig_attrs->wire, 539938ca87c6SMax Gurtovoy mr->sig->psv_wire.psv_idx, 540038ca87c6SMax Gurtovoy &seg, &size); 540138ca87c6SMax Gurtovoy if (err) { 540238ca87c6SMax Gurtovoy mlx5_ib_warn(dev, "\n"); 540338ca87c6SMax Gurtovoy *bad_wr = wr; 540438ca87c6SMax Gurtovoy goto out; 540538ca87c6SMax Gurtovoy } 540638ca87c6SMax Gurtovoy finish_wqe(qp, ctrl, seg, size, cur_edge, idx, 540738ca87c6SMax Gurtovoy wr->wr_id, nreq, next_fence, 540838ca87c6SMax Gurtovoy MLX5_OPCODE_SET_PSV); 540938ca87c6SMax Gurtovoy 541038ca87c6SMax Gurtovoy qp->next_fence = 541138ca87c6SMax Gurtovoy MLX5_FENCE_MODE_INITIATOR_SMALL; 541238ca87c6SMax Gurtovoy num_sge = 0; 541338ca87c6SMax Gurtovoy goto skip_psv; 541438ca87c6SMax Gurtovoy 5415e126ba97SEli Cohen default: 5416e126ba97SEli Cohen break; 5417e126ba97SEli Cohen } 5418e126ba97SEli Cohen break; 5419e126ba97SEli Cohen 5420e126ba97SEli Cohen case IB_QPT_UC: 5421e126ba97SEli Cohen switch (wr->opcode) { 5422e126ba97SEli Cohen case IB_WR_RDMA_WRITE: 5423e126ba97SEli Cohen case IB_WR_RDMA_WRITE_WITH_IMM: 5424e622f2f4SChristoph Hellwig set_raddr_seg(seg, rdma_wr(wr)->remote_addr, 5425e622f2f4SChristoph Hellwig rdma_wr(wr)->rkey); 5426e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_raddr_seg); 5427e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_raddr_seg) / 16; 5428e126ba97SEli Cohen break; 5429e126ba97SEli Cohen 5430e126ba97SEli Cohen default: 5431e126ba97SEli Cohen break; 5432e126ba97SEli Cohen } 5433e126ba97SEli Cohen break; 5434e126ba97SEli Cohen 5435e126ba97SEli Cohen case IB_QPT_SMI: 54361e0e50b6SMaor Gottlieb if (unlikely(!mdev->port_caps[qp->port - 1].has_smi)) { 54371e0e50b6SMaor Gottlieb mlx5_ib_warn(dev, "Send SMP MADs is not allowed\n"); 54381e0e50b6SMaor Gottlieb err = -EPERM; 54391e0e50b6SMaor Gottlieb *bad_wr = wr; 54401e0e50b6SMaor Gottlieb goto out; 54411e0e50b6SMaor Gottlieb } 5442f6b1ee34SBart Van Assche /* fall through */ 5443d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: 5444e126ba97SEli Cohen set_datagram_seg(seg, wr); 5445e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_datagram_seg); 5446e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_datagram_seg) / 16; 544734f4c955SGuy Levi handle_post_send_edge(&qp->sq, &seg, size, &cur_edge); 544834f4c955SGuy Levi 5449e126ba97SEli Cohen break; 5450f0313965SErez Shitrit case IB_QPT_UD: 5451f0313965SErez Shitrit set_datagram_seg(seg, wr); 5452f0313965SErez Shitrit seg += sizeof(struct mlx5_wqe_datagram_seg); 5453f0313965SErez Shitrit size += sizeof(struct mlx5_wqe_datagram_seg) / 16; 545434f4c955SGuy Levi handle_post_send_edge(&qp->sq, &seg, size, &cur_edge); 5455f0313965SErez Shitrit 5456f0313965SErez Shitrit /* handle qp that supports ud offload */ 5457f0313965SErez Shitrit if (qp->flags & IB_QP_CREATE_IPOIB_UD_LSO) { 5458f0313965SErez Shitrit struct mlx5_wqe_eth_pad *pad; 5459f0313965SErez Shitrit 5460f0313965SErez Shitrit pad = seg; 5461f0313965SErez Shitrit memset(pad, 0, sizeof(struct mlx5_wqe_eth_pad)); 5462f0313965SErez Shitrit seg += sizeof(struct mlx5_wqe_eth_pad); 5463f0313965SErez Shitrit size += sizeof(struct mlx5_wqe_eth_pad) / 16; 546434f4c955SGuy Levi set_eth_seg(wr, qp, &seg, &size, &cur_edge); 546534f4c955SGuy Levi handle_post_send_edge(&qp->sq, &seg, size, 546634f4c955SGuy Levi &cur_edge); 5467f0313965SErez Shitrit } 5468f0313965SErez Shitrit break; 5469e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 5470e126ba97SEli Cohen if (wr->opcode != MLX5_IB_WR_UMR) { 5471e126ba97SEli Cohen err = -EINVAL; 5472e126ba97SEli Cohen mlx5_ib_warn(dev, "bad opcode\n"); 5473e126ba97SEli Cohen goto out; 5474e126ba97SEli Cohen } 5475e126ba97SEli Cohen qp->sq.wr_data[idx] = MLX5_IB_WR_UMR; 5476e622f2f4SChristoph Hellwig ctrl->imm = cpu_to_be32(umr_wr(wr)->mkey); 5477c8d75a98SMajd Dibbiny err = set_reg_umr_segment(dev, seg, wr, !!(MLX5_CAP_GEN(mdev, atomic))); 5478c8d75a98SMajd Dibbiny if (unlikely(err)) 5479c8d75a98SMajd Dibbiny goto out; 5480e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 5481e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 548234f4c955SGuy Levi handle_post_send_edge(&qp->sq, &seg, size, &cur_edge); 5483e126ba97SEli Cohen set_reg_mkey_segment(seg, wr); 5484e126ba97SEli Cohen seg += sizeof(struct mlx5_mkey_seg); 5485e126ba97SEli Cohen size += sizeof(struct mlx5_mkey_seg) / 16; 548634f4c955SGuy Levi handle_post_send_edge(&qp->sq, &seg, size, &cur_edge); 5487e126ba97SEli Cohen break; 5488e126ba97SEli Cohen 5489e126ba97SEli Cohen default: 5490e126ba97SEli Cohen break; 5491e126ba97SEli Cohen } 5492e126ba97SEli Cohen 5493e126ba97SEli Cohen if (wr->send_flags & IB_SEND_INLINE && num_sge) { 549434f4c955SGuy Levi err = set_data_inl_seg(qp, wr, &seg, &size, &cur_edge); 5495e126ba97SEli Cohen if (unlikely(err)) { 5496e126ba97SEli Cohen mlx5_ib_warn(dev, "\n"); 5497e126ba97SEli Cohen *bad_wr = wr; 5498e126ba97SEli Cohen goto out; 5499e126ba97SEli Cohen } 5500e126ba97SEli Cohen } else { 5501e126ba97SEli Cohen for (i = 0; i < num_sge; i++) { 550234f4c955SGuy Levi handle_post_send_edge(&qp->sq, &seg, size, 550334f4c955SGuy Levi &cur_edge); 5504e126ba97SEli Cohen if (likely(wr->sg_list[i].length)) { 550534f4c955SGuy Levi set_data_ptr_seg 550634f4c955SGuy Levi ((struct mlx5_wqe_data_seg *)seg, 550734f4c955SGuy Levi wr->sg_list + i); 5508e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_data_seg) / 16; 550934f4c955SGuy Levi seg += sizeof(struct mlx5_wqe_data_seg); 5510e126ba97SEli Cohen } 5511e126ba97SEli Cohen } 5512e126ba97SEli Cohen } 5513e126ba97SEli Cohen 55146e8484c5SMax Gurtovoy qp->next_fence = next_fence; 551534f4c955SGuy Levi finish_wqe(qp, ctrl, seg, size, cur_edge, idx, wr->wr_id, nreq, 551634f4c955SGuy Levi fence, mlx5_ib_opcode[wr->opcode]); 5517e6631814SSagi Grimberg skip_psv: 5518e126ba97SEli Cohen if (0) 5519e126ba97SEli Cohen dump_wqe(qp, idx, size); 5520e126ba97SEli Cohen } 5521e126ba97SEli Cohen 5522e126ba97SEli Cohen out: 5523e126ba97SEli Cohen if (likely(nreq)) { 5524e126ba97SEli Cohen qp->sq.head += nreq; 5525e126ba97SEli Cohen 5526e126ba97SEli Cohen /* Make sure that descriptors are written before 5527e126ba97SEli Cohen * updating doorbell record and ringing the doorbell 5528e126ba97SEli Cohen */ 5529e126ba97SEli Cohen wmb(); 5530e126ba97SEli Cohen 5531e126ba97SEli Cohen qp->db.db[MLX5_SND_DBR] = cpu_to_be32(qp->sq.cur_post); 5532e126ba97SEli Cohen 5533ada388f7SEli Cohen /* Make sure doorbell record is visible to the HCA before 5534ada388f7SEli Cohen * we hit doorbell */ 5535ada388f7SEli Cohen wmb(); 5536ada388f7SEli Cohen 5537bbf29f61SMaxim Mikityanskiy mlx5_write64((__be32 *)ctrl, bf->bfreg->map + bf->offset); 5538e126ba97SEli Cohen /* Make sure doorbells don't leak out of SQ spinlock 5539e126ba97SEli Cohen * and reach the HCA out of order. 5540e126ba97SEli Cohen */ 5541e126ba97SEli Cohen bf->offset ^= bf->buf_size; 5542e126ba97SEli Cohen } 5543e126ba97SEli Cohen 5544e126ba97SEli Cohen spin_unlock_irqrestore(&qp->sq.lock, flags); 5545e126ba97SEli Cohen 5546e126ba97SEli Cohen return err; 5547e126ba97SEli Cohen } 5548e126ba97SEli Cohen 5549d34ac5cdSBart Van Assche int mlx5_ib_post_send(struct ib_qp *ibqp, const struct ib_send_wr *wr, 5550d34ac5cdSBart Van Assche const struct ib_send_wr **bad_wr) 5551d0e84c0aSYishai Hadas { 5552d0e84c0aSYishai Hadas return _mlx5_ib_post_send(ibqp, wr, bad_wr, false); 5553d0e84c0aSYishai Hadas } 5554d0e84c0aSYishai Hadas 5555e126ba97SEli Cohen static void set_sig_seg(struct mlx5_rwqe_sig *sig, int size) 5556e126ba97SEli Cohen { 5557e126ba97SEli Cohen sig->signature = calc_sig(sig, size); 5558e126ba97SEli Cohen } 5559e126ba97SEli Cohen 5560d34ac5cdSBart Van Assche static int _mlx5_ib_post_recv(struct ib_qp *ibqp, const struct ib_recv_wr *wr, 5561d34ac5cdSBart Van Assche const struct ib_recv_wr **bad_wr, bool drain) 5562e126ba97SEli Cohen { 5563e126ba97SEli Cohen struct mlx5_ib_qp *qp = to_mqp(ibqp); 5564e126ba97SEli Cohen struct mlx5_wqe_data_seg *scat; 5565e126ba97SEli Cohen struct mlx5_rwqe_sig *sig; 556689ea94a7SMaor Gottlieb struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 556789ea94a7SMaor Gottlieb struct mlx5_core_dev *mdev = dev->mdev; 5568e126ba97SEli Cohen unsigned long flags; 5569e126ba97SEli Cohen int err = 0; 5570e126ba97SEli Cohen int nreq; 5571e126ba97SEli Cohen int ind; 5572e126ba97SEli Cohen int i; 5573e126ba97SEli Cohen 55746c75520fSParav Pandit if (unlikely(mdev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR && 55756c75520fSParav Pandit !drain)) { 55766c75520fSParav Pandit *bad_wr = wr; 55776c75520fSParav Pandit return -EIO; 55786c75520fSParav Pandit } 55796c75520fSParav Pandit 5580d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 5581d16e91daSHaggai Eran return mlx5_ib_gsi_post_recv(ibqp, wr, bad_wr); 5582d16e91daSHaggai Eran 5583e126ba97SEli Cohen spin_lock_irqsave(&qp->rq.lock, flags); 5584e126ba97SEli Cohen 5585e126ba97SEli Cohen ind = qp->rq.head & (qp->rq.wqe_cnt - 1); 5586e126ba97SEli Cohen 5587e126ba97SEli Cohen for (nreq = 0; wr; nreq++, wr = wr->next) { 5588e126ba97SEli Cohen if (mlx5_wq_overflow(&qp->rq, nreq, qp->ibqp.recv_cq)) { 5589e126ba97SEli Cohen err = -ENOMEM; 5590e126ba97SEli Cohen *bad_wr = wr; 5591e126ba97SEli Cohen goto out; 5592e126ba97SEli Cohen } 5593e126ba97SEli Cohen 5594e126ba97SEli Cohen if (unlikely(wr->num_sge > qp->rq.max_gs)) { 5595e126ba97SEli Cohen err = -EINVAL; 5596e126ba97SEli Cohen *bad_wr = wr; 5597e126ba97SEli Cohen goto out; 5598e126ba97SEli Cohen } 5599e126ba97SEli Cohen 560034f4c955SGuy Levi scat = mlx5_frag_buf_get_wqe(&qp->rq.fbc, ind); 5601c95e6d53SLeon Romanovsky if (qp->flags_en & MLX5_QP_FLAG_SIGNATURE) 5602e126ba97SEli Cohen scat++; 5603e126ba97SEli Cohen 5604e126ba97SEli Cohen for (i = 0; i < wr->num_sge; i++) 5605e126ba97SEli Cohen set_data_ptr_seg(scat + i, wr->sg_list + i); 5606e126ba97SEli Cohen 5607e126ba97SEli Cohen if (i < qp->rq.max_gs) { 5608e126ba97SEli Cohen scat[i].byte_count = 0; 5609e126ba97SEli Cohen scat[i].lkey = cpu_to_be32(MLX5_INVALID_LKEY); 5610e126ba97SEli Cohen scat[i].addr = 0; 5611e126ba97SEli Cohen } 5612e126ba97SEli Cohen 5613c95e6d53SLeon Romanovsky if (qp->flags_en & MLX5_QP_FLAG_SIGNATURE) { 5614e126ba97SEli Cohen sig = (struct mlx5_rwqe_sig *)scat; 5615e126ba97SEli Cohen set_sig_seg(sig, (qp->rq.max_gs + 1) << 2); 5616e126ba97SEli Cohen } 5617e126ba97SEli Cohen 5618e126ba97SEli Cohen qp->rq.wrid[ind] = wr->wr_id; 5619e126ba97SEli Cohen 5620e126ba97SEli Cohen ind = (ind + 1) & (qp->rq.wqe_cnt - 1); 5621e126ba97SEli Cohen } 5622e126ba97SEli Cohen 5623e126ba97SEli Cohen out: 5624e126ba97SEli Cohen if (likely(nreq)) { 5625e126ba97SEli Cohen qp->rq.head += nreq; 5626e126ba97SEli Cohen 5627e126ba97SEli Cohen /* Make sure that descriptors are written before 5628e126ba97SEli Cohen * doorbell record. 5629e126ba97SEli Cohen */ 5630e126ba97SEli Cohen wmb(); 5631e126ba97SEli Cohen 5632e126ba97SEli Cohen *qp->db.db = cpu_to_be32(qp->rq.head & 0xffff); 5633e126ba97SEli Cohen } 5634e126ba97SEli Cohen 5635e126ba97SEli Cohen spin_unlock_irqrestore(&qp->rq.lock, flags); 5636e126ba97SEli Cohen 5637e126ba97SEli Cohen return err; 5638e126ba97SEli Cohen } 5639e126ba97SEli Cohen 5640d34ac5cdSBart Van Assche int mlx5_ib_post_recv(struct ib_qp *ibqp, const struct ib_recv_wr *wr, 5641d34ac5cdSBart Van Assche const struct ib_recv_wr **bad_wr) 5642d0e84c0aSYishai Hadas { 5643d0e84c0aSYishai Hadas return _mlx5_ib_post_recv(ibqp, wr, bad_wr, false); 5644d0e84c0aSYishai Hadas } 5645d0e84c0aSYishai Hadas 5646e126ba97SEli Cohen static inline enum ib_qp_state to_ib_qp_state(enum mlx5_qp_state mlx5_state) 5647e126ba97SEli Cohen { 5648e126ba97SEli Cohen switch (mlx5_state) { 5649e126ba97SEli Cohen case MLX5_QP_STATE_RST: return IB_QPS_RESET; 5650e126ba97SEli Cohen case MLX5_QP_STATE_INIT: return IB_QPS_INIT; 5651e126ba97SEli Cohen case MLX5_QP_STATE_RTR: return IB_QPS_RTR; 5652e126ba97SEli Cohen case MLX5_QP_STATE_RTS: return IB_QPS_RTS; 5653e126ba97SEli Cohen case MLX5_QP_STATE_SQ_DRAINING: 5654e126ba97SEli Cohen case MLX5_QP_STATE_SQD: return IB_QPS_SQD; 5655e126ba97SEli Cohen case MLX5_QP_STATE_SQER: return IB_QPS_SQE; 5656e126ba97SEli Cohen case MLX5_QP_STATE_ERR: return IB_QPS_ERR; 5657e126ba97SEli Cohen default: return -1; 5658e126ba97SEli Cohen } 5659e126ba97SEli Cohen } 5660e126ba97SEli Cohen 5661e126ba97SEli Cohen static inline enum ib_mig_state to_ib_mig_state(int mlx5_mig_state) 5662e126ba97SEli Cohen { 5663e126ba97SEli Cohen switch (mlx5_mig_state) { 5664e126ba97SEli Cohen case MLX5_QP_PM_ARMED: return IB_MIG_ARMED; 5665e126ba97SEli Cohen case MLX5_QP_PM_REARM: return IB_MIG_REARM; 5666e126ba97SEli Cohen case MLX5_QP_PM_MIGRATED: return IB_MIG_MIGRATED; 5667e126ba97SEli Cohen default: return -1; 5668e126ba97SEli Cohen } 5669e126ba97SEli Cohen } 5670e126ba97SEli Cohen 5671e126ba97SEli Cohen static int to_ib_qp_access_flags(int mlx5_flags) 5672e126ba97SEli Cohen { 5673e126ba97SEli Cohen int ib_flags = 0; 5674e126ba97SEli Cohen 5675e126ba97SEli Cohen if (mlx5_flags & MLX5_QP_BIT_RRE) 5676e126ba97SEli Cohen ib_flags |= IB_ACCESS_REMOTE_READ; 5677e126ba97SEli Cohen if (mlx5_flags & MLX5_QP_BIT_RWE) 5678e126ba97SEli Cohen ib_flags |= IB_ACCESS_REMOTE_WRITE; 5679e126ba97SEli Cohen if (mlx5_flags & MLX5_QP_BIT_RAE) 5680e126ba97SEli Cohen ib_flags |= IB_ACCESS_REMOTE_ATOMIC; 5681e126ba97SEli Cohen 5682e126ba97SEli Cohen return ib_flags; 5683e126ba97SEli Cohen } 5684e126ba97SEli Cohen 568538349389SDasaratharaman Chandramouli static void to_rdma_ah_attr(struct mlx5_ib_dev *ibdev, 5686d8966fcdSDasaratharaman Chandramouli struct rdma_ah_attr *ah_attr, 5687e126ba97SEli Cohen struct mlx5_qp_path *path) 5688e126ba97SEli Cohen { 5689e126ba97SEli Cohen 5690d8966fcdSDasaratharaman Chandramouli memset(ah_attr, 0, sizeof(*ah_attr)); 5691e126ba97SEli Cohen 5692e7996a9aSJason Gunthorpe if (!path->port || path->port > ibdev->num_ports) 5693e126ba97SEli Cohen return; 5694e126ba97SEli Cohen 5695ae59c3f0SLeon Romanovsky ah_attr->type = rdma_ah_find_type(&ibdev->ib_dev, path->port); 5696ae59c3f0SLeon Romanovsky 5697d8966fcdSDasaratharaman Chandramouli rdma_ah_set_port_num(ah_attr, path->port); 5698d8966fcdSDasaratharaman Chandramouli rdma_ah_set_sl(ah_attr, path->dci_cfi_prio_sl & 0xf); 5699e126ba97SEli Cohen 5700d8966fcdSDasaratharaman Chandramouli rdma_ah_set_dlid(ah_attr, be16_to_cpu(path->rlid)); 5701d8966fcdSDasaratharaman Chandramouli rdma_ah_set_path_bits(ah_attr, path->grh_mlid & 0x7f); 5702d8966fcdSDasaratharaman Chandramouli rdma_ah_set_static_rate(ah_attr, 5703d8966fcdSDasaratharaman Chandramouli path->static_rate ? path->static_rate - 5 : 0); 5704d8966fcdSDasaratharaman Chandramouli if (path->grh_mlid & (1 << 7)) { 5705d8966fcdSDasaratharaman Chandramouli u32 tc_fl = be32_to_cpu(path->tclass_flowlabel); 5706d8966fcdSDasaratharaman Chandramouli 5707d8966fcdSDasaratharaman Chandramouli rdma_ah_set_grh(ah_attr, NULL, 5708d8966fcdSDasaratharaman Chandramouli tc_fl & 0xfffff, 5709d8966fcdSDasaratharaman Chandramouli path->mgid_index, 5710d8966fcdSDasaratharaman Chandramouli path->hop_limit, 5711d8966fcdSDasaratharaman Chandramouli (tc_fl >> 20) & 0xff); 5712d8966fcdSDasaratharaman Chandramouli rdma_ah_set_dgid_raw(ah_attr, path->rgid); 5713e126ba97SEli Cohen } 5714e126ba97SEli Cohen } 5715e126ba97SEli Cohen 57166d2f89dfSmajd@mellanox.com static int query_raw_packet_qp_sq_state(struct mlx5_ib_dev *dev, 57176d2f89dfSmajd@mellanox.com struct mlx5_ib_sq *sq, 57186d2f89dfSmajd@mellanox.com u8 *sq_state) 5719e126ba97SEli Cohen { 57206d2f89dfSmajd@mellanox.com int err; 57216d2f89dfSmajd@mellanox.com 572228160771SEran Ben Elisha err = mlx5_core_query_sq_state(dev->mdev, sq->base.mqp.qpn, sq_state); 57236d2f89dfSmajd@mellanox.com if (err) 57246d2f89dfSmajd@mellanox.com goto out; 57256d2f89dfSmajd@mellanox.com sq->state = *sq_state; 57266d2f89dfSmajd@mellanox.com 57276d2f89dfSmajd@mellanox.com out: 57286d2f89dfSmajd@mellanox.com return err; 57296d2f89dfSmajd@mellanox.com } 57306d2f89dfSmajd@mellanox.com 57316d2f89dfSmajd@mellanox.com static int query_raw_packet_qp_rq_state(struct mlx5_ib_dev *dev, 57326d2f89dfSmajd@mellanox.com struct mlx5_ib_rq *rq, 57336d2f89dfSmajd@mellanox.com u8 *rq_state) 57346d2f89dfSmajd@mellanox.com { 57356d2f89dfSmajd@mellanox.com void *out; 57366d2f89dfSmajd@mellanox.com void *rqc; 57376d2f89dfSmajd@mellanox.com int inlen; 57386d2f89dfSmajd@mellanox.com int err; 57396d2f89dfSmajd@mellanox.com 57406d2f89dfSmajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(query_rq_out); 57411b9a07eeSLeon Romanovsky out = kvzalloc(inlen, GFP_KERNEL); 57426d2f89dfSmajd@mellanox.com if (!out) 57436d2f89dfSmajd@mellanox.com return -ENOMEM; 57446d2f89dfSmajd@mellanox.com 57456d2f89dfSmajd@mellanox.com err = mlx5_core_query_rq(dev->mdev, rq->base.mqp.qpn, out); 57466d2f89dfSmajd@mellanox.com if (err) 57476d2f89dfSmajd@mellanox.com goto out; 57486d2f89dfSmajd@mellanox.com 57496d2f89dfSmajd@mellanox.com rqc = MLX5_ADDR_OF(query_rq_out, out, rq_context); 57506d2f89dfSmajd@mellanox.com *rq_state = MLX5_GET(rqc, rqc, state); 57516d2f89dfSmajd@mellanox.com rq->state = *rq_state; 57526d2f89dfSmajd@mellanox.com 57536d2f89dfSmajd@mellanox.com out: 57546d2f89dfSmajd@mellanox.com kvfree(out); 57556d2f89dfSmajd@mellanox.com return err; 57566d2f89dfSmajd@mellanox.com } 57576d2f89dfSmajd@mellanox.com 57586d2f89dfSmajd@mellanox.com static int sqrq_state_to_qp_state(u8 sq_state, u8 rq_state, 57596d2f89dfSmajd@mellanox.com struct mlx5_ib_qp *qp, u8 *qp_state) 57606d2f89dfSmajd@mellanox.com { 57616d2f89dfSmajd@mellanox.com static const u8 sqrq_trans[MLX5_RQ_NUM_STATE][MLX5_SQ_NUM_STATE] = { 57626d2f89dfSmajd@mellanox.com [MLX5_RQC_STATE_RST] = { 57636d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = IB_QPS_RESET, 57646d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE_BAD, 57656d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = MLX5_QP_STATE_BAD, 57666d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = IB_QPS_RESET, 57676d2f89dfSmajd@mellanox.com }, 57686d2f89dfSmajd@mellanox.com [MLX5_RQC_STATE_RDY] = { 57696d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = MLX5_QP_STATE_BAD, 57706d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE, 57716d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = IB_QPS_SQE, 57726d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = MLX5_QP_STATE, 57736d2f89dfSmajd@mellanox.com }, 57746d2f89dfSmajd@mellanox.com [MLX5_RQC_STATE_ERR] = { 57756d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = MLX5_QP_STATE_BAD, 57766d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE_BAD, 57776d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = IB_QPS_ERR, 57786d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = IB_QPS_ERR, 57796d2f89dfSmajd@mellanox.com }, 57806d2f89dfSmajd@mellanox.com [MLX5_RQ_STATE_NA] = { 57816d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = IB_QPS_RESET, 57826d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE, 57836d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = MLX5_QP_STATE, 57846d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = MLX5_QP_STATE_BAD, 57856d2f89dfSmajd@mellanox.com }, 57866d2f89dfSmajd@mellanox.com }; 57876d2f89dfSmajd@mellanox.com 57886d2f89dfSmajd@mellanox.com *qp_state = sqrq_trans[rq_state][sq_state]; 57896d2f89dfSmajd@mellanox.com 57906d2f89dfSmajd@mellanox.com if (*qp_state == MLX5_QP_STATE_BAD) { 57916d2f89dfSmajd@mellanox.com WARN(1, "Buggy Raw Packet QP state, SQ 0x%x state: 0x%x, RQ 0x%x state: 0x%x", 57926d2f89dfSmajd@mellanox.com qp->raw_packet_qp.sq.base.mqp.qpn, sq_state, 57936d2f89dfSmajd@mellanox.com qp->raw_packet_qp.rq.base.mqp.qpn, rq_state); 57946d2f89dfSmajd@mellanox.com return -EINVAL; 57956d2f89dfSmajd@mellanox.com } 57966d2f89dfSmajd@mellanox.com 57976d2f89dfSmajd@mellanox.com if (*qp_state == MLX5_QP_STATE) 57986d2f89dfSmajd@mellanox.com *qp_state = qp->state; 57996d2f89dfSmajd@mellanox.com 58006d2f89dfSmajd@mellanox.com return 0; 58016d2f89dfSmajd@mellanox.com } 58026d2f89dfSmajd@mellanox.com 58036d2f89dfSmajd@mellanox.com static int query_raw_packet_qp_state(struct mlx5_ib_dev *dev, 58046d2f89dfSmajd@mellanox.com struct mlx5_ib_qp *qp, 58056d2f89dfSmajd@mellanox.com u8 *raw_packet_qp_state) 58066d2f89dfSmajd@mellanox.com { 58076d2f89dfSmajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 58086d2f89dfSmajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 58096d2f89dfSmajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 58106d2f89dfSmajd@mellanox.com int err; 58116d2f89dfSmajd@mellanox.com u8 sq_state = MLX5_SQ_STATE_NA; 58126d2f89dfSmajd@mellanox.com u8 rq_state = MLX5_RQ_STATE_NA; 58136d2f89dfSmajd@mellanox.com 58146d2f89dfSmajd@mellanox.com if (qp->sq.wqe_cnt) { 58156d2f89dfSmajd@mellanox.com err = query_raw_packet_qp_sq_state(dev, sq, &sq_state); 58166d2f89dfSmajd@mellanox.com if (err) 58176d2f89dfSmajd@mellanox.com return err; 58186d2f89dfSmajd@mellanox.com } 58196d2f89dfSmajd@mellanox.com 58206d2f89dfSmajd@mellanox.com if (qp->rq.wqe_cnt) { 58216d2f89dfSmajd@mellanox.com err = query_raw_packet_qp_rq_state(dev, rq, &rq_state); 58226d2f89dfSmajd@mellanox.com if (err) 58236d2f89dfSmajd@mellanox.com return err; 58246d2f89dfSmajd@mellanox.com } 58256d2f89dfSmajd@mellanox.com 58266d2f89dfSmajd@mellanox.com return sqrq_state_to_qp_state(sq_state, rq_state, qp, 58276d2f89dfSmajd@mellanox.com raw_packet_qp_state); 58286d2f89dfSmajd@mellanox.com } 58296d2f89dfSmajd@mellanox.com 58306d2f89dfSmajd@mellanox.com static int query_qp_attr(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 58316d2f89dfSmajd@mellanox.com struct ib_qp_attr *qp_attr) 58326d2f89dfSmajd@mellanox.com { 583309a7d9ecSSaeed Mahameed int outlen = MLX5_ST_SZ_BYTES(query_qp_out); 5834e126ba97SEli Cohen struct mlx5_qp_context *context; 5835e126ba97SEli Cohen int mlx5_state; 583609a7d9ecSSaeed Mahameed u32 *outb; 5837e126ba97SEli Cohen int err = 0; 5838e126ba97SEli Cohen 583909a7d9ecSSaeed Mahameed outb = kzalloc(outlen, GFP_KERNEL); 58406d2f89dfSmajd@mellanox.com if (!outb) 58416d2f89dfSmajd@mellanox.com return -ENOMEM; 58426d2f89dfSmajd@mellanox.com 5843333fbaa0SLeon Romanovsky err = mlx5_core_qp_query(dev, &qp->trans_qp.base.mqp, outb, outlen); 5844e126ba97SEli Cohen if (err) 58456d2f89dfSmajd@mellanox.com goto out; 5846e126ba97SEli Cohen 584709a7d9ecSSaeed Mahameed /* FIXME: use MLX5_GET rather than mlx5_qp_context manual struct */ 584809a7d9ecSSaeed Mahameed context = (struct mlx5_qp_context *)MLX5_ADDR_OF(query_qp_out, outb, qpc); 584909a7d9ecSSaeed Mahameed 5850e126ba97SEli Cohen mlx5_state = be32_to_cpu(context->flags) >> 28; 5851e126ba97SEli Cohen 5852e126ba97SEli Cohen qp->state = to_ib_qp_state(mlx5_state); 5853e126ba97SEli Cohen qp_attr->path_mtu = context->mtu_msgmax >> 5; 5854e126ba97SEli Cohen qp_attr->path_mig_state = 5855e126ba97SEli Cohen to_ib_mig_state((be32_to_cpu(context->flags) >> 11) & 0x3); 5856e126ba97SEli Cohen qp_attr->qkey = be32_to_cpu(context->qkey); 5857e126ba97SEli Cohen qp_attr->rq_psn = be32_to_cpu(context->rnr_nextrecvpsn) & 0xffffff; 5858e126ba97SEli Cohen qp_attr->sq_psn = be32_to_cpu(context->next_send_psn) & 0xffffff; 5859e126ba97SEli Cohen qp_attr->dest_qp_num = be32_to_cpu(context->log_pg_sz_remote_qpn) & 0xffffff; 5860e126ba97SEli Cohen qp_attr->qp_access_flags = 5861e126ba97SEli Cohen to_ib_qp_access_flags(be32_to_cpu(context->params2)); 5862e126ba97SEli Cohen 5863e126ba97SEli Cohen if (qp->ibqp.qp_type == IB_QPT_RC || qp->ibqp.qp_type == IB_QPT_UC) { 586438349389SDasaratharaman Chandramouli to_rdma_ah_attr(dev, &qp_attr->ah_attr, &context->pri_path); 586538349389SDasaratharaman Chandramouli to_rdma_ah_attr(dev, &qp_attr->alt_ah_attr, &context->alt_path); 5866d3ae2bdeSNoa Osherovich qp_attr->alt_pkey_index = 5867d3ae2bdeSNoa Osherovich be16_to_cpu(context->alt_path.pkey_index); 5868d8966fcdSDasaratharaman Chandramouli qp_attr->alt_port_num = 5869d8966fcdSDasaratharaman Chandramouli rdma_ah_get_port_num(&qp_attr->alt_ah_attr); 5870e126ba97SEli Cohen } 5871e126ba97SEli Cohen 5872d3ae2bdeSNoa Osherovich qp_attr->pkey_index = be16_to_cpu(context->pri_path.pkey_index); 5873e126ba97SEli Cohen qp_attr->port_num = context->pri_path.port; 5874e126ba97SEli Cohen 5875e126ba97SEli Cohen /* qp_attr->en_sqd_async_notify is only applicable in modify qp */ 5876e126ba97SEli Cohen qp_attr->sq_draining = mlx5_state == MLX5_QP_STATE_SQ_DRAINING; 5877e126ba97SEli Cohen 5878e126ba97SEli Cohen qp_attr->max_rd_atomic = 1 << ((be32_to_cpu(context->params1) >> 21) & 0x7); 5879e126ba97SEli Cohen 5880e126ba97SEli Cohen qp_attr->max_dest_rd_atomic = 5881e126ba97SEli Cohen 1 << ((be32_to_cpu(context->params2) >> 21) & 0x7); 5882e126ba97SEli Cohen qp_attr->min_rnr_timer = 5883e126ba97SEli Cohen (be32_to_cpu(context->rnr_nextrecvpsn) >> 24) & 0x1f; 5884e126ba97SEli Cohen qp_attr->timeout = context->pri_path.ackto_lt >> 3; 5885e126ba97SEli Cohen qp_attr->retry_cnt = (be32_to_cpu(context->params1) >> 16) & 0x7; 5886e126ba97SEli Cohen qp_attr->rnr_retry = (be32_to_cpu(context->params1) >> 13) & 0x7; 5887e126ba97SEli Cohen qp_attr->alt_timeout = context->alt_path.ackto_lt >> 3; 58886d2f89dfSmajd@mellanox.com 58896d2f89dfSmajd@mellanox.com out: 58906d2f89dfSmajd@mellanox.com kfree(outb); 58916d2f89dfSmajd@mellanox.com return err; 58926d2f89dfSmajd@mellanox.com } 58936d2f89dfSmajd@mellanox.com 5894776a3906SMoni Shoua static int mlx5_ib_dct_query_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *mqp, 5895776a3906SMoni Shoua struct ib_qp_attr *qp_attr, int qp_attr_mask, 5896776a3906SMoni Shoua struct ib_qp_init_attr *qp_init_attr) 5897776a3906SMoni Shoua { 5898776a3906SMoni Shoua struct mlx5_core_dct *dct = &mqp->dct.mdct; 5899776a3906SMoni Shoua u32 *out; 5900776a3906SMoni Shoua u32 access_flags = 0; 5901776a3906SMoni Shoua int outlen = MLX5_ST_SZ_BYTES(query_dct_out); 5902776a3906SMoni Shoua void *dctc; 5903776a3906SMoni Shoua int err; 5904776a3906SMoni Shoua int supported_mask = IB_QP_STATE | 5905776a3906SMoni Shoua IB_QP_ACCESS_FLAGS | 5906776a3906SMoni Shoua IB_QP_PORT | 5907776a3906SMoni Shoua IB_QP_MIN_RNR_TIMER | 5908776a3906SMoni Shoua IB_QP_AV | 5909776a3906SMoni Shoua IB_QP_PATH_MTU | 5910776a3906SMoni Shoua IB_QP_PKEY_INDEX; 5911776a3906SMoni Shoua 5912776a3906SMoni Shoua if (qp_attr_mask & ~supported_mask) 5913776a3906SMoni Shoua return -EINVAL; 5914776a3906SMoni Shoua if (mqp->state != IB_QPS_RTR) 5915776a3906SMoni Shoua return -EINVAL; 5916776a3906SMoni Shoua 5917776a3906SMoni Shoua out = kzalloc(outlen, GFP_KERNEL); 5918776a3906SMoni Shoua if (!out) 5919776a3906SMoni Shoua return -ENOMEM; 5920776a3906SMoni Shoua 5921333fbaa0SLeon Romanovsky err = mlx5_core_dct_query(dev, dct, out, outlen); 5922776a3906SMoni Shoua if (err) 5923776a3906SMoni Shoua goto out; 5924776a3906SMoni Shoua 5925776a3906SMoni Shoua dctc = MLX5_ADDR_OF(query_dct_out, out, dct_context_entry); 5926776a3906SMoni Shoua 5927776a3906SMoni Shoua if (qp_attr_mask & IB_QP_STATE) 5928776a3906SMoni Shoua qp_attr->qp_state = IB_QPS_RTR; 5929776a3906SMoni Shoua 5930776a3906SMoni Shoua if (qp_attr_mask & IB_QP_ACCESS_FLAGS) { 5931776a3906SMoni Shoua if (MLX5_GET(dctc, dctc, rre)) 5932776a3906SMoni Shoua access_flags |= IB_ACCESS_REMOTE_READ; 5933776a3906SMoni Shoua if (MLX5_GET(dctc, dctc, rwe)) 5934776a3906SMoni Shoua access_flags |= IB_ACCESS_REMOTE_WRITE; 5935776a3906SMoni Shoua if (MLX5_GET(dctc, dctc, rae)) 5936776a3906SMoni Shoua access_flags |= IB_ACCESS_REMOTE_ATOMIC; 5937776a3906SMoni Shoua qp_attr->qp_access_flags = access_flags; 5938776a3906SMoni Shoua } 5939776a3906SMoni Shoua 5940776a3906SMoni Shoua if (qp_attr_mask & IB_QP_PORT) 5941776a3906SMoni Shoua qp_attr->port_num = MLX5_GET(dctc, dctc, port); 5942776a3906SMoni Shoua if (qp_attr_mask & IB_QP_MIN_RNR_TIMER) 5943776a3906SMoni Shoua qp_attr->min_rnr_timer = MLX5_GET(dctc, dctc, min_rnr_nak); 5944776a3906SMoni Shoua if (qp_attr_mask & IB_QP_AV) { 5945776a3906SMoni Shoua qp_attr->ah_attr.grh.traffic_class = MLX5_GET(dctc, dctc, tclass); 5946776a3906SMoni Shoua qp_attr->ah_attr.grh.flow_label = MLX5_GET(dctc, dctc, flow_label); 5947776a3906SMoni Shoua qp_attr->ah_attr.grh.sgid_index = MLX5_GET(dctc, dctc, my_addr_index); 5948776a3906SMoni Shoua qp_attr->ah_attr.grh.hop_limit = MLX5_GET(dctc, dctc, hop_limit); 5949776a3906SMoni Shoua } 5950776a3906SMoni Shoua if (qp_attr_mask & IB_QP_PATH_MTU) 5951776a3906SMoni Shoua qp_attr->path_mtu = MLX5_GET(dctc, dctc, mtu); 5952776a3906SMoni Shoua if (qp_attr_mask & IB_QP_PKEY_INDEX) 5953776a3906SMoni Shoua qp_attr->pkey_index = MLX5_GET(dctc, dctc, pkey_index); 5954776a3906SMoni Shoua out: 5955776a3906SMoni Shoua kfree(out); 5956776a3906SMoni Shoua return err; 5957776a3906SMoni Shoua } 5958776a3906SMoni Shoua 59596d2f89dfSmajd@mellanox.com int mlx5_ib_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *qp_attr, 59606d2f89dfSmajd@mellanox.com int qp_attr_mask, struct ib_qp_init_attr *qp_init_attr) 59616d2f89dfSmajd@mellanox.com { 59626d2f89dfSmajd@mellanox.com struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 59636d2f89dfSmajd@mellanox.com struct mlx5_ib_qp *qp = to_mqp(ibqp); 59646d2f89dfSmajd@mellanox.com int err = 0; 59656d2f89dfSmajd@mellanox.com u8 raw_packet_qp_state; 59666d2f89dfSmajd@mellanox.com 596728d61370SYishai Hadas if (ibqp->rwq_ind_tbl) 596828d61370SYishai Hadas return -ENOSYS; 596928d61370SYishai Hadas 5970d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 5971d16e91daSHaggai Eran return mlx5_ib_gsi_query_qp(ibqp, qp_attr, qp_attr_mask, 5972d16e91daSHaggai Eran qp_init_attr); 5973d16e91daSHaggai Eran 5974c2e53b2cSYishai Hadas /* Not all of output fields are applicable, make sure to zero them */ 5975c2e53b2cSYishai Hadas memset(qp_init_attr, 0, sizeof(*qp_init_attr)); 5976c2e53b2cSYishai Hadas memset(qp_attr, 0, sizeof(*qp_attr)); 5977c2e53b2cSYishai Hadas 59787aede1a2SLeon Romanovsky if (unlikely(qp->type == MLX5_IB_QPT_DCT)) 5979776a3906SMoni Shoua return mlx5_ib_dct_query_qp(dev, qp, qp_attr, 5980776a3906SMoni Shoua qp_attr_mask, qp_init_attr); 5981776a3906SMoni Shoua 59826d2f89dfSmajd@mellanox.com mutex_lock(&qp->mutex); 59836d2f89dfSmajd@mellanox.com 5984c2e53b2cSYishai Hadas if (qp->ibqp.qp_type == IB_QPT_RAW_PACKET || 59852be08c30SLeon Romanovsky qp->flags & IB_QP_CREATE_SOURCE_QPN) { 59866d2f89dfSmajd@mellanox.com err = query_raw_packet_qp_state(dev, qp, &raw_packet_qp_state); 59876d2f89dfSmajd@mellanox.com if (err) 59886d2f89dfSmajd@mellanox.com goto out; 59896d2f89dfSmajd@mellanox.com qp->state = raw_packet_qp_state; 59906d2f89dfSmajd@mellanox.com qp_attr->port_num = 1; 59916d2f89dfSmajd@mellanox.com } else { 59926d2f89dfSmajd@mellanox.com err = query_qp_attr(dev, qp, qp_attr); 59936d2f89dfSmajd@mellanox.com if (err) 59946d2f89dfSmajd@mellanox.com goto out; 59956d2f89dfSmajd@mellanox.com } 59966d2f89dfSmajd@mellanox.com 59976d2f89dfSmajd@mellanox.com qp_attr->qp_state = qp->state; 5998e126ba97SEli Cohen qp_attr->cur_qp_state = qp_attr->qp_state; 5999e126ba97SEli Cohen qp_attr->cap.max_recv_wr = qp->rq.wqe_cnt; 6000e126ba97SEli Cohen qp_attr->cap.max_recv_sge = qp->rq.max_gs; 6001e126ba97SEli Cohen 6002e126ba97SEli Cohen if (!ibqp->uobject) { 60030540d814SNoa Osherovich qp_attr->cap.max_send_wr = qp->sq.max_post; 6004e126ba97SEli Cohen qp_attr->cap.max_send_sge = qp->sq.max_gs; 60050540d814SNoa Osherovich qp_init_attr->qp_context = ibqp->qp_context; 6006e126ba97SEli Cohen } else { 6007e126ba97SEli Cohen qp_attr->cap.max_send_wr = 0; 6008e126ba97SEli Cohen qp_attr->cap.max_send_sge = 0; 6009e126ba97SEli Cohen } 6010e126ba97SEli Cohen 60110540d814SNoa Osherovich qp_init_attr->qp_type = ibqp->qp_type; 60120540d814SNoa Osherovich qp_init_attr->recv_cq = ibqp->recv_cq; 60130540d814SNoa Osherovich qp_init_attr->send_cq = ibqp->send_cq; 60140540d814SNoa Osherovich qp_init_attr->srq = ibqp->srq; 60150540d814SNoa Osherovich qp_attr->cap.max_inline_data = qp->max_inline_data; 6016e126ba97SEli Cohen 6017e126ba97SEli Cohen qp_init_attr->cap = qp_attr->cap; 6018e126ba97SEli Cohen 6019a8f3ea61SLeon Romanovsky qp_init_attr->create_flags = qp->flags; 6020051f2630SLeon Romanovsky 6021e126ba97SEli Cohen qp_init_attr->sq_sig_type = qp->sq_signal_bits & MLX5_WQE_CTRL_CQ_UPDATE ? 6022e126ba97SEli Cohen IB_SIGNAL_ALL_WR : IB_SIGNAL_REQ_WR; 6023e126ba97SEli Cohen 6024e126ba97SEli Cohen out: 6025e126ba97SEli Cohen mutex_unlock(&qp->mutex); 6026e126ba97SEli Cohen return err; 6027e126ba97SEli Cohen } 6028e126ba97SEli Cohen 6029e126ba97SEli Cohen struct ib_xrcd *mlx5_ib_alloc_xrcd(struct ib_device *ibdev, 6030e126ba97SEli Cohen struct ib_udata *udata) 6031e126ba97SEli Cohen { 6032e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibdev); 6033e126ba97SEli Cohen struct mlx5_ib_xrcd *xrcd; 6034e126ba97SEli Cohen int err; 6035e126ba97SEli Cohen 6036938fe83cSSaeed Mahameed if (!MLX5_CAP_GEN(dev->mdev, xrc)) 6037e126ba97SEli Cohen return ERR_PTR(-ENOSYS); 6038e126ba97SEli Cohen 6039e126ba97SEli Cohen xrcd = kmalloc(sizeof(*xrcd), GFP_KERNEL); 6040e126ba97SEli Cohen if (!xrcd) 6041e126ba97SEli Cohen return ERR_PTR(-ENOMEM); 6042e126ba97SEli Cohen 60435aa3771dSYishai Hadas err = mlx5_cmd_xrcd_alloc(dev->mdev, &xrcd->xrcdn, 0); 6044e126ba97SEli Cohen if (err) { 6045e126ba97SEli Cohen kfree(xrcd); 6046e126ba97SEli Cohen return ERR_PTR(-ENOMEM); 6047e126ba97SEli Cohen } 6048e126ba97SEli Cohen 6049e126ba97SEli Cohen return &xrcd->ibxrcd; 6050e126ba97SEli Cohen } 6051e126ba97SEli Cohen 6052c4367a26SShamir Rabinovitch int mlx5_ib_dealloc_xrcd(struct ib_xrcd *xrcd, struct ib_udata *udata) 6053e126ba97SEli Cohen { 6054e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(xrcd->device); 6055e126ba97SEli Cohen u32 xrcdn = to_mxrcd(xrcd)->xrcdn; 6056e126ba97SEli Cohen int err; 6057e126ba97SEli Cohen 60585aa3771dSYishai Hadas err = mlx5_cmd_xrcd_dealloc(dev->mdev, xrcdn, 0); 6059b081808aSLeon Romanovsky if (err) 6060e126ba97SEli Cohen mlx5_ib_warn(dev, "failed to dealloc xrcdn 0x%x\n", xrcdn); 6061e126ba97SEli Cohen 6062e126ba97SEli Cohen kfree(xrcd); 6063e126ba97SEli Cohen return 0; 6064e126ba97SEli Cohen } 606579b20a6cSYishai Hadas 6066350d0e4cSYishai Hadas static void mlx5_ib_wq_event(struct mlx5_core_qp *core_qp, int type) 6067350d0e4cSYishai Hadas { 6068350d0e4cSYishai Hadas struct mlx5_ib_rwq *rwq = to_mibrwq(core_qp); 6069350d0e4cSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(rwq->ibwq.device); 6070350d0e4cSYishai Hadas struct ib_event event; 6071350d0e4cSYishai Hadas 6072350d0e4cSYishai Hadas if (rwq->ibwq.event_handler) { 6073350d0e4cSYishai Hadas event.device = rwq->ibwq.device; 6074350d0e4cSYishai Hadas event.element.wq = &rwq->ibwq; 6075350d0e4cSYishai Hadas switch (type) { 6076350d0e4cSYishai Hadas case MLX5_EVENT_TYPE_WQ_CATAS_ERROR: 6077350d0e4cSYishai Hadas event.event = IB_EVENT_WQ_FATAL; 6078350d0e4cSYishai Hadas break; 6079350d0e4cSYishai Hadas default: 6080350d0e4cSYishai Hadas mlx5_ib_warn(dev, "Unexpected event type %d on WQ %06x\n", type, core_qp->qpn); 6081350d0e4cSYishai Hadas return; 6082350d0e4cSYishai Hadas } 6083350d0e4cSYishai Hadas 6084350d0e4cSYishai Hadas rwq->ibwq.event_handler(&event, rwq->ibwq.wq_context); 6085350d0e4cSYishai Hadas } 6086350d0e4cSYishai Hadas } 6087350d0e4cSYishai Hadas 608803404e8aSMaor Gottlieb static int set_delay_drop(struct mlx5_ib_dev *dev) 608903404e8aSMaor Gottlieb { 609003404e8aSMaor Gottlieb int err = 0; 609103404e8aSMaor Gottlieb 609203404e8aSMaor Gottlieb mutex_lock(&dev->delay_drop.lock); 609303404e8aSMaor Gottlieb if (dev->delay_drop.activate) 609403404e8aSMaor Gottlieb goto out; 609503404e8aSMaor Gottlieb 6096333fbaa0SLeon Romanovsky err = mlx5_core_set_delay_drop(dev, dev->delay_drop.timeout); 609703404e8aSMaor Gottlieb if (err) 609803404e8aSMaor Gottlieb goto out; 609903404e8aSMaor Gottlieb 610003404e8aSMaor Gottlieb dev->delay_drop.activate = true; 610103404e8aSMaor Gottlieb out: 610203404e8aSMaor Gottlieb mutex_unlock(&dev->delay_drop.lock); 6103fe248c3aSMaor Gottlieb 6104fe248c3aSMaor Gottlieb if (!err) 6105fe248c3aSMaor Gottlieb atomic_inc(&dev->delay_drop.rqs_cnt); 610603404e8aSMaor Gottlieb return err; 610703404e8aSMaor Gottlieb } 610803404e8aSMaor Gottlieb 610979b20a6cSYishai Hadas static int create_rq(struct mlx5_ib_rwq *rwq, struct ib_pd *pd, 611079b20a6cSYishai Hadas struct ib_wq_init_attr *init_attr) 611179b20a6cSYishai Hadas { 611279b20a6cSYishai Hadas struct mlx5_ib_dev *dev; 61134be6da1eSNoa Osherovich int has_net_offloads; 611479b20a6cSYishai Hadas __be64 *rq_pas0; 611579b20a6cSYishai Hadas void *in; 611679b20a6cSYishai Hadas void *rqc; 611779b20a6cSYishai Hadas void *wq; 611879b20a6cSYishai Hadas int inlen; 611979b20a6cSYishai Hadas int err; 612079b20a6cSYishai Hadas 612179b20a6cSYishai Hadas dev = to_mdev(pd->device); 612279b20a6cSYishai Hadas 612379b20a6cSYishai Hadas inlen = MLX5_ST_SZ_BYTES(create_rq_in) + sizeof(u64) * rwq->rq_num_pas; 61241b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 612579b20a6cSYishai Hadas if (!in) 612679b20a6cSYishai Hadas return -ENOMEM; 612779b20a6cSYishai Hadas 612834d57585SYishai Hadas MLX5_SET(create_rq_in, in, uid, to_mpd(pd)->uid); 612979b20a6cSYishai Hadas rqc = MLX5_ADDR_OF(create_rq_in, in, ctx); 613079b20a6cSYishai Hadas MLX5_SET(rqc, rqc, mem_rq_type, 613179b20a6cSYishai Hadas MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE); 613279b20a6cSYishai Hadas MLX5_SET(rqc, rqc, user_index, rwq->user_index); 613379b20a6cSYishai Hadas MLX5_SET(rqc, rqc, cqn, to_mcq(init_attr->cq)->mcq.cqn); 613479b20a6cSYishai Hadas MLX5_SET(rqc, rqc, state, MLX5_RQC_STATE_RST); 613579b20a6cSYishai Hadas MLX5_SET(rqc, rqc, flush_in_error_en, 1); 613679b20a6cSYishai Hadas wq = MLX5_ADDR_OF(rqc, rqc, wq); 6137ccc87087SNoa Osherovich MLX5_SET(wq, wq, wq_type, 6138ccc87087SNoa Osherovich rwq->create_flags & MLX5_IB_WQ_FLAGS_STRIDING_RQ ? 6139ccc87087SNoa Osherovich MLX5_WQ_TYPE_CYCLIC_STRIDING_RQ : MLX5_WQ_TYPE_CYCLIC); 6140b1383aa6SNoa Osherovich if (init_attr->create_flags & IB_WQ_FLAGS_PCI_WRITE_END_PADDING) { 6141b1383aa6SNoa Osherovich if (!MLX5_CAP_GEN(dev->mdev, end_pad)) { 6142b1383aa6SNoa Osherovich mlx5_ib_dbg(dev, "Scatter end padding is not supported\n"); 6143b1383aa6SNoa Osherovich err = -EOPNOTSUPP; 6144b1383aa6SNoa Osherovich goto out; 6145b1383aa6SNoa Osherovich } else { 614679b20a6cSYishai Hadas MLX5_SET(wq, wq, end_padding_mode, MLX5_WQ_END_PAD_MODE_ALIGN); 6147b1383aa6SNoa Osherovich } 6148b1383aa6SNoa Osherovich } 614979b20a6cSYishai Hadas MLX5_SET(wq, wq, log_wq_stride, rwq->log_rq_stride); 6150ccc87087SNoa Osherovich if (rwq->create_flags & MLX5_IB_WQ_FLAGS_STRIDING_RQ) { 6151c16339b6SMark Zhang /* 6152c16339b6SMark Zhang * In Firmware number of strides in each WQE is: 6153c16339b6SMark Zhang * "512 * 2^single_wqe_log_num_of_strides" 6154c16339b6SMark Zhang * Values 3 to 8 are accepted as 10 to 15, 9 to 18 are 6155c16339b6SMark Zhang * accepted as 0 to 9 6156c16339b6SMark Zhang */ 6157c16339b6SMark Zhang static const u8 fw_map[] = { 10, 11, 12, 13, 14, 15, 0, 1, 6158c16339b6SMark Zhang 2, 3, 4, 5, 6, 7, 8, 9 }; 6159ccc87087SNoa Osherovich MLX5_SET(wq, wq, two_byte_shift_en, rwq->two_byte_shift_en); 6160ccc87087SNoa Osherovich MLX5_SET(wq, wq, log_wqe_stride_size, 6161ccc87087SNoa Osherovich rwq->single_stride_log_num_of_bytes - 6162ccc87087SNoa Osherovich MLX5_MIN_SINGLE_STRIDE_LOG_NUM_BYTES); 6163c16339b6SMark Zhang MLX5_SET(wq, wq, log_wqe_num_of_strides, 6164c16339b6SMark Zhang fw_map[rwq->log_num_strides - 6165c16339b6SMark Zhang MLX5_EXT_MIN_SINGLE_WQE_LOG_NUM_STRIDES]); 6166ccc87087SNoa Osherovich } 616779b20a6cSYishai Hadas MLX5_SET(wq, wq, log_wq_sz, rwq->log_rq_size); 616879b20a6cSYishai Hadas MLX5_SET(wq, wq, pd, to_mpd(pd)->pdn); 616979b20a6cSYishai Hadas MLX5_SET(wq, wq, page_offset, rwq->rq_page_offset); 617079b20a6cSYishai Hadas MLX5_SET(wq, wq, log_wq_pg_sz, rwq->log_page_size); 617179b20a6cSYishai Hadas MLX5_SET(wq, wq, wq_signature, rwq->wq_sig); 617279b20a6cSYishai Hadas MLX5_SET64(wq, wq, dbr_addr, rwq->db.dma); 61734be6da1eSNoa Osherovich has_net_offloads = MLX5_CAP_GEN(dev->mdev, eth_net_offloads); 6174b1f74a84SNoa Osherovich if (init_attr->create_flags & IB_WQ_FLAGS_CVLAN_STRIPPING) { 61754be6da1eSNoa Osherovich if (!(has_net_offloads && MLX5_CAP_ETH(dev->mdev, vlan_cap))) { 6176b1f74a84SNoa Osherovich mlx5_ib_dbg(dev, "VLAN offloads are not supported\n"); 6177b1f74a84SNoa Osherovich err = -EOPNOTSUPP; 6178b1f74a84SNoa Osherovich goto out; 6179b1f74a84SNoa Osherovich } 6180b1f74a84SNoa Osherovich } else { 6181b1f74a84SNoa Osherovich MLX5_SET(rqc, rqc, vsd, 1); 6182b1f74a84SNoa Osherovich } 61834be6da1eSNoa Osherovich if (init_attr->create_flags & IB_WQ_FLAGS_SCATTER_FCS) { 61844be6da1eSNoa Osherovich if (!(has_net_offloads && MLX5_CAP_ETH(dev->mdev, scatter_fcs))) { 61854be6da1eSNoa Osherovich mlx5_ib_dbg(dev, "Scatter FCS is not supported\n"); 61864be6da1eSNoa Osherovich err = -EOPNOTSUPP; 61874be6da1eSNoa Osherovich goto out; 61884be6da1eSNoa Osherovich } 61894be6da1eSNoa Osherovich MLX5_SET(rqc, rqc, scatter_fcs, 1); 61904be6da1eSNoa Osherovich } 619103404e8aSMaor Gottlieb if (init_attr->create_flags & IB_WQ_FLAGS_DELAY_DROP) { 619203404e8aSMaor Gottlieb if (!(dev->ib_dev.attrs.raw_packet_caps & 619303404e8aSMaor Gottlieb IB_RAW_PACKET_CAP_DELAY_DROP)) { 619403404e8aSMaor Gottlieb mlx5_ib_dbg(dev, "Delay drop is not supported\n"); 619503404e8aSMaor Gottlieb err = -EOPNOTSUPP; 619603404e8aSMaor Gottlieb goto out; 619703404e8aSMaor Gottlieb } 619803404e8aSMaor Gottlieb MLX5_SET(rqc, rqc, delay_drop_en, 1); 619903404e8aSMaor Gottlieb } 620079b20a6cSYishai Hadas rq_pas0 = (__be64 *)MLX5_ADDR_OF(wq, wq, pas); 620179b20a6cSYishai Hadas mlx5_ib_populate_pas(dev, rwq->umem, rwq->page_shift, rq_pas0, 0); 6202333fbaa0SLeon Romanovsky err = mlx5_core_create_rq_tracked(dev, in, inlen, &rwq->core_qp); 620303404e8aSMaor Gottlieb if (!err && init_attr->create_flags & IB_WQ_FLAGS_DELAY_DROP) { 620403404e8aSMaor Gottlieb err = set_delay_drop(dev); 620503404e8aSMaor Gottlieb if (err) { 620603404e8aSMaor Gottlieb mlx5_ib_warn(dev, "Failed to enable delay drop err=%d\n", 620703404e8aSMaor Gottlieb err); 6208333fbaa0SLeon Romanovsky mlx5_core_destroy_rq_tracked(dev, &rwq->core_qp); 620903404e8aSMaor Gottlieb } else { 621003404e8aSMaor Gottlieb rwq->create_flags |= MLX5_IB_WQ_FLAGS_DELAY_DROP; 621103404e8aSMaor Gottlieb } 621203404e8aSMaor Gottlieb } 6213b1f74a84SNoa Osherovich out: 621479b20a6cSYishai Hadas kvfree(in); 621579b20a6cSYishai Hadas return err; 621679b20a6cSYishai Hadas } 621779b20a6cSYishai Hadas 621879b20a6cSYishai Hadas static int set_user_rq_size(struct mlx5_ib_dev *dev, 621979b20a6cSYishai Hadas struct ib_wq_init_attr *wq_init_attr, 622079b20a6cSYishai Hadas struct mlx5_ib_create_wq *ucmd, 622179b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq) 622279b20a6cSYishai Hadas { 622379b20a6cSYishai Hadas /* Sanity check RQ size before proceeding */ 622479b20a6cSYishai Hadas if (wq_init_attr->max_wr > (1 << MLX5_CAP_GEN(dev->mdev, log_max_wq_sz))) 622579b20a6cSYishai Hadas return -EINVAL; 622679b20a6cSYishai Hadas 622779b20a6cSYishai Hadas if (!ucmd->rq_wqe_count) 622879b20a6cSYishai Hadas return -EINVAL; 622979b20a6cSYishai Hadas 623079b20a6cSYishai Hadas rwq->wqe_count = ucmd->rq_wqe_count; 623179b20a6cSYishai Hadas rwq->wqe_shift = ucmd->rq_wqe_shift; 62320dfe4522SLeon Romanovsky if (check_shl_overflow(rwq->wqe_count, rwq->wqe_shift, &rwq->buf_size)) 62330dfe4522SLeon Romanovsky return -EINVAL; 62340dfe4522SLeon Romanovsky 623579b20a6cSYishai Hadas rwq->log_rq_stride = rwq->wqe_shift; 623679b20a6cSYishai Hadas rwq->log_rq_size = ilog2(rwq->wqe_count); 623779b20a6cSYishai Hadas return 0; 623879b20a6cSYishai Hadas } 623979b20a6cSYishai Hadas 6240c16339b6SMark Zhang static bool log_of_strides_valid(struct mlx5_ib_dev *dev, u32 log_num_strides) 6241c16339b6SMark Zhang { 6242c16339b6SMark Zhang if ((log_num_strides > MLX5_MAX_SINGLE_WQE_LOG_NUM_STRIDES) || 6243c16339b6SMark Zhang (log_num_strides < MLX5_EXT_MIN_SINGLE_WQE_LOG_NUM_STRIDES)) 6244c16339b6SMark Zhang return false; 6245c16339b6SMark Zhang 6246c16339b6SMark Zhang if (!MLX5_CAP_GEN(dev->mdev, ext_stride_num_range) && 6247c16339b6SMark Zhang (log_num_strides < MLX5_MIN_SINGLE_WQE_LOG_NUM_STRIDES)) 6248c16339b6SMark Zhang return false; 6249c16339b6SMark Zhang 6250c16339b6SMark Zhang return true; 6251c16339b6SMark Zhang } 6252c16339b6SMark Zhang 625379b20a6cSYishai Hadas static int prepare_user_rq(struct ib_pd *pd, 625479b20a6cSYishai Hadas struct ib_wq_init_attr *init_attr, 625579b20a6cSYishai Hadas struct ib_udata *udata, 625679b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq) 625779b20a6cSYishai Hadas { 625879b20a6cSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(pd->device); 625979b20a6cSYishai Hadas struct mlx5_ib_create_wq ucmd = {}; 626079b20a6cSYishai Hadas int err; 626179b20a6cSYishai Hadas size_t required_cmd_sz; 626279b20a6cSYishai Hadas 6263ccc87087SNoa Osherovich required_cmd_sz = offsetof(typeof(ucmd), single_stride_log_num_of_bytes) 6264ccc87087SNoa Osherovich + sizeof(ucmd.single_stride_log_num_of_bytes); 626579b20a6cSYishai Hadas if (udata->inlen < required_cmd_sz) { 626679b20a6cSYishai Hadas mlx5_ib_dbg(dev, "invalid inlen\n"); 626779b20a6cSYishai Hadas return -EINVAL; 626879b20a6cSYishai Hadas } 626979b20a6cSYishai Hadas 627079b20a6cSYishai Hadas if (udata->inlen > sizeof(ucmd) && 627179b20a6cSYishai Hadas !ib_is_udata_cleared(udata, sizeof(ucmd), 627279b20a6cSYishai Hadas udata->inlen - sizeof(ucmd))) { 627379b20a6cSYishai Hadas mlx5_ib_dbg(dev, "inlen is not supported\n"); 627479b20a6cSYishai Hadas return -EOPNOTSUPP; 627579b20a6cSYishai Hadas } 627679b20a6cSYishai Hadas 627779b20a6cSYishai Hadas if (ib_copy_from_udata(&ucmd, udata, min(sizeof(ucmd), udata->inlen))) { 627879b20a6cSYishai Hadas mlx5_ib_dbg(dev, "copy failed\n"); 627979b20a6cSYishai Hadas return -EFAULT; 628079b20a6cSYishai Hadas } 628179b20a6cSYishai Hadas 6282ccc87087SNoa Osherovich if (ucmd.comp_mask & (~MLX5_IB_CREATE_WQ_STRIDING_RQ)) { 628379b20a6cSYishai Hadas mlx5_ib_dbg(dev, "invalid comp mask\n"); 628479b20a6cSYishai Hadas return -EOPNOTSUPP; 6285ccc87087SNoa Osherovich } else if (ucmd.comp_mask & MLX5_IB_CREATE_WQ_STRIDING_RQ) { 6286ccc87087SNoa Osherovich if (!MLX5_CAP_GEN(dev->mdev, striding_rq)) { 6287ccc87087SNoa Osherovich mlx5_ib_dbg(dev, "Striding RQ is not supported\n"); 628879b20a6cSYishai Hadas return -EOPNOTSUPP; 628979b20a6cSYishai Hadas } 6290ccc87087SNoa Osherovich if ((ucmd.single_stride_log_num_of_bytes < 6291ccc87087SNoa Osherovich MLX5_MIN_SINGLE_STRIDE_LOG_NUM_BYTES) || 6292ccc87087SNoa Osherovich (ucmd.single_stride_log_num_of_bytes > 6293ccc87087SNoa Osherovich MLX5_MAX_SINGLE_STRIDE_LOG_NUM_BYTES)) { 6294ccc87087SNoa Osherovich mlx5_ib_dbg(dev, "Invalid log stride size (%u. Range is %u - %u)\n", 6295ccc87087SNoa Osherovich ucmd.single_stride_log_num_of_bytes, 6296ccc87087SNoa Osherovich MLX5_MIN_SINGLE_STRIDE_LOG_NUM_BYTES, 6297ccc87087SNoa Osherovich MLX5_MAX_SINGLE_STRIDE_LOG_NUM_BYTES); 6298ccc87087SNoa Osherovich return -EINVAL; 6299ccc87087SNoa Osherovich } 6300c16339b6SMark Zhang if (!log_of_strides_valid(dev, 6301c16339b6SMark Zhang ucmd.single_wqe_log_num_of_strides)) { 6302c16339b6SMark Zhang mlx5_ib_dbg( 6303c16339b6SMark Zhang dev, 6304c16339b6SMark Zhang "Invalid log num strides (%u. Range is %u - %u)\n", 6305ccc87087SNoa Osherovich ucmd.single_wqe_log_num_of_strides, 6306c16339b6SMark Zhang MLX5_CAP_GEN(dev->mdev, ext_stride_num_range) ? 6307c16339b6SMark Zhang MLX5_EXT_MIN_SINGLE_WQE_LOG_NUM_STRIDES : 6308ccc87087SNoa Osherovich MLX5_MIN_SINGLE_WQE_LOG_NUM_STRIDES, 6309ccc87087SNoa Osherovich MLX5_MAX_SINGLE_WQE_LOG_NUM_STRIDES); 6310ccc87087SNoa Osherovich return -EINVAL; 6311ccc87087SNoa Osherovich } 6312ccc87087SNoa Osherovich rwq->single_stride_log_num_of_bytes = 6313ccc87087SNoa Osherovich ucmd.single_stride_log_num_of_bytes; 6314ccc87087SNoa Osherovich rwq->log_num_strides = ucmd.single_wqe_log_num_of_strides; 6315ccc87087SNoa Osherovich rwq->two_byte_shift_en = !!ucmd.two_byte_shift_en; 6316ccc87087SNoa Osherovich rwq->create_flags |= MLX5_IB_WQ_FLAGS_STRIDING_RQ; 6317ccc87087SNoa Osherovich } 631879b20a6cSYishai Hadas 631979b20a6cSYishai Hadas err = set_user_rq_size(dev, init_attr, &ucmd, rwq); 632079b20a6cSYishai Hadas if (err) { 632179b20a6cSYishai Hadas mlx5_ib_dbg(dev, "err %d\n", err); 632279b20a6cSYishai Hadas return err; 632379b20a6cSYishai Hadas } 632479b20a6cSYishai Hadas 6325b0ea0fa5SJason Gunthorpe err = create_user_rq(dev, pd, udata, rwq, &ucmd); 632679b20a6cSYishai Hadas if (err) { 632779b20a6cSYishai Hadas mlx5_ib_dbg(dev, "err %d\n", err); 632879b20a6cSYishai Hadas return err; 632979b20a6cSYishai Hadas } 633079b20a6cSYishai Hadas 633179b20a6cSYishai Hadas rwq->user_index = ucmd.user_index; 633279b20a6cSYishai Hadas return 0; 633379b20a6cSYishai Hadas } 633479b20a6cSYishai Hadas 633579b20a6cSYishai Hadas struct ib_wq *mlx5_ib_create_wq(struct ib_pd *pd, 633679b20a6cSYishai Hadas struct ib_wq_init_attr *init_attr, 633779b20a6cSYishai Hadas struct ib_udata *udata) 633879b20a6cSYishai Hadas { 633979b20a6cSYishai Hadas struct mlx5_ib_dev *dev; 634079b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq; 634179b20a6cSYishai Hadas struct mlx5_ib_create_wq_resp resp = {}; 634279b20a6cSYishai Hadas size_t min_resp_len; 634379b20a6cSYishai Hadas int err; 634479b20a6cSYishai Hadas 634579b20a6cSYishai Hadas if (!udata) 634679b20a6cSYishai Hadas return ERR_PTR(-ENOSYS); 634779b20a6cSYishai Hadas 634879b20a6cSYishai Hadas min_resp_len = offsetof(typeof(resp), reserved) + sizeof(resp.reserved); 634979b20a6cSYishai Hadas if (udata->outlen && udata->outlen < min_resp_len) 635079b20a6cSYishai Hadas return ERR_PTR(-EINVAL); 635179b20a6cSYishai Hadas 6352ba80013fSMaor Gottlieb if (!capable(CAP_SYS_RAWIO) && 6353ba80013fSMaor Gottlieb init_attr->create_flags & IB_WQ_FLAGS_DELAY_DROP) 6354ba80013fSMaor Gottlieb return ERR_PTR(-EPERM); 6355ba80013fSMaor Gottlieb 635679b20a6cSYishai Hadas dev = to_mdev(pd->device); 635779b20a6cSYishai Hadas switch (init_attr->wq_type) { 635879b20a6cSYishai Hadas case IB_WQT_RQ: 635979b20a6cSYishai Hadas rwq = kzalloc(sizeof(*rwq), GFP_KERNEL); 636079b20a6cSYishai Hadas if (!rwq) 636179b20a6cSYishai Hadas return ERR_PTR(-ENOMEM); 636279b20a6cSYishai Hadas err = prepare_user_rq(pd, init_attr, udata, rwq); 636379b20a6cSYishai Hadas if (err) 636479b20a6cSYishai Hadas goto err; 636579b20a6cSYishai Hadas err = create_rq(rwq, pd, init_attr); 636679b20a6cSYishai Hadas if (err) 636779b20a6cSYishai Hadas goto err_user_rq; 636879b20a6cSYishai Hadas break; 636979b20a6cSYishai Hadas default: 637079b20a6cSYishai Hadas mlx5_ib_dbg(dev, "unsupported wq type %d\n", 637179b20a6cSYishai Hadas init_attr->wq_type); 637279b20a6cSYishai Hadas return ERR_PTR(-EINVAL); 637379b20a6cSYishai Hadas } 637479b20a6cSYishai Hadas 6375350d0e4cSYishai Hadas rwq->ibwq.wq_num = rwq->core_qp.qpn; 637679b20a6cSYishai Hadas rwq->ibwq.state = IB_WQS_RESET; 637779b20a6cSYishai Hadas if (udata->outlen) { 637879b20a6cSYishai Hadas resp.response_length = offsetof(typeof(resp), response_length) + 637979b20a6cSYishai Hadas sizeof(resp.response_length); 638079b20a6cSYishai Hadas err = ib_copy_to_udata(udata, &resp, resp.response_length); 638179b20a6cSYishai Hadas if (err) 638279b20a6cSYishai Hadas goto err_copy; 638379b20a6cSYishai Hadas } 638479b20a6cSYishai Hadas 6385350d0e4cSYishai Hadas rwq->core_qp.event = mlx5_ib_wq_event; 6386350d0e4cSYishai Hadas rwq->ibwq.event_handler = init_attr->event_handler; 638779b20a6cSYishai Hadas return &rwq->ibwq; 638879b20a6cSYishai Hadas 638979b20a6cSYishai Hadas err_copy: 6390333fbaa0SLeon Romanovsky mlx5_core_destroy_rq_tracked(dev, &rwq->core_qp); 639179b20a6cSYishai Hadas err_user_rq: 6392bdeacabdSShamir Rabinovitch destroy_user_rq(dev, pd, rwq, udata); 639379b20a6cSYishai Hadas err: 639479b20a6cSYishai Hadas kfree(rwq); 639579b20a6cSYishai Hadas return ERR_PTR(err); 639679b20a6cSYishai Hadas } 639779b20a6cSYishai Hadas 6398a49b1dc7SLeon Romanovsky void mlx5_ib_destroy_wq(struct ib_wq *wq, struct ib_udata *udata) 639979b20a6cSYishai Hadas { 640079b20a6cSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(wq->device); 640179b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq = to_mrwq(wq); 640279b20a6cSYishai Hadas 6403333fbaa0SLeon Romanovsky mlx5_core_destroy_rq_tracked(dev, &rwq->core_qp); 6404bdeacabdSShamir Rabinovitch destroy_user_rq(dev, wq->pd, rwq, udata); 640579b20a6cSYishai Hadas kfree(rwq); 640679b20a6cSYishai Hadas } 640779b20a6cSYishai Hadas 6408c5f90929SYishai Hadas struct ib_rwq_ind_table *mlx5_ib_create_rwq_ind_table(struct ib_device *device, 6409c5f90929SYishai Hadas struct ib_rwq_ind_table_init_attr *init_attr, 6410c5f90929SYishai Hadas struct ib_udata *udata) 6411c5f90929SYishai Hadas { 6412c5f90929SYishai Hadas struct mlx5_ib_dev *dev = to_mdev(device); 6413c5f90929SYishai Hadas struct mlx5_ib_rwq_ind_table *rwq_ind_tbl; 6414c5f90929SYishai Hadas int sz = 1 << init_attr->log_ind_tbl_size; 6415c5f90929SYishai Hadas struct mlx5_ib_create_rwq_ind_tbl_resp resp = {}; 6416c5f90929SYishai Hadas size_t min_resp_len; 6417c5f90929SYishai Hadas int inlen; 6418c5f90929SYishai Hadas int err; 6419c5f90929SYishai Hadas int i; 6420c5f90929SYishai Hadas u32 *in; 6421c5f90929SYishai Hadas void *rqtc; 6422c5f90929SYishai Hadas 6423c5f90929SYishai Hadas if (udata->inlen > 0 && 6424c5f90929SYishai Hadas !ib_is_udata_cleared(udata, 0, 6425c5f90929SYishai Hadas udata->inlen)) 6426c5f90929SYishai Hadas return ERR_PTR(-EOPNOTSUPP); 6427c5f90929SYishai Hadas 6428efd7f400SMaor Gottlieb if (init_attr->log_ind_tbl_size > 6429efd7f400SMaor Gottlieb MLX5_CAP_GEN(dev->mdev, log_max_rqt_size)) { 6430efd7f400SMaor Gottlieb mlx5_ib_dbg(dev, "log_ind_tbl_size = %d is bigger than supported = %d\n", 6431efd7f400SMaor Gottlieb init_attr->log_ind_tbl_size, 6432efd7f400SMaor Gottlieb MLX5_CAP_GEN(dev->mdev, log_max_rqt_size)); 6433efd7f400SMaor Gottlieb return ERR_PTR(-EINVAL); 6434efd7f400SMaor Gottlieb } 6435efd7f400SMaor Gottlieb 6436c5f90929SYishai Hadas min_resp_len = offsetof(typeof(resp), reserved) + sizeof(resp.reserved); 6437c5f90929SYishai Hadas if (udata->outlen && udata->outlen < min_resp_len) 6438c5f90929SYishai Hadas return ERR_PTR(-EINVAL); 6439c5f90929SYishai Hadas 6440c5f90929SYishai Hadas rwq_ind_tbl = kzalloc(sizeof(*rwq_ind_tbl), GFP_KERNEL); 6441c5f90929SYishai Hadas if (!rwq_ind_tbl) 6442c5f90929SYishai Hadas return ERR_PTR(-ENOMEM); 6443c5f90929SYishai Hadas 6444c5f90929SYishai Hadas inlen = MLX5_ST_SZ_BYTES(create_rqt_in) + sizeof(u32) * sz; 64451b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 6446c5f90929SYishai Hadas if (!in) { 6447c5f90929SYishai Hadas err = -ENOMEM; 6448c5f90929SYishai Hadas goto err; 6449c5f90929SYishai Hadas } 6450c5f90929SYishai Hadas 6451c5f90929SYishai Hadas rqtc = MLX5_ADDR_OF(create_rqt_in, in, rqt_context); 6452c5f90929SYishai Hadas 6453c5f90929SYishai Hadas MLX5_SET(rqtc, rqtc, rqt_actual_size, sz); 6454c5f90929SYishai Hadas MLX5_SET(rqtc, rqtc, rqt_max_size, sz); 6455c5f90929SYishai Hadas 6456c5f90929SYishai Hadas for (i = 0; i < sz; i++) 6457c5f90929SYishai Hadas MLX5_SET(rqtc, rqtc, rq_num[i], init_attr->ind_tbl[i]->wq_num); 6458c5f90929SYishai Hadas 64595deba86eSYishai Hadas rwq_ind_tbl->uid = to_mpd(init_attr->ind_tbl[0]->pd)->uid; 64605deba86eSYishai Hadas MLX5_SET(create_rqt_in, in, uid, rwq_ind_tbl->uid); 64615deba86eSYishai Hadas 6462c5f90929SYishai Hadas err = mlx5_core_create_rqt(dev->mdev, in, inlen, &rwq_ind_tbl->rqtn); 6463c5f90929SYishai Hadas kvfree(in); 6464c5f90929SYishai Hadas 6465c5f90929SYishai Hadas if (err) 6466c5f90929SYishai Hadas goto err; 6467c5f90929SYishai Hadas 6468c5f90929SYishai Hadas rwq_ind_tbl->ib_rwq_ind_tbl.ind_tbl_num = rwq_ind_tbl->rqtn; 6469c5f90929SYishai Hadas if (udata->outlen) { 6470c5f90929SYishai Hadas resp.response_length = offsetof(typeof(resp), response_length) + 6471c5f90929SYishai Hadas sizeof(resp.response_length); 6472c5f90929SYishai Hadas err = ib_copy_to_udata(udata, &resp, resp.response_length); 6473c5f90929SYishai Hadas if (err) 6474c5f90929SYishai Hadas goto err_copy; 6475c5f90929SYishai Hadas } 6476c5f90929SYishai Hadas 6477c5f90929SYishai Hadas return &rwq_ind_tbl->ib_rwq_ind_tbl; 6478c5f90929SYishai Hadas 6479c5f90929SYishai Hadas err_copy: 64805deba86eSYishai Hadas mlx5_cmd_destroy_rqt(dev->mdev, rwq_ind_tbl->rqtn, rwq_ind_tbl->uid); 6481c5f90929SYishai Hadas err: 6482c5f90929SYishai Hadas kfree(rwq_ind_tbl); 6483c5f90929SYishai Hadas return ERR_PTR(err); 6484c5f90929SYishai Hadas } 6485c5f90929SYishai Hadas 6486c5f90929SYishai Hadas int mlx5_ib_destroy_rwq_ind_table(struct ib_rwq_ind_table *ib_rwq_ind_tbl) 6487c5f90929SYishai Hadas { 6488c5f90929SYishai Hadas struct mlx5_ib_rwq_ind_table *rwq_ind_tbl = to_mrwq_ind_table(ib_rwq_ind_tbl); 6489c5f90929SYishai Hadas struct mlx5_ib_dev *dev = to_mdev(ib_rwq_ind_tbl->device); 6490c5f90929SYishai Hadas 64915deba86eSYishai Hadas mlx5_cmd_destroy_rqt(dev->mdev, rwq_ind_tbl->rqtn, rwq_ind_tbl->uid); 6492c5f90929SYishai Hadas 6493c5f90929SYishai Hadas kfree(rwq_ind_tbl); 6494c5f90929SYishai Hadas return 0; 6495c5f90929SYishai Hadas } 6496c5f90929SYishai Hadas 649779b20a6cSYishai Hadas int mlx5_ib_modify_wq(struct ib_wq *wq, struct ib_wq_attr *wq_attr, 649879b20a6cSYishai Hadas u32 wq_attr_mask, struct ib_udata *udata) 649979b20a6cSYishai Hadas { 650079b20a6cSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(wq->device); 650179b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq = to_mrwq(wq); 650279b20a6cSYishai Hadas struct mlx5_ib_modify_wq ucmd = {}; 650379b20a6cSYishai Hadas size_t required_cmd_sz; 650479b20a6cSYishai Hadas int curr_wq_state; 650579b20a6cSYishai Hadas int wq_state; 650679b20a6cSYishai Hadas int inlen; 650779b20a6cSYishai Hadas int err; 650879b20a6cSYishai Hadas void *rqc; 650979b20a6cSYishai Hadas void *in; 651079b20a6cSYishai Hadas 651179b20a6cSYishai Hadas required_cmd_sz = offsetof(typeof(ucmd), reserved) + sizeof(ucmd.reserved); 651279b20a6cSYishai Hadas if (udata->inlen < required_cmd_sz) 651379b20a6cSYishai Hadas return -EINVAL; 651479b20a6cSYishai Hadas 651579b20a6cSYishai Hadas if (udata->inlen > sizeof(ucmd) && 651679b20a6cSYishai Hadas !ib_is_udata_cleared(udata, sizeof(ucmd), 651779b20a6cSYishai Hadas udata->inlen - sizeof(ucmd))) 651879b20a6cSYishai Hadas return -EOPNOTSUPP; 651979b20a6cSYishai Hadas 652079b20a6cSYishai Hadas if (ib_copy_from_udata(&ucmd, udata, min(sizeof(ucmd), udata->inlen))) 652179b20a6cSYishai Hadas return -EFAULT; 652279b20a6cSYishai Hadas 652379b20a6cSYishai Hadas if (ucmd.comp_mask || ucmd.reserved) 652479b20a6cSYishai Hadas return -EOPNOTSUPP; 652579b20a6cSYishai Hadas 652679b20a6cSYishai Hadas inlen = MLX5_ST_SZ_BYTES(modify_rq_in); 65271b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 652879b20a6cSYishai Hadas if (!in) 652979b20a6cSYishai Hadas return -ENOMEM; 653079b20a6cSYishai Hadas 653179b20a6cSYishai Hadas rqc = MLX5_ADDR_OF(modify_rq_in, in, ctx); 653279b20a6cSYishai Hadas 653379b20a6cSYishai Hadas curr_wq_state = (wq_attr_mask & IB_WQ_CUR_STATE) ? 653479b20a6cSYishai Hadas wq_attr->curr_wq_state : wq->state; 653579b20a6cSYishai Hadas wq_state = (wq_attr_mask & IB_WQ_STATE) ? 653679b20a6cSYishai Hadas wq_attr->wq_state : curr_wq_state; 653779b20a6cSYishai Hadas if (curr_wq_state == IB_WQS_ERR) 653879b20a6cSYishai Hadas curr_wq_state = MLX5_RQC_STATE_ERR; 653979b20a6cSYishai Hadas if (wq_state == IB_WQS_ERR) 654079b20a6cSYishai Hadas wq_state = MLX5_RQC_STATE_ERR; 654179b20a6cSYishai Hadas MLX5_SET(modify_rq_in, in, rq_state, curr_wq_state); 654234d57585SYishai Hadas MLX5_SET(modify_rq_in, in, uid, to_mpd(wq->pd)->uid); 654379b20a6cSYishai Hadas MLX5_SET(rqc, rqc, state, wq_state); 654479b20a6cSYishai Hadas 6545b1f74a84SNoa Osherovich if (wq_attr_mask & IB_WQ_FLAGS) { 6546b1f74a84SNoa Osherovich if (wq_attr->flags_mask & IB_WQ_FLAGS_CVLAN_STRIPPING) { 6547b1f74a84SNoa Osherovich if (!(MLX5_CAP_GEN(dev->mdev, eth_net_offloads) && 6548b1f74a84SNoa Osherovich MLX5_CAP_ETH(dev->mdev, vlan_cap))) { 6549b1f74a84SNoa Osherovich mlx5_ib_dbg(dev, "VLAN offloads are not " 6550b1f74a84SNoa Osherovich "supported\n"); 6551b1f74a84SNoa Osherovich err = -EOPNOTSUPP; 6552b1f74a84SNoa Osherovich goto out; 6553b1f74a84SNoa Osherovich } 6554b1f74a84SNoa Osherovich MLX5_SET64(modify_rq_in, in, modify_bitmask, 6555b1f74a84SNoa Osherovich MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_VSD); 6556b1f74a84SNoa Osherovich MLX5_SET(rqc, rqc, vsd, 6557b1f74a84SNoa Osherovich (wq_attr->flags & IB_WQ_FLAGS_CVLAN_STRIPPING) ? 0 : 1); 6558b1f74a84SNoa Osherovich } 6559b1383aa6SNoa Osherovich 6560b1383aa6SNoa Osherovich if (wq_attr->flags_mask & IB_WQ_FLAGS_PCI_WRITE_END_PADDING) { 6561b1383aa6SNoa Osherovich mlx5_ib_dbg(dev, "Modifying scatter end padding is not supported\n"); 6562b1383aa6SNoa Osherovich err = -EOPNOTSUPP; 6563b1383aa6SNoa Osherovich goto out; 6564b1383aa6SNoa Osherovich } 6565b1f74a84SNoa Osherovich } 6566b1f74a84SNoa Osherovich 656723a6964eSMajd Dibbiny if (curr_wq_state == IB_WQS_RESET && wq_state == IB_WQS_RDY) { 65683e1f000fSParav Pandit u16 set_id; 65693e1f000fSParav Pandit 65703e1f000fSParav Pandit set_id = mlx5_ib_get_counters_id(dev, 0); 657123a6964eSMajd Dibbiny if (MLX5_CAP_GEN(dev->mdev, modify_rq_counter_set_id)) { 657223a6964eSMajd Dibbiny MLX5_SET64(modify_rq_in, in, modify_bitmask, 657323a6964eSMajd Dibbiny MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID); 65743e1f000fSParav Pandit MLX5_SET(rqc, rqc, counter_set_id, set_id); 657523a6964eSMajd Dibbiny } else 65765a738b5dSJason Gunthorpe dev_info_once( 65775a738b5dSJason Gunthorpe &dev->ib_dev.dev, 65785a738b5dSJason Gunthorpe "Receive WQ counters are not supported on current FW\n"); 657923a6964eSMajd Dibbiny } 658023a6964eSMajd Dibbiny 6581e0b4b472SLeon Romanovsky err = mlx5_core_modify_rq(dev->mdev, rwq->core_qp.qpn, in); 658279b20a6cSYishai Hadas if (!err) 658379b20a6cSYishai Hadas rwq->ibwq.state = (wq_state == MLX5_RQC_STATE_ERR) ? IB_WQS_ERR : wq_state; 658479b20a6cSYishai Hadas 6585b1f74a84SNoa Osherovich out: 6586b1f74a84SNoa Osherovich kvfree(in); 658779b20a6cSYishai Hadas return err; 658879b20a6cSYishai Hadas } 6589d0e84c0aSYishai Hadas 6590d0e84c0aSYishai Hadas struct mlx5_ib_drain_cqe { 6591d0e84c0aSYishai Hadas struct ib_cqe cqe; 6592d0e84c0aSYishai Hadas struct completion done; 6593d0e84c0aSYishai Hadas }; 6594d0e84c0aSYishai Hadas 6595d0e84c0aSYishai Hadas static void mlx5_ib_drain_qp_done(struct ib_cq *cq, struct ib_wc *wc) 6596d0e84c0aSYishai Hadas { 6597d0e84c0aSYishai Hadas struct mlx5_ib_drain_cqe *cqe = container_of(wc->wr_cqe, 6598d0e84c0aSYishai Hadas struct mlx5_ib_drain_cqe, 6599d0e84c0aSYishai Hadas cqe); 6600d0e84c0aSYishai Hadas 6601d0e84c0aSYishai Hadas complete(&cqe->done); 6602d0e84c0aSYishai Hadas } 6603d0e84c0aSYishai Hadas 6604d0e84c0aSYishai Hadas /* This function returns only once the drained WR was completed */ 6605d0e84c0aSYishai Hadas static void handle_drain_completion(struct ib_cq *cq, 6606d0e84c0aSYishai Hadas struct mlx5_ib_drain_cqe *sdrain, 6607d0e84c0aSYishai Hadas struct mlx5_ib_dev *dev) 6608d0e84c0aSYishai Hadas { 6609d0e84c0aSYishai Hadas struct mlx5_core_dev *mdev = dev->mdev; 6610d0e84c0aSYishai Hadas 6611d0e84c0aSYishai Hadas if (cq->poll_ctx == IB_POLL_DIRECT) { 6612d0e84c0aSYishai Hadas while (wait_for_completion_timeout(&sdrain->done, HZ / 10) <= 0) 6613d0e84c0aSYishai Hadas ib_process_cq_direct(cq, -1); 6614d0e84c0aSYishai Hadas return; 6615d0e84c0aSYishai Hadas } 6616d0e84c0aSYishai Hadas 6617d0e84c0aSYishai Hadas if (mdev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR) { 6618d0e84c0aSYishai Hadas struct mlx5_ib_cq *mcq = to_mcq(cq); 6619d0e84c0aSYishai Hadas bool triggered = false; 6620d0e84c0aSYishai Hadas unsigned long flags; 6621d0e84c0aSYishai Hadas 6622d0e84c0aSYishai Hadas spin_lock_irqsave(&dev->reset_flow_resource_lock, flags); 6623d0e84c0aSYishai Hadas /* Make sure that the CQ handler won't run if wasn't run yet */ 6624d0e84c0aSYishai Hadas if (!mcq->mcq.reset_notify_added) 6625d0e84c0aSYishai Hadas mcq->mcq.reset_notify_added = 1; 6626d0e84c0aSYishai Hadas else 6627d0e84c0aSYishai Hadas triggered = true; 6628d0e84c0aSYishai Hadas spin_unlock_irqrestore(&dev->reset_flow_resource_lock, flags); 6629d0e84c0aSYishai Hadas 6630d0e84c0aSYishai Hadas if (triggered) { 6631d0e84c0aSYishai Hadas /* Wait for any scheduled/running task to be ended */ 6632d0e84c0aSYishai Hadas switch (cq->poll_ctx) { 6633d0e84c0aSYishai Hadas case IB_POLL_SOFTIRQ: 6634d0e84c0aSYishai Hadas irq_poll_disable(&cq->iop); 6635d0e84c0aSYishai Hadas irq_poll_enable(&cq->iop); 6636d0e84c0aSYishai Hadas break; 6637d0e84c0aSYishai Hadas case IB_POLL_WORKQUEUE: 6638d0e84c0aSYishai Hadas cancel_work_sync(&cq->work); 6639d0e84c0aSYishai Hadas break; 6640d0e84c0aSYishai Hadas default: 6641d0e84c0aSYishai Hadas WARN_ON_ONCE(1); 6642d0e84c0aSYishai Hadas } 6643d0e84c0aSYishai Hadas } 6644d0e84c0aSYishai Hadas 6645d0e84c0aSYishai Hadas /* Run the CQ handler - this makes sure that the drain WR will 6646d0e84c0aSYishai Hadas * be processed if wasn't processed yet. 6647d0e84c0aSYishai Hadas */ 66484e0e2ea1SYishai Hadas mcq->mcq.comp(&mcq->mcq, NULL); 6649d0e84c0aSYishai Hadas } 6650d0e84c0aSYishai Hadas 6651d0e84c0aSYishai Hadas wait_for_completion(&sdrain->done); 6652d0e84c0aSYishai Hadas } 6653d0e84c0aSYishai Hadas 6654d0e84c0aSYishai Hadas void mlx5_ib_drain_sq(struct ib_qp *qp) 6655d0e84c0aSYishai Hadas { 6656d0e84c0aSYishai Hadas struct ib_cq *cq = qp->send_cq; 6657d0e84c0aSYishai Hadas struct ib_qp_attr attr = { .qp_state = IB_QPS_ERR }; 6658d0e84c0aSYishai Hadas struct mlx5_ib_drain_cqe sdrain; 6659d34ac5cdSBart Van Assche const struct ib_send_wr *bad_swr; 6660d0e84c0aSYishai Hadas struct ib_rdma_wr swr = { 6661d0e84c0aSYishai Hadas .wr = { 6662d0e84c0aSYishai Hadas .next = NULL, 6663d0e84c0aSYishai Hadas { .wr_cqe = &sdrain.cqe, }, 6664d0e84c0aSYishai Hadas .opcode = IB_WR_RDMA_WRITE, 6665d0e84c0aSYishai Hadas }, 6666d0e84c0aSYishai Hadas }; 6667d0e84c0aSYishai Hadas int ret; 6668d0e84c0aSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(qp->device); 6669d0e84c0aSYishai Hadas struct mlx5_core_dev *mdev = dev->mdev; 6670d0e84c0aSYishai Hadas 6671d0e84c0aSYishai Hadas ret = ib_modify_qp(qp, &attr, IB_QP_STATE); 6672d0e84c0aSYishai Hadas if (ret && mdev->state != MLX5_DEVICE_STATE_INTERNAL_ERROR) { 6673d0e84c0aSYishai Hadas WARN_ONCE(ret, "failed to drain send queue: %d\n", ret); 6674d0e84c0aSYishai Hadas return; 6675d0e84c0aSYishai Hadas } 6676d0e84c0aSYishai Hadas 6677d0e84c0aSYishai Hadas sdrain.cqe.done = mlx5_ib_drain_qp_done; 6678d0e84c0aSYishai Hadas init_completion(&sdrain.done); 6679d0e84c0aSYishai Hadas 6680d0e84c0aSYishai Hadas ret = _mlx5_ib_post_send(qp, &swr.wr, &bad_swr, true); 6681d0e84c0aSYishai Hadas if (ret) { 6682d0e84c0aSYishai Hadas WARN_ONCE(ret, "failed to drain send queue: %d\n", ret); 6683d0e84c0aSYishai Hadas return; 6684d0e84c0aSYishai Hadas } 6685d0e84c0aSYishai Hadas 6686d0e84c0aSYishai Hadas handle_drain_completion(cq, &sdrain, dev); 6687d0e84c0aSYishai Hadas } 6688d0e84c0aSYishai Hadas 6689d0e84c0aSYishai Hadas void mlx5_ib_drain_rq(struct ib_qp *qp) 6690d0e84c0aSYishai Hadas { 6691d0e84c0aSYishai Hadas struct ib_cq *cq = qp->recv_cq; 6692d0e84c0aSYishai Hadas struct ib_qp_attr attr = { .qp_state = IB_QPS_ERR }; 6693d0e84c0aSYishai Hadas struct mlx5_ib_drain_cqe rdrain; 6694d34ac5cdSBart Van Assche struct ib_recv_wr rwr = {}; 6695d34ac5cdSBart Van Assche const struct ib_recv_wr *bad_rwr; 6696d0e84c0aSYishai Hadas int ret; 6697d0e84c0aSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(qp->device); 6698d0e84c0aSYishai Hadas struct mlx5_core_dev *mdev = dev->mdev; 6699d0e84c0aSYishai Hadas 6700d0e84c0aSYishai Hadas ret = ib_modify_qp(qp, &attr, IB_QP_STATE); 6701d0e84c0aSYishai Hadas if (ret && mdev->state != MLX5_DEVICE_STATE_INTERNAL_ERROR) { 6702d0e84c0aSYishai Hadas WARN_ONCE(ret, "failed to drain recv queue: %d\n", ret); 6703d0e84c0aSYishai Hadas return; 6704d0e84c0aSYishai Hadas } 6705d0e84c0aSYishai Hadas 6706d0e84c0aSYishai Hadas rwr.wr_cqe = &rdrain.cqe; 6707d0e84c0aSYishai Hadas rdrain.cqe.done = mlx5_ib_drain_qp_done; 6708d0e84c0aSYishai Hadas init_completion(&rdrain.done); 6709d0e84c0aSYishai Hadas 6710d0e84c0aSYishai Hadas ret = _mlx5_ib_post_recv(qp, &rwr, &bad_rwr, true); 6711d0e84c0aSYishai Hadas if (ret) { 6712d0e84c0aSYishai Hadas WARN_ONCE(ret, "failed to drain recv queue: %d\n", ret); 6713d0e84c0aSYishai Hadas return; 6714d0e84c0aSYishai Hadas } 6715d0e84c0aSYishai Hadas 6716d0e84c0aSYishai Hadas handle_drain_completion(cq, &rdrain, dev); 6717d0e84c0aSYishai Hadas } 6718d14133ddSMark Zhang 6719d14133ddSMark Zhang /** 6720d14133ddSMark Zhang * Bind a qp to a counter. If @counter is NULL then bind the qp to 6721d14133ddSMark Zhang * the default counter 6722d14133ddSMark Zhang */ 6723d14133ddSMark Zhang int mlx5_ib_qp_set_counter(struct ib_qp *qp, struct rdma_counter *counter) 6724d14133ddSMark Zhang { 672510189e8eSMark Zhang struct mlx5_ib_dev *dev = to_mdev(qp->device); 6726d14133ddSMark Zhang struct mlx5_ib_qp *mqp = to_mqp(qp); 6727d14133ddSMark Zhang int err = 0; 6728d14133ddSMark Zhang 6729d14133ddSMark Zhang mutex_lock(&mqp->mutex); 6730d14133ddSMark Zhang if (mqp->state == IB_QPS_RESET) { 6731d14133ddSMark Zhang qp->counter = counter; 6732d14133ddSMark Zhang goto out; 6733d14133ddSMark Zhang } 6734d14133ddSMark Zhang 673510189e8eSMark Zhang if (!MLX5_CAP_GEN(dev->mdev, rts2rts_qp_counters_set_id)) { 673610189e8eSMark Zhang err = -EOPNOTSUPP; 673710189e8eSMark Zhang goto out; 673810189e8eSMark Zhang } 673910189e8eSMark Zhang 6740d14133ddSMark Zhang if (mqp->state == IB_QPS_RTS) { 6741d14133ddSMark Zhang err = __mlx5_ib_qp_set_counter(qp, counter); 6742d14133ddSMark Zhang if (!err) 6743d14133ddSMark Zhang qp->counter = counter; 6744d14133ddSMark Zhang 6745d14133ddSMark Zhang goto out; 6746d14133ddSMark Zhang } 6747d14133ddSMark Zhang 6748d14133ddSMark Zhang mqp->counter_pending = 1; 6749d14133ddSMark Zhang qp->counter = counter; 6750d14133ddSMark Zhang 6751d14133ddSMark Zhang out: 6752d14133ddSMark Zhang mutex_unlock(&mqp->mutex); 6753d14133ddSMark Zhang return err; 6754d14133ddSMark Zhang } 6755