1e126ba97SEli Cohen /* 26cf0a15fSSaeed Mahameed * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved. 3e126ba97SEli Cohen * 4e126ba97SEli Cohen * This software is available to you under a choice of one of two 5e126ba97SEli Cohen * licenses. You may choose to be licensed under the terms of the GNU 6e126ba97SEli Cohen * General Public License (GPL) Version 2, available from the file 7e126ba97SEli Cohen * COPYING in the main directory of this source tree, or the 8e126ba97SEli Cohen * OpenIB.org BSD license below: 9e126ba97SEli Cohen * 10e126ba97SEli Cohen * Redistribution and use in source and binary forms, with or 11e126ba97SEli Cohen * without modification, are permitted provided that the following 12e126ba97SEli Cohen * conditions are met: 13e126ba97SEli Cohen * 14e126ba97SEli Cohen * - Redistributions of source code must retain the above 15e126ba97SEli Cohen * copyright notice, this list of conditions and the following 16e126ba97SEli Cohen * disclaimer. 17e126ba97SEli Cohen * 18e126ba97SEli Cohen * - Redistributions in binary form must reproduce the above 19e126ba97SEli Cohen * copyright notice, this list of conditions and the following 20e126ba97SEli Cohen * disclaimer in the documentation and/or other materials 21e126ba97SEli Cohen * provided with the distribution. 22e126ba97SEli Cohen * 23e126ba97SEli Cohen * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24e126ba97SEli Cohen * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25e126ba97SEli Cohen * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26e126ba97SEli Cohen * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27e126ba97SEli Cohen * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28e126ba97SEli Cohen * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29e126ba97SEli Cohen * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30e126ba97SEli Cohen * SOFTWARE. 31e126ba97SEli Cohen */ 32e126ba97SEli Cohen 33e126ba97SEli Cohen #include <linux/module.h> 34e126ba97SEli Cohen #include <rdma/ib_umem.h> 352811ba51SAchiad Shochat #include <rdma/ib_cache.h> 36cfb5e088SHaggai Abramovsky #include <rdma/ib_user_verbs.h> 37c2e53b2cSYishai Hadas #include <linux/mlx5/fs.h> 38e126ba97SEli Cohen #include "mlx5_ib.h" 39b96c9ddeSMark Bloch #include "ib_rep.h" 40443c1cf9SYishai Hadas #include "cmd.h" 41e126ba97SEli Cohen 42e126ba97SEli Cohen /* not supported currently */ 43e126ba97SEli Cohen static int wq_signature; 44e126ba97SEli Cohen 45e126ba97SEli Cohen enum { 46e126ba97SEli Cohen MLX5_IB_ACK_REQ_FREQ = 8, 47e126ba97SEli Cohen }; 48e126ba97SEli Cohen 49e126ba97SEli Cohen enum { 50e126ba97SEli Cohen MLX5_IB_DEFAULT_SCHED_QUEUE = 0x83, 51e126ba97SEli Cohen MLX5_IB_DEFAULT_QP0_SCHED_QUEUE = 0x3f, 52e126ba97SEli Cohen MLX5_IB_LINK_TYPE_IB = 0, 53e126ba97SEli Cohen MLX5_IB_LINK_TYPE_ETH = 1 54e126ba97SEli Cohen }; 55e126ba97SEli Cohen 56e126ba97SEli Cohen enum { 57e126ba97SEli Cohen MLX5_IB_SQ_STRIDE = 6, 58064e5262SIdan Burstein MLX5_IB_SQ_UMR_INLINE_THRESHOLD = 64, 59e126ba97SEli Cohen }; 60e126ba97SEli Cohen 61e126ba97SEli Cohen static const u32 mlx5_ib_opcode[] = { 62e126ba97SEli Cohen [IB_WR_SEND] = MLX5_OPCODE_SEND, 63f0313965SErez Shitrit [IB_WR_LSO] = MLX5_OPCODE_LSO, 64e126ba97SEli Cohen [IB_WR_SEND_WITH_IMM] = MLX5_OPCODE_SEND_IMM, 65e126ba97SEli Cohen [IB_WR_RDMA_WRITE] = MLX5_OPCODE_RDMA_WRITE, 66e126ba97SEli Cohen [IB_WR_RDMA_WRITE_WITH_IMM] = MLX5_OPCODE_RDMA_WRITE_IMM, 67e126ba97SEli Cohen [IB_WR_RDMA_READ] = MLX5_OPCODE_RDMA_READ, 68e126ba97SEli Cohen [IB_WR_ATOMIC_CMP_AND_SWP] = MLX5_OPCODE_ATOMIC_CS, 69e126ba97SEli Cohen [IB_WR_ATOMIC_FETCH_AND_ADD] = MLX5_OPCODE_ATOMIC_FA, 70e126ba97SEli Cohen [IB_WR_SEND_WITH_INV] = MLX5_OPCODE_SEND_INVAL, 71e126ba97SEli Cohen [IB_WR_LOCAL_INV] = MLX5_OPCODE_UMR, 728a187ee5SSagi Grimberg [IB_WR_REG_MR] = MLX5_OPCODE_UMR, 73e126ba97SEli Cohen [IB_WR_MASKED_ATOMIC_CMP_AND_SWP] = MLX5_OPCODE_ATOMIC_MASKED_CS, 74e126ba97SEli Cohen [IB_WR_MASKED_ATOMIC_FETCH_AND_ADD] = MLX5_OPCODE_ATOMIC_MASKED_FA, 75e126ba97SEli Cohen [MLX5_IB_WR_UMR] = MLX5_OPCODE_UMR, 76e126ba97SEli Cohen }; 77e126ba97SEli Cohen 78f0313965SErez Shitrit struct mlx5_wqe_eth_pad { 79f0313965SErez Shitrit u8 rsvd0[16]; 80f0313965SErez Shitrit }; 81e126ba97SEli Cohen 82eb49ab0cSAlex Vesker enum raw_qp_set_mask_map { 83eb49ab0cSAlex Vesker MLX5_RAW_QP_MOD_SET_RQ_Q_CTR_ID = 1UL << 0, 847d29f349SBodong Wang MLX5_RAW_QP_RATE_LIMIT = 1UL << 1, 85eb49ab0cSAlex Vesker }; 86eb49ab0cSAlex Vesker 870680efa2SAlex Vesker struct mlx5_modify_raw_qp_param { 880680efa2SAlex Vesker u16 operation; 89eb49ab0cSAlex Vesker 90eb49ab0cSAlex Vesker u32 set_mask; /* raw_qp_set_mask_map */ 9161147f39SBodong Wang 9261147f39SBodong Wang struct mlx5_rate_limit rl; 9361147f39SBodong Wang 94eb49ab0cSAlex Vesker u8 rq_q_ctr_id; 95d5ed8ac3SMark Bloch u16 port; 960680efa2SAlex Vesker }; 970680efa2SAlex Vesker 9889ea94a7SMaor Gottlieb static void get_cqs(enum ib_qp_type qp_type, 9989ea94a7SMaor Gottlieb struct ib_cq *ib_send_cq, struct ib_cq *ib_recv_cq, 10089ea94a7SMaor Gottlieb struct mlx5_ib_cq **send_cq, struct mlx5_ib_cq **recv_cq); 10189ea94a7SMaor Gottlieb 102e126ba97SEli Cohen static int is_qp0(enum ib_qp_type qp_type) 103e126ba97SEli Cohen { 104e126ba97SEli Cohen return qp_type == IB_QPT_SMI; 105e126ba97SEli Cohen } 106e126ba97SEli Cohen 107e126ba97SEli Cohen static int is_sqp(enum ib_qp_type qp_type) 108e126ba97SEli Cohen { 109e126ba97SEli Cohen return is_qp0(qp_type) || is_qp1(qp_type); 110e126ba97SEli Cohen } 111e126ba97SEli Cohen 112c1395a2aSHaggai Eran /** 113fbeb4075SMoni Shoua * mlx5_ib_read_user_wqe_common() - Copy a WQE (or part of) from user WQ 114fbeb4075SMoni Shoua * to kernel buffer 115c1395a2aSHaggai Eran * 116fbeb4075SMoni Shoua * @umem: User space memory where the WQ is 117fbeb4075SMoni Shoua * @buffer: buffer to copy to 118fbeb4075SMoni Shoua * @buflen: buffer length 119fbeb4075SMoni Shoua * @wqe_index: index of WQE to copy from 120fbeb4075SMoni Shoua * @wq_offset: offset to start of WQ 121fbeb4075SMoni Shoua * @wq_wqe_cnt: number of WQEs in WQ 122fbeb4075SMoni Shoua * @wq_wqe_shift: log2 of WQE size 123fbeb4075SMoni Shoua * @bcnt: number of bytes to copy 124fbeb4075SMoni Shoua * @bytes_copied: number of bytes to copy (return value) 125c1395a2aSHaggai Eran * 126fbeb4075SMoni Shoua * Copies from start of WQE bcnt or less bytes. 127fbeb4075SMoni Shoua * Does not gurantee to copy the entire WQE. 128c1395a2aSHaggai Eran * 129fbeb4075SMoni Shoua * Return: zero on success, or an error code. 130c1395a2aSHaggai Eran */ 131fbeb4075SMoni Shoua static int mlx5_ib_read_user_wqe_common(struct ib_umem *umem, 132fbeb4075SMoni Shoua void *buffer, 133fbeb4075SMoni Shoua u32 buflen, 134fbeb4075SMoni Shoua int wqe_index, 135fbeb4075SMoni Shoua int wq_offset, 136fbeb4075SMoni Shoua int wq_wqe_cnt, 137fbeb4075SMoni Shoua int wq_wqe_shift, 138fbeb4075SMoni Shoua int bcnt, 139fbeb4075SMoni Shoua size_t *bytes_copied) 140c1395a2aSHaggai Eran { 141fbeb4075SMoni Shoua size_t offset = wq_offset + ((wqe_index % wq_wqe_cnt) << wq_wqe_shift); 142fbeb4075SMoni Shoua size_t wq_end = wq_offset + (wq_wqe_cnt << wq_wqe_shift); 143fbeb4075SMoni Shoua size_t copy_length; 144c1395a2aSHaggai Eran int ret; 145c1395a2aSHaggai Eran 146fbeb4075SMoni Shoua /* don't copy more than requested, more than buffer length or 147fbeb4075SMoni Shoua * beyond WQ end 148fbeb4075SMoni Shoua */ 149fbeb4075SMoni Shoua copy_length = min_t(u32, buflen, wq_end - offset); 150fbeb4075SMoni Shoua copy_length = min_t(u32, copy_length, bcnt); 151c1395a2aSHaggai Eran 152fbeb4075SMoni Shoua ret = ib_umem_copy_from(buffer, umem, offset, copy_length); 153c1395a2aSHaggai Eran if (ret) 154c1395a2aSHaggai Eran return ret; 155c1395a2aSHaggai Eran 156fbeb4075SMoni Shoua if (!ret && bytes_copied) 157fbeb4075SMoni Shoua *bytes_copied = copy_length; 158c1395a2aSHaggai Eran 159fbeb4075SMoni Shoua return 0; 160fbeb4075SMoni Shoua } 161fbeb4075SMoni Shoua 162fbeb4075SMoni Shoua int mlx5_ib_read_user_wqe_sq(struct mlx5_ib_qp *qp, 163fbeb4075SMoni Shoua int wqe_index, 164fbeb4075SMoni Shoua void *buffer, 165fbeb4075SMoni Shoua int buflen, 166fbeb4075SMoni Shoua size_t *bc) 167fbeb4075SMoni Shoua { 168fbeb4075SMoni Shoua struct mlx5_ib_qp_base *base = &qp->trans_qp.base; 169fbeb4075SMoni Shoua struct ib_umem *umem = base->ubuffer.umem; 170fbeb4075SMoni Shoua struct mlx5_ib_wq *wq = &qp->sq; 171fbeb4075SMoni Shoua struct mlx5_wqe_ctrl_seg *ctrl; 172fbeb4075SMoni Shoua size_t bytes_copied; 173fbeb4075SMoni Shoua size_t bytes_copied2; 174fbeb4075SMoni Shoua size_t wqe_length; 175fbeb4075SMoni Shoua int ret; 176fbeb4075SMoni Shoua int ds; 177fbeb4075SMoni Shoua 178fbeb4075SMoni Shoua if (buflen < sizeof(*ctrl)) 179fbeb4075SMoni Shoua return -EINVAL; 180fbeb4075SMoni Shoua 181fbeb4075SMoni Shoua /* at first read as much as possible */ 182fbeb4075SMoni Shoua ret = mlx5_ib_read_user_wqe_common(umem, 183fbeb4075SMoni Shoua buffer, 184fbeb4075SMoni Shoua buflen, 185fbeb4075SMoni Shoua wqe_index, 186fbeb4075SMoni Shoua wq->offset, 187fbeb4075SMoni Shoua wq->wqe_cnt, 188fbeb4075SMoni Shoua wq->wqe_shift, 189fbeb4075SMoni Shoua buflen, 190fbeb4075SMoni Shoua &bytes_copied); 191fbeb4075SMoni Shoua if (ret) 192fbeb4075SMoni Shoua return ret; 193fbeb4075SMoni Shoua 194fbeb4075SMoni Shoua /* we need at least control segment size to proceed */ 195fbeb4075SMoni Shoua if (bytes_copied < sizeof(*ctrl)) 196fbeb4075SMoni Shoua return -EINVAL; 197fbeb4075SMoni Shoua 198fbeb4075SMoni Shoua ctrl = buffer; 199fbeb4075SMoni Shoua ds = be32_to_cpu(ctrl->qpn_ds) & MLX5_WQE_CTRL_DS_MASK; 200c1395a2aSHaggai Eran wqe_length = ds * MLX5_WQE_DS_UNITS; 201fbeb4075SMoni Shoua 202fbeb4075SMoni Shoua /* if we copied enough then we are done */ 203fbeb4075SMoni Shoua if (bytes_copied >= wqe_length) { 204fbeb4075SMoni Shoua *bc = bytes_copied; 205fbeb4075SMoni Shoua return 0; 206c1395a2aSHaggai Eran } 207c1395a2aSHaggai Eran 208fbeb4075SMoni Shoua /* otherwise this a wrapped around wqe 209fbeb4075SMoni Shoua * so read the remaining bytes starting 210fbeb4075SMoni Shoua * from wqe_index 0 211fbeb4075SMoni Shoua */ 212fbeb4075SMoni Shoua ret = mlx5_ib_read_user_wqe_common(umem, 213fbeb4075SMoni Shoua buffer + bytes_copied, 214fbeb4075SMoni Shoua buflen - bytes_copied, 215fbeb4075SMoni Shoua 0, 216fbeb4075SMoni Shoua wq->offset, 217fbeb4075SMoni Shoua wq->wqe_cnt, 218fbeb4075SMoni Shoua wq->wqe_shift, 219fbeb4075SMoni Shoua wqe_length - bytes_copied, 220fbeb4075SMoni Shoua &bytes_copied2); 221c1395a2aSHaggai Eran 222c1395a2aSHaggai Eran if (ret) 223c1395a2aSHaggai Eran return ret; 224fbeb4075SMoni Shoua *bc = bytes_copied + bytes_copied2; 225fbeb4075SMoni Shoua return 0; 226fbeb4075SMoni Shoua } 227c1395a2aSHaggai Eran 228fbeb4075SMoni Shoua int mlx5_ib_read_user_wqe_rq(struct mlx5_ib_qp *qp, 229fbeb4075SMoni Shoua int wqe_index, 230fbeb4075SMoni Shoua void *buffer, 231fbeb4075SMoni Shoua int buflen, 232fbeb4075SMoni Shoua size_t *bc) 233fbeb4075SMoni Shoua { 234fbeb4075SMoni Shoua struct mlx5_ib_qp_base *base = &qp->trans_qp.base; 235fbeb4075SMoni Shoua struct ib_umem *umem = base->ubuffer.umem; 236fbeb4075SMoni Shoua struct mlx5_ib_wq *wq = &qp->rq; 237fbeb4075SMoni Shoua size_t bytes_copied; 238fbeb4075SMoni Shoua int ret; 239fbeb4075SMoni Shoua 240fbeb4075SMoni Shoua ret = mlx5_ib_read_user_wqe_common(umem, 241fbeb4075SMoni Shoua buffer, 242fbeb4075SMoni Shoua buflen, 243fbeb4075SMoni Shoua wqe_index, 244fbeb4075SMoni Shoua wq->offset, 245fbeb4075SMoni Shoua wq->wqe_cnt, 246fbeb4075SMoni Shoua wq->wqe_shift, 247fbeb4075SMoni Shoua buflen, 248fbeb4075SMoni Shoua &bytes_copied); 249fbeb4075SMoni Shoua 250fbeb4075SMoni Shoua if (ret) 251fbeb4075SMoni Shoua return ret; 252fbeb4075SMoni Shoua *bc = bytes_copied; 253fbeb4075SMoni Shoua return 0; 254fbeb4075SMoni Shoua } 255fbeb4075SMoni Shoua 256fbeb4075SMoni Shoua int mlx5_ib_read_user_wqe_srq(struct mlx5_ib_srq *srq, 257fbeb4075SMoni Shoua int wqe_index, 258fbeb4075SMoni Shoua void *buffer, 259fbeb4075SMoni Shoua int buflen, 260fbeb4075SMoni Shoua size_t *bc) 261fbeb4075SMoni Shoua { 262fbeb4075SMoni Shoua struct ib_umem *umem = srq->umem; 263fbeb4075SMoni Shoua size_t bytes_copied; 264fbeb4075SMoni Shoua int ret; 265fbeb4075SMoni Shoua 266fbeb4075SMoni Shoua ret = mlx5_ib_read_user_wqe_common(umem, 267fbeb4075SMoni Shoua buffer, 268fbeb4075SMoni Shoua buflen, 269fbeb4075SMoni Shoua wqe_index, 270fbeb4075SMoni Shoua 0, 271fbeb4075SMoni Shoua srq->msrq.max, 272fbeb4075SMoni Shoua srq->msrq.wqe_shift, 273fbeb4075SMoni Shoua buflen, 274fbeb4075SMoni Shoua &bytes_copied); 275fbeb4075SMoni Shoua 276fbeb4075SMoni Shoua if (ret) 277fbeb4075SMoni Shoua return ret; 278fbeb4075SMoni Shoua *bc = bytes_copied; 279fbeb4075SMoni Shoua return 0; 280c1395a2aSHaggai Eran } 281c1395a2aSHaggai Eran 282e126ba97SEli Cohen static void mlx5_ib_qp_event(struct mlx5_core_qp *qp, int type) 283e126ba97SEli Cohen { 284e126ba97SEli Cohen struct ib_qp *ibqp = &to_mibqp(qp)->ibqp; 285e126ba97SEli Cohen struct ib_event event; 286e126ba97SEli Cohen 28719098df2Smajd@mellanox.com if (type == MLX5_EVENT_TYPE_PATH_MIG) { 28819098df2Smajd@mellanox.com /* This event is only valid for trans_qps */ 28919098df2Smajd@mellanox.com to_mibqp(qp)->port = to_mibqp(qp)->trans_qp.alt_port; 29019098df2Smajd@mellanox.com } 291e126ba97SEli Cohen 292e126ba97SEli Cohen if (ibqp->event_handler) { 293e126ba97SEli Cohen event.device = ibqp->device; 294e126ba97SEli Cohen event.element.qp = ibqp; 295e126ba97SEli Cohen switch (type) { 296e126ba97SEli Cohen case MLX5_EVENT_TYPE_PATH_MIG: 297e126ba97SEli Cohen event.event = IB_EVENT_PATH_MIG; 298e126ba97SEli Cohen break; 299e126ba97SEli Cohen case MLX5_EVENT_TYPE_COMM_EST: 300e126ba97SEli Cohen event.event = IB_EVENT_COMM_EST; 301e126ba97SEli Cohen break; 302e126ba97SEli Cohen case MLX5_EVENT_TYPE_SQ_DRAINED: 303e126ba97SEli Cohen event.event = IB_EVENT_SQ_DRAINED; 304e126ba97SEli Cohen break; 305e126ba97SEli Cohen case MLX5_EVENT_TYPE_SRQ_LAST_WQE: 306e126ba97SEli Cohen event.event = IB_EVENT_QP_LAST_WQE_REACHED; 307e126ba97SEli Cohen break; 308e126ba97SEli Cohen case MLX5_EVENT_TYPE_WQ_CATAS_ERROR: 309e126ba97SEli Cohen event.event = IB_EVENT_QP_FATAL; 310e126ba97SEli Cohen break; 311e126ba97SEli Cohen case MLX5_EVENT_TYPE_PATH_MIG_FAILED: 312e126ba97SEli Cohen event.event = IB_EVENT_PATH_MIG_ERR; 313e126ba97SEli Cohen break; 314e126ba97SEli Cohen case MLX5_EVENT_TYPE_WQ_INVAL_REQ_ERROR: 315e126ba97SEli Cohen event.event = IB_EVENT_QP_REQ_ERR; 316e126ba97SEli Cohen break; 317e126ba97SEli Cohen case MLX5_EVENT_TYPE_WQ_ACCESS_ERROR: 318e126ba97SEli Cohen event.event = IB_EVENT_QP_ACCESS_ERR; 319e126ba97SEli Cohen break; 320e126ba97SEli Cohen default: 321e126ba97SEli Cohen pr_warn("mlx5_ib: Unexpected event type %d on QP %06x\n", type, qp->qpn); 322e126ba97SEli Cohen return; 323e126ba97SEli Cohen } 324e126ba97SEli Cohen 325e126ba97SEli Cohen ibqp->event_handler(&event, ibqp->qp_context); 326e126ba97SEli Cohen } 327e126ba97SEli Cohen } 328e126ba97SEli Cohen 329e126ba97SEli Cohen static int set_rq_size(struct mlx5_ib_dev *dev, struct ib_qp_cap *cap, 330e126ba97SEli Cohen int has_rq, struct mlx5_ib_qp *qp, struct mlx5_ib_create_qp *ucmd) 331e126ba97SEli Cohen { 332e126ba97SEli Cohen int wqe_size; 333e126ba97SEli Cohen int wq_size; 334e126ba97SEli Cohen 335e126ba97SEli Cohen /* Sanity check RQ size before proceeding */ 336938fe83cSSaeed Mahameed if (cap->max_recv_wr > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz))) 337e126ba97SEli Cohen return -EINVAL; 338e126ba97SEli Cohen 339e126ba97SEli Cohen if (!has_rq) { 340e126ba97SEli Cohen qp->rq.max_gs = 0; 341e126ba97SEli Cohen qp->rq.wqe_cnt = 0; 342e126ba97SEli Cohen qp->rq.wqe_shift = 0; 3430540d814SNoa Osherovich cap->max_recv_wr = 0; 3440540d814SNoa Osherovich cap->max_recv_sge = 0; 345e126ba97SEli Cohen } else { 346e126ba97SEli Cohen if (ucmd) { 347e126ba97SEli Cohen qp->rq.wqe_cnt = ucmd->rq_wqe_count; 348002bf228SLeon Romanovsky if (ucmd->rq_wqe_shift > BITS_PER_BYTE * sizeof(ucmd->rq_wqe_shift)) 349002bf228SLeon Romanovsky return -EINVAL; 350e126ba97SEli Cohen qp->rq.wqe_shift = ucmd->rq_wqe_shift; 351002bf228SLeon Romanovsky if ((1 << qp->rq.wqe_shift) / sizeof(struct mlx5_wqe_data_seg) < qp->wq_sig) 352002bf228SLeon Romanovsky return -EINVAL; 353e126ba97SEli Cohen qp->rq.max_gs = (1 << qp->rq.wqe_shift) / sizeof(struct mlx5_wqe_data_seg) - qp->wq_sig; 354e126ba97SEli Cohen qp->rq.max_post = qp->rq.wqe_cnt; 355e126ba97SEli Cohen } else { 356e126ba97SEli Cohen wqe_size = qp->wq_sig ? sizeof(struct mlx5_wqe_signature_seg) : 0; 357e126ba97SEli Cohen wqe_size += cap->max_recv_sge * sizeof(struct mlx5_wqe_data_seg); 358e126ba97SEli Cohen wqe_size = roundup_pow_of_two(wqe_size); 359e126ba97SEli Cohen wq_size = roundup_pow_of_two(cap->max_recv_wr) * wqe_size; 360e126ba97SEli Cohen wq_size = max_t(int, wq_size, MLX5_SEND_WQE_BB); 361e126ba97SEli Cohen qp->rq.wqe_cnt = wq_size / wqe_size; 362938fe83cSSaeed Mahameed if (wqe_size > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_rq)) { 363e126ba97SEli Cohen mlx5_ib_dbg(dev, "wqe_size %d, max %d\n", 364e126ba97SEli Cohen wqe_size, 365938fe83cSSaeed Mahameed MLX5_CAP_GEN(dev->mdev, 366938fe83cSSaeed Mahameed max_wqe_sz_rq)); 367e126ba97SEli Cohen return -EINVAL; 368e126ba97SEli Cohen } 369e126ba97SEli Cohen qp->rq.wqe_shift = ilog2(wqe_size); 370e126ba97SEli Cohen qp->rq.max_gs = (1 << qp->rq.wqe_shift) / sizeof(struct mlx5_wqe_data_seg) - qp->wq_sig; 371e126ba97SEli Cohen qp->rq.max_post = qp->rq.wqe_cnt; 372e126ba97SEli Cohen } 373e126ba97SEli Cohen } 374e126ba97SEli Cohen 375e126ba97SEli Cohen return 0; 376e126ba97SEli Cohen } 377e126ba97SEli Cohen 378f0313965SErez Shitrit static int sq_overhead(struct ib_qp_init_attr *attr) 379e126ba97SEli Cohen { 380618af384SAndi Shyti int size = 0; 381e126ba97SEli Cohen 382f0313965SErez Shitrit switch (attr->qp_type) { 383e126ba97SEli Cohen case IB_QPT_XRC_INI: 384b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_xrc_seg); 385e126ba97SEli Cohen /* fall through */ 386e126ba97SEli Cohen case IB_QPT_RC: 387e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 38875c1657eSLeon Romanovsky max(sizeof(struct mlx5_wqe_atomic_seg) + 38975c1657eSLeon Romanovsky sizeof(struct mlx5_wqe_raddr_seg), 39075c1657eSLeon Romanovsky sizeof(struct mlx5_wqe_umr_ctrl_seg) + 391064e5262SIdan Burstein sizeof(struct mlx5_mkey_seg) + 392064e5262SIdan Burstein MLX5_IB_SQ_UMR_INLINE_THRESHOLD / 393064e5262SIdan Burstein MLX5_IB_UMR_OCTOWORD); 394e126ba97SEli Cohen break; 395e126ba97SEli Cohen 396b125a54bSEli Cohen case IB_QPT_XRC_TGT: 397b125a54bSEli Cohen return 0; 398b125a54bSEli Cohen 399e126ba97SEli Cohen case IB_QPT_UC: 400b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 40175c1657eSLeon Romanovsky max(sizeof(struct mlx5_wqe_raddr_seg), 4029e65dc37SEli Cohen sizeof(struct mlx5_wqe_umr_ctrl_seg) + 40375c1657eSLeon Romanovsky sizeof(struct mlx5_mkey_seg)); 404e126ba97SEli Cohen break; 405e126ba97SEli Cohen 406e126ba97SEli Cohen case IB_QPT_UD: 407f0313965SErez Shitrit if (attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO) 408f0313965SErez Shitrit size += sizeof(struct mlx5_wqe_eth_pad) + 409f0313965SErez Shitrit sizeof(struct mlx5_wqe_eth_seg); 410f0313965SErez Shitrit /* fall through */ 411e126ba97SEli Cohen case IB_QPT_SMI: 412d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: 413b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 414e126ba97SEli Cohen sizeof(struct mlx5_wqe_datagram_seg); 415e126ba97SEli Cohen break; 416e126ba97SEli Cohen 417e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 418b125a54bSEli Cohen size += sizeof(struct mlx5_wqe_ctrl_seg) + 419e126ba97SEli Cohen sizeof(struct mlx5_wqe_umr_ctrl_seg) + 420e126ba97SEli Cohen sizeof(struct mlx5_mkey_seg); 421e126ba97SEli Cohen break; 422e126ba97SEli Cohen 423e126ba97SEli Cohen default: 424e126ba97SEli Cohen return -EINVAL; 425e126ba97SEli Cohen } 426e126ba97SEli Cohen 427e126ba97SEli Cohen return size; 428e126ba97SEli Cohen } 429e126ba97SEli Cohen 430e126ba97SEli Cohen static int calc_send_wqe(struct ib_qp_init_attr *attr) 431e126ba97SEli Cohen { 432e126ba97SEli Cohen int inl_size = 0; 433e126ba97SEli Cohen int size; 434e126ba97SEli Cohen 435f0313965SErez Shitrit size = sq_overhead(attr); 436e126ba97SEli Cohen if (size < 0) 437e126ba97SEli Cohen return size; 438e126ba97SEli Cohen 439e126ba97SEli Cohen if (attr->cap.max_inline_data) { 440e126ba97SEli Cohen inl_size = size + sizeof(struct mlx5_wqe_inline_seg) + 441e126ba97SEli Cohen attr->cap.max_inline_data; 442e126ba97SEli Cohen } 443e126ba97SEli Cohen 444e126ba97SEli Cohen size += attr->cap.max_send_sge * sizeof(struct mlx5_wqe_data_seg); 445c0a6cbb9SIsrael Rukshin if (attr->create_flags & IB_QP_CREATE_INTEGRITY_EN && 446e1e66cc2SSagi Grimberg ALIGN(max_t(int, inl_size, size), MLX5_SEND_WQE_BB) < MLX5_SIG_WQE_SIZE) 447e1e66cc2SSagi Grimberg return MLX5_SIG_WQE_SIZE; 448e1e66cc2SSagi Grimberg else 449e126ba97SEli Cohen return ALIGN(max_t(int, inl_size, size), MLX5_SEND_WQE_BB); 450e126ba97SEli Cohen } 451e126ba97SEli Cohen 452288c01b7SEli Cohen static int get_send_sge(struct ib_qp_init_attr *attr, int wqe_size) 453288c01b7SEli Cohen { 454288c01b7SEli Cohen int max_sge; 455288c01b7SEli Cohen 456288c01b7SEli Cohen if (attr->qp_type == IB_QPT_RC) 457288c01b7SEli Cohen max_sge = (min_t(int, wqe_size, 512) - 458288c01b7SEli Cohen sizeof(struct mlx5_wqe_ctrl_seg) - 459288c01b7SEli Cohen sizeof(struct mlx5_wqe_raddr_seg)) / 460288c01b7SEli Cohen sizeof(struct mlx5_wqe_data_seg); 461288c01b7SEli Cohen else if (attr->qp_type == IB_QPT_XRC_INI) 462288c01b7SEli Cohen max_sge = (min_t(int, wqe_size, 512) - 463288c01b7SEli Cohen sizeof(struct mlx5_wqe_ctrl_seg) - 464288c01b7SEli Cohen sizeof(struct mlx5_wqe_xrc_seg) - 465288c01b7SEli Cohen sizeof(struct mlx5_wqe_raddr_seg)) / 466288c01b7SEli Cohen sizeof(struct mlx5_wqe_data_seg); 467288c01b7SEli Cohen else 468288c01b7SEli Cohen max_sge = (wqe_size - sq_overhead(attr)) / 469288c01b7SEli Cohen sizeof(struct mlx5_wqe_data_seg); 470288c01b7SEli Cohen 471288c01b7SEli Cohen return min_t(int, max_sge, wqe_size - sq_overhead(attr) / 472288c01b7SEli Cohen sizeof(struct mlx5_wqe_data_seg)); 473288c01b7SEli Cohen } 474288c01b7SEli Cohen 475e126ba97SEli Cohen static int calc_sq_size(struct mlx5_ib_dev *dev, struct ib_qp_init_attr *attr, 476e126ba97SEli Cohen struct mlx5_ib_qp *qp) 477e126ba97SEli Cohen { 478e126ba97SEli Cohen int wqe_size; 479e126ba97SEli Cohen int wq_size; 480e126ba97SEli Cohen 481e126ba97SEli Cohen if (!attr->cap.max_send_wr) 482e126ba97SEli Cohen return 0; 483e126ba97SEli Cohen 484e126ba97SEli Cohen wqe_size = calc_send_wqe(attr); 485e126ba97SEli Cohen mlx5_ib_dbg(dev, "wqe_size %d\n", wqe_size); 486e126ba97SEli Cohen if (wqe_size < 0) 487e126ba97SEli Cohen return wqe_size; 488e126ba97SEli Cohen 489938fe83cSSaeed Mahameed if (wqe_size > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)) { 490b125a54bSEli Cohen mlx5_ib_dbg(dev, "wqe_size(%d) > max_sq_desc_sz(%d)\n", 491938fe83cSSaeed Mahameed wqe_size, MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)); 492e126ba97SEli Cohen return -EINVAL; 493e126ba97SEli Cohen } 494e126ba97SEli Cohen 495f0313965SErez Shitrit qp->max_inline_data = wqe_size - sq_overhead(attr) - 496e126ba97SEli Cohen sizeof(struct mlx5_wqe_inline_seg); 497e126ba97SEli Cohen attr->cap.max_inline_data = qp->max_inline_data; 498e126ba97SEli Cohen 499e126ba97SEli Cohen wq_size = roundup_pow_of_two(attr->cap.max_send_wr * wqe_size); 500e126ba97SEli Cohen qp->sq.wqe_cnt = wq_size / MLX5_SEND_WQE_BB; 501938fe83cSSaeed Mahameed if (qp->sq.wqe_cnt > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz))) { 5021974ab9dSBart Van Assche mlx5_ib_dbg(dev, "send queue size (%d * %d / %d -> %d) exceeds limits(%d)\n", 5031974ab9dSBart Van Assche attr->cap.max_send_wr, wqe_size, MLX5_SEND_WQE_BB, 504938fe83cSSaeed Mahameed qp->sq.wqe_cnt, 505938fe83cSSaeed Mahameed 1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz)); 506b125a54bSEli Cohen return -ENOMEM; 507b125a54bSEli Cohen } 508e126ba97SEli Cohen qp->sq.wqe_shift = ilog2(MLX5_SEND_WQE_BB); 509288c01b7SEli Cohen qp->sq.max_gs = get_send_sge(attr, wqe_size); 510288c01b7SEli Cohen if (qp->sq.max_gs < attr->cap.max_send_sge) 511288c01b7SEli Cohen return -ENOMEM; 512288c01b7SEli Cohen 513288c01b7SEli Cohen attr->cap.max_send_sge = qp->sq.max_gs; 514b125a54bSEli Cohen qp->sq.max_post = wq_size / wqe_size; 515b125a54bSEli Cohen attr->cap.max_send_wr = qp->sq.max_post; 516e126ba97SEli Cohen 517e126ba97SEli Cohen return wq_size; 518e126ba97SEli Cohen } 519e126ba97SEli Cohen 520e126ba97SEli Cohen static int set_user_buf_size(struct mlx5_ib_dev *dev, 521e126ba97SEli Cohen struct mlx5_ib_qp *qp, 52219098df2Smajd@mellanox.com struct mlx5_ib_create_qp *ucmd, 5230fb2ed66Smajd@mellanox.com struct mlx5_ib_qp_base *base, 5240fb2ed66Smajd@mellanox.com struct ib_qp_init_attr *attr) 525e126ba97SEli Cohen { 526e126ba97SEli Cohen int desc_sz = 1 << qp->sq.wqe_shift; 527e126ba97SEli Cohen 528938fe83cSSaeed Mahameed if (desc_sz > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)) { 529e126ba97SEli Cohen mlx5_ib_warn(dev, "desc_sz %d, max_sq_desc_sz %d\n", 530938fe83cSSaeed Mahameed desc_sz, MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)); 531e126ba97SEli Cohen return -EINVAL; 532e126ba97SEli Cohen } 533e126ba97SEli Cohen 534af8b38edSGal Pressman if (ucmd->sq_wqe_count && !is_power_of_2(ucmd->sq_wqe_count)) { 535af8b38edSGal Pressman mlx5_ib_warn(dev, "sq_wqe_count %d is not a power of two\n", 536af8b38edSGal Pressman ucmd->sq_wqe_count); 537e126ba97SEli Cohen return -EINVAL; 538e126ba97SEli Cohen } 539e126ba97SEli Cohen 540e126ba97SEli Cohen qp->sq.wqe_cnt = ucmd->sq_wqe_count; 541e126ba97SEli Cohen 542938fe83cSSaeed Mahameed if (qp->sq.wqe_cnt > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz))) { 543e126ba97SEli Cohen mlx5_ib_warn(dev, "wqe_cnt %d, max_wqes %d\n", 544938fe83cSSaeed Mahameed qp->sq.wqe_cnt, 545938fe83cSSaeed Mahameed 1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz)); 546e126ba97SEli Cohen return -EINVAL; 547e126ba97SEli Cohen } 548e126ba97SEli Cohen 549c2e53b2cSYishai Hadas if (attr->qp_type == IB_QPT_RAW_PACKET || 550c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 5510fb2ed66Smajd@mellanox.com base->ubuffer.buf_size = qp->rq.wqe_cnt << qp->rq.wqe_shift; 5520fb2ed66Smajd@mellanox.com qp->raw_packet_qp.sq.ubuffer.buf_size = qp->sq.wqe_cnt << 6; 5530fb2ed66Smajd@mellanox.com } else { 55419098df2Smajd@mellanox.com base->ubuffer.buf_size = (qp->rq.wqe_cnt << qp->rq.wqe_shift) + 555e126ba97SEli Cohen (qp->sq.wqe_cnt << 6); 5560fb2ed66Smajd@mellanox.com } 557e126ba97SEli Cohen 558e126ba97SEli Cohen return 0; 559e126ba97SEli Cohen } 560e126ba97SEli Cohen 561e126ba97SEli Cohen static int qp_has_rq(struct ib_qp_init_attr *attr) 562e126ba97SEli Cohen { 563e126ba97SEli Cohen if (attr->qp_type == IB_QPT_XRC_INI || 564e126ba97SEli Cohen attr->qp_type == IB_QPT_XRC_TGT || attr->srq || 565e126ba97SEli Cohen attr->qp_type == MLX5_IB_QPT_REG_UMR || 566e126ba97SEli Cohen !attr->cap.max_recv_wr) 567e126ba97SEli Cohen return 0; 568e126ba97SEli Cohen 569e126ba97SEli Cohen return 1; 570e126ba97SEli Cohen } 571e126ba97SEli Cohen 5720b80c14fSEli Cohen enum { 5730b80c14fSEli Cohen /* this is the first blue flame register in the array of bfregs assigned 5740b80c14fSEli Cohen * to a processes. Since we do not use it for blue flame but rather 5750b80c14fSEli Cohen * regular 64 bit doorbells, we do not need a lock for maintaiing 5760b80c14fSEli Cohen * "odd/even" order 5770b80c14fSEli Cohen */ 5780b80c14fSEli Cohen NUM_NON_BLUE_FLAME_BFREGS = 1, 5790b80c14fSEli Cohen }; 5800b80c14fSEli Cohen 581b037c29aSEli Cohen static int max_bfregs(struct mlx5_ib_dev *dev, struct mlx5_bfreg_info *bfregi) 582b037c29aSEli Cohen { 58331a78a5aSYishai Hadas return get_num_static_uars(dev, bfregi) * MLX5_NON_FP_BFREGS_PER_UAR; 584b037c29aSEli Cohen } 585b037c29aSEli Cohen 586b037c29aSEli Cohen static int num_med_bfreg(struct mlx5_ib_dev *dev, 587b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi) 588c1be5232SEli Cohen { 589c1be5232SEli Cohen int n; 590c1be5232SEli Cohen 591b037c29aSEli Cohen n = max_bfregs(dev, bfregi) - bfregi->num_low_latency_bfregs - 592b037c29aSEli Cohen NUM_NON_BLUE_FLAME_BFREGS; 593c1be5232SEli Cohen 594c1be5232SEli Cohen return n >= 0 ? n : 0; 595c1be5232SEli Cohen } 596c1be5232SEli Cohen 59718b0362eSYishai Hadas static int first_med_bfreg(struct mlx5_ib_dev *dev, 59818b0362eSYishai Hadas struct mlx5_bfreg_info *bfregi) 59918b0362eSYishai Hadas { 60018b0362eSYishai Hadas return num_med_bfreg(dev, bfregi) ? 1 : -ENOMEM; 60118b0362eSYishai Hadas } 60218b0362eSYishai Hadas 603b037c29aSEli Cohen static int first_hi_bfreg(struct mlx5_ib_dev *dev, 604b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi) 605c1be5232SEli Cohen { 606c1be5232SEli Cohen int med; 607c1be5232SEli Cohen 608b037c29aSEli Cohen med = num_med_bfreg(dev, bfregi); 609b037c29aSEli Cohen return ++med; 610c1be5232SEli Cohen } 611c1be5232SEli Cohen 612b037c29aSEli Cohen static int alloc_high_class_bfreg(struct mlx5_ib_dev *dev, 613b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi) 614e126ba97SEli Cohen { 615e126ba97SEli Cohen int i; 616e126ba97SEli Cohen 617b037c29aSEli Cohen for (i = first_hi_bfreg(dev, bfregi); i < max_bfregs(dev, bfregi); i++) { 618b037c29aSEli Cohen if (!bfregi->count[i]) { 6192f5ff264SEli Cohen bfregi->count[i]++; 620e126ba97SEli Cohen return i; 621e126ba97SEli Cohen } 622e126ba97SEli Cohen } 623e126ba97SEli Cohen 624e126ba97SEli Cohen return -ENOMEM; 625e126ba97SEli Cohen } 626e126ba97SEli Cohen 627b037c29aSEli Cohen static int alloc_med_class_bfreg(struct mlx5_ib_dev *dev, 628b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi) 629e126ba97SEli Cohen { 63018b0362eSYishai Hadas int minidx = first_med_bfreg(dev, bfregi); 631e126ba97SEli Cohen int i; 632e126ba97SEli Cohen 63318b0362eSYishai Hadas if (minidx < 0) 63418b0362eSYishai Hadas return minidx; 63518b0362eSYishai Hadas 63618b0362eSYishai Hadas for (i = minidx; i < first_hi_bfreg(dev, bfregi); i++) { 6372f5ff264SEli Cohen if (bfregi->count[i] < bfregi->count[minidx]) 638e126ba97SEli Cohen minidx = i; 6390b80c14fSEli Cohen if (!bfregi->count[minidx]) 6400b80c14fSEli Cohen break; 641e126ba97SEli Cohen } 642e126ba97SEli Cohen 6432f5ff264SEli Cohen bfregi->count[minidx]++; 644e126ba97SEli Cohen return minidx; 645e126ba97SEli Cohen } 646e126ba97SEli Cohen 647b037c29aSEli Cohen static int alloc_bfreg(struct mlx5_ib_dev *dev, 648ffaf58deSLeon Romanovsky struct mlx5_bfreg_info *bfregi) 649e126ba97SEli Cohen { 650ffaf58deSLeon Romanovsky int bfregn = -ENOMEM; 651e126ba97SEli Cohen 6522f5ff264SEli Cohen mutex_lock(&bfregi->lock); 653ffaf58deSLeon Romanovsky if (bfregi->ver >= 2) { 654ffaf58deSLeon Romanovsky bfregn = alloc_high_class_bfreg(dev, bfregi); 655ffaf58deSLeon Romanovsky if (bfregn < 0) 656ffaf58deSLeon Romanovsky bfregn = alloc_med_class_bfreg(dev, bfregi); 657ffaf58deSLeon Romanovsky } 658ffaf58deSLeon Romanovsky 659ffaf58deSLeon Romanovsky if (bfregn < 0) { 6600b80c14fSEli Cohen BUILD_BUG_ON(NUM_NON_BLUE_FLAME_BFREGS != 1); 6612f5ff264SEli Cohen bfregn = 0; 6622f5ff264SEli Cohen bfregi->count[bfregn]++; 663e126ba97SEli Cohen } 6642f5ff264SEli Cohen mutex_unlock(&bfregi->lock); 665e126ba97SEli Cohen 6662f5ff264SEli Cohen return bfregn; 667e126ba97SEli Cohen } 668e126ba97SEli Cohen 6694ed131d0SYishai Hadas void mlx5_ib_free_bfreg(struct mlx5_ib_dev *dev, struct mlx5_bfreg_info *bfregi, int bfregn) 670e126ba97SEli Cohen { 6712f5ff264SEli Cohen mutex_lock(&bfregi->lock); 672b037c29aSEli Cohen bfregi->count[bfregn]--; 6732f5ff264SEli Cohen mutex_unlock(&bfregi->lock); 674e126ba97SEli Cohen } 675e126ba97SEli Cohen 676e126ba97SEli Cohen static enum mlx5_qp_state to_mlx5_state(enum ib_qp_state state) 677e126ba97SEli Cohen { 678e126ba97SEli Cohen switch (state) { 679e126ba97SEli Cohen case IB_QPS_RESET: return MLX5_QP_STATE_RST; 680e126ba97SEli Cohen case IB_QPS_INIT: return MLX5_QP_STATE_INIT; 681e126ba97SEli Cohen case IB_QPS_RTR: return MLX5_QP_STATE_RTR; 682e126ba97SEli Cohen case IB_QPS_RTS: return MLX5_QP_STATE_RTS; 683e126ba97SEli Cohen case IB_QPS_SQD: return MLX5_QP_STATE_SQD; 684e126ba97SEli Cohen case IB_QPS_SQE: return MLX5_QP_STATE_SQER; 685e126ba97SEli Cohen case IB_QPS_ERR: return MLX5_QP_STATE_ERR; 686e126ba97SEli Cohen default: return -1; 687e126ba97SEli Cohen } 688e126ba97SEli Cohen } 689e126ba97SEli Cohen 690e126ba97SEli Cohen static int to_mlx5_st(enum ib_qp_type type) 691e126ba97SEli Cohen { 692e126ba97SEli Cohen switch (type) { 693e126ba97SEli Cohen case IB_QPT_RC: return MLX5_QP_ST_RC; 694e126ba97SEli Cohen case IB_QPT_UC: return MLX5_QP_ST_UC; 695e126ba97SEli Cohen case IB_QPT_UD: return MLX5_QP_ST_UD; 696e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: return MLX5_QP_ST_REG_UMR; 697e126ba97SEli Cohen case IB_QPT_XRC_INI: 698e126ba97SEli Cohen case IB_QPT_XRC_TGT: return MLX5_QP_ST_XRC; 699e126ba97SEli Cohen case IB_QPT_SMI: return MLX5_QP_ST_QP0; 700d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: return MLX5_QP_ST_QP1; 701c32a4f29SMoni Shoua case MLX5_IB_QPT_DCI: return MLX5_QP_ST_DCI; 702e126ba97SEli Cohen case IB_QPT_RAW_IPV6: return MLX5_QP_ST_RAW_IPV6; 703e126ba97SEli Cohen case IB_QPT_RAW_PACKET: 7040fb2ed66Smajd@mellanox.com case IB_QPT_RAW_ETHERTYPE: return MLX5_QP_ST_RAW_ETHERTYPE; 705e126ba97SEli Cohen case IB_QPT_MAX: 706e126ba97SEli Cohen default: return -EINVAL; 707e126ba97SEli Cohen } 708e126ba97SEli Cohen } 709e126ba97SEli Cohen 71089ea94a7SMaor Gottlieb static void mlx5_ib_lock_cqs(struct mlx5_ib_cq *send_cq, 71189ea94a7SMaor Gottlieb struct mlx5_ib_cq *recv_cq); 71289ea94a7SMaor Gottlieb static void mlx5_ib_unlock_cqs(struct mlx5_ib_cq *send_cq, 71389ea94a7SMaor Gottlieb struct mlx5_ib_cq *recv_cq); 71489ea94a7SMaor Gottlieb 7157c043e90SYishai Hadas int bfregn_to_uar_index(struct mlx5_ib_dev *dev, 71605f58cebSLeon Romanovsky struct mlx5_bfreg_info *bfregi, u32 bfregn, 7171ee47ab3SYishai Hadas bool dyn_bfreg) 718e126ba97SEli Cohen { 71905f58cebSLeon Romanovsky unsigned int bfregs_per_sys_page; 72005f58cebSLeon Romanovsky u32 index_of_sys_page; 72105f58cebSLeon Romanovsky u32 offset; 722b037c29aSEli Cohen 723b037c29aSEli Cohen bfregs_per_sys_page = get_uars_per_sys_page(dev, bfregi->lib_uar_4k) * 724b037c29aSEli Cohen MLX5_NON_FP_BFREGS_PER_UAR; 725b037c29aSEli Cohen index_of_sys_page = bfregn / bfregs_per_sys_page; 726b037c29aSEli Cohen 72705f58cebSLeon Romanovsky if (dyn_bfreg) { 72805f58cebSLeon Romanovsky index_of_sys_page += bfregi->num_static_sys_pages; 72905f58cebSLeon Romanovsky 7307c043e90SYishai Hadas if (index_of_sys_page >= bfregi->num_sys_pages) 7317c043e90SYishai Hadas return -EINVAL; 7327c043e90SYishai Hadas 7331ee47ab3SYishai Hadas if (bfregn > bfregi->num_dyn_bfregs || 7341ee47ab3SYishai Hadas bfregi->sys_pages[index_of_sys_page] == MLX5_IB_INVALID_UAR_INDEX) { 7351ee47ab3SYishai Hadas mlx5_ib_dbg(dev, "Invalid dynamic uar index\n"); 7361ee47ab3SYishai Hadas return -EINVAL; 7371ee47ab3SYishai Hadas } 7381ee47ab3SYishai Hadas } 739b037c29aSEli Cohen 7401ee47ab3SYishai Hadas offset = bfregn % bfregs_per_sys_page / MLX5_NON_FP_BFREGS_PER_UAR; 741b037c29aSEli Cohen return bfregi->sys_pages[index_of_sys_page] + offset; 742e126ba97SEli Cohen } 743e126ba97SEli Cohen 744b0ea0fa5SJason Gunthorpe static int mlx5_ib_umem_get(struct mlx5_ib_dev *dev, struct ib_udata *udata, 74519098df2Smajd@mellanox.com unsigned long addr, size_t size, 746b0ea0fa5SJason Gunthorpe struct ib_umem **umem, int *npages, int *page_shift, 747b0ea0fa5SJason Gunthorpe int *ncont, u32 *offset) 74819098df2Smajd@mellanox.com { 74919098df2Smajd@mellanox.com int err; 75019098df2Smajd@mellanox.com 751b0ea0fa5SJason Gunthorpe *umem = ib_umem_get(udata, addr, size, 0, 0); 75219098df2Smajd@mellanox.com if (IS_ERR(*umem)) { 75319098df2Smajd@mellanox.com mlx5_ib_dbg(dev, "umem_get failed\n"); 75419098df2Smajd@mellanox.com return PTR_ERR(*umem); 75519098df2Smajd@mellanox.com } 75619098df2Smajd@mellanox.com 757762f899aSMajd Dibbiny mlx5_ib_cont_pages(*umem, addr, 0, npages, page_shift, ncont, NULL); 75819098df2Smajd@mellanox.com 75919098df2Smajd@mellanox.com err = mlx5_ib_get_buf_offset(addr, *page_shift, offset); 76019098df2Smajd@mellanox.com if (err) { 76119098df2Smajd@mellanox.com mlx5_ib_warn(dev, "bad offset\n"); 76219098df2Smajd@mellanox.com goto err_umem; 76319098df2Smajd@mellanox.com } 76419098df2Smajd@mellanox.com 76519098df2Smajd@mellanox.com mlx5_ib_dbg(dev, "addr 0x%lx, size %zu, npages %d, page_shift %d, ncont %d, offset %d\n", 76619098df2Smajd@mellanox.com addr, size, *npages, *page_shift, *ncont, *offset); 76719098df2Smajd@mellanox.com 76819098df2Smajd@mellanox.com return 0; 76919098df2Smajd@mellanox.com 77019098df2Smajd@mellanox.com err_umem: 77119098df2Smajd@mellanox.com ib_umem_release(*umem); 77219098df2Smajd@mellanox.com *umem = NULL; 77319098df2Smajd@mellanox.com 77419098df2Smajd@mellanox.com return err; 77519098df2Smajd@mellanox.com } 77619098df2Smajd@mellanox.com 777fe248c3aSMaor Gottlieb static void destroy_user_rq(struct mlx5_ib_dev *dev, struct ib_pd *pd, 778bdeacabdSShamir Rabinovitch struct mlx5_ib_rwq *rwq, struct ib_udata *udata) 77979b20a6cSYishai Hadas { 780bdeacabdSShamir Rabinovitch struct mlx5_ib_ucontext *context = 781bdeacabdSShamir Rabinovitch rdma_udata_to_drv_context( 782bdeacabdSShamir Rabinovitch udata, 783bdeacabdSShamir Rabinovitch struct mlx5_ib_ucontext, 784bdeacabdSShamir Rabinovitch ibucontext); 78579b20a6cSYishai Hadas 786fe248c3aSMaor Gottlieb if (rwq->create_flags & MLX5_IB_WQ_FLAGS_DELAY_DROP) 787fe248c3aSMaor Gottlieb atomic_dec(&dev->delay_drop.rqs_cnt); 788fe248c3aSMaor Gottlieb 78979b20a6cSYishai Hadas mlx5_ib_db_unmap_user(context, &rwq->db); 79079b20a6cSYishai Hadas ib_umem_release(rwq->umem); 79179b20a6cSYishai Hadas } 79279b20a6cSYishai Hadas 79379b20a6cSYishai Hadas static int create_user_rq(struct mlx5_ib_dev *dev, struct ib_pd *pd, 794b0ea0fa5SJason Gunthorpe struct ib_udata *udata, struct mlx5_ib_rwq *rwq, 79579b20a6cSYishai Hadas struct mlx5_ib_create_wq *ucmd) 79679b20a6cSYishai Hadas { 79789944450SShamir Rabinovitch struct mlx5_ib_ucontext *ucontext = rdma_udata_to_drv_context( 79889944450SShamir Rabinovitch udata, struct mlx5_ib_ucontext, ibucontext); 79979b20a6cSYishai Hadas int page_shift = 0; 80079b20a6cSYishai Hadas int npages; 80179b20a6cSYishai Hadas u32 offset = 0; 80279b20a6cSYishai Hadas int ncont = 0; 80379b20a6cSYishai Hadas int err; 80479b20a6cSYishai Hadas 80579b20a6cSYishai Hadas if (!ucmd->buf_addr) 80679b20a6cSYishai Hadas return -EINVAL; 80779b20a6cSYishai Hadas 808b0ea0fa5SJason Gunthorpe rwq->umem = ib_umem_get(udata, ucmd->buf_addr, rwq->buf_size, 0, 0); 80979b20a6cSYishai Hadas if (IS_ERR(rwq->umem)) { 81079b20a6cSYishai Hadas mlx5_ib_dbg(dev, "umem_get failed\n"); 81179b20a6cSYishai Hadas err = PTR_ERR(rwq->umem); 81279b20a6cSYishai Hadas return err; 81379b20a6cSYishai Hadas } 81479b20a6cSYishai Hadas 815762f899aSMajd Dibbiny mlx5_ib_cont_pages(rwq->umem, ucmd->buf_addr, 0, &npages, &page_shift, 81679b20a6cSYishai Hadas &ncont, NULL); 81779b20a6cSYishai Hadas err = mlx5_ib_get_buf_offset(ucmd->buf_addr, page_shift, 81879b20a6cSYishai Hadas &rwq->rq_page_offset); 81979b20a6cSYishai Hadas if (err) { 82079b20a6cSYishai Hadas mlx5_ib_warn(dev, "bad offset\n"); 82179b20a6cSYishai Hadas goto err_umem; 82279b20a6cSYishai Hadas } 82379b20a6cSYishai Hadas 82479b20a6cSYishai Hadas rwq->rq_num_pas = ncont; 82579b20a6cSYishai Hadas rwq->page_shift = page_shift; 82679b20a6cSYishai Hadas rwq->log_page_size = page_shift - MLX5_ADAPTER_PAGE_SHIFT; 82779b20a6cSYishai Hadas rwq->wq_sig = !!(ucmd->flags & MLX5_WQ_FLAG_SIGNATURE); 82879b20a6cSYishai Hadas 82979b20a6cSYishai Hadas mlx5_ib_dbg(dev, "addr 0x%llx, size %zd, npages %d, page_shift %d, ncont %d, offset %d\n", 83079b20a6cSYishai Hadas (unsigned long long)ucmd->buf_addr, rwq->buf_size, 83179b20a6cSYishai Hadas npages, page_shift, ncont, offset); 83279b20a6cSYishai Hadas 83389944450SShamir Rabinovitch err = mlx5_ib_db_map_user(ucontext, udata, ucmd->db_addr, &rwq->db); 83479b20a6cSYishai Hadas if (err) { 83579b20a6cSYishai Hadas mlx5_ib_dbg(dev, "map failed\n"); 83679b20a6cSYishai Hadas goto err_umem; 83779b20a6cSYishai Hadas } 83879b20a6cSYishai Hadas 83979b20a6cSYishai Hadas rwq->create_type = MLX5_WQ_USER; 84079b20a6cSYishai Hadas return 0; 84179b20a6cSYishai Hadas 84279b20a6cSYishai Hadas err_umem: 84379b20a6cSYishai Hadas ib_umem_release(rwq->umem); 84479b20a6cSYishai Hadas return err; 84579b20a6cSYishai Hadas } 84679b20a6cSYishai Hadas 847b037c29aSEli Cohen static int adjust_bfregn(struct mlx5_ib_dev *dev, 848b037c29aSEli Cohen struct mlx5_bfreg_info *bfregi, int bfregn) 849b037c29aSEli Cohen { 850b037c29aSEli Cohen return bfregn / MLX5_NON_FP_BFREGS_PER_UAR * MLX5_BFREGS_PER_UAR + 851b037c29aSEli Cohen bfregn % MLX5_NON_FP_BFREGS_PER_UAR; 852b037c29aSEli Cohen } 853b037c29aSEli Cohen 854e126ba97SEli Cohen static int create_user_qp(struct mlx5_ib_dev *dev, struct ib_pd *pd, 855e126ba97SEli Cohen struct mlx5_ib_qp *qp, struct ib_udata *udata, 8560fb2ed66Smajd@mellanox.com struct ib_qp_init_attr *attr, 85709a7d9ecSSaeed Mahameed u32 **in, 85819098df2Smajd@mellanox.com struct mlx5_ib_create_qp_resp *resp, int *inlen, 85919098df2Smajd@mellanox.com struct mlx5_ib_qp_base *base) 860e126ba97SEli Cohen { 861e126ba97SEli Cohen struct mlx5_ib_ucontext *context; 862e126ba97SEli Cohen struct mlx5_ib_create_qp ucmd; 86319098df2Smajd@mellanox.com struct mlx5_ib_ubuffer *ubuffer = &base->ubuffer; 8649e9c47d0SEli Cohen int page_shift = 0; 8651ee47ab3SYishai Hadas int uar_index = 0; 866e126ba97SEli Cohen int npages; 8679e9c47d0SEli Cohen u32 offset = 0; 8682f5ff264SEli Cohen int bfregn; 8699e9c47d0SEli Cohen int ncont = 0; 87009a7d9ecSSaeed Mahameed __be64 *pas; 87109a7d9ecSSaeed Mahameed void *qpc; 872e126ba97SEli Cohen int err; 8735aa3771dSYishai Hadas u16 uid; 874e126ba97SEli Cohen 875e126ba97SEli Cohen err = ib_copy_from_udata(&ucmd, udata, sizeof(ucmd)); 876e126ba97SEli Cohen if (err) { 877e126ba97SEli Cohen mlx5_ib_dbg(dev, "copy failed\n"); 878e126ba97SEli Cohen return err; 879e126ba97SEli Cohen } 880e126ba97SEli Cohen 88189944450SShamir Rabinovitch context = rdma_udata_to_drv_context(udata, struct mlx5_ib_ucontext, 88289944450SShamir Rabinovitch ibucontext); 8831ee47ab3SYishai Hadas if (ucmd.flags & MLX5_QP_FLAG_BFREG_INDEX) { 8841ee47ab3SYishai Hadas uar_index = bfregn_to_uar_index(dev, &context->bfregi, 8851ee47ab3SYishai Hadas ucmd.bfreg_index, true); 8861ee47ab3SYishai Hadas if (uar_index < 0) 8871ee47ab3SYishai Hadas return uar_index; 8881ee47ab3SYishai Hadas 8891ee47ab3SYishai Hadas bfregn = MLX5_IB_INVALID_BFREG; 8901ee47ab3SYishai Hadas } else if (qp->flags & MLX5_IB_QP_CROSS_CHANNEL) { 891e126ba97SEli Cohen /* 892e126ba97SEli Cohen * TBD: should come from the verbs when we have the API 893e126ba97SEli Cohen */ 894051f2630SLeon Romanovsky /* In CROSS_CHANNEL CQ and QP must use the same UAR */ 8952f5ff264SEli Cohen bfregn = MLX5_CROSS_CHANNEL_BFREG; 8961ee47ab3SYishai Hadas } 897051f2630SLeon Romanovsky else { 898ffaf58deSLeon Romanovsky bfregn = alloc_bfreg(dev, &context->bfregi); 899ffaf58deSLeon Romanovsky if (bfregn < 0) 9002f5ff264SEli Cohen return bfregn; 901e126ba97SEli Cohen } 902e126ba97SEli Cohen 9032f5ff264SEli Cohen mlx5_ib_dbg(dev, "bfregn 0x%x, uar_index 0x%x\n", bfregn, uar_index); 9041ee47ab3SYishai Hadas if (bfregn != MLX5_IB_INVALID_BFREG) 9051ee47ab3SYishai Hadas uar_index = bfregn_to_uar_index(dev, &context->bfregi, bfregn, 9061ee47ab3SYishai Hadas false); 907e126ba97SEli Cohen 90848fea837SHaggai Eran qp->rq.offset = 0; 90948fea837SHaggai Eran qp->sq.wqe_shift = ilog2(MLX5_SEND_WQE_BB); 91048fea837SHaggai Eran qp->sq.offset = qp->rq.wqe_cnt << qp->rq.wqe_shift; 91148fea837SHaggai Eran 9120fb2ed66Smajd@mellanox.com err = set_user_buf_size(dev, qp, &ucmd, base, attr); 913e126ba97SEli Cohen if (err) 9142f5ff264SEli Cohen goto err_bfreg; 915e126ba97SEli Cohen 91619098df2Smajd@mellanox.com if (ucmd.buf_addr && ubuffer->buf_size) { 91719098df2Smajd@mellanox.com ubuffer->buf_addr = ucmd.buf_addr; 918b0ea0fa5SJason Gunthorpe err = mlx5_ib_umem_get(dev, udata, ubuffer->buf_addr, 919b0ea0fa5SJason Gunthorpe ubuffer->buf_size, &ubuffer->umem, 920b0ea0fa5SJason Gunthorpe &npages, &page_shift, &ncont, &offset); 92119098df2Smajd@mellanox.com if (err) 9222f5ff264SEli Cohen goto err_bfreg; 9239e9c47d0SEli Cohen } else { 92419098df2Smajd@mellanox.com ubuffer->umem = NULL; 9259e9c47d0SEli Cohen } 926e126ba97SEli Cohen 92709a7d9ecSSaeed Mahameed *inlen = MLX5_ST_SZ_BYTES(create_qp_in) + 92809a7d9ecSSaeed Mahameed MLX5_FLD_SZ_BYTES(create_qp_in, pas[0]) * ncont; 9291b9a07eeSLeon Romanovsky *in = kvzalloc(*inlen, GFP_KERNEL); 930e126ba97SEli Cohen if (!*in) { 931e126ba97SEli Cohen err = -ENOMEM; 932e126ba97SEli Cohen goto err_umem; 933e126ba97SEli Cohen } 934e126ba97SEli Cohen 9357422edceSYishai Hadas uid = (attr->qp_type != IB_QPT_XRC_TGT && 9367422edceSYishai Hadas attr->qp_type != IB_QPT_XRC_INI) ? to_mpd(pd)->uid : 0; 9375aa3771dSYishai Hadas MLX5_SET(create_qp_in, *in, uid, uid); 93809a7d9ecSSaeed Mahameed pas = (__be64 *)MLX5_ADDR_OF(create_qp_in, *in, pas); 93909a7d9ecSSaeed Mahameed if (ubuffer->umem) 94009a7d9ecSSaeed Mahameed mlx5_ib_populate_pas(dev, ubuffer->umem, page_shift, pas, 0); 94109a7d9ecSSaeed Mahameed 94209a7d9ecSSaeed Mahameed qpc = MLX5_ADDR_OF(create_qp_in, *in, qpc); 94309a7d9ecSSaeed Mahameed 94409a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_page_size, page_shift - MLX5_ADAPTER_PAGE_SHIFT); 94509a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, page_offset, offset); 94609a7d9ecSSaeed Mahameed 94709a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, uar_page, uar_index); 9481ee47ab3SYishai Hadas if (bfregn != MLX5_IB_INVALID_BFREG) 949b037c29aSEli Cohen resp->bfreg_index = adjust_bfregn(dev, &context->bfregi, bfregn); 9501ee47ab3SYishai Hadas else 9511ee47ab3SYishai Hadas resp->bfreg_index = MLX5_IB_INVALID_BFREG; 9522f5ff264SEli Cohen qp->bfregn = bfregn; 953e126ba97SEli Cohen 954b0ea0fa5SJason Gunthorpe err = mlx5_ib_db_map_user(context, udata, ucmd.db_addr, &qp->db); 955e126ba97SEli Cohen if (err) { 956e126ba97SEli Cohen mlx5_ib_dbg(dev, "map failed\n"); 957e126ba97SEli Cohen goto err_free; 958e126ba97SEli Cohen } 959e126ba97SEli Cohen 96041d902cbSJason Gunthorpe err = ib_copy_to_udata(udata, resp, min(udata->outlen, sizeof(*resp))); 961e126ba97SEli Cohen if (err) { 962e126ba97SEli Cohen mlx5_ib_dbg(dev, "copy failed\n"); 963e126ba97SEli Cohen goto err_unmap; 964e126ba97SEli Cohen } 965e126ba97SEli Cohen qp->create_type = MLX5_QP_USER; 966e126ba97SEli Cohen 967e126ba97SEli Cohen return 0; 968e126ba97SEli Cohen 969e126ba97SEli Cohen err_unmap: 970e126ba97SEli Cohen mlx5_ib_db_unmap_user(context, &qp->db); 971e126ba97SEli Cohen 972e126ba97SEli Cohen err_free: 973479163f4SAl Viro kvfree(*in); 974e126ba97SEli Cohen 975e126ba97SEli Cohen err_umem: 97619098df2Smajd@mellanox.com ib_umem_release(ubuffer->umem); 977e126ba97SEli Cohen 9782f5ff264SEli Cohen err_bfreg: 9791ee47ab3SYishai Hadas if (bfregn != MLX5_IB_INVALID_BFREG) 9804ed131d0SYishai Hadas mlx5_ib_free_bfreg(dev, &context->bfregi, bfregn); 981e126ba97SEli Cohen return err; 982e126ba97SEli Cohen } 983e126ba97SEli Cohen 984b037c29aSEli Cohen static void destroy_qp_user(struct mlx5_ib_dev *dev, struct ib_pd *pd, 985bdeacabdSShamir Rabinovitch struct mlx5_ib_qp *qp, struct mlx5_ib_qp_base *base, 986bdeacabdSShamir Rabinovitch struct ib_udata *udata) 987e126ba97SEli Cohen { 988bdeacabdSShamir Rabinovitch struct mlx5_ib_ucontext *context = 989bdeacabdSShamir Rabinovitch rdma_udata_to_drv_context( 990bdeacabdSShamir Rabinovitch udata, 991bdeacabdSShamir Rabinovitch struct mlx5_ib_ucontext, 992bdeacabdSShamir Rabinovitch ibucontext); 993e126ba97SEli Cohen 994e126ba97SEli Cohen mlx5_ib_db_unmap_user(context, &qp->db); 99519098df2Smajd@mellanox.com ib_umem_release(base->ubuffer.umem); 9961ee47ab3SYishai Hadas 9971ee47ab3SYishai Hadas /* 9981ee47ab3SYishai Hadas * Free only the BFREGs which are handled by the kernel. 9991ee47ab3SYishai Hadas * BFREGs of UARs allocated dynamically are handled by user. 10001ee47ab3SYishai Hadas */ 10011ee47ab3SYishai Hadas if (qp->bfregn != MLX5_IB_INVALID_BFREG) 10024ed131d0SYishai Hadas mlx5_ib_free_bfreg(dev, &context->bfregi, qp->bfregn); 1003e126ba97SEli Cohen } 1004e126ba97SEli Cohen 100534f4c955SGuy Levi /* get_sq_edge - Get the next nearby edge. 100634f4c955SGuy Levi * 100734f4c955SGuy Levi * An 'edge' is defined as the first following address after the end 100834f4c955SGuy Levi * of the fragment or the SQ. Accordingly, during the WQE construction 100934f4c955SGuy Levi * which repetitively increases the pointer to write the next data, it 101034f4c955SGuy Levi * simply should check if it gets to an edge. 101134f4c955SGuy Levi * 101234f4c955SGuy Levi * @sq - SQ buffer. 101334f4c955SGuy Levi * @idx - Stride index in the SQ buffer. 101434f4c955SGuy Levi * 101534f4c955SGuy Levi * Return: 101634f4c955SGuy Levi * The new edge. 101734f4c955SGuy Levi */ 101834f4c955SGuy Levi static void *get_sq_edge(struct mlx5_ib_wq *sq, u32 idx) 101934f4c955SGuy Levi { 102034f4c955SGuy Levi void *fragment_end; 102134f4c955SGuy Levi 102234f4c955SGuy Levi fragment_end = mlx5_frag_buf_get_wqe 102334f4c955SGuy Levi (&sq->fbc, 102434f4c955SGuy Levi mlx5_frag_buf_get_idx_last_contig_stride(&sq->fbc, idx)); 102534f4c955SGuy Levi 102634f4c955SGuy Levi return fragment_end + MLX5_SEND_WQE_BB; 102734f4c955SGuy Levi } 102834f4c955SGuy Levi 1029e126ba97SEli Cohen static int create_kernel_qp(struct mlx5_ib_dev *dev, 1030e126ba97SEli Cohen struct ib_qp_init_attr *init_attr, 1031e126ba97SEli Cohen struct mlx5_ib_qp *qp, 103209a7d9ecSSaeed Mahameed u32 **in, int *inlen, 103319098df2Smajd@mellanox.com struct mlx5_ib_qp_base *base) 1034e126ba97SEli Cohen { 1035e126ba97SEli Cohen int uar_index; 103609a7d9ecSSaeed Mahameed void *qpc; 1037e126ba97SEli Cohen int err; 1038e126ba97SEli Cohen 1039c0a6cbb9SIsrael Rukshin if (init_attr->create_flags & ~(IB_QP_CREATE_INTEGRITY_EN | 1040f0313965SErez Shitrit IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK | 1041b11a4f9cSHaggai Eran IB_QP_CREATE_IPOIB_UD_LSO | 104293d576afSErez Shitrit IB_QP_CREATE_NETIF_QP | 1043b11a4f9cSHaggai Eran mlx5_ib_create_qp_sqpn_qp1())) 10441a4c3a3dSEli Cohen return -EINVAL; 1045e126ba97SEli Cohen 1046e126ba97SEli Cohen if (init_attr->qp_type == MLX5_IB_QPT_REG_UMR) 10475fe9dec0SEli Cohen qp->bf.bfreg = &dev->fp_bfreg; 10485fe9dec0SEli Cohen else 10495fe9dec0SEli Cohen qp->bf.bfreg = &dev->bfreg; 1050e126ba97SEli Cohen 1051d8030b0dSEli Cohen /* We need to divide by two since each register is comprised of 1052d8030b0dSEli Cohen * two buffers of identical size, namely odd and even 1053d8030b0dSEli Cohen */ 1054d8030b0dSEli Cohen qp->bf.buf_size = (1 << MLX5_CAP_GEN(dev->mdev, log_bf_reg_size)) / 2; 10555fe9dec0SEli Cohen uar_index = qp->bf.bfreg->index; 1056e126ba97SEli Cohen 1057e126ba97SEli Cohen err = calc_sq_size(dev, init_attr, qp); 1058e126ba97SEli Cohen if (err < 0) { 1059e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 10605fe9dec0SEli Cohen return err; 1061e126ba97SEli Cohen } 1062e126ba97SEli Cohen 1063e126ba97SEli Cohen qp->rq.offset = 0; 1064e126ba97SEli Cohen qp->sq.offset = qp->rq.wqe_cnt << qp->rq.wqe_shift; 106519098df2Smajd@mellanox.com base->ubuffer.buf_size = err + (qp->rq.wqe_cnt << qp->rq.wqe_shift); 1066e126ba97SEli Cohen 106734f4c955SGuy Levi err = mlx5_frag_buf_alloc_node(dev->mdev, base->ubuffer.buf_size, 106834f4c955SGuy Levi &qp->buf, dev->mdev->priv.numa_node); 1069e126ba97SEli Cohen if (err) { 1070e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 10715fe9dec0SEli Cohen return err; 1072e126ba97SEli Cohen } 1073e126ba97SEli Cohen 107434f4c955SGuy Levi if (qp->rq.wqe_cnt) 107534f4c955SGuy Levi mlx5_init_fbc(qp->buf.frags, qp->rq.wqe_shift, 107634f4c955SGuy Levi ilog2(qp->rq.wqe_cnt), &qp->rq.fbc); 107734f4c955SGuy Levi 107834f4c955SGuy Levi if (qp->sq.wqe_cnt) { 107934f4c955SGuy Levi int sq_strides_offset = (qp->sq.offset & (PAGE_SIZE - 1)) / 108034f4c955SGuy Levi MLX5_SEND_WQE_BB; 108134f4c955SGuy Levi mlx5_init_fbc_offset(qp->buf.frags + 108234f4c955SGuy Levi (qp->sq.offset / PAGE_SIZE), 108334f4c955SGuy Levi ilog2(MLX5_SEND_WQE_BB), 108434f4c955SGuy Levi ilog2(qp->sq.wqe_cnt), 108534f4c955SGuy Levi sq_strides_offset, &qp->sq.fbc); 108634f4c955SGuy Levi 108734f4c955SGuy Levi qp->sq.cur_edge = get_sq_edge(&qp->sq, 0); 108834f4c955SGuy Levi } 108934f4c955SGuy Levi 109009a7d9ecSSaeed Mahameed *inlen = MLX5_ST_SZ_BYTES(create_qp_in) + 109109a7d9ecSSaeed Mahameed MLX5_FLD_SZ_BYTES(create_qp_in, pas[0]) * qp->buf.npages; 10921b9a07eeSLeon Romanovsky *in = kvzalloc(*inlen, GFP_KERNEL); 1093e126ba97SEli Cohen if (!*in) { 1094e126ba97SEli Cohen err = -ENOMEM; 1095e126ba97SEli Cohen goto err_buf; 1096e126ba97SEli Cohen } 109709a7d9ecSSaeed Mahameed 109809a7d9ecSSaeed Mahameed qpc = MLX5_ADDR_OF(create_qp_in, *in, qpc); 109909a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, uar_page, uar_index); 110009a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_page_size, qp->buf.page_shift - MLX5_ADAPTER_PAGE_SHIFT); 110109a7d9ecSSaeed Mahameed 1102e126ba97SEli Cohen /* Set "fast registration enabled" for all kernel QPs */ 110309a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, fre, 1); 110409a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, rlky, 1); 1105e126ba97SEli Cohen 1106b11a4f9cSHaggai Eran if (init_attr->create_flags & mlx5_ib_create_qp_sqpn_qp1()) { 110709a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, deth_sqpn, 1); 1108b11a4f9cSHaggai Eran qp->flags |= MLX5_IB_QP_SQPN_QP1; 1109b11a4f9cSHaggai Eran } 1110b11a4f9cSHaggai Eran 111134f4c955SGuy Levi mlx5_fill_page_frag_array(&qp->buf, 111234f4c955SGuy Levi (__be64 *)MLX5_ADDR_OF(create_qp_in, 111334f4c955SGuy Levi *in, pas)); 1114e126ba97SEli Cohen 11159603b61dSJack Morgenstein err = mlx5_db_alloc(dev->mdev, &qp->db); 1116e126ba97SEli Cohen if (err) { 1117e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 1118e126ba97SEli Cohen goto err_free; 1119e126ba97SEli Cohen } 1120e126ba97SEli Cohen 1121b5883008SLi Dongyang qp->sq.wrid = kvmalloc_array(qp->sq.wqe_cnt, 1122b5883008SLi Dongyang sizeof(*qp->sq.wrid), GFP_KERNEL); 1123b5883008SLi Dongyang qp->sq.wr_data = kvmalloc_array(qp->sq.wqe_cnt, 1124b5883008SLi Dongyang sizeof(*qp->sq.wr_data), GFP_KERNEL); 1125b5883008SLi Dongyang qp->rq.wrid = kvmalloc_array(qp->rq.wqe_cnt, 1126b5883008SLi Dongyang sizeof(*qp->rq.wrid), GFP_KERNEL); 1127b5883008SLi Dongyang qp->sq.w_list = kvmalloc_array(qp->sq.wqe_cnt, 1128b5883008SLi Dongyang sizeof(*qp->sq.w_list), GFP_KERNEL); 1129b5883008SLi Dongyang qp->sq.wqe_head = kvmalloc_array(qp->sq.wqe_cnt, 1130b5883008SLi Dongyang sizeof(*qp->sq.wqe_head), GFP_KERNEL); 1131e126ba97SEli Cohen 1132e126ba97SEli Cohen if (!qp->sq.wrid || !qp->sq.wr_data || !qp->rq.wrid || 1133e126ba97SEli Cohen !qp->sq.w_list || !qp->sq.wqe_head) { 1134e126ba97SEli Cohen err = -ENOMEM; 1135e126ba97SEli Cohen goto err_wrid; 1136e126ba97SEli Cohen } 1137e126ba97SEli Cohen qp->create_type = MLX5_QP_KERNEL; 1138e126ba97SEli Cohen 1139e126ba97SEli Cohen return 0; 1140e126ba97SEli Cohen 1141e126ba97SEli Cohen err_wrid: 1142b5883008SLi Dongyang kvfree(qp->sq.wqe_head); 1143b5883008SLi Dongyang kvfree(qp->sq.w_list); 1144b5883008SLi Dongyang kvfree(qp->sq.wrid); 1145b5883008SLi Dongyang kvfree(qp->sq.wr_data); 1146b5883008SLi Dongyang kvfree(qp->rq.wrid); 1147f4044dacSEli Cohen mlx5_db_free(dev->mdev, &qp->db); 1148e126ba97SEli Cohen 1149e126ba97SEli Cohen err_free: 1150479163f4SAl Viro kvfree(*in); 1151e126ba97SEli Cohen 1152e126ba97SEli Cohen err_buf: 115334f4c955SGuy Levi mlx5_frag_buf_free(dev->mdev, &qp->buf); 1154e126ba97SEli Cohen return err; 1155e126ba97SEli Cohen } 1156e126ba97SEli Cohen 1157e126ba97SEli Cohen static void destroy_qp_kernel(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp) 1158e126ba97SEli Cohen { 1159b5883008SLi Dongyang kvfree(qp->sq.wqe_head); 1160b5883008SLi Dongyang kvfree(qp->sq.w_list); 1161b5883008SLi Dongyang kvfree(qp->sq.wrid); 1162b5883008SLi Dongyang kvfree(qp->sq.wr_data); 1163b5883008SLi Dongyang kvfree(qp->rq.wrid); 1164f4044dacSEli Cohen mlx5_db_free(dev->mdev, &qp->db); 116534f4c955SGuy Levi mlx5_frag_buf_free(dev->mdev, &qp->buf); 1166e126ba97SEli Cohen } 1167e126ba97SEli Cohen 116809a7d9ecSSaeed Mahameed static u32 get_rx_type(struct mlx5_ib_qp *qp, struct ib_qp_init_attr *attr) 1169e126ba97SEli Cohen { 1170e126ba97SEli Cohen if (attr->srq || (attr->qp_type == IB_QPT_XRC_TGT) || 1171c32a4f29SMoni Shoua (attr->qp_type == MLX5_IB_QPT_DCI) || 1172e126ba97SEli Cohen (attr->qp_type == IB_QPT_XRC_INI)) 117309a7d9ecSSaeed Mahameed return MLX5_SRQ_RQ; 1174e126ba97SEli Cohen else if (!qp->has_rq) 117509a7d9ecSSaeed Mahameed return MLX5_ZERO_LEN_RQ; 1176e126ba97SEli Cohen else 117709a7d9ecSSaeed Mahameed return MLX5_NON_ZERO_RQ; 1178e126ba97SEli Cohen } 1179e126ba97SEli Cohen 1180e126ba97SEli Cohen static int is_connected(enum ib_qp_type qp_type) 1181e126ba97SEli Cohen { 11825d6ff1baSYonatan Cohen if (qp_type == IB_QPT_RC || qp_type == IB_QPT_UC || 11835d6ff1baSYonatan Cohen qp_type == MLX5_IB_QPT_DCI) 1184e126ba97SEli Cohen return 1; 1185e126ba97SEli Cohen 1186e126ba97SEli Cohen return 0; 1187e126ba97SEli Cohen } 1188e126ba97SEli Cohen 11890fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_tis(struct mlx5_ib_dev *dev, 1190c2e53b2cSYishai Hadas struct mlx5_ib_qp *qp, 11911cd6dbd3SYishai Hadas struct mlx5_ib_sq *sq, u32 tdn, 11921cd6dbd3SYishai Hadas struct ib_pd *pd) 11930fb2ed66Smajd@mellanox.com { 1194c4f287c4SSaeed Mahameed u32 in[MLX5_ST_SZ_DW(create_tis_in)] = {0}; 11950fb2ed66Smajd@mellanox.com void *tisc = MLX5_ADDR_OF(create_tis_in, in, ctx); 11960fb2ed66Smajd@mellanox.com 11971cd6dbd3SYishai Hadas MLX5_SET(create_tis_in, in, uid, to_mpd(pd)->uid); 11980fb2ed66Smajd@mellanox.com MLX5_SET(tisc, tisc, transport_domain, tdn); 1199c2e53b2cSYishai Hadas if (qp->flags & MLX5_IB_QP_UNDERLAY) 1200c2e53b2cSYishai Hadas MLX5_SET(tisc, tisc, underlay_qpn, qp->underlay_qpn); 1201c2e53b2cSYishai Hadas 12020fb2ed66Smajd@mellanox.com return mlx5_core_create_tis(dev->mdev, in, sizeof(in), &sq->tisn); 12030fb2ed66Smajd@mellanox.com } 12040fb2ed66Smajd@mellanox.com 12050fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp_tis(struct mlx5_ib_dev *dev, 12061cd6dbd3SYishai Hadas struct mlx5_ib_sq *sq, struct ib_pd *pd) 12070fb2ed66Smajd@mellanox.com { 12081cd6dbd3SYishai Hadas mlx5_cmd_destroy_tis(dev->mdev, sq->tisn, to_mpd(pd)->uid); 12090fb2ed66Smajd@mellanox.com } 12100fb2ed66Smajd@mellanox.com 1211d5ed8ac3SMark Bloch static void destroy_flow_rule_vport_sq(struct mlx5_ib_sq *sq) 1212b96c9ddeSMark Bloch { 1213b96c9ddeSMark Bloch if (sq->flow_rule) 1214b96c9ddeSMark Bloch mlx5_del_flow_rules(sq->flow_rule); 1215d5ed8ac3SMark Bloch sq->flow_rule = NULL; 1216b96c9ddeSMark Bloch } 1217b96c9ddeSMark Bloch 12180fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_sq(struct mlx5_ib_dev *dev, 1219b0ea0fa5SJason Gunthorpe struct ib_udata *udata, 12200fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq, void *qpin, 12210fb2ed66Smajd@mellanox.com struct ib_pd *pd) 12220fb2ed66Smajd@mellanox.com { 12230fb2ed66Smajd@mellanox.com struct mlx5_ib_ubuffer *ubuffer = &sq->ubuffer; 12240fb2ed66Smajd@mellanox.com __be64 *pas; 12250fb2ed66Smajd@mellanox.com void *in; 12260fb2ed66Smajd@mellanox.com void *sqc; 12270fb2ed66Smajd@mellanox.com void *qpc = MLX5_ADDR_OF(create_qp_in, qpin, qpc); 12280fb2ed66Smajd@mellanox.com void *wq; 12290fb2ed66Smajd@mellanox.com int inlen; 12300fb2ed66Smajd@mellanox.com int err; 12310fb2ed66Smajd@mellanox.com int page_shift = 0; 12320fb2ed66Smajd@mellanox.com int npages; 12330fb2ed66Smajd@mellanox.com int ncont = 0; 12340fb2ed66Smajd@mellanox.com u32 offset = 0; 12350fb2ed66Smajd@mellanox.com 1236b0ea0fa5SJason Gunthorpe err = mlx5_ib_umem_get(dev, udata, ubuffer->buf_addr, ubuffer->buf_size, 1237b0ea0fa5SJason Gunthorpe &sq->ubuffer.umem, &npages, &page_shift, &ncont, 1238b0ea0fa5SJason Gunthorpe &offset); 12390fb2ed66Smajd@mellanox.com if (err) 12400fb2ed66Smajd@mellanox.com return err; 12410fb2ed66Smajd@mellanox.com 12420fb2ed66Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(create_sq_in) + sizeof(u64) * ncont; 12431b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 12440fb2ed66Smajd@mellanox.com if (!in) { 12450fb2ed66Smajd@mellanox.com err = -ENOMEM; 12460fb2ed66Smajd@mellanox.com goto err_umem; 12470fb2ed66Smajd@mellanox.com } 12480fb2ed66Smajd@mellanox.com 1249c14003f0SYishai Hadas MLX5_SET(create_sq_in, in, uid, to_mpd(pd)->uid); 12500fb2ed66Smajd@mellanox.com sqc = MLX5_ADDR_OF(create_sq_in, in, ctx); 12510fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, flush_in_error_en, 1); 1252795b609cSBodong Wang if (MLX5_CAP_ETH(dev->mdev, multi_pkt_send_wqe)) 1253795b609cSBodong Wang MLX5_SET(sqc, sqc, allow_multi_pkt_send_wqe, 1); 12540fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, state, MLX5_SQC_STATE_RST); 12550fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, user_index, MLX5_GET(qpc, qpc, user_index)); 12560fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, cqn, MLX5_GET(qpc, qpc, cqn_snd)); 12570fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, tis_lst_sz, 1); 12580fb2ed66Smajd@mellanox.com MLX5_SET(sqc, sqc, tis_num_0, sq->tisn); 125996dc3fc5SNoa Osherovich if (MLX5_CAP_GEN(dev->mdev, eth_net_offloads) && 126096dc3fc5SNoa Osherovich MLX5_CAP_ETH(dev->mdev, swp)) 126196dc3fc5SNoa Osherovich MLX5_SET(sqc, sqc, allow_swp, 1); 12620fb2ed66Smajd@mellanox.com 12630fb2ed66Smajd@mellanox.com wq = MLX5_ADDR_OF(sqc, sqc, wq); 12640fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, wq_type, MLX5_WQ_TYPE_CYCLIC); 12650fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, pd, MLX5_GET(qpc, qpc, pd)); 12660fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, uar_page, MLX5_GET(qpc, qpc, uar_page)); 12670fb2ed66Smajd@mellanox.com MLX5_SET64(wq, wq, dbr_addr, MLX5_GET64(qpc, qpc, dbr_addr)); 12680fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_stride, ilog2(MLX5_SEND_WQE_BB)); 12690fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_sz, MLX5_GET(qpc, qpc, log_sq_size)); 12700fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_pg_sz, page_shift - MLX5_ADAPTER_PAGE_SHIFT); 12710fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, page_offset, offset); 12720fb2ed66Smajd@mellanox.com 12730fb2ed66Smajd@mellanox.com pas = (__be64 *)MLX5_ADDR_OF(wq, wq, pas); 12740fb2ed66Smajd@mellanox.com mlx5_ib_populate_pas(dev, sq->ubuffer.umem, page_shift, pas, 0); 12750fb2ed66Smajd@mellanox.com 12760fb2ed66Smajd@mellanox.com err = mlx5_core_create_sq_tracked(dev->mdev, in, inlen, &sq->base.mqp); 12770fb2ed66Smajd@mellanox.com 12780fb2ed66Smajd@mellanox.com kvfree(in); 12790fb2ed66Smajd@mellanox.com 12800fb2ed66Smajd@mellanox.com if (err) 12810fb2ed66Smajd@mellanox.com goto err_umem; 12820fb2ed66Smajd@mellanox.com 12830fb2ed66Smajd@mellanox.com return 0; 12840fb2ed66Smajd@mellanox.com 12850fb2ed66Smajd@mellanox.com err_umem: 12860fb2ed66Smajd@mellanox.com ib_umem_release(sq->ubuffer.umem); 12870fb2ed66Smajd@mellanox.com sq->ubuffer.umem = NULL; 12880fb2ed66Smajd@mellanox.com 12890fb2ed66Smajd@mellanox.com return err; 12900fb2ed66Smajd@mellanox.com } 12910fb2ed66Smajd@mellanox.com 12920fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp_sq(struct mlx5_ib_dev *dev, 12930fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq) 12940fb2ed66Smajd@mellanox.com { 1295d5ed8ac3SMark Bloch destroy_flow_rule_vport_sq(sq); 12960fb2ed66Smajd@mellanox.com mlx5_core_destroy_sq_tracked(dev->mdev, &sq->base.mqp); 12970fb2ed66Smajd@mellanox.com ib_umem_release(sq->ubuffer.umem); 12980fb2ed66Smajd@mellanox.com } 12990fb2ed66Smajd@mellanox.com 13002c292dbbSBoris Pismenny static size_t get_rq_pas_size(void *qpc) 13010fb2ed66Smajd@mellanox.com { 13020fb2ed66Smajd@mellanox.com u32 log_page_size = MLX5_GET(qpc, qpc, log_page_size) + 12; 13030fb2ed66Smajd@mellanox.com u32 log_rq_stride = MLX5_GET(qpc, qpc, log_rq_stride); 13040fb2ed66Smajd@mellanox.com u32 log_rq_size = MLX5_GET(qpc, qpc, log_rq_size); 13050fb2ed66Smajd@mellanox.com u32 page_offset = MLX5_GET(qpc, qpc, page_offset); 13060fb2ed66Smajd@mellanox.com u32 po_quanta = 1 << (log_page_size - 6); 13070fb2ed66Smajd@mellanox.com u32 rq_sz = 1 << (log_rq_size + 4 + log_rq_stride); 13080fb2ed66Smajd@mellanox.com u32 page_size = 1 << log_page_size; 13090fb2ed66Smajd@mellanox.com u32 rq_sz_po = rq_sz + (page_offset * po_quanta); 13100fb2ed66Smajd@mellanox.com u32 rq_num_pas = (rq_sz_po + page_size - 1) / page_size; 13110fb2ed66Smajd@mellanox.com 13120fb2ed66Smajd@mellanox.com return rq_num_pas * sizeof(u64); 13130fb2ed66Smajd@mellanox.com } 13140fb2ed66Smajd@mellanox.com 13150fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_rq(struct mlx5_ib_dev *dev, 13162c292dbbSBoris Pismenny struct mlx5_ib_rq *rq, void *qpin, 131734d57585SYishai Hadas size_t qpinlen, struct ib_pd *pd) 13180fb2ed66Smajd@mellanox.com { 1319358e42eaSMajd Dibbiny struct mlx5_ib_qp *mqp = rq->base.container_mibqp; 13200fb2ed66Smajd@mellanox.com __be64 *pas; 13210fb2ed66Smajd@mellanox.com __be64 *qp_pas; 13220fb2ed66Smajd@mellanox.com void *in; 13230fb2ed66Smajd@mellanox.com void *rqc; 13240fb2ed66Smajd@mellanox.com void *wq; 13250fb2ed66Smajd@mellanox.com void *qpc = MLX5_ADDR_OF(create_qp_in, qpin, qpc); 13262c292dbbSBoris Pismenny size_t rq_pas_size = get_rq_pas_size(qpc); 13272c292dbbSBoris Pismenny size_t inlen; 13280fb2ed66Smajd@mellanox.com int err; 13292c292dbbSBoris Pismenny 13302c292dbbSBoris Pismenny if (qpinlen < rq_pas_size + MLX5_BYTE_OFF(create_qp_in, pas)) 13312c292dbbSBoris Pismenny return -EINVAL; 13320fb2ed66Smajd@mellanox.com 13330fb2ed66Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(create_rq_in) + rq_pas_size; 13341b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 13350fb2ed66Smajd@mellanox.com if (!in) 13360fb2ed66Smajd@mellanox.com return -ENOMEM; 13370fb2ed66Smajd@mellanox.com 133834d57585SYishai Hadas MLX5_SET(create_rq_in, in, uid, to_mpd(pd)->uid); 13390fb2ed66Smajd@mellanox.com rqc = MLX5_ADDR_OF(create_rq_in, in, ctx); 1340e4cc4fa7SNoa Osherovich if (!(rq->flags & MLX5_IB_RQ_CVLAN_STRIPPING)) 13410fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, vsd, 1); 13420fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, mem_rq_type, MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE); 13430fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, state, MLX5_RQC_STATE_RST); 13440fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, flush_in_error_en, 1); 13450fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, user_index, MLX5_GET(qpc, qpc, user_index)); 13460fb2ed66Smajd@mellanox.com MLX5_SET(rqc, rqc, cqn, MLX5_GET(qpc, qpc, cqn_rcv)); 13470fb2ed66Smajd@mellanox.com 1348358e42eaSMajd Dibbiny if (mqp->flags & MLX5_IB_QP_CAP_SCATTER_FCS) 1349358e42eaSMajd Dibbiny MLX5_SET(rqc, rqc, scatter_fcs, 1); 1350358e42eaSMajd Dibbiny 13510fb2ed66Smajd@mellanox.com wq = MLX5_ADDR_OF(rqc, rqc, wq); 13520fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, wq_type, MLX5_WQ_TYPE_CYCLIC); 1353b1383aa6SNoa Osherovich if (rq->flags & MLX5_IB_RQ_PCI_WRITE_END_PADDING) 1354b1383aa6SNoa Osherovich MLX5_SET(wq, wq, end_padding_mode, MLX5_WQ_END_PAD_MODE_ALIGN); 13550fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, page_offset, MLX5_GET(qpc, qpc, page_offset)); 13560fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, pd, MLX5_GET(qpc, qpc, pd)); 13570fb2ed66Smajd@mellanox.com MLX5_SET64(wq, wq, dbr_addr, MLX5_GET64(qpc, qpc, dbr_addr)); 13580fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_stride, MLX5_GET(qpc, qpc, log_rq_stride) + 4); 13590fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_pg_sz, MLX5_GET(qpc, qpc, log_page_size)); 13600fb2ed66Smajd@mellanox.com MLX5_SET(wq, wq, log_wq_sz, MLX5_GET(qpc, qpc, log_rq_size)); 13610fb2ed66Smajd@mellanox.com 13620fb2ed66Smajd@mellanox.com pas = (__be64 *)MLX5_ADDR_OF(wq, wq, pas); 13630fb2ed66Smajd@mellanox.com qp_pas = (__be64 *)MLX5_ADDR_OF(create_qp_in, qpin, pas); 13640fb2ed66Smajd@mellanox.com memcpy(pas, qp_pas, rq_pas_size); 13650fb2ed66Smajd@mellanox.com 13660fb2ed66Smajd@mellanox.com err = mlx5_core_create_rq_tracked(dev->mdev, in, inlen, &rq->base.mqp); 13670fb2ed66Smajd@mellanox.com 13680fb2ed66Smajd@mellanox.com kvfree(in); 13690fb2ed66Smajd@mellanox.com 13700fb2ed66Smajd@mellanox.com return err; 13710fb2ed66Smajd@mellanox.com } 13720fb2ed66Smajd@mellanox.com 13730fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp_rq(struct mlx5_ib_dev *dev, 13740fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq) 13750fb2ed66Smajd@mellanox.com { 13760fb2ed66Smajd@mellanox.com mlx5_core_destroy_rq_tracked(dev->mdev, &rq->base.mqp); 13770fb2ed66Smajd@mellanox.com } 13780fb2ed66Smajd@mellanox.com 1379f95ef6cbSMaor Gottlieb static bool tunnel_offload_supported(struct mlx5_core_dev *dev) 1380f95ef6cbSMaor Gottlieb { 1381f95ef6cbSMaor Gottlieb return (MLX5_CAP_ETH(dev, tunnel_stateless_vxlan) || 1382f95ef6cbSMaor Gottlieb MLX5_CAP_ETH(dev, tunnel_stateless_gre) || 1383f95ef6cbSMaor Gottlieb MLX5_CAP_ETH(dev, tunnel_stateless_geneve_rx)); 1384f95ef6cbSMaor Gottlieb } 1385f95ef6cbSMaor Gottlieb 13860042f9e4SMark Bloch static void destroy_raw_packet_qp_tir(struct mlx5_ib_dev *dev, 13870042f9e4SMark Bloch struct mlx5_ib_rq *rq, 1388443c1cf9SYishai Hadas u32 qp_flags_en, 1389443c1cf9SYishai Hadas struct ib_pd *pd) 13900042f9e4SMark Bloch { 13910042f9e4SMark Bloch if (qp_flags_en & (MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC | 13920042f9e4SMark Bloch MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC)) 13930042f9e4SMark Bloch mlx5_ib_disable_lb(dev, false, true); 1394443c1cf9SYishai Hadas mlx5_cmd_destroy_tir(dev->mdev, rq->tirn, to_mpd(pd)->uid); 13950042f9e4SMark Bloch } 13960042f9e4SMark Bloch 13970fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_tir(struct mlx5_ib_dev *dev, 1398f95ef6cbSMaor Gottlieb struct mlx5_ib_rq *rq, u32 tdn, 1399443c1cf9SYishai Hadas u32 *qp_flags_en, 14001f1d6abbSAriel Levkovich struct ib_pd *pd, 14011f1d6abbSAriel Levkovich u32 *out, int outlen) 14020fb2ed66Smajd@mellanox.com { 1403175edba8SMark Bloch u8 lb_flag = 0; 14040fb2ed66Smajd@mellanox.com u32 *in; 14050fb2ed66Smajd@mellanox.com void *tirc; 14060fb2ed66Smajd@mellanox.com int inlen; 14070fb2ed66Smajd@mellanox.com int err; 14080fb2ed66Smajd@mellanox.com 14090fb2ed66Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(create_tir_in); 14101b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 14110fb2ed66Smajd@mellanox.com if (!in) 14120fb2ed66Smajd@mellanox.com return -ENOMEM; 14130fb2ed66Smajd@mellanox.com 1414443c1cf9SYishai Hadas MLX5_SET(create_tir_in, in, uid, to_mpd(pd)->uid); 14150fb2ed66Smajd@mellanox.com tirc = MLX5_ADDR_OF(create_tir_in, in, ctx); 14160fb2ed66Smajd@mellanox.com MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_DIRECT); 14170fb2ed66Smajd@mellanox.com MLX5_SET(tirc, tirc, inline_rqn, rq->base.mqp.qpn); 14180fb2ed66Smajd@mellanox.com MLX5_SET(tirc, tirc, transport_domain, tdn); 1419175edba8SMark Bloch if (*qp_flags_en & MLX5_QP_FLAG_TUNNEL_OFFLOADS) 1420f95ef6cbSMaor Gottlieb MLX5_SET(tirc, tirc, tunneled_offload_en, 1); 14210fb2ed66Smajd@mellanox.com 1422175edba8SMark Bloch if (*qp_flags_en & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC) 1423175edba8SMark Bloch lb_flag |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST; 1424175edba8SMark Bloch 1425175edba8SMark Bloch if (*qp_flags_en & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC) 1426175edba8SMark Bloch lb_flag |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST; 1427175edba8SMark Bloch 14286a4d00beSMark Bloch if (dev->is_rep) { 1429175edba8SMark Bloch lb_flag |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST; 1430175edba8SMark Bloch *qp_flags_en |= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC; 1431175edba8SMark Bloch } 1432175edba8SMark Bloch 1433175edba8SMark Bloch MLX5_SET(tirc, tirc, self_lb_block, lb_flag); 1434ec9c2fb8SMark Bloch 14351f1d6abbSAriel Levkovich err = mlx5_core_create_tir_out(dev->mdev, in, inlen, out, outlen); 14360fb2ed66Smajd@mellanox.com 14371f1d6abbSAriel Levkovich rq->tirn = MLX5_GET(create_tir_out, out, tirn); 14380042f9e4SMark Bloch if (!err && MLX5_GET(tirc, tirc, self_lb_block)) { 14390042f9e4SMark Bloch err = mlx5_ib_enable_lb(dev, false, true); 14400042f9e4SMark Bloch 14410042f9e4SMark Bloch if (err) 1442443c1cf9SYishai Hadas destroy_raw_packet_qp_tir(dev, rq, 0, pd); 14430042f9e4SMark Bloch } 14440fb2ed66Smajd@mellanox.com kvfree(in); 14450fb2ed66Smajd@mellanox.com 14460fb2ed66Smajd@mellanox.com return err; 14470fb2ed66Smajd@mellanox.com } 14480fb2ed66Smajd@mellanox.com 14490fb2ed66Smajd@mellanox.com static int create_raw_packet_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 14502c292dbbSBoris Pismenny u32 *in, size_t inlen, 14517f72052cSYishai Hadas struct ib_pd *pd, 14527f72052cSYishai Hadas struct ib_udata *udata, 14537f72052cSYishai Hadas struct mlx5_ib_create_qp_resp *resp) 14540fb2ed66Smajd@mellanox.com { 14550fb2ed66Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 14560fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 14570fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 145889944450SShamir Rabinovitch struct mlx5_ib_ucontext *mucontext = rdma_udata_to_drv_context( 145989944450SShamir Rabinovitch udata, struct mlx5_ib_ucontext, ibucontext); 14600fb2ed66Smajd@mellanox.com int err; 14610fb2ed66Smajd@mellanox.com u32 tdn = mucontext->tdn; 14627f72052cSYishai Hadas u16 uid = to_mpd(pd)->uid; 14631f1d6abbSAriel Levkovich u32 out[MLX5_ST_SZ_DW(create_tir_out)] = {}; 14640fb2ed66Smajd@mellanox.com 14650fb2ed66Smajd@mellanox.com if (qp->sq.wqe_cnt) { 14661cd6dbd3SYishai Hadas err = create_raw_packet_qp_tis(dev, qp, sq, tdn, pd); 14670fb2ed66Smajd@mellanox.com if (err) 14680fb2ed66Smajd@mellanox.com return err; 14690fb2ed66Smajd@mellanox.com 1470b0ea0fa5SJason Gunthorpe err = create_raw_packet_qp_sq(dev, udata, sq, in, pd); 14710fb2ed66Smajd@mellanox.com if (err) 14720fb2ed66Smajd@mellanox.com goto err_destroy_tis; 14730fb2ed66Smajd@mellanox.com 14747f72052cSYishai Hadas if (uid) { 14757f72052cSYishai Hadas resp->tisn = sq->tisn; 14767f72052cSYishai Hadas resp->comp_mask |= MLX5_IB_CREATE_QP_RESP_MASK_TISN; 14777f72052cSYishai Hadas resp->sqn = sq->base.mqp.qpn; 14787f72052cSYishai Hadas resp->comp_mask |= MLX5_IB_CREATE_QP_RESP_MASK_SQN; 14797f72052cSYishai Hadas } 14807f72052cSYishai Hadas 14810fb2ed66Smajd@mellanox.com sq->base.container_mibqp = qp; 14821d31e9c0SMajd Dibbiny sq->base.mqp.event = mlx5_ib_qp_event; 14830fb2ed66Smajd@mellanox.com } 14840fb2ed66Smajd@mellanox.com 14850fb2ed66Smajd@mellanox.com if (qp->rq.wqe_cnt) { 1486358e42eaSMajd Dibbiny rq->base.container_mibqp = qp; 1487358e42eaSMajd Dibbiny 1488e4cc4fa7SNoa Osherovich if (qp->flags & MLX5_IB_QP_CVLAN_STRIPPING) 1489e4cc4fa7SNoa Osherovich rq->flags |= MLX5_IB_RQ_CVLAN_STRIPPING; 1490b1383aa6SNoa Osherovich if (qp->flags & MLX5_IB_QP_PCI_WRITE_END_PADDING) 1491b1383aa6SNoa Osherovich rq->flags |= MLX5_IB_RQ_PCI_WRITE_END_PADDING; 149234d57585SYishai Hadas err = create_raw_packet_qp_rq(dev, rq, in, inlen, pd); 14930fb2ed66Smajd@mellanox.com if (err) 14940fb2ed66Smajd@mellanox.com goto err_destroy_sq; 14950fb2ed66Smajd@mellanox.com 14961f1d6abbSAriel Levkovich err = create_raw_packet_qp_tir( 14971f1d6abbSAriel Levkovich dev, rq, tdn, &qp->flags_en, pd, out, 14981f1d6abbSAriel Levkovich MLX5_ST_SZ_BYTES(create_tir_out)); 14990fb2ed66Smajd@mellanox.com if (err) 15000fb2ed66Smajd@mellanox.com goto err_destroy_rq; 15017f72052cSYishai Hadas 15027f72052cSYishai Hadas if (uid) { 15037f72052cSYishai Hadas resp->rqn = rq->base.mqp.qpn; 15047f72052cSYishai Hadas resp->comp_mask |= MLX5_IB_CREATE_QP_RESP_MASK_RQN; 15057f72052cSYishai Hadas resp->tirn = rq->tirn; 15067f72052cSYishai Hadas resp->comp_mask |= MLX5_IB_CREATE_QP_RESP_MASK_TIRN; 15071f1d6abbSAriel Levkovich if (MLX5_CAP_FLOWTABLE_NIC_RX(dev->mdev, sw_owner)) { 15081f1d6abbSAriel Levkovich resp->tir_icm_addr = MLX5_GET( 15091f1d6abbSAriel Levkovich create_tir_out, out, icm_address_31_0); 15101f1d6abbSAriel Levkovich resp->tir_icm_addr |= 15111f1d6abbSAriel Levkovich (u64)MLX5_GET(create_tir_out, out, 15121f1d6abbSAriel Levkovich icm_address_39_32) 15131f1d6abbSAriel Levkovich << 32; 15141f1d6abbSAriel Levkovich resp->tir_icm_addr |= 15151f1d6abbSAriel Levkovich (u64)MLX5_GET(create_tir_out, out, 15161f1d6abbSAriel Levkovich icm_address_63_40) 15171f1d6abbSAriel Levkovich << 40; 15181f1d6abbSAriel Levkovich resp->comp_mask |= 15191f1d6abbSAriel Levkovich MLX5_IB_CREATE_QP_RESP_MASK_TIR_ICM_ADDR; 15201f1d6abbSAriel Levkovich } 15217f72052cSYishai Hadas } 15220fb2ed66Smajd@mellanox.com } 15230fb2ed66Smajd@mellanox.com 15240fb2ed66Smajd@mellanox.com qp->trans_qp.base.mqp.qpn = qp->sq.wqe_cnt ? sq->base.mqp.qpn : 15250fb2ed66Smajd@mellanox.com rq->base.mqp.qpn; 15267f72052cSYishai Hadas err = ib_copy_to_udata(udata, resp, min(udata->outlen, sizeof(*resp))); 15277f72052cSYishai Hadas if (err) 15287f72052cSYishai Hadas goto err_destroy_tir; 15290fb2ed66Smajd@mellanox.com 15300fb2ed66Smajd@mellanox.com return 0; 15310fb2ed66Smajd@mellanox.com 15327f72052cSYishai Hadas err_destroy_tir: 15337f72052cSYishai Hadas destroy_raw_packet_qp_tir(dev, rq, qp->flags_en, pd); 15340fb2ed66Smajd@mellanox.com err_destroy_rq: 15350fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_rq(dev, rq); 15360fb2ed66Smajd@mellanox.com err_destroy_sq: 15370fb2ed66Smajd@mellanox.com if (!qp->sq.wqe_cnt) 15380fb2ed66Smajd@mellanox.com return err; 15390fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_sq(dev, sq); 15400fb2ed66Smajd@mellanox.com err_destroy_tis: 15411cd6dbd3SYishai Hadas destroy_raw_packet_qp_tis(dev, sq, pd); 15420fb2ed66Smajd@mellanox.com 15430fb2ed66Smajd@mellanox.com return err; 15440fb2ed66Smajd@mellanox.com } 15450fb2ed66Smajd@mellanox.com 15460fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp(struct mlx5_ib_dev *dev, 15470fb2ed66Smajd@mellanox.com struct mlx5_ib_qp *qp) 15480fb2ed66Smajd@mellanox.com { 15490fb2ed66Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 15500fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 15510fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 15520fb2ed66Smajd@mellanox.com 15530fb2ed66Smajd@mellanox.com if (qp->rq.wqe_cnt) { 1554443c1cf9SYishai Hadas destroy_raw_packet_qp_tir(dev, rq, qp->flags_en, qp->ibqp.pd); 15550fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_rq(dev, rq); 15560fb2ed66Smajd@mellanox.com } 15570fb2ed66Smajd@mellanox.com 15580fb2ed66Smajd@mellanox.com if (qp->sq.wqe_cnt) { 15590fb2ed66Smajd@mellanox.com destroy_raw_packet_qp_sq(dev, sq); 15601cd6dbd3SYishai Hadas destroy_raw_packet_qp_tis(dev, sq, qp->ibqp.pd); 15610fb2ed66Smajd@mellanox.com } 15620fb2ed66Smajd@mellanox.com } 15630fb2ed66Smajd@mellanox.com 15640fb2ed66Smajd@mellanox.com static void raw_packet_qp_copy_info(struct mlx5_ib_qp *qp, 15650fb2ed66Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp) 15660fb2ed66Smajd@mellanox.com { 15670fb2ed66Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 15680fb2ed66Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 15690fb2ed66Smajd@mellanox.com 15700fb2ed66Smajd@mellanox.com sq->sq = &qp->sq; 15710fb2ed66Smajd@mellanox.com rq->rq = &qp->rq; 15720fb2ed66Smajd@mellanox.com sq->doorbell = &qp->db; 15730fb2ed66Smajd@mellanox.com rq->doorbell = &qp->db; 15740fb2ed66Smajd@mellanox.com } 15750fb2ed66Smajd@mellanox.com 157628d61370SYishai Hadas static void destroy_rss_raw_qp_tir(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp) 157728d61370SYishai Hadas { 15780042f9e4SMark Bloch if (qp->flags_en & (MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC | 15790042f9e4SMark Bloch MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC)) 15800042f9e4SMark Bloch mlx5_ib_disable_lb(dev, false, true); 1581443c1cf9SYishai Hadas mlx5_cmd_destroy_tir(dev->mdev, qp->rss_qp.tirn, 1582443c1cf9SYishai Hadas to_mpd(qp->ibqp.pd)->uid); 158328d61370SYishai Hadas } 158428d61370SYishai Hadas 158528d61370SYishai Hadas static int create_rss_raw_qp_tir(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 158628d61370SYishai Hadas struct ib_pd *pd, 158728d61370SYishai Hadas struct ib_qp_init_attr *init_attr, 158828d61370SYishai Hadas struct ib_udata *udata) 158928d61370SYishai Hadas { 159089944450SShamir Rabinovitch struct mlx5_ib_ucontext *mucontext = rdma_udata_to_drv_context( 159189944450SShamir Rabinovitch udata, struct mlx5_ib_ucontext, ibucontext); 159228d61370SYishai Hadas struct mlx5_ib_create_qp_resp resp = {}; 159328d61370SYishai Hadas int inlen; 15941f1d6abbSAriel Levkovich int outlen; 159528d61370SYishai Hadas int err; 159628d61370SYishai Hadas u32 *in; 15971f1d6abbSAriel Levkovich u32 *out; 159828d61370SYishai Hadas void *tirc; 159928d61370SYishai Hadas void *hfso; 160028d61370SYishai Hadas u32 selected_fields = 0; 16012d93fc85SMatan Barak u32 outer_l4; 160228d61370SYishai Hadas size_t min_resp_len; 160328d61370SYishai Hadas u32 tdn = mucontext->tdn; 160428d61370SYishai Hadas struct mlx5_ib_create_qp_rss ucmd = {}; 160528d61370SYishai Hadas size_t required_cmd_sz; 1606175edba8SMark Bloch u8 lb_flag = 0; 160728d61370SYishai Hadas 160828d61370SYishai Hadas if (init_attr->qp_type != IB_QPT_RAW_PACKET) 160928d61370SYishai Hadas return -EOPNOTSUPP; 161028d61370SYishai Hadas 161128d61370SYishai Hadas if (init_attr->create_flags || init_attr->send_cq) 161228d61370SYishai Hadas return -EINVAL; 161328d61370SYishai Hadas 16142f5ff264SEli Cohen min_resp_len = offsetof(typeof(resp), bfreg_index) + sizeof(resp.bfreg_index); 161528d61370SYishai Hadas if (udata->outlen < min_resp_len) 161628d61370SYishai Hadas return -EINVAL; 161728d61370SYishai Hadas 1618f95ef6cbSMaor Gottlieb required_cmd_sz = offsetof(typeof(ucmd), flags) + sizeof(ucmd.flags); 161928d61370SYishai Hadas if (udata->inlen < required_cmd_sz) { 162028d61370SYishai Hadas mlx5_ib_dbg(dev, "invalid inlen\n"); 162128d61370SYishai Hadas return -EINVAL; 162228d61370SYishai Hadas } 162328d61370SYishai Hadas 162428d61370SYishai Hadas if (udata->inlen > sizeof(ucmd) && 162528d61370SYishai Hadas !ib_is_udata_cleared(udata, sizeof(ucmd), 162628d61370SYishai Hadas udata->inlen - sizeof(ucmd))) { 162728d61370SYishai Hadas mlx5_ib_dbg(dev, "inlen is not supported\n"); 162828d61370SYishai Hadas return -EOPNOTSUPP; 162928d61370SYishai Hadas } 163028d61370SYishai Hadas 163128d61370SYishai Hadas if (ib_copy_from_udata(&ucmd, udata, min(sizeof(ucmd), udata->inlen))) { 163228d61370SYishai Hadas mlx5_ib_dbg(dev, "copy failed\n"); 163328d61370SYishai Hadas return -EFAULT; 163428d61370SYishai Hadas } 163528d61370SYishai Hadas 163628d61370SYishai Hadas if (ucmd.comp_mask) { 163728d61370SYishai Hadas mlx5_ib_dbg(dev, "invalid comp mask\n"); 163828d61370SYishai Hadas return -EOPNOTSUPP; 163928d61370SYishai Hadas } 164028d61370SYishai Hadas 1641175edba8SMark Bloch if (ucmd.flags & ~(MLX5_QP_FLAG_TUNNEL_OFFLOADS | 1642175edba8SMark Bloch MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC | 1643175edba8SMark Bloch MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC)) { 1644f95ef6cbSMaor Gottlieb mlx5_ib_dbg(dev, "invalid flags\n"); 1645f95ef6cbSMaor Gottlieb return -EOPNOTSUPP; 1646f95ef6cbSMaor Gottlieb } 1647f95ef6cbSMaor Gottlieb 1648f95ef6cbSMaor Gottlieb if (ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS && 1649f95ef6cbSMaor Gottlieb !tunnel_offload_supported(dev->mdev)) { 1650f95ef6cbSMaor Gottlieb mlx5_ib_dbg(dev, "tunnel offloads isn't supported\n"); 165128d61370SYishai Hadas return -EOPNOTSUPP; 165228d61370SYishai Hadas } 165328d61370SYishai Hadas 1654309fa347SMaor Gottlieb if (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_INNER && 1655309fa347SMaor Gottlieb !(ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS)) { 1656309fa347SMaor Gottlieb mlx5_ib_dbg(dev, "Tunnel offloads must be set for inner RSS\n"); 1657309fa347SMaor Gottlieb return -EOPNOTSUPP; 1658309fa347SMaor Gottlieb } 1659309fa347SMaor Gottlieb 16606a4d00beSMark Bloch if (ucmd.flags & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC || dev->is_rep) { 1661175edba8SMark Bloch lb_flag |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST; 1662175edba8SMark Bloch qp->flags_en |= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC; 1663175edba8SMark Bloch } 1664175edba8SMark Bloch 1665175edba8SMark Bloch if (ucmd.flags & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC) { 1666175edba8SMark Bloch lb_flag |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST; 1667175edba8SMark Bloch qp->flags_en |= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC; 1668175edba8SMark Bloch } 1669175edba8SMark Bloch 167041d902cbSJason Gunthorpe err = ib_copy_to_udata(udata, &resp, min(udata->outlen, sizeof(resp))); 167128d61370SYishai Hadas if (err) { 167228d61370SYishai Hadas mlx5_ib_dbg(dev, "copy failed\n"); 167328d61370SYishai Hadas return -EINVAL; 167428d61370SYishai Hadas } 167528d61370SYishai Hadas 167628d61370SYishai Hadas inlen = MLX5_ST_SZ_BYTES(create_tir_in); 16771f1d6abbSAriel Levkovich outlen = MLX5_ST_SZ_BYTES(create_tir_out); 16781f1d6abbSAriel Levkovich in = kvzalloc(inlen + outlen, GFP_KERNEL); 167928d61370SYishai Hadas if (!in) 168028d61370SYishai Hadas return -ENOMEM; 168128d61370SYishai Hadas 16821f1d6abbSAriel Levkovich out = in + MLX5_ST_SZ_DW(create_tir_in); 1683443c1cf9SYishai Hadas MLX5_SET(create_tir_in, in, uid, to_mpd(pd)->uid); 168428d61370SYishai Hadas tirc = MLX5_ADDR_OF(create_tir_in, in, ctx); 168528d61370SYishai Hadas MLX5_SET(tirc, tirc, disp_type, 168628d61370SYishai Hadas MLX5_TIRC_DISP_TYPE_INDIRECT); 168728d61370SYishai Hadas MLX5_SET(tirc, tirc, indirect_table, 168828d61370SYishai Hadas init_attr->rwq_ind_tbl->ind_tbl_num); 168928d61370SYishai Hadas MLX5_SET(tirc, tirc, transport_domain, tdn); 169028d61370SYishai Hadas 169128d61370SYishai Hadas hfso = MLX5_ADDR_OF(tirc, tirc, rx_hash_field_selector_outer); 1692f95ef6cbSMaor Gottlieb 1693f95ef6cbSMaor Gottlieb if (ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS) 1694f95ef6cbSMaor Gottlieb MLX5_SET(tirc, tirc, tunneled_offload_en, 1); 1695f95ef6cbSMaor Gottlieb 1696175edba8SMark Bloch MLX5_SET(tirc, tirc, self_lb_block, lb_flag); 1697175edba8SMark Bloch 1698309fa347SMaor Gottlieb if (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_INNER) 1699309fa347SMaor Gottlieb hfso = MLX5_ADDR_OF(tirc, tirc, rx_hash_field_selector_inner); 1700309fa347SMaor Gottlieb else 1701309fa347SMaor Gottlieb hfso = MLX5_ADDR_OF(tirc, tirc, rx_hash_field_selector_outer); 1702309fa347SMaor Gottlieb 170328d61370SYishai Hadas switch (ucmd.rx_hash_function) { 170428d61370SYishai Hadas case MLX5_RX_HASH_FUNC_TOEPLITZ: 170528d61370SYishai Hadas { 170628d61370SYishai Hadas void *rss_key = MLX5_ADDR_OF(tirc, tirc, rx_hash_toeplitz_key); 170728d61370SYishai Hadas size_t len = MLX5_FLD_SZ_BYTES(tirc, rx_hash_toeplitz_key); 170828d61370SYishai Hadas 170928d61370SYishai Hadas if (len != ucmd.rx_key_len) { 171028d61370SYishai Hadas err = -EINVAL; 171128d61370SYishai Hadas goto err; 171228d61370SYishai Hadas } 171328d61370SYishai Hadas 171428d61370SYishai Hadas MLX5_SET(tirc, tirc, rx_hash_fn, MLX5_RX_HASH_FN_TOEPLITZ); 171528d61370SYishai Hadas MLX5_SET(tirc, tirc, rx_hash_symmetric, 1); 171628d61370SYishai Hadas memcpy(rss_key, ucmd.rx_hash_key, len); 171728d61370SYishai Hadas break; 171828d61370SYishai Hadas } 171928d61370SYishai Hadas default: 172028d61370SYishai Hadas err = -EOPNOTSUPP; 172128d61370SYishai Hadas goto err; 172228d61370SYishai Hadas } 172328d61370SYishai Hadas 172428d61370SYishai Hadas if (!ucmd.rx_hash_fields_mask) { 172528d61370SYishai Hadas /* special case when this TIR serves as steering entry without hashing */ 172628d61370SYishai Hadas if (!init_attr->rwq_ind_tbl->log_ind_tbl_size) 172728d61370SYishai Hadas goto create_tir; 172828d61370SYishai Hadas err = -EINVAL; 172928d61370SYishai Hadas goto err; 173028d61370SYishai Hadas } 173128d61370SYishai Hadas 173228d61370SYishai Hadas if (((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV4) || 173328d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV4)) && 173428d61370SYishai Hadas ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV6) || 173528d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV6))) { 173628d61370SYishai Hadas err = -EINVAL; 173728d61370SYishai Hadas goto err; 173828d61370SYishai Hadas } 173928d61370SYishai Hadas 174028d61370SYishai Hadas /* If none of IPV4 & IPV6 SRC/DST was set - this bit field is ignored */ 174128d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV4) || 174228d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV4)) 174328d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, l3_prot_type, 174428d61370SYishai Hadas MLX5_L3_PROT_TYPE_IPV4); 174528d61370SYishai Hadas else if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV6) || 174628d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV6)) 174728d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, l3_prot_type, 174828d61370SYishai Hadas MLX5_L3_PROT_TYPE_IPV6); 174928d61370SYishai Hadas 17502d93fc85SMatan Barak outer_l4 = ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_TCP) || 17512d93fc85SMatan Barak (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_TCP)) << 0 | 175228d61370SYishai Hadas ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_UDP) || 17532d93fc85SMatan Barak (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_UDP)) << 1 | 17542d93fc85SMatan Barak (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_IPSEC_SPI) << 2; 17552d93fc85SMatan Barak 17562d93fc85SMatan Barak /* Check that only one l4 protocol is set */ 17572d93fc85SMatan Barak if (outer_l4 & (outer_l4 - 1)) { 175828d61370SYishai Hadas err = -EINVAL; 175928d61370SYishai Hadas goto err; 176028d61370SYishai Hadas } 176128d61370SYishai Hadas 176228d61370SYishai Hadas /* If none of TCP & UDP SRC/DST was set - this bit field is ignored */ 176328d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_TCP) || 176428d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_TCP)) 176528d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, l4_prot_type, 176628d61370SYishai Hadas MLX5_L4_PROT_TYPE_TCP); 176728d61370SYishai Hadas else if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_UDP) || 176828d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_UDP)) 176928d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, l4_prot_type, 177028d61370SYishai Hadas MLX5_L4_PROT_TYPE_UDP); 177128d61370SYishai Hadas 177228d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV4) || 177328d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV6)) 177428d61370SYishai Hadas selected_fields |= MLX5_HASH_FIELD_SEL_SRC_IP; 177528d61370SYishai Hadas 177628d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV4) || 177728d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV6)) 177828d61370SYishai Hadas selected_fields |= MLX5_HASH_FIELD_SEL_DST_IP; 177928d61370SYishai Hadas 178028d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_TCP) || 178128d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_UDP)) 178228d61370SYishai Hadas selected_fields |= MLX5_HASH_FIELD_SEL_L4_SPORT; 178328d61370SYishai Hadas 178428d61370SYishai Hadas if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_TCP) || 178528d61370SYishai Hadas (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_UDP)) 178628d61370SYishai Hadas selected_fields |= MLX5_HASH_FIELD_SEL_L4_DPORT; 178728d61370SYishai Hadas 17882d93fc85SMatan Barak if (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_IPSEC_SPI) 17892d93fc85SMatan Barak selected_fields |= MLX5_HASH_FIELD_SEL_IPSEC_SPI; 17902d93fc85SMatan Barak 179128d61370SYishai Hadas MLX5_SET(rx_hash_field_select, hfso, selected_fields, selected_fields); 179228d61370SYishai Hadas 179328d61370SYishai Hadas create_tir: 17941f1d6abbSAriel Levkovich err = mlx5_core_create_tir_out(dev->mdev, in, inlen, out, outlen); 179528d61370SYishai Hadas 17961f1d6abbSAriel Levkovich qp->rss_qp.tirn = MLX5_GET(create_tir_out, out, tirn); 17970042f9e4SMark Bloch if (!err && MLX5_GET(tirc, tirc, self_lb_block)) { 17980042f9e4SMark Bloch err = mlx5_ib_enable_lb(dev, false, true); 17990042f9e4SMark Bloch 18000042f9e4SMark Bloch if (err) 1801443c1cf9SYishai Hadas mlx5_cmd_destroy_tir(dev->mdev, qp->rss_qp.tirn, 1802443c1cf9SYishai Hadas to_mpd(pd)->uid); 18030042f9e4SMark Bloch } 18040042f9e4SMark Bloch 180528d61370SYishai Hadas if (err) 180628d61370SYishai Hadas goto err; 180728d61370SYishai Hadas 18087f72052cSYishai Hadas if (mucontext->devx_uid) { 18097f72052cSYishai Hadas resp.comp_mask |= MLX5_IB_CREATE_QP_RESP_MASK_TIRN; 18107f72052cSYishai Hadas resp.tirn = qp->rss_qp.tirn; 18111f1d6abbSAriel Levkovich if (MLX5_CAP_FLOWTABLE_NIC_RX(dev->mdev, sw_owner)) { 18121f1d6abbSAriel Levkovich resp.tir_icm_addr = 18131f1d6abbSAriel Levkovich MLX5_GET(create_tir_out, out, icm_address_31_0); 18141f1d6abbSAriel Levkovich resp.tir_icm_addr |= (u64)MLX5_GET(create_tir_out, out, 18151f1d6abbSAriel Levkovich icm_address_39_32) 18161f1d6abbSAriel Levkovich << 32; 18171f1d6abbSAriel Levkovich resp.tir_icm_addr |= (u64)MLX5_GET(create_tir_out, out, 18181f1d6abbSAriel Levkovich icm_address_63_40) 18191f1d6abbSAriel Levkovich << 40; 18201f1d6abbSAriel Levkovich resp.comp_mask |= 18211f1d6abbSAriel Levkovich MLX5_IB_CREATE_QP_RESP_MASK_TIR_ICM_ADDR; 18221f1d6abbSAriel Levkovich } 18237f72052cSYishai Hadas } 18247f72052cSYishai Hadas 18257f72052cSYishai Hadas err = ib_copy_to_udata(udata, &resp, min(udata->outlen, sizeof(resp))); 18267f72052cSYishai Hadas if (err) 18277f72052cSYishai Hadas goto err_copy; 18287f72052cSYishai Hadas 182928d61370SYishai Hadas kvfree(in); 183028d61370SYishai Hadas /* qpn is reserved for that QP */ 183128d61370SYishai Hadas qp->trans_qp.base.mqp.qpn = 0; 1832d9f88e5aSYishai Hadas qp->flags |= MLX5_IB_QP_RSS; 183328d61370SYishai Hadas return 0; 183428d61370SYishai Hadas 18357f72052cSYishai Hadas err_copy: 18367f72052cSYishai Hadas mlx5_cmd_destroy_tir(dev->mdev, qp->rss_qp.tirn, mucontext->devx_uid); 183728d61370SYishai Hadas err: 183828d61370SYishai Hadas kvfree(in); 183928d61370SYishai Hadas return err; 184028d61370SYishai Hadas } 184128d61370SYishai Hadas 18425d6ff1baSYonatan Cohen static void configure_responder_scat_cqe(struct ib_qp_init_attr *init_attr, 18435d6ff1baSYonatan Cohen void *qpc) 18445d6ff1baSYonatan Cohen { 18455d6ff1baSYonatan Cohen int rcqe_sz; 18465d6ff1baSYonatan Cohen 18475d6ff1baSYonatan Cohen if (init_attr->qp_type == MLX5_IB_QPT_DCI) 18485d6ff1baSYonatan Cohen return; 18495d6ff1baSYonatan Cohen 18505d6ff1baSYonatan Cohen rcqe_sz = mlx5_ib_get_cqe_size(init_attr->recv_cq); 18515d6ff1baSYonatan Cohen 18527249c8eaSGuy Levi if (init_attr->qp_type == MLX5_IB_QPT_DCT) { 18537249c8eaSGuy Levi if (rcqe_sz == 128) 18547249c8eaSGuy Levi MLX5_SET(dctc, qpc, cs_res, MLX5_RES_SCAT_DATA64_CQE); 18557249c8eaSGuy Levi 18565d6ff1baSYonatan Cohen return; 18575d6ff1baSYonatan Cohen } 18585d6ff1baSYonatan Cohen 18597249c8eaSGuy Levi MLX5_SET(qpc, qpc, cs_res, 18607249c8eaSGuy Levi rcqe_sz == 128 ? MLX5_RES_SCAT_DATA64_CQE : 18617249c8eaSGuy Levi MLX5_RES_SCAT_DATA32_CQE); 18625d6ff1baSYonatan Cohen } 18635d6ff1baSYonatan Cohen 18645d6ff1baSYonatan Cohen static void configure_requester_scat_cqe(struct mlx5_ib_dev *dev, 18655d6ff1baSYonatan Cohen struct ib_qp_init_attr *init_attr, 18666f4bc0eaSYonatan Cohen struct mlx5_ib_create_qp *ucmd, 18675d6ff1baSYonatan Cohen void *qpc) 18685d6ff1baSYonatan Cohen { 18695d6ff1baSYonatan Cohen enum ib_qp_type qpt = init_attr->qp_type; 18705d6ff1baSYonatan Cohen int scqe_sz; 18716f4bc0eaSYonatan Cohen bool allow_scat_cqe = 0; 18725d6ff1baSYonatan Cohen 18735d6ff1baSYonatan Cohen if (qpt == IB_QPT_UC || qpt == IB_QPT_UD) 18745d6ff1baSYonatan Cohen return; 18755d6ff1baSYonatan Cohen 18766f4bc0eaSYonatan Cohen if (ucmd) 18776f4bc0eaSYonatan Cohen allow_scat_cqe = ucmd->flags & MLX5_QP_FLAG_ALLOW_SCATTER_CQE; 18786f4bc0eaSYonatan Cohen 18796f4bc0eaSYonatan Cohen if (!allow_scat_cqe && init_attr->sq_sig_type != IB_SIGNAL_ALL_WR) 18805d6ff1baSYonatan Cohen return; 18815d6ff1baSYonatan Cohen 18825d6ff1baSYonatan Cohen scqe_sz = mlx5_ib_get_cqe_size(init_attr->send_cq); 18835d6ff1baSYonatan Cohen if (scqe_sz == 128) { 18845d6ff1baSYonatan Cohen MLX5_SET(qpc, qpc, cs_req, MLX5_REQ_SCAT_DATA64_CQE); 18855d6ff1baSYonatan Cohen return; 18865d6ff1baSYonatan Cohen } 18875d6ff1baSYonatan Cohen 18885d6ff1baSYonatan Cohen if (init_attr->qp_type != MLX5_IB_QPT_DCI || 18895d6ff1baSYonatan Cohen MLX5_CAP_GEN(dev->mdev, dc_req_scat_data_cqe)) 18905d6ff1baSYonatan Cohen MLX5_SET(qpc, qpc, cs_req, MLX5_REQ_SCAT_DATA32_CQE); 18915d6ff1baSYonatan Cohen } 18925d6ff1baSYonatan Cohen 1893a60109dcSYonatan Cohen static int atomic_size_to_mode(int size_mask) 1894a60109dcSYonatan Cohen { 1895a60109dcSYonatan Cohen /* driver does not support atomic_size > 256B 1896a60109dcSYonatan Cohen * and does not know how to translate bigger sizes 1897a60109dcSYonatan Cohen */ 1898a60109dcSYonatan Cohen int supported_size_mask = size_mask & 0x1ff; 1899a60109dcSYonatan Cohen int log_max_size; 1900a60109dcSYonatan Cohen 1901a60109dcSYonatan Cohen if (!supported_size_mask) 1902a60109dcSYonatan Cohen return -EOPNOTSUPP; 1903a60109dcSYonatan Cohen 1904a60109dcSYonatan Cohen log_max_size = __fls(supported_size_mask); 1905a60109dcSYonatan Cohen 1906a60109dcSYonatan Cohen if (log_max_size > 3) 1907a60109dcSYonatan Cohen return log_max_size; 1908a60109dcSYonatan Cohen 1909a60109dcSYonatan Cohen return MLX5_ATOMIC_MODE_8B; 1910a60109dcSYonatan Cohen } 1911a60109dcSYonatan Cohen 1912a60109dcSYonatan Cohen static int get_atomic_mode(struct mlx5_ib_dev *dev, 1913a60109dcSYonatan Cohen enum ib_qp_type qp_type) 1914a60109dcSYonatan Cohen { 1915a60109dcSYonatan Cohen u8 atomic_operations = MLX5_CAP_ATOMIC(dev->mdev, atomic_operations); 1916a60109dcSYonatan Cohen u8 atomic = MLX5_CAP_GEN(dev->mdev, atomic); 1917a60109dcSYonatan Cohen int atomic_mode = -EOPNOTSUPP; 1918a60109dcSYonatan Cohen int atomic_size_mask; 1919a60109dcSYonatan Cohen 1920a60109dcSYonatan Cohen if (!atomic) 1921a60109dcSYonatan Cohen return -EOPNOTSUPP; 1922a60109dcSYonatan Cohen 1923a60109dcSYonatan Cohen if (qp_type == MLX5_IB_QPT_DCT) 1924a60109dcSYonatan Cohen atomic_size_mask = MLX5_CAP_ATOMIC(dev->mdev, atomic_size_dc); 1925a60109dcSYonatan Cohen else 1926a60109dcSYonatan Cohen atomic_size_mask = MLX5_CAP_ATOMIC(dev->mdev, atomic_size_qp); 1927a60109dcSYonatan Cohen 1928a60109dcSYonatan Cohen if ((atomic_operations & MLX5_ATOMIC_OPS_EXTENDED_CMP_SWAP) || 1929a60109dcSYonatan Cohen (atomic_operations & MLX5_ATOMIC_OPS_EXTENDED_FETCH_ADD)) 1930a60109dcSYonatan Cohen atomic_mode = atomic_size_to_mode(atomic_size_mask); 1931a60109dcSYonatan Cohen 1932a60109dcSYonatan Cohen if (atomic_mode <= 0 && 1933a60109dcSYonatan Cohen (atomic_operations & MLX5_ATOMIC_OPS_CMP_SWAP && 1934a60109dcSYonatan Cohen atomic_operations & MLX5_ATOMIC_OPS_FETCH_ADD)) 1935a60109dcSYonatan Cohen atomic_mode = MLX5_ATOMIC_MODE_IB_COMP; 1936a60109dcSYonatan Cohen 1937a60109dcSYonatan Cohen return atomic_mode; 1938a60109dcSYonatan Cohen } 1939a60109dcSYonatan Cohen 19402e43bb31SYonatan Cohen static inline bool check_flags_mask(uint64_t input, uint64_t supported) 19412e43bb31SYonatan Cohen { 19422e43bb31SYonatan Cohen return (input & ~supported) == 0; 19432e43bb31SYonatan Cohen } 19442e43bb31SYonatan Cohen 1945e126ba97SEli Cohen static int create_qp_common(struct mlx5_ib_dev *dev, struct ib_pd *pd, 1946e126ba97SEli Cohen struct ib_qp_init_attr *init_attr, 1947e126ba97SEli Cohen struct ib_udata *udata, struct mlx5_ib_qp *qp) 1948e126ba97SEli Cohen { 1949e126ba97SEli Cohen struct mlx5_ib_resources *devr = &dev->devr; 195009a7d9ecSSaeed Mahameed int inlen = MLX5_ST_SZ_BYTES(create_qp_in); 1951938fe83cSSaeed Mahameed struct mlx5_core_dev *mdev = dev->mdev; 19520625b4baSJason Gunthorpe struct mlx5_ib_create_qp_resp resp = {}; 195389944450SShamir Rabinovitch struct mlx5_ib_ucontext *ucontext = rdma_udata_to_drv_context( 195489944450SShamir Rabinovitch udata, struct mlx5_ib_ucontext, ibucontext); 195589ea94a7SMaor Gottlieb struct mlx5_ib_cq *send_cq; 195689ea94a7SMaor Gottlieb struct mlx5_ib_cq *recv_cq; 195789ea94a7SMaor Gottlieb unsigned long flags; 1958cfb5e088SHaggai Abramovsky u32 uidx = MLX5_IB_DEFAULT_UIDX; 195909a7d9ecSSaeed Mahameed struct mlx5_ib_create_qp ucmd; 196009a7d9ecSSaeed Mahameed struct mlx5_ib_qp_base *base; 1961e7b169f3SNoa Osherovich int mlx5_st; 1962cfb5e088SHaggai Abramovsky void *qpc; 196309a7d9ecSSaeed Mahameed u32 *in; 196409a7d9ecSSaeed Mahameed int err; 1965e126ba97SEli Cohen 1966e126ba97SEli Cohen mutex_init(&qp->mutex); 1967e126ba97SEli Cohen spin_lock_init(&qp->sq.lock); 1968e126ba97SEli Cohen spin_lock_init(&qp->rq.lock); 1969e126ba97SEli Cohen 1970e7b169f3SNoa Osherovich mlx5_st = to_mlx5_st(init_attr->qp_type); 1971e7b169f3SNoa Osherovich if (mlx5_st < 0) 1972e7b169f3SNoa Osherovich return -EINVAL; 1973e7b169f3SNoa Osherovich 197428d61370SYishai Hadas if (init_attr->rwq_ind_tbl) { 197528d61370SYishai Hadas if (!udata) 197628d61370SYishai Hadas return -ENOSYS; 197728d61370SYishai Hadas 197828d61370SYishai Hadas err = create_rss_raw_qp_tir(dev, qp, pd, init_attr, udata); 197928d61370SYishai Hadas return err; 198028d61370SYishai Hadas } 198128d61370SYishai Hadas 1982f360d88aSEli Cohen if (init_attr->create_flags & IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK) { 1983938fe83cSSaeed Mahameed if (!MLX5_CAP_GEN(mdev, block_lb_mc)) { 1984f360d88aSEli Cohen mlx5_ib_dbg(dev, "block multicast loopback isn't supported\n"); 1985f360d88aSEli Cohen return -EINVAL; 1986f360d88aSEli Cohen } else { 1987f360d88aSEli Cohen qp->flags |= MLX5_IB_QP_BLOCK_MULTICAST_LOOPBACK; 1988f360d88aSEli Cohen } 1989f360d88aSEli Cohen } 1990f360d88aSEli Cohen 1991051f2630SLeon Romanovsky if (init_attr->create_flags & 1992051f2630SLeon Romanovsky (IB_QP_CREATE_CROSS_CHANNEL | 1993051f2630SLeon Romanovsky IB_QP_CREATE_MANAGED_SEND | 1994051f2630SLeon Romanovsky IB_QP_CREATE_MANAGED_RECV)) { 1995051f2630SLeon Romanovsky if (!MLX5_CAP_GEN(mdev, cd)) { 1996051f2630SLeon Romanovsky mlx5_ib_dbg(dev, "cross-channel isn't supported\n"); 1997051f2630SLeon Romanovsky return -EINVAL; 1998051f2630SLeon Romanovsky } 1999051f2630SLeon Romanovsky if (init_attr->create_flags & IB_QP_CREATE_CROSS_CHANNEL) 2000051f2630SLeon Romanovsky qp->flags |= MLX5_IB_QP_CROSS_CHANNEL; 2001051f2630SLeon Romanovsky if (init_attr->create_flags & IB_QP_CREATE_MANAGED_SEND) 2002051f2630SLeon Romanovsky qp->flags |= MLX5_IB_QP_MANAGED_SEND; 2003051f2630SLeon Romanovsky if (init_attr->create_flags & IB_QP_CREATE_MANAGED_RECV) 2004051f2630SLeon Romanovsky qp->flags |= MLX5_IB_QP_MANAGED_RECV; 2005051f2630SLeon Romanovsky } 2006f0313965SErez Shitrit 2007f0313965SErez Shitrit if (init_attr->qp_type == IB_QPT_UD && 2008f0313965SErez Shitrit (init_attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO)) 2009f0313965SErez Shitrit if (!MLX5_CAP_GEN(mdev, ipoib_basic_offloads)) { 2010f0313965SErez Shitrit mlx5_ib_dbg(dev, "ipoib UD lso qp isn't supported\n"); 2011f0313965SErez Shitrit return -EOPNOTSUPP; 2012f0313965SErez Shitrit } 2013f0313965SErez Shitrit 2014358e42eaSMajd Dibbiny if (init_attr->create_flags & IB_QP_CREATE_SCATTER_FCS) { 2015358e42eaSMajd Dibbiny if (init_attr->qp_type != IB_QPT_RAW_PACKET) { 2016358e42eaSMajd Dibbiny mlx5_ib_dbg(dev, "Scatter FCS is supported only for Raw Packet QPs"); 2017358e42eaSMajd Dibbiny return -EOPNOTSUPP; 2018358e42eaSMajd Dibbiny } 2019358e42eaSMajd Dibbiny if (!MLX5_CAP_GEN(dev->mdev, eth_net_offloads) || 2020358e42eaSMajd Dibbiny !MLX5_CAP_ETH(dev->mdev, scatter_fcs)) { 2021358e42eaSMajd Dibbiny mlx5_ib_dbg(dev, "Scatter FCS isn't supported\n"); 2022358e42eaSMajd Dibbiny return -EOPNOTSUPP; 2023358e42eaSMajd Dibbiny } 2024358e42eaSMajd Dibbiny qp->flags |= MLX5_IB_QP_CAP_SCATTER_FCS; 2025358e42eaSMajd Dibbiny } 2026358e42eaSMajd Dibbiny 2027e126ba97SEli Cohen if (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR) 2028e126ba97SEli Cohen qp->sq_signal_bits = MLX5_WQE_CTRL_CQ_UPDATE; 2029e126ba97SEli Cohen 2030e4cc4fa7SNoa Osherovich if (init_attr->create_flags & IB_QP_CREATE_CVLAN_STRIPPING) { 2031e4cc4fa7SNoa Osherovich if (!(MLX5_CAP_GEN(dev->mdev, eth_net_offloads) && 2032e4cc4fa7SNoa Osherovich MLX5_CAP_ETH(dev->mdev, vlan_cap)) || 2033e4cc4fa7SNoa Osherovich (init_attr->qp_type != IB_QPT_RAW_PACKET)) 2034e4cc4fa7SNoa Osherovich return -EOPNOTSUPP; 2035e4cc4fa7SNoa Osherovich qp->flags |= MLX5_IB_QP_CVLAN_STRIPPING; 2036e4cc4fa7SNoa Osherovich } 2037e4cc4fa7SNoa Osherovich 2038e00b64f7SShamir Rabinovitch if (udata) { 2039e126ba97SEli Cohen if (ib_copy_from_udata(&ucmd, udata, sizeof(ucmd))) { 2040e126ba97SEli Cohen mlx5_ib_dbg(dev, "copy failed\n"); 2041e126ba97SEli Cohen return -EFAULT; 2042e126ba97SEli Cohen } 2043e126ba97SEli Cohen 20442e43bb31SYonatan Cohen if (!check_flags_mask(ucmd.flags, 2045569c6651SDanit Goldberg MLX5_QP_FLAG_ALLOW_SCATTER_CQE | 20468af526e0SMark Bloch MLX5_QP_FLAG_BFREG_INDEX | 20478af526e0SMark Bloch MLX5_QP_FLAG_PACKET_BASED_CREDIT_MODE | 20488af526e0SMark Bloch MLX5_QP_FLAG_SCATTER_CQE | 20498af526e0SMark Bloch MLX5_QP_FLAG_SIGNATURE | 20508af526e0SMark Bloch MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC | 20518af526e0SMark Bloch MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC | 20528af526e0SMark Bloch MLX5_QP_FLAG_TUNNEL_OFFLOADS | 20538af526e0SMark Bloch MLX5_QP_FLAG_TYPE_DCI | 20548af526e0SMark Bloch MLX5_QP_FLAG_TYPE_DCT)) 20552e43bb31SYonatan Cohen return -EINVAL; 20562e43bb31SYonatan Cohen 205789944450SShamir Rabinovitch err = get_qp_user_index(ucontext, &ucmd, udata->inlen, &uidx); 2058cfb5e088SHaggai Abramovsky if (err) 2059cfb5e088SHaggai Abramovsky return err; 2060cfb5e088SHaggai Abramovsky 2061e126ba97SEli Cohen qp->wq_sig = !!(ucmd.flags & MLX5_QP_FLAG_SIGNATURE); 20625d6ff1baSYonatan Cohen if (MLX5_CAP_GEN(dev->mdev, sctr_data_cqe)) 2063e126ba97SEli Cohen qp->scat_cqe = !!(ucmd.flags & MLX5_QP_FLAG_SCATTER_CQE); 2064f95ef6cbSMaor Gottlieb if (ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS) { 2065f95ef6cbSMaor Gottlieb if (init_attr->qp_type != IB_QPT_RAW_PACKET || 2066f95ef6cbSMaor Gottlieb !tunnel_offload_supported(mdev)) { 2067f95ef6cbSMaor Gottlieb mlx5_ib_dbg(dev, "Tunnel offload isn't supported\n"); 2068f95ef6cbSMaor Gottlieb return -EOPNOTSUPP; 2069f95ef6cbSMaor Gottlieb } 2070175edba8SMark Bloch qp->flags_en |= MLX5_QP_FLAG_TUNNEL_OFFLOADS; 2071175edba8SMark Bloch } 2072175edba8SMark Bloch 2073175edba8SMark Bloch if (ucmd.flags & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC) { 2074175edba8SMark Bloch if (init_attr->qp_type != IB_QPT_RAW_PACKET) { 2075175edba8SMark Bloch mlx5_ib_dbg(dev, "Self-LB UC isn't supported\n"); 2076175edba8SMark Bloch return -EOPNOTSUPP; 2077175edba8SMark Bloch } 2078175edba8SMark Bloch qp->flags_en |= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC; 2079175edba8SMark Bloch } 2080175edba8SMark Bloch 2081175edba8SMark Bloch if (ucmd.flags & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC) { 2082175edba8SMark Bloch if (init_attr->qp_type != IB_QPT_RAW_PACKET) { 2083175edba8SMark Bloch mlx5_ib_dbg(dev, "Self-LB UM isn't supported\n"); 2084175edba8SMark Bloch return -EOPNOTSUPP; 2085175edba8SMark Bloch } 2086175edba8SMark Bloch qp->flags_en |= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC; 2087f95ef6cbSMaor Gottlieb } 2088c2e53b2cSYishai Hadas 2089569c6651SDanit Goldberg if (ucmd.flags & MLX5_QP_FLAG_PACKET_BASED_CREDIT_MODE) { 2090569c6651SDanit Goldberg if (init_attr->qp_type != IB_QPT_RC || 2091569c6651SDanit Goldberg !MLX5_CAP_GEN(dev->mdev, qp_packet_based)) { 2092569c6651SDanit Goldberg mlx5_ib_dbg(dev, "packet based credit mode isn't supported\n"); 2093569c6651SDanit Goldberg return -EOPNOTSUPP; 2094569c6651SDanit Goldberg } 2095569c6651SDanit Goldberg qp->flags |= MLX5_IB_QP_PACKET_BASED_CREDIT; 2096569c6651SDanit Goldberg } 2097569c6651SDanit Goldberg 2098c2e53b2cSYishai Hadas if (init_attr->create_flags & IB_QP_CREATE_SOURCE_QPN) { 2099c2e53b2cSYishai Hadas if (init_attr->qp_type != IB_QPT_UD || 2100c2e53b2cSYishai Hadas (MLX5_CAP_GEN(dev->mdev, port_type) != 2101c2e53b2cSYishai Hadas MLX5_CAP_PORT_TYPE_IB) || 2102c2e53b2cSYishai Hadas !mlx5_get_flow_namespace(dev->mdev, MLX5_FLOW_NAMESPACE_BYPASS)) { 2103c2e53b2cSYishai Hadas mlx5_ib_dbg(dev, "Source QP option isn't supported\n"); 2104c2e53b2cSYishai Hadas return -EOPNOTSUPP; 2105c2e53b2cSYishai Hadas } 2106c2e53b2cSYishai Hadas 2107c2e53b2cSYishai Hadas qp->flags |= MLX5_IB_QP_UNDERLAY; 2108c2e53b2cSYishai Hadas qp->underlay_qpn = init_attr->source_qpn; 2109c2e53b2cSYishai Hadas } 2110e126ba97SEli Cohen } else { 2111e126ba97SEli Cohen qp->wq_sig = !!wq_signature; 2112e126ba97SEli Cohen } 2113e126ba97SEli Cohen 2114c2e53b2cSYishai Hadas base = (init_attr->qp_type == IB_QPT_RAW_PACKET || 2115c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) ? 2116c2e53b2cSYishai Hadas &qp->raw_packet_qp.rq.base : 2117c2e53b2cSYishai Hadas &qp->trans_qp.base; 2118c2e53b2cSYishai Hadas 2119e126ba97SEli Cohen qp->has_rq = qp_has_rq(init_attr); 2120e126ba97SEli Cohen err = set_rq_size(dev, &init_attr->cap, qp->has_rq, 2121e00b64f7SShamir Rabinovitch qp, udata ? &ucmd : NULL); 2122e126ba97SEli Cohen if (err) { 2123e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 2124e126ba97SEli Cohen return err; 2125e126ba97SEli Cohen } 2126e126ba97SEli Cohen 2127e126ba97SEli Cohen if (pd) { 2128e00b64f7SShamir Rabinovitch if (udata) { 2129938fe83cSSaeed Mahameed __u32 max_wqes = 2130938fe83cSSaeed Mahameed 1 << MLX5_CAP_GEN(mdev, log_max_qp_sz); 2131e126ba97SEli Cohen mlx5_ib_dbg(dev, "requested sq_wqe_count (%d)\n", ucmd.sq_wqe_count); 2132e126ba97SEli Cohen if (ucmd.rq_wqe_shift != qp->rq.wqe_shift || 2133e126ba97SEli Cohen ucmd.rq_wqe_count != qp->rq.wqe_cnt) { 2134e126ba97SEli Cohen mlx5_ib_dbg(dev, "invalid rq params\n"); 2135e126ba97SEli Cohen return -EINVAL; 2136e126ba97SEli Cohen } 2137938fe83cSSaeed Mahameed if (ucmd.sq_wqe_count > max_wqes) { 2138e126ba97SEli Cohen mlx5_ib_dbg(dev, "requested sq_wqe_count (%d) > max allowed (%d)\n", 2139938fe83cSSaeed Mahameed ucmd.sq_wqe_count, max_wqes); 2140e126ba97SEli Cohen return -EINVAL; 2141e126ba97SEli Cohen } 2142b11a4f9cSHaggai Eran if (init_attr->create_flags & 2143b11a4f9cSHaggai Eran mlx5_ib_create_qp_sqpn_qp1()) { 2144b11a4f9cSHaggai Eran mlx5_ib_dbg(dev, "user-space is not allowed to create UD QPs spoofing as QP1\n"); 2145b11a4f9cSHaggai Eran return -EINVAL; 2146b11a4f9cSHaggai Eran } 21470fb2ed66Smajd@mellanox.com err = create_user_qp(dev, pd, qp, udata, init_attr, &in, 21480fb2ed66Smajd@mellanox.com &resp, &inlen, base); 2149e126ba97SEli Cohen if (err) 2150e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 2151e126ba97SEli Cohen } else { 215219098df2Smajd@mellanox.com err = create_kernel_qp(dev, init_attr, qp, &in, &inlen, 215319098df2Smajd@mellanox.com base); 2154e126ba97SEli Cohen if (err) 2155e126ba97SEli Cohen mlx5_ib_dbg(dev, "err %d\n", err); 2156e126ba97SEli Cohen } 2157e126ba97SEli Cohen 2158e126ba97SEli Cohen if (err) 2159e126ba97SEli Cohen return err; 2160e126ba97SEli Cohen } else { 21611b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 2162e126ba97SEli Cohen if (!in) 2163e126ba97SEli Cohen return -ENOMEM; 2164e126ba97SEli Cohen 2165e126ba97SEli Cohen qp->create_type = MLX5_QP_EMPTY; 2166e126ba97SEli Cohen } 2167e126ba97SEli Cohen 2168e126ba97SEli Cohen if (is_sqp(init_attr->qp_type)) 2169e126ba97SEli Cohen qp->port = init_attr->port_num; 2170e126ba97SEli Cohen 217109a7d9ecSSaeed Mahameed qpc = MLX5_ADDR_OF(create_qp_in, in, qpc); 217209a7d9ecSSaeed Mahameed 2173e7b169f3SNoa Osherovich MLX5_SET(qpc, qpc, st, mlx5_st); 217409a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, pm_state, MLX5_QP_PM_MIGRATED); 2175e126ba97SEli Cohen 2176e126ba97SEli Cohen if (init_attr->qp_type != MLX5_IB_QPT_REG_UMR) 217709a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, pd, to_mpd(pd ? pd : devr->p0)->pdn); 2178e126ba97SEli Cohen else 217909a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, latency_sensitive, 1); 218009a7d9ecSSaeed Mahameed 2181e126ba97SEli Cohen 2182e126ba97SEli Cohen if (qp->wq_sig) 218309a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, wq_signature, 1); 2184e126ba97SEli Cohen 2185f360d88aSEli Cohen if (qp->flags & MLX5_IB_QP_BLOCK_MULTICAST_LOOPBACK) 218609a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, block_lb_mc, 1); 2187f360d88aSEli Cohen 2188051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_CROSS_CHANNEL) 218909a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cd_master, 1); 2190051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_MANAGED_SEND) 219109a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cd_slave_send, 1); 2192051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_MANAGED_RECV) 219309a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cd_slave_receive, 1); 2194569c6651SDanit Goldberg if (qp->flags & MLX5_IB_QP_PACKET_BASED_CREDIT) 2195569c6651SDanit Goldberg MLX5_SET(qpc, qpc, req_e2e_credit_mode, 1); 2196e126ba97SEli Cohen if (qp->scat_cqe && is_connected(init_attr->qp_type)) { 21975d6ff1baSYonatan Cohen configure_responder_scat_cqe(init_attr, qpc); 21986f4bc0eaSYonatan Cohen configure_requester_scat_cqe(dev, init_attr, 2199e00b64f7SShamir Rabinovitch udata ? &ucmd : NULL, 22006f4bc0eaSYonatan Cohen qpc); 2201e126ba97SEli Cohen } 2202e126ba97SEli Cohen 2203e126ba97SEli Cohen if (qp->rq.wqe_cnt) { 220409a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_rq_stride, qp->rq.wqe_shift - 4); 220509a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_rq_size, ilog2(qp->rq.wqe_cnt)); 2206e126ba97SEli Cohen } 2207e126ba97SEli Cohen 220809a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, rq_type, get_rx_type(qp, init_attr)); 2209e126ba97SEli Cohen 22103fd3307eSArtemy Kovalyov if (qp->sq.wqe_cnt) { 221109a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, log_sq_size, ilog2(qp->sq.wqe_cnt)); 22123fd3307eSArtemy Kovalyov } else { 221309a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, no_sq, 1); 22143fd3307eSArtemy Kovalyov if (init_attr->srq && 22153fd3307eSArtemy Kovalyov init_attr->srq->srq_type == IB_SRQT_TM) 22163fd3307eSArtemy Kovalyov MLX5_SET(qpc, qpc, offload_type, 22173fd3307eSArtemy Kovalyov MLX5_QPC_OFFLOAD_TYPE_RNDV); 22183fd3307eSArtemy Kovalyov } 2219e126ba97SEli Cohen 2220e126ba97SEli Cohen /* Set default resources */ 2221e126ba97SEli Cohen switch (init_attr->qp_type) { 2222e126ba97SEli Cohen case IB_QPT_XRC_TGT: 222309a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_rcv, to_mcq(devr->c0)->mcq.cqn); 222409a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_snd, to_mcq(devr->c0)->mcq.cqn); 222509a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(devr->s0)->msrq.srqn); 222609a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, xrcd, to_mxrcd(init_attr->xrcd)->xrcdn); 2227e126ba97SEli Cohen break; 2228e126ba97SEli Cohen case IB_QPT_XRC_INI: 222909a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_rcv, to_mcq(devr->c0)->mcq.cqn); 223009a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, xrcd, to_mxrcd(devr->x1)->xrcdn); 223109a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(devr->s0)->msrq.srqn); 2232e126ba97SEli Cohen break; 2233e126ba97SEli Cohen default: 2234e126ba97SEli Cohen if (init_attr->srq) { 223509a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, xrcd, to_mxrcd(devr->x0)->xrcdn); 223609a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(init_attr->srq)->msrq.srqn); 2237e126ba97SEli Cohen } else { 223809a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, xrcd, to_mxrcd(devr->x1)->xrcdn); 223909a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(devr->s1)->msrq.srqn); 2240e126ba97SEli Cohen } 2241e126ba97SEli Cohen } 2242e126ba97SEli Cohen 2243e126ba97SEli Cohen if (init_attr->send_cq) 224409a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_snd, to_mcq(init_attr->send_cq)->mcq.cqn); 2245e126ba97SEli Cohen 2246e126ba97SEli Cohen if (init_attr->recv_cq) 224709a7d9ecSSaeed Mahameed MLX5_SET(qpc, qpc, cqn_rcv, to_mcq(init_attr->recv_cq)->mcq.cqn); 2248e126ba97SEli Cohen 224909a7d9ecSSaeed Mahameed MLX5_SET64(qpc, qpc, dbr_addr, qp->db.dma); 2250e126ba97SEli Cohen 2251cfb5e088SHaggai Abramovsky /* 0xffffff means we ask to work with cqe version 0 */ 225209a7d9ecSSaeed Mahameed if (MLX5_CAP_GEN(mdev, cqe_version) == MLX5_CQE_VERSION_V1) 2253cfb5e088SHaggai Abramovsky MLX5_SET(qpc, qpc, user_index, uidx); 225409a7d9ecSSaeed Mahameed 2255f0313965SErez Shitrit /* we use IB_QP_CREATE_IPOIB_UD_LSO to indicates ipoib qp */ 2256f0313965SErez Shitrit if (init_attr->qp_type == IB_QPT_UD && 2257f0313965SErez Shitrit (init_attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO)) { 2258f0313965SErez Shitrit MLX5_SET(qpc, qpc, ulp_stateless_offload_mode, 1); 2259f0313965SErez Shitrit qp->flags |= MLX5_IB_QP_LSO; 2260f0313965SErez Shitrit } 2261cfb5e088SHaggai Abramovsky 2262b1383aa6SNoa Osherovich if (init_attr->create_flags & IB_QP_CREATE_PCI_WRITE_END_PADDING) { 2263b1383aa6SNoa Osherovich if (!MLX5_CAP_GEN(dev->mdev, end_pad)) { 2264b1383aa6SNoa Osherovich mlx5_ib_dbg(dev, "scatter end padding is not supported\n"); 2265b1383aa6SNoa Osherovich err = -EOPNOTSUPP; 2266b1383aa6SNoa Osherovich goto err; 2267b1383aa6SNoa Osherovich } else if (init_attr->qp_type != IB_QPT_RAW_PACKET) { 2268b1383aa6SNoa Osherovich MLX5_SET(qpc, qpc, end_padding_mode, 2269b1383aa6SNoa Osherovich MLX5_WQ_END_PAD_MODE_ALIGN); 2270b1383aa6SNoa Osherovich } else { 2271b1383aa6SNoa Osherovich qp->flags |= MLX5_IB_QP_PCI_WRITE_END_PADDING; 2272b1383aa6SNoa Osherovich } 2273b1383aa6SNoa Osherovich } 2274b1383aa6SNoa Osherovich 22752c292dbbSBoris Pismenny if (inlen < 0) { 22762c292dbbSBoris Pismenny err = -EINVAL; 22772c292dbbSBoris Pismenny goto err; 22782c292dbbSBoris Pismenny } 22792c292dbbSBoris Pismenny 2280c2e53b2cSYishai Hadas if (init_attr->qp_type == IB_QPT_RAW_PACKET || 2281c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 22820fb2ed66Smajd@mellanox.com qp->raw_packet_qp.sq.ubuffer.buf_addr = ucmd.sq_buf_addr; 22830fb2ed66Smajd@mellanox.com raw_packet_qp_copy_info(qp, &qp->raw_packet_qp); 22847f72052cSYishai Hadas err = create_raw_packet_qp(dev, qp, in, inlen, pd, udata, 22857f72052cSYishai Hadas &resp); 22860fb2ed66Smajd@mellanox.com } else { 228719098df2Smajd@mellanox.com err = mlx5_core_create_qp(dev->mdev, &base->mqp, in, inlen); 22880fb2ed66Smajd@mellanox.com } 22890fb2ed66Smajd@mellanox.com 2290e126ba97SEli Cohen if (err) { 2291e126ba97SEli Cohen mlx5_ib_dbg(dev, "create qp failed\n"); 2292e126ba97SEli Cohen goto err_create; 2293e126ba97SEli Cohen } 2294e126ba97SEli Cohen 2295479163f4SAl Viro kvfree(in); 2296e126ba97SEli Cohen 229719098df2Smajd@mellanox.com base->container_mibqp = qp; 229819098df2Smajd@mellanox.com base->mqp.event = mlx5_ib_qp_event; 2299e126ba97SEli Cohen 230089ea94a7SMaor Gottlieb get_cqs(init_attr->qp_type, init_attr->send_cq, init_attr->recv_cq, 230189ea94a7SMaor Gottlieb &send_cq, &recv_cq); 230289ea94a7SMaor Gottlieb spin_lock_irqsave(&dev->reset_flow_resource_lock, flags); 230389ea94a7SMaor Gottlieb mlx5_ib_lock_cqs(send_cq, recv_cq); 230489ea94a7SMaor Gottlieb /* Maintain device to QPs access, needed for further handling via reset 230589ea94a7SMaor Gottlieb * flow 230689ea94a7SMaor Gottlieb */ 230789ea94a7SMaor Gottlieb list_add_tail(&qp->qps_list, &dev->qp_list); 230889ea94a7SMaor Gottlieb /* Maintain CQ to QPs access, needed for further handling via reset flow 230989ea94a7SMaor Gottlieb */ 231089ea94a7SMaor Gottlieb if (send_cq) 231189ea94a7SMaor Gottlieb list_add_tail(&qp->cq_send_list, &send_cq->list_send_qp); 231289ea94a7SMaor Gottlieb if (recv_cq) 231389ea94a7SMaor Gottlieb list_add_tail(&qp->cq_recv_list, &recv_cq->list_recv_qp); 231489ea94a7SMaor Gottlieb mlx5_ib_unlock_cqs(send_cq, recv_cq); 231589ea94a7SMaor Gottlieb spin_unlock_irqrestore(&dev->reset_flow_resource_lock, flags); 231689ea94a7SMaor Gottlieb 2317e126ba97SEli Cohen return 0; 2318e126ba97SEli Cohen 2319e126ba97SEli Cohen err_create: 2320e126ba97SEli Cohen if (qp->create_type == MLX5_QP_USER) 2321bdeacabdSShamir Rabinovitch destroy_qp_user(dev, pd, qp, base, udata); 2322e126ba97SEli Cohen else if (qp->create_type == MLX5_QP_KERNEL) 2323e126ba97SEli Cohen destroy_qp_kernel(dev, qp); 2324e126ba97SEli Cohen 2325b1383aa6SNoa Osherovich err: 2326479163f4SAl Viro kvfree(in); 2327e126ba97SEli Cohen return err; 2328e126ba97SEli Cohen } 2329e126ba97SEli Cohen 2330e126ba97SEli Cohen static void mlx5_ib_lock_cqs(struct mlx5_ib_cq *send_cq, struct mlx5_ib_cq *recv_cq) 2331e126ba97SEli Cohen __acquires(&send_cq->lock) __acquires(&recv_cq->lock) 2332e126ba97SEli Cohen { 2333e126ba97SEli Cohen if (send_cq) { 2334e126ba97SEli Cohen if (recv_cq) { 2335e126ba97SEli Cohen if (send_cq->mcq.cqn < recv_cq->mcq.cqn) { 233689ea94a7SMaor Gottlieb spin_lock(&send_cq->lock); 2337e126ba97SEli Cohen spin_lock_nested(&recv_cq->lock, 2338e126ba97SEli Cohen SINGLE_DEPTH_NESTING); 2339e126ba97SEli Cohen } else if (send_cq->mcq.cqn == recv_cq->mcq.cqn) { 234089ea94a7SMaor Gottlieb spin_lock(&send_cq->lock); 2341e126ba97SEli Cohen __acquire(&recv_cq->lock); 2342e126ba97SEli Cohen } else { 234389ea94a7SMaor Gottlieb spin_lock(&recv_cq->lock); 2344e126ba97SEli Cohen spin_lock_nested(&send_cq->lock, 2345e126ba97SEli Cohen SINGLE_DEPTH_NESTING); 2346e126ba97SEli Cohen } 2347e126ba97SEli Cohen } else { 234889ea94a7SMaor Gottlieb spin_lock(&send_cq->lock); 23496a4f139aSEli Cohen __acquire(&recv_cq->lock); 2350e126ba97SEli Cohen } 2351e126ba97SEli Cohen } else if (recv_cq) { 235289ea94a7SMaor Gottlieb spin_lock(&recv_cq->lock); 23536a4f139aSEli Cohen __acquire(&send_cq->lock); 23546a4f139aSEli Cohen } else { 23556a4f139aSEli Cohen __acquire(&send_cq->lock); 23566a4f139aSEli Cohen __acquire(&recv_cq->lock); 2357e126ba97SEli Cohen } 2358e126ba97SEli Cohen } 2359e126ba97SEli Cohen 2360e126ba97SEli Cohen static void mlx5_ib_unlock_cqs(struct mlx5_ib_cq *send_cq, struct mlx5_ib_cq *recv_cq) 2361e126ba97SEli Cohen __releases(&send_cq->lock) __releases(&recv_cq->lock) 2362e126ba97SEli Cohen { 2363e126ba97SEli Cohen if (send_cq) { 2364e126ba97SEli Cohen if (recv_cq) { 2365e126ba97SEli Cohen if (send_cq->mcq.cqn < recv_cq->mcq.cqn) { 2366e126ba97SEli Cohen spin_unlock(&recv_cq->lock); 236789ea94a7SMaor Gottlieb spin_unlock(&send_cq->lock); 2368e126ba97SEli Cohen } else if (send_cq->mcq.cqn == recv_cq->mcq.cqn) { 2369e126ba97SEli Cohen __release(&recv_cq->lock); 237089ea94a7SMaor Gottlieb spin_unlock(&send_cq->lock); 2371e126ba97SEli Cohen } else { 2372e126ba97SEli Cohen spin_unlock(&send_cq->lock); 237389ea94a7SMaor Gottlieb spin_unlock(&recv_cq->lock); 2374e126ba97SEli Cohen } 2375e126ba97SEli Cohen } else { 23766a4f139aSEli Cohen __release(&recv_cq->lock); 237789ea94a7SMaor Gottlieb spin_unlock(&send_cq->lock); 2378e126ba97SEli Cohen } 2379e126ba97SEli Cohen } else if (recv_cq) { 23806a4f139aSEli Cohen __release(&send_cq->lock); 238189ea94a7SMaor Gottlieb spin_unlock(&recv_cq->lock); 23826a4f139aSEli Cohen } else { 23836a4f139aSEli Cohen __release(&recv_cq->lock); 23846a4f139aSEli Cohen __release(&send_cq->lock); 2385e126ba97SEli Cohen } 2386e126ba97SEli Cohen } 2387e126ba97SEli Cohen 2388e126ba97SEli Cohen static struct mlx5_ib_pd *get_pd(struct mlx5_ib_qp *qp) 2389e126ba97SEli Cohen { 2390e126ba97SEli Cohen return to_mpd(qp->ibqp.pd); 2391e126ba97SEli Cohen } 2392e126ba97SEli Cohen 239389ea94a7SMaor Gottlieb static void get_cqs(enum ib_qp_type qp_type, 239489ea94a7SMaor Gottlieb struct ib_cq *ib_send_cq, struct ib_cq *ib_recv_cq, 2395e126ba97SEli Cohen struct mlx5_ib_cq **send_cq, struct mlx5_ib_cq **recv_cq) 2396e126ba97SEli Cohen { 239789ea94a7SMaor Gottlieb switch (qp_type) { 2398e126ba97SEli Cohen case IB_QPT_XRC_TGT: 2399e126ba97SEli Cohen *send_cq = NULL; 2400e126ba97SEli Cohen *recv_cq = NULL; 2401e126ba97SEli Cohen break; 2402e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 2403e126ba97SEli Cohen case IB_QPT_XRC_INI: 240489ea94a7SMaor Gottlieb *send_cq = ib_send_cq ? to_mcq(ib_send_cq) : NULL; 2405e126ba97SEli Cohen *recv_cq = NULL; 2406e126ba97SEli Cohen break; 2407e126ba97SEli Cohen 2408e126ba97SEli Cohen case IB_QPT_SMI: 2409d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: 2410e126ba97SEli Cohen case IB_QPT_RC: 2411e126ba97SEli Cohen case IB_QPT_UC: 2412e126ba97SEli Cohen case IB_QPT_UD: 2413e126ba97SEli Cohen case IB_QPT_RAW_IPV6: 2414e126ba97SEli Cohen case IB_QPT_RAW_ETHERTYPE: 24150fb2ed66Smajd@mellanox.com case IB_QPT_RAW_PACKET: 241689ea94a7SMaor Gottlieb *send_cq = ib_send_cq ? to_mcq(ib_send_cq) : NULL; 241789ea94a7SMaor Gottlieb *recv_cq = ib_recv_cq ? to_mcq(ib_recv_cq) : NULL; 2418e126ba97SEli Cohen break; 2419e126ba97SEli Cohen 2420e126ba97SEli Cohen case IB_QPT_MAX: 2421e126ba97SEli Cohen default: 2422e126ba97SEli Cohen *send_cq = NULL; 2423e126ba97SEli Cohen *recv_cq = NULL; 2424e126ba97SEli Cohen break; 2425e126ba97SEli Cohen } 2426e126ba97SEli Cohen } 2427e126ba97SEli Cohen 2428ad5f8e96Smajd@mellanox.com static int modify_raw_packet_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 242913eab21fSAviv Heller const struct mlx5_modify_raw_qp_param *raw_qp_param, 243013eab21fSAviv Heller u8 lag_tx_affinity); 2431ad5f8e96Smajd@mellanox.com 2432bdeacabdSShamir Rabinovitch static void destroy_qp_common(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 2433bdeacabdSShamir Rabinovitch struct ib_udata *udata) 2434e126ba97SEli Cohen { 2435e126ba97SEli Cohen struct mlx5_ib_cq *send_cq, *recv_cq; 2436c2e53b2cSYishai Hadas struct mlx5_ib_qp_base *base; 243789ea94a7SMaor Gottlieb unsigned long flags; 2438e126ba97SEli Cohen int err; 2439e126ba97SEli Cohen 244028d61370SYishai Hadas if (qp->ibqp.rwq_ind_tbl) { 244128d61370SYishai Hadas destroy_rss_raw_qp_tir(dev, qp); 244228d61370SYishai Hadas return; 244328d61370SYishai Hadas } 244428d61370SYishai Hadas 2445c2e53b2cSYishai Hadas base = (qp->ibqp.qp_type == IB_QPT_RAW_PACKET || 2446c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) ? 24470fb2ed66Smajd@mellanox.com &qp->raw_packet_qp.rq.base : 24480fb2ed66Smajd@mellanox.com &qp->trans_qp.base; 24490fb2ed66Smajd@mellanox.com 24506aec21f6SHaggai Eran if (qp->state != IB_QPS_RESET) { 2451c2e53b2cSYishai Hadas if (qp->ibqp.qp_type != IB_QPT_RAW_PACKET && 2452c2e53b2cSYishai Hadas !(qp->flags & MLX5_IB_QP_UNDERLAY)) { 2453ad5f8e96Smajd@mellanox.com err = mlx5_core_qp_modify(dev->mdev, 24541a412fb1SSaeed Mahameed MLX5_CMD_OP_2RST_QP, 0, 24551a412fb1SSaeed Mahameed NULL, &base->mqp); 2456ad5f8e96Smajd@mellanox.com } else { 24570680efa2SAlex Vesker struct mlx5_modify_raw_qp_param raw_qp_param = { 24580680efa2SAlex Vesker .operation = MLX5_CMD_OP_2RST_QP 24590680efa2SAlex Vesker }; 24600680efa2SAlex Vesker 246113eab21fSAviv Heller err = modify_raw_packet_qp(dev, qp, &raw_qp_param, 0); 2462ad5f8e96Smajd@mellanox.com } 2463ad5f8e96Smajd@mellanox.com if (err) 2464427c1e7bSmajd@mellanox.com mlx5_ib_warn(dev, "mlx5_ib: modify QP 0x%06x to RESET failed\n", 246519098df2Smajd@mellanox.com base->mqp.qpn); 24666aec21f6SHaggai Eran } 2467e126ba97SEli Cohen 246889ea94a7SMaor Gottlieb get_cqs(qp->ibqp.qp_type, qp->ibqp.send_cq, qp->ibqp.recv_cq, 246989ea94a7SMaor Gottlieb &send_cq, &recv_cq); 247089ea94a7SMaor Gottlieb 247189ea94a7SMaor Gottlieb spin_lock_irqsave(&dev->reset_flow_resource_lock, flags); 247289ea94a7SMaor Gottlieb mlx5_ib_lock_cqs(send_cq, recv_cq); 247389ea94a7SMaor Gottlieb /* del from lists under both locks above to protect reset flow paths */ 247489ea94a7SMaor Gottlieb list_del(&qp->qps_list); 247589ea94a7SMaor Gottlieb if (send_cq) 247689ea94a7SMaor Gottlieb list_del(&qp->cq_send_list); 247789ea94a7SMaor Gottlieb 247889ea94a7SMaor Gottlieb if (recv_cq) 247989ea94a7SMaor Gottlieb list_del(&qp->cq_recv_list); 2480e126ba97SEli Cohen 2481e126ba97SEli Cohen if (qp->create_type == MLX5_QP_KERNEL) { 248219098df2Smajd@mellanox.com __mlx5_ib_cq_clean(recv_cq, base->mqp.qpn, 2483e126ba97SEli Cohen qp->ibqp.srq ? to_msrq(qp->ibqp.srq) : NULL); 2484e126ba97SEli Cohen if (send_cq != recv_cq) 248519098df2Smajd@mellanox.com __mlx5_ib_cq_clean(send_cq, base->mqp.qpn, 248619098df2Smajd@mellanox.com NULL); 2487e126ba97SEli Cohen } 248889ea94a7SMaor Gottlieb mlx5_ib_unlock_cqs(send_cq, recv_cq); 248989ea94a7SMaor Gottlieb spin_unlock_irqrestore(&dev->reset_flow_resource_lock, flags); 2490e126ba97SEli Cohen 2491c2e53b2cSYishai Hadas if (qp->ibqp.qp_type == IB_QPT_RAW_PACKET || 2492c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 24930fb2ed66Smajd@mellanox.com destroy_raw_packet_qp(dev, qp); 24940fb2ed66Smajd@mellanox.com } else { 249519098df2Smajd@mellanox.com err = mlx5_core_destroy_qp(dev->mdev, &base->mqp); 2496e126ba97SEli Cohen if (err) 24970fb2ed66Smajd@mellanox.com mlx5_ib_warn(dev, "failed to destroy QP 0x%x\n", 24980fb2ed66Smajd@mellanox.com base->mqp.qpn); 24990fb2ed66Smajd@mellanox.com } 2500e126ba97SEli Cohen 2501e126ba97SEli Cohen if (qp->create_type == MLX5_QP_KERNEL) 2502e126ba97SEli Cohen destroy_qp_kernel(dev, qp); 2503e126ba97SEli Cohen else if (qp->create_type == MLX5_QP_USER) 2504bdeacabdSShamir Rabinovitch destroy_qp_user(dev, &get_pd(qp)->ibpd, qp, base, udata); 2505e126ba97SEli Cohen } 2506e126ba97SEli Cohen 2507e126ba97SEli Cohen static const char *ib_qp_type_str(enum ib_qp_type type) 2508e126ba97SEli Cohen { 2509e126ba97SEli Cohen switch (type) { 2510e126ba97SEli Cohen case IB_QPT_SMI: 2511e126ba97SEli Cohen return "IB_QPT_SMI"; 2512e126ba97SEli Cohen case IB_QPT_GSI: 2513e126ba97SEli Cohen return "IB_QPT_GSI"; 2514e126ba97SEli Cohen case IB_QPT_RC: 2515e126ba97SEli Cohen return "IB_QPT_RC"; 2516e126ba97SEli Cohen case IB_QPT_UC: 2517e126ba97SEli Cohen return "IB_QPT_UC"; 2518e126ba97SEli Cohen case IB_QPT_UD: 2519e126ba97SEli Cohen return "IB_QPT_UD"; 2520e126ba97SEli Cohen case IB_QPT_RAW_IPV6: 2521e126ba97SEli Cohen return "IB_QPT_RAW_IPV6"; 2522e126ba97SEli Cohen case IB_QPT_RAW_ETHERTYPE: 2523e126ba97SEli Cohen return "IB_QPT_RAW_ETHERTYPE"; 2524e126ba97SEli Cohen case IB_QPT_XRC_INI: 2525e126ba97SEli Cohen return "IB_QPT_XRC_INI"; 2526e126ba97SEli Cohen case IB_QPT_XRC_TGT: 2527e126ba97SEli Cohen return "IB_QPT_XRC_TGT"; 2528e126ba97SEli Cohen case IB_QPT_RAW_PACKET: 2529e126ba97SEli Cohen return "IB_QPT_RAW_PACKET"; 2530e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 2531e126ba97SEli Cohen return "MLX5_IB_QPT_REG_UMR"; 2532b4aaa1f0SMoni Shoua case IB_QPT_DRIVER: 2533b4aaa1f0SMoni Shoua return "IB_QPT_DRIVER"; 2534e126ba97SEli Cohen case IB_QPT_MAX: 2535e126ba97SEli Cohen default: 2536e126ba97SEli Cohen return "Invalid QP type"; 2537e126ba97SEli Cohen } 2538e126ba97SEli Cohen } 2539e126ba97SEli Cohen 2540b4aaa1f0SMoni Shoua static struct ib_qp *mlx5_ib_create_dct(struct ib_pd *pd, 2541b4aaa1f0SMoni Shoua struct ib_qp_init_attr *attr, 254289944450SShamir Rabinovitch struct mlx5_ib_create_qp *ucmd, 254389944450SShamir Rabinovitch struct ib_udata *udata) 2544b4aaa1f0SMoni Shoua { 254589944450SShamir Rabinovitch struct mlx5_ib_ucontext *ucontext = rdma_udata_to_drv_context( 254689944450SShamir Rabinovitch udata, struct mlx5_ib_ucontext, ibucontext); 2547b4aaa1f0SMoni Shoua struct mlx5_ib_qp *qp; 2548b4aaa1f0SMoni Shoua int err = 0; 2549b4aaa1f0SMoni Shoua u32 uidx = MLX5_IB_DEFAULT_UIDX; 2550b4aaa1f0SMoni Shoua void *dctc; 2551b4aaa1f0SMoni Shoua 2552b4aaa1f0SMoni Shoua if (!attr->srq || !attr->recv_cq) 2553b4aaa1f0SMoni Shoua return ERR_PTR(-EINVAL); 2554b4aaa1f0SMoni Shoua 255589944450SShamir Rabinovitch err = get_qp_user_index(ucontext, ucmd, sizeof(*ucmd), &uidx); 2556b4aaa1f0SMoni Shoua if (err) 2557b4aaa1f0SMoni Shoua return ERR_PTR(err); 2558b4aaa1f0SMoni Shoua 2559b4aaa1f0SMoni Shoua qp = kzalloc(sizeof(*qp), GFP_KERNEL); 2560b4aaa1f0SMoni Shoua if (!qp) 2561b4aaa1f0SMoni Shoua return ERR_PTR(-ENOMEM); 2562b4aaa1f0SMoni Shoua 2563b4aaa1f0SMoni Shoua qp->dct.in = kzalloc(MLX5_ST_SZ_BYTES(create_dct_in), GFP_KERNEL); 2564b4aaa1f0SMoni Shoua if (!qp->dct.in) { 2565b4aaa1f0SMoni Shoua err = -ENOMEM; 2566b4aaa1f0SMoni Shoua goto err_free; 2567b4aaa1f0SMoni Shoua } 2568b4aaa1f0SMoni Shoua 2569a01a5860SYishai Hadas MLX5_SET(create_dct_in, qp->dct.in, uid, to_mpd(pd)->uid); 2570b4aaa1f0SMoni Shoua dctc = MLX5_ADDR_OF(create_dct_in, qp->dct.in, dct_context_entry); 2571776a3906SMoni Shoua qp->qp_sub_type = MLX5_IB_QPT_DCT; 2572b4aaa1f0SMoni Shoua MLX5_SET(dctc, dctc, pd, to_mpd(pd)->pdn); 2573b4aaa1f0SMoni Shoua MLX5_SET(dctc, dctc, srqn_xrqn, to_msrq(attr->srq)->msrq.srqn); 2574b4aaa1f0SMoni Shoua MLX5_SET(dctc, dctc, cqn, to_mcq(attr->recv_cq)->mcq.cqn); 2575b4aaa1f0SMoni Shoua MLX5_SET64(dctc, dctc, dc_access_key, ucmd->access_key); 2576b4aaa1f0SMoni Shoua MLX5_SET(dctc, dctc, user_index, uidx); 2577b4aaa1f0SMoni Shoua 25785d6ff1baSYonatan Cohen if (ucmd->flags & MLX5_QP_FLAG_SCATTER_CQE) 25795d6ff1baSYonatan Cohen configure_responder_scat_cqe(attr, dctc); 25805d6ff1baSYonatan Cohen 2581b4aaa1f0SMoni Shoua qp->state = IB_QPS_RESET; 2582b4aaa1f0SMoni Shoua 2583b4aaa1f0SMoni Shoua return &qp->ibqp; 2584b4aaa1f0SMoni Shoua err_free: 2585b4aaa1f0SMoni Shoua kfree(qp); 2586b4aaa1f0SMoni Shoua return ERR_PTR(err); 2587b4aaa1f0SMoni Shoua } 2588b4aaa1f0SMoni Shoua 2589b4aaa1f0SMoni Shoua static int set_mlx_qp_type(struct mlx5_ib_dev *dev, 2590e126ba97SEli Cohen struct ib_qp_init_attr *init_attr, 2591b4aaa1f0SMoni Shoua struct mlx5_ib_create_qp *ucmd, 2592b4aaa1f0SMoni Shoua struct ib_udata *udata) 2593b4aaa1f0SMoni Shoua { 2594b4aaa1f0SMoni Shoua enum { MLX_QP_FLAGS = MLX5_QP_FLAG_TYPE_DCT | MLX5_QP_FLAG_TYPE_DCI }; 2595b4aaa1f0SMoni Shoua int err; 2596b4aaa1f0SMoni Shoua 2597b4aaa1f0SMoni Shoua if (!udata) 2598b4aaa1f0SMoni Shoua return -EINVAL; 2599b4aaa1f0SMoni Shoua 2600b4aaa1f0SMoni Shoua if (udata->inlen < sizeof(*ucmd)) { 2601b4aaa1f0SMoni Shoua mlx5_ib_dbg(dev, "create_qp user command is smaller than expected\n"); 2602b4aaa1f0SMoni Shoua return -EINVAL; 2603b4aaa1f0SMoni Shoua } 2604b4aaa1f0SMoni Shoua err = ib_copy_from_udata(ucmd, udata, sizeof(*ucmd)); 2605b4aaa1f0SMoni Shoua if (err) 2606b4aaa1f0SMoni Shoua return err; 2607b4aaa1f0SMoni Shoua 2608b4aaa1f0SMoni Shoua if ((ucmd->flags & MLX_QP_FLAGS) == MLX5_QP_FLAG_TYPE_DCI) { 2609b4aaa1f0SMoni Shoua init_attr->qp_type = MLX5_IB_QPT_DCI; 2610b4aaa1f0SMoni Shoua } else { 2611b4aaa1f0SMoni Shoua if ((ucmd->flags & MLX_QP_FLAGS) == MLX5_QP_FLAG_TYPE_DCT) { 2612b4aaa1f0SMoni Shoua init_attr->qp_type = MLX5_IB_QPT_DCT; 2613b4aaa1f0SMoni Shoua } else { 2614b4aaa1f0SMoni Shoua mlx5_ib_dbg(dev, "Invalid QP flags\n"); 2615b4aaa1f0SMoni Shoua return -EINVAL; 2616b4aaa1f0SMoni Shoua } 2617b4aaa1f0SMoni Shoua } 2618b4aaa1f0SMoni Shoua 2619b4aaa1f0SMoni Shoua if (!MLX5_CAP_GEN(dev->mdev, dct)) { 2620b4aaa1f0SMoni Shoua mlx5_ib_dbg(dev, "DC transport is not supported\n"); 2621b4aaa1f0SMoni Shoua return -EOPNOTSUPP; 2622b4aaa1f0SMoni Shoua } 2623b4aaa1f0SMoni Shoua 2624b4aaa1f0SMoni Shoua return 0; 2625b4aaa1f0SMoni Shoua } 2626b4aaa1f0SMoni Shoua 2627b4aaa1f0SMoni Shoua struct ib_qp *mlx5_ib_create_qp(struct ib_pd *pd, 2628b4aaa1f0SMoni Shoua struct ib_qp_init_attr *verbs_init_attr, 2629e126ba97SEli Cohen struct ib_udata *udata) 2630e126ba97SEli Cohen { 2631e126ba97SEli Cohen struct mlx5_ib_dev *dev; 2632e126ba97SEli Cohen struct mlx5_ib_qp *qp; 2633e126ba97SEli Cohen u16 xrcdn = 0; 2634e126ba97SEli Cohen int err; 2635b4aaa1f0SMoni Shoua struct ib_qp_init_attr mlx_init_attr; 2636b4aaa1f0SMoni Shoua struct ib_qp_init_attr *init_attr = verbs_init_attr; 263789944450SShamir Rabinovitch struct mlx5_ib_ucontext *ucontext = rdma_udata_to_drv_context( 263889944450SShamir Rabinovitch udata, struct mlx5_ib_ucontext, ibucontext); 2639e126ba97SEli Cohen 2640e126ba97SEli Cohen if (pd) { 2641e126ba97SEli Cohen dev = to_mdev(pd->device); 26420fb2ed66Smajd@mellanox.com 26430fb2ed66Smajd@mellanox.com if (init_attr->qp_type == IB_QPT_RAW_PACKET) { 264489944450SShamir Rabinovitch if (!ucontext) { 26450fb2ed66Smajd@mellanox.com mlx5_ib_dbg(dev, "Raw Packet QP is not supported for kernel consumers\n"); 26460fb2ed66Smajd@mellanox.com return ERR_PTR(-EINVAL); 264789944450SShamir Rabinovitch } else if (!ucontext->cqe_version) { 26480fb2ed66Smajd@mellanox.com mlx5_ib_dbg(dev, "Raw Packet QP is only supported for CQE version > 0\n"); 26490fb2ed66Smajd@mellanox.com return ERR_PTR(-EINVAL); 26500fb2ed66Smajd@mellanox.com } 26510fb2ed66Smajd@mellanox.com } 265209f16cf5SMajd Dibbiny } else { 265309f16cf5SMajd Dibbiny /* being cautious here */ 265409f16cf5SMajd Dibbiny if (init_attr->qp_type != IB_QPT_XRC_TGT && 265509f16cf5SMajd Dibbiny init_attr->qp_type != MLX5_IB_QPT_REG_UMR) { 265609f16cf5SMajd Dibbiny pr_warn("%s: no PD for transport %s\n", __func__, 265709f16cf5SMajd Dibbiny ib_qp_type_str(init_attr->qp_type)); 265809f16cf5SMajd Dibbiny return ERR_PTR(-EINVAL); 265909f16cf5SMajd Dibbiny } 266009f16cf5SMajd Dibbiny dev = to_mdev(to_mxrcd(init_attr->xrcd)->ibxrcd.device); 2661e126ba97SEli Cohen } 2662e126ba97SEli Cohen 2663b4aaa1f0SMoni Shoua if (init_attr->qp_type == IB_QPT_DRIVER) { 2664b4aaa1f0SMoni Shoua struct mlx5_ib_create_qp ucmd; 2665b4aaa1f0SMoni Shoua 2666b4aaa1f0SMoni Shoua init_attr = &mlx_init_attr; 2667b4aaa1f0SMoni Shoua memcpy(init_attr, verbs_init_attr, sizeof(*verbs_init_attr)); 2668b4aaa1f0SMoni Shoua err = set_mlx_qp_type(dev, init_attr, &ucmd, udata); 2669b4aaa1f0SMoni Shoua if (err) 2670b4aaa1f0SMoni Shoua return ERR_PTR(err); 2671c32a4f29SMoni Shoua 2672c32a4f29SMoni Shoua if (init_attr->qp_type == MLX5_IB_QPT_DCI) { 2673c32a4f29SMoni Shoua if (init_attr->cap.max_recv_wr || 2674c32a4f29SMoni Shoua init_attr->cap.max_recv_sge) { 2675c32a4f29SMoni Shoua mlx5_ib_dbg(dev, "DCI QP requires zero size receive queue\n"); 2676c32a4f29SMoni Shoua return ERR_PTR(-EINVAL); 2677c32a4f29SMoni Shoua } 2678776a3906SMoni Shoua } else { 267989944450SShamir Rabinovitch return mlx5_ib_create_dct(pd, init_attr, &ucmd, udata); 2680c32a4f29SMoni Shoua } 2681b4aaa1f0SMoni Shoua } 2682b4aaa1f0SMoni Shoua 2683e126ba97SEli Cohen switch (init_attr->qp_type) { 2684e126ba97SEli Cohen case IB_QPT_XRC_TGT: 2685e126ba97SEli Cohen case IB_QPT_XRC_INI: 2686938fe83cSSaeed Mahameed if (!MLX5_CAP_GEN(dev->mdev, xrc)) { 2687e126ba97SEli Cohen mlx5_ib_dbg(dev, "XRC not supported\n"); 2688e126ba97SEli Cohen return ERR_PTR(-ENOSYS); 2689e126ba97SEli Cohen } 2690e126ba97SEli Cohen init_attr->recv_cq = NULL; 2691e126ba97SEli Cohen if (init_attr->qp_type == IB_QPT_XRC_TGT) { 2692e126ba97SEli Cohen xrcdn = to_mxrcd(init_attr->xrcd)->xrcdn; 2693e126ba97SEli Cohen init_attr->send_cq = NULL; 2694e126ba97SEli Cohen } 2695e126ba97SEli Cohen 2696e126ba97SEli Cohen /* fall through */ 26970fb2ed66Smajd@mellanox.com case IB_QPT_RAW_PACKET: 2698e126ba97SEli Cohen case IB_QPT_RC: 2699e126ba97SEli Cohen case IB_QPT_UC: 2700e126ba97SEli Cohen case IB_QPT_UD: 2701e126ba97SEli Cohen case IB_QPT_SMI: 2702d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: 2703e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 2704c32a4f29SMoni Shoua case MLX5_IB_QPT_DCI: 2705e126ba97SEli Cohen qp = kzalloc(sizeof(*qp), GFP_KERNEL); 2706e126ba97SEli Cohen if (!qp) 2707e126ba97SEli Cohen return ERR_PTR(-ENOMEM); 2708e126ba97SEli Cohen 2709e126ba97SEli Cohen err = create_qp_common(dev, pd, init_attr, udata, qp); 2710e126ba97SEli Cohen if (err) { 2711e126ba97SEli Cohen mlx5_ib_dbg(dev, "create_qp_common failed\n"); 2712e126ba97SEli Cohen kfree(qp); 2713e126ba97SEli Cohen return ERR_PTR(err); 2714e126ba97SEli Cohen } 2715e126ba97SEli Cohen 2716e126ba97SEli Cohen if (is_qp0(init_attr->qp_type)) 2717e126ba97SEli Cohen qp->ibqp.qp_num = 0; 2718e126ba97SEli Cohen else if (is_qp1(init_attr->qp_type)) 2719e126ba97SEli Cohen qp->ibqp.qp_num = 1; 2720e126ba97SEli Cohen else 272119098df2Smajd@mellanox.com qp->ibqp.qp_num = qp->trans_qp.base.mqp.qpn; 2722e126ba97SEli Cohen 2723e126ba97SEli Cohen mlx5_ib_dbg(dev, "ib qpnum 0x%x, mlx qpn 0x%x, rcqn 0x%x, scqn 0x%x\n", 272419098df2Smajd@mellanox.com qp->ibqp.qp_num, qp->trans_qp.base.mqp.qpn, 2725a1ab8402SEli Cohen init_attr->recv_cq ? to_mcq(init_attr->recv_cq)->mcq.cqn : -1, 2726a1ab8402SEli Cohen init_attr->send_cq ? to_mcq(init_attr->send_cq)->mcq.cqn : -1); 2727e126ba97SEli Cohen 272819098df2Smajd@mellanox.com qp->trans_qp.xrcdn = xrcdn; 2729e126ba97SEli Cohen 2730e126ba97SEli Cohen break; 2731e126ba97SEli Cohen 2732d16e91daSHaggai Eran case IB_QPT_GSI: 2733d16e91daSHaggai Eran return mlx5_ib_gsi_create_qp(pd, init_attr); 2734d16e91daSHaggai Eran 2735e126ba97SEli Cohen case IB_QPT_RAW_IPV6: 2736e126ba97SEli Cohen case IB_QPT_RAW_ETHERTYPE: 2737e126ba97SEli Cohen case IB_QPT_MAX: 2738e126ba97SEli Cohen default: 2739e126ba97SEli Cohen mlx5_ib_dbg(dev, "unsupported qp type %d\n", 2740e126ba97SEli Cohen init_attr->qp_type); 2741e126ba97SEli Cohen /* Don't support raw QPs */ 2742e126ba97SEli Cohen return ERR_PTR(-EINVAL); 2743e126ba97SEli Cohen } 2744e126ba97SEli Cohen 2745b4aaa1f0SMoni Shoua if (verbs_init_attr->qp_type == IB_QPT_DRIVER) 2746b4aaa1f0SMoni Shoua qp->qp_sub_type = init_attr->qp_type; 2747b4aaa1f0SMoni Shoua 2748e126ba97SEli Cohen return &qp->ibqp; 2749e126ba97SEli Cohen } 2750e126ba97SEli Cohen 2751776a3906SMoni Shoua static int mlx5_ib_destroy_dct(struct mlx5_ib_qp *mqp) 2752776a3906SMoni Shoua { 2753776a3906SMoni Shoua struct mlx5_ib_dev *dev = to_mdev(mqp->ibqp.device); 2754776a3906SMoni Shoua 2755776a3906SMoni Shoua if (mqp->state == IB_QPS_RTR) { 2756776a3906SMoni Shoua int err; 2757776a3906SMoni Shoua 2758776a3906SMoni Shoua err = mlx5_core_destroy_dct(dev->mdev, &mqp->dct.mdct); 2759776a3906SMoni Shoua if (err) { 2760776a3906SMoni Shoua mlx5_ib_warn(dev, "failed to destroy DCT %d\n", err); 2761776a3906SMoni Shoua return err; 2762776a3906SMoni Shoua } 2763776a3906SMoni Shoua } 2764776a3906SMoni Shoua 2765776a3906SMoni Shoua kfree(mqp->dct.in); 2766776a3906SMoni Shoua kfree(mqp); 2767776a3906SMoni Shoua return 0; 2768776a3906SMoni Shoua } 2769776a3906SMoni Shoua 2770c4367a26SShamir Rabinovitch int mlx5_ib_destroy_qp(struct ib_qp *qp, struct ib_udata *udata) 2771e126ba97SEli Cohen { 2772e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(qp->device); 2773e126ba97SEli Cohen struct mlx5_ib_qp *mqp = to_mqp(qp); 2774e126ba97SEli Cohen 2775d16e91daSHaggai Eran if (unlikely(qp->qp_type == IB_QPT_GSI)) 2776d16e91daSHaggai Eran return mlx5_ib_gsi_destroy_qp(qp); 2777d16e91daSHaggai Eran 2778776a3906SMoni Shoua if (mqp->qp_sub_type == MLX5_IB_QPT_DCT) 2779776a3906SMoni Shoua return mlx5_ib_destroy_dct(mqp); 2780776a3906SMoni Shoua 2781bdeacabdSShamir Rabinovitch destroy_qp_common(dev, mqp, udata); 2782e126ba97SEli Cohen 2783e126ba97SEli Cohen kfree(mqp); 2784e126ba97SEli Cohen 2785e126ba97SEli Cohen return 0; 2786e126ba97SEli Cohen } 2787e126ba97SEli Cohen 2788a60109dcSYonatan Cohen static int to_mlx5_access_flags(struct mlx5_ib_qp *qp, 2789a60109dcSYonatan Cohen const struct ib_qp_attr *attr, 2790bf3b4f06SBart Van Assche int attr_mask, __be32 *hw_access_flags_be) 2791e126ba97SEli Cohen { 2792e126ba97SEli Cohen u8 dest_rd_atomic; 2793bf3b4f06SBart Van Assche u32 access_flags, hw_access_flags = 0; 2794e126ba97SEli Cohen 2795a60109dcSYonatan Cohen struct mlx5_ib_dev *dev = to_mdev(qp->ibqp.device); 2796a60109dcSYonatan Cohen 2797e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) 2798e126ba97SEli Cohen dest_rd_atomic = attr->max_dest_rd_atomic; 2799e126ba97SEli Cohen else 280019098df2Smajd@mellanox.com dest_rd_atomic = qp->trans_qp.resp_depth; 2801e126ba97SEli Cohen 2802e126ba97SEli Cohen if (attr_mask & IB_QP_ACCESS_FLAGS) 2803e126ba97SEli Cohen access_flags = attr->qp_access_flags; 2804e126ba97SEli Cohen else 280519098df2Smajd@mellanox.com access_flags = qp->trans_qp.atomic_rd_en; 2806e126ba97SEli Cohen 2807e126ba97SEli Cohen if (!dest_rd_atomic) 2808e126ba97SEli Cohen access_flags &= IB_ACCESS_REMOTE_WRITE; 2809e126ba97SEli Cohen 2810e126ba97SEli Cohen if (access_flags & IB_ACCESS_REMOTE_READ) 2811bf3b4f06SBart Van Assche hw_access_flags |= MLX5_QP_BIT_RRE; 281213f8d9c1SYonatan Cohen if (access_flags & IB_ACCESS_REMOTE_ATOMIC) { 2813a60109dcSYonatan Cohen int atomic_mode; 2814e126ba97SEli Cohen 2815a60109dcSYonatan Cohen atomic_mode = get_atomic_mode(dev, qp->ibqp.qp_type); 2816a60109dcSYonatan Cohen if (atomic_mode < 0) 2817a60109dcSYonatan Cohen return -EOPNOTSUPP; 2818a60109dcSYonatan Cohen 2819bf3b4f06SBart Van Assche hw_access_flags |= MLX5_QP_BIT_RAE; 2820bf3b4f06SBart Van Assche hw_access_flags |= atomic_mode << MLX5_ATOMIC_MODE_OFFSET; 2821a60109dcSYonatan Cohen } 2822a60109dcSYonatan Cohen 2823a60109dcSYonatan Cohen if (access_flags & IB_ACCESS_REMOTE_WRITE) 2824bf3b4f06SBart Van Assche hw_access_flags |= MLX5_QP_BIT_RWE; 2825a60109dcSYonatan Cohen 2826bf3b4f06SBart Van Assche *hw_access_flags_be = cpu_to_be32(hw_access_flags); 2827a60109dcSYonatan Cohen 2828a60109dcSYonatan Cohen return 0; 2829e126ba97SEli Cohen } 2830e126ba97SEli Cohen 2831e126ba97SEli Cohen enum { 2832e126ba97SEli Cohen MLX5_PATH_FLAG_FL = 1 << 0, 2833e126ba97SEli Cohen MLX5_PATH_FLAG_FREE_AR = 1 << 1, 2834e126ba97SEli Cohen MLX5_PATH_FLAG_COUNTER = 1 << 2, 2835e126ba97SEli Cohen }; 2836e126ba97SEli Cohen 2837e126ba97SEli Cohen static int ib_rate_to_mlx5(struct mlx5_ib_dev *dev, u8 rate) 2838e126ba97SEli Cohen { 28394f32ac2eSDanit Goldberg if (rate == IB_RATE_PORT_CURRENT) 2840e126ba97SEli Cohen return 0; 28414f32ac2eSDanit Goldberg 2842a5a5d199SMichael Guralnik if (rate < IB_RATE_2_5_GBPS || rate > IB_RATE_600_GBPS) 2843e126ba97SEli Cohen return -EINVAL; 28444f32ac2eSDanit Goldberg 28454f32ac2eSDanit Goldberg while (rate != IB_RATE_PORT_CURRENT && 2846e126ba97SEli Cohen !(1 << (rate + MLX5_STAT_RATE_OFFSET) & 2847938fe83cSSaeed Mahameed MLX5_CAP_GEN(dev->mdev, stat_rate_support))) 2848e126ba97SEli Cohen --rate; 2849e126ba97SEli Cohen 28504f32ac2eSDanit Goldberg return rate ? rate + MLX5_STAT_RATE_OFFSET : rate; 2851e126ba97SEli Cohen } 2852e126ba97SEli Cohen 285375850d0bSmajd@mellanox.com static int modify_raw_packet_eth_prio(struct mlx5_core_dev *dev, 28541cd6dbd3SYishai Hadas struct mlx5_ib_sq *sq, u8 sl, 28551cd6dbd3SYishai Hadas struct ib_pd *pd) 285675850d0bSmajd@mellanox.com { 285775850d0bSmajd@mellanox.com void *in; 285875850d0bSmajd@mellanox.com void *tisc; 285975850d0bSmajd@mellanox.com int inlen; 286075850d0bSmajd@mellanox.com int err; 286175850d0bSmajd@mellanox.com 286275850d0bSmajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(modify_tis_in); 28631b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 286475850d0bSmajd@mellanox.com if (!in) 286575850d0bSmajd@mellanox.com return -ENOMEM; 286675850d0bSmajd@mellanox.com 286775850d0bSmajd@mellanox.com MLX5_SET(modify_tis_in, in, bitmask.prio, 1); 28681cd6dbd3SYishai Hadas MLX5_SET(modify_tis_in, in, uid, to_mpd(pd)->uid); 286975850d0bSmajd@mellanox.com 287075850d0bSmajd@mellanox.com tisc = MLX5_ADDR_OF(modify_tis_in, in, ctx); 287175850d0bSmajd@mellanox.com MLX5_SET(tisc, tisc, prio, ((sl & 0x7) << 1)); 287275850d0bSmajd@mellanox.com 287375850d0bSmajd@mellanox.com err = mlx5_core_modify_tis(dev, sq->tisn, in, inlen); 287475850d0bSmajd@mellanox.com 287575850d0bSmajd@mellanox.com kvfree(in); 287675850d0bSmajd@mellanox.com 287775850d0bSmajd@mellanox.com return err; 287875850d0bSmajd@mellanox.com } 287975850d0bSmajd@mellanox.com 288013eab21fSAviv Heller static int modify_raw_packet_tx_affinity(struct mlx5_core_dev *dev, 28811cd6dbd3SYishai Hadas struct mlx5_ib_sq *sq, u8 tx_affinity, 28821cd6dbd3SYishai Hadas struct ib_pd *pd) 288313eab21fSAviv Heller { 288413eab21fSAviv Heller void *in; 288513eab21fSAviv Heller void *tisc; 288613eab21fSAviv Heller int inlen; 288713eab21fSAviv Heller int err; 288813eab21fSAviv Heller 288913eab21fSAviv Heller inlen = MLX5_ST_SZ_BYTES(modify_tis_in); 28901b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 289113eab21fSAviv Heller if (!in) 289213eab21fSAviv Heller return -ENOMEM; 289313eab21fSAviv Heller 289413eab21fSAviv Heller MLX5_SET(modify_tis_in, in, bitmask.lag_tx_port_affinity, 1); 28951cd6dbd3SYishai Hadas MLX5_SET(modify_tis_in, in, uid, to_mpd(pd)->uid); 289613eab21fSAviv Heller 289713eab21fSAviv Heller tisc = MLX5_ADDR_OF(modify_tis_in, in, ctx); 289813eab21fSAviv Heller MLX5_SET(tisc, tisc, lag_tx_port_affinity, tx_affinity); 289913eab21fSAviv Heller 290013eab21fSAviv Heller err = mlx5_core_modify_tis(dev, sq->tisn, in, inlen); 290113eab21fSAviv Heller 290213eab21fSAviv Heller kvfree(in); 290313eab21fSAviv Heller 290413eab21fSAviv Heller return err; 290513eab21fSAviv Heller } 290613eab21fSAviv Heller 290775850d0bSmajd@mellanox.com static int mlx5_set_path(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 290890898850SDasaratharaman Chandramouli const struct rdma_ah_attr *ah, 2909e126ba97SEli Cohen struct mlx5_qp_path *path, u8 port, int attr_mask, 2910f879ee8dSAchiad Shochat u32 path_flags, const struct ib_qp_attr *attr, 2911f879ee8dSAchiad Shochat bool alt) 2912e126ba97SEli Cohen { 2913d8966fcdSDasaratharaman Chandramouli const struct ib_global_route *grh = rdma_ah_read_grh(ah); 2914e126ba97SEli Cohen int err; 2915ed88451eSMajd Dibbiny enum ib_gid_type gid_type; 2916d8966fcdSDasaratharaman Chandramouli u8 ah_flags = rdma_ah_get_ah_flags(ah); 2917d8966fcdSDasaratharaman Chandramouli u8 sl = rdma_ah_get_sl(ah); 2918e126ba97SEli Cohen 2919e126ba97SEli Cohen if (attr_mask & IB_QP_PKEY_INDEX) 2920f879ee8dSAchiad Shochat path->pkey_index = cpu_to_be16(alt ? attr->alt_pkey_index : 2921f879ee8dSAchiad Shochat attr->pkey_index); 2922e126ba97SEli Cohen 2923d8966fcdSDasaratharaman Chandramouli if (ah_flags & IB_AH_GRH) { 2924d8966fcdSDasaratharaman Chandramouli if (grh->sgid_index >= 2925938fe83cSSaeed Mahameed dev->mdev->port_caps[port - 1].gid_table_len) { 2926f4f01b54SJoe Perches pr_err("sgid_index (%u) too large. max is %d\n", 2927d8966fcdSDasaratharaman Chandramouli grh->sgid_index, 2928938fe83cSSaeed Mahameed dev->mdev->port_caps[port - 1].gid_table_len); 2929f83b4263SEli Cohen return -EINVAL; 2930f83b4263SEli Cohen } 29312811ba51SAchiad Shochat } 293244c58487SDasaratharaman Chandramouli 293344c58487SDasaratharaman Chandramouli if (ah->type == RDMA_AH_ATTR_TYPE_ROCE) { 2934d8966fcdSDasaratharaman Chandramouli if (!(ah_flags & IB_AH_GRH)) 29352811ba51SAchiad Shochat return -EINVAL; 293647ec3866SParav Pandit 293744c58487SDasaratharaman Chandramouli memcpy(path->rmac, ah->roce.dmac, sizeof(ah->roce.dmac)); 29382b621851SMajd Dibbiny if (qp->ibqp.qp_type == IB_QPT_RC || 29392b621851SMajd Dibbiny qp->ibqp.qp_type == IB_QPT_UC || 29402b621851SMajd Dibbiny qp->ibqp.qp_type == IB_QPT_XRC_INI || 29412b621851SMajd Dibbiny qp->ibqp.qp_type == IB_QPT_XRC_TGT) 294247ec3866SParav Pandit path->udp_sport = 294347ec3866SParav Pandit mlx5_get_roce_udp_sport(dev, ah->grh.sgid_attr); 2944d8966fcdSDasaratharaman Chandramouli path->dci_cfi_prio_sl = (sl & 0x7) << 4; 294547ec3866SParav Pandit gid_type = ah->grh.sgid_attr->gid_type; 2946ed88451eSMajd Dibbiny if (gid_type == IB_GID_TYPE_ROCE_UDP_ENCAP) 2947d8966fcdSDasaratharaman Chandramouli path->ecn_dscp = (grh->traffic_class >> 2) & 0x3f; 29482811ba51SAchiad Shochat } else { 2949d3ae2bdeSNoa Osherovich path->fl_free_ar = (path_flags & MLX5_PATH_FLAG_FL) ? 0x80 : 0; 2950d3ae2bdeSNoa Osherovich path->fl_free_ar |= 2951d3ae2bdeSNoa Osherovich (path_flags & MLX5_PATH_FLAG_FREE_AR) ? 0x40 : 0; 2952d8966fcdSDasaratharaman Chandramouli path->rlid = cpu_to_be16(rdma_ah_get_dlid(ah)); 2953d8966fcdSDasaratharaman Chandramouli path->grh_mlid = rdma_ah_get_path_bits(ah) & 0x7f; 2954d8966fcdSDasaratharaman Chandramouli if (ah_flags & IB_AH_GRH) 2955e126ba97SEli Cohen path->grh_mlid |= 1 << 7; 2956d8966fcdSDasaratharaman Chandramouli path->dci_cfi_prio_sl = sl & 0xf; 29572811ba51SAchiad Shochat } 29582811ba51SAchiad Shochat 2959d8966fcdSDasaratharaman Chandramouli if (ah_flags & IB_AH_GRH) { 2960d8966fcdSDasaratharaman Chandramouli path->mgid_index = grh->sgid_index; 2961d8966fcdSDasaratharaman Chandramouli path->hop_limit = grh->hop_limit; 2962e126ba97SEli Cohen path->tclass_flowlabel = 2963d8966fcdSDasaratharaman Chandramouli cpu_to_be32((grh->traffic_class << 20) | 2964d8966fcdSDasaratharaman Chandramouli (grh->flow_label)); 2965d8966fcdSDasaratharaman Chandramouli memcpy(path->rgid, grh->dgid.raw, 16); 2966e126ba97SEli Cohen } 2967e126ba97SEli Cohen 2968d8966fcdSDasaratharaman Chandramouli err = ib_rate_to_mlx5(dev, rdma_ah_get_static_rate(ah)); 2969e126ba97SEli Cohen if (err < 0) 2970e126ba97SEli Cohen return err; 2971e126ba97SEli Cohen path->static_rate = err; 2972e126ba97SEli Cohen path->port = port; 2973e126ba97SEli Cohen 2974e126ba97SEli Cohen if (attr_mask & IB_QP_TIMEOUT) 2975f879ee8dSAchiad Shochat path->ackto_lt = (alt ? attr->alt_timeout : attr->timeout) << 3; 2976e126ba97SEli Cohen 297775850d0bSmajd@mellanox.com if ((qp->ibqp.qp_type == IB_QPT_RAW_PACKET) && qp->sq.wqe_cnt) 297875850d0bSmajd@mellanox.com return modify_raw_packet_eth_prio(dev->mdev, 297975850d0bSmajd@mellanox.com &qp->raw_packet_qp.sq, 29801cd6dbd3SYishai Hadas sl & 0xf, qp->ibqp.pd); 298175850d0bSmajd@mellanox.com 2982e126ba97SEli Cohen return 0; 2983e126ba97SEli Cohen } 2984e126ba97SEli Cohen 2985e126ba97SEli Cohen static enum mlx5_qp_optpar opt_mask[MLX5_QP_NUM_STATE][MLX5_QP_NUM_STATE][MLX5_QP_ST_MAX] = { 2986e126ba97SEli Cohen [MLX5_QP_STATE_INIT] = { 2987e126ba97SEli Cohen [MLX5_QP_STATE_INIT] = { 2988e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_RRE | 2989e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 2990e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 2991e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX | 2992e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT, 2993e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_RWE | 2994e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX | 2995e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT, 2996e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_PKEY_INDEX | 2997e126ba97SEli Cohen MLX5_QP_OPTPAR_Q_KEY | 2998e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT, 29998f4426aaSJack Morgenstein [MLX5_QP_ST_XRC] = MLX5_QP_OPTPAR_RRE | 30008f4426aaSJack Morgenstein MLX5_QP_OPTPAR_RAE | 30018f4426aaSJack Morgenstein MLX5_QP_OPTPAR_RWE | 30028f4426aaSJack Morgenstein MLX5_QP_OPTPAR_PKEY_INDEX | 30038f4426aaSJack Morgenstein MLX5_QP_OPTPAR_PRI_PORT, 3004e126ba97SEli Cohen }, 3005e126ba97SEli Cohen [MLX5_QP_STATE_RTR] = { 3006e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 3007e126ba97SEli Cohen MLX5_QP_OPTPAR_RRE | 3008e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 3009e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 3010e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX, 3011e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 3012e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 3013e126ba97SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX, 3014e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_PKEY_INDEX | 3015e126ba97SEli Cohen MLX5_QP_OPTPAR_Q_KEY, 3016e126ba97SEli Cohen [MLX5_QP_ST_MLX] = MLX5_QP_OPTPAR_PKEY_INDEX | 3017e126ba97SEli Cohen MLX5_QP_OPTPAR_Q_KEY, 3018a4774e90SEli Cohen [MLX5_QP_ST_XRC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 3019a4774e90SEli Cohen MLX5_QP_OPTPAR_RRE | 3020a4774e90SEli Cohen MLX5_QP_OPTPAR_RAE | 3021a4774e90SEli Cohen MLX5_QP_OPTPAR_RWE | 3022a4774e90SEli Cohen MLX5_QP_OPTPAR_PKEY_INDEX, 3023e126ba97SEli Cohen }, 3024e126ba97SEli Cohen }, 3025e126ba97SEli Cohen [MLX5_QP_STATE_RTR] = { 3026e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 3027e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 3028e126ba97SEli Cohen MLX5_QP_OPTPAR_RRE | 3029e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 3030e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 3031e126ba97SEli Cohen MLX5_QP_OPTPAR_PM_STATE | 3032e126ba97SEli Cohen MLX5_QP_OPTPAR_RNR_TIMEOUT, 3033e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 3034e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 3035e126ba97SEli Cohen MLX5_QP_OPTPAR_PM_STATE, 3036e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_Q_KEY, 30378f4426aaSJack Morgenstein [MLX5_QP_ST_XRC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH | 30388f4426aaSJack Morgenstein MLX5_QP_OPTPAR_RRE | 30398f4426aaSJack Morgenstein MLX5_QP_OPTPAR_RAE | 30408f4426aaSJack Morgenstein MLX5_QP_OPTPAR_RWE | 30418f4426aaSJack Morgenstein MLX5_QP_OPTPAR_PM_STATE | 30428f4426aaSJack Morgenstein MLX5_QP_OPTPAR_RNR_TIMEOUT, 3043e126ba97SEli Cohen }, 3044e126ba97SEli Cohen }, 3045e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 3046e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 3047e126ba97SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_RRE | 3048e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE | 3049e126ba97SEli Cohen MLX5_QP_OPTPAR_RWE | 3050e126ba97SEli Cohen MLX5_QP_OPTPAR_RNR_TIMEOUT | 3051c2a3431eSEli Cohen MLX5_QP_OPTPAR_PM_STATE | 3052c2a3431eSEli Cohen MLX5_QP_OPTPAR_ALT_ADDR_PATH, 3053e126ba97SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_RWE | 3054c2a3431eSEli Cohen MLX5_QP_OPTPAR_PM_STATE | 3055c2a3431eSEli Cohen MLX5_QP_OPTPAR_ALT_ADDR_PATH, 3056e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_Q_KEY | 3057e126ba97SEli Cohen MLX5_QP_OPTPAR_SRQN | 3058e126ba97SEli Cohen MLX5_QP_OPTPAR_CQN_RCV, 30598f4426aaSJack Morgenstein [MLX5_QP_ST_XRC] = MLX5_QP_OPTPAR_RRE | 30608f4426aaSJack Morgenstein MLX5_QP_OPTPAR_RAE | 30618f4426aaSJack Morgenstein MLX5_QP_OPTPAR_RWE | 30628f4426aaSJack Morgenstein MLX5_QP_OPTPAR_RNR_TIMEOUT | 30638f4426aaSJack Morgenstein MLX5_QP_OPTPAR_PM_STATE | 30648f4426aaSJack Morgenstein MLX5_QP_OPTPAR_ALT_ADDR_PATH, 3065e126ba97SEli Cohen }, 3066e126ba97SEli Cohen }, 3067e126ba97SEli Cohen [MLX5_QP_STATE_SQER] = { 3068e126ba97SEli Cohen [MLX5_QP_STATE_RTS] = { 3069e126ba97SEli Cohen [MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_Q_KEY, 3070e126ba97SEli Cohen [MLX5_QP_ST_MLX] = MLX5_QP_OPTPAR_Q_KEY, 307175959f56SEli Cohen [MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_RWE, 3072a4774e90SEli Cohen [MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_RNR_TIMEOUT | 3073a4774e90SEli Cohen MLX5_QP_OPTPAR_RWE | 3074a4774e90SEli Cohen MLX5_QP_OPTPAR_RAE | 3075a4774e90SEli Cohen MLX5_QP_OPTPAR_RRE, 30768f4426aaSJack Morgenstein [MLX5_QP_ST_XRC] = MLX5_QP_OPTPAR_RNR_TIMEOUT | 30778f4426aaSJack Morgenstein MLX5_QP_OPTPAR_RWE | 30788f4426aaSJack Morgenstein MLX5_QP_OPTPAR_RAE | 30798f4426aaSJack Morgenstein MLX5_QP_OPTPAR_RRE, 3080e126ba97SEli Cohen }, 3081e126ba97SEli Cohen }, 3082e126ba97SEli Cohen }; 3083e126ba97SEli Cohen 3084e126ba97SEli Cohen static int ib_nr_to_mlx5_nr(int ib_mask) 3085e126ba97SEli Cohen { 3086e126ba97SEli Cohen switch (ib_mask) { 3087e126ba97SEli Cohen case IB_QP_STATE: 3088e126ba97SEli Cohen return 0; 3089e126ba97SEli Cohen case IB_QP_CUR_STATE: 3090e126ba97SEli Cohen return 0; 3091e126ba97SEli Cohen case IB_QP_EN_SQD_ASYNC_NOTIFY: 3092e126ba97SEli Cohen return 0; 3093e126ba97SEli Cohen case IB_QP_ACCESS_FLAGS: 3094e126ba97SEli Cohen return MLX5_QP_OPTPAR_RWE | MLX5_QP_OPTPAR_RRE | 3095e126ba97SEli Cohen MLX5_QP_OPTPAR_RAE; 3096e126ba97SEli Cohen case IB_QP_PKEY_INDEX: 3097e126ba97SEli Cohen return MLX5_QP_OPTPAR_PKEY_INDEX; 3098e126ba97SEli Cohen case IB_QP_PORT: 3099e126ba97SEli Cohen return MLX5_QP_OPTPAR_PRI_PORT; 3100e126ba97SEli Cohen case IB_QP_QKEY: 3101e126ba97SEli Cohen return MLX5_QP_OPTPAR_Q_KEY; 3102e126ba97SEli Cohen case IB_QP_AV: 3103e126ba97SEli Cohen return MLX5_QP_OPTPAR_PRIMARY_ADDR_PATH | 3104e126ba97SEli Cohen MLX5_QP_OPTPAR_PRI_PORT; 3105e126ba97SEli Cohen case IB_QP_PATH_MTU: 3106e126ba97SEli Cohen return 0; 3107e126ba97SEli Cohen case IB_QP_TIMEOUT: 3108e126ba97SEli Cohen return MLX5_QP_OPTPAR_ACK_TIMEOUT; 3109e126ba97SEli Cohen case IB_QP_RETRY_CNT: 3110e126ba97SEli Cohen return MLX5_QP_OPTPAR_RETRY_COUNT; 3111e126ba97SEli Cohen case IB_QP_RNR_RETRY: 3112e126ba97SEli Cohen return MLX5_QP_OPTPAR_RNR_RETRY; 3113e126ba97SEli Cohen case IB_QP_RQ_PSN: 3114e126ba97SEli Cohen return 0; 3115e126ba97SEli Cohen case IB_QP_MAX_QP_RD_ATOMIC: 3116e126ba97SEli Cohen return MLX5_QP_OPTPAR_SRA_MAX; 3117e126ba97SEli Cohen case IB_QP_ALT_PATH: 3118e126ba97SEli Cohen return MLX5_QP_OPTPAR_ALT_ADDR_PATH; 3119e126ba97SEli Cohen case IB_QP_MIN_RNR_TIMER: 3120e126ba97SEli Cohen return MLX5_QP_OPTPAR_RNR_TIMEOUT; 3121e126ba97SEli Cohen case IB_QP_SQ_PSN: 3122e126ba97SEli Cohen return 0; 3123e126ba97SEli Cohen case IB_QP_MAX_DEST_RD_ATOMIC: 3124e126ba97SEli Cohen return MLX5_QP_OPTPAR_RRA_MAX | MLX5_QP_OPTPAR_RWE | 3125e126ba97SEli Cohen MLX5_QP_OPTPAR_RRE | MLX5_QP_OPTPAR_RAE; 3126e126ba97SEli Cohen case IB_QP_PATH_MIG_STATE: 3127e126ba97SEli Cohen return MLX5_QP_OPTPAR_PM_STATE; 3128e126ba97SEli Cohen case IB_QP_CAP: 3129e126ba97SEli Cohen return 0; 3130e126ba97SEli Cohen case IB_QP_DEST_QPN: 3131e126ba97SEli Cohen return 0; 3132e126ba97SEli Cohen } 3133e126ba97SEli Cohen return 0; 3134e126ba97SEli Cohen } 3135e126ba97SEli Cohen 3136e126ba97SEli Cohen static int ib_mask_to_mlx5_opt(int ib_mask) 3137e126ba97SEli Cohen { 3138e126ba97SEli Cohen int result = 0; 3139e126ba97SEli Cohen int i; 3140e126ba97SEli Cohen 3141e126ba97SEli Cohen for (i = 0; i < 8 * sizeof(int); i++) { 3142e126ba97SEli Cohen if ((1 << i) & ib_mask) 3143e126ba97SEli Cohen result |= ib_nr_to_mlx5_nr(1 << i); 3144e126ba97SEli Cohen } 3145e126ba97SEli Cohen 3146e126ba97SEli Cohen return result; 3147e126ba97SEli Cohen } 3148e126ba97SEli Cohen 314934d57585SYishai Hadas static int modify_raw_packet_qp_rq( 315034d57585SYishai Hadas struct mlx5_ib_dev *dev, struct mlx5_ib_rq *rq, int new_state, 315134d57585SYishai Hadas const struct mlx5_modify_raw_qp_param *raw_qp_param, struct ib_pd *pd) 3152ad5f8e96Smajd@mellanox.com { 3153ad5f8e96Smajd@mellanox.com void *in; 3154ad5f8e96Smajd@mellanox.com void *rqc; 3155ad5f8e96Smajd@mellanox.com int inlen; 3156ad5f8e96Smajd@mellanox.com int err; 3157ad5f8e96Smajd@mellanox.com 3158ad5f8e96Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(modify_rq_in); 31591b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 3160ad5f8e96Smajd@mellanox.com if (!in) 3161ad5f8e96Smajd@mellanox.com return -ENOMEM; 3162ad5f8e96Smajd@mellanox.com 3163ad5f8e96Smajd@mellanox.com MLX5_SET(modify_rq_in, in, rq_state, rq->state); 316434d57585SYishai Hadas MLX5_SET(modify_rq_in, in, uid, to_mpd(pd)->uid); 3165ad5f8e96Smajd@mellanox.com 3166ad5f8e96Smajd@mellanox.com rqc = MLX5_ADDR_OF(modify_rq_in, in, ctx); 3167ad5f8e96Smajd@mellanox.com MLX5_SET(rqc, rqc, state, new_state); 3168ad5f8e96Smajd@mellanox.com 3169eb49ab0cSAlex Vesker if (raw_qp_param->set_mask & MLX5_RAW_QP_MOD_SET_RQ_Q_CTR_ID) { 3170eb49ab0cSAlex Vesker if (MLX5_CAP_GEN(dev->mdev, modify_rq_counter_set_id)) { 3171eb49ab0cSAlex Vesker MLX5_SET64(modify_rq_in, in, modify_bitmask, 317223a6964eSMajd Dibbiny MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID); 3173eb49ab0cSAlex Vesker MLX5_SET(rqc, rqc, counter_set_id, raw_qp_param->rq_q_ctr_id); 3174eb49ab0cSAlex Vesker } else 31755a738b5dSJason Gunthorpe dev_info_once( 31765a738b5dSJason Gunthorpe &dev->ib_dev.dev, 31775a738b5dSJason Gunthorpe "RAW PACKET QP counters are not supported on current FW\n"); 3178eb49ab0cSAlex Vesker } 3179eb49ab0cSAlex Vesker 3180eb49ab0cSAlex Vesker err = mlx5_core_modify_rq(dev->mdev, rq->base.mqp.qpn, in, inlen); 3181ad5f8e96Smajd@mellanox.com if (err) 3182ad5f8e96Smajd@mellanox.com goto out; 3183ad5f8e96Smajd@mellanox.com 3184ad5f8e96Smajd@mellanox.com rq->state = new_state; 3185ad5f8e96Smajd@mellanox.com 3186ad5f8e96Smajd@mellanox.com out: 3187ad5f8e96Smajd@mellanox.com kvfree(in); 3188ad5f8e96Smajd@mellanox.com return err; 3189ad5f8e96Smajd@mellanox.com } 3190ad5f8e96Smajd@mellanox.com 3191c14003f0SYishai Hadas static int modify_raw_packet_qp_sq( 3192c14003f0SYishai Hadas struct mlx5_core_dev *dev, struct mlx5_ib_sq *sq, int new_state, 3193c14003f0SYishai Hadas const struct mlx5_modify_raw_qp_param *raw_qp_param, struct ib_pd *pd) 3194ad5f8e96Smajd@mellanox.com { 31957d29f349SBodong Wang struct mlx5_ib_qp *ibqp = sq->base.container_mibqp; 319661147f39SBodong Wang struct mlx5_rate_limit old_rl = ibqp->rl; 319761147f39SBodong Wang struct mlx5_rate_limit new_rl = old_rl; 319861147f39SBodong Wang bool new_rate_added = false; 31997d29f349SBodong Wang u16 rl_index = 0; 3200ad5f8e96Smajd@mellanox.com void *in; 3201ad5f8e96Smajd@mellanox.com void *sqc; 3202ad5f8e96Smajd@mellanox.com int inlen; 3203ad5f8e96Smajd@mellanox.com int err; 3204ad5f8e96Smajd@mellanox.com 3205ad5f8e96Smajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(modify_sq_in); 32061b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 3207ad5f8e96Smajd@mellanox.com if (!in) 3208ad5f8e96Smajd@mellanox.com return -ENOMEM; 3209ad5f8e96Smajd@mellanox.com 3210c14003f0SYishai Hadas MLX5_SET(modify_sq_in, in, uid, to_mpd(pd)->uid); 3211ad5f8e96Smajd@mellanox.com MLX5_SET(modify_sq_in, in, sq_state, sq->state); 3212ad5f8e96Smajd@mellanox.com 3213ad5f8e96Smajd@mellanox.com sqc = MLX5_ADDR_OF(modify_sq_in, in, ctx); 3214ad5f8e96Smajd@mellanox.com MLX5_SET(sqc, sqc, state, new_state); 3215ad5f8e96Smajd@mellanox.com 32167d29f349SBodong Wang if (raw_qp_param->set_mask & MLX5_RAW_QP_RATE_LIMIT) { 32177d29f349SBodong Wang if (new_state != MLX5_SQC_STATE_RDY) 32187d29f349SBodong Wang pr_warn("%s: Rate limit can only be changed when SQ is moving to RDY\n", 32197d29f349SBodong Wang __func__); 32207d29f349SBodong Wang else 322161147f39SBodong Wang new_rl = raw_qp_param->rl; 32227d29f349SBodong Wang } 3223ad5f8e96Smajd@mellanox.com 322461147f39SBodong Wang if (!mlx5_rl_are_equal(&old_rl, &new_rl)) { 322561147f39SBodong Wang if (new_rl.rate) { 322661147f39SBodong Wang err = mlx5_rl_add_rate(dev, &rl_index, &new_rl); 32277d29f349SBodong Wang if (err) { 322861147f39SBodong Wang pr_err("Failed configuring rate limit(err %d): \ 322961147f39SBodong Wang rate %u, max_burst_sz %u, typical_pkt_sz %u\n", 323061147f39SBodong Wang err, new_rl.rate, new_rl.max_burst_sz, 323161147f39SBodong Wang new_rl.typical_pkt_sz); 323261147f39SBodong Wang 32337d29f349SBodong Wang goto out; 32347d29f349SBodong Wang } 323561147f39SBodong Wang new_rate_added = true; 32367d29f349SBodong Wang } 32377d29f349SBodong Wang 32387d29f349SBodong Wang MLX5_SET64(modify_sq_in, in, modify_bitmask, 1); 323961147f39SBodong Wang /* index 0 means no limit */ 32407d29f349SBodong Wang MLX5_SET(sqc, sqc, packet_pacing_rate_limit_index, rl_index); 32417d29f349SBodong Wang } 32427d29f349SBodong Wang 32437d29f349SBodong Wang err = mlx5_core_modify_sq(dev, sq->base.mqp.qpn, in, inlen); 32447d29f349SBodong Wang if (err) { 32457d29f349SBodong Wang /* Remove new rate from table if failed */ 324661147f39SBodong Wang if (new_rate_added) 324761147f39SBodong Wang mlx5_rl_remove_rate(dev, &new_rl); 32487d29f349SBodong Wang goto out; 32497d29f349SBodong Wang } 32507d29f349SBodong Wang 32517d29f349SBodong Wang /* Only remove the old rate after new rate was set */ 325261147f39SBodong Wang if ((old_rl.rate && 325361147f39SBodong Wang !mlx5_rl_are_equal(&old_rl, &new_rl)) || 32547d29f349SBodong Wang (new_state != MLX5_SQC_STATE_RDY)) 325561147f39SBodong Wang mlx5_rl_remove_rate(dev, &old_rl); 32567d29f349SBodong Wang 325761147f39SBodong Wang ibqp->rl = new_rl; 3258ad5f8e96Smajd@mellanox.com sq->state = new_state; 3259ad5f8e96Smajd@mellanox.com 3260ad5f8e96Smajd@mellanox.com out: 3261ad5f8e96Smajd@mellanox.com kvfree(in); 3262ad5f8e96Smajd@mellanox.com return err; 3263ad5f8e96Smajd@mellanox.com } 3264ad5f8e96Smajd@mellanox.com 3265ad5f8e96Smajd@mellanox.com static int modify_raw_packet_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 326613eab21fSAviv Heller const struct mlx5_modify_raw_qp_param *raw_qp_param, 326713eab21fSAviv Heller u8 tx_affinity) 3268ad5f8e96Smajd@mellanox.com { 3269ad5f8e96Smajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 3270ad5f8e96Smajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 3271ad5f8e96Smajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 32727d29f349SBodong Wang int modify_rq = !!qp->rq.wqe_cnt; 32737d29f349SBodong Wang int modify_sq = !!qp->sq.wqe_cnt; 3274ad5f8e96Smajd@mellanox.com int rq_state; 3275ad5f8e96Smajd@mellanox.com int sq_state; 3276ad5f8e96Smajd@mellanox.com int err; 3277ad5f8e96Smajd@mellanox.com 32780680efa2SAlex Vesker switch (raw_qp_param->operation) { 3279ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_RST2INIT_QP: 3280ad5f8e96Smajd@mellanox.com rq_state = MLX5_RQC_STATE_RDY; 3281ad5f8e96Smajd@mellanox.com sq_state = MLX5_SQC_STATE_RDY; 3282ad5f8e96Smajd@mellanox.com break; 3283ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_2ERR_QP: 3284ad5f8e96Smajd@mellanox.com rq_state = MLX5_RQC_STATE_ERR; 3285ad5f8e96Smajd@mellanox.com sq_state = MLX5_SQC_STATE_ERR; 3286ad5f8e96Smajd@mellanox.com break; 3287ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_2RST_QP: 3288ad5f8e96Smajd@mellanox.com rq_state = MLX5_RQC_STATE_RST; 3289ad5f8e96Smajd@mellanox.com sq_state = MLX5_SQC_STATE_RST; 3290ad5f8e96Smajd@mellanox.com break; 3291ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_RTR2RTS_QP: 3292ad5f8e96Smajd@mellanox.com case MLX5_CMD_OP_RTS2RTS_QP: 32937d29f349SBodong Wang if (raw_qp_param->set_mask == 32947d29f349SBodong Wang MLX5_RAW_QP_RATE_LIMIT) { 32957d29f349SBodong Wang modify_rq = 0; 32967d29f349SBodong Wang sq_state = sq->state; 32977d29f349SBodong Wang } else { 32987d29f349SBodong Wang return raw_qp_param->set_mask ? -EINVAL : 0; 32997d29f349SBodong Wang } 33007d29f349SBodong Wang break; 33017d29f349SBodong Wang case MLX5_CMD_OP_INIT2INIT_QP: 33027d29f349SBodong Wang case MLX5_CMD_OP_INIT2RTR_QP: 3303eb49ab0cSAlex Vesker if (raw_qp_param->set_mask) 3304eb49ab0cSAlex Vesker return -EINVAL; 3305eb49ab0cSAlex Vesker else 3306ad5f8e96Smajd@mellanox.com return 0; 3307ad5f8e96Smajd@mellanox.com default: 3308ad5f8e96Smajd@mellanox.com WARN_ON(1); 3309ad5f8e96Smajd@mellanox.com return -EINVAL; 3310ad5f8e96Smajd@mellanox.com } 3311ad5f8e96Smajd@mellanox.com 33127d29f349SBodong Wang if (modify_rq) { 331334d57585SYishai Hadas err = modify_raw_packet_qp_rq(dev, rq, rq_state, raw_qp_param, 331434d57585SYishai Hadas qp->ibqp.pd); 3315ad5f8e96Smajd@mellanox.com if (err) 3316ad5f8e96Smajd@mellanox.com return err; 3317ad5f8e96Smajd@mellanox.com } 3318ad5f8e96Smajd@mellanox.com 33197d29f349SBodong Wang if (modify_sq) { 3320d5ed8ac3SMark Bloch struct mlx5_flow_handle *flow_rule; 3321d5ed8ac3SMark Bloch 332213eab21fSAviv Heller if (tx_affinity) { 332313eab21fSAviv Heller err = modify_raw_packet_tx_affinity(dev->mdev, sq, 33241cd6dbd3SYishai Hadas tx_affinity, 33251cd6dbd3SYishai Hadas qp->ibqp.pd); 332613eab21fSAviv Heller if (err) 332713eab21fSAviv Heller return err; 332813eab21fSAviv Heller } 332913eab21fSAviv Heller 3330d5ed8ac3SMark Bloch flow_rule = create_flow_rule_vport_sq(dev, sq, 3331d5ed8ac3SMark Bloch raw_qp_param->port); 3332d5ed8ac3SMark Bloch if (IS_ERR(flow_rule)) 33331db86318SColin Ian King return PTR_ERR(flow_rule); 3334d5ed8ac3SMark Bloch 3335d5ed8ac3SMark Bloch err = modify_raw_packet_qp_sq(dev->mdev, sq, sq_state, 3336c14003f0SYishai Hadas raw_qp_param, qp->ibqp.pd); 3337d5ed8ac3SMark Bloch if (err) { 3338d5ed8ac3SMark Bloch if (flow_rule) 3339d5ed8ac3SMark Bloch mlx5_del_flow_rules(flow_rule); 3340d5ed8ac3SMark Bloch return err; 3341d5ed8ac3SMark Bloch } 3342d5ed8ac3SMark Bloch 3343d5ed8ac3SMark Bloch if (flow_rule) { 3344d5ed8ac3SMark Bloch destroy_flow_rule_vport_sq(sq); 3345d5ed8ac3SMark Bloch sq->flow_rule = flow_rule; 3346d5ed8ac3SMark Bloch } 3347d5ed8ac3SMark Bloch 3348d5ed8ac3SMark Bloch return err; 334913eab21fSAviv Heller } 3350ad5f8e96Smajd@mellanox.com 3351ad5f8e96Smajd@mellanox.com return 0; 3352ad5f8e96Smajd@mellanox.com } 3353ad5f8e96Smajd@mellanox.com 3354c6a21c38SMajd Dibbiny static unsigned int get_tx_affinity(struct mlx5_ib_dev *dev, 3355c6a21c38SMajd Dibbiny struct mlx5_ib_pd *pd, 3356c6a21c38SMajd Dibbiny struct mlx5_ib_qp_base *qp_base, 335789944450SShamir Rabinovitch u8 port_num, struct ib_udata *udata) 3358c6a21c38SMajd Dibbiny { 335989944450SShamir Rabinovitch struct mlx5_ib_ucontext *ucontext = rdma_udata_to_drv_context( 336089944450SShamir Rabinovitch udata, struct mlx5_ib_ucontext, ibucontext); 3361c6a21c38SMajd Dibbiny unsigned int tx_port_affinity; 3362c6a21c38SMajd Dibbiny 3363c6a21c38SMajd Dibbiny if (ucontext) { 3364c6a21c38SMajd Dibbiny tx_port_affinity = (unsigned int)atomic_add_return( 3365c6a21c38SMajd Dibbiny 1, &ucontext->tx_port_affinity) % 3366c6a21c38SMajd Dibbiny MLX5_MAX_PORTS + 3367c6a21c38SMajd Dibbiny 1; 3368c6a21c38SMajd Dibbiny mlx5_ib_dbg(dev, "Set tx affinity 0x%x to qpn 0x%x ucontext %p\n", 3369c6a21c38SMajd Dibbiny tx_port_affinity, qp_base->mqp.qpn, ucontext); 3370c6a21c38SMajd Dibbiny } else { 3371c6a21c38SMajd Dibbiny tx_port_affinity = 3372c6a21c38SMajd Dibbiny (unsigned int)atomic_add_return( 337395579e78SMark Bloch 1, &dev->port[port_num].roce.tx_port_affinity) % 3374c6a21c38SMajd Dibbiny MLX5_MAX_PORTS + 3375c6a21c38SMajd Dibbiny 1; 3376c6a21c38SMajd Dibbiny mlx5_ib_dbg(dev, "Set tx affinity 0x%x to qpn 0x%x\n", 3377c6a21c38SMajd Dibbiny tx_port_affinity, qp_base->mqp.qpn); 3378c6a21c38SMajd Dibbiny } 3379c6a21c38SMajd Dibbiny 3380c6a21c38SMajd Dibbiny return tx_port_affinity; 3381c6a21c38SMajd Dibbiny } 3382c6a21c38SMajd Dibbiny 3383e126ba97SEli Cohen static int __mlx5_ib_modify_qp(struct ib_qp *ibqp, 3384e126ba97SEli Cohen const struct ib_qp_attr *attr, int attr_mask, 338589944450SShamir Rabinovitch enum ib_qp_state cur_state, 338689944450SShamir Rabinovitch enum ib_qp_state new_state, 338789944450SShamir Rabinovitch const struct mlx5_ib_modify_qp *ucmd, 338889944450SShamir Rabinovitch struct ib_udata *udata) 3389e126ba97SEli Cohen { 3390427c1e7bSmajd@mellanox.com static const u16 optab[MLX5_QP_NUM_STATE][MLX5_QP_NUM_STATE] = { 3391427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = { 3392427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3393427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3394427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_INIT] = MLX5_CMD_OP_RST2INIT_QP, 3395427c1e7bSmajd@mellanox.com }, 3396427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_INIT] = { 3397427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3398427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3399427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_INIT] = MLX5_CMD_OP_INIT2INIT_QP, 3400427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTR] = MLX5_CMD_OP_INIT2RTR_QP, 3401427c1e7bSmajd@mellanox.com }, 3402427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTR] = { 3403427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3404427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3405427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = MLX5_CMD_OP_RTR2RTS_QP, 3406427c1e7bSmajd@mellanox.com }, 3407427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = { 3408427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3409427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3410427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = MLX5_CMD_OP_RTS2RTS_QP, 3411427c1e7bSmajd@mellanox.com }, 3412427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_SQD] = { 3413427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3414427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3415427c1e7bSmajd@mellanox.com }, 3416427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_SQER] = { 3417427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3418427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3419427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RTS] = MLX5_CMD_OP_SQERR2RTS_QP, 3420427c1e7bSmajd@mellanox.com }, 3421427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = { 3422427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_RST] = MLX5_CMD_OP_2RST_QP, 3423427c1e7bSmajd@mellanox.com [MLX5_QP_STATE_ERR] = MLX5_CMD_OP_2ERR_QP, 3424427c1e7bSmajd@mellanox.com } 3425427c1e7bSmajd@mellanox.com }; 3426427c1e7bSmajd@mellanox.com 3427e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 3428e126ba97SEli Cohen struct mlx5_ib_qp *qp = to_mqp(ibqp); 342919098df2Smajd@mellanox.com struct mlx5_ib_qp_base *base = &qp->trans_qp.base; 3430e126ba97SEli Cohen struct mlx5_ib_cq *send_cq, *recv_cq; 3431e126ba97SEli Cohen struct mlx5_qp_context *context; 3432e126ba97SEli Cohen struct mlx5_ib_pd *pd; 3433eb49ab0cSAlex Vesker struct mlx5_ib_port *mibport = NULL; 3434e126ba97SEli Cohen enum mlx5_qp_state mlx5_cur, mlx5_new; 3435e126ba97SEli Cohen enum mlx5_qp_optpar optpar; 3436e126ba97SEli Cohen int mlx5_st; 3437e126ba97SEli Cohen int err; 3438427c1e7bSmajd@mellanox.com u16 op; 343913eab21fSAviv Heller u8 tx_affinity = 0; 3440e126ba97SEli Cohen 344155de9a77SLeon Romanovsky mlx5_st = to_mlx5_st(ibqp->qp_type == IB_QPT_DRIVER ? 344255de9a77SLeon Romanovsky qp->qp_sub_type : ibqp->qp_type); 344355de9a77SLeon Romanovsky if (mlx5_st < 0) 344455de9a77SLeon Romanovsky return -EINVAL; 344555de9a77SLeon Romanovsky 34461a412fb1SSaeed Mahameed context = kzalloc(sizeof(*context), GFP_KERNEL); 34471a412fb1SSaeed Mahameed if (!context) 3448e126ba97SEli Cohen return -ENOMEM; 3449e126ba97SEli Cohen 3450c6a21c38SMajd Dibbiny pd = get_pd(qp); 345155de9a77SLeon Romanovsky context->flags = cpu_to_be32(mlx5_st << 16); 3452e126ba97SEli Cohen 3453e126ba97SEli Cohen if (!(attr_mask & IB_QP_PATH_MIG_STATE)) { 3454e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_MIGRATED << 11); 3455e126ba97SEli Cohen } else { 3456e126ba97SEli Cohen switch (attr->path_mig_state) { 3457e126ba97SEli Cohen case IB_MIG_MIGRATED: 3458e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_MIGRATED << 11); 3459e126ba97SEli Cohen break; 3460e126ba97SEli Cohen case IB_MIG_REARM: 3461e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_REARM << 11); 3462e126ba97SEli Cohen break; 3463e126ba97SEli Cohen case IB_MIG_ARMED: 3464e126ba97SEli Cohen context->flags |= cpu_to_be32(MLX5_QP_PM_ARMED << 11); 3465e126ba97SEli Cohen break; 3466e126ba97SEli Cohen } 3467e126ba97SEli Cohen } 3468e126ba97SEli Cohen 346913eab21fSAviv Heller if ((cur_state == IB_QPS_RESET) && (new_state == IB_QPS_INIT)) { 347013eab21fSAviv Heller if ((ibqp->qp_type == IB_QPT_RC) || 347113eab21fSAviv Heller (ibqp->qp_type == IB_QPT_UD && 347213eab21fSAviv Heller !(qp->flags & MLX5_IB_QP_SQPN_QP1)) || 347313eab21fSAviv Heller (ibqp->qp_type == IB_QPT_UC) || 347413eab21fSAviv Heller (ibqp->qp_type == IB_QPT_RAW_PACKET) || 347513eab21fSAviv Heller (ibqp->qp_type == IB_QPT_XRC_INI) || 347613eab21fSAviv Heller (ibqp->qp_type == IB_QPT_XRC_TGT)) { 34777c34ec19SAviv Heller if (dev->lag_active) { 347895579e78SMark Bloch u8 p = mlx5_core_native_port_num(dev->mdev) - 1; 347989944450SShamir Rabinovitch tx_affinity = get_tx_affinity(dev, pd, base, p, 348089944450SShamir Rabinovitch udata); 348113eab21fSAviv Heller context->flags |= cpu_to_be32(tx_affinity << 24); 348213eab21fSAviv Heller } 348313eab21fSAviv Heller } 348413eab21fSAviv Heller } 348513eab21fSAviv Heller 3486d16e91daSHaggai Eran if (is_sqp(ibqp->qp_type)) { 3487e126ba97SEli Cohen context->mtu_msgmax = (IB_MTU_256 << 5) | 8; 3488c2e53b2cSYishai Hadas } else if ((ibqp->qp_type == IB_QPT_UD && 3489c2e53b2cSYishai Hadas !(qp->flags & MLX5_IB_QP_UNDERLAY)) || 3490e126ba97SEli Cohen ibqp->qp_type == MLX5_IB_QPT_REG_UMR) { 3491e126ba97SEli Cohen context->mtu_msgmax = (IB_MTU_4096 << 5) | 12; 3492e126ba97SEli Cohen } else if (attr_mask & IB_QP_PATH_MTU) { 3493e126ba97SEli Cohen if (attr->path_mtu < IB_MTU_256 || 3494e126ba97SEli Cohen attr->path_mtu > IB_MTU_4096) { 3495e126ba97SEli Cohen mlx5_ib_warn(dev, "invalid mtu %d\n", attr->path_mtu); 3496e126ba97SEli Cohen err = -EINVAL; 3497e126ba97SEli Cohen goto out; 3498e126ba97SEli Cohen } 3499938fe83cSSaeed Mahameed context->mtu_msgmax = (attr->path_mtu << 5) | 3500938fe83cSSaeed Mahameed (u8)MLX5_CAP_GEN(dev->mdev, log_max_msg); 3501e126ba97SEli Cohen } 3502e126ba97SEli Cohen 3503e126ba97SEli Cohen if (attr_mask & IB_QP_DEST_QPN) 3504e126ba97SEli Cohen context->log_pg_sz_remote_qpn = cpu_to_be32(attr->dest_qp_num); 3505e126ba97SEli Cohen 3506e126ba97SEli Cohen if (attr_mask & IB_QP_PKEY_INDEX) 3507d3ae2bdeSNoa Osherovich context->pri_path.pkey_index = cpu_to_be16(attr->pkey_index); 3508e126ba97SEli Cohen 3509e126ba97SEli Cohen /* todo implement counter_index functionality */ 3510e126ba97SEli Cohen 3511e126ba97SEli Cohen if (is_sqp(ibqp->qp_type)) 3512e126ba97SEli Cohen context->pri_path.port = qp->port; 3513e126ba97SEli Cohen 3514e126ba97SEli Cohen if (attr_mask & IB_QP_PORT) 3515e126ba97SEli Cohen context->pri_path.port = attr->port_num; 3516e126ba97SEli Cohen 3517e126ba97SEli Cohen if (attr_mask & IB_QP_AV) { 351875850d0bSmajd@mellanox.com err = mlx5_set_path(dev, qp, &attr->ah_attr, &context->pri_path, 3519e126ba97SEli Cohen attr_mask & IB_QP_PORT ? attr->port_num : qp->port, 3520f879ee8dSAchiad Shochat attr_mask, 0, attr, false); 3521e126ba97SEli Cohen if (err) 3522e126ba97SEli Cohen goto out; 3523e126ba97SEli Cohen } 3524e126ba97SEli Cohen 3525e126ba97SEli Cohen if (attr_mask & IB_QP_TIMEOUT) 3526e126ba97SEli Cohen context->pri_path.ackto_lt |= attr->timeout << 3; 3527e126ba97SEli Cohen 3528e126ba97SEli Cohen if (attr_mask & IB_QP_ALT_PATH) { 352975850d0bSmajd@mellanox.com err = mlx5_set_path(dev, qp, &attr->alt_ah_attr, 353075850d0bSmajd@mellanox.com &context->alt_path, 3531f879ee8dSAchiad Shochat attr->alt_port_num, 3532f879ee8dSAchiad Shochat attr_mask | IB_QP_PKEY_INDEX | IB_QP_TIMEOUT, 3533f879ee8dSAchiad Shochat 0, attr, true); 3534e126ba97SEli Cohen if (err) 3535e126ba97SEli Cohen goto out; 3536e126ba97SEli Cohen } 3537e126ba97SEli Cohen 353889ea94a7SMaor Gottlieb get_cqs(qp->ibqp.qp_type, qp->ibqp.send_cq, qp->ibqp.recv_cq, 353989ea94a7SMaor Gottlieb &send_cq, &recv_cq); 3540e126ba97SEli Cohen 3541e126ba97SEli Cohen context->flags_pd = cpu_to_be32(pd ? pd->pdn : to_mpd(dev->devr.p0)->pdn); 3542e126ba97SEli Cohen context->cqn_send = send_cq ? cpu_to_be32(send_cq->mcq.cqn) : 0; 3543e126ba97SEli Cohen context->cqn_recv = recv_cq ? cpu_to_be32(recv_cq->mcq.cqn) : 0; 3544e126ba97SEli Cohen context->params1 = cpu_to_be32(MLX5_IB_ACK_REQ_FREQ << 28); 3545e126ba97SEli Cohen 3546e126ba97SEli Cohen if (attr_mask & IB_QP_RNR_RETRY) 3547e126ba97SEli Cohen context->params1 |= cpu_to_be32(attr->rnr_retry << 13); 3548e126ba97SEli Cohen 3549e126ba97SEli Cohen if (attr_mask & IB_QP_RETRY_CNT) 3550e126ba97SEli Cohen context->params1 |= cpu_to_be32(attr->retry_cnt << 16); 3551e126ba97SEli Cohen 3552e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC) { 3553e126ba97SEli Cohen if (attr->max_rd_atomic) 3554e126ba97SEli Cohen context->params1 |= 3555e126ba97SEli Cohen cpu_to_be32(fls(attr->max_rd_atomic - 1) << 21); 3556e126ba97SEli Cohen } 3557e126ba97SEli Cohen 3558e126ba97SEli Cohen if (attr_mask & IB_QP_SQ_PSN) 3559e126ba97SEli Cohen context->next_send_psn = cpu_to_be32(attr->sq_psn); 3560e126ba97SEli Cohen 3561e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) { 3562e126ba97SEli Cohen if (attr->max_dest_rd_atomic) 3563e126ba97SEli Cohen context->params2 |= 3564e126ba97SEli Cohen cpu_to_be32(fls(attr->max_dest_rd_atomic - 1) << 21); 3565e126ba97SEli Cohen } 3566e126ba97SEli Cohen 3567a60109dcSYonatan Cohen if (attr_mask & (IB_QP_ACCESS_FLAGS | IB_QP_MAX_DEST_RD_ATOMIC)) { 3568bf3b4f06SBart Van Assche __be32 access_flags; 3569a60109dcSYonatan Cohen 3570a60109dcSYonatan Cohen err = to_mlx5_access_flags(qp, attr, attr_mask, &access_flags); 3571a60109dcSYonatan Cohen if (err) 3572a60109dcSYonatan Cohen goto out; 3573a60109dcSYonatan Cohen 3574a60109dcSYonatan Cohen context->params2 |= access_flags; 3575a60109dcSYonatan Cohen } 3576e126ba97SEli Cohen 3577e126ba97SEli Cohen if (attr_mask & IB_QP_MIN_RNR_TIMER) 3578e126ba97SEli Cohen context->rnr_nextrecvpsn |= cpu_to_be32(attr->min_rnr_timer << 24); 3579e126ba97SEli Cohen 3580e126ba97SEli Cohen if (attr_mask & IB_QP_RQ_PSN) 3581e126ba97SEli Cohen context->rnr_nextrecvpsn |= cpu_to_be32(attr->rq_psn); 3582e126ba97SEli Cohen 3583e126ba97SEli Cohen if (attr_mask & IB_QP_QKEY) 3584e126ba97SEli Cohen context->qkey = cpu_to_be32(attr->qkey); 3585e126ba97SEli Cohen 3586e126ba97SEli Cohen if (qp->rq.wqe_cnt && cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) 3587e126ba97SEli Cohen context->db_rec_addr = cpu_to_be64(qp->db.dma); 3588e126ba97SEli Cohen 35890837e86aSMark Bloch if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { 35900837e86aSMark Bloch u8 port_num = (attr_mask & IB_QP_PORT ? attr->port_num : 35910837e86aSMark Bloch qp->port) - 1; 3592c2e53b2cSYishai Hadas 3593c2e53b2cSYishai Hadas /* Underlay port should be used - index 0 function per port */ 3594c2e53b2cSYishai Hadas if (qp->flags & MLX5_IB_QP_UNDERLAY) 3595c2e53b2cSYishai Hadas port_num = 0; 3596c2e53b2cSYishai Hadas 3597eb49ab0cSAlex Vesker mibport = &dev->port[port_num]; 35980837e86aSMark Bloch context->qp_counter_set_usr_page |= 3599e1f24a79SParav Pandit cpu_to_be32((u32)(mibport->cnts.set_id) << 24); 36000837e86aSMark Bloch } 36010837e86aSMark Bloch 3602e126ba97SEli Cohen if (!ibqp->uobject && cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) 3603e126ba97SEli Cohen context->sq_crq_size |= cpu_to_be16(1 << 4); 3604e126ba97SEli Cohen 3605b11a4f9cSHaggai Eran if (qp->flags & MLX5_IB_QP_SQPN_QP1) 3606b11a4f9cSHaggai Eran context->deth_sqpn = cpu_to_be32(1); 3607e126ba97SEli Cohen 3608e126ba97SEli Cohen mlx5_cur = to_mlx5_state(cur_state); 3609e126ba97SEli Cohen mlx5_new = to_mlx5_state(new_state); 3610e126ba97SEli Cohen 3611427c1e7bSmajd@mellanox.com if (mlx5_cur >= MLX5_QP_NUM_STATE || mlx5_new >= MLX5_QP_NUM_STATE || 36125d414b17SDan Carpenter !optab[mlx5_cur][mlx5_new]) { 36135d414b17SDan Carpenter err = -EINVAL; 3614427c1e7bSmajd@mellanox.com goto out; 36155d414b17SDan Carpenter } 3616427c1e7bSmajd@mellanox.com 3617427c1e7bSmajd@mellanox.com op = optab[mlx5_cur][mlx5_new]; 3618e126ba97SEli Cohen optpar = ib_mask_to_mlx5_opt(attr_mask); 3619e126ba97SEli Cohen optpar &= opt_mask[mlx5_cur][mlx5_new][mlx5_st]; 3620ad5f8e96Smajd@mellanox.com 3621c2e53b2cSYishai Hadas if (qp->ibqp.qp_type == IB_QPT_RAW_PACKET || 3622c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 36230680efa2SAlex Vesker struct mlx5_modify_raw_qp_param raw_qp_param = {}; 36240680efa2SAlex Vesker 36250680efa2SAlex Vesker raw_qp_param.operation = op; 3626eb49ab0cSAlex Vesker if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { 3627e1f24a79SParav Pandit raw_qp_param.rq_q_ctr_id = mibport->cnts.set_id; 3628eb49ab0cSAlex Vesker raw_qp_param.set_mask |= MLX5_RAW_QP_MOD_SET_RQ_Q_CTR_ID; 3629eb49ab0cSAlex Vesker } 36307d29f349SBodong Wang 3631d5ed8ac3SMark Bloch if (attr_mask & IB_QP_PORT) 3632d5ed8ac3SMark Bloch raw_qp_param.port = attr->port_num; 3633d5ed8ac3SMark Bloch 36347d29f349SBodong Wang if (attr_mask & IB_QP_RATE_LIMIT) { 363561147f39SBodong Wang raw_qp_param.rl.rate = attr->rate_limit; 363661147f39SBodong Wang 363761147f39SBodong Wang if (ucmd->burst_info.max_burst_sz) { 363861147f39SBodong Wang if (attr->rate_limit && 363961147f39SBodong Wang MLX5_CAP_QOS(dev->mdev, packet_pacing_burst_bound)) { 364061147f39SBodong Wang raw_qp_param.rl.max_burst_sz = 364161147f39SBodong Wang ucmd->burst_info.max_burst_sz; 364261147f39SBodong Wang } else { 364361147f39SBodong Wang err = -EINVAL; 364461147f39SBodong Wang goto out; 364561147f39SBodong Wang } 364661147f39SBodong Wang } 364761147f39SBodong Wang 364861147f39SBodong Wang if (ucmd->burst_info.typical_pkt_sz) { 364961147f39SBodong Wang if (attr->rate_limit && 365061147f39SBodong Wang MLX5_CAP_QOS(dev->mdev, packet_pacing_typical_size)) { 365161147f39SBodong Wang raw_qp_param.rl.typical_pkt_sz = 365261147f39SBodong Wang ucmd->burst_info.typical_pkt_sz; 365361147f39SBodong Wang } else { 365461147f39SBodong Wang err = -EINVAL; 365561147f39SBodong Wang goto out; 365661147f39SBodong Wang } 365761147f39SBodong Wang } 365861147f39SBodong Wang 36597d29f349SBodong Wang raw_qp_param.set_mask |= MLX5_RAW_QP_RATE_LIMIT; 36607d29f349SBodong Wang } 36617d29f349SBodong Wang 366213eab21fSAviv Heller err = modify_raw_packet_qp(dev, qp, &raw_qp_param, tx_affinity); 36630680efa2SAlex Vesker } else { 36641a412fb1SSaeed Mahameed err = mlx5_core_qp_modify(dev->mdev, op, optpar, context, 366519098df2Smajd@mellanox.com &base->mqp); 36660680efa2SAlex Vesker } 36670680efa2SAlex Vesker 3668e126ba97SEli Cohen if (err) 3669e126ba97SEli Cohen goto out; 3670e126ba97SEli Cohen 3671e126ba97SEli Cohen qp->state = new_state; 3672e126ba97SEli Cohen 3673e126ba97SEli Cohen if (attr_mask & IB_QP_ACCESS_FLAGS) 367419098df2Smajd@mellanox.com qp->trans_qp.atomic_rd_en = attr->qp_access_flags; 3675e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) 367619098df2Smajd@mellanox.com qp->trans_qp.resp_depth = attr->max_dest_rd_atomic; 3677e126ba97SEli Cohen if (attr_mask & IB_QP_PORT) 3678e126ba97SEli Cohen qp->port = attr->port_num; 3679e126ba97SEli Cohen if (attr_mask & IB_QP_ALT_PATH) 368019098df2Smajd@mellanox.com qp->trans_qp.alt_port = attr->alt_port_num; 3681e126ba97SEli Cohen 3682e126ba97SEli Cohen /* 3683e126ba97SEli Cohen * If we moved a kernel QP to RESET, clean up all old CQ 3684e126ba97SEli Cohen * entries and reinitialize the QP. 3685e126ba97SEli Cohen */ 368675a45982SLeon Romanovsky if (new_state == IB_QPS_RESET && 368775a45982SLeon Romanovsky !ibqp->uobject && ibqp->qp_type != IB_QPT_XRC_TGT) { 368819098df2Smajd@mellanox.com mlx5_ib_cq_clean(recv_cq, base->mqp.qpn, 3689e126ba97SEli Cohen ibqp->srq ? to_msrq(ibqp->srq) : NULL); 3690e126ba97SEli Cohen if (send_cq != recv_cq) 369119098df2Smajd@mellanox.com mlx5_ib_cq_clean(send_cq, base->mqp.qpn, NULL); 3692e126ba97SEli Cohen 3693e126ba97SEli Cohen qp->rq.head = 0; 3694e126ba97SEli Cohen qp->rq.tail = 0; 3695e126ba97SEli Cohen qp->sq.head = 0; 3696e126ba97SEli Cohen qp->sq.tail = 0; 3697e126ba97SEli Cohen qp->sq.cur_post = 0; 369834f4c955SGuy Levi if (qp->sq.wqe_cnt) 369934f4c955SGuy Levi qp->sq.cur_edge = get_sq_edge(&qp->sq, 0); 3700e126ba97SEli Cohen qp->db.db[MLX5_RCV_DBR] = 0; 3701e126ba97SEli Cohen qp->db.db[MLX5_SND_DBR] = 0; 3702e126ba97SEli Cohen } 3703e126ba97SEli Cohen 3704e126ba97SEli Cohen out: 37051a412fb1SSaeed Mahameed kfree(context); 3706e126ba97SEli Cohen return err; 3707e126ba97SEli Cohen } 3708e126ba97SEli Cohen 3709c32a4f29SMoni Shoua static inline bool is_valid_mask(int mask, int req, int opt) 3710c32a4f29SMoni Shoua { 3711c32a4f29SMoni Shoua if ((mask & req) != req) 3712c32a4f29SMoni Shoua return false; 3713c32a4f29SMoni Shoua 3714c32a4f29SMoni Shoua if (mask & ~(req | opt)) 3715c32a4f29SMoni Shoua return false; 3716c32a4f29SMoni Shoua 3717c32a4f29SMoni Shoua return true; 3718c32a4f29SMoni Shoua } 3719c32a4f29SMoni Shoua 3720c32a4f29SMoni Shoua /* check valid transition for driver QP types 3721c32a4f29SMoni Shoua * for now the only QP type that this function supports is DCI 3722c32a4f29SMoni Shoua */ 3723c32a4f29SMoni Shoua static bool modify_dci_qp_is_ok(enum ib_qp_state cur_state, enum ib_qp_state new_state, 3724c32a4f29SMoni Shoua enum ib_qp_attr_mask attr_mask) 3725c32a4f29SMoni Shoua { 3726c32a4f29SMoni Shoua int req = IB_QP_STATE; 3727c32a4f29SMoni Shoua int opt = 0; 3728c32a4f29SMoni Shoua 372999ed748eSMoni Shoua if (new_state == IB_QPS_RESET) { 373099ed748eSMoni Shoua return is_valid_mask(attr_mask, req, opt); 373199ed748eSMoni Shoua } else if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { 3732c32a4f29SMoni Shoua req |= IB_QP_PKEY_INDEX | IB_QP_PORT; 3733c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3734c32a4f29SMoni Shoua } else if (cur_state == IB_QPS_INIT && new_state == IB_QPS_INIT) { 3735c32a4f29SMoni Shoua opt = IB_QP_PKEY_INDEX | IB_QP_PORT; 3736c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3737c32a4f29SMoni Shoua } else if (cur_state == IB_QPS_INIT && new_state == IB_QPS_RTR) { 3738c32a4f29SMoni Shoua req |= IB_QP_PATH_MTU; 37395ec0304cSArtemy Kovalyov opt = IB_QP_PKEY_INDEX | IB_QP_AV; 3740c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3741c32a4f29SMoni Shoua } else if (cur_state == IB_QPS_RTR && new_state == IB_QPS_RTS) { 3742c32a4f29SMoni Shoua req |= IB_QP_TIMEOUT | IB_QP_RETRY_CNT | IB_QP_RNR_RETRY | 3743c32a4f29SMoni Shoua IB_QP_MAX_QP_RD_ATOMIC | IB_QP_SQ_PSN; 3744c32a4f29SMoni Shoua opt = IB_QP_MIN_RNR_TIMER; 3745c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3746c32a4f29SMoni Shoua } else if (cur_state == IB_QPS_RTS && new_state == IB_QPS_RTS) { 3747c32a4f29SMoni Shoua opt = IB_QP_MIN_RNR_TIMER; 3748c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3749c32a4f29SMoni Shoua } else if (cur_state != IB_QPS_RESET && new_state == IB_QPS_ERR) { 3750c32a4f29SMoni Shoua return is_valid_mask(attr_mask, req, opt); 3751c32a4f29SMoni Shoua } 3752c32a4f29SMoni Shoua return false; 3753c32a4f29SMoni Shoua } 3754c32a4f29SMoni Shoua 3755776a3906SMoni Shoua /* mlx5_ib_modify_dct: modify a DCT QP 3756776a3906SMoni Shoua * valid transitions are: 3757776a3906SMoni Shoua * RESET to INIT: must set access_flags, pkey_index and port 3758776a3906SMoni Shoua * INIT to RTR : must set min_rnr_timer, tclass, flow_label, 3759776a3906SMoni Shoua * mtu, gid_index and hop_limit 3760776a3906SMoni Shoua * Other transitions and attributes are illegal 3761776a3906SMoni Shoua */ 3762776a3906SMoni Shoua static int mlx5_ib_modify_dct(struct ib_qp *ibqp, struct ib_qp_attr *attr, 3763776a3906SMoni Shoua int attr_mask, struct ib_udata *udata) 3764776a3906SMoni Shoua { 3765776a3906SMoni Shoua struct mlx5_ib_qp *qp = to_mqp(ibqp); 3766776a3906SMoni Shoua struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 3767776a3906SMoni Shoua enum ib_qp_state cur_state, new_state; 3768776a3906SMoni Shoua int err = 0; 3769776a3906SMoni Shoua int required = IB_QP_STATE; 3770776a3906SMoni Shoua void *dctc; 3771776a3906SMoni Shoua 3772776a3906SMoni Shoua if (!(attr_mask & IB_QP_STATE)) 3773776a3906SMoni Shoua return -EINVAL; 3774776a3906SMoni Shoua 3775776a3906SMoni Shoua cur_state = qp->state; 3776776a3906SMoni Shoua new_state = attr->qp_state; 3777776a3906SMoni Shoua 3778776a3906SMoni Shoua dctc = MLX5_ADDR_OF(create_dct_in, qp->dct.in, dct_context_entry); 3779776a3906SMoni Shoua if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { 3780776a3906SMoni Shoua required |= IB_QP_ACCESS_FLAGS | IB_QP_PKEY_INDEX | IB_QP_PORT; 3781776a3906SMoni Shoua if (!is_valid_mask(attr_mask, required, 0)) 3782776a3906SMoni Shoua return -EINVAL; 3783776a3906SMoni Shoua 3784776a3906SMoni Shoua if (attr->port_num == 0 || 3785776a3906SMoni Shoua attr->port_num > MLX5_CAP_GEN(dev->mdev, num_ports)) { 3786776a3906SMoni Shoua mlx5_ib_dbg(dev, "invalid port number %d. number of ports is %d\n", 3787776a3906SMoni Shoua attr->port_num, dev->num_ports); 3788776a3906SMoni Shoua return -EINVAL; 3789776a3906SMoni Shoua } 3790776a3906SMoni Shoua if (attr->qp_access_flags & IB_ACCESS_REMOTE_READ) 3791776a3906SMoni Shoua MLX5_SET(dctc, dctc, rre, 1); 3792776a3906SMoni Shoua if (attr->qp_access_flags & IB_ACCESS_REMOTE_WRITE) 3793776a3906SMoni Shoua MLX5_SET(dctc, dctc, rwe, 1); 3794776a3906SMoni Shoua if (attr->qp_access_flags & IB_ACCESS_REMOTE_ATOMIC) { 3795a60109dcSYonatan Cohen int atomic_mode; 3796a60109dcSYonatan Cohen 3797a60109dcSYonatan Cohen atomic_mode = get_atomic_mode(dev, MLX5_IB_QPT_DCT); 3798a60109dcSYonatan Cohen if (atomic_mode < 0) 3799776a3906SMoni Shoua return -EOPNOTSUPP; 3800a60109dcSYonatan Cohen 3801a60109dcSYonatan Cohen MLX5_SET(dctc, dctc, atomic_mode, atomic_mode); 3802776a3906SMoni Shoua MLX5_SET(dctc, dctc, rae, 1); 3803776a3906SMoni Shoua } 3804776a3906SMoni Shoua MLX5_SET(dctc, dctc, pkey_index, attr->pkey_index); 3805776a3906SMoni Shoua MLX5_SET(dctc, dctc, port, attr->port_num); 3806776a3906SMoni Shoua MLX5_SET(dctc, dctc, counter_set_id, dev->port[attr->port_num - 1].cnts.set_id); 3807776a3906SMoni Shoua 3808776a3906SMoni Shoua } else if (cur_state == IB_QPS_INIT && new_state == IB_QPS_RTR) { 3809776a3906SMoni Shoua struct mlx5_ib_modify_qp_resp resp = {}; 3810c5ae1954SYishai Hadas u32 out[MLX5_ST_SZ_DW(create_dct_out)] = {0}; 3811776a3906SMoni Shoua u32 min_resp_len = offsetof(typeof(resp), dctn) + 3812776a3906SMoni Shoua sizeof(resp.dctn); 3813776a3906SMoni Shoua 3814776a3906SMoni Shoua if (udata->outlen < min_resp_len) 3815776a3906SMoni Shoua return -EINVAL; 3816776a3906SMoni Shoua resp.response_length = min_resp_len; 3817776a3906SMoni Shoua 3818776a3906SMoni Shoua required |= IB_QP_MIN_RNR_TIMER | IB_QP_AV | IB_QP_PATH_MTU; 3819776a3906SMoni Shoua if (!is_valid_mask(attr_mask, required, 0)) 3820776a3906SMoni Shoua return -EINVAL; 3821776a3906SMoni Shoua MLX5_SET(dctc, dctc, min_rnr_nak, attr->min_rnr_timer); 3822776a3906SMoni Shoua MLX5_SET(dctc, dctc, tclass, attr->ah_attr.grh.traffic_class); 3823776a3906SMoni Shoua MLX5_SET(dctc, dctc, flow_label, attr->ah_attr.grh.flow_label); 3824776a3906SMoni Shoua MLX5_SET(dctc, dctc, mtu, attr->path_mtu); 3825776a3906SMoni Shoua MLX5_SET(dctc, dctc, my_addr_index, attr->ah_attr.grh.sgid_index); 3826776a3906SMoni Shoua MLX5_SET(dctc, dctc, hop_limit, attr->ah_attr.grh.hop_limit); 3827776a3906SMoni Shoua 3828776a3906SMoni Shoua err = mlx5_core_create_dct(dev->mdev, &qp->dct.mdct, qp->dct.in, 3829c5ae1954SYishai Hadas MLX5_ST_SZ_BYTES(create_dct_in), out, 3830c5ae1954SYishai Hadas sizeof(out)); 3831776a3906SMoni Shoua if (err) 3832776a3906SMoni Shoua return err; 3833776a3906SMoni Shoua resp.dctn = qp->dct.mdct.mqp.qpn; 3834776a3906SMoni Shoua err = ib_copy_to_udata(udata, &resp, resp.response_length); 3835776a3906SMoni Shoua if (err) { 3836776a3906SMoni Shoua mlx5_core_destroy_dct(dev->mdev, &qp->dct.mdct); 3837776a3906SMoni Shoua return err; 3838776a3906SMoni Shoua } 3839776a3906SMoni Shoua } else { 3840776a3906SMoni Shoua mlx5_ib_warn(dev, "Modify DCT: Invalid transition from %d to %d\n", cur_state, new_state); 3841776a3906SMoni Shoua return -EINVAL; 3842776a3906SMoni Shoua } 3843776a3906SMoni Shoua if (err) 3844776a3906SMoni Shoua qp->state = IB_QPS_ERR; 3845776a3906SMoni Shoua else 3846776a3906SMoni Shoua qp->state = new_state; 3847776a3906SMoni Shoua return err; 3848776a3906SMoni Shoua } 3849776a3906SMoni Shoua 3850e126ba97SEli Cohen int mlx5_ib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, 3851e126ba97SEli Cohen int attr_mask, struct ib_udata *udata) 3852e126ba97SEli Cohen { 3853e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 3854e126ba97SEli Cohen struct mlx5_ib_qp *qp = to_mqp(ibqp); 385561147f39SBodong Wang struct mlx5_ib_modify_qp ucmd = {}; 3856d16e91daSHaggai Eran enum ib_qp_type qp_type; 3857e126ba97SEli Cohen enum ib_qp_state cur_state, new_state; 385861147f39SBodong Wang size_t required_cmd_sz; 3859e126ba97SEli Cohen int err = -EINVAL; 3860e126ba97SEli Cohen int port; 3861e126ba97SEli Cohen 386228d61370SYishai Hadas if (ibqp->rwq_ind_tbl) 386328d61370SYishai Hadas return -ENOSYS; 386428d61370SYishai Hadas 386561147f39SBodong Wang if (udata && udata->inlen) { 386661147f39SBodong Wang required_cmd_sz = offsetof(typeof(ucmd), reserved) + 386761147f39SBodong Wang sizeof(ucmd.reserved); 386861147f39SBodong Wang if (udata->inlen < required_cmd_sz) 386961147f39SBodong Wang return -EINVAL; 387061147f39SBodong Wang 387161147f39SBodong Wang if (udata->inlen > sizeof(ucmd) && 387261147f39SBodong Wang !ib_is_udata_cleared(udata, sizeof(ucmd), 387361147f39SBodong Wang udata->inlen - sizeof(ucmd))) 387461147f39SBodong Wang return -EOPNOTSUPP; 387561147f39SBodong Wang 387661147f39SBodong Wang if (ib_copy_from_udata(&ucmd, udata, 387761147f39SBodong Wang min(udata->inlen, sizeof(ucmd)))) 387861147f39SBodong Wang return -EFAULT; 387961147f39SBodong Wang 388061147f39SBodong Wang if (ucmd.comp_mask || 388161147f39SBodong Wang memchr_inv(&ucmd.reserved, 0, sizeof(ucmd.reserved)) || 388261147f39SBodong Wang memchr_inv(&ucmd.burst_info.reserved, 0, 388361147f39SBodong Wang sizeof(ucmd.burst_info.reserved))) 388461147f39SBodong Wang return -EOPNOTSUPP; 388561147f39SBodong Wang } 388661147f39SBodong Wang 3887d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 3888d16e91daSHaggai Eran return mlx5_ib_gsi_modify_qp(ibqp, attr, attr_mask); 3889d16e91daSHaggai Eran 3890c32a4f29SMoni Shoua if (ibqp->qp_type == IB_QPT_DRIVER) 3891c32a4f29SMoni Shoua qp_type = qp->qp_sub_type; 3892c32a4f29SMoni Shoua else 3893d16e91daSHaggai Eran qp_type = (unlikely(ibqp->qp_type == MLX5_IB_QPT_HW_GSI)) ? 3894d16e91daSHaggai Eran IB_QPT_GSI : ibqp->qp_type; 3895d16e91daSHaggai Eran 3896776a3906SMoni Shoua if (qp_type == MLX5_IB_QPT_DCT) 3897776a3906SMoni Shoua return mlx5_ib_modify_dct(ibqp, attr, attr_mask, udata); 3898c32a4f29SMoni Shoua 3899e126ba97SEli Cohen mutex_lock(&qp->mutex); 3900e126ba97SEli Cohen 3901e126ba97SEli Cohen cur_state = attr_mask & IB_QP_CUR_STATE ? attr->cur_qp_state : qp->state; 3902e126ba97SEli Cohen new_state = attr_mask & IB_QP_STATE ? attr->qp_state : cur_state; 3903e126ba97SEli Cohen 39042811ba51SAchiad Shochat if (!(cur_state == new_state && cur_state == IB_QPS_RESET)) { 39052811ba51SAchiad Shochat port = attr_mask & IB_QP_PORT ? attr->port_num : qp->port; 39062811ba51SAchiad Shochat } 39072811ba51SAchiad Shochat 3908c2e53b2cSYishai Hadas if (qp->flags & MLX5_IB_QP_UNDERLAY) { 3909c2e53b2cSYishai Hadas if (attr_mask & ~(IB_QP_STATE | IB_QP_CUR_STATE)) { 3910c2e53b2cSYishai Hadas mlx5_ib_dbg(dev, "invalid attr_mask 0x%x when underlay QP is used\n", 3911c2e53b2cSYishai Hadas attr_mask); 3912c2e53b2cSYishai Hadas goto out; 3913c2e53b2cSYishai Hadas } 3914c2e53b2cSYishai Hadas } else if (qp_type != MLX5_IB_QPT_REG_UMR && 3915c32a4f29SMoni Shoua qp_type != MLX5_IB_QPT_DCI && 3916d31131bbSKamal Heib !ib_modify_qp_is_ok(cur_state, new_state, qp_type, 3917d31131bbSKamal Heib attr_mask)) { 3918158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid QP state transition from %d to %d, qp_type %d, attr_mask 0x%x\n", 3919158abf86SHaggai Eran cur_state, new_state, ibqp->qp_type, attr_mask); 3920e126ba97SEli Cohen goto out; 3921c32a4f29SMoni Shoua } else if (qp_type == MLX5_IB_QPT_DCI && 3922c32a4f29SMoni Shoua !modify_dci_qp_is_ok(cur_state, new_state, attr_mask)) { 3923c32a4f29SMoni Shoua mlx5_ib_dbg(dev, "invalid QP state transition from %d to %d, qp_type %d, attr_mask 0x%x\n", 3924c32a4f29SMoni Shoua cur_state, new_state, qp_type, attr_mask); 3925c32a4f29SMoni Shoua goto out; 3926158abf86SHaggai Eran } 3927e126ba97SEli Cohen 3928e126ba97SEli Cohen if ((attr_mask & IB_QP_PORT) && 3929938fe83cSSaeed Mahameed (attr->port_num == 0 || 3930508562d6SDaniel Jurgens attr->port_num > dev->num_ports)) { 3931158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid port number %d. number of ports is %d\n", 3932158abf86SHaggai Eran attr->port_num, dev->num_ports); 3933e126ba97SEli Cohen goto out; 3934158abf86SHaggai Eran } 3935e126ba97SEli Cohen 3936e126ba97SEli Cohen if (attr_mask & IB_QP_PKEY_INDEX) { 3937e126ba97SEli Cohen port = attr_mask & IB_QP_PORT ? attr->port_num : qp->port; 3938938fe83cSSaeed Mahameed if (attr->pkey_index >= 3939158abf86SHaggai Eran dev->mdev->port_caps[port - 1].pkey_table_len) { 3940158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid pkey index %d\n", 3941158abf86SHaggai Eran attr->pkey_index); 3942e126ba97SEli Cohen goto out; 3943e126ba97SEli Cohen } 3944158abf86SHaggai Eran } 3945e126ba97SEli Cohen 3946e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC && 3947938fe83cSSaeed Mahameed attr->max_rd_atomic > 3948158abf86SHaggai Eran (1 << MLX5_CAP_GEN(dev->mdev, log_max_ra_res_qp))) { 3949158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid max_rd_atomic value %d\n", 3950158abf86SHaggai Eran attr->max_rd_atomic); 3951e126ba97SEli Cohen goto out; 3952158abf86SHaggai Eran } 3953e126ba97SEli Cohen 3954e126ba97SEli Cohen if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC && 3955938fe83cSSaeed Mahameed attr->max_dest_rd_atomic > 3956158abf86SHaggai Eran (1 << MLX5_CAP_GEN(dev->mdev, log_max_ra_req_qp))) { 3957158abf86SHaggai Eran mlx5_ib_dbg(dev, "invalid max_dest_rd_atomic value %d\n", 3958158abf86SHaggai Eran attr->max_dest_rd_atomic); 3959e126ba97SEli Cohen goto out; 3960158abf86SHaggai Eran } 3961e126ba97SEli Cohen 3962e126ba97SEli Cohen if (cur_state == new_state && cur_state == IB_QPS_RESET) { 3963e126ba97SEli Cohen err = 0; 3964e126ba97SEli Cohen goto out; 3965e126ba97SEli Cohen } 3966e126ba97SEli Cohen 396761147f39SBodong Wang err = __mlx5_ib_modify_qp(ibqp, attr, attr_mask, cur_state, 396889944450SShamir Rabinovitch new_state, &ucmd, udata); 3969e126ba97SEli Cohen 3970e126ba97SEli Cohen out: 3971e126ba97SEli Cohen mutex_unlock(&qp->mutex); 3972e126ba97SEli Cohen return err; 3973e126ba97SEli Cohen } 3974e126ba97SEli Cohen 397534f4c955SGuy Levi static void _handle_post_send_edge(struct mlx5_ib_wq *sq, void **seg, 397634f4c955SGuy Levi u32 wqe_sz, void **cur_edge) 397734f4c955SGuy Levi { 397834f4c955SGuy Levi u32 idx; 397934f4c955SGuy Levi 398034f4c955SGuy Levi idx = (sq->cur_post + (wqe_sz >> 2)) & (sq->wqe_cnt - 1); 398134f4c955SGuy Levi *cur_edge = get_sq_edge(sq, idx); 398234f4c955SGuy Levi 398334f4c955SGuy Levi *seg = mlx5_frag_buf_get_wqe(&sq->fbc, idx); 398434f4c955SGuy Levi } 398534f4c955SGuy Levi 398634f4c955SGuy Levi /* handle_post_send_edge - Check if we get to SQ edge. If yes, update to the 398734f4c955SGuy Levi * next nearby edge and get new address translation for current WQE position. 398834f4c955SGuy Levi * @sq - SQ buffer. 398934f4c955SGuy Levi * @seg: Current WQE position (16B aligned). 399034f4c955SGuy Levi * @wqe_sz: Total current WQE size [16B]. 399134f4c955SGuy Levi * @cur_edge: Updated current edge. 399234f4c955SGuy Levi */ 399334f4c955SGuy Levi static inline void handle_post_send_edge(struct mlx5_ib_wq *sq, void **seg, 399434f4c955SGuy Levi u32 wqe_sz, void **cur_edge) 399534f4c955SGuy Levi { 399634f4c955SGuy Levi if (likely(*seg != *cur_edge)) 399734f4c955SGuy Levi return; 399834f4c955SGuy Levi 399934f4c955SGuy Levi _handle_post_send_edge(sq, seg, wqe_sz, cur_edge); 400034f4c955SGuy Levi } 400134f4c955SGuy Levi 400234f4c955SGuy Levi /* memcpy_send_wqe - copy data from src to WQE and update the relevant WQ's 400334f4c955SGuy Levi * pointers. At the end @seg is aligned to 16B regardless the copied size. 400434f4c955SGuy Levi * @sq - SQ buffer. 400534f4c955SGuy Levi * @cur_edge: Updated current edge. 400634f4c955SGuy Levi * @seg: Current WQE position (16B aligned). 400734f4c955SGuy Levi * @wqe_sz: Total current WQE size [16B]. 400834f4c955SGuy Levi * @src: Pointer to copy from. 400934f4c955SGuy Levi * @n: Number of bytes to copy. 401034f4c955SGuy Levi */ 401134f4c955SGuy Levi static inline void memcpy_send_wqe(struct mlx5_ib_wq *sq, void **cur_edge, 401234f4c955SGuy Levi void **seg, u32 *wqe_sz, const void *src, 401334f4c955SGuy Levi size_t n) 401434f4c955SGuy Levi { 401534f4c955SGuy Levi while (likely(n)) { 401634f4c955SGuy Levi size_t leftlen = *cur_edge - *seg; 401734f4c955SGuy Levi size_t copysz = min_t(size_t, leftlen, n); 401834f4c955SGuy Levi size_t stride; 401934f4c955SGuy Levi 402034f4c955SGuy Levi memcpy(*seg, src, copysz); 402134f4c955SGuy Levi 402234f4c955SGuy Levi n -= copysz; 402334f4c955SGuy Levi src += copysz; 402434f4c955SGuy Levi stride = !n ? ALIGN(copysz, 16) : copysz; 402534f4c955SGuy Levi *seg += stride; 402634f4c955SGuy Levi *wqe_sz += stride >> 4; 402734f4c955SGuy Levi handle_post_send_edge(sq, seg, *wqe_sz, cur_edge); 402834f4c955SGuy Levi } 402934f4c955SGuy Levi } 403034f4c955SGuy Levi 4031e126ba97SEli Cohen static int mlx5_wq_overflow(struct mlx5_ib_wq *wq, int nreq, struct ib_cq *ib_cq) 4032e126ba97SEli Cohen { 4033e126ba97SEli Cohen struct mlx5_ib_cq *cq; 4034e126ba97SEli Cohen unsigned cur; 4035e126ba97SEli Cohen 4036e126ba97SEli Cohen cur = wq->head - wq->tail; 4037e126ba97SEli Cohen if (likely(cur + nreq < wq->max_post)) 4038e126ba97SEli Cohen return 0; 4039e126ba97SEli Cohen 4040e126ba97SEli Cohen cq = to_mcq(ib_cq); 4041e126ba97SEli Cohen spin_lock(&cq->lock); 4042e126ba97SEli Cohen cur = wq->head - wq->tail; 4043e126ba97SEli Cohen spin_unlock(&cq->lock); 4044e126ba97SEli Cohen 4045e126ba97SEli Cohen return cur + nreq >= wq->max_post; 4046e126ba97SEli Cohen } 4047e126ba97SEli Cohen 4048e126ba97SEli Cohen static __always_inline void set_raddr_seg(struct mlx5_wqe_raddr_seg *rseg, 4049e126ba97SEli Cohen u64 remote_addr, u32 rkey) 4050e126ba97SEli Cohen { 4051e126ba97SEli Cohen rseg->raddr = cpu_to_be64(remote_addr); 4052e126ba97SEli Cohen rseg->rkey = cpu_to_be32(rkey); 4053e126ba97SEli Cohen rseg->reserved = 0; 4054e126ba97SEli Cohen } 4055e126ba97SEli Cohen 405634f4c955SGuy Levi static void set_eth_seg(const struct ib_send_wr *wr, struct mlx5_ib_qp *qp, 405734f4c955SGuy Levi void **seg, int *size, void **cur_edge) 4058f0313965SErez Shitrit { 405934f4c955SGuy Levi struct mlx5_wqe_eth_seg *eseg = *seg; 4060f0313965SErez Shitrit 4061f0313965SErez Shitrit memset(eseg, 0, sizeof(struct mlx5_wqe_eth_seg)); 4062f0313965SErez Shitrit 4063f0313965SErez Shitrit if (wr->send_flags & IB_SEND_IP_CSUM) 4064f0313965SErez Shitrit eseg->cs_flags = MLX5_ETH_WQE_L3_CSUM | 4065f0313965SErez Shitrit MLX5_ETH_WQE_L4_CSUM; 4066f0313965SErez Shitrit 4067f0313965SErez Shitrit if (wr->opcode == IB_WR_LSO) { 4068f0313965SErez Shitrit struct ib_ud_wr *ud_wr = container_of(wr, struct ib_ud_wr, wr); 406934f4c955SGuy Levi size_t left, copysz; 4070f0313965SErez Shitrit void *pdata = ud_wr->header; 407134f4c955SGuy Levi size_t stride; 4072f0313965SErez Shitrit 4073f0313965SErez Shitrit left = ud_wr->hlen; 4074f0313965SErez Shitrit eseg->mss = cpu_to_be16(ud_wr->mss); 40752b31f7aeSSaeed Mahameed eseg->inline_hdr.sz = cpu_to_be16(left); 4076f0313965SErez Shitrit 407734f4c955SGuy Levi /* memcpy_send_wqe should get a 16B align address. Hence, we 407834f4c955SGuy Levi * first copy up to the current edge and then, if needed, 407934f4c955SGuy Levi * fall-through to memcpy_send_wqe. 4080f0313965SErez Shitrit */ 408134f4c955SGuy Levi copysz = min_t(u64, *cur_edge - (void *)eseg->inline_hdr.start, 408234f4c955SGuy Levi left); 408334f4c955SGuy Levi memcpy(eseg->inline_hdr.start, pdata, copysz); 408434f4c955SGuy Levi stride = ALIGN(sizeof(struct mlx5_wqe_eth_seg) - 408534f4c955SGuy Levi sizeof(eseg->inline_hdr.start) + copysz, 16); 408634f4c955SGuy Levi *size += stride / 16; 408734f4c955SGuy Levi *seg += stride; 4088f0313965SErez Shitrit 408934f4c955SGuy Levi if (copysz < left) { 409034f4c955SGuy Levi handle_post_send_edge(&qp->sq, seg, *size, cur_edge); 4091f0313965SErez Shitrit left -= copysz; 4092f0313965SErez Shitrit pdata += copysz; 409334f4c955SGuy Levi memcpy_send_wqe(&qp->sq, cur_edge, seg, size, pdata, 409434f4c955SGuy Levi left); 4095f0313965SErez Shitrit } 4096f0313965SErez Shitrit 409734f4c955SGuy Levi return; 409834f4c955SGuy Levi } 409934f4c955SGuy Levi 410034f4c955SGuy Levi *seg += sizeof(struct mlx5_wqe_eth_seg); 410134f4c955SGuy Levi *size += sizeof(struct mlx5_wqe_eth_seg) / 16; 4102f0313965SErez Shitrit } 4103f0313965SErez Shitrit 4104e126ba97SEli Cohen static void set_datagram_seg(struct mlx5_wqe_datagram_seg *dseg, 4105f696bf6dSBart Van Assche const struct ib_send_wr *wr) 4106e126ba97SEli Cohen { 4107e622f2f4SChristoph Hellwig memcpy(&dseg->av, &to_mah(ud_wr(wr)->ah)->av, sizeof(struct mlx5_av)); 4108e622f2f4SChristoph Hellwig dseg->av.dqp_dct = cpu_to_be32(ud_wr(wr)->remote_qpn | MLX5_EXTENDED_UD_AV); 4109e622f2f4SChristoph Hellwig dseg->av.key.qkey.qkey = cpu_to_be32(ud_wr(wr)->remote_qkey); 4110e126ba97SEli Cohen } 4111e126ba97SEli Cohen 4112e126ba97SEli Cohen static void set_data_ptr_seg(struct mlx5_wqe_data_seg *dseg, struct ib_sge *sg) 4113e126ba97SEli Cohen { 4114e126ba97SEli Cohen dseg->byte_count = cpu_to_be32(sg->length); 4115e126ba97SEli Cohen dseg->lkey = cpu_to_be32(sg->lkey); 4116e126ba97SEli Cohen dseg->addr = cpu_to_be64(sg->addr); 4117e126ba97SEli Cohen } 4118e126ba97SEli Cohen 411931616255SArtemy Kovalyov static u64 get_xlt_octo(u64 bytes) 4120e126ba97SEli Cohen { 412131616255SArtemy Kovalyov return ALIGN(bytes, MLX5_IB_UMR_XLT_ALIGNMENT) / 412231616255SArtemy Kovalyov MLX5_IB_UMR_OCTOWORD; 4123e126ba97SEli Cohen } 4124e126ba97SEli Cohen 4125e126ba97SEli Cohen static __be64 frwr_mkey_mask(void) 4126e126ba97SEli Cohen { 4127e126ba97SEli Cohen u64 result; 4128e126ba97SEli Cohen 4129e126ba97SEli Cohen result = MLX5_MKEY_MASK_LEN | 4130e126ba97SEli Cohen MLX5_MKEY_MASK_PAGE_SIZE | 4131e126ba97SEli Cohen MLX5_MKEY_MASK_START_ADDR | 4132e126ba97SEli Cohen MLX5_MKEY_MASK_EN_RINVAL | 4133e126ba97SEli Cohen MLX5_MKEY_MASK_KEY | 4134e126ba97SEli Cohen MLX5_MKEY_MASK_LR | 4135e126ba97SEli Cohen MLX5_MKEY_MASK_LW | 4136e126ba97SEli Cohen MLX5_MKEY_MASK_RR | 4137e126ba97SEli Cohen MLX5_MKEY_MASK_RW | 4138e126ba97SEli Cohen MLX5_MKEY_MASK_A | 4139e126ba97SEli Cohen MLX5_MKEY_MASK_SMALL_FENCE | 4140e126ba97SEli Cohen MLX5_MKEY_MASK_FREE; 4141e126ba97SEli Cohen 4142e126ba97SEli Cohen return cpu_to_be64(result); 4143e126ba97SEli Cohen } 4144e126ba97SEli Cohen 4145e6631814SSagi Grimberg static __be64 sig_mkey_mask(void) 4146e6631814SSagi Grimberg { 4147e6631814SSagi Grimberg u64 result; 4148e6631814SSagi Grimberg 4149e6631814SSagi Grimberg result = MLX5_MKEY_MASK_LEN | 4150e6631814SSagi Grimberg MLX5_MKEY_MASK_PAGE_SIZE | 4151e6631814SSagi Grimberg MLX5_MKEY_MASK_START_ADDR | 4152d5436ba0SSagi Grimberg MLX5_MKEY_MASK_EN_SIGERR | 4153e6631814SSagi Grimberg MLX5_MKEY_MASK_EN_RINVAL | 4154e6631814SSagi Grimberg MLX5_MKEY_MASK_KEY | 4155e6631814SSagi Grimberg MLX5_MKEY_MASK_LR | 4156e6631814SSagi Grimberg MLX5_MKEY_MASK_LW | 4157e6631814SSagi Grimberg MLX5_MKEY_MASK_RR | 4158e6631814SSagi Grimberg MLX5_MKEY_MASK_RW | 4159e6631814SSagi Grimberg MLX5_MKEY_MASK_SMALL_FENCE | 4160e6631814SSagi Grimberg MLX5_MKEY_MASK_FREE | 4161e6631814SSagi Grimberg MLX5_MKEY_MASK_BSF_EN; 4162e6631814SSagi Grimberg 4163e6631814SSagi Grimberg return cpu_to_be64(result); 4164e6631814SSagi Grimberg } 4165e6631814SSagi Grimberg 41668a187ee5SSagi Grimberg static void set_reg_umr_seg(struct mlx5_wqe_umr_ctrl_seg *umr, 41679ac7c4bcSMax Gurtovoy struct mlx5_ib_mr *mr, u8 flags) 41688a187ee5SSagi Grimberg { 416938ca87c6SMax Gurtovoy int size = (mr->ndescs + mr->meta_ndescs) * mr->desc_size; 41708a187ee5SSagi Grimberg 41718a187ee5SSagi Grimberg memset(umr, 0, sizeof(*umr)); 4172b005d316SSagi Grimberg 41739ac7c4bcSMax Gurtovoy umr->flags = flags; 417431616255SArtemy Kovalyov umr->xlt_octowords = cpu_to_be16(get_xlt_octo(size)); 41758a187ee5SSagi Grimberg umr->mkey_mask = frwr_mkey_mask(); 41768a187ee5SSagi Grimberg } 41778a187ee5SSagi Grimberg 4178dd01e66aSSagi Grimberg static void set_linv_umr_seg(struct mlx5_wqe_umr_ctrl_seg *umr) 4179e126ba97SEli Cohen { 4180e126ba97SEli Cohen memset(umr, 0, sizeof(*umr)); 4181e126ba97SEli Cohen umr->mkey_mask = cpu_to_be64(MLX5_MKEY_MASK_FREE); 41822d221588SMax Gurtovoy umr->flags = MLX5_UMR_INLINE; 4183e126ba97SEli Cohen } 4184e126ba97SEli Cohen 418531616255SArtemy Kovalyov static __be64 get_umr_enable_mr_mask(void) 4186e126ba97SEli Cohen { 4187968e78ddSHaggai Eran u64 result; 4188e126ba97SEli Cohen 418931616255SArtemy Kovalyov result = MLX5_MKEY_MASK_KEY | 4190e126ba97SEli Cohen MLX5_MKEY_MASK_FREE; 4191968e78ddSHaggai Eran 4192968e78ddSHaggai Eran return cpu_to_be64(result); 4193968e78ddSHaggai Eran } 4194968e78ddSHaggai Eran 419531616255SArtemy Kovalyov static __be64 get_umr_disable_mr_mask(void) 4196968e78ddSHaggai Eran { 4197968e78ddSHaggai Eran u64 result; 4198968e78ddSHaggai Eran 4199968e78ddSHaggai Eran result = MLX5_MKEY_MASK_FREE; 4200968e78ddSHaggai Eran 4201968e78ddSHaggai Eran return cpu_to_be64(result); 4202968e78ddSHaggai Eran } 4203968e78ddSHaggai Eran 420456e11d62SNoa Osherovich static __be64 get_umr_update_translation_mask(void) 420556e11d62SNoa Osherovich { 420656e11d62SNoa Osherovich u64 result; 420756e11d62SNoa Osherovich 420856e11d62SNoa Osherovich result = MLX5_MKEY_MASK_LEN | 420956e11d62SNoa Osherovich MLX5_MKEY_MASK_PAGE_SIZE | 421031616255SArtemy Kovalyov MLX5_MKEY_MASK_START_ADDR; 421156e11d62SNoa Osherovich 421256e11d62SNoa Osherovich return cpu_to_be64(result); 421356e11d62SNoa Osherovich } 421456e11d62SNoa Osherovich 421531616255SArtemy Kovalyov static __be64 get_umr_update_access_mask(int atomic) 421656e11d62SNoa Osherovich { 421756e11d62SNoa Osherovich u64 result; 421856e11d62SNoa Osherovich 421931616255SArtemy Kovalyov result = MLX5_MKEY_MASK_LR | 422031616255SArtemy Kovalyov MLX5_MKEY_MASK_LW | 422156e11d62SNoa Osherovich MLX5_MKEY_MASK_RR | 422231616255SArtemy Kovalyov MLX5_MKEY_MASK_RW; 422331616255SArtemy Kovalyov 422431616255SArtemy Kovalyov if (atomic) 422531616255SArtemy Kovalyov result |= MLX5_MKEY_MASK_A; 422656e11d62SNoa Osherovich 422756e11d62SNoa Osherovich return cpu_to_be64(result); 422856e11d62SNoa Osherovich } 422956e11d62SNoa Osherovich 423056e11d62SNoa Osherovich static __be64 get_umr_update_pd_mask(void) 423156e11d62SNoa Osherovich { 423256e11d62SNoa Osherovich u64 result; 423356e11d62SNoa Osherovich 423431616255SArtemy Kovalyov result = MLX5_MKEY_MASK_PD; 423556e11d62SNoa Osherovich 423656e11d62SNoa Osherovich return cpu_to_be64(result); 423756e11d62SNoa Osherovich } 423856e11d62SNoa Osherovich 4239c8d75a98SMajd Dibbiny static int umr_check_mkey_mask(struct mlx5_ib_dev *dev, u64 mask) 4240c8d75a98SMajd Dibbiny { 4241c8d75a98SMajd Dibbiny if ((mask & MLX5_MKEY_MASK_PAGE_SIZE && 4242c8d75a98SMajd Dibbiny MLX5_CAP_GEN(dev->mdev, umr_modify_entity_size_disabled)) || 4243c8d75a98SMajd Dibbiny (mask & MLX5_MKEY_MASK_A && 4244c8d75a98SMajd Dibbiny MLX5_CAP_GEN(dev->mdev, umr_modify_atomic_disabled))) 4245c8d75a98SMajd Dibbiny return -EPERM; 4246c8d75a98SMajd Dibbiny return 0; 4247c8d75a98SMajd Dibbiny } 4248c8d75a98SMajd Dibbiny 4249c8d75a98SMajd Dibbiny static int set_reg_umr_segment(struct mlx5_ib_dev *dev, 4250c8d75a98SMajd Dibbiny struct mlx5_wqe_umr_ctrl_seg *umr, 4251f696bf6dSBart Van Assche const struct ib_send_wr *wr, int atomic) 4252968e78ddSHaggai Eran { 4253f696bf6dSBart Van Assche const struct mlx5_umr_wr *umrwr = umr_wr(wr); 4254968e78ddSHaggai Eran 4255968e78ddSHaggai Eran memset(umr, 0, sizeof(*umr)); 4256968e78ddSHaggai Eran 4257968e78ddSHaggai Eran if (wr->send_flags & MLX5_IB_SEND_UMR_FAIL_IF_FREE) 4258968e78ddSHaggai Eran umr->flags = MLX5_UMR_CHECK_FREE; /* fail if free */ 4259968e78ddSHaggai Eran else 4260968e78ddSHaggai Eran umr->flags = MLX5_UMR_CHECK_NOT_FREE; /* fail if not free */ 4261968e78ddSHaggai Eran 426231616255SArtemy Kovalyov umr->xlt_octowords = cpu_to_be16(get_xlt_octo(umrwr->xlt_size)); 426331616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_XLT) { 426431616255SArtemy Kovalyov u64 offset = get_xlt_octo(umrwr->offset); 426531616255SArtemy Kovalyov 426631616255SArtemy Kovalyov umr->xlt_offset = cpu_to_be16(offset & 0xffff); 426731616255SArtemy Kovalyov umr->xlt_offset_47_16 = cpu_to_be32(offset >> 16); 4268968e78ddSHaggai Eran umr->flags |= MLX5_UMR_TRANSLATION_OFFSET_EN; 4269968e78ddSHaggai Eran } 427056e11d62SNoa Osherovich if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_TRANSLATION) 427156e11d62SNoa Osherovich umr->mkey_mask |= get_umr_update_translation_mask(); 427231616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_PD_ACCESS) { 427331616255SArtemy Kovalyov umr->mkey_mask |= get_umr_update_access_mask(atomic); 427456e11d62SNoa Osherovich umr->mkey_mask |= get_umr_update_pd_mask(); 4275e126ba97SEli Cohen } 427631616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_ENABLE_MR) 427731616255SArtemy Kovalyov umr->mkey_mask |= get_umr_enable_mr_mask(); 427831616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_DISABLE_MR) 427931616255SArtemy Kovalyov umr->mkey_mask |= get_umr_disable_mr_mask(); 4280e126ba97SEli Cohen 4281e126ba97SEli Cohen if (!wr->num_sge) 4282968e78ddSHaggai Eran umr->flags |= MLX5_UMR_INLINE; 4283c8d75a98SMajd Dibbiny 4284c8d75a98SMajd Dibbiny return umr_check_mkey_mask(dev, be64_to_cpu(umr->mkey_mask)); 4285e126ba97SEli Cohen } 4286e126ba97SEli Cohen 4287e126ba97SEli Cohen static u8 get_umr_flags(int acc) 4288e126ba97SEli Cohen { 4289e126ba97SEli Cohen return (acc & IB_ACCESS_REMOTE_ATOMIC ? MLX5_PERM_ATOMIC : 0) | 4290e126ba97SEli Cohen (acc & IB_ACCESS_REMOTE_WRITE ? MLX5_PERM_REMOTE_WRITE : 0) | 4291e126ba97SEli Cohen (acc & IB_ACCESS_REMOTE_READ ? MLX5_PERM_REMOTE_READ : 0) | 4292e126ba97SEli Cohen (acc & IB_ACCESS_LOCAL_WRITE ? MLX5_PERM_LOCAL_WRITE : 0) | 42932ac45934SSagi Grimberg MLX5_PERM_LOCAL_READ | MLX5_PERM_UMR_EN; 4294e126ba97SEli Cohen } 4295e126ba97SEli Cohen 42968a187ee5SSagi Grimberg static void set_reg_mkey_seg(struct mlx5_mkey_seg *seg, 42978a187ee5SSagi Grimberg struct mlx5_ib_mr *mr, 42988a187ee5SSagi Grimberg u32 key, int access) 42998a187ee5SSagi Grimberg { 430038ca87c6SMax Gurtovoy int ndescs = ALIGN(mr->ndescs + mr->meta_ndescs, 8) >> 1; 43018a187ee5SSagi Grimberg 43028a187ee5SSagi Grimberg memset(seg, 0, sizeof(*seg)); 4303b005d316SSagi Grimberg 4304ec22eb53SSaeed Mahameed if (mr->access_mode == MLX5_MKC_ACCESS_MODE_MTT) 4305b005d316SSagi Grimberg seg->log2_page_size = ilog2(mr->ibmr.page_size); 4306ec22eb53SSaeed Mahameed else if (mr->access_mode == MLX5_MKC_ACCESS_MODE_KLMS) 4307b005d316SSagi Grimberg /* KLMs take twice the size of MTTs */ 4308b005d316SSagi Grimberg ndescs *= 2; 4309b005d316SSagi Grimberg 4310b005d316SSagi Grimberg seg->flags = get_umr_flags(access) | mr->access_mode; 43118a187ee5SSagi Grimberg seg->qpn_mkey7_0 = cpu_to_be32((key & 0xff) | 0xffffff00); 43128a187ee5SSagi Grimberg seg->flags_pd = cpu_to_be32(MLX5_MKEY_REMOTE_INVAL); 43138a187ee5SSagi Grimberg seg->start_addr = cpu_to_be64(mr->ibmr.iova); 43148a187ee5SSagi Grimberg seg->len = cpu_to_be64(mr->ibmr.length); 43158a187ee5SSagi Grimberg seg->xlt_oct_size = cpu_to_be32(ndescs); 43168a187ee5SSagi Grimberg } 43178a187ee5SSagi Grimberg 4318dd01e66aSSagi Grimberg static void set_linv_mkey_seg(struct mlx5_mkey_seg *seg) 4319e126ba97SEli Cohen { 4320e126ba97SEli Cohen memset(seg, 0, sizeof(*seg)); 4321968e78ddSHaggai Eran seg->status = MLX5_MKEY_STATUS_FREE; 4322e126ba97SEli Cohen } 4323e126ba97SEli Cohen 4324f696bf6dSBart Van Assche static void set_reg_mkey_segment(struct mlx5_mkey_seg *seg, 4325f696bf6dSBart Van Assche const struct ib_send_wr *wr) 4326e126ba97SEli Cohen { 4327f696bf6dSBart Van Assche const struct mlx5_umr_wr *umrwr = umr_wr(wr); 4328968e78ddSHaggai Eran 4329e126ba97SEli Cohen memset(seg, 0, sizeof(*seg)); 433031616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_DISABLE_MR) 4331968e78ddSHaggai Eran seg->status = MLX5_MKEY_STATUS_FREE; 4332e126ba97SEli Cohen 4333968e78ddSHaggai Eran seg->flags = convert_access(umrwr->access_flags); 433456e11d62SNoa Osherovich if (umrwr->pd) 4335968e78ddSHaggai Eran seg->flags_pd = cpu_to_be32(to_mpd(umrwr->pd)->pdn); 433631616255SArtemy Kovalyov if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_TRANSLATION && 433731616255SArtemy Kovalyov !umrwr->length) 433831616255SArtemy Kovalyov seg->flags_pd |= cpu_to_be32(MLX5_MKEY_LEN64); 433931616255SArtemy Kovalyov 434031616255SArtemy Kovalyov seg->start_addr = cpu_to_be64(umrwr->virt_addr); 4341968e78ddSHaggai Eran seg->len = cpu_to_be64(umrwr->length); 4342968e78ddSHaggai Eran seg->log2_page_size = umrwr->page_shift; 4343746b5583SEli Cohen seg->qpn_mkey7_0 = cpu_to_be32(0xffffff00 | 4344968e78ddSHaggai Eran mlx5_mkey_variant(umrwr->mkey)); 4345e126ba97SEli Cohen } 4346e126ba97SEli Cohen 43478a187ee5SSagi Grimberg static void set_reg_data_seg(struct mlx5_wqe_data_seg *dseg, 43488a187ee5SSagi Grimberg struct mlx5_ib_mr *mr, 43498a187ee5SSagi Grimberg struct mlx5_ib_pd *pd) 43508a187ee5SSagi Grimberg { 435138ca87c6SMax Gurtovoy int bcount = mr->desc_size * (mr->ndescs + mr->meta_ndescs); 43528a187ee5SSagi Grimberg 43538a187ee5SSagi Grimberg dseg->addr = cpu_to_be64(mr->desc_map); 43548a187ee5SSagi Grimberg dseg->byte_count = cpu_to_be32(ALIGN(bcount, 64)); 43558a187ee5SSagi Grimberg dseg->lkey = cpu_to_be32(pd->ibpd.local_dma_lkey); 43568a187ee5SSagi Grimberg } 43578a187ee5SSagi Grimberg 4358f696bf6dSBart Van Assche static __be32 send_ieth(const struct ib_send_wr *wr) 4359e126ba97SEli Cohen { 4360e126ba97SEli Cohen switch (wr->opcode) { 4361e126ba97SEli Cohen case IB_WR_SEND_WITH_IMM: 4362e126ba97SEli Cohen case IB_WR_RDMA_WRITE_WITH_IMM: 4363e126ba97SEli Cohen return wr->ex.imm_data; 4364e126ba97SEli Cohen 4365e126ba97SEli Cohen case IB_WR_SEND_WITH_INV: 4366e126ba97SEli Cohen return cpu_to_be32(wr->ex.invalidate_rkey); 4367e126ba97SEli Cohen 4368e126ba97SEli Cohen default: 4369e126ba97SEli Cohen return 0; 4370e126ba97SEli Cohen } 4371e126ba97SEli Cohen } 4372e126ba97SEli Cohen 4373e126ba97SEli Cohen static u8 calc_sig(void *wqe, int size) 4374e126ba97SEli Cohen { 4375e126ba97SEli Cohen u8 *p = wqe; 4376e126ba97SEli Cohen u8 res = 0; 4377e126ba97SEli Cohen int i; 4378e126ba97SEli Cohen 4379e126ba97SEli Cohen for (i = 0; i < size; i++) 4380e126ba97SEli Cohen res ^= p[i]; 4381e126ba97SEli Cohen 4382e126ba97SEli Cohen return ~res; 4383e126ba97SEli Cohen } 4384e126ba97SEli Cohen 4385e126ba97SEli Cohen static u8 wq_sig(void *wqe) 4386e126ba97SEli Cohen { 4387e126ba97SEli Cohen return calc_sig(wqe, (*((u8 *)wqe + 8) & 0x3f) << 4); 4388e126ba97SEli Cohen } 4389e126ba97SEli Cohen 4390f696bf6dSBart Van Assche static int set_data_inl_seg(struct mlx5_ib_qp *qp, const struct ib_send_wr *wr, 439134f4c955SGuy Levi void **wqe, int *wqe_sz, void **cur_edge) 4392e126ba97SEli Cohen { 4393e126ba97SEli Cohen struct mlx5_wqe_inline_seg *seg; 439434f4c955SGuy Levi size_t offset; 4395e126ba97SEli Cohen int inl = 0; 4396e126ba97SEli Cohen int i; 4397e126ba97SEli Cohen 439834f4c955SGuy Levi seg = *wqe; 439934f4c955SGuy Levi *wqe += sizeof(*seg); 440034f4c955SGuy Levi offset = sizeof(*seg); 440134f4c955SGuy Levi 4402e126ba97SEli Cohen for (i = 0; i < wr->num_sge; i++) { 440334f4c955SGuy Levi size_t len = wr->sg_list[i].length; 440434f4c955SGuy Levi void *addr = (void *)(unsigned long)(wr->sg_list[i].addr); 440534f4c955SGuy Levi 4406e126ba97SEli Cohen inl += len; 4407e126ba97SEli Cohen 4408e126ba97SEli Cohen if (unlikely(inl > qp->max_inline_data)) 4409e126ba97SEli Cohen return -ENOMEM; 4410e126ba97SEli Cohen 441134f4c955SGuy Levi while (likely(len)) { 441234f4c955SGuy Levi size_t leftlen; 441334f4c955SGuy Levi size_t copysz; 441434f4c955SGuy Levi 441534f4c955SGuy Levi handle_post_send_edge(&qp->sq, wqe, 441634f4c955SGuy Levi *wqe_sz + (offset >> 4), 441734f4c955SGuy Levi cur_edge); 441834f4c955SGuy Levi 441934f4c955SGuy Levi leftlen = *cur_edge - *wqe; 442034f4c955SGuy Levi copysz = min_t(size_t, leftlen, len); 442134f4c955SGuy Levi 442234f4c955SGuy Levi memcpy(*wqe, addr, copysz); 442334f4c955SGuy Levi len -= copysz; 442434f4c955SGuy Levi addr += copysz; 442534f4c955SGuy Levi *wqe += copysz; 442634f4c955SGuy Levi offset += copysz; 4427e126ba97SEli Cohen } 4428e126ba97SEli Cohen } 4429e126ba97SEli Cohen 4430e126ba97SEli Cohen seg->byte_count = cpu_to_be32(inl | MLX5_INLINE_SEG); 4431e126ba97SEli Cohen 443234f4c955SGuy Levi *wqe_sz += ALIGN(inl + sizeof(seg->byte_count), 16) / 16; 4433e126ba97SEli Cohen 4434e126ba97SEli Cohen return 0; 4435e126ba97SEli Cohen } 4436e126ba97SEli Cohen 4437e6631814SSagi Grimberg static u16 prot_field_size(enum ib_signature_type type) 4438e6631814SSagi Grimberg { 4439e6631814SSagi Grimberg switch (type) { 4440e6631814SSagi Grimberg case IB_SIG_TYPE_T10_DIF: 4441e6631814SSagi Grimberg return MLX5_DIF_SIZE; 4442e6631814SSagi Grimberg default: 4443e6631814SSagi Grimberg return 0; 4444e6631814SSagi Grimberg } 4445e6631814SSagi Grimberg } 4446e6631814SSagi Grimberg 4447e6631814SSagi Grimberg static u8 bs_selector(int block_size) 4448e6631814SSagi Grimberg { 4449e6631814SSagi Grimberg switch (block_size) { 4450e6631814SSagi Grimberg case 512: return 0x1; 4451e6631814SSagi Grimberg case 520: return 0x2; 4452e6631814SSagi Grimberg case 4096: return 0x3; 4453e6631814SSagi Grimberg case 4160: return 0x4; 4454e6631814SSagi Grimberg case 1073741824: return 0x5; 4455e6631814SSagi Grimberg default: return 0; 4456e6631814SSagi Grimberg } 4457e6631814SSagi Grimberg } 4458e6631814SSagi Grimberg 445978eda2bbSSagi Grimberg static void mlx5_fill_inl_bsf(struct ib_sig_domain *domain, 4460142537f4SSagi Grimberg struct mlx5_bsf_inl *inl) 4461e6631814SSagi Grimberg { 4462142537f4SSagi Grimberg /* Valid inline section and allow BSF refresh */ 4463142537f4SSagi Grimberg inl->vld_refresh = cpu_to_be16(MLX5_BSF_INL_VALID | 4464142537f4SSagi Grimberg MLX5_BSF_REFRESH_DIF); 4465142537f4SSagi Grimberg inl->dif_apptag = cpu_to_be16(domain->sig.dif.app_tag); 4466142537f4SSagi Grimberg inl->dif_reftag = cpu_to_be32(domain->sig.dif.ref_tag); 4467142537f4SSagi Grimberg /* repeating block */ 4468142537f4SSagi Grimberg inl->rp_inv_seed = MLX5_BSF_REPEAT_BLOCK; 4469142537f4SSagi Grimberg inl->sig_type = domain->sig.dif.bg_type == IB_T10DIF_CRC ? 4470142537f4SSagi Grimberg MLX5_DIF_CRC : MLX5_DIF_IPCS; 4471e6631814SSagi Grimberg 447278eda2bbSSagi Grimberg if (domain->sig.dif.ref_remap) 447378eda2bbSSagi Grimberg inl->dif_inc_ref_guard_check |= MLX5_BSF_INC_REFTAG; 4474e6631814SSagi Grimberg 447578eda2bbSSagi Grimberg if (domain->sig.dif.app_escape) { 447678eda2bbSSagi Grimberg if (domain->sig.dif.ref_escape) 447778eda2bbSSagi Grimberg inl->dif_inc_ref_guard_check |= MLX5_BSF_APPREF_ESCAPE; 447878eda2bbSSagi Grimberg else 447978eda2bbSSagi Grimberg inl->dif_inc_ref_guard_check |= MLX5_BSF_APPTAG_ESCAPE; 4480e6631814SSagi Grimberg } 4481e6631814SSagi Grimberg 448278eda2bbSSagi Grimberg inl->dif_app_bitmask_check = 448378eda2bbSSagi Grimberg cpu_to_be16(domain->sig.dif.apptag_check_mask); 4484e6631814SSagi Grimberg } 4485e6631814SSagi Grimberg 4486e6631814SSagi Grimberg static int mlx5_set_bsf(struct ib_mr *sig_mr, 4487e6631814SSagi Grimberg struct ib_sig_attrs *sig_attrs, 4488e6631814SSagi Grimberg struct mlx5_bsf *bsf, u32 data_size) 4489e6631814SSagi Grimberg { 4490e6631814SSagi Grimberg struct mlx5_core_sig_ctx *msig = to_mmr(sig_mr)->sig; 4491e6631814SSagi Grimberg struct mlx5_bsf_basic *basic = &bsf->basic; 4492e6631814SSagi Grimberg struct ib_sig_domain *mem = &sig_attrs->mem; 4493e6631814SSagi Grimberg struct ib_sig_domain *wire = &sig_attrs->wire; 4494e6631814SSagi Grimberg 4495c7f44fbdSSagi Grimberg memset(bsf, 0, sizeof(*bsf)); 4496e6631814SSagi Grimberg 4497142537f4SSagi Grimberg /* Basic + Extended + Inline */ 4498142537f4SSagi Grimberg basic->bsf_size_sbs = 1 << 7; 4499e6631814SSagi Grimberg /* Input domain check byte mask */ 4500e6631814SSagi Grimberg basic->check_byte_mask = sig_attrs->check_mask; 450178eda2bbSSagi Grimberg basic->raw_data_size = cpu_to_be32(data_size); 450278eda2bbSSagi Grimberg 450378eda2bbSSagi Grimberg /* Memory domain */ 450478eda2bbSSagi Grimberg switch (sig_attrs->mem.sig_type) { 450578eda2bbSSagi Grimberg case IB_SIG_TYPE_NONE: 450678eda2bbSSagi Grimberg break; 450778eda2bbSSagi Grimberg case IB_SIG_TYPE_T10_DIF: 450878eda2bbSSagi Grimberg basic->mem.bs_selector = bs_selector(mem->sig.dif.pi_interval); 450978eda2bbSSagi Grimberg basic->m_bfs_psv = cpu_to_be32(msig->psv_memory.psv_idx); 451078eda2bbSSagi Grimberg mlx5_fill_inl_bsf(mem, &bsf->m_inl); 451178eda2bbSSagi Grimberg break; 451278eda2bbSSagi Grimberg default: 451378eda2bbSSagi Grimberg return -EINVAL; 451478eda2bbSSagi Grimberg } 451578eda2bbSSagi Grimberg 451678eda2bbSSagi Grimberg /* Wire domain */ 451778eda2bbSSagi Grimberg switch (sig_attrs->wire.sig_type) { 451878eda2bbSSagi Grimberg case IB_SIG_TYPE_NONE: 451978eda2bbSSagi Grimberg break; 452078eda2bbSSagi Grimberg case IB_SIG_TYPE_T10_DIF: 4521e6631814SSagi Grimberg if (mem->sig.dif.pi_interval == wire->sig.dif.pi_interval && 452278eda2bbSSagi Grimberg mem->sig_type == wire->sig_type) { 4523e6631814SSagi Grimberg /* Same block structure */ 4524142537f4SSagi Grimberg basic->bsf_size_sbs |= 1 << 4; 4525e6631814SSagi Grimberg if (mem->sig.dif.bg_type == wire->sig.dif.bg_type) 4526fd22f78cSSagi Grimberg basic->wire.copy_byte_mask |= MLX5_CPY_GRD_MASK; 4527c7f44fbdSSagi Grimberg if (mem->sig.dif.app_tag == wire->sig.dif.app_tag) 4528fd22f78cSSagi Grimberg basic->wire.copy_byte_mask |= MLX5_CPY_APP_MASK; 4529c7f44fbdSSagi Grimberg if (mem->sig.dif.ref_tag == wire->sig.dif.ref_tag) 4530fd22f78cSSagi Grimberg basic->wire.copy_byte_mask |= MLX5_CPY_REF_MASK; 4531e6631814SSagi Grimberg } else 4532e6631814SSagi Grimberg basic->wire.bs_selector = bs_selector(wire->sig.dif.pi_interval); 4533e6631814SSagi Grimberg 4534142537f4SSagi Grimberg basic->w_bfs_psv = cpu_to_be32(msig->psv_wire.psv_idx); 453578eda2bbSSagi Grimberg mlx5_fill_inl_bsf(wire, &bsf->w_inl); 4536e6631814SSagi Grimberg break; 4537e6631814SSagi Grimberg default: 4538e6631814SSagi Grimberg return -EINVAL; 4539e6631814SSagi Grimberg } 4540e6631814SSagi Grimberg 4541e6631814SSagi Grimberg return 0; 4542e6631814SSagi Grimberg } 4543e6631814SSagi Grimberg 454438ca87c6SMax Gurtovoy static int set_sig_data_segment(const struct ib_send_wr *send_wr, 454538ca87c6SMax Gurtovoy struct ib_mr *sig_mr, 454638ca87c6SMax Gurtovoy struct ib_sig_attrs *sig_attrs, 454738ca87c6SMax Gurtovoy struct mlx5_ib_qp *qp, void **seg, int *size, 454838ca87c6SMax Gurtovoy void **cur_edge) 4549e6631814SSagi Grimberg { 4550e6631814SSagi Grimberg struct mlx5_bsf *bsf; 455138ca87c6SMax Gurtovoy u32 data_len; 455238ca87c6SMax Gurtovoy u32 data_key; 455338ca87c6SMax Gurtovoy u64 data_va; 455438ca87c6SMax Gurtovoy u32 prot_len = 0; 455538ca87c6SMax Gurtovoy u32 prot_key = 0; 455638ca87c6SMax Gurtovoy u64 prot_va = 0; 455738ca87c6SMax Gurtovoy bool prot = false; 4558e6631814SSagi Grimberg int ret; 4559e6631814SSagi Grimberg int wqe_size; 456038ca87c6SMax Gurtovoy struct mlx5_ib_mr *mr = to_mmr(sig_mr); 456138ca87c6SMax Gurtovoy struct mlx5_ib_mr *pi_mr = mr->pi_mr; 456238ca87c6SMax Gurtovoy 456338ca87c6SMax Gurtovoy data_len = pi_mr->data_length; 456438ca87c6SMax Gurtovoy data_key = pi_mr->ibmr.lkey; 456538ca87c6SMax Gurtovoy data_va = pi_mr->ibmr.iova; 456638ca87c6SMax Gurtovoy if (pi_mr->meta_ndescs) { 456738ca87c6SMax Gurtovoy prot_len = pi_mr->meta_length; 456838ca87c6SMax Gurtovoy prot_key = pi_mr->ibmr.lkey; 4569de0ae958SIsrael Rukshin prot_va = pi_mr->pi_iova; 457038ca87c6SMax Gurtovoy prot = true; 457138ca87c6SMax Gurtovoy } 457238ca87c6SMax Gurtovoy 457338ca87c6SMax Gurtovoy if (!prot || (data_key == prot_key && data_va == prot_va && 457438ca87c6SMax Gurtovoy data_len == prot_len)) { 4575e6631814SSagi Grimberg /** 4576e6631814SSagi Grimberg * Source domain doesn't contain signature information 45775c273b16SSagi Grimberg * or data and protection are interleaved in memory. 4578e6631814SSagi Grimberg * So need construct: 4579e6631814SSagi Grimberg * ------------------ 4580e6631814SSagi Grimberg * | data_klm | 4581e6631814SSagi Grimberg * ------------------ 4582e6631814SSagi Grimberg * | BSF | 4583e6631814SSagi Grimberg * ------------------ 4584e6631814SSagi Grimberg **/ 4585e6631814SSagi Grimberg struct mlx5_klm *data_klm = *seg; 4586e6631814SSagi Grimberg 4587e6631814SSagi Grimberg data_klm->bcount = cpu_to_be32(data_len); 4588e6631814SSagi Grimberg data_klm->key = cpu_to_be32(data_key); 4589e6631814SSagi Grimberg data_klm->va = cpu_to_be64(data_va); 4590e6631814SSagi Grimberg wqe_size = ALIGN(sizeof(*data_klm), 64); 4591e6631814SSagi Grimberg } else { 4592e6631814SSagi Grimberg /** 4593e6631814SSagi Grimberg * Source domain contains signature information 4594e6631814SSagi Grimberg * So need construct a strided block format: 4595e6631814SSagi Grimberg * --------------------------- 4596e6631814SSagi Grimberg * | stride_block_ctrl | 4597e6631814SSagi Grimberg * --------------------------- 4598e6631814SSagi Grimberg * | data_klm | 4599e6631814SSagi Grimberg * --------------------------- 4600e6631814SSagi Grimberg * | prot_klm | 4601e6631814SSagi Grimberg * --------------------------- 4602e6631814SSagi Grimberg * | BSF | 4603e6631814SSagi Grimberg * --------------------------- 4604e6631814SSagi Grimberg **/ 4605e6631814SSagi Grimberg struct mlx5_stride_block_ctrl_seg *sblock_ctrl; 4606e6631814SSagi Grimberg struct mlx5_stride_block_entry *data_sentry; 4607e6631814SSagi Grimberg struct mlx5_stride_block_entry *prot_sentry; 4608e6631814SSagi Grimberg u16 block_size = sig_attrs->mem.sig.dif.pi_interval; 4609e6631814SSagi Grimberg int prot_size; 4610e6631814SSagi Grimberg 4611e6631814SSagi Grimberg sblock_ctrl = *seg; 4612e6631814SSagi Grimberg data_sentry = (void *)sblock_ctrl + sizeof(*sblock_ctrl); 4613e6631814SSagi Grimberg prot_sentry = (void *)data_sentry + sizeof(*data_sentry); 4614e6631814SSagi Grimberg 4615e6631814SSagi Grimberg prot_size = prot_field_size(sig_attrs->mem.sig_type); 4616e6631814SSagi Grimberg if (!prot_size) { 4617e6631814SSagi Grimberg pr_err("Bad block size given: %u\n", block_size); 4618e6631814SSagi Grimberg return -EINVAL; 4619e6631814SSagi Grimberg } 4620e6631814SSagi Grimberg sblock_ctrl->bcount_per_cycle = cpu_to_be32(block_size + 4621e6631814SSagi Grimberg prot_size); 4622e6631814SSagi Grimberg sblock_ctrl->op = cpu_to_be32(MLX5_STRIDE_BLOCK_OP); 4623e6631814SSagi Grimberg sblock_ctrl->repeat_count = cpu_to_be32(data_len / block_size); 4624e6631814SSagi Grimberg sblock_ctrl->num_entries = cpu_to_be16(2); 4625e6631814SSagi Grimberg 4626e6631814SSagi Grimberg data_sentry->bcount = cpu_to_be16(block_size); 4627e6631814SSagi Grimberg data_sentry->key = cpu_to_be32(data_key); 4628e6631814SSagi Grimberg data_sentry->va = cpu_to_be64(data_va); 46295c273b16SSagi Grimberg data_sentry->stride = cpu_to_be16(block_size); 46305c273b16SSagi Grimberg 4631e6631814SSagi Grimberg prot_sentry->bcount = cpu_to_be16(prot_size); 4632e6631814SSagi Grimberg prot_sentry->key = cpu_to_be32(prot_key); 4633e6631814SSagi Grimberg prot_sentry->va = cpu_to_be64(prot_va); 4634e6631814SSagi Grimberg prot_sentry->stride = cpu_to_be16(prot_size); 46355c273b16SSagi Grimberg 4636e6631814SSagi Grimberg wqe_size = ALIGN(sizeof(*sblock_ctrl) + sizeof(*data_sentry) + 4637e6631814SSagi Grimberg sizeof(*prot_sentry), 64); 4638e6631814SSagi Grimberg } 4639e6631814SSagi Grimberg 4640e6631814SSagi Grimberg *seg += wqe_size; 4641e6631814SSagi Grimberg *size += wqe_size / 16; 464234f4c955SGuy Levi handle_post_send_edge(&qp->sq, seg, *size, cur_edge); 4643e6631814SSagi Grimberg 4644e6631814SSagi Grimberg bsf = *seg; 4645e6631814SSagi Grimberg ret = mlx5_set_bsf(sig_mr, sig_attrs, bsf, data_len); 4646e6631814SSagi Grimberg if (ret) 4647e6631814SSagi Grimberg return -EINVAL; 4648e6631814SSagi Grimberg 4649e6631814SSagi Grimberg *seg += sizeof(*bsf); 4650e6631814SSagi Grimberg *size += sizeof(*bsf) / 16; 465134f4c955SGuy Levi handle_post_send_edge(&qp->sq, seg, *size, cur_edge); 4652e6631814SSagi Grimberg 4653e6631814SSagi Grimberg return 0; 4654e6631814SSagi Grimberg } 4655e6631814SSagi Grimberg 4656e6631814SSagi Grimberg static void set_sig_mkey_segment(struct mlx5_mkey_seg *seg, 465722465bbaSMax Gurtovoy struct ib_mr *sig_mr, int access_flags, 465822465bbaSMax Gurtovoy u32 size, u32 length, u32 pdn) 4659e6631814SSagi Grimberg { 4660e6631814SSagi Grimberg u32 sig_key = sig_mr->rkey; 4661d5436ba0SSagi Grimberg u8 sigerr = to_mmr(sig_mr)->sig->sigerr_count & 1; 4662e6631814SSagi Grimberg 4663e6631814SSagi Grimberg memset(seg, 0, sizeof(*seg)); 4664e6631814SSagi Grimberg 466522465bbaSMax Gurtovoy seg->flags = get_umr_flags(access_flags) | MLX5_MKC_ACCESS_MODE_KLMS; 4666e6631814SSagi Grimberg seg->qpn_mkey7_0 = cpu_to_be32((sig_key & 0xff) | 0xffffff00); 4667d5436ba0SSagi Grimberg seg->flags_pd = cpu_to_be32(MLX5_MKEY_REMOTE_INVAL | sigerr << 26 | 4668e6631814SSagi Grimberg MLX5_MKEY_BSF_EN | pdn); 4669e6631814SSagi Grimberg seg->len = cpu_to_be64(length); 467031616255SArtemy Kovalyov seg->xlt_oct_size = cpu_to_be32(get_xlt_octo(size)); 4671e6631814SSagi Grimberg seg->bsfs_octo_size = cpu_to_be32(MLX5_MKEY_BSF_OCTO_SIZE); 4672e6631814SSagi Grimberg } 4673e6631814SSagi Grimberg 4674e6631814SSagi Grimberg static void set_sig_umr_segment(struct mlx5_wqe_umr_ctrl_seg *umr, 467531616255SArtemy Kovalyov u32 size) 4676e6631814SSagi Grimberg { 4677e6631814SSagi Grimberg memset(umr, 0, sizeof(*umr)); 4678e6631814SSagi Grimberg 4679e6631814SSagi Grimberg umr->flags = MLX5_FLAGS_INLINE | MLX5_FLAGS_CHECK_FREE; 468031616255SArtemy Kovalyov umr->xlt_octowords = cpu_to_be16(get_xlt_octo(size)); 4681e6631814SSagi Grimberg umr->bsf_octowords = cpu_to_be16(MLX5_MKEY_BSF_OCTO_SIZE); 4682e6631814SSagi Grimberg umr->mkey_mask = sig_mkey_mask(); 4683e6631814SSagi Grimberg } 4684e6631814SSagi Grimberg 468538ca87c6SMax Gurtovoy static int set_pi_umr_wr(const struct ib_send_wr *send_wr, 468638ca87c6SMax Gurtovoy struct mlx5_ib_qp *qp, void **seg, int *size, 468738ca87c6SMax Gurtovoy void **cur_edge) 468838ca87c6SMax Gurtovoy { 468938ca87c6SMax Gurtovoy const struct ib_reg_wr *wr = reg_wr(send_wr); 469038ca87c6SMax Gurtovoy struct mlx5_ib_mr *sig_mr = to_mmr(wr->mr); 469138ca87c6SMax Gurtovoy struct mlx5_ib_mr *pi_mr = sig_mr->pi_mr; 469238ca87c6SMax Gurtovoy struct ib_sig_attrs *sig_attrs = sig_mr->ibmr.sig_attrs; 469338ca87c6SMax Gurtovoy u32 pdn = get_pd(qp)->pdn; 469438ca87c6SMax Gurtovoy u32 xlt_size; 469538ca87c6SMax Gurtovoy int region_len, ret; 469638ca87c6SMax Gurtovoy 469738ca87c6SMax Gurtovoy if (unlikely(send_wr->num_sge != 0) || 469838ca87c6SMax Gurtovoy unlikely(wr->access & IB_ACCESS_REMOTE_ATOMIC) || 4699185eddc4SMax Gurtovoy unlikely(!sig_mr->sig) || unlikely(!qp->ibqp.integrity_en) || 470038ca87c6SMax Gurtovoy unlikely(!sig_mr->sig->sig_status_checked)) 470138ca87c6SMax Gurtovoy return -EINVAL; 470238ca87c6SMax Gurtovoy 470338ca87c6SMax Gurtovoy /* length of the protected region, data + protection */ 470438ca87c6SMax Gurtovoy region_len = pi_mr->ibmr.length; 470538ca87c6SMax Gurtovoy 470638ca87c6SMax Gurtovoy /** 470738ca87c6SMax Gurtovoy * KLM octoword size - if protection was provided 470838ca87c6SMax Gurtovoy * then we use strided block format (3 octowords), 470938ca87c6SMax Gurtovoy * else we use single KLM (1 octoword) 471038ca87c6SMax Gurtovoy **/ 471138ca87c6SMax Gurtovoy if (sig_attrs->mem.sig_type != IB_SIG_TYPE_NONE) 471238ca87c6SMax Gurtovoy xlt_size = 0x30; 471338ca87c6SMax Gurtovoy else 471438ca87c6SMax Gurtovoy xlt_size = sizeof(struct mlx5_klm); 471538ca87c6SMax Gurtovoy 471638ca87c6SMax Gurtovoy set_sig_umr_segment(*seg, xlt_size); 471738ca87c6SMax Gurtovoy *seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 471838ca87c6SMax Gurtovoy *size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 471938ca87c6SMax Gurtovoy handle_post_send_edge(&qp->sq, seg, *size, cur_edge); 472038ca87c6SMax Gurtovoy 472138ca87c6SMax Gurtovoy set_sig_mkey_segment(*seg, wr->mr, wr->access, xlt_size, region_len, 472238ca87c6SMax Gurtovoy pdn); 472338ca87c6SMax Gurtovoy *seg += sizeof(struct mlx5_mkey_seg); 472438ca87c6SMax Gurtovoy *size += sizeof(struct mlx5_mkey_seg) / 16; 472538ca87c6SMax Gurtovoy handle_post_send_edge(&qp->sq, seg, *size, cur_edge); 472638ca87c6SMax Gurtovoy 472738ca87c6SMax Gurtovoy ret = set_sig_data_segment(send_wr, wr->mr, sig_attrs, qp, seg, size, 472838ca87c6SMax Gurtovoy cur_edge); 472938ca87c6SMax Gurtovoy if (ret) 473038ca87c6SMax Gurtovoy return ret; 473138ca87c6SMax Gurtovoy 473238ca87c6SMax Gurtovoy sig_mr->sig->sig_status_checked = false; 473338ca87c6SMax Gurtovoy return 0; 473438ca87c6SMax Gurtovoy } 4735e6631814SSagi Grimberg 4736e6631814SSagi Grimberg static int set_psv_wr(struct ib_sig_domain *domain, 4737e6631814SSagi Grimberg u32 psv_idx, void **seg, int *size) 4738e6631814SSagi Grimberg { 4739e6631814SSagi Grimberg struct mlx5_seg_set_psv *psv_seg = *seg; 4740e6631814SSagi Grimberg 4741e6631814SSagi Grimberg memset(psv_seg, 0, sizeof(*psv_seg)); 4742e6631814SSagi Grimberg psv_seg->psv_num = cpu_to_be32(psv_idx); 4743e6631814SSagi Grimberg switch (domain->sig_type) { 474478eda2bbSSagi Grimberg case IB_SIG_TYPE_NONE: 474578eda2bbSSagi Grimberg break; 4746e6631814SSagi Grimberg case IB_SIG_TYPE_T10_DIF: 4747e6631814SSagi Grimberg psv_seg->transient_sig = cpu_to_be32(domain->sig.dif.bg << 16 | 4748e6631814SSagi Grimberg domain->sig.dif.app_tag); 4749e6631814SSagi Grimberg psv_seg->ref_tag = cpu_to_be32(domain->sig.dif.ref_tag); 4750e6631814SSagi Grimberg break; 4751e6631814SSagi Grimberg default: 475212bbf1eaSLeon Romanovsky pr_err("Bad signature type (%d) is given.\n", 475312bbf1eaSLeon Romanovsky domain->sig_type); 475412bbf1eaSLeon Romanovsky return -EINVAL; 4755e6631814SSagi Grimberg } 4756e6631814SSagi Grimberg 475778eda2bbSSagi Grimberg *seg += sizeof(*psv_seg); 475878eda2bbSSagi Grimberg *size += sizeof(*psv_seg) / 16; 475978eda2bbSSagi Grimberg 4760e6631814SSagi Grimberg return 0; 4761e6631814SSagi Grimberg } 4762e6631814SSagi Grimberg 47638a187ee5SSagi Grimberg static int set_reg_wr(struct mlx5_ib_qp *qp, 4764f696bf6dSBart Van Assche const struct ib_reg_wr *wr, 47659ac7c4bcSMax Gurtovoy void **seg, int *size, void **cur_edge, 47669ac7c4bcSMax Gurtovoy bool check_not_free) 47678a187ee5SSagi Grimberg { 47688a187ee5SSagi Grimberg struct mlx5_ib_mr *mr = to_mmr(wr->mr); 47698a187ee5SSagi Grimberg struct mlx5_ib_pd *pd = to_mpd(qp->ibqp.pd); 477038ca87c6SMax Gurtovoy int mr_list_size = (mr->ndescs + mr->meta_ndescs) * mr->desc_size; 4771064e5262SIdan Burstein bool umr_inline = mr_list_size <= MLX5_IB_SQ_UMR_INLINE_THRESHOLD; 47729ac7c4bcSMax Gurtovoy u8 flags = 0; 47738a187ee5SSagi Grimberg 47748a187ee5SSagi Grimberg if (unlikely(wr->wr.send_flags & IB_SEND_INLINE)) { 47758a187ee5SSagi Grimberg mlx5_ib_warn(to_mdev(qp->ibqp.device), 47768a187ee5SSagi Grimberg "Invalid IB_SEND_INLINE send flag\n"); 47778a187ee5SSagi Grimberg return -EINVAL; 47788a187ee5SSagi Grimberg } 47798a187ee5SSagi Grimberg 47809ac7c4bcSMax Gurtovoy if (check_not_free) 47819ac7c4bcSMax Gurtovoy flags |= MLX5_UMR_CHECK_NOT_FREE; 47829ac7c4bcSMax Gurtovoy if (umr_inline) 47839ac7c4bcSMax Gurtovoy flags |= MLX5_UMR_INLINE; 47849ac7c4bcSMax Gurtovoy 47859ac7c4bcSMax Gurtovoy set_reg_umr_seg(*seg, mr, flags); 47868a187ee5SSagi Grimberg *seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 47878a187ee5SSagi Grimberg *size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 478834f4c955SGuy Levi handle_post_send_edge(&qp->sq, seg, *size, cur_edge); 47898a187ee5SSagi Grimberg 47908a187ee5SSagi Grimberg set_reg_mkey_seg(*seg, mr, wr->key, wr->access); 47918a187ee5SSagi Grimberg *seg += sizeof(struct mlx5_mkey_seg); 47928a187ee5SSagi Grimberg *size += sizeof(struct mlx5_mkey_seg) / 16; 479334f4c955SGuy Levi handle_post_send_edge(&qp->sq, seg, *size, cur_edge); 47948a187ee5SSagi Grimberg 4795064e5262SIdan Burstein if (umr_inline) { 479634f4c955SGuy Levi memcpy_send_wqe(&qp->sq, cur_edge, seg, size, mr->descs, 479734f4c955SGuy Levi mr_list_size); 479834f4c955SGuy Levi *size = ALIGN(*size, MLX5_SEND_WQE_BB >> 4); 4799064e5262SIdan Burstein } else { 48008a187ee5SSagi Grimberg set_reg_data_seg(*seg, mr, pd); 48018a187ee5SSagi Grimberg *seg += sizeof(struct mlx5_wqe_data_seg); 48028a187ee5SSagi Grimberg *size += (sizeof(struct mlx5_wqe_data_seg) / 16); 4803064e5262SIdan Burstein } 48048a187ee5SSagi Grimberg return 0; 48058a187ee5SSagi Grimberg } 48068a187ee5SSagi Grimberg 480734f4c955SGuy Levi static void set_linv_wr(struct mlx5_ib_qp *qp, void **seg, int *size, 480834f4c955SGuy Levi void **cur_edge) 4809e126ba97SEli Cohen { 4810dd01e66aSSagi Grimberg set_linv_umr_seg(*seg); 4811e126ba97SEli Cohen *seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 4812e126ba97SEli Cohen *size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 481334f4c955SGuy Levi handle_post_send_edge(&qp->sq, seg, *size, cur_edge); 4814dd01e66aSSagi Grimberg set_linv_mkey_seg(*seg); 4815e126ba97SEli Cohen *seg += sizeof(struct mlx5_mkey_seg); 4816e126ba97SEli Cohen *size += sizeof(struct mlx5_mkey_seg) / 16; 481734f4c955SGuy Levi handle_post_send_edge(&qp->sq, seg, *size, cur_edge); 4818e126ba97SEli Cohen } 4819e126ba97SEli Cohen 482034f4c955SGuy Levi static void dump_wqe(struct mlx5_ib_qp *qp, u32 idx, int size_16) 4821e126ba97SEli Cohen { 4822e126ba97SEli Cohen __be32 *p = NULL; 4823e126ba97SEli Cohen int i, j; 4824e126ba97SEli Cohen 482534f4c955SGuy Levi pr_debug("dump WQE index %u:\n", idx); 4826e126ba97SEli Cohen for (i = 0, j = 0; i < size_16 * 4; i += 4, j += 4) { 4827e126ba97SEli Cohen if ((i & 0xf) == 0) { 48281e5887b7SArtemy Kovalyov p = mlx5_frag_buf_get_wqe(&qp->sq.fbc, idx); 482934f4c955SGuy Levi pr_debug("WQBB at %p:\n", (void *)p); 4830e126ba97SEli Cohen j = 0; 48311e5887b7SArtemy Kovalyov idx = (idx + 1) & (qp->sq.wqe_cnt - 1); 4832e126ba97SEli Cohen } 4833e126ba97SEli Cohen pr_debug("%08x %08x %08x %08x\n", be32_to_cpu(p[j]), 4834e126ba97SEli Cohen be32_to_cpu(p[j + 1]), be32_to_cpu(p[j + 2]), 4835e126ba97SEli Cohen be32_to_cpu(p[j + 3])); 4836e126ba97SEli Cohen } 4837e126ba97SEli Cohen } 4838e126ba97SEli Cohen 48397bb1fafcSBart Van Assche static int __begin_wqe(struct mlx5_ib_qp *qp, void **seg, 48406e5eadacSSagi Grimberg struct mlx5_wqe_ctrl_seg **ctrl, 484134f4c955SGuy Levi const struct ib_send_wr *wr, unsigned int *idx, 484234f4c955SGuy Levi int *size, void **cur_edge, int nreq, 484334f4c955SGuy Levi bool send_signaled, bool solicited) 48446e5eadacSSagi Grimberg { 4845b2a232d2SLeon Romanovsky if (unlikely(mlx5_wq_overflow(&qp->sq, nreq, qp->ibqp.send_cq))) 4846b2a232d2SLeon Romanovsky return -ENOMEM; 48476e5eadacSSagi Grimberg 48486e5eadacSSagi Grimberg *idx = qp->sq.cur_post & (qp->sq.wqe_cnt - 1); 484934f4c955SGuy Levi *seg = mlx5_frag_buf_get_wqe(&qp->sq.fbc, *idx); 48506e5eadacSSagi Grimberg *ctrl = *seg; 48516e5eadacSSagi Grimberg *(uint32_t *)(*seg + 8) = 0; 48526e5eadacSSagi Grimberg (*ctrl)->imm = send_ieth(wr); 48536e5eadacSSagi Grimberg (*ctrl)->fm_ce_se = qp->sq_signal_bits | 48547bb1fafcSBart Van Assche (send_signaled ? MLX5_WQE_CTRL_CQ_UPDATE : 0) | 48557bb1fafcSBart Van Assche (solicited ? MLX5_WQE_CTRL_SOLICITED : 0); 48566e5eadacSSagi Grimberg 48576e5eadacSSagi Grimberg *seg += sizeof(**ctrl); 48586e5eadacSSagi Grimberg *size = sizeof(**ctrl) / 16; 485934f4c955SGuy Levi *cur_edge = qp->sq.cur_edge; 48606e5eadacSSagi Grimberg 4861b2a232d2SLeon Romanovsky return 0; 48626e5eadacSSagi Grimberg } 48636e5eadacSSagi Grimberg 48647bb1fafcSBart Van Assche static int begin_wqe(struct mlx5_ib_qp *qp, void **seg, 48657bb1fafcSBart Van Assche struct mlx5_wqe_ctrl_seg **ctrl, 48667bb1fafcSBart Van Assche const struct ib_send_wr *wr, unsigned *idx, 486734f4c955SGuy Levi int *size, void **cur_edge, int nreq) 48687bb1fafcSBart Van Assche { 486934f4c955SGuy Levi return __begin_wqe(qp, seg, ctrl, wr, idx, size, cur_edge, nreq, 48707bb1fafcSBart Van Assche wr->send_flags & IB_SEND_SIGNALED, 48717bb1fafcSBart Van Assche wr->send_flags & IB_SEND_SOLICITED); 48727bb1fafcSBart Van Assche } 48737bb1fafcSBart Van Assche 48746e5eadacSSagi Grimberg static void finish_wqe(struct mlx5_ib_qp *qp, 48756e5eadacSSagi Grimberg struct mlx5_wqe_ctrl_seg *ctrl, 487634f4c955SGuy Levi void *seg, u8 size, void *cur_edge, 487734f4c955SGuy Levi unsigned int idx, u64 wr_id, int nreq, u8 fence, 487834f4c955SGuy Levi u32 mlx5_opcode) 48796e5eadacSSagi Grimberg { 48806e5eadacSSagi Grimberg u8 opmod = 0; 48816e5eadacSSagi Grimberg 48826e5eadacSSagi Grimberg ctrl->opmod_idx_opcode = cpu_to_be32(((u32)(qp->sq.cur_post) << 8) | 48836e5eadacSSagi Grimberg mlx5_opcode | ((u32)opmod << 24)); 488419098df2Smajd@mellanox.com ctrl->qpn_ds = cpu_to_be32(size | (qp->trans_qp.base.mqp.qpn << 8)); 48856e5eadacSSagi Grimberg ctrl->fm_ce_se |= fence; 48866e5eadacSSagi Grimberg if (unlikely(qp->wq_sig)) 48876e5eadacSSagi Grimberg ctrl->signature = wq_sig(ctrl); 48886e5eadacSSagi Grimberg 48896e5eadacSSagi Grimberg qp->sq.wrid[idx] = wr_id; 48906e5eadacSSagi Grimberg qp->sq.w_list[idx].opcode = mlx5_opcode; 48916e5eadacSSagi Grimberg qp->sq.wqe_head[idx] = qp->sq.head + nreq; 48926e5eadacSSagi Grimberg qp->sq.cur_post += DIV_ROUND_UP(size * 16, MLX5_SEND_WQE_BB); 48936e5eadacSSagi Grimberg qp->sq.w_list[idx].next = qp->sq.cur_post; 489434f4c955SGuy Levi 489534f4c955SGuy Levi /* We save the edge which was possibly updated during the WQE 489634f4c955SGuy Levi * construction, into SQ's cache. 489734f4c955SGuy Levi */ 489834f4c955SGuy Levi seg = PTR_ALIGN(seg, MLX5_SEND_WQE_BB); 489934f4c955SGuy Levi qp->sq.cur_edge = (unlikely(seg == cur_edge)) ? 490034f4c955SGuy Levi get_sq_edge(&qp->sq, qp->sq.cur_post & 490134f4c955SGuy Levi (qp->sq.wqe_cnt - 1)) : 490234f4c955SGuy Levi cur_edge; 49036e5eadacSSagi Grimberg } 49046e5eadacSSagi Grimberg 4905d34ac5cdSBart Van Assche static int _mlx5_ib_post_send(struct ib_qp *ibqp, const struct ib_send_wr *wr, 4906d34ac5cdSBart Van Assche const struct ib_send_wr **bad_wr, bool drain) 4907e126ba97SEli Cohen { 4908e126ba97SEli Cohen struct mlx5_wqe_ctrl_seg *ctrl = NULL; /* compiler warning */ 4909e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 491089ea94a7SMaor Gottlieb struct mlx5_core_dev *mdev = dev->mdev; 491138ca87c6SMax Gurtovoy struct ib_reg_wr reg_pi_wr; 4912d16e91daSHaggai Eran struct mlx5_ib_qp *qp; 4913e6631814SSagi Grimberg struct mlx5_ib_mr *mr; 491438ca87c6SMax Gurtovoy struct mlx5_ib_mr *pi_mr; 491538ca87c6SMax Gurtovoy struct ib_sig_attrs *sig_attrs; 4916e126ba97SEli Cohen struct mlx5_wqe_xrc_seg *xrc; 4917d16e91daSHaggai Eran struct mlx5_bf *bf; 491834f4c955SGuy Levi void *cur_edge; 4919e126ba97SEli Cohen int uninitialized_var(size); 4920e126ba97SEli Cohen unsigned long flags; 4921e126ba97SEli Cohen unsigned idx; 4922e126ba97SEli Cohen int err = 0; 4923e126ba97SEli Cohen int num_sge; 4924e126ba97SEli Cohen void *seg; 4925e126ba97SEli Cohen int nreq; 4926e126ba97SEli Cohen int i; 4927e126ba97SEli Cohen u8 next_fence = 0; 4928e126ba97SEli Cohen u8 fence; 4929e126ba97SEli Cohen 49306c75520fSParav Pandit if (unlikely(mdev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR && 49316c75520fSParav Pandit !drain)) { 49326c75520fSParav Pandit *bad_wr = wr; 49336c75520fSParav Pandit return -EIO; 49346c75520fSParav Pandit } 49356c75520fSParav Pandit 4936d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 4937d16e91daSHaggai Eran return mlx5_ib_gsi_post_send(ibqp, wr, bad_wr); 4938d16e91daSHaggai Eran 4939d16e91daSHaggai Eran qp = to_mqp(ibqp); 49405fe9dec0SEli Cohen bf = &qp->bf; 4941d16e91daSHaggai Eran 4942e126ba97SEli Cohen spin_lock_irqsave(&qp->sq.lock, flags); 4943e126ba97SEli Cohen 4944e126ba97SEli Cohen for (nreq = 0; wr; nreq++, wr = wr->next) { 4945a8f731ebSFabian Frederick if (unlikely(wr->opcode >= ARRAY_SIZE(mlx5_ib_opcode))) { 4946e126ba97SEli Cohen mlx5_ib_warn(dev, "\n"); 4947e126ba97SEli Cohen err = -EINVAL; 4948e126ba97SEli Cohen *bad_wr = wr; 4949e126ba97SEli Cohen goto out; 4950e126ba97SEli Cohen } 4951e126ba97SEli Cohen 4952e126ba97SEli Cohen num_sge = wr->num_sge; 4953e126ba97SEli Cohen if (unlikely(num_sge > qp->sq.max_gs)) { 4954e126ba97SEli Cohen mlx5_ib_warn(dev, "\n"); 495524be409bSChuck Lever err = -EINVAL; 4956e126ba97SEli Cohen *bad_wr = wr; 4957e126ba97SEli Cohen goto out; 4958e126ba97SEli Cohen } 4959e126ba97SEli Cohen 496034f4c955SGuy Levi err = begin_wqe(qp, &seg, &ctrl, wr, &idx, &size, &cur_edge, 496134f4c955SGuy Levi nreq); 49626e5eadacSSagi Grimberg if (err) { 49636e5eadacSSagi Grimberg mlx5_ib_warn(dev, "\n"); 49646e5eadacSSagi Grimberg err = -ENOMEM; 49656e5eadacSSagi Grimberg *bad_wr = wr; 49666e5eadacSSagi Grimberg goto out; 49676e5eadacSSagi Grimberg } 4968e126ba97SEli Cohen 496938ca87c6SMax Gurtovoy if (wr->opcode == IB_WR_REG_MR || 497038ca87c6SMax Gurtovoy wr->opcode == IB_WR_REG_MR_INTEGRITY) { 49716e8484c5SMax Gurtovoy fence = dev->umr_fence; 49726e8484c5SMax Gurtovoy next_fence = MLX5_FENCE_MODE_INITIATOR_SMALL; 4973074fca3aSMajd Dibbiny } else { 4974074fca3aSMajd Dibbiny if (wr->send_flags & IB_SEND_FENCE) { 49756e8484c5SMax Gurtovoy if (qp->next_fence) 49766e8484c5SMax Gurtovoy fence = MLX5_FENCE_MODE_SMALL_AND_FENCE; 49776e8484c5SMax Gurtovoy else 49786e8484c5SMax Gurtovoy fence = MLX5_FENCE_MODE_FENCE; 49796e8484c5SMax Gurtovoy } else { 49806e8484c5SMax Gurtovoy fence = qp->next_fence; 49816e8484c5SMax Gurtovoy } 4982074fca3aSMajd Dibbiny } 49836e8484c5SMax Gurtovoy 4984e126ba97SEli Cohen switch (ibqp->qp_type) { 4985e126ba97SEli Cohen case IB_QPT_XRC_INI: 4986e126ba97SEli Cohen xrc = seg; 4987e126ba97SEli Cohen seg += sizeof(*xrc); 4988e126ba97SEli Cohen size += sizeof(*xrc) / 16; 4989e126ba97SEli Cohen /* fall through */ 4990e126ba97SEli Cohen case IB_QPT_RC: 4991e126ba97SEli Cohen switch (wr->opcode) { 4992e126ba97SEli Cohen case IB_WR_RDMA_READ: 4993e126ba97SEli Cohen case IB_WR_RDMA_WRITE: 4994e126ba97SEli Cohen case IB_WR_RDMA_WRITE_WITH_IMM: 4995e622f2f4SChristoph Hellwig set_raddr_seg(seg, rdma_wr(wr)->remote_addr, 4996e622f2f4SChristoph Hellwig rdma_wr(wr)->rkey); 4997e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_raddr_seg); 4998e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_raddr_seg) / 16; 4999e126ba97SEli Cohen break; 5000e126ba97SEli Cohen 5001e126ba97SEli Cohen case IB_WR_ATOMIC_CMP_AND_SWP: 5002e126ba97SEli Cohen case IB_WR_ATOMIC_FETCH_AND_ADD: 5003e126ba97SEli Cohen case IB_WR_MASKED_ATOMIC_CMP_AND_SWP: 500481bea28fSEli Cohen mlx5_ib_warn(dev, "Atomic operations are not supported yet\n"); 500581bea28fSEli Cohen err = -ENOSYS; 500681bea28fSEli Cohen *bad_wr = wr; 500781bea28fSEli Cohen goto out; 5008e126ba97SEli Cohen 5009e126ba97SEli Cohen case IB_WR_LOCAL_INV: 5010e126ba97SEli Cohen qp->sq.wr_data[idx] = IB_WR_LOCAL_INV; 5011e126ba97SEli Cohen ctrl->imm = cpu_to_be32(wr->ex.invalidate_rkey); 501234f4c955SGuy Levi set_linv_wr(qp, &seg, &size, &cur_edge); 5013e126ba97SEli Cohen num_sge = 0; 5014e126ba97SEli Cohen break; 5015e126ba97SEli Cohen 50168a187ee5SSagi Grimberg case IB_WR_REG_MR: 50178a187ee5SSagi Grimberg qp->sq.wr_data[idx] = IB_WR_REG_MR; 50188a187ee5SSagi Grimberg ctrl->imm = cpu_to_be32(reg_wr(wr)->key); 501934f4c955SGuy Levi err = set_reg_wr(qp, reg_wr(wr), &seg, &size, 50209ac7c4bcSMax Gurtovoy &cur_edge, true); 50218a187ee5SSagi Grimberg if (err) { 50228a187ee5SSagi Grimberg *bad_wr = wr; 50238a187ee5SSagi Grimberg goto out; 50248a187ee5SSagi Grimberg } 50258a187ee5SSagi Grimberg num_sge = 0; 50268a187ee5SSagi Grimberg break; 50278a187ee5SSagi Grimberg 502838ca87c6SMax Gurtovoy case IB_WR_REG_MR_INTEGRITY: 502938ca87c6SMax Gurtovoy memset(®_pi_wr, 0, sizeof(struct ib_reg_wr)); 503038ca87c6SMax Gurtovoy 503138ca87c6SMax Gurtovoy mr = to_mmr(reg_wr(wr)->mr); 503238ca87c6SMax Gurtovoy pi_mr = mr->pi_mr; 503338ca87c6SMax Gurtovoy 503438ca87c6SMax Gurtovoy reg_pi_wr.mr = &pi_mr->ibmr; 503538ca87c6SMax Gurtovoy reg_pi_wr.access = reg_wr(wr)->access; 503638ca87c6SMax Gurtovoy reg_pi_wr.key = pi_mr->ibmr.rkey; 503738ca87c6SMax Gurtovoy 503838ca87c6SMax Gurtovoy qp->sq.wr_data[idx] = IB_WR_REG_MR_INTEGRITY; 503938ca87c6SMax Gurtovoy ctrl->imm = cpu_to_be32(reg_pi_wr.key); 504038ca87c6SMax Gurtovoy /* UMR for data + protection registration */ 504138ca87c6SMax Gurtovoy err = set_reg_wr(qp, ®_pi_wr, &seg, &size, 504238ca87c6SMax Gurtovoy &cur_edge, false); 504338ca87c6SMax Gurtovoy if (err) { 504438ca87c6SMax Gurtovoy *bad_wr = wr; 504538ca87c6SMax Gurtovoy goto out; 504638ca87c6SMax Gurtovoy } 504738ca87c6SMax Gurtovoy finish_wqe(qp, ctrl, seg, size, cur_edge, idx, 504838ca87c6SMax Gurtovoy wr->wr_id, nreq, fence, 504938ca87c6SMax Gurtovoy MLX5_OPCODE_UMR); 505038ca87c6SMax Gurtovoy 505138ca87c6SMax Gurtovoy err = begin_wqe(qp, &seg, &ctrl, wr, &idx, 505238ca87c6SMax Gurtovoy &size, &cur_edge, nreq); 505338ca87c6SMax Gurtovoy if (err) { 505438ca87c6SMax Gurtovoy mlx5_ib_warn(dev, "\n"); 505538ca87c6SMax Gurtovoy err = -ENOMEM; 505638ca87c6SMax Gurtovoy *bad_wr = wr; 505738ca87c6SMax Gurtovoy goto out; 505838ca87c6SMax Gurtovoy } 505938ca87c6SMax Gurtovoy ctrl->imm = cpu_to_be32(mr->ibmr.rkey); 506038ca87c6SMax Gurtovoy /* UMR for sig MR */ 506138ca87c6SMax Gurtovoy err = set_pi_umr_wr(wr, qp, &seg, &size, 506238ca87c6SMax Gurtovoy &cur_edge); 506338ca87c6SMax Gurtovoy if (err) { 506438ca87c6SMax Gurtovoy mlx5_ib_warn(dev, "\n"); 506538ca87c6SMax Gurtovoy *bad_wr = wr; 506638ca87c6SMax Gurtovoy goto out; 506738ca87c6SMax Gurtovoy } 506838ca87c6SMax Gurtovoy finish_wqe(qp, ctrl, seg, size, cur_edge, idx, 506938ca87c6SMax Gurtovoy wr->wr_id, nreq, fence, 507038ca87c6SMax Gurtovoy MLX5_OPCODE_UMR); 507138ca87c6SMax Gurtovoy 507238ca87c6SMax Gurtovoy /* 507338ca87c6SMax Gurtovoy * SET_PSV WQEs are not signaled and solicited 507438ca87c6SMax Gurtovoy * on error 507538ca87c6SMax Gurtovoy */ 507638ca87c6SMax Gurtovoy sig_attrs = mr->ibmr.sig_attrs; 507738ca87c6SMax Gurtovoy err = __begin_wqe(qp, &seg, &ctrl, wr, &idx, 507838ca87c6SMax Gurtovoy &size, &cur_edge, nreq, false, 507938ca87c6SMax Gurtovoy true); 508038ca87c6SMax Gurtovoy if (err) { 508138ca87c6SMax Gurtovoy mlx5_ib_warn(dev, "\n"); 508238ca87c6SMax Gurtovoy err = -ENOMEM; 508338ca87c6SMax Gurtovoy *bad_wr = wr; 508438ca87c6SMax Gurtovoy goto out; 508538ca87c6SMax Gurtovoy } 508638ca87c6SMax Gurtovoy err = set_psv_wr(&sig_attrs->mem, 508738ca87c6SMax Gurtovoy mr->sig->psv_memory.psv_idx, 508838ca87c6SMax Gurtovoy &seg, &size); 508938ca87c6SMax Gurtovoy if (err) { 509038ca87c6SMax Gurtovoy mlx5_ib_warn(dev, "\n"); 509138ca87c6SMax Gurtovoy *bad_wr = wr; 509238ca87c6SMax Gurtovoy goto out; 509338ca87c6SMax Gurtovoy } 509438ca87c6SMax Gurtovoy finish_wqe(qp, ctrl, seg, size, cur_edge, idx, 509538ca87c6SMax Gurtovoy wr->wr_id, nreq, next_fence, 509638ca87c6SMax Gurtovoy MLX5_OPCODE_SET_PSV); 509738ca87c6SMax Gurtovoy 509838ca87c6SMax Gurtovoy err = __begin_wqe(qp, &seg, &ctrl, wr, &idx, 509938ca87c6SMax Gurtovoy &size, &cur_edge, nreq, false, 510038ca87c6SMax Gurtovoy true); 510138ca87c6SMax Gurtovoy if (err) { 510238ca87c6SMax Gurtovoy mlx5_ib_warn(dev, "\n"); 510338ca87c6SMax Gurtovoy err = -ENOMEM; 510438ca87c6SMax Gurtovoy *bad_wr = wr; 510538ca87c6SMax Gurtovoy goto out; 510638ca87c6SMax Gurtovoy } 510738ca87c6SMax Gurtovoy err = set_psv_wr(&sig_attrs->wire, 510838ca87c6SMax Gurtovoy mr->sig->psv_wire.psv_idx, 510938ca87c6SMax Gurtovoy &seg, &size); 511038ca87c6SMax Gurtovoy if (err) { 511138ca87c6SMax Gurtovoy mlx5_ib_warn(dev, "\n"); 511238ca87c6SMax Gurtovoy *bad_wr = wr; 511338ca87c6SMax Gurtovoy goto out; 511438ca87c6SMax Gurtovoy } 511538ca87c6SMax Gurtovoy finish_wqe(qp, ctrl, seg, size, cur_edge, idx, 511638ca87c6SMax Gurtovoy wr->wr_id, nreq, next_fence, 511738ca87c6SMax Gurtovoy MLX5_OPCODE_SET_PSV); 511838ca87c6SMax Gurtovoy 511938ca87c6SMax Gurtovoy qp->next_fence = 512038ca87c6SMax Gurtovoy MLX5_FENCE_MODE_INITIATOR_SMALL; 512138ca87c6SMax Gurtovoy num_sge = 0; 512238ca87c6SMax Gurtovoy goto skip_psv; 512338ca87c6SMax Gurtovoy 5124e126ba97SEli Cohen default: 5125e126ba97SEli Cohen break; 5126e126ba97SEli Cohen } 5127e126ba97SEli Cohen break; 5128e126ba97SEli Cohen 5129e126ba97SEli Cohen case IB_QPT_UC: 5130e126ba97SEli Cohen switch (wr->opcode) { 5131e126ba97SEli Cohen case IB_WR_RDMA_WRITE: 5132e126ba97SEli Cohen case IB_WR_RDMA_WRITE_WITH_IMM: 5133e622f2f4SChristoph Hellwig set_raddr_seg(seg, rdma_wr(wr)->remote_addr, 5134e622f2f4SChristoph Hellwig rdma_wr(wr)->rkey); 5135e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_raddr_seg); 5136e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_raddr_seg) / 16; 5137e126ba97SEli Cohen break; 5138e126ba97SEli Cohen 5139e126ba97SEli Cohen default: 5140e126ba97SEli Cohen break; 5141e126ba97SEli Cohen } 5142e126ba97SEli Cohen break; 5143e126ba97SEli Cohen 5144e126ba97SEli Cohen case IB_QPT_SMI: 51451e0e50b6SMaor Gottlieb if (unlikely(!mdev->port_caps[qp->port - 1].has_smi)) { 51461e0e50b6SMaor Gottlieb mlx5_ib_warn(dev, "Send SMP MADs is not allowed\n"); 51471e0e50b6SMaor Gottlieb err = -EPERM; 51481e0e50b6SMaor Gottlieb *bad_wr = wr; 51491e0e50b6SMaor Gottlieb goto out; 51501e0e50b6SMaor Gottlieb } 5151f6b1ee34SBart Van Assche /* fall through */ 5152d16e91daSHaggai Eran case MLX5_IB_QPT_HW_GSI: 5153e126ba97SEli Cohen set_datagram_seg(seg, wr); 5154e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_datagram_seg); 5155e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_datagram_seg) / 16; 515634f4c955SGuy Levi handle_post_send_edge(&qp->sq, &seg, size, &cur_edge); 515734f4c955SGuy Levi 5158e126ba97SEli Cohen break; 5159f0313965SErez Shitrit case IB_QPT_UD: 5160f0313965SErez Shitrit set_datagram_seg(seg, wr); 5161f0313965SErez Shitrit seg += sizeof(struct mlx5_wqe_datagram_seg); 5162f0313965SErez Shitrit size += sizeof(struct mlx5_wqe_datagram_seg) / 16; 516334f4c955SGuy Levi handle_post_send_edge(&qp->sq, &seg, size, &cur_edge); 5164f0313965SErez Shitrit 5165f0313965SErez Shitrit /* handle qp that supports ud offload */ 5166f0313965SErez Shitrit if (qp->flags & IB_QP_CREATE_IPOIB_UD_LSO) { 5167f0313965SErez Shitrit struct mlx5_wqe_eth_pad *pad; 5168f0313965SErez Shitrit 5169f0313965SErez Shitrit pad = seg; 5170f0313965SErez Shitrit memset(pad, 0, sizeof(struct mlx5_wqe_eth_pad)); 5171f0313965SErez Shitrit seg += sizeof(struct mlx5_wqe_eth_pad); 5172f0313965SErez Shitrit size += sizeof(struct mlx5_wqe_eth_pad) / 16; 517334f4c955SGuy Levi set_eth_seg(wr, qp, &seg, &size, &cur_edge); 517434f4c955SGuy Levi handle_post_send_edge(&qp->sq, &seg, size, 517534f4c955SGuy Levi &cur_edge); 5176f0313965SErez Shitrit } 5177f0313965SErez Shitrit break; 5178e126ba97SEli Cohen case MLX5_IB_QPT_REG_UMR: 5179e126ba97SEli Cohen if (wr->opcode != MLX5_IB_WR_UMR) { 5180e126ba97SEli Cohen err = -EINVAL; 5181e126ba97SEli Cohen mlx5_ib_warn(dev, "bad opcode\n"); 5182e126ba97SEli Cohen goto out; 5183e126ba97SEli Cohen } 5184e126ba97SEli Cohen qp->sq.wr_data[idx] = MLX5_IB_WR_UMR; 5185e622f2f4SChristoph Hellwig ctrl->imm = cpu_to_be32(umr_wr(wr)->mkey); 5186c8d75a98SMajd Dibbiny err = set_reg_umr_segment(dev, seg, wr, !!(MLX5_CAP_GEN(mdev, atomic))); 5187c8d75a98SMajd Dibbiny if (unlikely(err)) 5188c8d75a98SMajd Dibbiny goto out; 5189e126ba97SEli Cohen seg += sizeof(struct mlx5_wqe_umr_ctrl_seg); 5190e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16; 519134f4c955SGuy Levi handle_post_send_edge(&qp->sq, &seg, size, &cur_edge); 5192e126ba97SEli Cohen set_reg_mkey_segment(seg, wr); 5193e126ba97SEli Cohen seg += sizeof(struct mlx5_mkey_seg); 5194e126ba97SEli Cohen size += sizeof(struct mlx5_mkey_seg) / 16; 519534f4c955SGuy Levi handle_post_send_edge(&qp->sq, &seg, size, &cur_edge); 5196e126ba97SEli Cohen break; 5197e126ba97SEli Cohen 5198e126ba97SEli Cohen default: 5199e126ba97SEli Cohen break; 5200e126ba97SEli Cohen } 5201e126ba97SEli Cohen 5202e126ba97SEli Cohen if (wr->send_flags & IB_SEND_INLINE && num_sge) { 520334f4c955SGuy Levi err = set_data_inl_seg(qp, wr, &seg, &size, &cur_edge); 5204e126ba97SEli Cohen if (unlikely(err)) { 5205e126ba97SEli Cohen mlx5_ib_warn(dev, "\n"); 5206e126ba97SEli Cohen *bad_wr = wr; 5207e126ba97SEli Cohen goto out; 5208e126ba97SEli Cohen } 5209e126ba97SEli Cohen } else { 5210e126ba97SEli Cohen for (i = 0; i < num_sge; i++) { 521134f4c955SGuy Levi handle_post_send_edge(&qp->sq, &seg, size, 521234f4c955SGuy Levi &cur_edge); 5213e126ba97SEli Cohen if (likely(wr->sg_list[i].length)) { 521434f4c955SGuy Levi set_data_ptr_seg 521534f4c955SGuy Levi ((struct mlx5_wqe_data_seg *)seg, 521634f4c955SGuy Levi wr->sg_list + i); 5217e126ba97SEli Cohen size += sizeof(struct mlx5_wqe_data_seg) / 16; 521834f4c955SGuy Levi seg += sizeof(struct mlx5_wqe_data_seg); 5219e126ba97SEli Cohen } 5220e126ba97SEli Cohen } 5221e126ba97SEli Cohen } 5222e126ba97SEli Cohen 52236e8484c5SMax Gurtovoy qp->next_fence = next_fence; 522434f4c955SGuy Levi finish_wqe(qp, ctrl, seg, size, cur_edge, idx, wr->wr_id, nreq, 522534f4c955SGuy Levi fence, mlx5_ib_opcode[wr->opcode]); 5226e6631814SSagi Grimberg skip_psv: 5227e126ba97SEli Cohen if (0) 5228e126ba97SEli Cohen dump_wqe(qp, idx, size); 5229e126ba97SEli Cohen } 5230e126ba97SEli Cohen 5231e126ba97SEli Cohen out: 5232e126ba97SEli Cohen if (likely(nreq)) { 5233e126ba97SEli Cohen qp->sq.head += nreq; 5234e126ba97SEli Cohen 5235e126ba97SEli Cohen /* Make sure that descriptors are written before 5236e126ba97SEli Cohen * updating doorbell record and ringing the doorbell 5237e126ba97SEli Cohen */ 5238e126ba97SEli Cohen wmb(); 5239e126ba97SEli Cohen 5240e126ba97SEli Cohen qp->db.db[MLX5_SND_DBR] = cpu_to_be32(qp->sq.cur_post); 5241e126ba97SEli Cohen 5242ada388f7SEli Cohen /* Make sure doorbell record is visible to the HCA before 5243ada388f7SEli Cohen * we hit doorbell */ 5244ada388f7SEli Cohen wmb(); 5245ada388f7SEli Cohen 52465fe9dec0SEli Cohen /* currently we support only regular doorbells */ 5247bbf29f61SMaxim Mikityanskiy mlx5_write64((__be32 *)ctrl, bf->bfreg->map + bf->offset); 5248e126ba97SEli Cohen /* Make sure doorbells don't leak out of SQ spinlock 5249e126ba97SEli Cohen * and reach the HCA out of order. 5250e126ba97SEli Cohen */ 5251e126ba97SEli Cohen bf->offset ^= bf->buf_size; 5252e126ba97SEli Cohen } 5253e126ba97SEli Cohen 5254e126ba97SEli Cohen spin_unlock_irqrestore(&qp->sq.lock, flags); 5255e126ba97SEli Cohen 5256e126ba97SEli Cohen return err; 5257e126ba97SEli Cohen } 5258e126ba97SEli Cohen 5259d34ac5cdSBart Van Assche int mlx5_ib_post_send(struct ib_qp *ibqp, const struct ib_send_wr *wr, 5260d34ac5cdSBart Van Assche const struct ib_send_wr **bad_wr) 5261d0e84c0aSYishai Hadas { 5262d0e84c0aSYishai Hadas return _mlx5_ib_post_send(ibqp, wr, bad_wr, false); 5263d0e84c0aSYishai Hadas } 5264d0e84c0aSYishai Hadas 5265e126ba97SEli Cohen static void set_sig_seg(struct mlx5_rwqe_sig *sig, int size) 5266e126ba97SEli Cohen { 5267e126ba97SEli Cohen sig->signature = calc_sig(sig, size); 5268e126ba97SEli Cohen } 5269e126ba97SEli Cohen 5270d34ac5cdSBart Van Assche static int _mlx5_ib_post_recv(struct ib_qp *ibqp, const struct ib_recv_wr *wr, 5271d34ac5cdSBart Van Assche const struct ib_recv_wr **bad_wr, bool drain) 5272e126ba97SEli Cohen { 5273e126ba97SEli Cohen struct mlx5_ib_qp *qp = to_mqp(ibqp); 5274e126ba97SEli Cohen struct mlx5_wqe_data_seg *scat; 5275e126ba97SEli Cohen struct mlx5_rwqe_sig *sig; 527689ea94a7SMaor Gottlieb struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 527789ea94a7SMaor Gottlieb struct mlx5_core_dev *mdev = dev->mdev; 5278e126ba97SEli Cohen unsigned long flags; 5279e126ba97SEli Cohen int err = 0; 5280e126ba97SEli Cohen int nreq; 5281e126ba97SEli Cohen int ind; 5282e126ba97SEli Cohen int i; 5283e126ba97SEli Cohen 52846c75520fSParav Pandit if (unlikely(mdev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR && 52856c75520fSParav Pandit !drain)) { 52866c75520fSParav Pandit *bad_wr = wr; 52876c75520fSParav Pandit return -EIO; 52886c75520fSParav Pandit } 52896c75520fSParav Pandit 5290d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 5291d16e91daSHaggai Eran return mlx5_ib_gsi_post_recv(ibqp, wr, bad_wr); 5292d16e91daSHaggai Eran 5293e126ba97SEli Cohen spin_lock_irqsave(&qp->rq.lock, flags); 5294e126ba97SEli Cohen 5295e126ba97SEli Cohen ind = qp->rq.head & (qp->rq.wqe_cnt - 1); 5296e126ba97SEli Cohen 5297e126ba97SEli Cohen for (nreq = 0; wr; nreq++, wr = wr->next) { 5298e126ba97SEli Cohen if (mlx5_wq_overflow(&qp->rq, nreq, qp->ibqp.recv_cq)) { 5299e126ba97SEli Cohen err = -ENOMEM; 5300e126ba97SEli Cohen *bad_wr = wr; 5301e126ba97SEli Cohen goto out; 5302e126ba97SEli Cohen } 5303e126ba97SEli Cohen 5304e126ba97SEli Cohen if (unlikely(wr->num_sge > qp->rq.max_gs)) { 5305e126ba97SEli Cohen err = -EINVAL; 5306e126ba97SEli Cohen *bad_wr = wr; 5307e126ba97SEli Cohen goto out; 5308e126ba97SEli Cohen } 5309e126ba97SEli Cohen 531034f4c955SGuy Levi scat = mlx5_frag_buf_get_wqe(&qp->rq.fbc, ind); 5311e126ba97SEli Cohen if (qp->wq_sig) 5312e126ba97SEli Cohen scat++; 5313e126ba97SEli Cohen 5314e126ba97SEli Cohen for (i = 0; i < wr->num_sge; i++) 5315e126ba97SEli Cohen set_data_ptr_seg(scat + i, wr->sg_list + i); 5316e126ba97SEli Cohen 5317e126ba97SEli Cohen if (i < qp->rq.max_gs) { 5318e126ba97SEli Cohen scat[i].byte_count = 0; 5319e126ba97SEli Cohen scat[i].lkey = cpu_to_be32(MLX5_INVALID_LKEY); 5320e126ba97SEli Cohen scat[i].addr = 0; 5321e126ba97SEli Cohen } 5322e126ba97SEli Cohen 5323e126ba97SEli Cohen if (qp->wq_sig) { 5324e126ba97SEli Cohen sig = (struct mlx5_rwqe_sig *)scat; 5325e126ba97SEli Cohen set_sig_seg(sig, (qp->rq.max_gs + 1) << 2); 5326e126ba97SEli Cohen } 5327e126ba97SEli Cohen 5328e126ba97SEli Cohen qp->rq.wrid[ind] = wr->wr_id; 5329e126ba97SEli Cohen 5330e126ba97SEli Cohen ind = (ind + 1) & (qp->rq.wqe_cnt - 1); 5331e126ba97SEli Cohen } 5332e126ba97SEli Cohen 5333e126ba97SEli Cohen out: 5334e126ba97SEli Cohen if (likely(nreq)) { 5335e126ba97SEli Cohen qp->rq.head += nreq; 5336e126ba97SEli Cohen 5337e126ba97SEli Cohen /* Make sure that descriptors are written before 5338e126ba97SEli Cohen * doorbell record. 5339e126ba97SEli Cohen */ 5340e126ba97SEli Cohen wmb(); 5341e126ba97SEli Cohen 5342e126ba97SEli Cohen *qp->db.db = cpu_to_be32(qp->rq.head & 0xffff); 5343e126ba97SEli Cohen } 5344e126ba97SEli Cohen 5345e126ba97SEli Cohen spin_unlock_irqrestore(&qp->rq.lock, flags); 5346e126ba97SEli Cohen 5347e126ba97SEli Cohen return err; 5348e126ba97SEli Cohen } 5349e126ba97SEli Cohen 5350d34ac5cdSBart Van Assche int mlx5_ib_post_recv(struct ib_qp *ibqp, const struct ib_recv_wr *wr, 5351d34ac5cdSBart Van Assche const struct ib_recv_wr **bad_wr) 5352d0e84c0aSYishai Hadas { 5353d0e84c0aSYishai Hadas return _mlx5_ib_post_recv(ibqp, wr, bad_wr, false); 5354d0e84c0aSYishai Hadas } 5355d0e84c0aSYishai Hadas 5356e126ba97SEli Cohen static inline enum ib_qp_state to_ib_qp_state(enum mlx5_qp_state mlx5_state) 5357e126ba97SEli Cohen { 5358e126ba97SEli Cohen switch (mlx5_state) { 5359e126ba97SEli Cohen case MLX5_QP_STATE_RST: return IB_QPS_RESET; 5360e126ba97SEli Cohen case MLX5_QP_STATE_INIT: return IB_QPS_INIT; 5361e126ba97SEli Cohen case MLX5_QP_STATE_RTR: return IB_QPS_RTR; 5362e126ba97SEli Cohen case MLX5_QP_STATE_RTS: return IB_QPS_RTS; 5363e126ba97SEli Cohen case MLX5_QP_STATE_SQ_DRAINING: 5364e126ba97SEli Cohen case MLX5_QP_STATE_SQD: return IB_QPS_SQD; 5365e126ba97SEli Cohen case MLX5_QP_STATE_SQER: return IB_QPS_SQE; 5366e126ba97SEli Cohen case MLX5_QP_STATE_ERR: return IB_QPS_ERR; 5367e126ba97SEli Cohen default: return -1; 5368e126ba97SEli Cohen } 5369e126ba97SEli Cohen } 5370e126ba97SEli Cohen 5371e126ba97SEli Cohen static inline enum ib_mig_state to_ib_mig_state(int mlx5_mig_state) 5372e126ba97SEli Cohen { 5373e126ba97SEli Cohen switch (mlx5_mig_state) { 5374e126ba97SEli Cohen case MLX5_QP_PM_ARMED: return IB_MIG_ARMED; 5375e126ba97SEli Cohen case MLX5_QP_PM_REARM: return IB_MIG_REARM; 5376e126ba97SEli Cohen case MLX5_QP_PM_MIGRATED: return IB_MIG_MIGRATED; 5377e126ba97SEli Cohen default: return -1; 5378e126ba97SEli Cohen } 5379e126ba97SEli Cohen } 5380e126ba97SEli Cohen 5381e126ba97SEli Cohen static int to_ib_qp_access_flags(int mlx5_flags) 5382e126ba97SEli Cohen { 5383e126ba97SEli Cohen int ib_flags = 0; 5384e126ba97SEli Cohen 5385e126ba97SEli Cohen if (mlx5_flags & MLX5_QP_BIT_RRE) 5386e126ba97SEli Cohen ib_flags |= IB_ACCESS_REMOTE_READ; 5387e126ba97SEli Cohen if (mlx5_flags & MLX5_QP_BIT_RWE) 5388e126ba97SEli Cohen ib_flags |= IB_ACCESS_REMOTE_WRITE; 5389e126ba97SEli Cohen if (mlx5_flags & MLX5_QP_BIT_RAE) 5390e126ba97SEli Cohen ib_flags |= IB_ACCESS_REMOTE_ATOMIC; 5391e126ba97SEli Cohen 5392e126ba97SEli Cohen return ib_flags; 5393e126ba97SEli Cohen } 5394e126ba97SEli Cohen 539538349389SDasaratharaman Chandramouli static void to_rdma_ah_attr(struct mlx5_ib_dev *ibdev, 5396d8966fcdSDasaratharaman Chandramouli struct rdma_ah_attr *ah_attr, 5397e126ba97SEli Cohen struct mlx5_qp_path *path) 5398e126ba97SEli Cohen { 5399e126ba97SEli Cohen 5400d8966fcdSDasaratharaman Chandramouli memset(ah_attr, 0, sizeof(*ah_attr)); 5401e126ba97SEli Cohen 5402e7996a9aSJason Gunthorpe if (!path->port || path->port > ibdev->num_ports) 5403e126ba97SEli Cohen return; 5404e126ba97SEli Cohen 5405ae59c3f0SLeon Romanovsky ah_attr->type = rdma_ah_find_type(&ibdev->ib_dev, path->port); 5406ae59c3f0SLeon Romanovsky 5407d8966fcdSDasaratharaman Chandramouli rdma_ah_set_port_num(ah_attr, path->port); 5408d8966fcdSDasaratharaman Chandramouli rdma_ah_set_sl(ah_attr, path->dci_cfi_prio_sl & 0xf); 5409e126ba97SEli Cohen 5410d8966fcdSDasaratharaman Chandramouli rdma_ah_set_dlid(ah_attr, be16_to_cpu(path->rlid)); 5411d8966fcdSDasaratharaman Chandramouli rdma_ah_set_path_bits(ah_attr, path->grh_mlid & 0x7f); 5412d8966fcdSDasaratharaman Chandramouli rdma_ah_set_static_rate(ah_attr, 5413d8966fcdSDasaratharaman Chandramouli path->static_rate ? path->static_rate - 5 : 0); 5414d8966fcdSDasaratharaman Chandramouli if (path->grh_mlid & (1 << 7)) { 5415d8966fcdSDasaratharaman Chandramouli u32 tc_fl = be32_to_cpu(path->tclass_flowlabel); 5416d8966fcdSDasaratharaman Chandramouli 5417d8966fcdSDasaratharaman Chandramouli rdma_ah_set_grh(ah_attr, NULL, 5418d8966fcdSDasaratharaman Chandramouli tc_fl & 0xfffff, 5419d8966fcdSDasaratharaman Chandramouli path->mgid_index, 5420d8966fcdSDasaratharaman Chandramouli path->hop_limit, 5421d8966fcdSDasaratharaman Chandramouli (tc_fl >> 20) & 0xff); 5422d8966fcdSDasaratharaman Chandramouli rdma_ah_set_dgid_raw(ah_attr, path->rgid); 5423e126ba97SEli Cohen } 5424e126ba97SEli Cohen } 5425e126ba97SEli Cohen 54266d2f89dfSmajd@mellanox.com static int query_raw_packet_qp_sq_state(struct mlx5_ib_dev *dev, 54276d2f89dfSmajd@mellanox.com struct mlx5_ib_sq *sq, 54286d2f89dfSmajd@mellanox.com u8 *sq_state) 5429e126ba97SEli Cohen { 54306d2f89dfSmajd@mellanox.com int err; 54316d2f89dfSmajd@mellanox.com 543228160771SEran Ben Elisha err = mlx5_core_query_sq_state(dev->mdev, sq->base.mqp.qpn, sq_state); 54336d2f89dfSmajd@mellanox.com if (err) 54346d2f89dfSmajd@mellanox.com goto out; 54356d2f89dfSmajd@mellanox.com sq->state = *sq_state; 54366d2f89dfSmajd@mellanox.com 54376d2f89dfSmajd@mellanox.com out: 54386d2f89dfSmajd@mellanox.com return err; 54396d2f89dfSmajd@mellanox.com } 54406d2f89dfSmajd@mellanox.com 54416d2f89dfSmajd@mellanox.com static int query_raw_packet_qp_rq_state(struct mlx5_ib_dev *dev, 54426d2f89dfSmajd@mellanox.com struct mlx5_ib_rq *rq, 54436d2f89dfSmajd@mellanox.com u8 *rq_state) 54446d2f89dfSmajd@mellanox.com { 54456d2f89dfSmajd@mellanox.com void *out; 54466d2f89dfSmajd@mellanox.com void *rqc; 54476d2f89dfSmajd@mellanox.com int inlen; 54486d2f89dfSmajd@mellanox.com int err; 54496d2f89dfSmajd@mellanox.com 54506d2f89dfSmajd@mellanox.com inlen = MLX5_ST_SZ_BYTES(query_rq_out); 54511b9a07eeSLeon Romanovsky out = kvzalloc(inlen, GFP_KERNEL); 54526d2f89dfSmajd@mellanox.com if (!out) 54536d2f89dfSmajd@mellanox.com return -ENOMEM; 54546d2f89dfSmajd@mellanox.com 54556d2f89dfSmajd@mellanox.com err = mlx5_core_query_rq(dev->mdev, rq->base.mqp.qpn, out); 54566d2f89dfSmajd@mellanox.com if (err) 54576d2f89dfSmajd@mellanox.com goto out; 54586d2f89dfSmajd@mellanox.com 54596d2f89dfSmajd@mellanox.com rqc = MLX5_ADDR_OF(query_rq_out, out, rq_context); 54606d2f89dfSmajd@mellanox.com *rq_state = MLX5_GET(rqc, rqc, state); 54616d2f89dfSmajd@mellanox.com rq->state = *rq_state; 54626d2f89dfSmajd@mellanox.com 54636d2f89dfSmajd@mellanox.com out: 54646d2f89dfSmajd@mellanox.com kvfree(out); 54656d2f89dfSmajd@mellanox.com return err; 54666d2f89dfSmajd@mellanox.com } 54676d2f89dfSmajd@mellanox.com 54686d2f89dfSmajd@mellanox.com static int sqrq_state_to_qp_state(u8 sq_state, u8 rq_state, 54696d2f89dfSmajd@mellanox.com struct mlx5_ib_qp *qp, u8 *qp_state) 54706d2f89dfSmajd@mellanox.com { 54716d2f89dfSmajd@mellanox.com static const u8 sqrq_trans[MLX5_RQ_NUM_STATE][MLX5_SQ_NUM_STATE] = { 54726d2f89dfSmajd@mellanox.com [MLX5_RQC_STATE_RST] = { 54736d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = IB_QPS_RESET, 54746d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE_BAD, 54756d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = MLX5_QP_STATE_BAD, 54766d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = IB_QPS_RESET, 54776d2f89dfSmajd@mellanox.com }, 54786d2f89dfSmajd@mellanox.com [MLX5_RQC_STATE_RDY] = { 54796d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = MLX5_QP_STATE_BAD, 54806d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE, 54816d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = IB_QPS_SQE, 54826d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = MLX5_QP_STATE, 54836d2f89dfSmajd@mellanox.com }, 54846d2f89dfSmajd@mellanox.com [MLX5_RQC_STATE_ERR] = { 54856d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = MLX5_QP_STATE_BAD, 54866d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE_BAD, 54876d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = IB_QPS_ERR, 54886d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = IB_QPS_ERR, 54896d2f89dfSmajd@mellanox.com }, 54906d2f89dfSmajd@mellanox.com [MLX5_RQ_STATE_NA] = { 54916d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RST] = IB_QPS_RESET, 54926d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_RDY] = MLX5_QP_STATE, 54936d2f89dfSmajd@mellanox.com [MLX5_SQC_STATE_ERR] = MLX5_QP_STATE, 54946d2f89dfSmajd@mellanox.com [MLX5_SQ_STATE_NA] = MLX5_QP_STATE_BAD, 54956d2f89dfSmajd@mellanox.com }, 54966d2f89dfSmajd@mellanox.com }; 54976d2f89dfSmajd@mellanox.com 54986d2f89dfSmajd@mellanox.com *qp_state = sqrq_trans[rq_state][sq_state]; 54996d2f89dfSmajd@mellanox.com 55006d2f89dfSmajd@mellanox.com if (*qp_state == MLX5_QP_STATE_BAD) { 55016d2f89dfSmajd@mellanox.com WARN(1, "Buggy Raw Packet QP state, SQ 0x%x state: 0x%x, RQ 0x%x state: 0x%x", 55026d2f89dfSmajd@mellanox.com qp->raw_packet_qp.sq.base.mqp.qpn, sq_state, 55036d2f89dfSmajd@mellanox.com qp->raw_packet_qp.rq.base.mqp.qpn, rq_state); 55046d2f89dfSmajd@mellanox.com return -EINVAL; 55056d2f89dfSmajd@mellanox.com } 55066d2f89dfSmajd@mellanox.com 55076d2f89dfSmajd@mellanox.com if (*qp_state == MLX5_QP_STATE) 55086d2f89dfSmajd@mellanox.com *qp_state = qp->state; 55096d2f89dfSmajd@mellanox.com 55106d2f89dfSmajd@mellanox.com return 0; 55116d2f89dfSmajd@mellanox.com } 55126d2f89dfSmajd@mellanox.com 55136d2f89dfSmajd@mellanox.com static int query_raw_packet_qp_state(struct mlx5_ib_dev *dev, 55146d2f89dfSmajd@mellanox.com struct mlx5_ib_qp *qp, 55156d2f89dfSmajd@mellanox.com u8 *raw_packet_qp_state) 55166d2f89dfSmajd@mellanox.com { 55176d2f89dfSmajd@mellanox.com struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp; 55186d2f89dfSmajd@mellanox.com struct mlx5_ib_sq *sq = &raw_packet_qp->sq; 55196d2f89dfSmajd@mellanox.com struct mlx5_ib_rq *rq = &raw_packet_qp->rq; 55206d2f89dfSmajd@mellanox.com int err; 55216d2f89dfSmajd@mellanox.com u8 sq_state = MLX5_SQ_STATE_NA; 55226d2f89dfSmajd@mellanox.com u8 rq_state = MLX5_RQ_STATE_NA; 55236d2f89dfSmajd@mellanox.com 55246d2f89dfSmajd@mellanox.com if (qp->sq.wqe_cnt) { 55256d2f89dfSmajd@mellanox.com err = query_raw_packet_qp_sq_state(dev, sq, &sq_state); 55266d2f89dfSmajd@mellanox.com if (err) 55276d2f89dfSmajd@mellanox.com return err; 55286d2f89dfSmajd@mellanox.com } 55296d2f89dfSmajd@mellanox.com 55306d2f89dfSmajd@mellanox.com if (qp->rq.wqe_cnt) { 55316d2f89dfSmajd@mellanox.com err = query_raw_packet_qp_rq_state(dev, rq, &rq_state); 55326d2f89dfSmajd@mellanox.com if (err) 55336d2f89dfSmajd@mellanox.com return err; 55346d2f89dfSmajd@mellanox.com } 55356d2f89dfSmajd@mellanox.com 55366d2f89dfSmajd@mellanox.com return sqrq_state_to_qp_state(sq_state, rq_state, qp, 55376d2f89dfSmajd@mellanox.com raw_packet_qp_state); 55386d2f89dfSmajd@mellanox.com } 55396d2f89dfSmajd@mellanox.com 55406d2f89dfSmajd@mellanox.com static int query_qp_attr(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 55416d2f89dfSmajd@mellanox.com struct ib_qp_attr *qp_attr) 55426d2f89dfSmajd@mellanox.com { 554309a7d9ecSSaeed Mahameed int outlen = MLX5_ST_SZ_BYTES(query_qp_out); 5544e126ba97SEli Cohen struct mlx5_qp_context *context; 5545e126ba97SEli Cohen int mlx5_state; 554609a7d9ecSSaeed Mahameed u32 *outb; 5547e126ba97SEli Cohen int err = 0; 5548e126ba97SEli Cohen 554909a7d9ecSSaeed Mahameed outb = kzalloc(outlen, GFP_KERNEL); 55506d2f89dfSmajd@mellanox.com if (!outb) 55516d2f89dfSmajd@mellanox.com return -ENOMEM; 55526d2f89dfSmajd@mellanox.com 555319098df2Smajd@mellanox.com err = mlx5_core_qp_query(dev->mdev, &qp->trans_qp.base.mqp, outb, 555409a7d9ecSSaeed Mahameed outlen); 5555e126ba97SEli Cohen if (err) 55566d2f89dfSmajd@mellanox.com goto out; 5557e126ba97SEli Cohen 555809a7d9ecSSaeed Mahameed /* FIXME: use MLX5_GET rather than mlx5_qp_context manual struct */ 555909a7d9ecSSaeed Mahameed context = (struct mlx5_qp_context *)MLX5_ADDR_OF(query_qp_out, outb, qpc); 556009a7d9ecSSaeed Mahameed 5561e126ba97SEli Cohen mlx5_state = be32_to_cpu(context->flags) >> 28; 5562e126ba97SEli Cohen 5563e126ba97SEli Cohen qp->state = to_ib_qp_state(mlx5_state); 5564e126ba97SEli Cohen qp_attr->path_mtu = context->mtu_msgmax >> 5; 5565e126ba97SEli Cohen qp_attr->path_mig_state = 5566e126ba97SEli Cohen to_ib_mig_state((be32_to_cpu(context->flags) >> 11) & 0x3); 5567e126ba97SEli Cohen qp_attr->qkey = be32_to_cpu(context->qkey); 5568e126ba97SEli Cohen qp_attr->rq_psn = be32_to_cpu(context->rnr_nextrecvpsn) & 0xffffff; 5569e126ba97SEli Cohen qp_attr->sq_psn = be32_to_cpu(context->next_send_psn) & 0xffffff; 5570e126ba97SEli Cohen qp_attr->dest_qp_num = be32_to_cpu(context->log_pg_sz_remote_qpn) & 0xffffff; 5571e126ba97SEli Cohen qp_attr->qp_access_flags = 5572e126ba97SEli Cohen to_ib_qp_access_flags(be32_to_cpu(context->params2)); 5573e126ba97SEli Cohen 5574e126ba97SEli Cohen if (qp->ibqp.qp_type == IB_QPT_RC || qp->ibqp.qp_type == IB_QPT_UC) { 557538349389SDasaratharaman Chandramouli to_rdma_ah_attr(dev, &qp_attr->ah_attr, &context->pri_path); 557638349389SDasaratharaman Chandramouli to_rdma_ah_attr(dev, &qp_attr->alt_ah_attr, &context->alt_path); 5577d3ae2bdeSNoa Osherovich qp_attr->alt_pkey_index = 5578d3ae2bdeSNoa Osherovich be16_to_cpu(context->alt_path.pkey_index); 5579d8966fcdSDasaratharaman Chandramouli qp_attr->alt_port_num = 5580d8966fcdSDasaratharaman Chandramouli rdma_ah_get_port_num(&qp_attr->alt_ah_attr); 5581e126ba97SEli Cohen } 5582e126ba97SEli Cohen 5583d3ae2bdeSNoa Osherovich qp_attr->pkey_index = be16_to_cpu(context->pri_path.pkey_index); 5584e126ba97SEli Cohen qp_attr->port_num = context->pri_path.port; 5585e126ba97SEli Cohen 5586e126ba97SEli Cohen /* qp_attr->en_sqd_async_notify is only applicable in modify qp */ 5587e126ba97SEli Cohen qp_attr->sq_draining = mlx5_state == MLX5_QP_STATE_SQ_DRAINING; 5588e126ba97SEli Cohen 5589e126ba97SEli Cohen qp_attr->max_rd_atomic = 1 << ((be32_to_cpu(context->params1) >> 21) & 0x7); 5590e126ba97SEli Cohen 5591e126ba97SEli Cohen qp_attr->max_dest_rd_atomic = 5592e126ba97SEli Cohen 1 << ((be32_to_cpu(context->params2) >> 21) & 0x7); 5593e126ba97SEli Cohen qp_attr->min_rnr_timer = 5594e126ba97SEli Cohen (be32_to_cpu(context->rnr_nextrecvpsn) >> 24) & 0x1f; 5595e126ba97SEli Cohen qp_attr->timeout = context->pri_path.ackto_lt >> 3; 5596e126ba97SEli Cohen qp_attr->retry_cnt = (be32_to_cpu(context->params1) >> 16) & 0x7; 5597e126ba97SEli Cohen qp_attr->rnr_retry = (be32_to_cpu(context->params1) >> 13) & 0x7; 5598e126ba97SEli Cohen qp_attr->alt_timeout = context->alt_path.ackto_lt >> 3; 55996d2f89dfSmajd@mellanox.com 56006d2f89dfSmajd@mellanox.com out: 56016d2f89dfSmajd@mellanox.com kfree(outb); 56026d2f89dfSmajd@mellanox.com return err; 56036d2f89dfSmajd@mellanox.com } 56046d2f89dfSmajd@mellanox.com 5605776a3906SMoni Shoua static int mlx5_ib_dct_query_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *mqp, 5606776a3906SMoni Shoua struct ib_qp_attr *qp_attr, int qp_attr_mask, 5607776a3906SMoni Shoua struct ib_qp_init_attr *qp_init_attr) 5608776a3906SMoni Shoua { 5609776a3906SMoni Shoua struct mlx5_core_dct *dct = &mqp->dct.mdct; 5610776a3906SMoni Shoua u32 *out; 5611776a3906SMoni Shoua u32 access_flags = 0; 5612776a3906SMoni Shoua int outlen = MLX5_ST_SZ_BYTES(query_dct_out); 5613776a3906SMoni Shoua void *dctc; 5614776a3906SMoni Shoua int err; 5615776a3906SMoni Shoua int supported_mask = IB_QP_STATE | 5616776a3906SMoni Shoua IB_QP_ACCESS_FLAGS | 5617776a3906SMoni Shoua IB_QP_PORT | 5618776a3906SMoni Shoua IB_QP_MIN_RNR_TIMER | 5619776a3906SMoni Shoua IB_QP_AV | 5620776a3906SMoni Shoua IB_QP_PATH_MTU | 5621776a3906SMoni Shoua IB_QP_PKEY_INDEX; 5622776a3906SMoni Shoua 5623776a3906SMoni Shoua if (qp_attr_mask & ~supported_mask) 5624776a3906SMoni Shoua return -EINVAL; 5625776a3906SMoni Shoua if (mqp->state != IB_QPS_RTR) 5626776a3906SMoni Shoua return -EINVAL; 5627776a3906SMoni Shoua 5628776a3906SMoni Shoua out = kzalloc(outlen, GFP_KERNEL); 5629776a3906SMoni Shoua if (!out) 5630776a3906SMoni Shoua return -ENOMEM; 5631776a3906SMoni Shoua 5632776a3906SMoni Shoua err = mlx5_core_dct_query(dev->mdev, dct, out, outlen); 5633776a3906SMoni Shoua if (err) 5634776a3906SMoni Shoua goto out; 5635776a3906SMoni Shoua 5636776a3906SMoni Shoua dctc = MLX5_ADDR_OF(query_dct_out, out, dct_context_entry); 5637776a3906SMoni Shoua 5638776a3906SMoni Shoua if (qp_attr_mask & IB_QP_STATE) 5639776a3906SMoni Shoua qp_attr->qp_state = IB_QPS_RTR; 5640776a3906SMoni Shoua 5641776a3906SMoni Shoua if (qp_attr_mask & IB_QP_ACCESS_FLAGS) { 5642776a3906SMoni Shoua if (MLX5_GET(dctc, dctc, rre)) 5643776a3906SMoni Shoua access_flags |= IB_ACCESS_REMOTE_READ; 5644776a3906SMoni Shoua if (MLX5_GET(dctc, dctc, rwe)) 5645776a3906SMoni Shoua access_flags |= IB_ACCESS_REMOTE_WRITE; 5646776a3906SMoni Shoua if (MLX5_GET(dctc, dctc, rae)) 5647776a3906SMoni Shoua access_flags |= IB_ACCESS_REMOTE_ATOMIC; 5648776a3906SMoni Shoua qp_attr->qp_access_flags = access_flags; 5649776a3906SMoni Shoua } 5650776a3906SMoni Shoua 5651776a3906SMoni Shoua if (qp_attr_mask & IB_QP_PORT) 5652776a3906SMoni Shoua qp_attr->port_num = MLX5_GET(dctc, dctc, port); 5653776a3906SMoni Shoua if (qp_attr_mask & IB_QP_MIN_RNR_TIMER) 5654776a3906SMoni Shoua qp_attr->min_rnr_timer = MLX5_GET(dctc, dctc, min_rnr_nak); 5655776a3906SMoni Shoua if (qp_attr_mask & IB_QP_AV) { 5656776a3906SMoni Shoua qp_attr->ah_attr.grh.traffic_class = MLX5_GET(dctc, dctc, tclass); 5657776a3906SMoni Shoua qp_attr->ah_attr.grh.flow_label = MLX5_GET(dctc, dctc, flow_label); 5658776a3906SMoni Shoua qp_attr->ah_attr.grh.sgid_index = MLX5_GET(dctc, dctc, my_addr_index); 5659776a3906SMoni Shoua qp_attr->ah_attr.grh.hop_limit = MLX5_GET(dctc, dctc, hop_limit); 5660776a3906SMoni Shoua } 5661776a3906SMoni Shoua if (qp_attr_mask & IB_QP_PATH_MTU) 5662776a3906SMoni Shoua qp_attr->path_mtu = MLX5_GET(dctc, dctc, mtu); 5663776a3906SMoni Shoua if (qp_attr_mask & IB_QP_PKEY_INDEX) 5664776a3906SMoni Shoua qp_attr->pkey_index = MLX5_GET(dctc, dctc, pkey_index); 5665776a3906SMoni Shoua out: 5666776a3906SMoni Shoua kfree(out); 5667776a3906SMoni Shoua return err; 5668776a3906SMoni Shoua } 5669776a3906SMoni Shoua 56706d2f89dfSmajd@mellanox.com int mlx5_ib_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *qp_attr, 56716d2f89dfSmajd@mellanox.com int qp_attr_mask, struct ib_qp_init_attr *qp_init_attr) 56726d2f89dfSmajd@mellanox.com { 56736d2f89dfSmajd@mellanox.com struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 56746d2f89dfSmajd@mellanox.com struct mlx5_ib_qp *qp = to_mqp(ibqp); 56756d2f89dfSmajd@mellanox.com int err = 0; 56766d2f89dfSmajd@mellanox.com u8 raw_packet_qp_state; 56776d2f89dfSmajd@mellanox.com 567828d61370SYishai Hadas if (ibqp->rwq_ind_tbl) 567928d61370SYishai Hadas return -ENOSYS; 568028d61370SYishai Hadas 5681d16e91daSHaggai Eran if (unlikely(ibqp->qp_type == IB_QPT_GSI)) 5682d16e91daSHaggai Eran return mlx5_ib_gsi_query_qp(ibqp, qp_attr, qp_attr_mask, 5683d16e91daSHaggai Eran qp_init_attr); 5684d16e91daSHaggai Eran 5685c2e53b2cSYishai Hadas /* Not all of output fields are applicable, make sure to zero them */ 5686c2e53b2cSYishai Hadas memset(qp_init_attr, 0, sizeof(*qp_init_attr)); 5687c2e53b2cSYishai Hadas memset(qp_attr, 0, sizeof(*qp_attr)); 5688c2e53b2cSYishai Hadas 5689776a3906SMoni Shoua if (unlikely(qp->qp_sub_type == MLX5_IB_QPT_DCT)) 5690776a3906SMoni Shoua return mlx5_ib_dct_query_qp(dev, qp, qp_attr, 5691776a3906SMoni Shoua qp_attr_mask, qp_init_attr); 5692776a3906SMoni Shoua 56936d2f89dfSmajd@mellanox.com mutex_lock(&qp->mutex); 56946d2f89dfSmajd@mellanox.com 5695c2e53b2cSYishai Hadas if (qp->ibqp.qp_type == IB_QPT_RAW_PACKET || 5696c2e53b2cSYishai Hadas qp->flags & MLX5_IB_QP_UNDERLAY) { 56976d2f89dfSmajd@mellanox.com err = query_raw_packet_qp_state(dev, qp, &raw_packet_qp_state); 56986d2f89dfSmajd@mellanox.com if (err) 56996d2f89dfSmajd@mellanox.com goto out; 57006d2f89dfSmajd@mellanox.com qp->state = raw_packet_qp_state; 57016d2f89dfSmajd@mellanox.com qp_attr->port_num = 1; 57026d2f89dfSmajd@mellanox.com } else { 57036d2f89dfSmajd@mellanox.com err = query_qp_attr(dev, qp, qp_attr); 57046d2f89dfSmajd@mellanox.com if (err) 57056d2f89dfSmajd@mellanox.com goto out; 57066d2f89dfSmajd@mellanox.com } 57076d2f89dfSmajd@mellanox.com 57086d2f89dfSmajd@mellanox.com qp_attr->qp_state = qp->state; 5709e126ba97SEli Cohen qp_attr->cur_qp_state = qp_attr->qp_state; 5710e126ba97SEli Cohen qp_attr->cap.max_recv_wr = qp->rq.wqe_cnt; 5711e126ba97SEli Cohen qp_attr->cap.max_recv_sge = qp->rq.max_gs; 5712e126ba97SEli Cohen 5713e126ba97SEli Cohen if (!ibqp->uobject) { 57140540d814SNoa Osherovich qp_attr->cap.max_send_wr = qp->sq.max_post; 5715e126ba97SEli Cohen qp_attr->cap.max_send_sge = qp->sq.max_gs; 57160540d814SNoa Osherovich qp_init_attr->qp_context = ibqp->qp_context; 5717e126ba97SEli Cohen } else { 5718e126ba97SEli Cohen qp_attr->cap.max_send_wr = 0; 5719e126ba97SEli Cohen qp_attr->cap.max_send_sge = 0; 5720e126ba97SEli Cohen } 5721e126ba97SEli Cohen 57220540d814SNoa Osherovich qp_init_attr->qp_type = ibqp->qp_type; 57230540d814SNoa Osherovich qp_init_attr->recv_cq = ibqp->recv_cq; 57240540d814SNoa Osherovich qp_init_attr->send_cq = ibqp->send_cq; 57250540d814SNoa Osherovich qp_init_attr->srq = ibqp->srq; 57260540d814SNoa Osherovich qp_attr->cap.max_inline_data = qp->max_inline_data; 5727e126ba97SEli Cohen 5728e126ba97SEli Cohen qp_init_attr->cap = qp_attr->cap; 5729e126ba97SEli Cohen 5730e126ba97SEli Cohen qp_init_attr->create_flags = 0; 5731e126ba97SEli Cohen if (qp->flags & MLX5_IB_QP_BLOCK_MULTICAST_LOOPBACK) 5732e126ba97SEli Cohen qp_init_attr->create_flags |= IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK; 5733e126ba97SEli Cohen 5734051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_CROSS_CHANNEL) 5735051f2630SLeon Romanovsky qp_init_attr->create_flags |= IB_QP_CREATE_CROSS_CHANNEL; 5736051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_MANAGED_SEND) 5737051f2630SLeon Romanovsky qp_init_attr->create_flags |= IB_QP_CREATE_MANAGED_SEND; 5738051f2630SLeon Romanovsky if (qp->flags & MLX5_IB_QP_MANAGED_RECV) 5739051f2630SLeon Romanovsky qp_init_attr->create_flags |= IB_QP_CREATE_MANAGED_RECV; 5740b11a4f9cSHaggai Eran if (qp->flags & MLX5_IB_QP_SQPN_QP1) 5741b11a4f9cSHaggai Eran qp_init_attr->create_flags |= mlx5_ib_create_qp_sqpn_qp1(); 5742051f2630SLeon Romanovsky 5743e126ba97SEli Cohen qp_init_attr->sq_sig_type = qp->sq_signal_bits & MLX5_WQE_CTRL_CQ_UPDATE ? 5744e126ba97SEli Cohen IB_SIGNAL_ALL_WR : IB_SIGNAL_REQ_WR; 5745e126ba97SEli Cohen 5746e126ba97SEli Cohen out: 5747e126ba97SEli Cohen mutex_unlock(&qp->mutex); 5748e126ba97SEli Cohen return err; 5749e126ba97SEli Cohen } 5750e126ba97SEli Cohen 5751e126ba97SEli Cohen struct ib_xrcd *mlx5_ib_alloc_xrcd(struct ib_device *ibdev, 5752e126ba97SEli Cohen struct ib_udata *udata) 5753e126ba97SEli Cohen { 5754e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(ibdev); 5755e126ba97SEli Cohen struct mlx5_ib_xrcd *xrcd; 5756e126ba97SEli Cohen int err; 5757e126ba97SEli Cohen 5758938fe83cSSaeed Mahameed if (!MLX5_CAP_GEN(dev->mdev, xrc)) 5759e126ba97SEli Cohen return ERR_PTR(-ENOSYS); 5760e126ba97SEli Cohen 5761e126ba97SEli Cohen xrcd = kmalloc(sizeof(*xrcd), GFP_KERNEL); 5762e126ba97SEli Cohen if (!xrcd) 5763e126ba97SEli Cohen return ERR_PTR(-ENOMEM); 5764e126ba97SEli Cohen 57655aa3771dSYishai Hadas err = mlx5_cmd_xrcd_alloc(dev->mdev, &xrcd->xrcdn, 0); 5766e126ba97SEli Cohen if (err) { 5767e126ba97SEli Cohen kfree(xrcd); 5768e126ba97SEli Cohen return ERR_PTR(-ENOMEM); 5769e126ba97SEli Cohen } 5770e126ba97SEli Cohen 5771e126ba97SEli Cohen return &xrcd->ibxrcd; 5772e126ba97SEli Cohen } 5773e126ba97SEli Cohen 5774c4367a26SShamir Rabinovitch int mlx5_ib_dealloc_xrcd(struct ib_xrcd *xrcd, struct ib_udata *udata) 5775e126ba97SEli Cohen { 5776e126ba97SEli Cohen struct mlx5_ib_dev *dev = to_mdev(xrcd->device); 5777e126ba97SEli Cohen u32 xrcdn = to_mxrcd(xrcd)->xrcdn; 5778e126ba97SEli Cohen int err; 5779e126ba97SEli Cohen 57805aa3771dSYishai Hadas err = mlx5_cmd_xrcd_dealloc(dev->mdev, xrcdn, 0); 5781b081808aSLeon Romanovsky if (err) 5782e126ba97SEli Cohen mlx5_ib_warn(dev, "failed to dealloc xrcdn 0x%x\n", xrcdn); 5783e126ba97SEli Cohen 5784e126ba97SEli Cohen kfree(xrcd); 5785e126ba97SEli Cohen return 0; 5786e126ba97SEli Cohen } 578779b20a6cSYishai Hadas 5788350d0e4cSYishai Hadas static void mlx5_ib_wq_event(struct mlx5_core_qp *core_qp, int type) 5789350d0e4cSYishai Hadas { 5790350d0e4cSYishai Hadas struct mlx5_ib_rwq *rwq = to_mibrwq(core_qp); 5791350d0e4cSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(rwq->ibwq.device); 5792350d0e4cSYishai Hadas struct ib_event event; 5793350d0e4cSYishai Hadas 5794350d0e4cSYishai Hadas if (rwq->ibwq.event_handler) { 5795350d0e4cSYishai Hadas event.device = rwq->ibwq.device; 5796350d0e4cSYishai Hadas event.element.wq = &rwq->ibwq; 5797350d0e4cSYishai Hadas switch (type) { 5798350d0e4cSYishai Hadas case MLX5_EVENT_TYPE_WQ_CATAS_ERROR: 5799350d0e4cSYishai Hadas event.event = IB_EVENT_WQ_FATAL; 5800350d0e4cSYishai Hadas break; 5801350d0e4cSYishai Hadas default: 5802350d0e4cSYishai Hadas mlx5_ib_warn(dev, "Unexpected event type %d on WQ %06x\n", type, core_qp->qpn); 5803350d0e4cSYishai Hadas return; 5804350d0e4cSYishai Hadas } 5805350d0e4cSYishai Hadas 5806350d0e4cSYishai Hadas rwq->ibwq.event_handler(&event, rwq->ibwq.wq_context); 5807350d0e4cSYishai Hadas } 5808350d0e4cSYishai Hadas } 5809350d0e4cSYishai Hadas 581003404e8aSMaor Gottlieb static int set_delay_drop(struct mlx5_ib_dev *dev) 581103404e8aSMaor Gottlieb { 581203404e8aSMaor Gottlieb int err = 0; 581303404e8aSMaor Gottlieb 581403404e8aSMaor Gottlieb mutex_lock(&dev->delay_drop.lock); 581503404e8aSMaor Gottlieb if (dev->delay_drop.activate) 581603404e8aSMaor Gottlieb goto out; 581703404e8aSMaor Gottlieb 581803404e8aSMaor Gottlieb err = mlx5_core_set_delay_drop(dev->mdev, dev->delay_drop.timeout); 581903404e8aSMaor Gottlieb if (err) 582003404e8aSMaor Gottlieb goto out; 582103404e8aSMaor Gottlieb 582203404e8aSMaor Gottlieb dev->delay_drop.activate = true; 582303404e8aSMaor Gottlieb out: 582403404e8aSMaor Gottlieb mutex_unlock(&dev->delay_drop.lock); 5825fe248c3aSMaor Gottlieb 5826fe248c3aSMaor Gottlieb if (!err) 5827fe248c3aSMaor Gottlieb atomic_inc(&dev->delay_drop.rqs_cnt); 582803404e8aSMaor Gottlieb return err; 582903404e8aSMaor Gottlieb } 583003404e8aSMaor Gottlieb 583179b20a6cSYishai Hadas static int create_rq(struct mlx5_ib_rwq *rwq, struct ib_pd *pd, 583279b20a6cSYishai Hadas struct ib_wq_init_attr *init_attr) 583379b20a6cSYishai Hadas { 583479b20a6cSYishai Hadas struct mlx5_ib_dev *dev; 58354be6da1eSNoa Osherovich int has_net_offloads; 583679b20a6cSYishai Hadas __be64 *rq_pas0; 583779b20a6cSYishai Hadas void *in; 583879b20a6cSYishai Hadas void *rqc; 583979b20a6cSYishai Hadas void *wq; 584079b20a6cSYishai Hadas int inlen; 584179b20a6cSYishai Hadas int err; 584279b20a6cSYishai Hadas 584379b20a6cSYishai Hadas dev = to_mdev(pd->device); 584479b20a6cSYishai Hadas 584579b20a6cSYishai Hadas inlen = MLX5_ST_SZ_BYTES(create_rq_in) + sizeof(u64) * rwq->rq_num_pas; 58461b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 584779b20a6cSYishai Hadas if (!in) 584879b20a6cSYishai Hadas return -ENOMEM; 584979b20a6cSYishai Hadas 585034d57585SYishai Hadas MLX5_SET(create_rq_in, in, uid, to_mpd(pd)->uid); 585179b20a6cSYishai Hadas rqc = MLX5_ADDR_OF(create_rq_in, in, ctx); 585279b20a6cSYishai Hadas MLX5_SET(rqc, rqc, mem_rq_type, 585379b20a6cSYishai Hadas MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE); 585479b20a6cSYishai Hadas MLX5_SET(rqc, rqc, user_index, rwq->user_index); 585579b20a6cSYishai Hadas MLX5_SET(rqc, rqc, cqn, to_mcq(init_attr->cq)->mcq.cqn); 585679b20a6cSYishai Hadas MLX5_SET(rqc, rqc, state, MLX5_RQC_STATE_RST); 585779b20a6cSYishai Hadas MLX5_SET(rqc, rqc, flush_in_error_en, 1); 585879b20a6cSYishai Hadas wq = MLX5_ADDR_OF(rqc, rqc, wq); 5859ccc87087SNoa Osherovich MLX5_SET(wq, wq, wq_type, 5860ccc87087SNoa Osherovich rwq->create_flags & MLX5_IB_WQ_FLAGS_STRIDING_RQ ? 5861ccc87087SNoa Osherovich MLX5_WQ_TYPE_CYCLIC_STRIDING_RQ : MLX5_WQ_TYPE_CYCLIC); 5862b1383aa6SNoa Osherovich if (init_attr->create_flags & IB_WQ_FLAGS_PCI_WRITE_END_PADDING) { 5863b1383aa6SNoa Osherovich if (!MLX5_CAP_GEN(dev->mdev, end_pad)) { 5864b1383aa6SNoa Osherovich mlx5_ib_dbg(dev, "Scatter end padding is not supported\n"); 5865b1383aa6SNoa Osherovich err = -EOPNOTSUPP; 5866b1383aa6SNoa Osherovich goto out; 5867b1383aa6SNoa Osherovich } else { 586879b20a6cSYishai Hadas MLX5_SET(wq, wq, end_padding_mode, MLX5_WQ_END_PAD_MODE_ALIGN); 5869b1383aa6SNoa Osherovich } 5870b1383aa6SNoa Osherovich } 587179b20a6cSYishai Hadas MLX5_SET(wq, wq, log_wq_stride, rwq->log_rq_stride); 5872ccc87087SNoa Osherovich if (rwq->create_flags & MLX5_IB_WQ_FLAGS_STRIDING_RQ) { 5873ccc87087SNoa Osherovich MLX5_SET(wq, wq, two_byte_shift_en, rwq->two_byte_shift_en); 5874ccc87087SNoa Osherovich MLX5_SET(wq, wq, log_wqe_stride_size, 5875ccc87087SNoa Osherovich rwq->single_stride_log_num_of_bytes - 5876ccc87087SNoa Osherovich MLX5_MIN_SINGLE_STRIDE_LOG_NUM_BYTES); 5877ccc87087SNoa Osherovich MLX5_SET(wq, wq, log_wqe_num_of_strides, rwq->log_num_strides - 5878ccc87087SNoa Osherovich MLX5_MIN_SINGLE_WQE_LOG_NUM_STRIDES); 5879ccc87087SNoa Osherovich } 588079b20a6cSYishai Hadas MLX5_SET(wq, wq, log_wq_sz, rwq->log_rq_size); 588179b20a6cSYishai Hadas MLX5_SET(wq, wq, pd, to_mpd(pd)->pdn); 588279b20a6cSYishai Hadas MLX5_SET(wq, wq, page_offset, rwq->rq_page_offset); 588379b20a6cSYishai Hadas MLX5_SET(wq, wq, log_wq_pg_sz, rwq->log_page_size); 588479b20a6cSYishai Hadas MLX5_SET(wq, wq, wq_signature, rwq->wq_sig); 588579b20a6cSYishai Hadas MLX5_SET64(wq, wq, dbr_addr, rwq->db.dma); 58864be6da1eSNoa Osherovich has_net_offloads = MLX5_CAP_GEN(dev->mdev, eth_net_offloads); 5887b1f74a84SNoa Osherovich if (init_attr->create_flags & IB_WQ_FLAGS_CVLAN_STRIPPING) { 58884be6da1eSNoa Osherovich if (!(has_net_offloads && MLX5_CAP_ETH(dev->mdev, vlan_cap))) { 5889b1f74a84SNoa Osherovich mlx5_ib_dbg(dev, "VLAN offloads are not supported\n"); 5890b1f74a84SNoa Osherovich err = -EOPNOTSUPP; 5891b1f74a84SNoa Osherovich goto out; 5892b1f74a84SNoa Osherovich } 5893b1f74a84SNoa Osherovich } else { 5894b1f74a84SNoa Osherovich MLX5_SET(rqc, rqc, vsd, 1); 5895b1f74a84SNoa Osherovich } 58964be6da1eSNoa Osherovich if (init_attr->create_flags & IB_WQ_FLAGS_SCATTER_FCS) { 58974be6da1eSNoa Osherovich if (!(has_net_offloads && MLX5_CAP_ETH(dev->mdev, scatter_fcs))) { 58984be6da1eSNoa Osherovich mlx5_ib_dbg(dev, "Scatter FCS is not supported\n"); 58994be6da1eSNoa Osherovich err = -EOPNOTSUPP; 59004be6da1eSNoa Osherovich goto out; 59014be6da1eSNoa Osherovich } 59024be6da1eSNoa Osherovich MLX5_SET(rqc, rqc, scatter_fcs, 1); 59034be6da1eSNoa Osherovich } 590403404e8aSMaor Gottlieb if (init_attr->create_flags & IB_WQ_FLAGS_DELAY_DROP) { 590503404e8aSMaor Gottlieb if (!(dev->ib_dev.attrs.raw_packet_caps & 590603404e8aSMaor Gottlieb IB_RAW_PACKET_CAP_DELAY_DROP)) { 590703404e8aSMaor Gottlieb mlx5_ib_dbg(dev, "Delay drop is not supported\n"); 590803404e8aSMaor Gottlieb err = -EOPNOTSUPP; 590903404e8aSMaor Gottlieb goto out; 591003404e8aSMaor Gottlieb } 591103404e8aSMaor Gottlieb MLX5_SET(rqc, rqc, delay_drop_en, 1); 591203404e8aSMaor Gottlieb } 591379b20a6cSYishai Hadas rq_pas0 = (__be64 *)MLX5_ADDR_OF(wq, wq, pas); 591479b20a6cSYishai Hadas mlx5_ib_populate_pas(dev, rwq->umem, rwq->page_shift, rq_pas0, 0); 5915350d0e4cSYishai Hadas err = mlx5_core_create_rq_tracked(dev->mdev, in, inlen, &rwq->core_qp); 591603404e8aSMaor Gottlieb if (!err && init_attr->create_flags & IB_WQ_FLAGS_DELAY_DROP) { 591703404e8aSMaor Gottlieb err = set_delay_drop(dev); 591803404e8aSMaor Gottlieb if (err) { 591903404e8aSMaor Gottlieb mlx5_ib_warn(dev, "Failed to enable delay drop err=%d\n", 592003404e8aSMaor Gottlieb err); 592103404e8aSMaor Gottlieb mlx5_core_destroy_rq_tracked(dev->mdev, &rwq->core_qp); 592203404e8aSMaor Gottlieb } else { 592303404e8aSMaor Gottlieb rwq->create_flags |= MLX5_IB_WQ_FLAGS_DELAY_DROP; 592403404e8aSMaor Gottlieb } 592503404e8aSMaor Gottlieb } 5926b1f74a84SNoa Osherovich out: 592779b20a6cSYishai Hadas kvfree(in); 592879b20a6cSYishai Hadas return err; 592979b20a6cSYishai Hadas } 593079b20a6cSYishai Hadas 593179b20a6cSYishai Hadas static int set_user_rq_size(struct mlx5_ib_dev *dev, 593279b20a6cSYishai Hadas struct ib_wq_init_attr *wq_init_attr, 593379b20a6cSYishai Hadas struct mlx5_ib_create_wq *ucmd, 593479b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq) 593579b20a6cSYishai Hadas { 593679b20a6cSYishai Hadas /* Sanity check RQ size before proceeding */ 593779b20a6cSYishai Hadas if (wq_init_attr->max_wr > (1 << MLX5_CAP_GEN(dev->mdev, log_max_wq_sz))) 593879b20a6cSYishai Hadas return -EINVAL; 593979b20a6cSYishai Hadas 594079b20a6cSYishai Hadas if (!ucmd->rq_wqe_count) 594179b20a6cSYishai Hadas return -EINVAL; 594279b20a6cSYishai Hadas 594379b20a6cSYishai Hadas rwq->wqe_count = ucmd->rq_wqe_count; 594479b20a6cSYishai Hadas rwq->wqe_shift = ucmd->rq_wqe_shift; 59450dfe4522SLeon Romanovsky if (check_shl_overflow(rwq->wqe_count, rwq->wqe_shift, &rwq->buf_size)) 59460dfe4522SLeon Romanovsky return -EINVAL; 59470dfe4522SLeon Romanovsky 594879b20a6cSYishai Hadas rwq->log_rq_stride = rwq->wqe_shift; 594979b20a6cSYishai Hadas rwq->log_rq_size = ilog2(rwq->wqe_count); 595079b20a6cSYishai Hadas return 0; 595179b20a6cSYishai Hadas } 595279b20a6cSYishai Hadas 595379b20a6cSYishai Hadas static int prepare_user_rq(struct ib_pd *pd, 595479b20a6cSYishai Hadas struct ib_wq_init_attr *init_attr, 595579b20a6cSYishai Hadas struct ib_udata *udata, 595679b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq) 595779b20a6cSYishai Hadas { 595879b20a6cSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(pd->device); 595979b20a6cSYishai Hadas struct mlx5_ib_create_wq ucmd = {}; 596079b20a6cSYishai Hadas int err; 596179b20a6cSYishai Hadas size_t required_cmd_sz; 596279b20a6cSYishai Hadas 5963ccc87087SNoa Osherovich required_cmd_sz = offsetof(typeof(ucmd), single_stride_log_num_of_bytes) 5964ccc87087SNoa Osherovich + sizeof(ucmd.single_stride_log_num_of_bytes); 596579b20a6cSYishai Hadas if (udata->inlen < required_cmd_sz) { 596679b20a6cSYishai Hadas mlx5_ib_dbg(dev, "invalid inlen\n"); 596779b20a6cSYishai Hadas return -EINVAL; 596879b20a6cSYishai Hadas } 596979b20a6cSYishai Hadas 597079b20a6cSYishai Hadas if (udata->inlen > sizeof(ucmd) && 597179b20a6cSYishai Hadas !ib_is_udata_cleared(udata, sizeof(ucmd), 597279b20a6cSYishai Hadas udata->inlen - sizeof(ucmd))) { 597379b20a6cSYishai Hadas mlx5_ib_dbg(dev, "inlen is not supported\n"); 597479b20a6cSYishai Hadas return -EOPNOTSUPP; 597579b20a6cSYishai Hadas } 597679b20a6cSYishai Hadas 597779b20a6cSYishai Hadas if (ib_copy_from_udata(&ucmd, udata, min(sizeof(ucmd), udata->inlen))) { 597879b20a6cSYishai Hadas mlx5_ib_dbg(dev, "copy failed\n"); 597979b20a6cSYishai Hadas return -EFAULT; 598079b20a6cSYishai Hadas } 598179b20a6cSYishai Hadas 5982ccc87087SNoa Osherovich if (ucmd.comp_mask & (~MLX5_IB_CREATE_WQ_STRIDING_RQ)) { 598379b20a6cSYishai Hadas mlx5_ib_dbg(dev, "invalid comp mask\n"); 598479b20a6cSYishai Hadas return -EOPNOTSUPP; 5985ccc87087SNoa Osherovich } else if (ucmd.comp_mask & MLX5_IB_CREATE_WQ_STRIDING_RQ) { 5986ccc87087SNoa Osherovich if (!MLX5_CAP_GEN(dev->mdev, striding_rq)) { 5987ccc87087SNoa Osherovich mlx5_ib_dbg(dev, "Striding RQ is not supported\n"); 598879b20a6cSYishai Hadas return -EOPNOTSUPP; 598979b20a6cSYishai Hadas } 5990ccc87087SNoa Osherovich if ((ucmd.single_stride_log_num_of_bytes < 5991ccc87087SNoa Osherovich MLX5_MIN_SINGLE_STRIDE_LOG_NUM_BYTES) || 5992ccc87087SNoa Osherovich (ucmd.single_stride_log_num_of_bytes > 5993ccc87087SNoa Osherovich MLX5_MAX_SINGLE_STRIDE_LOG_NUM_BYTES)) { 5994ccc87087SNoa Osherovich mlx5_ib_dbg(dev, "Invalid log stride size (%u. Range is %u - %u)\n", 5995ccc87087SNoa Osherovich ucmd.single_stride_log_num_of_bytes, 5996ccc87087SNoa Osherovich MLX5_MIN_SINGLE_STRIDE_LOG_NUM_BYTES, 5997ccc87087SNoa Osherovich MLX5_MAX_SINGLE_STRIDE_LOG_NUM_BYTES); 5998ccc87087SNoa Osherovich return -EINVAL; 5999ccc87087SNoa Osherovich } 6000ccc87087SNoa Osherovich if ((ucmd.single_wqe_log_num_of_strides > 6001ccc87087SNoa Osherovich MLX5_MAX_SINGLE_WQE_LOG_NUM_STRIDES) || 6002ccc87087SNoa Osherovich (ucmd.single_wqe_log_num_of_strides < 6003ccc87087SNoa Osherovich MLX5_MIN_SINGLE_WQE_LOG_NUM_STRIDES)) { 6004ccc87087SNoa Osherovich mlx5_ib_dbg(dev, "Invalid log num strides (%u. Range is %u - %u)\n", 6005ccc87087SNoa Osherovich ucmd.single_wqe_log_num_of_strides, 6006ccc87087SNoa Osherovich MLX5_MIN_SINGLE_WQE_LOG_NUM_STRIDES, 6007ccc87087SNoa Osherovich MLX5_MAX_SINGLE_WQE_LOG_NUM_STRIDES); 6008ccc87087SNoa Osherovich return -EINVAL; 6009ccc87087SNoa Osherovich } 6010ccc87087SNoa Osherovich rwq->single_stride_log_num_of_bytes = 6011ccc87087SNoa Osherovich ucmd.single_stride_log_num_of_bytes; 6012ccc87087SNoa Osherovich rwq->log_num_strides = ucmd.single_wqe_log_num_of_strides; 6013ccc87087SNoa Osherovich rwq->two_byte_shift_en = !!ucmd.two_byte_shift_en; 6014ccc87087SNoa Osherovich rwq->create_flags |= MLX5_IB_WQ_FLAGS_STRIDING_RQ; 6015ccc87087SNoa Osherovich } 601679b20a6cSYishai Hadas 601779b20a6cSYishai Hadas err = set_user_rq_size(dev, init_attr, &ucmd, rwq); 601879b20a6cSYishai Hadas if (err) { 601979b20a6cSYishai Hadas mlx5_ib_dbg(dev, "err %d\n", err); 602079b20a6cSYishai Hadas return err; 602179b20a6cSYishai Hadas } 602279b20a6cSYishai Hadas 6023b0ea0fa5SJason Gunthorpe err = create_user_rq(dev, pd, udata, rwq, &ucmd); 602479b20a6cSYishai Hadas if (err) { 602579b20a6cSYishai Hadas mlx5_ib_dbg(dev, "err %d\n", err); 602679b20a6cSYishai Hadas return err; 602779b20a6cSYishai Hadas } 602879b20a6cSYishai Hadas 602979b20a6cSYishai Hadas rwq->user_index = ucmd.user_index; 603079b20a6cSYishai Hadas return 0; 603179b20a6cSYishai Hadas } 603279b20a6cSYishai Hadas 603379b20a6cSYishai Hadas struct ib_wq *mlx5_ib_create_wq(struct ib_pd *pd, 603479b20a6cSYishai Hadas struct ib_wq_init_attr *init_attr, 603579b20a6cSYishai Hadas struct ib_udata *udata) 603679b20a6cSYishai Hadas { 603779b20a6cSYishai Hadas struct mlx5_ib_dev *dev; 603879b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq; 603979b20a6cSYishai Hadas struct mlx5_ib_create_wq_resp resp = {}; 604079b20a6cSYishai Hadas size_t min_resp_len; 604179b20a6cSYishai Hadas int err; 604279b20a6cSYishai Hadas 604379b20a6cSYishai Hadas if (!udata) 604479b20a6cSYishai Hadas return ERR_PTR(-ENOSYS); 604579b20a6cSYishai Hadas 604679b20a6cSYishai Hadas min_resp_len = offsetof(typeof(resp), reserved) + sizeof(resp.reserved); 604779b20a6cSYishai Hadas if (udata->outlen && udata->outlen < min_resp_len) 604879b20a6cSYishai Hadas return ERR_PTR(-EINVAL); 604979b20a6cSYishai Hadas 605079b20a6cSYishai Hadas dev = to_mdev(pd->device); 605179b20a6cSYishai Hadas switch (init_attr->wq_type) { 605279b20a6cSYishai Hadas case IB_WQT_RQ: 605379b20a6cSYishai Hadas rwq = kzalloc(sizeof(*rwq), GFP_KERNEL); 605479b20a6cSYishai Hadas if (!rwq) 605579b20a6cSYishai Hadas return ERR_PTR(-ENOMEM); 605679b20a6cSYishai Hadas err = prepare_user_rq(pd, init_attr, udata, rwq); 605779b20a6cSYishai Hadas if (err) 605879b20a6cSYishai Hadas goto err; 605979b20a6cSYishai Hadas err = create_rq(rwq, pd, init_attr); 606079b20a6cSYishai Hadas if (err) 606179b20a6cSYishai Hadas goto err_user_rq; 606279b20a6cSYishai Hadas break; 606379b20a6cSYishai Hadas default: 606479b20a6cSYishai Hadas mlx5_ib_dbg(dev, "unsupported wq type %d\n", 606579b20a6cSYishai Hadas init_attr->wq_type); 606679b20a6cSYishai Hadas return ERR_PTR(-EINVAL); 606779b20a6cSYishai Hadas } 606879b20a6cSYishai Hadas 6069350d0e4cSYishai Hadas rwq->ibwq.wq_num = rwq->core_qp.qpn; 607079b20a6cSYishai Hadas rwq->ibwq.state = IB_WQS_RESET; 607179b20a6cSYishai Hadas if (udata->outlen) { 607279b20a6cSYishai Hadas resp.response_length = offsetof(typeof(resp), response_length) + 607379b20a6cSYishai Hadas sizeof(resp.response_length); 607479b20a6cSYishai Hadas err = ib_copy_to_udata(udata, &resp, resp.response_length); 607579b20a6cSYishai Hadas if (err) 607679b20a6cSYishai Hadas goto err_copy; 607779b20a6cSYishai Hadas } 607879b20a6cSYishai Hadas 6079350d0e4cSYishai Hadas rwq->core_qp.event = mlx5_ib_wq_event; 6080350d0e4cSYishai Hadas rwq->ibwq.event_handler = init_attr->event_handler; 608179b20a6cSYishai Hadas return &rwq->ibwq; 608279b20a6cSYishai Hadas 608379b20a6cSYishai Hadas err_copy: 6084350d0e4cSYishai Hadas mlx5_core_destroy_rq_tracked(dev->mdev, &rwq->core_qp); 608579b20a6cSYishai Hadas err_user_rq: 6086bdeacabdSShamir Rabinovitch destroy_user_rq(dev, pd, rwq, udata); 608779b20a6cSYishai Hadas err: 608879b20a6cSYishai Hadas kfree(rwq); 608979b20a6cSYishai Hadas return ERR_PTR(err); 609079b20a6cSYishai Hadas } 609179b20a6cSYishai Hadas 6092a49b1dc7SLeon Romanovsky void mlx5_ib_destroy_wq(struct ib_wq *wq, struct ib_udata *udata) 609379b20a6cSYishai Hadas { 609479b20a6cSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(wq->device); 609579b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq = to_mrwq(wq); 609679b20a6cSYishai Hadas 6097350d0e4cSYishai Hadas mlx5_core_destroy_rq_tracked(dev->mdev, &rwq->core_qp); 6098bdeacabdSShamir Rabinovitch destroy_user_rq(dev, wq->pd, rwq, udata); 609979b20a6cSYishai Hadas kfree(rwq); 610079b20a6cSYishai Hadas } 610179b20a6cSYishai Hadas 6102c5f90929SYishai Hadas struct ib_rwq_ind_table *mlx5_ib_create_rwq_ind_table(struct ib_device *device, 6103c5f90929SYishai Hadas struct ib_rwq_ind_table_init_attr *init_attr, 6104c5f90929SYishai Hadas struct ib_udata *udata) 6105c5f90929SYishai Hadas { 6106c5f90929SYishai Hadas struct mlx5_ib_dev *dev = to_mdev(device); 6107c5f90929SYishai Hadas struct mlx5_ib_rwq_ind_table *rwq_ind_tbl; 6108c5f90929SYishai Hadas int sz = 1 << init_attr->log_ind_tbl_size; 6109c5f90929SYishai Hadas struct mlx5_ib_create_rwq_ind_tbl_resp resp = {}; 6110c5f90929SYishai Hadas size_t min_resp_len; 6111c5f90929SYishai Hadas int inlen; 6112c5f90929SYishai Hadas int err; 6113c5f90929SYishai Hadas int i; 6114c5f90929SYishai Hadas u32 *in; 6115c5f90929SYishai Hadas void *rqtc; 6116c5f90929SYishai Hadas 6117c5f90929SYishai Hadas if (udata->inlen > 0 && 6118c5f90929SYishai Hadas !ib_is_udata_cleared(udata, 0, 6119c5f90929SYishai Hadas udata->inlen)) 6120c5f90929SYishai Hadas return ERR_PTR(-EOPNOTSUPP); 6121c5f90929SYishai Hadas 6122efd7f400SMaor Gottlieb if (init_attr->log_ind_tbl_size > 6123efd7f400SMaor Gottlieb MLX5_CAP_GEN(dev->mdev, log_max_rqt_size)) { 6124efd7f400SMaor Gottlieb mlx5_ib_dbg(dev, "log_ind_tbl_size = %d is bigger than supported = %d\n", 6125efd7f400SMaor Gottlieb init_attr->log_ind_tbl_size, 6126efd7f400SMaor Gottlieb MLX5_CAP_GEN(dev->mdev, log_max_rqt_size)); 6127efd7f400SMaor Gottlieb return ERR_PTR(-EINVAL); 6128efd7f400SMaor Gottlieb } 6129efd7f400SMaor Gottlieb 6130c5f90929SYishai Hadas min_resp_len = offsetof(typeof(resp), reserved) + sizeof(resp.reserved); 6131c5f90929SYishai Hadas if (udata->outlen && udata->outlen < min_resp_len) 6132c5f90929SYishai Hadas return ERR_PTR(-EINVAL); 6133c5f90929SYishai Hadas 6134c5f90929SYishai Hadas rwq_ind_tbl = kzalloc(sizeof(*rwq_ind_tbl), GFP_KERNEL); 6135c5f90929SYishai Hadas if (!rwq_ind_tbl) 6136c5f90929SYishai Hadas return ERR_PTR(-ENOMEM); 6137c5f90929SYishai Hadas 6138c5f90929SYishai Hadas inlen = MLX5_ST_SZ_BYTES(create_rqt_in) + sizeof(u32) * sz; 61391b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 6140c5f90929SYishai Hadas if (!in) { 6141c5f90929SYishai Hadas err = -ENOMEM; 6142c5f90929SYishai Hadas goto err; 6143c5f90929SYishai Hadas } 6144c5f90929SYishai Hadas 6145c5f90929SYishai Hadas rqtc = MLX5_ADDR_OF(create_rqt_in, in, rqt_context); 6146c5f90929SYishai Hadas 6147c5f90929SYishai Hadas MLX5_SET(rqtc, rqtc, rqt_actual_size, sz); 6148c5f90929SYishai Hadas MLX5_SET(rqtc, rqtc, rqt_max_size, sz); 6149c5f90929SYishai Hadas 6150c5f90929SYishai Hadas for (i = 0; i < sz; i++) 6151c5f90929SYishai Hadas MLX5_SET(rqtc, rqtc, rq_num[i], init_attr->ind_tbl[i]->wq_num); 6152c5f90929SYishai Hadas 61535deba86eSYishai Hadas rwq_ind_tbl->uid = to_mpd(init_attr->ind_tbl[0]->pd)->uid; 61545deba86eSYishai Hadas MLX5_SET(create_rqt_in, in, uid, rwq_ind_tbl->uid); 61555deba86eSYishai Hadas 6156c5f90929SYishai Hadas err = mlx5_core_create_rqt(dev->mdev, in, inlen, &rwq_ind_tbl->rqtn); 6157c5f90929SYishai Hadas kvfree(in); 6158c5f90929SYishai Hadas 6159c5f90929SYishai Hadas if (err) 6160c5f90929SYishai Hadas goto err; 6161c5f90929SYishai Hadas 6162c5f90929SYishai Hadas rwq_ind_tbl->ib_rwq_ind_tbl.ind_tbl_num = rwq_ind_tbl->rqtn; 6163c5f90929SYishai Hadas if (udata->outlen) { 6164c5f90929SYishai Hadas resp.response_length = offsetof(typeof(resp), response_length) + 6165c5f90929SYishai Hadas sizeof(resp.response_length); 6166c5f90929SYishai Hadas err = ib_copy_to_udata(udata, &resp, resp.response_length); 6167c5f90929SYishai Hadas if (err) 6168c5f90929SYishai Hadas goto err_copy; 6169c5f90929SYishai Hadas } 6170c5f90929SYishai Hadas 6171c5f90929SYishai Hadas return &rwq_ind_tbl->ib_rwq_ind_tbl; 6172c5f90929SYishai Hadas 6173c5f90929SYishai Hadas err_copy: 61745deba86eSYishai Hadas mlx5_cmd_destroy_rqt(dev->mdev, rwq_ind_tbl->rqtn, rwq_ind_tbl->uid); 6175c5f90929SYishai Hadas err: 6176c5f90929SYishai Hadas kfree(rwq_ind_tbl); 6177c5f90929SYishai Hadas return ERR_PTR(err); 6178c5f90929SYishai Hadas } 6179c5f90929SYishai Hadas 6180c5f90929SYishai Hadas int mlx5_ib_destroy_rwq_ind_table(struct ib_rwq_ind_table *ib_rwq_ind_tbl) 6181c5f90929SYishai Hadas { 6182c5f90929SYishai Hadas struct mlx5_ib_rwq_ind_table *rwq_ind_tbl = to_mrwq_ind_table(ib_rwq_ind_tbl); 6183c5f90929SYishai Hadas struct mlx5_ib_dev *dev = to_mdev(ib_rwq_ind_tbl->device); 6184c5f90929SYishai Hadas 61855deba86eSYishai Hadas mlx5_cmd_destroy_rqt(dev->mdev, rwq_ind_tbl->rqtn, rwq_ind_tbl->uid); 6186c5f90929SYishai Hadas 6187c5f90929SYishai Hadas kfree(rwq_ind_tbl); 6188c5f90929SYishai Hadas return 0; 6189c5f90929SYishai Hadas } 6190c5f90929SYishai Hadas 619179b20a6cSYishai Hadas int mlx5_ib_modify_wq(struct ib_wq *wq, struct ib_wq_attr *wq_attr, 619279b20a6cSYishai Hadas u32 wq_attr_mask, struct ib_udata *udata) 619379b20a6cSYishai Hadas { 619479b20a6cSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(wq->device); 619579b20a6cSYishai Hadas struct mlx5_ib_rwq *rwq = to_mrwq(wq); 619679b20a6cSYishai Hadas struct mlx5_ib_modify_wq ucmd = {}; 619779b20a6cSYishai Hadas size_t required_cmd_sz; 619879b20a6cSYishai Hadas int curr_wq_state; 619979b20a6cSYishai Hadas int wq_state; 620079b20a6cSYishai Hadas int inlen; 620179b20a6cSYishai Hadas int err; 620279b20a6cSYishai Hadas void *rqc; 620379b20a6cSYishai Hadas void *in; 620479b20a6cSYishai Hadas 620579b20a6cSYishai Hadas required_cmd_sz = offsetof(typeof(ucmd), reserved) + sizeof(ucmd.reserved); 620679b20a6cSYishai Hadas if (udata->inlen < required_cmd_sz) 620779b20a6cSYishai Hadas return -EINVAL; 620879b20a6cSYishai Hadas 620979b20a6cSYishai Hadas if (udata->inlen > sizeof(ucmd) && 621079b20a6cSYishai Hadas !ib_is_udata_cleared(udata, sizeof(ucmd), 621179b20a6cSYishai Hadas udata->inlen - sizeof(ucmd))) 621279b20a6cSYishai Hadas return -EOPNOTSUPP; 621379b20a6cSYishai Hadas 621479b20a6cSYishai Hadas if (ib_copy_from_udata(&ucmd, udata, min(sizeof(ucmd), udata->inlen))) 621579b20a6cSYishai Hadas return -EFAULT; 621679b20a6cSYishai Hadas 621779b20a6cSYishai Hadas if (ucmd.comp_mask || ucmd.reserved) 621879b20a6cSYishai Hadas return -EOPNOTSUPP; 621979b20a6cSYishai Hadas 622079b20a6cSYishai Hadas inlen = MLX5_ST_SZ_BYTES(modify_rq_in); 62211b9a07eeSLeon Romanovsky in = kvzalloc(inlen, GFP_KERNEL); 622279b20a6cSYishai Hadas if (!in) 622379b20a6cSYishai Hadas return -ENOMEM; 622479b20a6cSYishai Hadas 622579b20a6cSYishai Hadas rqc = MLX5_ADDR_OF(modify_rq_in, in, ctx); 622679b20a6cSYishai Hadas 622779b20a6cSYishai Hadas curr_wq_state = (wq_attr_mask & IB_WQ_CUR_STATE) ? 622879b20a6cSYishai Hadas wq_attr->curr_wq_state : wq->state; 622979b20a6cSYishai Hadas wq_state = (wq_attr_mask & IB_WQ_STATE) ? 623079b20a6cSYishai Hadas wq_attr->wq_state : curr_wq_state; 623179b20a6cSYishai Hadas if (curr_wq_state == IB_WQS_ERR) 623279b20a6cSYishai Hadas curr_wq_state = MLX5_RQC_STATE_ERR; 623379b20a6cSYishai Hadas if (wq_state == IB_WQS_ERR) 623479b20a6cSYishai Hadas wq_state = MLX5_RQC_STATE_ERR; 623579b20a6cSYishai Hadas MLX5_SET(modify_rq_in, in, rq_state, curr_wq_state); 623634d57585SYishai Hadas MLX5_SET(modify_rq_in, in, uid, to_mpd(wq->pd)->uid); 623779b20a6cSYishai Hadas MLX5_SET(rqc, rqc, state, wq_state); 623879b20a6cSYishai Hadas 6239b1f74a84SNoa Osherovich if (wq_attr_mask & IB_WQ_FLAGS) { 6240b1f74a84SNoa Osherovich if (wq_attr->flags_mask & IB_WQ_FLAGS_CVLAN_STRIPPING) { 6241b1f74a84SNoa Osherovich if (!(MLX5_CAP_GEN(dev->mdev, eth_net_offloads) && 6242b1f74a84SNoa Osherovich MLX5_CAP_ETH(dev->mdev, vlan_cap))) { 6243b1f74a84SNoa Osherovich mlx5_ib_dbg(dev, "VLAN offloads are not " 6244b1f74a84SNoa Osherovich "supported\n"); 6245b1f74a84SNoa Osherovich err = -EOPNOTSUPP; 6246b1f74a84SNoa Osherovich goto out; 6247b1f74a84SNoa Osherovich } 6248b1f74a84SNoa Osherovich MLX5_SET64(modify_rq_in, in, modify_bitmask, 6249b1f74a84SNoa Osherovich MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_VSD); 6250b1f74a84SNoa Osherovich MLX5_SET(rqc, rqc, vsd, 6251b1f74a84SNoa Osherovich (wq_attr->flags & IB_WQ_FLAGS_CVLAN_STRIPPING) ? 0 : 1); 6252b1f74a84SNoa Osherovich } 6253b1383aa6SNoa Osherovich 6254b1383aa6SNoa Osherovich if (wq_attr->flags_mask & IB_WQ_FLAGS_PCI_WRITE_END_PADDING) { 6255b1383aa6SNoa Osherovich mlx5_ib_dbg(dev, "Modifying scatter end padding is not supported\n"); 6256b1383aa6SNoa Osherovich err = -EOPNOTSUPP; 6257b1383aa6SNoa Osherovich goto out; 6258b1383aa6SNoa Osherovich } 6259b1f74a84SNoa Osherovich } 6260b1f74a84SNoa Osherovich 626123a6964eSMajd Dibbiny if (curr_wq_state == IB_WQS_RESET && wq_state == IB_WQS_RDY) { 626223a6964eSMajd Dibbiny if (MLX5_CAP_GEN(dev->mdev, modify_rq_counter_set_id)) { 626323a6964eSMajd Dibbiny MLX5_SET64(modify_rq_in, in, modify_bitmask, 626423a6964eSMajd Dibbiny MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID); 6265e1f24a79SParav Pandit MLX5_SET(rqc, rqc, counter_set_id, 6266e1f24a79SParav Pandit dev->port->cnts.set_id); 626723a6964eSMajd Dibbiny } else 62685a738b5dSJason Gunthorpe dev_info_once( 62695a738b5dSJason Gunthorpe &dev->ib_dev.dev, 62705a738b5dSJason Gunthorpe "Receive WQ counters are not supported on current FW\n"); 627123a6964eSMajd Dibbiny } 627223a6964eSMajd Dibbiny 6273350d0e4cSYishai Hadas err = mlx5_core_modify_rq(dev->mdev, rwq->core_qp.qpn, in, inlen); 627479b20a6cSYishai Hadas if (!err) 627579b20a6cSYishai Hadas rwq->ibwq.state = (wq_state == MLX5_RQC_STATE_ERR) ? IB_WQS_ERR : wq_state; 627679b20a6cSYishai Hadas 6277b1f74a84SNoa Osherovich out: 6278b1f74a84SNoa Osherovich kvfree(in); 627979b20a6cSYishai Hadas return err; 628079b20a6cSYishai Hadas } 6281d0e84c0aSYishai Hadas 6282d0e84c0aSYishai Hadas struct mlx5_ib_drain_cqe { 6283d0e84c0aSYishai Hadas struct ib_cqe cqe; 6284d0e84c0aSYishai Hadas struct completion done; 6285d0e84c0aSYishai Hadas }; 6286d0e84c0aSYishai Hadas 6287d0e84c0aSYishai Hadas static void mlx5_ib_drain_qp_done(struct ib_cq *cq, struct ib_wc *wc) 6288d0e84c0aSYishai Hadas { 6289d0e84c0aSYishai Hadas struct mlx5_ib_drain_cqe *cqe = container_of(wc->wr_cqe, 6290d0e84c0aSYishai Hadas struct mlx5_ib_drain_cqe, 6291d0e84c0aSYishai Hadas cqe); 6292d0e84c0aSYishai Hadas 6293d0e84c0aSYishai Hadas complete(&cqe->done); 6294d0e84c0aSYishai Hadas } 6295d0e84c0aSYishai Hadas 6296d0e84c0aSYishai Hadas /* This function returns only once the drained WR was completed */ 6297d0e84c0aSYishai Hadas static void handle_drain_completion(struct ib_cq *cq, 6298d0e84c0aSYishai Hadas struct mlx5_ib_drain_cqe *sdrain, 6299d0e84c0aSYishai Hadas struct mlx5_ib_dev *dev) 6300d0e84c0aSYishai Hadas { 6301d0e84c0aSYishai Hadas struct mlx5_core_dev *mdev = dev->mdev; 6302d0e84c0aSYishai Hadas 6303d0e84c0aSYishai Hadas if (cq->poll_ctx == IB_POLL_DIRECT) { 6304d0e84c0aSYishai Hadas while (wait_for_completion_timeout(&sdrain->done, HZ / 10) <= 0) 6305d0e84c0aSYishai Hadas ib_process_cq_direct(cq, -1); 6306d0e84c0aSYishai Hadas return; 6307d0e84c0aSYishai Hadas } 6308d0e84c0aSYishai Hadas 6309d0e84c0aSYishai Hadas if (mdev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR) { 6310d0e84c0aSYishai Hadas struct mlx5_ib_cq *mcq = to_mcq(cq); 6311d0e84c0aSYishai Hadas bool triggered = false; 6312d0e84c0aSYishai Hadas unsigned long flags; 6313d0e84c0aSYishai Hadas 6314d0e84c0aSYishai Hadas spin_lock_irqsave(&dev->reset_flow_resource_lock, flags); 6315d0e84c0aSYishai Hadas /* Make sure that the CQ handler won't run if wasn't run yet */ 6316d0e84c0aSYishai Hadas if (!mcq->mcq.reset_notify_added) 6317d0e84c0aSYishai Hadas mcq->mcq.reset_notify_added = 1; 6318d0e84c0aSYishai Hadas else 6319d0e84c0aSYishai Hadas triggered = true; 6320d0e84c0aSYishai Hadas spin_unlock_irqrestore(&dev->reset_flow_resource_lock, flags); 6321d0e84c0aSYishai Hadas 6322d0e84c0aSYishai Hadas if (triggered) { 6323d0e84c0aSYishai Hadas /* Wait for any scheduled/running task to be ended */ 6324d0e84c0aSYishai Hadas switch (cq->poll_ctx) { 6325d0e84c0aSYishai Hadas case IB_POLL_SOFTIRQ: 6326d0e84c0aSYishai Hadas irq_poll_disable(&cq->iop); 6327d0e84c0aSYishai Hadas irq_poll_enable(&cq->iop); 6328d0e84c0aSYishai Hadas break; 6329d0e84c0aSYishai Hadas case IB_POLL_WORKQUEUE: 6330d0e84c0aSYishai Hadas cancel_work_sync(&cq->work); 6331d0e84c0aSYishai Hadas break; 6332d0e84c0aSYishai Hadas default: 6333d0e84c0aSYishai Hadas WARN_ON_ONCE(1); 6334d0e84c0aSYishai Hadas } 6335d0e84c0aSYishai Hadas } 6336d0e84c0aSYishai Hadas 6337d0e84c0aSYishai Hadas /* Run the CQ handler - this makes sure that the drain WR will 6338d0e84c0aSYishai Hadas * be processed if wasn't processed yet. 6339d0e84c0aSYishai Hadas */ 6340d0e84c0aSYishai Hadas mcq->mcq.comp(&mcq->mcq); 6341d0e84c0aSYishai Hadas } 6342d0e84c0aSYishai Hadas 6343d0e84c0aSYishai Hadas wait_for_completion(&sdrain->done); 6344d0e84c0aSYishai Hadas } 6345d0e84c0aSYishai Hadas 6346d0e84c0aSYishai Hadas void mlx5_ib_drain_sq(struct ib_qp *qp) 6347d0e84c0aSYishai Hadas { 6348d0e84c0aSYishai Hadas struct ib_cq *cq = qp->send_cq; 6349d0e84c0aSYishai Hadas struct ib_qp_attr attr = { .qp_state = IB_QPS_ERR }; 6350d0e84c0aSYishai Hadas struct mlx5_ib_drain_cqe sdrain; 6351d34ac5cdSBart Van Assche const struct ib_send_wr *bad_swr; 6352d0e84c0aSYishai Hadas struct ib_rdma_wr swr = { 6353d0e84c0aSYishai Hadas .wr = { 6354d0e84c0aSYishai Hadas .next = NULL, 6355d0e84c0aSYishai Hadas { .wr_cqe = &sdrain.cqe, }, 6356d0e84c0aSYishai Hadas .opcode = IB_WR_RDMA_WRITE, 6357d0e84c0aSYishai Hadas }, 6358d0e84c0aSYishai Hadas }; 6359d0e84c0aSYishai Hadas int ret; 6360d0e84c0aSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(qp->device); 6361d0e84c0aSYishai Hadas struct mlx5_core_dev *mdev = dev->mdev; 6362d0e84c0aSYishai Hadas 6363d0e84c0aSYishai Hadas ret = ib_modify_qp(qp, &attr, IB_QP_STATE); 6364d0e84c0aSYishai Hadas if (ret && mdev->state != MLX5_DEVICE_STATE_INTERNAL_ERROR) { 6365d0e84c0aSYishai Hadas WARN_ONCE(ret, "failed to drain send queue: %d\n", ret); 6366d0e84c0aSYishai Hadas return; 6367d0e84c0aSYishai Hadas } 6368d0e84c0aSYishai Hadas 6369d0e84c0aSYishai Hadas sdrain.cqe.done = mlx5_ib_drain_qp_done; 6370d0e84c0aSYishai Hadas init_completion(&sdrain.done); 6371d0e84c0aSYishai Hadas 6372d0e84c0aSYishai Hadas ret = _mlx5_ib_post_send(qp, &swr.wr, &bad_swr, true); 6373d0e84c0aSYishai Hadas if (ret) { 6374d0e84c0aSYishai Hadas WARN_ONCE(ret, "failed to drain send queue: %d\n", ret); 6375d0e84c0aSYishai Hadas return; 6376d0e84c0aSYishai Hadas } 6377d0e84c0aSYishai Hadas 6378d0e84c0aSYishai Hadas handle_drain_completion(cq, &sdrain, dev); 6379d0e84c0aSYishai Hadas } 6380d0e84c0aSYishai Hadas 6381d0e84c0aSYishai Hadas void mlx5_ib_drain_rq(struct ib_qp *qp) 6382d0e84c0aSYishai Hadas { 6383d0e84c0aSYishai Hadas struct ib_cq *cq = qp->recv_cq; 6384d0e84c0aSYishai Hadas struct ib_qp_attr attr = { .qp_state = IB_QPS_ERR }; 6385d0e84c0aSYishai Hadas struct mlx5_ib_drain_cqe rdrain; 6386d34ac5cdSBart Van Assche struct ib_recv_wr rwr = {}; 6387d34ac5cdSBart Van Assche const struct ib_recv_wr *bad_rwr; 6388d0e84c0aSYishai Hadas int ret; 6389d0e84c0aSYishai Hadas struct mlx5_ib_dev *dev = to_mdev(qp->device); 6390d0e84c0aSYishai Hadas struct mlx5_core_dev *mdev = dev->mdev; 6391d0e84c0aSYishai Hadas 6392d0e84c0aSYishai Hadas ret = ib_modify_qp(qp, &attr, IB_QP_STATE); 6393d0e84c0aSYishai Hadas if (ret && mdev->state != MLX5_DEVICE_STATE_INTERNAL_ERROR) { 6394d0e84c0aSYishai Hadas WARN_ONCE(ret, "failed to drain recv queue: %d\n", ret); 6395d0e84c0aSYishai Hadas return; 6396d0e84c0aSYishai Hadas } 6397d0e84c0aSYishai Hadas 6398d0e84c0aSYishai Hadas rwr.wr_cqe = &rdrain.cqe; 6399d0e84c0aSYishai Hadas rdrain.cqe.done = mlx5_ib_drain_qp_done; 6400d0e84c0aSYishai Hadas init_completion(&rdrain.done); 6401d0e84c0aSYishai Hadas 6402d0e84c0aSYishai Hadas ret = _mlx5_ib_post_recv(qp, &rwr, &bad_rwr, true); 6403d0e84c0aSYishai Hadas if (ret) { 6404d0e84c0aSYishai Hadas WARN_ONCE(ret, "failed to drain recv queue: %d\n", ret); 6405d0e84c0aSYishai Hadas return; 6406d0e84c0aSYishai Hadas } 6407d0e84c0aSYishai Hadas 6408d0e84c0aSYishai Hadas handle_drain_completion(cq, &rdrain, dev); 6409d0e84c0aSYishai Hadas } 6410