xref: /openbmc/linux/drivers/infiniband/hw/mlx5/qp.c (revision d6de0bb1)
1e126ba97SEli Cohen /*
26cf0a15fSSaeed Mahameed  * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved.
3e126ba97SEli Cohen  *
4e126ba97SEli Cohen  * This software is available to you under a choice of one of two
5e126ba97SEli Cohen  * licenses.  You may choose to be licensed under the terms of the GNU
6e126ba97SEli Cohen  * General Public License (GPL) Version 2, available from the file
7e126ba97SEli Cohen  * COPYING in the main directory of this source tree, or the
8e126ba97SEli Cohen  * OpenIB.org BSD license below:
9e126ba97SEli Cohen  *
10e126ba97SEli Cohen  *     Redistribution and use in source and binary forms, with or
11e126ba97SEli Cohen  *     without modification, are permitted provided that the following
12e126ba97SEli Cohen  *     conditions are met:
13e126ba97SEli Cohen  *
14e126ba97SEli Cohen  *      - Redistributions of source code must retain the above
15e126ba97SEli Cohen  *        copyright notice, this list of conditions and the following
16e126ba97SEli Cohen  *        disclaimer.
17e126ba97SEli Cohen  *
18e126ba97SEli Cohen  *      - Redistributions in binary form must reproduce the above
19e126ba97SEli Cohen  *        copyright notice, this list of conditions and the following
20e126ba97SEli Cohen  *        disclaimer in the documentation and/or other materials
21e126ba97SEli Cohen  *        provided with the distribution.
22e126ba97SEli Cohen  *
23e126ba97SEli Cohen  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24e126ba97SEli Cohen  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25e126ba97SEli Cohen  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26e126ba97SEli Cohen  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27e126ba97SEli Cohen  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28e126ba97SEli Cohen  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29e126ba97SEli Cohen  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30e126ba97SEli Cohen  * SOFTWARE.
31e126ba97SEli Cohen  */
32e126ba97SEli Cohen 
33e126ba97SEli Cohen #include <linux/module.h>
34e126ba97SEli Cohen #include <rdma/ib_umem.h>
352811ba51SAchiad Shochat #include <rdma/ib_cache.h>
36cfb5e088SHaggai Abramovsky #include <rdma/ib_user_verbs.h>
37d14133ddSMark Zhang #include <rdma/rdma_counter.h>
38c2e53b2cSYishai Hadas #include <linux/mlx5/fs.h>
39e126ba97SEli Cohen #include "mlx5_ib.h"
40b96c9ddeSMark Bloch #include "ib_rep.h"
41443c1cf9SYishai Hadas #include "cmd.h"
42e126ba97SEli Cohen 
43e126ba97SEli Cohen /* not supported currently */
44e126ba97SEli Cohen static int wq_signature;
45e126ba97SEli Cohen 
46e126ba97SEli Cohen enum {
47e126ba97SEli Cohen 	MLX5_IB_ACK_REQ_FREQ	= 8,
48e126ba97SEli Cohen };
49e126ba97SEli Cohen 
50e126ba97SEli Cohen enum {
51e126ba97SEli Cohen 	MLX5_IB_DEFAULT_SCHED_QUEUE	= 0x83,
52e126ba97SEli Cohen 	MLX5_IB_DEFAULT_QP0_SCHED_QUEUE	= 0x3f,
53e126ba97SEli Cohen 	MLX5_IB_LINK_TYPE_IB		= 0,
54e126ba97SEli Cohen 	MLX5_IB_LINK_TYPE_ETH		= 1
55e126ba97SEli Cohen };
56e126ba97SEli Cohen 
57e126ba97SEli Cohen enum {
58e126ba97SEli Cohen 	MLX5_IB_SQ_STRIDE	= 6,
59064e5262SIdan Burstein 	MLX5_IB_SQ_UMR_INLINE_THRESHOLD = 64,
60e126ba97SEli Cohen };
61e126ba97SEli Cohen 
62e126ba97SEli Cohen static const u32 mlx5_ib_opcode[] = {
63e126ba97SEli Cohen 	[IB_WR_SEND]				= MLX5_OPCODE_SEND,
64f0313965SErez Shitrit 	[IB_WR_LSO]				= MLX5_OPCODE_LSO,
65e126ba97SEli Cohen 	[IB_WR_SEND_WITH_IMM]			= MLX5_OPCODE_SEND_IMM,
66e126ba97SEli Cohen 	[IB_WR_RDMA_WRITE]			= MLX5_OPCODE_RDMA_WRITE,
67e126ba97SEli Cohen 	[IB_WR_RDMA_WRITE_WITH_IMM]		= MLX5_OPCODE_RDMA_WRITE_IMM,
68e126ba97SEli Cohen 	[IB_WR_RDMA_READ]			= MLX5_OPCODE_RDMA_READ,
69e126ba97SEli Cohen 	[IB_WR_ATOMIC_CMP_AND_SWP]		= MLX5_OPCODE_ATOMIC_CS,
70e126ba97SEli Cohen 	[IB_WR_ATOMIC_FETCH_AND_ADD]		= MLX5_OPCODE_ATOMIC_FA,
71e126ba97SEli Cohen 	[IB_WR_SEND_WITH_INV]			= MLX5_OPCODE_SEND_INVAL,
72e126ba97SEli Cohen 	[IB_WR_LOCAL_INV]			= MLX5_OPCODE_UMR,
738a187ee5SSagi Grimberg 	[IB_WR_REG_MR]				= MLX5_OPCODE_UMR,
74e126ba97SEli Cohen 	[IB_WR_MASKED_ATOMIC_CMP_AND_SWP]	= MLX5_OPCODE_ATOMIC_MASKED_CS,
75e126ba97SEli Cohen 	[IB_WR_MASKED_ATOMIC_FETCH_AND_ADD]	= MLX5_OPCODE_ATOMIC_MASKED_FA,
76e126ba97SEli Cohen 	[MLX5_IB_WR_UMR]			= MLX5_OPCODE_UMR,
77e126ba97SEli Cohen };
78e126ba97SEli Cohen 
79f0313965SErez Shitrit struct mlx5_wqe_eth_pad {
80f0313965SErez Shitrit 	u8 rsvd0[16];
81f0313965SErez Shitrit };
82e126ba97SEli Cohen 
83eb49ab0cSAlex Vesker enum raw_qp_set_mask_map {
84eb49ab0cSAlex Vesker 	MLX5_RAW_QP_MOD_SET_RQ_Q_CTR_ID		= 1UL << 0,
857d29f349SBodong Wang 	MLX5_RAW_QP_RATE_LIMIT			= 1UL << 1,
86eb49ab0cSAlex Vesker };
87eb49ab0cSAlex Vesker 
880680efa2SAlex Vesker struct mlx5_modify_raw_qp_param {
890680efa2SAlex Vesker 	u16 operation;
90eb49ab0cSAlex Vesker 
91eb49ab0cSAlex Vesker 	u32 set_mask; /* raw_qp_set_mask_map */
9261147f39SBodong Wang 
9361147f39SBodong Wang 	struct mlx5_rate_limit rl;
9461147f39SBodong Wang 
95eb49ab0cSAlex Vesker 	u8 rq_q_ctr_id;
96d5ed8ac3SMark Bloch 	u16 port;
970680efa2SAlex Vesker };
980680efa2SAlex Vesker 
9989ea94a7SMaor Gottlieb static void get_cqs(enum ib_qp_type qp_type,
10089ea94a7SMaor Gottlieb 		    struct ib_cq *ib_send_cq, struct ib_cq *ib_recv_cq,
10189ea94a7SMaor Gottlieb 		    struct mlx5_ib_cq **send_cq, struct mlx5_ib_cq **recv_cq);
10289ea94a7SMaor Gottlieb 
103e126ba97SEli Cohen static int is_qp0(enum ib_qp_type qp_type)
104e126ba97SEli Cohen {
105e126ba97SEli Cohen 	return qp_type == IB_QPT_SMI;
106e126ba97SEli Cohen }
107e126ba97SEli Cohen 
108e126ba97SEli Cohen static int is_sqp(enum ib_qp_type qp_type)
109e126ba97SEli Cohen {
110e126ba97SEli Cohen 	return is_qp0(qp_type) || is_qp1(qp_type);
111e126ba97SEli Cohen }
112e126ba97SEli Cohen 
113c1395a2aSHaggai Eran /**
114fbeb4075SMoni Shoua  * mlx5_ib_read_user_wqe_common() - Copy a WQE (or part of) from user WQ
115fbeb4075SMoni Shoua  * to kernel buffer
116c1395a2aSHaggai Eran  *
117fbeb4075SMoni Shoua  * @umem: User space memory where the WQ is
118fbeb4075SMoni Shoua  * @buffer: buffer to copy to
119fbeb4075SMoni Shoua  * @buflen: buffer length
120fbeb4075SMoni Shoua  * @wqe_index: index of WQE to copy from
121fbeb4075SMoni Shoua  * @wq_offset: offset to start of WQ
122fbeb4075SMoni Shoua  * @wq_wqe_cnt: number of WQEs in WQ
123fbeb4075SMoni Shoua  * @wq_wqe_shift: log2 of WQE size
124fbeb4075SMoni Shoua  * @bcnt: number of bytes to copy
125fbeb4075SMoni Shoua  * @bytes_copied: number of bytes to copy (return value)
126c1395a2aSHaggai Eran  *
127fbeb4075SMoni Shoua  * Copies from start of WQE bcnt or less bytes.
128fbeb4075SMoni Shoua  * Does not gurantee to copy the entire WQE.
129c1395a2aSHaggai Eran  *
130fbeb4075SMoni Shoua  * Return: zero on success, or an error code.
131c1395a2aSHaggai Eran  */
132fbeb4075SMoni Shoua static int mlx5_ib_read_user_wqe_common(struct ib_umem *umem,
133fbeb4075SMoni Shoua 					void *buffer,
134fbeb4075SMoni Shoua 					u32 buflen,
135fbeb4075SMoni Shoua 					int wqe_index,
136fbeb4075SMoni Shoua 					int wq_offset,
137fbeb4075SMoni Shoua 					int wq_wqe_cnt,
138fbeb4075SMoni Shoua 					int wq_wqe_shift,
139fbeb4075SMoni Shoua 					int bcnt,
140fbeb4075SMoni Shoua 					size_t *bytes_copied)
141c1395a2aSHaggai Eran {
142fbeb4075SMoni Shoua 	size_t offset = wq_offset + ((wqe_index % wq_wqe_cnt) << wq_wqe_shift);
143fbeb4075SMoni Shoua 	size_t wq_end = wq_offset + (wq_wqe_cnt << wq_wqe_shift);
144fbeb4075SMoni Shoua 	size_t copy_length;
145c1395a2aSHaggai Eran 	int ret;
146c1395a2aSHaggai Eran 
147fbeb4075SMoni Shoua 	/* don't copy more than requested, more than buffer length or
148fbeb4075SMoni Shoua 	 * beyond WQ end
149fbeb4075SMoni Shoua 	 */
150fbeb4075SMoni Shoua 	copy_length = min_t(u32, buflen, wq_end - offset);
151fbeb4075SMoni Shoua 	copy_length = min_t(u32, copy_length, bcnt);
152c1395a2aSHaggai Eran 
153fbeb4075SMoni Shoua 	ret = ib_umem_copy_from(buffer, umem, offset, copy_length);
154c1395a2aSHaggai Eran 	if (ret)
155c1395a2aSHaggai Eran 		return ret;
156c1395a2aSHaggai Eran 
157fbeb4075SMoni Shoua 	if (!ret && bytes_copied)
158fbeb4075SMoni Shoua 		*bytes_copied = copy_length;
159c1395a2aSHaggai Eran 
160fbeb4075SMoni Shoua 	return 0;
161fbeb4075SMoni Shoua }
162fbeb4075SMoni Shoua 
163fbeb4075SMoni Shoua int mlx5_ib_read_user_wqe_sq(struct mlx5_ib_qp *qp,
164fbeb4075SMoni Shoua 			     int wqe_index,
165fbeb4075SMoni Shoua 			     void *buffer,
166fbeb4075SMoni Shoua 			     int buflen,
167fbeb4075SMoni Shoua 			     size_t *bc)
168fbeb4075SMoni Shoua {
169fbeb4075SMoni Shoua 	struct mlx5_ib_qp_base *base = &qp->trans_qp.base;
170fbeb4075SMoni Shoua 	struct ib_umem *umem = base->ubuffer.umem;
171fbeb4075SMoni Shoua 	struct mlx5_ib_wq *wq = &qp->sq;
172fbeb4075SMoni Shoua 	struct mlx5_wqe_ctrl_seg *ctrl;
173fbeb4075SMoni Shoua 	size_t bytes_copied;
174fbeb4075SMoni Shoua 	size_t bytes_copied2;
175fbeb4075SMoni Shoua 	size_t wqe_length;
176fbeb4075SMoni Shoua 	int ret;
177fbeb4075SMoni Shoua 	int ds;
178fbeb4075SMoni Shoua 
179fbeb4075SMoni Shoua 	if (buflen < sizeof(*ctrl))
180fbeb4075SMoni Shoua 		return -EINVAL;
181fbeb4075SMoni Shoua 
182fbeb4075SMoni Shoua 	/* at first read as much as possible */
183fbeb4075SMoni Shoua 	ret = mlx5_ib_read_user_wqe_common(umem,
184fbeb4075SMoni Shoua 					   buffer,
185fbeb4075SMoni Shoua 					   buflen,
186fbeb4075SMoni Shoua 					   wqe_index,
187fbeb4075SMoni Shoua 					   wq->offset,
188fbeb4075SMoni Shoua 					   wq->wqe_cnt,
189fbeb4075SMoni Shoua 					   wq->wqe_shift,
190fbeb4075SMoni Shoua 					   buflen,
191fbeb4075SMoni Shoua 					   &bytes_copied);
192fbeb4075SMoni Shoua 	if (ret)
193fbeb4075SMoni Shoua 		return ret;
194fbeb4075SMoni Shoua 
195fbeb4075SMoni Shoua 	/* we need at least control segment size to proceed */
196fbeb4075SMoni Shoua 	if (bytes_copied < sizeof(*ctrl))
197fbeb4075SMoni Shoua 		return -EINVAL;
198fbeb4075SMoni Shoua 
199fbeb4075SMoni Shoua 	ctrl = buffer;
200fbeb4075SMoni Shoua 	ds = be32_to_cpu(ctrl->qpn_ds) & MLX5_WQE_CTRL_DS_MASK;
201c1395a2aSHaggai Eran 	wqe_length = ds * MLX5_WQE_DS_UNITS;
202fbeb4075SMoni Shoua 
203fbeb4075SMoni Shoua 	/* if we copied enough then we are done */
204fbeb4075SMoni Shoua 	if (bytes_copied >= wqe_length) {
205fbeb4075SMoni Shoua 		*bc = bytes_copied;
206fbeb4075SMoni Shoua 		return 0;
207c1395a2aSHaggai Eran 	}
208c1395a2aSHaggai Eran 
209fbeb4075SMoni Shoua 	/* otherwise this a wrapped around wqe
210fbeb4075SMoni Shoua 	 * so read the remaining bytes starting
211fbeb4075SMoni Shoua 	 * from  wqe_index 0
212fbeb4075SMoni Shoua 	 */
213fbeb4075SMoni Shoua 	ret = mlx5_ib_read_user_wqe_common(umem,
214fbeb4075SMoni Shoua 					   buffer + bytes_copied,
215fbeb4075SMoni Shoua 					   buflen - bytes_copied,
216fbeb4075SMoni Shoua 					   0,
217fbeb4075SMoni Shoua 					   wq->offset,
218fbeb4075SMoni Shoua 					   wq->wqe_cnt,
219fbeb4075SMoni Shoua 					   wq->wqe_shift,
220fbeb4075SMoni Shoua 					   wqe_length - bytes_copied,
221fbeb4075SMoni Shoua 					   &bytes_copied2);
222c1395a2aSHaggai Eran 
223c1395a2aSHaggai Eran 	if (ret)
224c1395a2aSHaggai Eran 		return ret;
225fbeb4075SMoni Shoua 	*bc = bytes_copied + bytes_copied2;
226fbeb4075SMoni Shoua 	return 0;
227fbeb4075SMoni Shoua }
228c1395a2aSHaggai Eran 
229fbeb4075SMoni Shoua int mlx5_ib_read_user_wqe_rq(struct mlx5_ib_qp *qp,
230fbeb4075SMoni Shoua 			     int wqe_index,
231fbeb4075SMoni Shoua 			     void *buffer,
232fbeb4075SMoni Shoua 			     int buflen,
233fbeb4075SMoni Shoua 			     size_t *bc)
234fbeb4075SMoni Shoua {
235fbeb4075SMoni Shoua 	struct mlx5_ib_qp_base *base = &qp->trans_qp.base;
236fbeb4075SMoni Shoua 	struct ib_umem *umem = base->ubuffer.umem;
237fbeb4075SMoni Shoua 	struct mlx5_ib_wq *wq = &qp->rq;
238fbeb4075SMoni Shoua 	size_t bytes_copied;
239fbeb4075SMoni Shoua 	int ret;
240fbeb4075SMoni Shoua 
241fbeb4075SMoni Shoua 	ret = mlx5_ib_read_user_wqe_common(umem,
242fbeb4075SMoni Shoua 					   buffer,
243fbeb4075SMoni Shoua 					   buflen,
244fbeb4075SMoni Shoua 					   wqe_index,
245fbeb4075SMoni Shoua 					   wq->offset,
246fbeb4075SMoni Shoua 					   wq->wqe_cnt,
247fbeb4075SMoni Shoua 					   wq->wqe_shift,
248fbeb4075SMoni Shoua 					   buflen,
249fbeb4075SMoni Shoua 					   &bytes_copied);
250fbeb4075SMoni Shoua 
251fbeb4075SMoni Shoua 	if (ret)
252fbeb4075SMoni Shoua 		return ret;
253fbeb4075SMoni Shoua 	*bc = bytes_copied;
254fbeb4075SMoni Shoua 	return 0;
255fbeb4075SMoni Shoua }
256fbeb4075SMoni Shoua 
257fbeb4075SMoni Shoua int mlx5_ib_read_user_wqe_srq(struct mlx5_ib_srq *srq,
258fbeb4075SMoni Shoua 			      int wqe_index,
259fbeb4075SMoni Shoua 			      void *buffer,
260fbeb4075SMoni Shoua 			      int buflen,
261fbeb4075SMoni Shoua 			      size_t *bc)
262fbeb4075SMoni Shoua {
263fbeb4075SMoni Shoua 	struct ib_umem *umem = srq->umem;
264fbeb4075SMoni Shoua 	size_t bytes_copied;
265fbeb4075SMoni Shoua 	int ret;
266fbeb4075SMoni Shoua 
267fbeb4075SMoni Shoua 	ret = mlx5_ib_read_user_wqe_common(umem,
268fbeb4075SMoni Shoua 					   buffer,
269fbeb4075SMoni Shoua 					   buflen,
270fbeb4075SMoni Shoua 					   wqe_index,
271fbeb4075SMoni Shoua 					   0,
272fbeb4075SMoni Shoua 					   srq->msrq.max,
273fbeb4075SMoni Shoua 					   srq->msrq.wqe_shift,
274fbeb4075SMoni Shoua 					   buflen,
275fbeb4075SMoni Shoua 					   &bytes_copied);
276fbeb4075SMoni Shoua 
277fbeb4075SMoni Shoua 	if (ret)
278fbeb4075SMoni Shoua 		return ret;
279fbeb4075SMoni Shoua 	*bc = bytes_copied;
280fbeb4075SMoni Shoua 	return 0;
281c1395a2aSHaggai Eran }
282c1395a2aSHaggai Eran 
283e126ba97SEli Cohen static void mlx5_ib_qp_event(struct mlx5_core_qp *qp, int type)
284e126ba97SEli Cohen {
285e126ba97SEli Cohen 	struct ib_qp *ibqp = &to_mibqp(qp)->ibqp;
286e126ba97SEli Cohen 	struct ib_event event;
287e126ba97SEli Cohen 
28819098df2Smajd@mellanox.com 	if (type == MLX5_EVENT_TYPE_PATH_MIG) {
28919098df2Smajd@mellanox.com 		/* This event is only valid for trans_qps */
29019098df2Smajd@mellanox.com 		to_mibqp(qp)->port = to_mibqp(qp)->trans_qp.alt_port;
29119098df2Smajd@mellanox.com 	}
292e126ba97SEli Cohen 
293e126ba97SEli Cohen 	if (ibqp->event_handler) {
294e126ba97SEli Cohen 		event.device     = ibqp->device;
295e126ba97SEli Cohen 		event.element.qp = ibqp;
296e126ba97SEli Cohen 		switch (type) {
297e126ba97SEli Cohen 		case MLX5_EVENT_TYPE_PATH_MIG:
298e126ba97SEli Cohen 			event.event = IB_EVENT_PATH_MIG;
299e126ba97SEli Cohen 			break;
300e126ba97SEli Cohen 		case MLX5_EVENT_TYPE_COMM_EST:
301e126ba97SEli Cohen 			event.event = IB_EVENT_COMM_EST;
302e126ba97SEli Cohen 			break;
303e126ba97SEli Cohen 		case MLX5_EVENT_TYPE_SQ_DRAINED:
304e126ba97SEli Cohen 			event.event = IB_EVENT_SQ_DRAINED;
305e126ba97SEli Cohen 			break;
306e126ba97SEli Cohen 		case MLX5_EVENT_TYPE_SRQ_LAST_WQE:
307e126ba97SEli Cohen 			event.event = IB_EVENT_QP_LAST_WQE_REACHED;
308e126ba97SEli Cohen 			break;
309e126ba97SEli Cohen 		case MLX5_EVENT_TYPE_WQ_CATAS_ERROR:
310e126ba97SEli Cohen 			event.event = IB_EVENT_QP_FATAL;
311e126ba97SEli Cohen 			break;
312e126ba97SEli Cohen 		case MLX5_EVENT_TYPE_PATH_MIG_FAILED:
313e126ba97SEli Cohen 			event.event = IB_EVENT_PATH_MIG_ERR;
314e126ba97SEli Cohen 			break;
315e126ba97SEli Cohen 		case MLX5_EVENT_TYPE_WQ_INVAL_REQ_ERROR:
316e126ba97SEli Cohen 			event.event = IB_EVENT_QP_REQ_ERR;
317e126ba97SEli Cohen 			break;
318e126ba97SEli Cohen 		case MLX5_EVENT_TYPE_WQ_ACCESS_ERROR:
319e126ba97SEli Cohen 			event.event = IB_EVENT_QP_ACCESS_ERR;
320e126ba97SEli Cohen 			break;
321e126ba97SEli Cohen 		default:
322e126ba97SEli Cohen 			pr_warn("mlx5_ib: Unexpected event type %d on QP %06x\n", type, qp->qpn);
323e126ba97SEli Cohen 			return;
324e126ba97SEli Cohen 		}
325e126ba97SEli Cohen 
326e126ba97SEli Cohen 		ibqp->event_handler(&event, ibqp->qp_context);
327e126ba97SEli Cohen 	}
328e126ba97SEli Cohen }
329e126ba97SEli Cohen 
330e126ba97SEli Cohen static int set_rq_size(struct mlx5_ib_dev *dev, struct ib_qp_cap *cap,
331e126ba97SEli Cohen 		       int has_rq, struct mlx5_ib_qp *qp, struct mlx5_ib_create_qp *ucmd)
332e126ba97SEli Cohen {
333e126ba97SEli Cohen 	int wqe_size;
334e126ba97SEli Cohen 	int wq_size;
335e126ba97SEli Cohen 
336e126ba97SEli Cohen 	/* Sanity check RQ size before proceeding */
337938fe83cSSaeed Mahameed 	if (cap->max_recv_wr > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz)))
338e126ba97SEli Cohen 		return -EINVAL;
339e126ba97SEli Cohen 
340e126ba97SEli Cohen 	if (!has_rq) {
341e126ba97SEli Cohen 		qp->rq.max_gs = 0;
342e126ba97SEli Cohen 		qp->rq.wqe_cnt = 0;
343e126ba97SEli Cohen 		qp->rq.wqe_shift = 0;
3440540d814SNoa Osherovich 		cap->max_recv_wr = 0;
3450540d814SNoa Osherovich 		cap->max_recv_sge = 0;
346e126ba97SEli Cohen 	} else {
347e126ba97SEli Cohen 		if (ucmd) {
348e126ba97SEli Cohen 			qp->rq.wqe_cnt = ucmd->rq_wqe_count;
349002bf228SLeon Romanovsky 			if (ucmd->rq_wqe_shift > BITS_PER_BYTE * sizeof(ucmd->rq_wqe_shift))
350002bf228SLeon Romanovsky 				return -EINVAL;
351e126ba97SEli Cohen 			qp->rq.wqe_shift = ucmd->rq_wqe_shift;
352002bf228SLeon Romanovsky 			if ((1 << qp->rq.wqe_shift) / sizeof(struct mlx5_wqe_data_seg) < qp->wq_sig)
353002bf228SLeon Romanovsky 				return -EINVAL;
354e126ba97SEli Cohen 			qp->rq.max_gs = (1 << qp->rq.wqe_shift) / sizeof(struct mlx5_wqe_data_seg) - qp->wq_sig;
355e126ba97SEli Cohen 			qp->rq.max_post = qp->rq.wqe_cnt;
356e126ba97SEli Cohen 		} else {
357e126ba97SEli Cohen 			wqe_size = qp->wq_sig ? sizeof(struct mlx5_wqe_signature_seg) : 0;
358e126ba97SEli Cohen 			wqe_size += cap->max_recv_sge * sizeof(struct mlx5_wqe_data_seg);
359e126ba97SEli Cohen 			wqe_size = roundup_pow_of_two(wqe_size);
360e126ba97SEli Cohen 			wq_size = roundup_pow_of_two(cap->max_recv_wr) * wqe_size;
361e126ba97SEli Cohen 			wq_size = max_t(int, wq_size, MLX5_SEND_WQE_BB);
362e126ba97SEli Cohen 			qp->rq.wqe_cnt = wq_size / wqe_size;
363938fe83cSSaeed Mahameed 			if (wqe_size > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_rq)) {
364e126ba97SEli Cohen 				mlx5_ib_dbg(dev, "wqe_size %d, max %d\n",
365e126ba97SEli Cohen 					    wqe_size,
366938fe83cSSaeed Mahameed 					    MLX5_CAP_GEN(dev->mdev,
367938fe83cSSaeed Mahameed 							 max_wqe_sz_rq));
368e126ba97SEli Cohen 				return -EINVAL;
369e126ba97SEli Cohen 			}
370e126ba97SEli Cohen 			qp->rq.wqe_shift = ilog2(wqe_size);
371e126ba97SEli Cohen 			qp->rq.max_gs = (1 << qp->rq.wqe_shift) / sizeof(struct mlx5_wqe_data_seg) - qp->wq_sig;
372e126ba97SEli Cohen 			qp->rq.max_post = qp->rq.wqe_cnt;
373e126ba97SEli Cohen 		}
374e126ba97SEli Cohen 	}
375e126ba97SEli Cohen 
376e126ba97SEli Cohen 	return 0;
377e126ba97SEli Cohen }
378e126ba97SEli Cohen 
379f0313965SErez Shitrit static int sq_overhead(struct ib_qp_init_attr *attr)
380e126ba97SEli Cohen {
381618af384SAndi Shyti 	int size = 0;
382e126ba97SEli Cohen 
383f0313965SErez Shitrit 	switch (attr->qp_type) {
384e126ba97SEli Cohen 	case IB_QPT_XRC_INI:
385b125a54bSEli Cohen 		size += sizeof(struct mlx5_wqe_xrc_seg);
386e126ba97SEli Cohen 		/* fall through */
387e126ba97SEli Cohen 	case IB_QPT_RC:
388e126ba97SEli Cohen 		size += sizeof(struct mlx5_wqe_ctrl_seg) +
38975c1657eSLeon Romanovsky 			max(sizeof(struct mlx5_wqe_atomic_seg) +
39075c1657eSLeon Romanovsky 			    sizeof(struct mlx5_wqe_raddr_seg),
39175c1657eSLeon Romanovsky 			    sizeof(struct mlx5_wqe_umr_ctrl_seg) +
392064e5262SIdan Burstein 			    sizeof(struct mlx5_mkey_seg) +
393064e5262SIdan Burstein 			    MLX5_IB_SQ_UMR_INLINE_THRESHOLD /
394064e5262SIdan Burstein 			    MLX5_IB_UMR_OCTOWORD);
395e126ba97SEli Cohen 		break;
396e126ba97SEli Cohen 
397b125a54bSEli Cohen 	case IB_QPT_XRC_TGT:
398b125a54bSEli Cohen 		return 0;
399b125a54bSEli Cohen 
400e126ba97SEli Cohen 	case IB_QPT_UC:
401b125a54bSEli Cohen 		size += sizeof(struct mlx5_wqe_ctrl_seg) +
40275c1657eSLeon Romanovsky 			max(sizeof(struct mlx5_wqe_raddr_seg),
4039e65dc37SEli Cohen 			    sizeof(struct mlx5_wqe_umr_ctrl_seg) +
40475c1657eSLeon Romanovsky 			    sizeof(struct mlx5_mkey_seg));
405e126ba97SEli Cohen 		break;
406e126ba97SEli Cohen 
407e126ba97SEli Cohen 	case IB_QPT_UD:
408f0313965SErez Shitrit 		if (attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO)
409f0313965SErez Shitrit 			size += sizeof(struct mlx5_wqe_eth_pad) +
410f0313965SErez Shitrit 				sizeof(struct mlx5_wqe_eth_seg);
411f0313965SErez Shitrit 		/* fall through */
412e126ba97SEli Cohen 	case IB_QPT_SMI:
413d16e91daSHaggai Eran 	case MLX5_IB_QPT_HW_GSI:
414b125a54bSEli Cohen 		size += sizeof(struct mlx5_wqe_ctrl_seg) +
415e126ba97SEli Cohen 			sizeof(struct mlx5_wqe_datagram_seg);
416e126ba97SEli Cohen 		break;
417e126ba97SEli Cohen 
418e126ba97SEli Cohen 	case MLX5_IB_QPT_REG_UMR:
419b125a54bSEli Cohen 		size += sizeof(struct mlx5_wqe_ctrl_seg) +
420e126ba97SEli Cohen 			sizeof(struct mlx5_wqe_umr_ctrl_seg) +
421e126ba97SEli Cohen 			sizeof(struct mlx5_mkey_seg);
422e126ba97SEli Cohen 		break;
423e126ba97SEli Cohen 
424e126ba97SEli Cohen 	default:
425e126ba97SEli Cohen 		return -EINVAL;
426e126ba97SEli Cohen 	}
427e126ba97SEli Cohen 
428e126ba97SEli Cohen 	return size;
429e126ba97SEli Cohen }
430e126ba97SEli Cohen 
431e126ba97SEli Cohen static int calc_send_wqe(struct ib_qp_init_attr *attr)
432e126ba97SEli Cohen {
433e126ba97SEli Cohen 	int inl_size = 0;
434e126ba97SEli Cohen 	int size;
435e126ba97SEli Cohen 
436f0313965SErez Shitrit 	size = sq_overhead(attr);
437e126ba97SEli Cohen 	if (size < 0)
438e126ba97SEli Cohen 		return size;
439e126ba97SEli Cohen 
440e126ba97SEli Cohen 	if (attr->cap.max_inline_data) {
441e126ba97SEli Cohen 		inl_size = size + sizeof(struct mlx5_wqe_inline_seg) +
442e126ba97SEli Cohen 			attr->cap.max_inline_data;
443e126ba97SEli Cohen 	}
444e126ba97SEli Cohen 
445e126ba97SEli Cohen 	size += attr->cap.max_send_sge * sizeof(struct mlx5_wqe_data_seg);
446c0a6cbb9SIsrael Rukshin 	if (attr->create_flags & IB_QP_CREATE_INTEGRITY_EN &&
447e1e66cc2SSagi Grimberg 	    ALIGN(max_t(int, inl_size, size), MLX5_SEND_WQE_BB) < MLX5_SIG_WQE_SIZE)
448e1e66cc2SSagi Grimberg 		return MLX5_SIG_WQE_SIZE;
449e1e66cc2SSagi Grimberg 	else
450e126ba97SEli Cohen 		return ALIGN(max_t(int, inl_size, size), MLX5_SEND_WQE_BB);
451e126ba97SEli Cohen }
452e126ba97SEli Cohen 
453288c01b7SEli Cohen static int get_send_sge(struct ib_qp_init_attr *attr, int wqe_size)
454288c01b7SEli Cohen {
455288c01b7SEli Cohen 	int max_sge;
456288c01b7SEli Cohen 
457288c01b7SEli Cohen 	if (attr->qp_type == IB_QPT_RC)
458288c01b7SEli Cohen 		max_sge = (min_t(int, wqe_size, 512) -
459288c01b7SEli Cohen 			   sizeof(struct mlx5_wqe_ctrl_seg) -
460288c01b7SEli Cohen 			   sizeof(struct mlx5_wqe_raddr_seg)) /
461288c01b7SEli Cohen 			sizeof(struct mlx5_wqe_data_seg);
462288c01b7SEli Cohen 	else if (attr->qp_type == IB_QPT_XRC_INI)
463288c01b7SEli Cohen 		max_sge = (min_t(int, wqe_size, 512) -
464288c01b7SEli Cohen 			   sizeof(struct mlx5_wqe_ctrl_seg) -
465288c01b7SEli Cohen 			   sizeof(struct mlx5_wqe_xrc_seg) -
466288c01b7SEli Cohen 			   sizeof(struct mlx5_wqe_raddr_seg)) /
467288c01b7SEli Cohen 			sizeof(struct mlx5_wqe_data_seg);
468288c01b7SEli Cohen 	else
469288c01b7SEli Cohen 		max_sge = (wqe_size - sq_overhead(attr)) /
470288c01b7SEli Cohen 			sizeof(struct mlx5_wqe_data_seg);
471288c01b7SEli Cohen 
472288c01b7SEli Cohen 	return min_t(int, max_sge, wqe_size - sq_overhead(attr) /
473288c01b7SEli Cohen 		     sizeof(struct mlx5_wqe_data_seg));
474288c01b7SEli Cohen }
475288c01b7SEli Cohen 
476e126ba97SEli Cohen static int calc_sq_size(struct mlx5_ib_dev *dev, struct ib_qp_init_attr *attr,
477e126ba97SEli Cohen 			struct mlx5_ib_qp *qp)
478e126ba97SEli Cohen {
479e126ba97SEli Cohen 	int wqe_size;
480e126ba97SEli Cohen 	int wq_size;
481e126ba97SEli Cohen 
482e126ba97SEli Cohen 	if (!attr->cap.max_send_wr)
483e126ba97SEli Cohen 		return 0;
484e126ba97SEli Cohen 
485e126ba97SEli Cohen 	wqe_size = calc_send_wqe(attr);
486e126ba97SEli Cohen 	mlx5_ib_dbg(dev, "wqe_size %d\n", wqe_size);
487e126ba97SEli Cohen 	if (wqe_size < 0)
488e126ba97SEli Cohen 		return wqe_size;
489e126ba97SEli Cohen 
490938fe83cSSaeed Mahameed 	if (wqe_size > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)) {
491b125a54bSEli Cohen 		mlx5_ib_dbg(dev, "wqe_size(%d) > max_sq_desc_sz(%d)\n",
492938fe83cSSaeed Mahameed 			    wqe_size, MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq));
493e126ba97SEli Cohen 		return -EINVAL;
494e126ba97SEli Cohen 	}
495e126ba97SEli Cohen 
496f0313965SErez Shitrit 	qp->max_inline_data = wqe_size - sq_overhead(attr) -
497e126ba97SEli Cohen 			      sizeof(struct mlx5_wqe_inline_seg);
498e126ba97SEli Cohen 	attr->cap.max_inline_data = qp->max_inline_data;
499e126ba97SEli Cohen 
500e126ba97SEli Cohen 	wq_size = roundup_pow_of_two(attr->cap.max_send_wr * wqe_size);
501e126ba97SEli Cohen 	qp->sq.wqe_cnt = wq_size / MLX5_SEND_WQE_BB;
502938fe83cSSaeed Mahameed 	if (qp->sq.wqe_cnt > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz))) {
5031974ab9dSBart Van Assche 		mlx5_ib_dbg(dev, "send queue size (%d * %d / %d -> %d) exceeds limits(%d)\n",
5041974ab9dSBart Van Assche 			    attr->cap.max_send_wr, wqe_size, MLX5_SEND_WQE_BB,
505938fe83cSSaeed Mahameed 			    qp->sq.wqe_cnt,
506938fe83cSSaeed Mahameed 			    1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz));
507b125a54bSEli Cohen 		return -ENOMEM;
508b125a54bSEli Cohen 	}
509e126ba97SEli Cohen 	qp->sq.wqe_shift = ilog2(MLX5_SEND_WQE_BB);
510288c01b7SEli Cohen 	qp->sq.max_gs = get_send_sge(attr, wqe_size);
511288c01b7SEli Cohen 	if (qp->sq.max_gs < attr->cap.max_send_sge)
512288c01b7SEli Cohen 		return -ENOMEM;
513288c01b7SEli Cohen 
514288c01b7SEli Cohen 	attr->cap.max_send_sge = qp->sq.max_gs;
515b125a54bSEli Cohen 	qp->sq.max_post = wq_size / wqe_size;
516b125a54bSEli Cohen 	attr->cap.max_send_wr = qp->sq.max_post;
517e126ba97SEli Cohen 
518e126ba97SEli Cohen 	return wq_size;
519e126ba97SEli Cohen }
520e126ba97SEli Cohen 
521e126ba97SEli Cohen static int set_user_buf_size(struct mlx5_ib_dev *dev,
522e126ba97SEli Cohen 			    struct mlx5_ib_qp *qp,
52319098df2Smajd@mellanox.com 			    struct mlx5_ib_create_qp *ucmd,
5240fb2ed66Smajd@mellanox.com 			    struct mlx5_ib_qp_base *base,
5250fb2ed66Smajd@mellanox.com 			    struct ib_qp_init_attr *attr)
526e126ba97SEli Cohen {
527e126ba97SEli Cohen 	int desc_sz = 1 << qp->sq.wqe_shift;
528e126ba97SEli Cohen 
529938fe83cSSaeed Mahameed 	if (desc_sz > MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq)) {
530e126ba97SEli Cohen 		mlx5_ib_warn(dev, "desc_sz %d, max_sq_desc_sz %d\n",
531938fe83cSSaeed Mahameed 			     desc_sz, MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq));
532e126ba97SEli Cohen 		return -EINVAL;
533e126ba97SEli Cohen 	}
534e126ba97SEli Cohen 
535af8b38edSGal Pressman 	if (ucmd->sq_wqe_count && !is_power_of_2(ucmd->sq_wqe_count)) {
536af8b38edSGal Pressman 		mlx5_ib_warn(dev, "sq_wqe_count %d is not a power of two\n",
537af8b38edSGal Pressman 			     ucmd->sq_wqe_count);
538e126ba97SEli Cohen 		return -EINVAL;
539e126ba97SEli Cohen 	}
540e126ba97SEli Cohen 
541e126ba97SEli Cohen 	qp->sq.wqe_cnt = ucmd->sq_wqe_count;
542e126ba97SEli Cohen 
543938fe83cSSaeed Mahameed 	if (qp->sq.wqe_cnt > (1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz))) {
544e126ba97SEli Cohen 		mlx5_ib_warn(dev, "wqe_cnt %d, max_wqes %d\n",
545938fe83cSSaeed Mahameed 			     qp->sq.wqe_cnt,
546938fe83cSSaeed Mahameed 			     1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz));
547e126ba97SEli Cohen 		return -EINVAL;
548e126ba97SEli Cohen 	}
549e126ba97SEli Cohen 
550c2e53b2cSYishai Hadas 	if (attr->qp_type == IB_QPT_RAW_PACKET ||
551c2e53b2cSYishai Hadas 	    qp->flags & MLX5_IB_QP_UNDERLAY) {
5520fb2ed66Smajd@mellanox.com 		base->ubuffer.buf_size = qp->rq.wqe_cnt << qp->rq.wqe_shift;
5530fb2ed66Smajd@mellanox.com 		qp->raw_packet_qp.sq.ubuffer.buf_size = qp->sq.wqe_cnt << 6;
5540fb2ed66Smajd@mellanox.com 	} else {
55519098df2Smajd@mellanox.com 		base->ubuffer.buf_size = (qp->rq.wqe_cnt << qp->rq.wqe_shift) +
556e126ba97SEli Cohen 					 (qp->sq.wqe_cnt << 6);
5570fb2ed66Smajd@mellanox.com 	}
558e126ba97SEli Cohen 
559e126ba97SEli Cohen 	return 0;
560e126ba97SEli Cohen }
561e126ba97SEli Cohen 
562e126ba97SEli Cohen static int qp_has_rq(struct ib_qp_init_attr *attr)
563e126ba97SEli Cohen {
564e126ba97SEli Cohen 	if (attr->qp_type == IB_QPT_XRC_INI ||
565e126ba97SEli Cohen 	    attr->qp_type == IB_QPT_XRC_TGT || attr->srq ||
566e126ba97SEli Cohen 	    attr->qp_type == MLX5_IB_QPT_REG_UMR ||
567e126ba97SEli Cohen 	    !attr->cap.max_recv_wr)
568e126ba97SEli Cohen 		return 0;
569e126ba97SEli Cohen 
570e126ba97SEli Cohen 	return 1;
571e126ba97SEli Cohen }
572e126ba97SEli Cohen 
5730b80c14fSEli Cohen enum {
5740b80c14fSEli Cohen 	/* this is the first blue flame register in the array of bfregs assigned
5750b80c14fSEli Cohen 	 * to a processes. Since we do not use it for blue flame but rather
5760b80c14fSEli Cohen 	 * regular 64 bit doorbells, we do not need a lock for maintaiing
5770b80c14fSEli Cohen 	 * "odd/even" order
5780b80c14fSEli Cohen 	 */
5790b80c14fSEli Cohen 	NUM_NON_BLUE_FLAME_BFREGS = 1,
5800b80c14fSEli Cohen };
5810b80c14fSEli Cohen 
582b037c29aSEli Cohen static int max_bfregs(struct mlx5_ib_dev *dev, struct mlx5_bfreg_info *bfregi)
583b037c29aSEli Cohen {
58431a78a5aSYishai Hadas 	return get_num_static_uars(dev, bfregi) * MLX5_NON_FP_BFREGS_PER_UAR;
585b037c29aSEli Cohen }
586b037c29aSEli Cohen 
587b037c29aSEli Cohen static int num_med_bfreg(struct mlx5_ib_dev *dev,
588b037c29aSEli Cohen 			 struct mlx5_bfreg_info *bfregi)
589c1be5232SEli Cohen {
590c1be5232SEli Cohen 	int n;
591c1be5232SEli Cohen 
592b037c29aSEli Cohen 	n = max_bfregs(dev, bfregi) - bfregi->num_low_latency_bfregs -
593b037c29aSEli Cohen 	    NUM_NON_BLUE_FLAME_BFREGS;
594c1be5232SEli Cohen 
595c1be5232SEli Cohen 	return n >= 0 ? n : 0;
596c1be5232SEli Cohen }
597c1be5232SEli Cohen 
59818b0362eSYishai Hadas static int first_med_bfreg(struct mlx5_ib_dev *dev,
59918b0362eSYishai Hadas 			   struct mlx5_bfreg_info *bfregi)
60018b0362eSYishai Hadas {
60118b0362eSYishai Hadas 	return num_med_bfreg(dev, bfregi) ? 1 : -ENOMEM;
60218b0362eSYishai Hadas }
60318b0362eSYishai Hadas 
604b037c29aSEli Cohen static int first_hi_bfreg(struct mlx5_ib_dev *dev,
605b037c29aSEli Cohen 			  struct mlx5_bfreg_info *bfregi)
606c1be5232SEli Cohen {
607c1be5232SEli Cohen 	int med;
608c1be5232SEli Cohen 
609b037c29aSEli Cohen 	med = num_med_bfreg(dev, bfregi);
610b037c29aSEli Cohen 	return ++med;
611c1be5232SEli Cohen }
612c1be5232SEli Cohen 
613b037c29aSEli Cohen static int alloc_high_class_bfreg(struct mlx5_ib_dev *dev,
614b037c29aSEli Cohen 				  struct mlx5_bfreg_info *bfregi)
615e126ba97SEli Cohen {
616e126ba97SEli Cohen 	int i;
617e126ba97SEli Cohen 
618b037c29aSEli Cohen 	for (i = first_hi_bfreg(dev, bfregi); i < max_bfregs(dev, bfregi); i++) {
619b037c29aSEli Cohen 		if (!bfregi->count[i]) {
6202f5ff264SEli Cohen 			bfregi->count[i]++;
621e126ba97SEli Cohen 			return i;
622e126ba97SEli Cohen 		}
623e126ba97SEli Cohen 	}
624e126ba97SEli Cohen 
625e126ba97SEli Cohen 	return -ENOMEM;
626e126ba97SEli Cohen }
627e126ba97SEli Cohen 
628b037c29aSEli Cohen static int alloc_med_class_bfreg(struct mlx5_ib_dev *dev,
629b037c29aSEli Cohen 				 struct mlx5_bfreg_info *bfregi)
630e126ba97SEli Cohen {
63118b0362eSYishai Hadas 	int minidx = first_med_bfreg(dev, bfregi);
632e126ba97SEli Cohen 	int i;
633e126ba97SEli Cohen 
63418b0362eSYishai Hadas 	if (minidx < 0)
63518b0362eSYishai Hadas 		return minidx;
63618b0362eSYishai Hadas 
63718b0362eSYishai Hadas 	for (i = minidx; i < first_hi_bfreg(dev, bfregi); i++) {
6382f5ff264SEli Cohen 		if (bfregi->count[i] < bfregi->count[minidx])
639e126ba97SEli Cohen 			minidx = i;
6400b80c14fSEli Cohen 		if (!bfregi->count[minidx])
6410b80c14fSEli Cohen 			break;
642e126ba97SEli Cohen 	}
643e126ba97SEli Cohen 
6442f5ff264SEli Cohen 	bfregi->count[minidx]++;
645e126ba97SEli Cohen 	return minidx;
646e126ba97SEli Cohen }
647e126ba97SEli Cohen 
648b037c29aSEli Cohen static int alloc_bfreg(struct mlx5_ib_dev *dev,
649ffaf58deSLeon Romanovsky 		       struct mlx5_bfreg_info *bfregi)
650e126ba97SEli Cohen {
651ffaf58deSLeon Romanovsky 	int bfregn = -ENOMEM;
652e126ba97SEli Cohen 
6532f5ff264SEli Cohen 	mutex_lock(&bfregi->lock);
654ffaf58deSLeon Romanovsky 	if (bfregi->ver >= 2) {
655ffaf58deSLeon Romanovsky 		bfregn = alloc_high_class_bfreg(dev, bfregi);
656ffaf58deSLeon Romanovsky 		if (bfregn < 0)
657ffaf58deSLeon Romanovsky 			bfregn = alloc_med_class_bfreg(dev, bfregi);
658ffaf58deSLeon Romanovsky 	}
659ffaf58deSLeon Romanovsky 
660ffaf58deSLeon Romanovsky 	if (bfregn < 0) {
6610b80c14fSEli Cohen 		BUILD_BUG_ON(NUM_NON_BLUE_FLAME_BFREGS != 1);
6622f5ff264SEli Cohen 		bfregn = 0;
6632f5ff264SEli Cohen 		bfregi->count[bfregn]++;
664e126ba97SEli Cohen 	}
6652f5ff264SEli Cohen 	mutex_unlock(&bfregi->lock);
666e126ba97SEli Cohen 
6672f5ff264SEli Cohen 	return bfregn;
668e126ba97SEli Cohen }
669e126ba97SEli Cohen 
6704ed131d0SYishai Hadas void mlx5_ib_free_bfreg(struct mlx5_ib_dev *dev, struct mlx5_bfreg_info *bfregi, int bfregn)
671e126ba97SEli Cohen {
6722f5ff264SEli Cohen 	mutex_lock(&bfregi->lock);
673b037c29aSEli Cohen 	bfregi->count[bfregn]--;
6742f5ff264SEli Cohen 	mutex_unlock(&bfregi->lock);
675e126ba97SEli Cohen }
676e126ba97SEli Cohen 
677e126ba97SEli Cohen static enum mlx5_qp_state to_mlx5_state(enum ib_qp_state state)
678e126ba97SEli Cohen {
679e126ba97SEli Cohen 	switch (state) {
680e126ba97SEli Cohen 	case IB_QPS_RESET:	return MLX5_QP_STATE_RST;
681e126ba97SEli Cohen 	case IB_QPS_INIT:	return MLX5_QP_STATE_INIT;
682e126ba97SEli Cohen 	case IB_QPS_RTR:	return MLX5_QP_STATE_RTR;
683e126ba97SEli Cohen 	case IB_QPS_RTS:	return MLX5_QP_STATE_RTS;
684e126ba97SEli Cohen 	case IB_QPS_SQD:	return MLX5_QP_STATE_SQD;
685e126ba97SEli Cohen 	case IB_QPS_SQE:	return MLX5_QP_STATE_SQER;
686e126ba97SEli Cohen 	case IB_QPS_ERR:	return MLX5_QP_STATE_ERR;
687e126ba97SEli Cohen 	default:		return -1;
688e126ba97SEli Cohen 	}
689e126ba97SEli Cohen }
690e126ba97SEli Cohen 
691e126ba97SEli Cohen static int to_mlx5_st(enum ib_qp_type type)
692e126ba97SEli Cohen {
693e126ba97SEli Cohen 	switch (type) {
694e126ba97SEli Cohen 	case IB_QPT_RC:			return MLX5_QP_ST_RC;
695e126ba97SEli Cohen 	case IB_QPT_UC:			return MLX5_QP_ST_UC;
696e126ba97SEli Cohen 	case IB_QPT_UD:			return MLX5_QP_ST_UD;
697e126ba97SEli Cohen 	case MLX5_IB_QPT_REG_UMR:	return MLX5_QP_ST_REG_UMR;
698e126ba97SEli Cohen 	case IB_QPT_XRC_INI:
699e126ba97SEli Cohen 	case IB_QPT_XRC_TGT:		return MLX5_QP_ST_XRC;
700e126ba97SEli Cohen 	case IB_QPT_SMI:		return MLX5_QP_ST_QP0;
701d16e91daSHaggai Eran 	case MLX5_IB_QPT_HW_GSI:	return MLX5_QP_ST_QP1;
702c32a4f29SMoni Shoua 	case MLX5_IB_QPT_DCI:		return MLX5_QP_ST_DCI;
703e126ba97SEli Cohen 	case IB_QPT_RAW_IPV6:		return MLX5_QP_ST_RAW_IPV6;
704e126ba97SEli Cohen 	case IB_QPT_RAW_PACKET:
7050fb2ed66Smajd@mellanox.com 	case IB_QPT_RAW_ETHERTYPE:	return MLX5_QP_ST_RAW_ETHERTYPE;
706e126ba97SEli Cohen 	case IB_QPT_MAX:
707e126ba97SEli Cohen 	default:		return -EINVAL;
708e126ba97SEli Cohen 	}
709e126ba97SEli Cohen }
710e126ba97SEli Cohen 
71189ea94a7SMaor Gottlieb static void mlx5_ib_lock_cqs(struct mlx5_ib_cq *send_cq,
71289ea94a7SMaor Gottlieb 			     struct mlx5_ib_cq *recv_cq);
71389ea94a7SMaor Gottlieb static void mlx5_ib_unlock_cqs(struct mlx5_ib_cq *send_cq,
71489ea94a7SMaor Gottlieb 			       struct mlx5_ib_cq *recv_cq);
71589ea94a7SMaor Gottlieb 
7167c043e90SYishai Hadas int bfregn_to_uar_index(struct mlx5_ib_dev *dev,
71705f58cebSLeon Romanovsky 			struct mlx5_bfreg_info *bfregi, u32 bfregn,
7181ee47ab3SYishai Hadas 			bool dyn_bfreg)
719e126ba97SEli Cohen {
72005f58cebSLeon Romanovsky 	unsigned int bfregs_per_sys_page;
72105f58cebSLeon Romanovsky 	u32 index_of_sys_page;
72205f58cebSLeon Romanovsky 	u32 offset;
723b037c29aSEli Cohen 
724b037c29aSEli Cohen 	bfregs_per_sys_page = get_uars_per_sys_page(dev, bfregi->lib_uar_4k) *
725b037c29aSEli Cohen 				MLX5_NON_FP_BFREGS_PER_UAR;
726b037c29aSEli Cohen 	index_of_sys_page = bfregn / bfregs_per_sys_page;
727b037c29aSEli Cohen 
72805f58cebSLeon Romanovsky 	if (dyn_bfreg) {
72905f58cebSLeon Romanovsky 		index_of_sys_page += bfregi->num_static_sys_pages;
73005f58cebSLeon Romanovsky 
7317c043e90SYishai Hadas 		if (index_of_sys_page >= bfregi->num_sys_pages)
7327c043e90SYishai Hadas 			return -EINVAL;
7337c043e90SYishai Hadas 
7341ee47ab3SYishai Hadas 		if (bfregn > bfregi->num_dyn_bfregs ||
7351ee47ab3SYishai Hadas 		    bfregi->sys_pages[index_of_sys_page] == MLX5_IB_INVALID_UAR_INDEX) {
7361ee47ab3SYishai Hadas 			mlx5_ib_dbg(dev, "Invalid dynamic uar index\n");
7371ee47ab3SYishai Hadas 			return -EINVAL;
7381ee47ab3SYishai Hadas 		}
7391ee47ab3SYishai Hadas 	}
740b037c29aSEli Cohen 
7411ee47ab3SYishai Hadas 	offset = bfregn % bfregs_per_sys_page / MLX5_NON_FP_BFREGS_PER_UAR;
742b037c29aSEli Cohen 	return bfregi->sys_pages[index_of_sys_page] + offset;
743e126ba97SEli Cohen }
744e126ba97SEli Cohen 
745b0ea0fa5SJason Gunthorpe static int mlx5_ib_umem_get(struct mlx5_ib_dev *dev, struct ib_udata *udata,
74619098df2Smajd@mellanox.com 			    unsigned long addr, size_t size,
747b0ea0fa5SJason Gunthorpe 			    struct ib_umem **umem, int *npages, int *page_shift,
748b0ea0fa5SJason Gunthorpe 			    int *ncont, u32 *offset)
74919098df2Smajd@mellanox.com {
75019098df2Smajd@mellanox.com 	int err;
75119098df2Smajd@mellanox.com 
75272b894b0SChristoph Hellwig 	*umem = ib_umem_get(udata, addr, size, 0);
75319098df2Smajd@mellanox.com 	if (IS_ERR(*umem)) {
75419098df2Smajd@mellanox.com 		mlx5_ib_dbg(dev, "umem_get failed\n");
75519098df2Smajd@mellanox.com 		return PTR_ERR(*umem);
75619098df2Smajd@mellanox.com 	}
75719098df2Smajd@mellanox.com 
758762f899aSMajd Dibbiny 	mlx5_ib_cont_pages(*umem, addr, 0, npages, page_shift, ncont, NULL);
75919098df2Smajd@mellanox.com 
76019098df2Smajd@mellanox.com 	err = mlx5_ib_get_buf_offset(addr, *page_shift, offset);
76119098df2Smajd@mellanox.com 	if (err) {
76219098df2Smajd@mellanox.com 		mlx5_ib_warn(dev, "bad offset\n");
76319098df2Smajd@mellanox.com 		goto err_umem;
76419098df2Smajd@mellanox.com 	}
76519098df2Smajd@mellanox.com 
76619098df2Smajd@mellanox.com 	mlx5_ib_dbg(dev, "addr 0x%lx, size %zu, npages %d, page_shift %d, ncont %d, offset %d\n",
76719098df2Smajd@mellanox.com 		    addr, size, *npages, *page_shift, *ncont, *offset);
76819098df2Smajd@mellanox.com 
76919098df2Smajd@mellanox.com 	return 0;
77019098df2Smajd@mellanox.com 
77119098df2Smajd@mellanox.com err_umem:
77219098df2Smajd@mellanox.com 	ib_umem_release(*umem);
77319098df2Smajd@mellanox.com 	*umem = NULL;
77419098df2Smajd@mellanox.com 
77519098df2Smajd@mellanox.com 	return err;
77619098df2Smajd@mellanox.com }
77719098df2Smajd@mellanox.com 
778fe248c3aSMaor Gottlieb static void destroy_user_rq(struct mlx5_ib_dev *dev, struct ib_pd *pd,
779bdeacabdSShamir Rabinovitch 			    struct mlx5_ib_rwq *rwq, struct ib_udata *udata)
78079b20a6cSYishai Hadas {
781bdeacabdSShamir Rabinovitch 	struct mlx5_ib_ucontext *context =
782bdeacabdSShamir Rabinovitch 		rdma_udata_to_drv_context(
783bdeacabdSShamir Rabinovitch 			udata,
784bdeacabdSShamir Rabinovitch 			struct mlx5_ib_ucontext,
785bdeacabdSShamir Rabinovitch 			ibucontext);
78679b20a6cSYishai Hadas 
787fe248c3aSMaor Gottlieb 	if (rwq->create_flags & MLX5_IB_WQ_FLAGS_DELAY_DROP)
788fe248c3aSMaor Gottlieb 		atomic_dec(&dev->delay_drop.rqs_cnt);
789fe248c3aSMaor Gottlieb 
79079b20a6cSYishai Hadas 	mlx5_ib_db_unmap_user(context, &rwq->db);
79179b20a6cSYishai Hadas 	ib_umem_release(rwq->umem);
79279b20a6cSYishai Hadas }
79379b20a6cSYishai Hadas 
79479b20a6cSYishai Hadas static int create_user_rq(struct mlx5_ib_dev *dev, struct ib_pd *pd,
795b0ea0fa5SJason Gunthorpe 			  struct ib_udata *udata, struct mlx5_ib_rwq *rwq,
79679b20a6cSYishai Hadas 			  struct mlx5_ib_create_wq *ucmd)
79779b20a6cSYishai Hadas {
79889944450SShamir Rabinovitch 	struct mlx5_ib_ucontext *ucontext = rdma_udata_to_drv_context(
79989944450SShamir Rabinovitch 		udata, struct mlx5_ib_ucontext, ibucontext);
80079b20a6cSYishai Hadas 	int page_shift = 0;
80179b20a6cSYishai Hadas 	int npages;
80279b20a6cSYishai Hadas 	u32 offset = 0;
80379b20a6cSYishai Hadas 	int ncont = 0;
80479b20a6cSYishai Hadas 	int err;
80579b20a6cSYishai Hadas 
80679b20a6cSYishai Hadas 	if (!ucmd->buf_addr)
80779b20a6cSYishai Hadas 		return -EINVAL;
80879b20a6cSYishai Hadas 
80972b894b0SChristoph Hellwig 	rwq->umem = ib_umem_get(udata, ucmd->buf_addr, rwq->buf_size, 0);
81079b20a6cSYishai Hadas 	if (IS_ERR(rwq->umem)) {
81179b20a6cSYishai Hadas 		mlx5_ib_dbg(dev, "umem_get failed\n");
81279b20a6cSYishai Hadas 		err = PTR_ERR(rwq->umem);
81379b20a6cSYishai Hadas 		return err;
81479b20a6cSYishai Hadas 	}
81579b20a6cSYishai Hadas 
816762f899aSMajd Dibbiny 	mlx5_ib_cont_pages(rwq->umem, ucmd->buf_addr, 0, &npages, &page_shift,
81779b20a6cSYishai Hadas 			   &ncont, NULL);
81879b20a6cSYishai Hadas 	err = mlx5_ib_get_buf_offset(ucmd->buf_addr, page_shift,
81979b20a6cSYishai Hadas 				     &rwq->rq_page_offset);
82079b20a6cSYishai Hadas 	if (err) {
82179b20a6cSYishai Hadas 		mlx5_ib_warn(dev, "bad offset\n");
82279b20a6cSYishai Hadas 		goto err_umem;
82379b20a6cSYishai Hadas 	}
82479b20a6cSYishai Hadas 
82579b20a6cSYishai Hadas 	rwq->rq_num_pas = ncont;
82679b20a6cSYishai Hadas 	rwq->page_shift = page_shift;
82779b20a6cSYishai Hadas 	rwq->log_page_size =  page_shift - MLX5_ADAPTER_PAGE_SHIFT;
82879b20a6cSYishai Hadas 	rwq->wq_sig = !!(ucmd->flags & MLX5_WQ_FLAG_SIGNATURE);
82979b20a6cSYishai Hadas 
83079b20a6cSYishai Hadas 	mlx5_ib_dbg(dev, "addr 0x%llx, size %zd, npages %d, page_shift %d, ncont %d, offset %d\n",
83179b20a6cSYishai Hadas 		    (unsigned long long)ucmd->buf_addr, rwq->buf_size,
83279b20a6cSYishai Hadas 		    npages, page_shift, ncont, offset);
83379b20a6cSYishai Hadas 
83489944450SShamir Rabinovitch 	err = mlx5_ib_db_map_user(ucontext, udata, ucmd->db_addr, &rwq->db);
83579b20a6cSYishai Hadas 	if (err) {
83679b20a6cSYishai Hadas 		mlx5_ib_dbg(dev, "map failed\n");
83779b20a6cSYishai Hadas 		goto err_umem;
83879b20a6cSYishai Hadas 	}
83979b20a6cSYishai Hadas 
84079b20a6cSYishai Hadas 	rwq->create_type = MLX5_WQ_USER;
84179b20a6cSYishai Hadas 	return 0;
84279b20a6cSYishai Hadas 
84379b20a6cSYishai Hadas err_umem:
84479b20a6cSYishai Hadas 	ib_umem_release(rwq->umem);
84579b20a6cSYishai Hadas 	return err;
84679b20a6cSYishai Hadas }
84779b20a6cSYishai Hadas 
848b037c29aSEli Cohen static int adjust_bfregn(struct mlx5_ib_dev *dev,
849b037c29aSEli Cohen 			 struct mlx5_bfreg_info *bfregi, int bfregn)
850b037c29aSEli Cohen {
851b037c29aSEli Cohen 	return bfregn / MLX5_NON_FP_BFREGS_PER_UAR * MLX5_BFREGS_PER_UAR +
852b037c29aSEli Cohen 				bfregn % MLX5_NON_FP_BFREGS_PER_UAR;
853b037c29aSEli Cohen }
854b037c29aSEli Cohen 
855e126ba97SEli Cohen static int create_user_qp(struct mlx5_ib_dev *dev, struct ib_pd *pd,
856e126ba97SEli Cohen 			  struct mlx5_ib_qp *qp, struct ib_udata *udata,
8570fb2ed66Smajd@mellanox.com 			  struct ib_qp_init_attr *attr,
85809a7d9ecSSaeed Mahameed 			  u32 **in,
85919098df2Smajd@mellanox.com 			  struct mlx5_ib_create_qp_resp *resp, int *inlen,
86019098df2Smajd@mellanox.com 			  struct mlx5_ib_qp_base *base)
861e126ba97SEli Cohen {
862e126ba97SEli Cohen 	struct mlx5_ib_ucontext *context;
863e126ba97SEli Cohen 	struct mlx5_ib_create_qp ucmd;
86419098df2Smajd@mellanox.com 	struct mlx5_ib_ubuffer *ubuffer = &base->ubuffer;
8659e9c47d0SEli Cohen 	int page_shift = 0;
8661ee47ab3SYishai Hadas 	int uar_index = 0;
867e126ba97SEli Cohen 	int npages;
8689e9c47d0SEli Cohen 	u32 offset = 0;
8692f5ff264SEli Cohen 	int bfregn;
8709e9c47d0SEli Cohen 	int ncont = 0;
87109a7d9ecSSaeed Mahameed 	__be64 *pas;
87209a7d9ecSSaeed Mahameed 	void *qpc;
873e126ba97SEli Cohen 	int err;
8745aa3771dSYishai Hadas 	u16 uid;
875e126ba97SEli Cohen 
876e126ba97SEli Cohen 	err = ib_copy_from_udata(&ucmd, udata, sizeof(ucmd));
877e126ba97SEli Cohen 	if (err) {
878e126ba97SEli Cohen 		mlx5_ib_dbg(dev, "copy failed\n");
879e126ba97SEli Cohen 		return err;
880e126ba97SEli Cohen 	}
881e126ba97SEli Cohen 
88289944450SShamir Rabinovitch 	context = rdma_udata_to_drv_context(udata, struct mlx5_ib_ucontext,
88389944450SShamir Rabinovitch 					    ibucontext);
8841ee47ab3SYishai Hadas 	if (ucmd.flags & MLX5_QP_FLAG_BFREG_INDEX) {
8851ee47ab3SYishai Hadas 		uar_index = bfregn_to_uar_index(dev, &context->bfregi,
8861ee47ab3SYishai Hadas 						ucmd.bfreg_index, true);
8871ee47ab3SYishai Hadas 		if (uar_index < 0)
8881ee47ab3SYishai Hadas 			return uar_index;
8891ee47ab3SYishai Hadas 
8901ee47ab3SYishai Hadas 		bfregn = MLX5_IB_INVALID_BFREG;
8911ee47ab3SYishai Hadas 	} else if (qp->flags & MLX5_IB_QP_CROSS_CHANNEL) {
892e126ba97SEli Cohen 		/*
893e126ba97SEli Cohen 		 * TBD: should come from the verbs when we have the API
894e126ba97SEli Cohen 		 */
895051f2630SLeon Romanovsky 		/* In CROSS_CHANNEL CQ and QP must use the same UAR */
8962f5ff264SEli Cohen 		bfregn = MLX5_CROSS_CHANNEL_BFREG;
8971ee47ab3SYishai Hadas 	}
898051f2630SLeon Romanovsky 	else {
899ffaf58deSLeon Romanovsky 		bfregn = alloc_bfreg(dev, &context->bfregi);
900ffaf58deSLeon Romanovsky 		if (bfregn < 0)
9012f5ff264SEli Cohen 			return bfregn;
902e126ba97SEli Cohen 	}
903e126ba97SEli Cohen 
9042f5ff264SEli Cohen 	mlx5_ib_dbg(dev, "bfregn 0x%x, uar_index 0x%x\n", bfregn, uar_index);
9051ee47ab3SYishai Hadas 	if (bfregn != MLX5_IB_INVALID_BFREG)
9061ee47ab3SYishai Hadas 		uar_index = bfregn_to_uar_index(dev, &context->bfregi, bfregn,
9071ee47ab3SYishai Hadas 						false);
908e126ba97SEli Cohen 
90948fea837SHaggai Eran 	qp->rq.offset = 0;
91048fea837SHaggai Eran 	qp->sq.wqe_shift = ilog2(MLX5_SEND_WQE_BB);
91148fea837SHaggai Eran 	qp->sq.offset = qp->rq.wqe_cnt << qp->rq.wqe_shift;
91248fea837SHaggai Eran 
9130fb2ed66Smajd@mellanox.com 	err = set_user_buf_size(dev, qp, &ucmd, base, attr);
914e126ba97SEli Cohen 	if (err)
9152f5ff264SEli Cohen 		goto err_bfreg;
916e126ba97SEli Cohen 
91719098df2Smajd@mellanox.com 	if (ucmd.buf_addr && ubuffer->buf_size) {
91819098df2Smajd@mellanox.com 		ubuffer->buf_addr = ucmd.buf_addr;
919b0ea0fa5SJason Gunthorpe 		err = mlx5_ib_umem_get(dev, udata, ubuffer->buf_addr,
920b0ea0fa5SJason Gunthorpe 				       ubuffer->buf_size, &ubuffer->umem,
921b0ea0fa5SJason Gunthorpe 				       &npages, &page_shift, &ncont, &offset);
92219098df2Smajd@mellanox.com 		if (err)
9232f5ff264SEli Cohen 			goto err_bfreg;
9249e9c47d0SEli Cohen 	} else {
92519098df2Smajd@mellanox.com 		ubuffer->umem = NULL;
9269e9c47d0SEli Cohen 	}
927e126ba97SEli Cohen 
92809a7d9ecSSaeed Mahameed 	*inlen = MLX5_ST_SZ_BYTES(create_qp_in) +
92909a7d9ecSSaeed Mahameed 		 MLX5_FLD_SZ_BYTES(create_qp_in, pas[0]) * ncont;
9301b9a07eeSLeon Romanovsky 	*in = kvzalloc(*inlen, GFP_KERNEL);
931e126ba97SEli Cohen 	if (!*in) {
932e126ba97SEli Cohen 		err = -ENOMEM;
933e126ba97SEli Cohen 		goto err_umem;
934e126ba97SEli Cohen 	}
935e126ba97SEli Cohen 
9367422edceSYishai Hadas 	uid = (attr->qp_type != IB_QPT_XRC_TGT &&
9377422edceSYishai Hadas 	       attr->qp_type != IB_QPT_XRC_INI) ? to_mpd(pd)->uid : 0;
9385aa3771dSYishai Hadas 	MLX5_SET(create_qp_in, *in, uid, uid);
93909a7d9ecSSaeed Mahameed 	pas = (__be64 *)MLX5_ADDR_OF(create_qp_in, *in, pas);
94009a7d9ecSSaeed Mahameed 	if (ubuffer->umem)
94109a7d9ecSSaeed Mahameed 		mlx5_ib_populate_pas(dev, ubuffer->umem, page_shift, pas, 0);
94209a7d9ecSSaeed Mahameed 
94309a7d9ecSSaeed Mahameed 	qpc = MLX5_ADDR_OF(create_qp_in, *in, qpc);
94409a7d9ecSSaeed Mahameed 
94509a7d9ecSSaeed Mahameed 	MLX5_SET(qpc, qpc, log_page_size, page_shift - MLX5_ADAPTER_PAGE_SHIFT);
94609a7d9ecSSaeed Mahameed 	MLX5_SET(qpc, qpc, page_offset, offset);
94709a7d9ecSSaeed Mahameed 
94809a7d9ecSSaeed Mahameed 	MLX5_SET(qpc, qpc, uar_page, uar_index);
9491ee47ab3SYishai Hadas 	if (bfregn != MLX5_IB_INVALID_BFREG)
950b037c29aSEli Cohen 		resp->bfreg_index = adjust_bfregn(dev, &context->bfregi, bfregn);
9511ee47ab3SYishai Hadas 	else
9521ee47ab3SYishai Hadas 		resp->bfreg_index = MLX5_IB_INVALID_BFREG;
9532f5ff264SEli Cohen 	qp->bfregn = bfregn;
954e126ba97SEli Cohen 
955b0ea0fa5SJason Gunthorpe 	err = mlx5_ib_db_map_user(context, udata, ucmd.db_addr, &qp->db);
956e126ba97SEli Cohen 	if (err) {
957e126ba97SEli Cohen 		mlx5_ib_dbg(dev, "map failed\n");
958e126ba97SEli Cohen 		goto err_free;
959e126ba97SEli Cohen 	}
960e126ba97SEli Cohen 
96141d902cbSJason Gunthorpe 	err = ib_copy_to_udata(udata, resp, min(udata->outlen, sizeof(*resp)));
962e126ba97SEli Cohen 	if (err) {
963e126ba97SEli Cohen 		mlx5_ib_dbg(dev, "copy failed\n");
964e126ba97SEli Cohen 		goto err_unmap;
965e126ba97SEli Cohen 	}
966e126ba97SEli Cohen 	qp->create_type = MLX5_QP_USER;
967e126ba97SEli Cohen 
968e126ba97SEli Cohen 	return 0;
969e126ba97SEli Cohen 
970e126ba97SEli Cohen err_unmap:
971e126ba97SEli Cohen 	mlx5_ib_db_unmap_user(context, &qp->db);
972e126ba97SEli Cohen 
973e126ba97SEli Cohen err_free:
974479163f4SAl Viro 	kvfree(*in);
975e126ba97SEli Cohen 
976e126ba97SEli Cohen err_umem:
97719098df2Smajd@mellanox.com 	ib_umem_release(ubuffer->umem);
978e126ba97SEli Cohen 
9792f5ff264SEli Cohen err_bfreg:
9801ee47ab3SYishai Hadas 	if (bfregn != MLX5_IB_INVALID_BFREG)
9814ed131d0SYishai Hadas 		mlx5_ib_free_bfreg(dev, &context->bfregi, bfregn);
982e126ba97SEli Cohen 	return err;
983e126ba97SEli Cohen }
984e126ba97SEli Cohen 
985b037c29aSEli Cohen static void destroy_qp_user(struct mlx5_ib_dev *dev, struct ib_pd *pd,
986bdeacabdSShamir Rabinovitch 			    struct mlx5_ib_qp *qp, struct mlx5_ib_qp_base *base,
987bdeacabdSShamir Rabinovitch 			    struct ib_udata *udata)
988e126ba97SEli Cohen {
989bdeacabdSShamir Rabinovitch 	struct mlx5_ib_ucontext *context =
990bdeacabdSShamir Rabinovitch 		rdma_udata_to_drv_context(
991bdeacabdSShamir Rabinovitch 			udata,
992bdeacabdSShamir Rabinovitch 			struct mlx5_ib_ucontext,
993bdeacabdSShamir Rabinovitch 			ibucontext);
994e126ba97SEli Cohen 
995e126ba97SEli Cohen 	mlx5_ib_db_unmap_user(context, &qp->db);
99619098df2Smajd@mellanox.com 	ib_umem_release(base->ubuffer.umem);
9971ee47ab3SYishai Hadas 
9981ee47ab3SYishai Hadas 	/*
9991ee47ab3SYishai Hadas 	 * Free only the BFREGs which are handled by the kernel.
10001ee47ab3SYishai Hadas 	 * BFREGs of UARs allocated dynamically are handled by user.
10011ee47ab3SYishai Hadas 	 */
10021ee47ab3SYishai Hadas 	if (qp->bfregn != MLX5_IB_INVALID_BFREG)
10034ed131d0SYishai Hadas 		mlx5_ib_free_bfreg(dev, &context->bfregi, qp->bfregn);
1004e126ba97SEli Cohen }
1005e126ba97SEli Cohen 
100634f4c955SGuy Levi /* get_sq_edge - Get the next nearby edge.
100734f4c955SGuy Levi  *
100834f4c955SGuy Levi  * An 'edge' is defined as the first following address after the end
100934f4c955SGuy Levi  * of the fragment or the SQ. Accordingly, during the WQE construction
101034f4c955SGuy Levi  * which repetitively increases the pointer to write the next data, it
101134f4c955SGuy Levi  * simply should check if it gets to an edge.
101234f4c955SGuy Levi  *
101334f4c955SGuy Levi  * @sq - SQ buffer.
101434f4c955SGuy Levi  * @idx - Stride index in the SQ buffer.
101534f4c955SGuy Levi  *
101634f4c955SGuy Levi  * Return:
101734f4c955SGuy Levi  *	The new edge.
101834f4c955SGuy Levi  */
101934f4c955SGuy Levi static void *get_sq_edge(struct mlx5_ib_wq *sq, u32 idx)
102034f4c955SGuy Levi {
102134f4c955SGuy Levi 	void *fragment_end;
102234f4c955SGuy Levi 
102334f4c955SGuy Levi 	fragment_end = mlx5_frag_buf_get_wqe
102434f4c955SGuy Levi 		(&sq->fbc,
102534f4c955SGuy Levi 		 mlx5_frag_buf_get_idx_last_contig_stride(&sq->fbc, idx));
102634f4c955SGuy Levi 
102734f4c955SGuy Levi 	return fragment_end + MLX5_SEND_WQE_BB;
102834f4c955SGuy Levi }
102934f4c955SGuy Levi 
1030e126ba97SEli Cohen static int create_kernel_qp(struct mlx5_ib_dev *dev,
1031e126ba97SEli Cohen 			    struct ib_qp_init_attr *init_attr,
1032e126ba97SEli Cohen 			    struct mlx5_ib_qp *qp,
103309a7d9ecSSaeed Mahameed 			    u32 **in, int *inlen,
103419098df2Smajd@mellanox.com 			    struct mlx5_ib_qp_base *base)
1035e126ba97SEli Cohen {
1036e126ba97SEli Cohen 	int uar_index;
103709a7d9ecSSaeed Mahameed 	void *qpc;
1038e126ba97SEli Cohen 	int err;
1039e126ba97SEli Cohen 
1040c0a6cbb9SIsrael Rukshin 	if (init_attr->create_flags & ~(IB_QP_CREATE_INTEGRITY_EN |
1041f0313965SErez Shitrit 					IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK |
1042b11a4f9cSHaggai Eran 					IB_QP_CREATE_IPOIB_UD_LSO |
104393d576afSErez Shitrit 					IB_QP_CREATE_NETIF_QP |
104411f552e2SMichael Guralnik 					MLX5_IB_QP_CREATE_SQPN_QP1 |
104511f552e2SMichael Guralnik 					MLX5_IB_QP_CREATE_WC_TEST))
10461a4c3a3dSEli Cohen 		return -EINVAL;
1047e126ba97SEli Cohen 
1048e126ba97SEli Cohen 	if (init_attr->qp_type == MLX5_IB_QPT_REG_UMR)
10495fe9dec0SEli Cohen 		qp->bf.bfreg = &dev->fp_bfreg;
105011f552e2SMichael Guralnik 	else if (init_attr->create_flags & MLX5_IB_QP_CREATE_WC_TEST)
105111f552e2SMichael Guralnik 		qp->bf.bfreg = &dev->wc_bfreg;
10525fe9dec0SEli Cohen 	else
10535fe9dec0SEli Cohen 		qp->bf.bfreg = &dev->bfreg;
1054e126ba97SEli Cohen 
1055d8030b0dSEli Cohen 	/* We need to divide by two since each register is comprised of
1056d8030b0dSEli Cohen 	 * two buffers of identical size, namely odd and even
1057d8030b0dSEli Cohen 	 */
1058d8030b0dSEli Cohen 	qp->bf.buf_size = (1 << MLX5_CAP_GEN(dev->mdev, log_bf_reg_size)) / 2;
10595fe9dec0SEli Cohen 	uar_index = qp->bf.bfreg->index;
1060e126ba97SEli Cohen 
1061e126ba97SEli Cohen 	err = calc_sq_size(dev, init_attr, qp);
1062e126ba97SEli Cohen 	if (err < 0) {
1063e126ba97SEli Cohen 		mlx5_ib_dbg(dev, "err %d\n", err);
10645fe9dec0SEli Cohen 		return err;
1065e126ba97SEli Cohen 	}
1066e126ba97SEli Cohen 
1067e126ba97SEli Cohen 	qp->rq.offset = 0;
1068e126ba97SEli Cohen 	qp->sq.offset = qp->rq.wqe_cnt << qp->rq.wqe_shift;
106919098df2Smajd@mellanox.com 	base->ubuffer.buf_size = err + (qp->rq.wqe_cnt << qp->rq.wqe_shift);
1070e126ba97SEli Cohen 
107134f4c955SGuy Levi 	err = mlx5_frag_buf_alloc_node(dev->mdev, base->ubuffer.buf_size,
107234f4c955SGuy Levi 				       &qp->buf, dev->mdev->priv.numa_node);
1073e126ba97SEli Cohen 	if (err) {
1074e126ba97SEli Cohen 		mlx5_ib_dbg(dev, "err %d\n", err);
10755fe9dec0SEli Cohen 		return err;
1076e126ba97SEli Cohen 	}
1077e126ba97SEli Cohen 
107834f4c955SGuy Levi 	if (qp->rq.wqe_cnt)
107934f4c955SGuy Levi 		mlx5_init_fbc(qp->buf.frags, qp->rq.wqe_shift,
108034f4c955SGuy Levi 			      ilog2(qp->rq.wqe_cnt), &qp->rq.fbc);
108134f4c955SGuy Levi 
108234f4c955SGuy Levi 	if (qp->sq.wqe_cnt) {
108334f4c955SGuy Levi 		int sq_strides_offset = (qp->sq.offset  & (PAGE_SIZE - 1)) /
108434f4c955SGuy Levi 					MLX5_SEND_WQE_BB;
108534f4c955SGuy Levi 		mlx5_init_fbc_offset(qp->buf.frags +
108634f4c955SGuy Levi 				     (qp->sq.offset / PAGE_SIZE),
108734f4c955SGuy Levi 				     ilog2(MLX5_SEND_WQE_BB),
108834f4c955SGuy Levi 				     ilog2(qp->sq.wqe_cnt),
108934f4c955SGuy Levi 				     sq_strides_offset, &qp->sq.fbc);
109034f4c955SGuy Levi 
109134f4c955SGuy Levi 		qp->sq.cur_edge = get_sq_edge(&qp->sq, 0);
109234f4c955SGuy Levi 	}
109334f4c955SGuy Levi 
109409a7d9ecSSaeed Mahameed 	*inlen = MLX5_ST_SZ_BYTES(create_qp_in) +
109509a7d9ecSSaeed Mahameed 		 MLX5_FLD_SZ_BYTES(create_qp_in, pas[0]) * qp->buf.npages;
10961b9a07eeSLeon Romanovsky 	*in = kvzalloc(*inlen, GFP_KERNEL);
1097e126ba97SEli Cohen 	if (!*in) {
1098e126ba97SEli Cohen 		err = -ENOMEM;
1099e126ba97SEli Cohen 		goto err_buf;
1100e126ba97SEli Cohen 	}
110109a7d9ecSSaeed Mahameed 
110209a7d9ecSSaeed Mahameed 	qpc = MLX5_ADDR_OF(create_qp_in, *in, qpc);
110309a7d9ecSSaeed Mahameed 	MLX5_SET(qpc, qpc, uar_page, uar_index);
110409a7d9ecSSaeed Mahameed 	MLX5_SET(qpc, qpc, log_page_size, qp->buf.page_shift - MLX5_ADAPTER_PAGE_SHIFT);
110509a7d9ecSSaeed Mahameed 
1106e126ba97SEli Cohen 	/* Set "fast registration enabled" for all kernel QPs */
110709a7d9ecSSaeed Mahameed 	MLX5_SET(qpc, qpc, fre, 1);
110809a7d9ecSSaeed Mahameed 	MLX5_SET(qpc, qpc, rlky, 1);
1109e126ba97SEli Cohen 
11103f89b01fSMichael Guralnik 	if (init_attr->create_flags & MLX5_IB_QP_CREATE_SQPN_QP1) {
111109a7d9ecSSaeed Mahameed 		MLX5_SET(qpc, qpc, deth_sqpn, 1);
1112b11a4f9cSHaggai Eran 		qp->flags |= MLX5_IB_QP_SQPN_QP1;
1113b11a4f9cSHaggai Eran 	}
1114b11a4f9cSHaggai Eran 
111534f4c955SGuy Levi 	mlx5_fill_page_frag_array(&qp->buf,
111634f4c955SGuy Levi 				  (__be64 *)MLX5_ADDR_OF(create_qp_in,
111734f4c955SGuy Levi 							 *in, pas));
1118e126ba97SEli Cohen 
11199603b61dSJack Morgenstein 	err = mlx5_db_alloc(dev->mdev, &qp->db);
1120e126ba97SEli Cohen 	if (err) {
1121e126ba97SEli Cohen 		mlx5_ib_dbg(dev, "err %d\n", err);
1122e126ba97SEli Cohen 		goto err_free;
1123e126ba97SEli Cohen 	}
1124e126ba97SEli Cohen 
1125b5883008SLi Dongyang 	qp->sq.wrid = kvmalloc_array(qp->sq.wqe_cnt,
1126b5883008SLi Dongyang 				     sizeof(*qp->sq.wrid), GFP_KERNEL);
1127b5883008SLi Dongyang 	qp->sq.wr_data = kvmalloc_array(qp->sq.wqe_cnt,
1128b5883008SLi Dongyang 					sizeof(*qp->sq.wr_data), GFP_KERNEL);
1129b5883008SLi Dongyang 	qp->rq.wrid = kvmalloc_array(qp->rq.wqe_cnt,
1130b5883008SLi Dongyang 				     sizeof(*qp->rq.wrid), GFP_KERNEL);
1131b5883008SLi Dongyang 	qp->sq.w_list = kvmalloc_array(qp->sq.wqe_cnt,
1132b5883008SLi Dongyang 				       sizeof(*qp->sq.w_list), GFP_KERNEL);
1133b5883008SLi Dongyang 	qp->sq.wqe_head = kvmalloc_array(qp->sq.wqe_cnt,
1134b5883008SLi Dongyang 					 sizeof(*qp->sq.wqe_head), GFP_KERNEL);
1135e126ba97SEli Cohen 
1136e126ba97SEli Cohen 	if (!qp->sq.wrid || !qp->sq.wr_data || !qp->rq.wrid ||
1137e126ba97SEli Cohen 	    !qp->sq.w_list || !qp->sq.wqe_head) {
1138e126ba97SEli Cohen 		err = -ENOMEM;
1139e126ba97SEli Cohen 		goto err_wrid;
1140e126ba97SEli Cohen 	}
1141e126ba97SEli Cohen 	qp->create_type = MLX5_QP_KERNEL;
1142e126ba97SEli Cohen 
1143e126ba97SEli Cohen 	return 0;
1144e126ba97SEli Cohen 
1145e126ba97SEli Cohen err_wrid:
1146b5883008SLi Dongyang 	kvfree(qp->sq.wqe_head);
1147b5883008SLi Dongyang 	kvfree(qp->sq.w_list);
1148b5883008SLi Dongyang 	kvfree(qp->sq.wrid);
1149b5883008SLi Dongyang 	kvfree(qp->sq.wr_data);
1150b5883008SLi Dongyang 	kvfree(qp->rq.wrid);
1151f4044dacSEli Cohen 	mlx5_db_free(dev->mdev, &qp->db);
1152e126ba97SEli Cohen 
1153e126ba97SEli Cohen err_free:
1154479163f4SAl Viro 	kvfree(*in);
1155e126ba97SEli Cohen 
1156e126ba97SEli Cohen err_buf:
115734f4c955SGuy Levi 	mlx5_frag_buf_free(dev->mdev, &qp->buf);
1158e126ba97SEli Cohen 	return err;
1159e126ba97SEli Cohen }
1160e126ba97SEli Cohen 
1161e126ba97SEli Cohen static void destroy_qp_kernel(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp)
1162e126ba97SEli Cohen {
1163b5883008SLi Dongyang 	kvfree(qp->sq.wqe_head);
1164b5883008SLi Dongyang 	kvfree(qp->sq.w_list);
1165b5883008SLi Dongyang 	kvfree(qp->sq.wrid);
1166b5883008SLi Dongyang 	kvfree(qp->sq.wr_data);
1167b5883008SLi Dongyang 	kvfree(qp->rq.wrid);
1168f4044dacSEli Cohen 	mlx5_db_free(dev->mdev, &qp->db);
116934f4c955SGuy Levi 	mlx5_frag_buf_free(dev->mdev, &qp->buf);
1170e126ba97SEli Cohen }
1171e126ba97SEli Cohen 
117209a7d9ecSSaeed Mahameed static u32 get_rx_type(struct mlx5_ib_qp *qp, struct ib_qp_init_attr *attr)
1173e126ba97SEli Cohen {
1174e126ba97SEli Cohen 	if (attr->srq || (attr->qp_type == IB_QPT_XRC_TGT) ||
1175c32a4f29SMoni Shoua 	    (attr->qp_type == MLX5_IB_QPT_DCI) ||
1176e126ba97SEli Cohen 	    (attr->qp_type == IB_QPT_XRC_INI))
117709a7d9ecSSaeed Mahameed 		return MLX5_SRQ_RQ;
1178e126ba97SEli Cohen 	else if (!qp->has_rq)
117909a7d9ecSSaeed Mahameed 		return MLX5_ZERO_LEN_RQ;
1180e126ba97SEli Cohen 	else
118109a7d9ecSSaeed Mahameed 		return MLX5_NON_ZERO_RQ;
1182e126ba97SEli Cohen }
1183e126ba97SEli Cohen 
1184e126ba97SEli Cohen static int is_connected(enum ib_qp_type qp_type)
1185e126ba97SEli Cohen {
11865d6ff1baSYonatan Cohen 	if (qp_type == IB_QPT_RC || qp_type == IB_QPT_UC ||
11875d6ff1baSYonatan Cohen 	    qp_type == MLX5_IB_QPT_DCI)
1188e126ba97SEli Cohen 		return 1;
1189e126ba97SEli Cohen 
1190e126ba97SEli Cohen 	return 0;
1191e126ba97SEli Cohen }
1192e126ba97SEli Cohen 
11930fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_tis(struct mlx5_ib_dev *dev,
1194c2e53b2cSYishai Hadas 				    struct mlx5_ib_qp *qp,
11951cd6dbd3SYishai Hadas 				    struct mlx5_ib_sq *sq, u32 tdn,
11961cd6dbd3SYishai Hadas 				    struct ib_pd *pd)
11970fb2ed66Smajd@mellanox.com {
1198c4f287c4SSaeed Mahameed 	u32 in[MLX5_ST_SZ_DW(create_tis_in)] = {0};
11990fb2ed66Smajd@mellanox.com 	void *tisc = MLX5_ADDR_OF(create_tis_in, in, ctx);
12000fb2ed66Smajd@mellanox.com 
12011cd6dbd3SYishai Hadas 	MLX5_SET(create_tis_in, in, uid, to_mpd(pd)->uid);
12020fb2ed66Smajd@mellanox.com 	MLX5_SET(tisc, tisc, transport_domain, tdn);
1203c2e53b2cSYishai Hadas 	if (qp->flags & MLX5_IB_QP_UNDERLAY)
1204c2e53b2cSYishai Hadas 		MLX5_SET(tisc, tisc, underlay_qpn, qp->underlay_qpn);
1205c2e53b2cSYishai Hadas 
12060fb2ed66Smajd@mellanox.com 	return mlx5_core_create_tis(dev->mdev, in, sizeof(in), &sq->tisn);
12070fb2ed66Smajd@mellanox.com }
12080fb2ed66Smajd@mellanox.com 
12090fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp_tis(struct mlx5_ib_dev *dev,
12101cd6dbd3SYishai Hadas 				      struct mlx5_ib_sq *sq, struct ib_pd *pd)
12110fb2ed66Smajd@mellanox.com {
12121cd6dbd3SYishai Hadas 	mlx5_cmd_destroy_tis(dev->mdev, sq->tisn, to_mpd(pd)->uid);
12130fb2ed66Smajd@mellanox.com }
12140fb2ed66Smajd@mellanox.com 
1215d5ed8ac3SMark Bloch static void destroy_flow_rule_vport_sq(struct mlx5_ib_sq *sq)
1216b96c9ddeSMark Bloch {
1217b96c9ddeSMark Bloch 	if (sq->flow_rule)
1218b96c9ddeSMark Bloch 		mlx5_del_flow_rules(sq->flow_rule);
1219d5ed8ac3SMark Bloch 	sq->flow_rule = NULL;
1220b96c9ddeSMark Bloch }
1221b96c9ddeSMark Bloch 
12220fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_sq(struct mlx5_ib_dev *dev,
1223b0ea0fa5SJason Gunthorpe 				   struct ib_udata *udata,
12240fb2ed66Smajd@mellanox.com 				   struct mlx5_ib_sq *sq, void *qpin,
12250fb2ed66Smajd@mellanox.com 				   struct ib_pd *pd)
12260fb2ed66Smajd@mellanox.com {
12270fb2ed66Smajd@mellanox.com 	struct mlx5_ib_ubuffer *ubuffer = &sq->ubuffer;
12280fb2ed66Smajd@mellanox.com 	__be64 *pas;
12290fb2ed66Smajd@mellanox.com 	void *in;
12300fb2ed66Smajd@mellanox.com 	void *sqc;
12310fb2ed66Smajd@mellanox.com 	void *qpc = MLX5_ADDR_OF(create_qp_in, qpin, qpc);
12320fb2ed66Smajd@mellanox.com 	void *wq;
12330fb2ed66Smajd@mellanox.com 	int inlen;
12340fb2ed66Smajd@mellanox.com 	int err;
12350fb2ed66Smajd@mellanox.com 	int page_shift = 0;
12360fb2ed66Smajd@mellanox.com 	int npages;
12370fb2ed66Smajd@mellanox.com 	int ncont = 0;
12380fb2ed66Smajd@mellanox.com 	u32 offset = 0;
12390fb2ed66Smajd@mellanox.com 
1240b0ea0fa5SJason Gunthorpe 	err = mlx5_ib_umem_get(dev, udata, ubuffer->buf_addr, ubuffer->buf_size,
1241b0ea0fa5SJason Gunthorpe 			       &sq->ubuffer.umem, &npages, &page_shift, &ncont,
1242b0ea0fa5SJason Gunthorpe 			       &offset);
12430fb2ed66Smajd@mellanox.com 	if (err)
12440fb2ed66Smajd@mellanox.com 		return err;
12450fb2ed66Smajd@mellanox.com 
12460fb2ed66Smajd@mellanox.com 	inlen = MLX5_ST_SZ_BYTES(create_sq_in) + sizeof(u64) * ncont;
12471b9a07eeSLeon Romanovsky 	in = kvzalloc(inlen, GFP_KERNEL);
12480fb2ed66Smajd@mellanox.com 	if (!in) {
12490fb2ed66Smajd@mellanox.com 		err = -ENOMEM;
12500fb2ed66Smajd@mellanox.com 		goto err_umem;
12510fb2ed66Smajd@mellanox.com 	}
12520fb2ed66Smajd@mellanox.com 
1253c14003f0SYishai Hadas 	MLX5_SET(create_sq_in, in, uid, to_mpd(pd)->uid);
12540fb2ed66Smajd@mellanox.com 	sqc = MLX5_ADDR_OF(create_sq_in, in, ctx);
12550fb2ed66Smajd@mellanox.com 	MLX5_SET(sqc, sqc, flush_in_error_en, 1);
1256795b609cSBodong Wang 	if (MLX5_CAP_ETH(dev->mdev, multi_pkt_send_wqe))
1257795b609cSBodong Wang 		MLX5_SET(sqc, sqc, allow_multi_pkt_send_wqe, 1);
12580fb2ed66Smajd@mellanox.com 	MLX5_SET(sqc, sqc, state, MLX5_SQC_STATE_RST);
12590fb2ed66Smajd@mellanox.com 	MLX5_SET(sqc, sqc, user_index, MLX5_GET(qpc, qpc, user_index));
12600fb2ed66Smajd@mellanox.com 	MLX5_SET(sqc, sqc, cqn, MLX5_GET(qpc, qpc, cqn_snd));
12610fb2ed66Smajd@mellanox.com 	MLX5_SET(sqc, sqc, tis_lst_sz, 1);
12620fb2ed66Smajd@mellanox.com 	MLX5_SET(sqc, sqc, tis_num_0, sq->tisn);
126396dc3fc5SNoa Osherovich 	if (MLX5_CAP_GEN(dev->mdev, eth_net_offloads) &&
126496dc3fc5SNoa Osherovich 	    MLX5_CAP_ETH(dev->mdev, swp))
126596dc3fc5SNoa Osherovich 		MLX5_SET(sqc, sqc, allow_swp, 1);
12660fb2ed66Smajd@mellanox.com 
12670fb2ed66Smajd@mellanox.com 	wq = MLX5_ADDR_OF(sqc, sqc, wq);
12680fb2ed66Smajd@mellanox.com 	MLX5_SET(wq, wq, wq_type, MLX5_WQ_TYPE_CYCLIC);
12690fb2ed66Smajd@mellanox.com 	MLX5_SET(wq, wq, pd, MLX5_GET(qpc, qpc, pd));
12700fb2ed66Smajd@mellanox.com 	MLX5_SET(wq, wq, uar_page, MLX5_GET(qpc, qpc, uar_page));
12710fb2ed66Smajd@mellanox.com 	MLX5_SET64(wq, wq, dbr_addr, MLX5_GET64(qpc, qpc, dbr_addr));
12720fb2ed66Smajd@mellanox.com 	MLX5_SET(wq, wq, log_wq_stride, ilog2(MLX5_SEND_WQE_BB));
12730fb2ed66Smajd@mellanox.com 	MLX5_SET(wq, wq, log_wq_sz, MLX5_GET(qpc, qpc, log_sq_size));
12740fb2ed66Smajd@mellanox.com 	MLX5_SET(wq, wq, log_wq_pg_sz,  page_shift - MLX5_ADAPTER_PAGE_SHIFT);
12750fb2ed66Smajd@mellanox.com 	MLX5_SET(wq, wq, page_offset, offset);
12760fb2ed66Smajd@mellanox.com 
12770fb2ed66Smajd@mellanox.com 	pas = (__be64 *)MLX5_ADDR_OF(wq, wq, pas);
12780fb2ed66Smajd@mellanox.com 	mlx5_ib_populate_pas(dev, sq->ubuffer.umem, page_shift, pas, 0);
12790fb2ed66Smajd@mellanox.com 
12800fb2ed66Smajd@mellanox.com 	err = mlx5_core_create_sq_tracked(dev->mdev, in, inlen, &sq->base.mqp);
12810fb2ed66Smajd@mellanox.com 
12820fb2ed66Smajd@mellanox.com 	kvfree(in);
12830fb2ed66Smajd@mellanox.com 
12840fb2ed66Smajd@mellanox.com 	if (err)
12850fb2ed66Smajd@mellanox.com 		goto err_umem;
12860fb2ed66Smajd@mellanox.com 
12870fb2ed66Smajd@mellanox.com 	return 0;
12880fb2ed66Smajd@mellanox.com 
12890fb2ed66Smajd@mellanox.com err_umem:
12900fb2ed66Smajd@mellanox.com 	ib_umem_release(sq->ubuffer.umem);
12910fb2ed66Smajd@mellanox.com 	sq->ubuffer.umem = NULL;
12920fb2ed66Smajd@mellanox.com 
12930fb2ed66Smajd@mellanox.com 	return err;
12940fb2ed66Smajd@mellanox.com }
12950fb2ed66Smajd@mellanox.com 
12960fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp_sq(struct mlx5_ib_dev *dev,
12970fb2ed66Smajd@mellanox.com 				     struct mlx5_ib_sq *sq)
12980fb2ed66Smajd@mellanox.com {
1299d5ed8ac3SMark Bloch 	destroy_flow_rule_vport_sq(sq);
13000fb2ed66Smajd@mellanox.com 	mlx5_core_destroy_sq_tracked(dev->mdev, &sq->base.mqp);
13010fb2ed66Smajd@mellanox.com 	ib_umem_release(sq->ubuffer.umem);
13020fb2ed66Smajd@mellanox.com }
13030fb2ed66Smajd@mellanox.com 
13042c292dbbSBoris Pismenny static size_t get_rq_pas_size(void *qpc)
13050fb2ed66Smajd@mellanox.com {
13060fb2ed66Smajd@mellanox.com 	u32 log_page_size = MLX5_GET(qpc, qpc, log_page_size) + 12;
13070fb2ed66Smajd@mellanox.com 	u32 log_rq_stride = MLX5_GET(qpc, qpc, log_rq_stride);
13080fb2ed66Smajd@mellanox.com 	u32 log_rq_size   = MLX5_GET(qpc, qpc, log_rq_size);
13090fb2ed66Smajd@mellanox.com 	u32 page_offset   = MLX5_GET(qpc, qpc, page_offset);
13100fb2ed66Smajd@mellanox.com 	u32 po_quanta	  = 1 << (log_page_size - 6);
13110fb2ed66Smajd@mellanox.com 	u32 rq_sz	  = 1 << (log_rq_size + 4 + log_rq_stride);
13120fb2ed66Smajd@mellanox.com 	u32 page_size	  = 1 << log_page_size;
13130fb2ed66Smajd@mellanox.com 	u32 rq_sz_po      = rq_sz + (page_offset * po_quanta);
13140fb2ed66Smajd@mellanox.com 	u32 rq_num_pas	  = (rq_sz_po + page_size - 1) / page_size;
13150fb2ed66Smajd@mellanox.com 
13160fb2ed66Smajd@mellanox.com 	return rq_num_pas * sizeof(u64);
13170fb2ed66Smajd@mellanox.com }
13180fb2ed66Smajd@mellanox.com 
13190fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_rq(struct mlx5_ib_dev *dev,
13202c292dbbSBoris Pismenny 				   struct mlx5_ib_rq *rq, void *qpin,
132134d57585SYishai Hadas 				   size_t qpinlen, struct ib_pd *pd)
13220fb2ed66Smajd@mellanox.com {
1323358e42eaSMajd Dibbiny 	struct mlx5_ib_qp *mqp = rq->base.container_mibqp;
13240fb2ed66Smajd@mellanox.com 	__be64 *pas;
13250fb2ed66Smajd@mellanox.com 	__be64 *qp_pas;
13260fb2ed66Smajd@mellanox.com 	void *in;
13270fb2ed66Smajd@mellanox.com 	void *rqc;
13280fb2ed66Smajd@mellanox.com 	void *wq;
13290fb2ed66Smajd@mellanox.com 	void *qpc = MLX5_ADDR_OF(create_qp_in, qpin, qpc);
13302c292dbbSBoris Pismenny 	size_t rq_pas_size = get_rq_pas_size(qpc);
13312c292dbbSBoris Pismenny 	size_t inlen;
13320fb2ed66Smajd@mellanox.com 	int err;
13332c292dbbSBoris Pismenny 
13342c292dbbSBoris Pismenny 	if (qpinlen < rq_pas_size + MLX5_BYTE_OFF(create_qp_in, pas))
13352c292dbbSBoris Pismenny 		return -EINVAL;
13360fb2ed66Smajd@mellanox.com 
13370fb2ed66Smajd@mellanox.com 	inlen = MLX5_ST_SZ_BYTES(create_rq_in) + rq_pas_size;
13381b9a07eeSLeon Romanovsky 	in = kvzalloc(inlen, GFP_KERNEL);
13390fb2ed66Smajd@mellanox.com 	if (!in)
13400fb2ed66Smajd@mellanox.com 		return -ENOMEM;
13410fb2ed66Smajd@mellanox.com 
134234d57585SYishai Hadas 	MLX5_SET(create_rq_in, in, uid, to_mpd(pd)->uid);
13430fb2ed66Smajd@mellanox.com 	rqc = MLX5_ADDR_OF(create_rq_in, in, ctx);
1344e4cc4fa7SNoa Osherovich 	if (!(rq->flags & MLX5_IB_RQ_CVLAN_STRIPPING))
13450fb2ed66Smajd@mellanox.com 		MLX5_SET(rqc, rqc, vsd, 1);
13460fb2ed66Smajd@mellanox.com 	MLX5_SET(rqc, rqc, mem_rq_type, MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE);
13470fb2ed66Smajd@mellanox.com 	MLX5_SET(rqc, rqc, state, MLX5_RQC_STATE_RST);
13480fb2ed66Smajd@mellanox.com 	MLX5_SET(rqc, rqc, flush_in_error_en, 1);
13490fb2ed66Smajd@mellanox.com 	MLX5_SET(rqc, rqc, user_index, MLX5_GET(qpc, qpc, user_index));
13500fb2ed66Smajd@mellanox.com 	MLX5_SET(rqc, rqc, cqn, MLX5_GET(qpc, qpc, cqn_rcv));
13510fb2ed66Smajd@mellanox.com 
1352358e42eaSMajd Dibbiny 	if (mqp->flags & MLX5_IB_QP_CAP_SCATTER_FCS)
1353358e42eaSMajd Dibbiny 		MLX5_SET(rqc, rqc, scatter_fcs, 1);
1354358e42eaSMajd Dibbiny 
13550fb2ed66Smajd@mellanox.com 	wq = MLX5_ADDR_OF(rqc, rqc, wq);
13560fb2ed66Smajd@mellanox.com 	MLX5_SET(wq, wq, wq_type, MLX5_WQ_TYPE_CYCLIC);
1357b1383aa6SNoa Osherovich 	if (rq->flags & MLX5_IB_RQ_PCI_WRITE_END_PADDING)
1358b1383aa6SNoa Osherovich 		MLX5_SET(wq, wq, end_padding_mode, MLX5_WQ_END_PAD_MODE_ALIGN);
13590fb2ed66Smajd@mellanox.com 	MLX5_SET(wq, wq, page_offset, MLX5_GET(qpc, qpc, page_offset));
13600fb2ed66Smajd@mellanox.com 	MLX5_SET(wq, wq, pd, MLX5_GET(qpc, qpc, pd));
13610fb2ed66Smajd@mellanox.com 	MLX5_SET64(wq, wq, dbr_addr, MLX5_GET64(qpc, qpc, dbr_addr));
13620fb2ed66Smajd@mellanox.com 	MLX5_SET(wq, wq, log_wq_stride, MLX5_GET(qpc, qpc, log_rq_stride) + 4);
13630fb2ed66Smajd@mellanox.com 	MLX5_SET(wq, wq, log_wq_pg_sz, MLX5_GET(qpc, qpc, log_page_size));
13640fb2ed66Smajd@mellanox.com 	MLX5_SET(wq, wq, log_wq_sz, MLX5_GET(qpc, qpc, log_rq_size));
13650fb2ed66Smajd@mellanox.com 
13660fb2ed66Smajd@mellanox.com 	pas = (__be64 *)MLX5_ADDR_OF(wq, wq, pas);
13670fb2ed66Smajd@mellanox.com 	qp_pas = (__be64 *)MLX5_ADDR_OF(create_qp_in, qpin, pas);
13680fb2ed66Smajd@mellanox.com 	memcpy(pas, qp_pas, rq_pas_size);
13690fb2ed66Smajd@mellanox.com 
13700fb2ed66Smajd@mellanox.com 	err = mlx5_core_create_rq_tracked(dev->mdev, in, inlen, &rq->base.mqp);
13710fb2ed66Smajd@mellanox.com 
13720fb2ed66Smajd@mellanox.com 	kvfree(in);
13730fb2ed66Smajd@mellanox.com 
13740fb2ed66Smajd@mellanox.com 	return err;
13750fb2ed66Smajd@mellanox.com }
13760fb2ed66Smajd@mellanox.com 
13770fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp_rq(struct mlx5_ib_dev *dev,
13780fb2ed66Smajd@mellanox.com 				     struct mlx5_ib_rq *rq)
13790fb2ed66Smajd@mellanox.com {
13800fb2ed66Smajd@mellanox.com 	mlx5_core_destroy_rq_tracked(dev->mdev, &rq->base.mqp);
13810fb2ed66Smajd@mellanox.com }
13820fb2ed66Smajd@mellanox.com 
1383f95ef6cbSMaor Gottlieb static bool tunnel_offload_supported(struct mlx5_core_dev *dev)
1384f95ef6cbSMaor Gottlieb {
1385f95ef6cbSMaor Gottlieb 	return  (MLX5_CAP_ETH(dev, tunnel_stateless_vxlan) ||
1386f95ef6cbSMaor Gottlieb 		 MLX5_CAP_ETH(dev, tunnel_stateless_gre) ||
1387f95ef6cbSMaor Gottlieb 		 MLX5_CAP_ETH(dev, tunnel_stateless_geneve_rx));
1388f95ef6cbSMaor Gottlieb }
1389f95ef6cbSMaor Gottlieb 
13900042f9e4SMark Bloch static void destroy_raw_packet_qp_tir(struct mlx5_ib_dev *dev,
13910042f9e4SMark Bloch 				      struct mlx5_ib_rq *rq,
1392443c1cf9SYishai Hadas 				      u32 qp_flags_en,
1393443c1cf9SYishai Hadas 				      struct ib_pd *pd)
13940042f9e4SMark Bloch {
13950042f9e4SMark Bloch 	if (qp_flags_en & (MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC |
13960042f9e4SMark Bloch 			   MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC))
13970042f9e4SMark Bloch 		mlx5_ib_disable_lb(dev, false, true);
1398443c1cf9SYishai Hadas 	mlx5_cmd_destroy_tir(dev->mdev, rq->tirn, to_mpd(pd)->uid);
13990042f9e4SMark Bloch }
14000042f9e4SMark Bloch 
14010fb2ed66Smajd@mellanox.com static int create_raw_packet_qp_tir(struct mlx5_ib_dev *dev,
1402f95ef6cbSMaor Gottlieb 				    struct mlx5_ib_rq *rq, u32 tdn,
1403443c1cf9SYishai Hadas 				    u32 *qp_flags_en,
14041f1d6abbSAriel Levkovich 				    struct ib_pd *pd,
14051f1d6abbSAriel Levkovich 				    u32 *out, int outlen)
14060fb2ed66Smajd@mellanox.com {
1407175edba8SMark Bloch 	u8 lb_flag = 0;
14080fb2ed66Smajd@mellanox.com 	u32 *in;
14090fb2ed66Smajd@mellanox.com 	void *tirc;
14100fb2ed66Smajd@mellanox.com 	int inlen;
14110fb2ed66Smajd@mellanox.com 	int err;
14120fb2ed66Smajd@mellanox.com 
14130fb2ed66Smajd@mellanox.com 	inlen = MLX5_ST_SZ_BYTES(create_tir_in);
14141b9a07eeSLeon Romanovsky 	in = kvzalloc(inlen, GFP_KERNEL);
14150fb2ed66Smajd@mellanox.com 	if (!in)
14160fb2ed66Smajd@mellanox.com 		return -ENOMEM;
14170fb2ed66Smajd@mellanox.com 
1418443c1cf9SYishai Hadas 	MLX5_SET(create_tir_in, in, uid, to_mpd(pd)->uid);
14190fb2ed66Smajd@mellanox.com 	tirc = MLX5_ADDR_OF(create_tir_in, in, ctx);
14200fb2ed66Smajd@mellanox.com 	MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_DIRECT);
14210fb2ed66Smajd@mellanox.com 	MLX5_SET(tirc, tirc, inline_rqn, rq->base.mqp.qpn);
14220fb2ed66Smajd@mellanox.com 	MLX5_SET(tirc, tirc, transport_domain, tdn);
1423175edba8SMark Bloch 	if (*qp_flags_en & MLX5_QP_FLAG_TUNNEL_OFFLOADS)
1424f95ef6cbSMaor Gottlieb 		MLX5_SET(tirc, tirc, tunneled_offload_en, 1);
14250fb2ed66Smajd@mellanox.com 
1426175edba8SMark Bloch 	if (*qp_flags_en & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC)
1427175edba8SMark Bloch 		lb_flag |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST;
1428175edba8SMark Bloch 
1429175edba8SMark Bloch 	if (*qp_flags_en & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC)
1430175edba8SMark Bloch 		lb_flag |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST;
1431175edba8SMark Bloch 
14326a4d00beSMark Bloch 	if (dev->is_rep) {
1433175edba8SMark Bloch 		lb_flag |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST;
1434175edba8SMark Bloch 		*qp_flags_en |= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC;
1435175edba8SMark Bloch 	}
1436175edba8SMark Bloch 
1437175edba8SMark Bloch 	MLX5_SET(tirc, tirc, self_lb_block, lb_flag);
1438ec9c2fb8SMark Bloch 
14391f1d6abbSAriel Levkovich 	err = mlx5_core_create_tir_out(dev->mdev, in, inlen, out, outlen);
14400fb2ed66Smajd@mellanox.com 
14411f1d6abbSAriel Levkovich 	rq->tirn = MLX5_GET(create_tir_out, out, tirn);
14420042f9e4SMark Bloch 	if (!err && MLX5_GET(tirc, tirc, self_lb_block)) {
14430042f9e4SMark Bloch 		err = mlx5_ib_enable_lb(dev, false, true);
14440042f9e4SMark Bloch 
14450042f9e4SMark Bloch 		if (err)
1446443c1cf9SYishai Hadas 			destroy_raw_packet_qp_tir(dev, rq, 0, pd);
14470042f9e4SMark Bloch 	}
14480fb2ed66Smajd@mellanox.com 	kvfree(in);
14490fb2ed66Smajd@mellanox.com 
14500fb2ed66Smajd@mellanox.com 	return err;
14510fb2ed66Smajd@mellanox.com }
14520fb2ed66Smajd@mellanox.com 
14530fb2ed66Smajd@mellanox.com static int create_raw_packet_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp,
14542c292dbbSBoris Pismenny 				u32 *in, size_t inlen,
14557f72052cSYishai Hadas 				struct ib_pd *pd,
14567f72052cSYishai Hadas 				struct ib_udata *udata,
14577f72052cSYishai Hadas 				struct mlx5_ib_create_qp_resp *resp)
14580fb2ed66Smajd@mellanox.com {
14590fb2ed66Smajd@mellanox.com 	struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp;
14600fb2ed66Smajd@mellanox.com 	struct mlx5_ib_sq *sq = &raw_packet_qp->sq;
14610fb2ed66Smajd@mellanox.com 	struct mlx5_ib_rq *rq = &raw_packet_qp->rq;
146289944450SShamir Rabinovitch 	struct mlx5_ib_ucontext *mucontext = rdma_udata_to_drv_context(
146389944450SShamir Rabinovitch 		udata, struct mlx5_ib_ucontext, ibucontext);
14640fb2ed66Smajd@mellanox.com 	int err;
14650fb2ed66Smajd@mellanox.com 	u32 tdn = mucontext->tdn;
14667f72052cSYishai Hadas 	u16 uid = to_mpd(pd)->uid;
14671f1d6abbSAriel Levkovich 	u32 out[MLX5_ST_SZ_DW(create_tir_out)] = {};
14680fb2ed66Smajd@mellanox.com 
14690fb2ed66Smajd@mellanox.com 	if (qp->sq.wqe_cnt) {
14701cd6dbd3SYishai Hadas 		err = create_raw_packet_qp_tis(dev, qp, sq, tdn, pd);
14710fb2ed66Smajd@mellanox.com 		if (err)
14720fb2ed66Smajd@mellanox.com 			return err;
14730fb2ed66Smajd@mellanox.com 
1474b0ea0fa5SJason Gunthorpe 		err = create_raw_packet_qp_sq(dev, udata, sq, in, pd);
14750fb2ed66Smajd@mellanox.com 		if (err)
14760fb2ed66Smajd@mellanox.com 			goto err_destroy_tis;
14770fb2ed66Smajd@mellanox.com 
14787f72052cSYishai Hadas 		if (uid) {
14797f72052cSYishai Hadas 			resp->tisn = sq->tisn;
14807f72052cSYishai Hadas 			resp->comp_mask |= MLX5_IB_CREATE_QP_RESP_MASK_TISN;
14817f72052cSYishai Hadas 			resp->sqn = sq->base.mqp.qpn;
14827f72052cSYishai Hadas 			resp->comp_mask |= MLX5_IB_CREATE_QP_RESP_MASK_SQN;
14837f72052cSYishai Hadas 		}
14847f72052cSYishai Hadas 
14850fb2ed66Smajd@mellanox.com 		sq->base.container_mibqp = qp;
14861d31e9c0SMajd Dibbiny 		sq->base.mqp.event = mlx5_ib_qp_event;
14870fb2ed66Smajd@mellanox.com 	}
14880fb2ed66Smajd@mellanox.com 
14890fb2ed66Smajd@mellanox.com 	if (qp->rq.wqe_cnt) {
1490358e42eaSMajd Dibbiny 		rq->base.container_mibqp = qp;
1491358e42eaSMajd Dibbiny 
1492e4cc4fa7SNoa Osherovich 		if (qp->flags & MLX5_IB_QP_CVLAN_STRIPPING)
1493e4cc4fa7SNoa Osherovich 			rq->flags |= MLX5_IB_RQ_CVLAN_STRIPPING;
1494b1383aa6SNoa Osherovich 		if (qp->flags & MLX5_IB_QP_PCI_WRITE_END_PADDING)
1495b1383aa6SNoa Osherovich 			rq->flags |= MLX5_IB_RQ_PCI_WRITE_END_PADDING;
149634d57585SYishai Hadas 		err = create_raw_packet_qp_rq(dev, rq, in, inlen, pd);
14970fb2ed66Smajd@mellanox.com 		if (err)
14980fb2ed66Smajd@mellanox.com 			goto err_destroy_sq;
14990fb2ed66Smajd@mellanox.com 
15001f1d6abbSAriel Levkovich 		err = create_raw_packet_qp_tir(
15011f1d6abbSAriel Levkovich 			dev, rq, tdn, &qp->flags_en, pd, out,
15021f1d6abbSAriel Levkovich 			MLX5_ST_SZ_BYTES(create_tir_out));
15030fb2ed66Smajd@mellanox.com 		if (err)
15040fb2ed66Smajd@mellanox.com 			goto err_destroy_rq;
15057f72052cSYishai Hadas 
15067f72052cSYishai Hadas 		if (uid) {
15077f72052cSYishai Hadas 			resp->rqn = rq->base.mqp.qpn;
15087f72052cSYishai Hadas 			resp->comp_mask |= MLX5_IB_CREATE_QP_RESP_MASK_RQN;
15097f72052cSYishai Hadas 			resp->tirn = rq->tirn;
15107f72052cSYishai Hadas 			resp->comp_mask |= MLX5_IB_CREATE_QP_RESP_MASK_TIRN;
15111f1d6abbSAriel Levkovich 			if (MLX5_CAP_FLOWTABLE_NIC_RX(dev->mdev, sw_owner)) {
15121f1d6abbSAriel Levkovich 				resp->tir_icm_addr = MLX5_GET(
15131f1d6abbSAriel Levkovich 					create_tir_out, out, icm_address_31_0);
15141f1d6abbSAriel Levkovich 				resp->tir_icm_addr |=
15151f1d6abbSAriel Levkovich 					(u64)MLX5_GET(create_tir_out, out,
15161f1d6abbSAriel Levkovich 						      icm_address_39_32)
15171f1d6abbSAriel Levkovich 					<< 32;
15181f1d6abbSAriel Levkovich 				resp->tir_icm_addr |=
15191f1d6abbSAriel Levkovich 					(u64)MLX5_GET(create_tir_out, out,
15201f1d6abbSAriel Levkovich 						      icm_address_63_40)
15211f1d6abbSAriel Levkovich 					<< 40;
15221f1d6abbSAriel Levkovich 				resp->comp_mask |=
15231f1d6abbSAriel Levkovich 					MLX5_IB_CREATE_QP_RESP_MASK_TIR_ICM_ADDR;
15241f1d6abbSAriel Levkovich 			}
15257f72052cSYishai Hadas 		}
15260fb2ed66Smajd@mellanox.com 	}
15270fb2ed66Smajd@mellanox.com 
15280fb2ed66Smajd@mellanox.com 	qp->trans_qp.base.mqp.qpn = qp->sq.wqe_cnt ? sq->base.mqp.qpn :
15290fb2ed66Smajd@mellanox.com 						     rq->base.mqp.qpn;
15307f72052cSYishai Hadas 	err = ib_copy_to_udata(udata, resp, min(udata->outlen, sizeof(*resp)));
15317f72052cSYishai Hadas 	if (err)
15327f72052cSYishai Hadas 		goto err_destroy_tir;
15330fb2ed66Smajd@mellanox.com 
15340fb2ed66Smajd@mellanox.com 	return 0;
15350fb2ed66Smajd@mellanox.com 
15367f72052cSYishai Hadas err_destroy_tir:
15377f72052cSYishai Hadas 	destroy_raw_packet_qp_tir(dev, rq, qp->flags_en, pd);
15380fb2ed66Smajd@mellanox.com err_destroy_rq:
15390fb2ed66Smajd@mellanox.com 	destroy_raw_packet_qp_rq(dev, rq);
15400fb2ed66Smajd@mellanox.com err_destroy_sq:
15410fb2ed66Smajd@mellanox.com 	if (!qp->sq.wqe_cnt)
15420fb2ed66Smajd@mellanox.com 		return err;
15430fb2ed66Smajd@mellanox.com 	destroy_raw_packet_qp_sq(dev, sq);
15440fb2ed66Smajd@mellanox.com err_destroy_tis:
15451cd6dbd3SYishai Hadas 	destroy_raw_packet_qp_tis(dev, sq, pd);
15460fb2ed66Smajd@mellanox.com 
15470fb2ed66Smajd@mellanox.com 	return err;
15480fb2ed66Smajd@mellanox.com }
15490fb2ed66Smajd@mellanox.com 
15500fb2ed66Smajd@mellanox.com static void destroy_raw_packet_qp(struct mlx5_ib_dev *dev,
15510fb2ed66Smajd@mellanox.com 				  struct mlx5_ib_qp *qp)
15520fb2ed66Smajd@mellanox.com {
15530fb2ed66Smajd@mellanox.com 	struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp;
15540fb2ed66Smajd@mellanox.com 	struct mlx5_ib_sq *sq = &raw_packet_qp->sq;
15550fb2ed66Smajd@mellanox.com 	struct mlx5_ib_rq *rq = &raw_packet_qp->rq;
15560fb2ed66Smajd@mellanox.com 
15570fb2ed66Smajd@mellanox.com 	if (qp->rq.wqe_cnt) {
1558443c1cf9SYishai Hadas 		destroy_raw_packet_qp_tir(dev, rq, qp->flags_en, qp->ibqp.pd);
15590fb2ed66Smajd@mellanox.com 		destroy_raw_packet_qp_rq(dev, rq);
15600fb2ed66Smajd@mellanox.com 	}
15610fb2ed66Smajd@mellanox.com 
15620fb2ed66Smajd@mellanox.com 	if (qp->sq.wqe_cnt) {
15630fb2ed66Smajd@mellanox.com 		destroy_raw_packet_qp_sq(dev, sq);
15641cd6dbd3SYishai Hadas 		destroy_raw_packet_qp_tis(dev, sq, qp->ibqp.pd);
15650fb2ed66Smajd@mellanox.com 	}
15660fb2ed66Smajd@mellanox.com }
15670fb2ed66Smajd@mellanox.com 
15680fb2ed66Smajd@mellanox.com static void raw_packet_qp_copy_info(struct mlx5_ib_qp *qp,
15690fb2ed66Smajd@mellanox.com 				    struct mlx5_ib_raw_packet_qp *raw_packet_qp)
15700fb2ed66Smajd@mellanox.com {
15710fb2ed66Smajd@mellanox.com 	struct mlx5_ib_sq *sq = &raw_packet_qp->sq;
15720fb2ed66Smajd@mellanox.com 	struct mlx5_ib_rq *rq = &raw_packet_qp->rq;
15730fb2ed66Smajd@mellanox.com 
15740fb2ed66Smajd@mellanox.com 	sq->sq = &qp->sq;
15750fb2ed66Smajd@mellanox.com 	rq->rq = &qp->rq;
15760fb2ed66Smajd@mellanox.com 	sq->doorbell = &qp->db;
15770fb2ed66Smajd@mellanox.com 	rq->doorbell = &qp->db;
15780fb2ed66Smajd@mellanox.com }
15790fb2ed66Smajd@mellanox.com 
158028d61370SYishai Hadas static void destroy_rss_raw_qp_tir(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp)
158128d61370SYishai Hadas {
15820042f9e4SMark Bloch 	if (qp->flags_en & (MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC |
15830042f9e4SMark Bloch 			    MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC))
15840042f9e4SMark Bloch 		mlx5_ib_disable_lb(dev, false, true);
1585443c1cf9SYishai Hadas 	mlx5_cmd_destroy_tir(dev->mdev, qp->rss_qp.tirn,
1586443c1cf9SYishai Hadas 			     to_mpd(qp->ibqp.pd)->uid);
158728d61370SYishai Hadas }
158828d61370SYishai Hadas 
158928d61370SYishai Hadas static int create_rss_raw_qp_tir(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp,
159028d61370SYishai Hadas 				 struct ib_pd *pd,
159128d61370SYishai Hadas 				 struct ib_qp_init_attr *init_attr,
159228d61370SYishai Hadas 				 struct ib_udata *udata)
159328d61370SYishai Hadas {
159489944450SShamir Rabinovitch 	struct mlx5_ib_ucontext *mucontext = rdma_udata_to_drv_context(
159589944450SShamir Rabinovitch 		udata, struct mlx5_ib_ucontext, ibucontext);
159628d61370SYishai Hadas 	struct mlx5_ib_create_qp_resp resp = {};
159728d61370SYishai Hadas 	int inlen;
15981f1d6abbSAriel Levkovich 	int outlen;
159928d61370SYishai Hadas 	int err;
160028d61370SYishai Hadas 	u32 *in;
16011f1d6abbSAriel Levkovich 	u32 *out;
160228d61370SYishai Hadas 	void *tirc;
160328d61370SYishai Hadas 	void *hfso;
160428d61370SYishai Hadas 	u32 selected_fields = 0;
16052d93fc85SMatan Barak 	u32 outer_l4;
160628d61370SYishai Hadas 	size_t min_resp_len;
160728d61370SYishai Hadas 	u32 tdn = mucontext->tdn;
160828d61370SYishai Hadas 	struct mlx5_ib_create_qp_rss ucmd = {};
160928d61370SYishai Hadas 	size_t required_cmd_sz;
1610175edba8SMark Bloch 	u8 lb_flag = 0;
161128d61370SYishai Hadas 
161228d61370SYishai Hadas 	if (init_attr->qp_type != IB_QPT_RAW_PACKET)
161328d61370SYishai Hadas 		return -EOPNOTSUPP;
161428d61370SYishai Hadas 
161528d61370SYishai Hadas 	if (init_attr->create_flags || init_attr->send_cq)
161628d61370SYishai Hadas 		return -EINVAL;
161728d61370SYishai Hadas 
16182f5ff264SEli Cohen 	min_resp_len = offsetof(typeof(resp), bfreg_index) + sizeof(resp.bfreg_index);
161928d61370SYishai Hadas 	if (udata->outlen < min_resp_len)
162028d61370SYishai Hadas 		return -EINVAL;
162128d61370SYishai Hadas 
1622f95ef6cbSMaor Gottlieb 	required_cmd_sz = offsetof(typeof(ucmd), flags) + sizeof(ucmd.flags);
162328d61370SYishai Hadas 	if (udata->inlen < required_cmd_sz) {
162428d61370SYishai Hadas 		mlx5_ib_dbg(dev, "invalid inlen\n");
162528d61370SYishai Hadas 		return -EINVAL;
162628d61370SYishai Hadas 	}
162728d61370SYishai Hadas 
162828d61370SYishai Hadas 	if (udata->inlen > sizeof(ucmd) &&
162928d61370SYishai Hadas 	    !ib_is_udata_cleared(udata, sizeof(ucmd),
163028d61370SYishai Hadas 				 udata->inlen - sizeof(ucmd))) {
163128d61370SYishai Hadas 		mlx5_ib_dbg(dev, "inlen is not supported\n");
163228d61370SYishai Hadas 		return -EOPNOTSUPP;
163328d61370SYishai Hadas 	}
163428d61370SYishai Hadas 
163528d61370SYishai Hadas 	if (ib_copy_from_udata(&ucmd, udata, min(sizeof(ucmd), udata->inlen))) {
163628d61370SYishai Hadas 		mlx5_ib_dbg(dev, "copy failed\n");
163728d61370SYishai Hadas 		return -EFAULT;
163828d61370SYishai Hadas 	}
163928d61370SYishai Hadas 
164028d61370SYishai Hadas 	if (ucmd.comp_mask) {
164128d61370SYishai Hadas 		mlx5_ib_dbg(dev, "invalid comp mask\n");
164228d61370SYishai Hadas 		return -EOPNOTSUPP;
164328d61370SYishai Hadas 	}
164428d61370SYishai Hadas 
1645175edba8SMark Bloch 	if (ucmd.flags & ~(MLX5_QP_FLAG_TUNNEL_OFFLOADS |
1646175edba8SMark Bloch 			   MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC |
1647175edba8SMark Bloch 			   MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC)) {
1648f95ef6cbSMaor Gottlieb 		mlx5_ib_dbg(dev, "invalid flags\n");
1649f95ef6cbSMaor Gottlieb 		return -EOPNOTSUPP;
1650f95ef6cbSMaor Gottlieb 	}
1651f95ef6cbSMaor Gottlieb 
1652f95ef6cbSMaor Gottlieb 	if (ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS &&
1653f95ef6cbSMaor Gottlieb 	    !tunnel_offload_supported(dev->mdev)) {
1654f95ef6cbSMaor Gottlieb 		mlx5_ib_dbg(dev, "tunnel offloads isn't supported\n");
165528d61370SYishai Hadas 		return -EOPNOTSUPP;
165628d61370SYishai Hadas 	}
165728d61370SYishai Hadas 
1658309fa347SMaor Gottlieb 	if (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_INNER &&
1659309fa347SMaor Gottlieb 	    !(ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS)) {
1660309fa347SMaor Gottlieb 		mlx5_ib_dbg(dev, "Tunnel offloads must be set for inner RSS\n");
1661309fa347SMaor Gottlieb 		return -EOPNOTSUPP;
1662309fa347SMaor Gottlieb 	}
1663309fa347SMaor Gottlieb 
16646a4d00beSMark Bloch 	if (ucmd.flags & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC || dev->is_rep) {
1665175edba8SMark Bloch 		lb_flag |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST;
1666175edba8SMark Bloch 		qp->flags_en |= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC;
1667175edba8SMark Bloch 	}
1668175edba8SMark Bloch 
1669175edba8SMark Bloch 	if (ucmd.flags & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC) {
1670175edba8SMark Bloch 		lb_flag |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST;
1671175edba8SMark Bloch 		qp->flags_en |= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC;
1672175edba8SMark Bloch 	}
1673175edba8SMark Bloch 
167441d902cbSJason Gunthorpe 	err = ib_copy_to_udata(udata, &resp, min(udata->outlen, sizeof(resp)));
167528d61370SYishai Hadas 	if (err) {
167628d61370SYishai Hadas 		mlx5_ib_dbg(dev, "copy failed\n");
167728d61370SYishai Hadas 		return -EINVAL;
167828d61370SYishai Hadas 	}
167928d61370SYishai Hadas 
168028d61370SYishai Hadas 	inlen = MLX5_ST_SZ_BYTES(create_tir_in);
16811f1d6abbSAriel Levkovich 	outlen = MLX5_ST_SZ_BYTES(create_tir_out);
16821f1d6abbSAriel Levkovich 	in = kvzalloc(inlen + outlen, GFP_KERNEL);
168328d61370SYishai Hadas 	if (!in)
168428d61370SYishai Hadas 		return -ENOMEM;
168528d61370SYishai Hadas 
16861f1d6abbSAriel Levkovich 	out = in + MLX5_ST_SZ_DW(create_tir_in);
1687443c1cf9SYishai Hadas 	MLX5_SET(create_tir_in, in, uid, to_mpd(pd)->uid);
168828d61370SYishai Hadas 	tirc = MLX5_ADDR_OF(create_tir_in, in, ctx);
168928d61370SYishai Hadas 	MLX5_SET(tirc, tirc, disp_type,
169028d61370SYishai Hadas 		 MLX5_TIRC_DISP_TYPE_INDIRECT);
169128d61370SYishai Hadas 	MLX5_SET(tirc, tirc, indirect_table,
169228d61370SYishai Hadas 		 init_attr->rwq_ind_tbl->ind_tbl_num);
169328d61370SYishai Hadas 	MLX5_SET(tirc, tirc, transport_domain, tdn);
169428d61370SYishai Hadas 
169528d61370SYishai Hadas 	hfso = MLX5_ADDR_OF(tirc, tirc, rx_hash_field_selector_outer);
1696f95ef6cbSMaor Gottlieb 
1697f95ef6cbSMaor Gottlieb 	if (ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS)
1698f95ef6cbSMaor Gottlieb 		MLX5_SET(tirc, tirc, tunneled_offload_en, 1);
1699f95ef6cbSMaor Gottlieb 
1700175edba8SMark Bloch 	MLX5_SET(tirc, tirc, self_lb_block, lb_flag);
1701175edba8SMark Bloch 
1702309fa347SMaor Gottlieb 	if (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_INNER)
1703309fa347SMaor Gottlieb 		hfso = MLX5_ADDR_OF(tirc, tirc, rx_hash_field_selector_inner);
1704309fa347SMaor Gottlieb 	else
1705309fa347SMaor Gottlieb 		hfso = MLX5_ADDR_OF(tirc, tirc, rx_hash_field_selector_outer);
1706309fa347SMaor Gottlieb 
170728d61370SYishai Hadas 	switch (ucmd.rx_hash_function) {
170828d61370SYishai Hadas 	case MLX5_RX_HASH_FUNC_TOEPLITZ:
170928d61370SYishai Hadas 	{
171028d61370SYishai Hadas 		void *rss_key = MLX5_ADDR_OF(tirc, tirc, rx_hash_toeplitz_key);
171128d61370SYishai Hadas 		size_t len = MLX5_FLD_SZ_BYTES(tirc, rx_hash_toeplitz_key);
171228d61370SYishai Hadas 
171328d61370SYishai Hadas 		if (len != ucmd.rx_key_len) {
171428d61370SYishai Hadas 			err = -EINVAL;
171528d61370SYishai Hadas 			goto err;
171628d61370SYishai Hadas 		}
171728d61370SYishai Hadas 
171828d61370SYishai Hadas 		MLX5_SET(tirc, tirc, rx_hash_fn, MLX5_RX_HASH_FN_TOEPLITZ);
171928d61370SYishai Hadas 		memcpy(rss_key, ucmd.rx_hash_key, len);
172028d61370SYishai Hadas 		break;
172128d61370SYishai Hadas 	}
172228d61370SYishai Hadas 	default:
172328d61370SYishai Hadas 		err = -EOPNOTSUPP;
172428d61370SYishai Hadas 		goto err;
172528d61370SYishai Hadas 	}
172628d61370SYishai Hadas 
172728d61370SYishai Hadas 	if (!ucmd.rx_hash_fields_mask) {
172828d61370SYishai Hadas 		/* special case when this TIR serves as steering entry without hashing */
172928d61370SYishai Hadas 		if (!init_attr->rwq_ind_tbl->log_ind_tbl_size)
173028d61370SYishai Hadas 			goto create_tir;
173128d61370SYishai Hadas 		err = -EINVAL;
173228d61370SYishai Hadas 		goto err;
173328d61370SYishai Hadas 	}
173428d61370SYishai Hadas 
173528d61370SYishai Hadas 	if (((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV4) ||
173628d61370SYishai Hadas 	     (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV4)) &&
173728d61370SYishai Hadas 	     ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV6) ||
173828d61370SYishai Hadas 	     (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV6))) {
173928d61370SYishai Hadas 		err = -EINVAL;
174028d61370SYishai Hadas 		goto err;
174128d61370SYishai Hadas 	}
174228d61370SYishai Hadas 
174328d61370SYishai Hadas 	/* If none of IPV4 & IPV6 SRC/DST was set - this bit field is ignored */
174428d61370SYishai Hadas 	if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV4) ||
174528d61370SYishai Hadas 	    (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV4))
174628d61370SYishai Hadas 		MLX5_SET(rx_hash_field_select, hfso, l3_prot_type,
174728d61370SYishai Hadas 			 MLX5_L3_PROT_TYPE_IPV4);
174828d61370SYishai Hadas 	else if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV6) ||
174928d61370SYishai Hadas 		 (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV6))
175028d61370SYishai Hadas 		MLX5_SET(rx_hash_field_select, hfso, l3_prot_type,
175128d61370SYishai Hadas 			 MLX5_L3_PROT_TYPE_IPV6);
175228d61370SYishai Hadas 
17532d93fc85SMatan Barak 	outer_l4 = ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_TCP) ||
17542d93fc85SMatan Barak 		    (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_TCP)) << 0 |
175528d61370SYishai Hadas 		   ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_UDP) ||
17562d93fc85SMatan Barak 		    (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_UDP)) << 1 |
17572d93fc85SMatan Barak 		   (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_IPSEC_SPI) << 2;
17582d93fc85SMatan Barak 
17592d93fc85SMatan Barak 	/* Check that only one l4 protocol is set */
17602d93fc85SMatan Barak 	if (outer_l4 & (outer_l4 - 1)) {
176128d61370SYishai Hadas 		err = -EINVAL;
176228d61370SYishai Hadas 		goto err;
176328d61370SYishai Hadas 	}
176428d61370SYishai Hadas 
176528d61370SYishai Hadas 	/* If none of TCP & UDP SRC/DST was set - this bit field is ignored */
176628d61370SYishai Hadas 	if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_TCP) ||
176728d61370SYishai Hadas 	    (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_TCP))
176828d61370SYishai Hadas 		MLX5_SET(rx_hash_field_select, hfso, l4_prot_type,
176928d61370SYishai Hadas 			 MLX5_L4_PROT_TYPE_TCP);
177028d61370SYishai Hadas 	else if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_UDP) ||
177128d61370SYishai Hadas 		 (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_UDP))
177228d61370SYishai Hadas 		MLX5_SET(rx_hash_field_select, hfso, l4_prot_type,
177328d61370SYishai Hadas 			 MLX5_L4_PROT_TYPE_UDP);
177428d61370SYishai Hadas 
177528d61370SYishai Hadas 	if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV4) ||
177628d61370SYishai Hadas 	    (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_IPV6))
177728d61370SYishai Hadas 		selected_fields |= MLX5_HASH_FIELD_SEL_SRC_IP;
177828d61370SYishai Hadas 
177928d61370SYishai Hadas 	if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV4) ||
178028d61370SYishai Hadas 	    (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_IPV6))
178128d61370SYishai Hadas 		selected_fields |= MLX5_HASH_FIELD_SEL_DST_IP;
178228d61370SYishai Hadas 
178328d61370SYishai Hadas 	if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_TCP) ||
178428d61370SYishai Hadas 	    (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_UDP))
178528d61370SYishai Hadas 		selected_fields |= MLX5_HASH_FIELD_SEL_L4_SPORT;
178628d61370SYishai Hadas 
178728d61370SYishai Hadas 	if ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_TCP) ||
178828d61370SYishai Hadas 	    (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_UDP))
178928d61370SYishai Hadas 		selected_fields |= MLX5_HASH_FIELD_SEL_L4_DPORT;
179028d61370SYishai Hadas 
17912d93fc85SMatan Barak 	if (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_IPSEC_SPI)
17922d93fc85SMatan Barak 		selected_fields |= MLX5_HASH_FIELD_SEL_IPSEC_SPI;
17932d93fc85SMatan Barak 
179428d61370SYishai Hadas 	MLX5_SET(rx_hash_field_select, hfso, selected_fields, selected_fields);
179528d61370SYishai Hadas 
179628d61370SYishai Hadas create_tir:
17971f1d6abbSAriel Levkovich 	err = mlx5_core_create_tir_out(dev->mdev, in, inlen, out, outlen);
179828d61370SYishai Hadas 
17991f1d6abbSAriel Levkovich 	qp->rss_qp.tirn = MLX5_GET(create_tir_out, out, tirn);
18000042f9e4SMark Bloch 	if (!err && MLX5_GET(tirc, tirc, self_lb_block)) {
18010042f9e4SMark Bloch 		err = mlx5_ib_enable_lb(dev, false, true);
18020042f9e4SMark Bloch 
18030042f9e4SMark Bloch 		if (err)
1804443c1cf9SYishai Hadas 			mlx5_cmd_destroy_tir(dev->mdev, qp->rss_qp.tirn,
1805443c1cf9SYishai Hadas 					     to_mpd(pd)->uid);
18060042f9e4SMark Bloch 	}
18070042f9e4SMark Bloch 
180828d61370SYishai Hadas 	if (err)
180928d61370SYishai Hadas 		goto err;
181028d61370SYishai Hadas 
18117f72052cSYishai Hadas 	if (mucontext->devx_uid) {
18127f72052cSYishai Hadas 		resp.comp_mask |= MLX5_IB_CREATE_QP_RESP_MASK_TIRN;
18137f72052cSYishai Hadas 		resp.tirn = qp->rss_qp.tirn;
18141f1d6abbSAriel Levkovich 		if (MLX5_CAP_FLOWTABLE_NIC_RX(dev->mdev, sw_owner)) {
18151f1d6abbSAriel Levkovich 			resp.tir_icm_addr =
18161f1d6abbSAriel Levkovich 				MLX5_GET(create_tir_out, out, icm_address_31_0);
18171f1d6abbSAriel Levkovich 			resp.tir_icm_addr |= (u64)MLX5_GET(create_tir_out, out,
18181f1d6abbSAriel Levkovich 							   icm_address_39_32)
18191f1d6abbSAriel Levkovich 					     << 32;
18201f1d6abbSAriel Levkovich 			resp.tir_icm_addr |= (u64)MLX5_GET(create_tir_out, out,
18211f1d6abbSAriel Levkovich 							   icm_address_63_40)
18221f1d6abbSAriel Levkovich 					     << 40;
18231f1d6abbSAriel Levkovich 			resp.comp_mask |=
18241f1d6abbSAriel Levkovich 				MLX5_IB_CREATE_QP_RESP_MASK_TIR_ICM_ADDR;
18251f1d6abbSAriel Levkovich 		}
18267f72052cSYishai Hadas 	}
18277f72052cSYishai Hadas 
18287f72052cSYishai Hadas 	err = ib_copy_to_udata(udata, &resp, min(udata->outlen, sizeof(resp)));
18297f72052cSYishai Hadas 	if (err)
18307f72052cSYishai Hadas 		goto err_copy;
18317f72052cSYishai Hadas 
183228d61370SYishai Hadas 	kvfree(in);
183328d61370SYishai Hadas 	/* qpn is reserved for that QP */
183428d61370SYishai Hadas 	qp->trans_qp.base.mqp.qpn = 0;
1835d9f88e5aSYishai Hadas 	qp->flags |= MLX5_IB_QP_RSS;
183628d61370SYishai Hadas 	return 0;
183728d61370SYishai Hadas 
18387f72052cSYishai Hadas err_copy:
18397f72052cSYishai Hadas 	mlx5_cmd_destroy_tir(dev->mdev, qp->rss_qp.tirn, mucontext->devx_uid);
184028d61370SYishai Hadas err:
184128d61370SYishai Hadas 	kvfree(in);
184228d61370SYishai Hadas 	return err;
184328d61370SYishai Hadas }
184428d61370SYishai Hadas 
18455d6ff1baSYonatan Cohen static void configure_responder_scat_cqe(struct ib_qp_init_attr *init_attr,
18465d6ff1baSYonatan Cohen 					 void *qpc)
18475d6ff1baSYonatan Cohen {
18485d6ff1baSYonatan Cohen 	int rcqe_sz;
18495d6ff1baSYonatan Cohen 
18505d6ff1baSYonatan Cohen 	if (init_attr->qp_type == MLX5_IB_QPT_DCI)
18515d6ff1baSYonatan Cohen 		return;
18525d6ff1baSYonatan Cohen 
18535d6ff1baSYonatan Cohen 	rcqe_sz = mlx5_ib_get_cqe_size(init_attr->recv_cq);
18545d6ff1baSYonatan Cohen 
18557249c8eaSGuy Levi 	if (init_attr->qp_type == MLX5_IB_QPT_DCT) {
18567249c8eaSGuy Levi 		if (rcqe_sz == 128)
18577249c8eaSGuy Levi 			MLX5_SET(dctc, qpc, cs_res, MLX5_RES_SCAT_DATA64_CQE);
18587249c8eaSGuy Levi 
18595d6ff1baSYonatan Cohen 		return;
18605d6ff1baSYonatan Cohen 	}
18615d6ff1baSYonatan Cohen 
18627249c8eaSGuy Levi 	MLX5_SET(qpc, qpc, cs_res,
18637249c8eaSGuy Levi 		 rcqe_sz == 128 ? MLX5_RES_SCAT_DATA64_CQE :
18647249c8eaSGuy Levi 				  MLX5_RES_SCAT_DATA32_CQE);
18655d6ff1baSYonatan Cohen }
18665d6ff1baSYonatan Cohen 
18675d6ff1baSYonatan Cohen static void configure_requester_scat_cqe(struct mlx5_ib_dev *dev,
18685d6ff1baSYonatan Cohen 					 struct ib_qp_init_attr *init_attr,
18696f4bc0eaSYonatan Cohen 					 struct mlx5_ib_create_qp *ucmd,
18705d6ff1baSYonatan Cohen 					 void *qpc)
18715d6ff1baSYonatan Cohen {
18725d6ff1baSYonatan Cohen 	enum ib_qp_type qpt = init_attr->qp_type;
18735d6ff1baSYonatan Cohen 	int scqe_sz;
18742ab367a7Szhengbin 	bool allow_scat_cqe = false;
18755d6ff1baSYonatan Cohen 
18765d6ff1baSYonatan Cohen 	if (qpt == IB_QPT_UC || qpt == IB_QPT_UD)
18775d6ff1baSYonatan Cohen 		return;
18785d6ff1baSYonatan Cohen 
18796f4bc0eaSYonatan Cohen 	if (ucmd)
18806f4bc0eaSYonatan Cohen 		allow_scat_cqe = ucmd->flags & MLX5_QP_FLAG_ALLOW_SCATTER_CQE;
18816f4bc0eaSYonatan Cohen 
18826f4bc0eaSYonatan Cohen 	if (!allow_scat_cqe && init_attr->sq_sig_type != IB_SIGNAL_ALL_WR)
18835d6ff1baSYonatan Cohen 		return;
18845d6ff1baSYonatan Cohen 
18855d6ff1baSYonatan Cohen 	scqe_sz = mlx5_ib_get_cqe_size(init_attr->send_cq);
18865d6ff1baSYonatan Cohen 	if (scqe_sz == 128) {
18875d6ff1baSYonatan Cohen 		MLX5_SET(qpc, qpc, cs_req, MLX5_REQ_SCAT_DATA64_CQE);
18885d6ff1baSYonatan Cohen 		return;
18895d6ff1baSYonatan Cohen 	}
18905d6ff1baSYonatan Cohen 
18915d6ff1baSYonatan Cohen 	if (init_attr->qp_type != MLX5_IB_QPT_DCI ||
18925d6ff1baSYonatan Cohen 	    MLX5_CAP_GEN(dev->mdev, dc_req_scat_data_cqe))
18935d6ff1baSYonatan Cohen 		MLX5_SET(qpc, qpc, cs_req, MLX5_REQ_SCAT_DATA32_CQE);
18945d6ff1baSYonatan Cohen }
18955d6ff1baSYonatan Cohen 
1896a60109dcSYonatan Cohen static int atomic_size_to_mode(int size_mask)
1897a60109dcSYonatan Cohen {
1898a60109dcSYonatan Cohen 	/* driver does not support atomic_size > 256B
1899a60109dcSYonatan Cohen 	 * and does not know how to translate bigger sizes
1900a60109dcSYonatan Cohen 	 */
1901a60109dcSYonatan Cohen 	int supported_size_mask = size_mask & 0x1ff;
1902a60109dcSYonatan Cohen 	int log_max_size;
1903a60109dcSYonatan Cohen 
1904a60109dcSYonatan Cohen 	if (!supported_size_mask)
1905a60109dcSYonatan Cohen 		return -EOPNOTSUPP;
1906a60109dcSYonatan Cohen 
1907a60109dcSYonatan Cohen 	log_max_size = __fls(supported_size_mask);
1908a60109dcSYonatan Cohen 
1909a60109dcSYonatan Cohen 	if (log_max_size > 3)
1910a60109dcSYonatan Cohen 		return log_max_size;
1911a60109dcSYonatan Cohen 
1912a60109dcSYonatan Cohen 	return MLX5_ATOMIC_MODE_8B;
1913a60109dcSYonatan Cohen }
1914a60109dcSYonatan Cohen 
1915a60109dcSYonatan Cohen static int get_atomic_mode(struct mlx5_ib_dev *dev,
1916a60109dcSYonatan Cohen 			   enum ib_qp_type qp_type)
1917a60109dcSYonatan Cohen {
1918a60109dcSYonatan Cohen 	u8 atomic_operations = MLX5_CAP_ATOMIC(dev->mdev, atomic_operations);
1919a60109dcSYonatan Cohen 	u8 atomic = MLX5_CAP_GEN(dev->mdev, atomic);
1920a60109dcSYonatan Cohen 	int atomic_mode = -EOPNOTSUPP;
1921a60109dcSYonatan Cohen 	int atomic_size_mask;
1922a60109dcSYonatan Cohen 
1923a60109dcSYonatan Cohen 	if (!atomic)
1924a60109dcSYonatan Cohen 		return -EOPNOTSUPP;
1925a60109dcSYonatan Cohen 
1926a60109dcSYonatan Cohen 	if (qp_type == MLX5_IB_QPT_DCT)
1927a60109dcSYonatan Cohen 		atomic_size_mask = MLX5_CAP_ATOMIC(dev->mdev, atomic_size_dc);
1928a60109dcSYonatan Cohen 	else
1929a60109dcSYonatan Cohen 		atomic_size_mask = MLX5_CAP_ATOMIC(dev->mdev, atomic_size_qp);
1930a60109dcSYonatan Cohen 
1931a60109dcSYonatan Cohen 	if ((atomic_operations & MLX5_ATOMIC_OPS_EXTENDED_CMP_SWAP) ||
1932a60109dcSYonatan Cohen 	    (atomic_operations & MLX5_ATOMIC_OPS_EXTENDED_FETCH_ADD))
1933a60109dcSYonatan Cohen 		atomic_mode = atomic_size_to_mode(atomic_size_mask);
1934a60109dcSYonatan Cohen 
1935a60109dcSYonatan Cohen 	if (atomic_mode <= 0 &&
1936a60109dcSYonatan Cohen 	    (atomic_operations & MLX5_ATOMIC_OPS_CMP_SWAP &&
1937a60109dcSYonatan Cohen 	     atomic_operations & MLX5_ATOMIC_OPS_FETCH_ADD))
1938a60109dcSYonatan Cohen 		atomic_mode = MLX5_ATOMIC_MODE_IB_COMP;
1939a60109dcSYonatan Cohen 
1940a60109dcSYonatan Cohen 	return atomic_mode;
1941a60109dcSYonatan Cohen }
1942a60109dcSYonatan Cohen 
19432e43bb31SYonatan Cohen static inline bool check_flags_mask(uint64_t input, uint64_t supported)
19442e43bb31SYonatan Cohen {
19452e43bb31SYonatan Cohen 	return (input & ~supported) == 0;
19462e43bb31SYonatan Cohen }
19472e43bb31SYonatan Cohen 
1948e126ba97SEli Cohen static int create_qp_common(struct mlx5_ib_dev *dev, struct ib_pd *pd,
1949e126ba97SEli Cohen 			    struct ib_qp_init_attr *init_attr,
1950e126ba97SEli Cohen 			    struct ib_udata *udata, struct mlx5_ib_qp *qp)
1951e126ba97SEli Cohen {
1952e126ba97SEli Cohen 	struct mlx5_ib_resources *devr = &dev->devr;
195309a7d9ecSSaeed Mahameed 	int inlen = MLX5_ST_SZ_BYTES(create_qp_in);
1954938fe83cSSaeed Mahameed 	struct mlx5_core_dev *mdev = dev->mdev;
19550625b4baSJason Gunthorpe 	struct mlx5_ib_create_qp_resp resp = {};
195689944450SShamir Rabinovitch 	struct mlx5_ib_ucontext *ucontext = rdma_udata_to_drv_context(
195789944450SShamir Rabinovitch 		udata, struct mlx5_ib_ucontext, ibucontext);
195889ea94a7SMaor Gottlieb 	struct mlx5_ib_cq *send_cq;
195989ea94a7SMaor Gottlieb 	struct mlx5_ib_cq *recv_cq;
196089ea94a7SMaor Gottlieb 	unsigned long flags;
1961cfb5e088SHaggai Abramovsky 	u32 uidx = MLX5_IB_DEFAULT_UIDX;
196209a7d9ecSSaeed Mahameed 	struct mlx5_ib_create_qp ucmd;
196309a7d9ecSSaeed Mahameed 	struct mlx5_ib_qp_base *base;
1964e7b169f3SNoa Osherovich 	int mlx5_st;
1965cfb5e088SHaggai Abramovsky 	void *qpc;
196609a7d9ecSSaeed Mahameed 	u32 *in;
196709a7d9ecSSaeed Mahameed 	int err;
1968e126ba97SEli Cohen 
1969e126ba97SEli Cohen 	mutex_init(&qp->mutex);
1970e126ba97SEli Cohen 	spin_lock_init(&qp->sq.lock);
1971e126ba97SEli Cohen 	spin_lock_init(&qp->rq.lock);
1972e126ba97SEli Cohen 
1973e7b169f3SNoa Osherovich 	mlx5_st = to_mlx5_st(init_attr->qp_type);
1974e7b169f3SNoa Osherovich 	if (mlx5_st < 0)
1975e7b169f3SNoa Osherovich 		return -EINVAL;
1976e7b169f3SNoa Osherovich 
197728d61370SYishai Hadas 	if (init_attr->rwq_ind_tbl) {
197828d61370SYishai Hadas 		if (!udata)
197928d61370SYishai Hadas 			return -ENOSYS;
198028d61370SYishai Hadas 
198128d61370SYishai Hadas 		err = create_rss_raw_qp_tir(dev, qp, pd, init_attr, udata);
198228d61370SYishai Hadas 		return err;
198328d61370SYishai Hadas 	}
198428d61370SYishai Hadas 
1985f360d88aSEli Cohen 	if (init_attr->create_flags & IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK) {
1986938fe83cSSaeed Mahameed 		if (!MLX5_CAP_GEN(mdev, block_lb_mc)) {
1987f360d88aSEli Cohen 			mlx5_ib_dbg(dev, "block multicast loopback isn't supported\n");
1988f360d88aSEli Cohen 			return -EINVAL;
1989f360d88aSEli Cohen 		} else {
1990f360d88aSEli Cohen 			qp->flags |= MLX5_IB_QP_BLOCK_MULTICAST_LOOPBACK;
1991f360d88aSEli Cohen 		}
1992f360d88aSEli Cohen 	}
1993f360d88aSEli Cohen 
1994051f2630SLeon Romanovsky 	if (init_attr->create_flags &
1995051f2630SLeon Romanovsky 			(IB_QP_CREATE_CROSS_CHANNEL |
1996051f2630SLeon Romanovsky 			 IB_QP_CREATE_MANAGED_SEND |
1997051f2630SLeon Romanovsky 			 IB_QP_CREATE_MANAGED_RECV)) {
1998051f2630SLeon Romanovsky 		if (!MLX5_CAP_GEN(mdev, cd)) {
1999051f2630SLeon Romanovsky 			mlx5_ib_dbg(dev, "cross-channel isn't supported\n");
2000051f2630SLeon Romanovsky 			return -EINVAL;
2001051f2630SLeon Romanovsky 		}
2002051f2630SLeon Romanovsky 		if (init_attr->create_flags & IB_QP_CREATE_CROSS_CHANNEL)
2003051f2630SLeon Romanovsky 			qp->flags |= MLX5_IB_QP_CROSS_CHANNEL;
2004051f2630SLeon Romanovsky 		if (init_attr->create_flags & IB_QP_CREATE_MANAGED_SEND)
2005051f2630SLeon Romanovsky 			qp->flags |= MLX5_IB_QP_MANAGED_SEND;
2006051f2630SLeon Romanovsky 		if (init_attr->create_flags & IB_QP_CREATE_MANAGED_RECV)
2007051f2630SLeon Romanovsky 			qp->flags |= MLX5_IB_QP_MANAGED_RECV;
2008051f2630SLeon Romanovsky 	}
2009f0313965SErez Shitrit 
2010f0313965SErez Shitrit 	if (init_attr->qp_type == IB_QPT_UD &&
2011f0313965SErez Shitrit 	    (init_attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO))
2012f0313965SErez Shitrit 		if (!MLX5_CAP_GEN(mdev, ipoib_basic_offloads)) {
2013f0313965SErez Shitrit 			mlx5_ib_dbg(dev, "ipoib UD lso qp isn't supported\n");
2014f0313965SErez Shitrit 			return -EOPNOTSUPP;
2015f0313965SErez Shitrit 		}
2016f0313965SErez Shitrit 
2017358e42eaSMajd Dibbiny 	if (init_attr->create_flags & IB_QP_CREATE_SCATTER_FCS) {
2018358e42eaSMajd Dibbiny 		if (init_attr->qp_type != IB_QPT_RAW_PACKET) {
2019358e42eaSMajd Dibbiny 			mlx5_ib_dbg(dev, "Scatter FCS is supported only for Raw Packet QPs");
2020358e42eaSMajd Dibbiny 			return -EOPNOTSUPP;
2021358e42eaSMajd Dibbiny 		}
2022358e42eaSMajd Dibbiny 		if (!MLX5_CAP_GEN(dev->mdev, eth_net_offloads) ||
2023358e42eaSMajd Dibbiny 		    !MLX5_CAP_ETH(dev->mdev, scatter_fcs)) {
2024358e42eaSMajd Dibbiny 			mlx5_ib_dbg(dev, "Scatter FCS isn't supported\n");
2025358e42eaSMajd Dibbiny 			return -EOPNOTSUPP;
2026358e42eaSMajd Dibbiny 		}
2027358e42eaSMajd Dibbiny 		qp->flags |= MLX5_IB_QP_CAP_SCATTER_FCS;
2028358e42eaSMajd Dibbiny 	}
2029358e42eaSMajd Dibbiny 
2030e126ba97SEli Cohen 	if (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR)
2031e126ba97SEli Cohen 		qp->sq_signal_bits = MLX5_WQE_CTRL_CQ_UPDATE;
2032e126ba97SEli Cohen 
2033e4cc4fa7SNoa Osherovich 	if (init_attr->create_flags & IB_QP_CREATE_CVLAN_STRIPPING) {
2034e4cc4fa7SNoa Osherovich 		if (!(MLX5_CAP_GEN(dev->mdev, eth_net_offloads) &&
2035e4cc4fa7SNoa Osherovich 		      MLX5_CAP_ETH(dev->mdev, vlan_cap)) ||
2036e4cc4fa7SNoa Osherovich 		    (init_attr->qp_type != IB_QPT_RAW_PACKET))
2037e4cc4fa7SNoa Osherovich 			return -EOPNOTSUPP;
2038e4cc4fa7SNoa Osherovich 		qp->flags |= MLX5_IB_QP_CVLAN_STRIPPING;
2039e4cc4fa7SNoa Osherovich 	}
2040e4cc4fa7SNoa Osherovich 
2041e00b64f7SShamir Rabinovitch 	if (udata) {
2042e126ba97SEli Cohen 		if (ib_copy_from_udata(&ucmd, udata, sizeof(ucmd))) {
2043e126ba97SEli Cohen 			mlx5_ib_dbg(dev, "copy failed\n");
2044e126ba97SEli Cohen 			return -EFAULT;
2045e126ba97SEli Cohen 		}
2046e126ba97SEli Cohen 
20472e43bb31SYonatan Cohen 		if (!check_flags_mask(ucmd.flags,
2048569c6651SDanit Goldberg 				      MLX5_QP_FLAG_ALLOW_SCATTER_CQE |
20498af526e0SMark Bloch 				      MLX5_QP_FLAG_BFREG_INDEX |
20508af526e0SMark Bloch 				      MLX5_QP_FLAG_PACKET_BASED_CREDIT_MODE |
20518af526e0SMark Bloch 				      MLX5_QP_FLAG_SCATTER_CQE |
20528af526e0SMark Bloch 				      MLX5_QP_FLAG_SIGNATURE |
20538af526e0SMark Bloch 				      MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC |
20548af526e0SMark Bloch 				      MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC |
20558af526e0SMark Bloch 				      MLX5_QP_FLAG_TUNNEL_OFFLOADS |
20568af526e0SMark Bloch 				      MLX5_QP_FLAG_TYPE_DCI |
20578af526e0SMark Bloch 				      MLX5_QP_FLAG_TYPE_DCT))
20582e43bb31SYonatan Cohen 			return -EINVAL;
20592e43bb31SYonatan Cohen 
206089944450SShamir Rabinovitch 		err = get_qp_user_index(ucontext, &ucmd, udata->inlen, &uidx);
2061cfb5e088SHaggai Abramovsky 		if (err)
2062cfb5e088SHaggai Abramovsky 			return err;
2063cfb5e088SHaggai Abramovsky 
2064e126ba97SEli Cohen 		qp->wq_sig = !!(ucmd.flags & MLX5_QP_FLAG_SIGNATURE);
20655d6ff1baSYonatan Cohen 		if (MLX5_CAP_GEN(dev->mdev, sctr_data_cqe))
2066e126ba97SEli Cohen 			qp->scat_cqe = !!(ucmd.flags & MLX5_QP_FLAG_SCATTER_CQE);
2067f95ef6cbSMaor Gottlieb 		if (ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS) {
2068f95ef6cbSMaor Gottlieb 			if (init_attr->qp_type != IB_QPT_RAW_PACKET ||
2069f95ef6cbSMaor Gottlieb 			    !tunnel_offload_supported(mdev)) {
2070f95ef6cbSMaor Gottlieb 				mlx5_ib_dbg(dev, "Tunnel offload isn't supported\n");
2071f95ef6cbSMaor Gottlieb 				return -EOPNOTSUPP;
2072f95ef6cbSMaor Gottlieb 			}
2073175edba8SMark Bloch 			qp->flags_en |= MLX5_QP_FLAG_TUNNEL_OFFLOADS;
2074175edba8SMark Bloch 		}
2075175edba8SMark Bloch 
2076175edba8SMark Bloch 		if (ucmd.flags & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC) {
2077175edba8SMark Bloch 			if (init_attr->qp_type != IB_QPT_RAW_PACKET) {
2078175edba8SMark Bloch 				mlx5_ib_dbg(dev, "Self-LB UC isn't supported\n");
2079175edba8SMark Bloch 				return -EOPNOTSUPP;
2080175edba8SMark Bloch 			}
2081175edba8SMark Bloch 			qp->flags_en |= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC;
2082175edba8SMark Bloch 		}
2083175edba8SMark Bloch 
2084175edba8SMark Bloch 		if (ucmd.flags & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC) {
2085175edba8SMark Bloch 			if (init_attr->qp_type != IB_QPT_RAW_PACKET) {
2086175edba8SMark Bloch 				mlx5_ib_dbg(dev, "Self-LB UM isn't supported\n");
2087175edba8SMark Bloch 				return -EOPNOTSUPP;
2088175edba8SMark Bloch 			}
2089175edba8SMark Bloch 			qp->flags_en |= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC;
2090f95ef6cbSMaor Gottlieb 		}
2091c2e53b2cSYishai Hadas 
2092569c6651SDanit Goldberg 		if (ucmd.flags & MLX5_QP_FLAG_PACKET_BASED_CREDIT_MODE) {
2093569c6651SDanit Goldberg 			if (init_attr->qp_type != IB_QPT_RC ||
2094569c6651SDanit Goldberg 				!MLX5_CAP_GEN(dev->mdev, qp_packet_based)) {
2095569c6651SDanit Goldberg 				mlx5_ib_dbg(dev, "packet based credit mode isn't supported\n");
2096569c6651SDanit Goldberg 				return -EOPNOTSUPP;
2097569c6651SDanit Goldberg 			}
2098569c6651SDanit Goldberg 			qp->flags |= MLX5_IB_QP_PACKET_BASED_CREDIT;
2099569c6651SDanit Goldberg 		}
2100569c6651SDanit Goldberg 
2101c2e53b2cSYishai Hadas 		if (init_attr->create_flags & IB_QP_CREATE_SOURCE_QPN) {
2102c2e53b2cSYishai Hadas 			if (init_attr->qp_type != IB_QPT_UD ||
2103c2e53b2cSYishai Hadas 			    (MLX5_CAP_GEN(dev->mdev, port_type) !=
2104c2e53b2cSYishai Hadas 			     MLX5_CAP_PORT_TYPE_IB) ||
2105c2e53b2cSYishai Hadas 			    !mlx5_get_flow_namespace(dev->mdev, MLX5_FLOW_NAMESPACE_BYPASS)) {
2106c2e53b2cSYishai Hadas 				mlx5_ib_dbg(dev, "Source QP option isn't supported\n");
2107c2e53b2cSYishai Hadas 				return -EOPNOTSUPP;
2108c2e53b2cSYishai Hadas 			}
2109c2e53b2cSYishai Hadas 
2110c2e53b2cSYishai Hadas 			qp->flags |= MLX5_IB_QP_UNDERLAY;
2111c2e53b2cSYishai Hadas 			qp->underlay_qpn = init_attr->source_qpn;
2112c2e53b2cSYishai Hadas 		}
2113e126ba97SEli Cohen 	} else {
2114e126ba97SEli Cohen 		qp->wq_sig = !!wq_signature;
2115e126ba97SEli Cohen 	}
2116e126ba97SEli Cohen 
2117c2e53b2cSYishai Hadas 	base = (init_attr->qp_type == IB_QPT_RAW_PACKET ||
2118c2e53b2cSYishai Hadas 		qp->flags & MLX5_IB_QP_UNDERLAY) ?
2119c2e53b2cSYishai Hadas 	       &qp->raw_packet_qp.rq.base :
2120c2e53b2cSYishai Hadas 	       &qp->trans_qp.base;
2121c2e53b2cSYishai Hadas 
2122e126ba97SEli Cohen 	qp->has_rq = qp_has_rq(init_attr);
2123e126ba97SEli Cohen 	err = set_rq_size(dev, &init_attr->cap, qp->has_rq,
2124e00b64f7SShamir Rabinovitch 			  qp, udata ? &ucmd : NULL);
2125e126ba97SEli Cohen 	if (err) {
2126e126ba97SEli Cohen 		mlx5_ib_dbg(dev, "err %d\n", err);
2127e126ba97SEli Cohen 		return err;
2128e126ba97SEli Cohen 	}
2129e126ba97SEli Cohen 
2130e126ba97SEli Cohen 	if (pd) {
2131e00b64f7SShamir Rabinovitch 		if (udata) {
2132938fe83cSSaeed Mahameed 			__u32 max_wqes =
2133938fe83cSSaeed Mahameed 				1 << MLX5_CAP_GEN(mdev, log_max_qp_sz);
2134e126ba97SEli Cohen 			mlx5_ib_dbg(dev, "requested sq_wqe_count (%d)\n", ucmd.sq_wqe_count);
2135e126ba97SEli Cohen 			if (ucmd.rq_wqe_shift != qp->rq.wqe_shift ||
2136e126ba97SEli Cohen 			    ucmd.rq_wqe_count != qp->rq.wqe_cnt) {
2137e126ba97SEli Cohen 				mlx5_ib_dbg(dev, "invalid rq params\n");
2138e126ba97SEli Cohen 				return -EINVAL;
2139e126ba97SEli Cohen 			}
2140938fe83cSSaeed Mahameed 			if (ucmd.sq_wqe_count > max_wqes) {
2141e126ba97SEli Cohen 				mlx5_ib_dbg(dev, "requested sq_wqe_count (%d) > max allowed (%d)\n",
2142938fe83cSSaeed Mahameed 					    ucmd.sq_wqe_count, max_wqes);
2143e126ba97SEli Cohen 				return -EINVAL;
2144e126ba97SEli Cohen 			}
2145b11a4f9cSHaggai Eran 			if (init_attr->create_flags &
21463f89b01fSMichael Guralnik 			    MLX5_IB_QP_CREATE_SQPN_QP1) {
2147b11a4f9cSHaggai Eran 				mlx5_ib_dbg(dev, "user-space is not allowed to create UD QPs spoofing as QP1\n");
2148b11a4f9cSHaggai Eran 				return -EINVAL;
2149b11a4f9cSHaggai Eran 			}
21500fb2ed66Smajd@mellanox.com 			err = create_user_qp(dev, pd, qp, udata, init_attr, &in,
21510fb2ed66Smajd@mellanox.com 					     &resp, &inlen, base);
2152e126ba97SEli Cohen 			if (err)
2153e126ba97SEli Cohen 				mlx5_ib_dbg(dev, "err %d\n", err);
2154e126ba97SEli Cohen 		} else {
215519098df2Smajd@mellanox.com 			err = create_kernel_qp(dev, init_attr, qp, &in, &inlen,
215619098df2Smajd@mellanox.com 					       base);
2157e126ba97SEli Cohen 			if (err)
2158e126ba97SEli Cohen 				mlx5_ib_dbg(dev, "err %d\n", err);
2159e126ba97SEli Cohen 		}
2160e126ba97SEli Cohen 
2161e126ba97SEli Cohen 		if (err)
2162e126ba97SEli Cohen 			return err;
2163e126ba97SEli Cohen 	} else {
21641b9a07eeSLeon Romanovsky 		in = kvzalloc(inlen, GFP_KERNEL);
2165e126ba97SEli Cohen 		if (!in)
2166e126ba97SEli Cohen 			return -ENOMEM;
2167e126ba97SEli Cohen 
2168e126ba97SEli Cohen 		qp->create_type = MLX5_QP_EMPTY;
2169e126ba97SEli Cohen 	}
2170e126ba97SEli Cohen 
2171e126ba97SEli Cohen 	if (is_sqp(init_attr->qp_type))
2172e126ba97SEli Cohen 		qp->port = init_attr->port_num;
2173e126ba97SEli Cohen 
217409a7d9ecSSaeed Mahameed 	qpc = MLX5_ADDR_OF(create_qp_in, in, qpc);
217509a7d9ecSSaeed Mahameed 
2176e7b169f3SNoa Osherovich 	MLX5_SET(qpc, qpc, st, mlx5_st);
217709a7d9ecSSaeed Mahameed 	MLX5_SET(qpc, qpc, pm_state, MLX5_QP_PM_MIGRATED);
2178e126ba97SEli Cohen 
2179e126ba97SEli Cohen 	if (init_attr->qp_type != MLX5_IB_QPT_REG_UMR)
218009a7d9ecSSaeed Mahameed 		MLX5_SET(qpc, qpc, pd, to_mpd(pd ? pd : devr->p0)->pdn);
2181e126ba97SEli Cohen 	else
218209a7d9ecSSaeed Mahameed 		MLX5_SET(qpc, qpc, latency_sensitive, 1);
218309a7d9ecSSaeed Mahameed 
2184e126ba97SEli Cohen 
2185e126ba97SEli Cohen 	if (qp->wq_sig)
218609a7d9ecSSaeed Mahameed 		MLX5_SET(qpc, qpc, wq_signature, 1);
2187e126ba97SEli Cohen 
2188f360d88aSEli Cohen 	if (qp->flags & MLX5_IB_QP_BLOCK_MULTICAST_LOOPBACK)
218909a7d9ecSSaeed Mahameed 		MLX5_SET(qpc, qpc, block_lb_mc, 1);
2190f360d88aSEli Cohen 
2191051f2630SLeon Romanovsky 	if (qp->flags & MLX5_IB_QP_CROSS_CHANNEL)
219209a7d9ecSSaeed Mahameed 		MLX5_SET(qpc, qpc, cd_master, 1);
2193051f2630SLeon Romanovsky 	if (qp->flags & MLX5_IB_QP_MANAGED_SEND)
219409a7d9ecSSaeed Mahameed 		MLX5_SET(qpc, qpc, cd_slave_send, 1);
2195051f2630SLeon Romanovsky 	if (qp->flags & MLX5_IB_QP_MANAGED_RECV)
219609a7d9ecSSaeed Mahameed 		MLX5_SET(qpc, qpc, cd_slave_receive, 1);
2197569c6651SDanit Goldberg 	if (qp->flags & MLX5_IB_QP_PACKET_BASED_CREDIT)
2198569c6651SDanit Goldberg 		MLX5_SET(qpc, qpc, req_e2e_credit_mode, 1);
2199e126ba97SEli Cohen 	if (qp->scat_cqe && is_connected(init_attr->qp_type)) {
22005d6ff1baSYonatan Cohen 		configure_responder_scat_cqe(init_attr, qpc);
22016f4bc0eaSYonatan Cohen 		configure_requester_scat_cqe(dev, init_attr,
2202e00b64f7SShamir Rabinovitch 					     udata ? &ucmd : NULL,
22036f4bc0eaSYonatan Cohen 					     qpc);
2204e126ba97SEli Cohen 	}
2205e126ba97SEli Cohen 
2206e126ba97SEli Cohen 	if (qp->rq.wqe_cnt) {
220709a7d9ecSSaeed Mahameed 		MLX5_SET(qpc, qpc, log_rq_stride, qp->rq.wqe_shift - 4);
220809a7d9ecSSaeed Mahameed 		MLX5_SET(qpc, qpc, log_rq_size, ilog2(qp->rq.wqe_cnt));
2209e126ba97SEli Cohen 	}
2210e126ba97SEli Cohen 
221109a7d9ecSSaeed Mahameed 	MLX5_SET(qpc, qpc, rq_type, get_rx_type(qp, init_attr));
2212e126ba97SEli Cohen 
22133fd3307eSArtemy Kovalyov 	if (qp->sq.wqe_cnt) {
221409a7d9ecSSaeed Mahameed 		MLX5_SET(qpc, qpc, log_sq_size, ilog2(qp->sq.wqe_cnt));
22153fd3307eSArtemy Kovalyov 	} else {
221609a7d9ecSSaeed Mahameed 		MLX5_SET(qpc, qpc, no_sq, 1);
22173fd3307eSArtemy Kovalyov 		if (init_attr->srq &&
22183fd3307eSArtemy Kovalyov 		    init_attr->srq->srq_type == IB_SRQT_TM)
22193fd3307eSArtemy Kovalyov 			MLX5_SET(qpc, qpc, offload_type,
22203fd3307eSArtemy Kovalyov 				 MLX5_QPC_OFFLOAD_TYPE_RNDV);
22213fd3307eSArtemy Kovalyov 	}
2222e126ba97SEli Cohen 
2223e126ba97SEli Cohen 	/* Set default resources */
2224e126ba97SEli Cohen 	switch (init_attr->qp_type) {
2225e126ba97SEli Cohen 	case IB_QPT_XRC_TGT:
222609a7d9ecSSaeed Mahameed 		MLX5_SET(qpc, qpc, cqn_rcv, to_mcq(devr->c0)->mcq.cqn);
222709a7d9ecSSaeed Mahameed 		MLX5_SET(qpc, qpc, cqn_snd, to_mcq(devr->c0)->mcq.cqn);
222809a7d9ecSSaeed Mahameed 		MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(devr->s0)->msrq.srqn);
222909a7d9ecSSaeed Mahameed 		MLX5_SET(qpc, qpc, xrcd, to_mxrcd(init_attr->xrcd)->xrcdn);
2230e126ba97SEli Cohen 		break;
2231e126ba97SEli Cohen 	case IB_QPT_XRC_INI:
223209a7d9ecSSaeed Mahameed 		MLX5_SET(qpc, qpc, cqn_rcv, to_mcq(devr->c0)->mcq.cqn);
223309a7d9ecSSaeed Mahameed 		MLX5_SET(qpc, qpc, xrcd, to_mxrcd(devr->x1)->xrcdn);
223409a7d9ecSSaeed Mahameed 		MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(devr->s0)->msrq.srqn);
2235e126ba97SEli Cohen 		break;
2236e126ba97SEli Cohen 	default:
2237e126ba97SEli Cohen 		if (init_attr->srq) {
223809a7d9ecSSaeed Mahameed 			MLX5_SET(qpc, qpc, xrcd, to_mxrcd(devr->x0)->xrcdn);
223909a7d9ecSSaeed Mahameed 			MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(init_attr->srq)->msrq.srqn);
2240e126ba97SEli Cohen 		} else {
224109a7d9ecSSaeed Mahameed 			MLX5_SET(qpc, qpc, xrcd, to_mxrcd(devr->x1)->xrcdn);
224209a7d9ecSSaeed Mahameed 			MLX5_SET(qpc, qpc, srqn_rmpn_xrqn, to_msrq(devr->s1)->msrq.srqn);
2243e126ba97SEli Cohen 		}
2244e126ba97SEli Cohen 	}
2245e126ba97SEli Cohen 
2246e126ba97SEli Cohen 	if (init_attr->send_cq)
224709a7d9ecSSaeed Mahameed 		MLX5_SET(qpc, qpc, cqn_snd, to_mcq(init_attr->send_cq)->mcq.cqn);
2248e126ba97SEli Cohen 
2249e126ba97SEli Cohen 	if (init_attr->recv_cq)
225009a7d9ecSSaeed Mahameed 		MLX5_SET(qpc, qpc, cqn_rcv, to_mcq(init_attr->recv_cq)->mcq.cqn);
2251e126ba97SEli Cohen 
225209a7d9ecSSaeed Mahameed 	MLX5_SET64(qpc, qpc, dbr_addr, qp->db.dma);
2253e126ba97SEli Cohen 
2254cfb5e088SHaggai Abramovsky 	/* 0xffffff means we ask to work with cqe version 0 */
225509a7d9ecSSaeed Mahameed 	if (MLX5_CAP_GEN(mdev, cqe_version) == MLX5_CQE_VERSION_V1)
2256cfb5e088SHaggai Abramovsky 		MLX5_SET(qpc, qpc, user_index, uidx);
225709a7d9ecSSaeed Mahameed 
2258f0313965SErez Shitrit 	/* we use IB_QP_CREATE_IPOIB_UD_LSO to indicates ipoib qp */
2259f0313965SErez Shitrit 	if (init_attr->qp_type == IB_QPT_UD &&
2260f0313965SErez Shitrit 	    (init_attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO)) {
2261f0313965SErez Shitrit 		MLX5_SET(qpc, qpc, ulp_stateless_offload_mode, 1);
2262f0313965SErez Shitrit 		qp->flags |= MLX5_IB_QP_LSO;
2263f0313965SErez Shitrit 	}
2264cfb5e088SHaggai Abramovsky 
2265b1383aa6SNoa Osherovich 	if (init_attr->create_flags & IB_QP_CREATE_PCI_WRITE_END_PADDING) {
2266b1383aa6SNoa Osherovich 		if (!MLX5_CAP_GEN(dev->mdev, end_pad)) {
2267b1383aa6SNoa Osherovich 			mlx5_ib_dbg(dev, "scatter end padding is not supported\n");
2268b1383aa6SNoa Osherovich 			err = -EOPNOTSUPP;
2269b1383aa6SNoa Osherovich 			goto err;
2270b1383aa6SNoa Osherovich 		} else if (init_attr->qp_type != IB_QPT_RAW_PACKET) {
2271b1383aa6SNoa Osherovich 			MLX5_SET(qpc, qpc, end_padding_mode,
2272b1383aa6SNoa Osherovich 				 MLX5_WQ_END_PAD_MODE_ALIGN);
2273b1383aa6SNoa Osherovich 		} else {
2274b1383aa6SNoa Osherovich 			qp->flags |= MLX5_IB_QP_PCI_WRITE_END_PADDING;
2275b1383aa6SNoa Osherovich 		}
2276b1383aa6SNoa Osherovich 	}
2277b1383aa6SNoa Osherovich 
22782c292dbbSBoris Pismenny 	if (inlen < 0) {
22792c292dbbSBoris Pismenny 		err = -EINVAL;
22802c292dbbSBoris Pismenny 		goto err;
22812c292dbbSBoris Pismenny 	}
22822c292dbbSBoris Pismenny 
2283c2e53b2cSYishai Hadas 	if (init_attr->qp_type == IB_QPT_RAW_PACKET ||
2284c2e53b2cSYishai Hadas 	    qp->flags & MLX5_IB_QP_UNDERLAY) {
22850fb2ed66Smajd@mellanox.com 		qp->raw_packet_qp.sq.ubuffer.buf_addr = ucmd.sq_buf_addr;
22860fb2ed66Smajd@mellanox.com 		raw_packet_qp_copy_info(qp, &qp->raw_packet_qp);
22877f72052cSYishai Hadas 		err = create_raw_packet_qp(dev, qp, in, inlen, pd, udata,
22887f72052cSYishai Hadas 					   &resp);
22890fb2ed66Smajd@mellanox.com 	} else {
229019098df2Smajd@mellanox.com 		err = mlx5_core_create_qp(dev->mdev, &base->mqp, in, inlen);
22910fb2ed66Smajd@mellanox.com 	}
22920fb2ed66Smajd@mellanox.com 
2293e126ba97SEli Cohen 	if (err) {
2294e126ba97SEli Cohen 		mlx5_ib_dbg(dev, "create qp failed\n");
2295e126ba97SEli Cohen 		goto err_create;
2296e126ba97SEli Cohen 	}
2297e126ba97SEli Cohen 
2298479163f4SAl Viro 	kvfree(in);
2299e126ba97SEli Cohen 
230019098df2Smajd@mellanox.com 	base->container_mibqp = qp;
230119098df2Smajd@mellanox.com 	base->mqp.event = mlx5_ib_qp_event;
2302e126ba97SEli Cohen 
230389ea94a7SMaor Gottlieb 	get_cqs(init_attr->qp_type, init_attr->send_cq, init_attr->recv_cq,
230489ea94a7SMaor Gottlieb 		&send_cq, &recv_cq);
230589ea94a7SMaor Gottlieb 	spin_lock_irqsave(&dev->reset_flow_resource_lock, flags);
230689ea94a7SMaor Gottlieb 	mlx5_ib_lock_cqs(send_cq, recv_cq);
230789ea94a7SMaor Gottlieb 	/* Maintain device to QPs access, needed for further handling via reset
230889ea94a7SMaor Gottlieb 	 * flow
230989ea94a7SMaor Gottlieb 	 */
231089ea94a7SMaor Gottlieb 	list_add_tail(&qp->qps_list, &dev->qp_list);
231189ea94a7SMaor Gottlieb 	/* Maintain CQ to QPs access, needed for further handling via reset flow
231289ea94a7SMaor Gottlieb 	 */
231389ea94a7SMaor Gottlieb 	if (send_cq)
231489ea94a7SMaor Gottlieb 		list_add_tail(&qp->cq_send_list, &send_cq->list_send_qp);
231589ea94a7SMaor Gottlieb 	if (recv_cq)
231689ea94a7SMaor Gottlieb 		list_add_tail(&qp->cq_recv_list, &recv_cq->list_recv_qp);
231789ea94a7SMaor Gottlieb 	mlx5_ib_unlock_cqs(send_cq, recv_cq);
231889ea94a7SMaor Gottlieb 	spin_unlock_irqrestore(&dev->reset_flow_resource_lock, flags);
231989ea94a7SMaor Gottlieb 
2320e126ba97SEli Cohen 	return 0;
2321e126ba97SEli Cohen 
2322e126ba97SEli Cohen err_create:
2323e126ba97SEli Cohen 	if (qp->create_type == MLX5_QP_USER)
2324bdeacabdSShamir Rabinovitch 		destroy_qp_user(dev, pd, qp, base, udata);
2325e126ba97SEli Cohen 	else if (qp->create_type == MLX5_QP_KERNEL)
2326e126ba97SEli Cohen 		destroy_qp_kernel(dev, qp);
2327e126ba97SEli Cohen 
2328b1383aa6SNoa Osherovich err:
2329479163f4SAl Viro 	kvfree(in);
2330e126ba97SEli Cohen 	return err;
2331e126ba97SEli Cohen }
2332e126ba97SEli Cohen 
2333e126ba97SEli Cohen static void mlx5_ib_lock_cqs(struct mlx5_ib_cq *send_cq, struct mlx5_ib_cq *recv_cq)
2334e126ba97SEli Cohen 	__acquires(&send_cq->lock) __acquires(&recv_cq->lock)
2335e126ba97SEli Cohen {
2336e126ba97SEli Cohen 	if (send_cq) {
2337e126ba97SEli Cohen 		if (recv_cq) {
2338e126ba97SEli Cohen 			if (send_cq->mcq.cqn < recv_cq->mcq.cqn)  {
233989ea94a7SMaor Gottlieb 				spin_lock(&send_cq->lock);
2340e126ba97SEli Cohen 				spin_lock_nested(&recv_cq->lock,
2341e126ba97SEli Cohen 						 SINGLE_DEPTH_NESTING);
2342e126ba97SEli Cohen 			} else if (send_cq->mcq.cqn == recv_cq->mcq.cqn) {
234389ea94a7SMaor Gottlieb 				spin_lock(&send_cq->lock);
2344e126ba97SEli Cohen 				__acquire(&recv_cq->lock);
2345e126ba97SEli Cohen 			} else {
234689ea94a7SMaor Gottlieb 				spin_lock(&recv_cq->lock);
2347e126ba97SEli Cohen 				spin_lock_nested(&send_cq->lock,
2348e126ba97SEli Cohen 						 SINGLE_DEPTH_NESTING);
2349e126ba97SEli Cohen 			}
2350e126ba97SEli Cohen 		} else {
235189ea94a7SMaor Gottlieb 			spin_lock(&send_cq->lock);
23526a4f139aSEli Cohen 			__acquire(&recv_cq->lock);
2353e126ba97SEli Cohen 		}
2354e126ba97SEli Cohen 	} else if (recv_cq) {
235589ea94a7SMaor Gottlieb 		spin_lock(&recv_cq->lock);
23566a4f139aSEli Cohen 		__acquire(&send_cq->lock);
23576a4f139aSEli Cohen 	} else {
23586a4f139aSEli Cohen 		__acquire(&send_cq->lock);
23596a4f139aSEli Cohen 		__acquire(&recv_cq->lock);
2360e126ba97SEli Cohen 	}
2361e126ba97SEli Cohen }
2362e126ba97SEli Cohen 
2363e126ba97SEli Cohen static void mlx5_ib_unlock_cqs(struct mlx5_ib_cq *send_cq, struct mlx5_ib_cq *recv_cq)
2364e126ba97SEli Cohen 	__releases(&send_cq->lock) __releases(&recv_cq->lock)
2365e126ba97SEli Cohen {
2366e126ba97SEli Cohen 	if (send_cq) {
2367e126ba97SEli Cohen 		if (recv_cq) {
2368e126ba97SEli Cohen 			if (send_cq->mcq.cqn < recv_cq->mcq.cqn)  {
2369e126ba97SEli Cohen 				spin_unlock(&recv_cq->lock);
237089ea94a7SMaor Gottlieb 				spin_unlock(&send_cq->lock);
2371e126ba97SEli Cohen 			} else if (send_cq->mcq.cqn == recv_cq->mcq.cqn) {
2372e126ba97SEli Cohen 				__release(&recv_cq->lock);
237389ea94a7SMaor Gottlieb 				spin_unlock(&send_cq->lock);
2374e126ba97SEli Cohen 			} else {
2375e126ba97SEli Cohen 				spin_unlock(&send_cq->lock);
237689ea94a7SMaor Gottlieb 				spin_unlock(&recv_cq->lock);
2377e126ba97SEli Cohen 			}
2378e126ba97SEli Cohen 		} else {
23796a4f139aSEli Cohen 			__release(&recv_cq->lock);
238089ea94a7SMaor Gottlieb 			spin_unlock(&send_cq->lock);
2381e126ba97SEli Cohen 		}
2382e126ba97SEli Cohen 	} else if (recv_cq) {
23836a4f139aSEli Cohen 		__release(&send_cq->lock);
238489ea94a7SMaor Gottlieb 		spin_unlock(&recv_cq->lock);
23856a4f139aSEli Cohen 	} else {
23866a4f139aSEli Cohen 		__release(&recv_cq->lock);
23876a4f139aSEli Cohen 		__release(&send_cq->lock);
2388e126ba97SEli Cohen 	}
2389e126ba97SEli Cohen }
2390e126ba97SEli Cohen 
2391e126ba97SEli Cohen static struct mlx5_ib_pd *get_pd(struct mlx5_ib_qp *qp)
2392e126ba97SEli Cohen {
2393e126ba97SEli Cohen 	return to_mpd(qp->ibqp.pd);
2394e126ba97SEli Cohen }
2395e126ba97SEli Cohen 
239689ea94a7SMaor Gottlieb static void get_cqs(enum ib_qp_type qp_type,
239789ea94a7SMaor Gottlieb 		    struct ib_cq *ib_send_cq, struct ib_cq *ib_recv_cq,
2398e126ba97SEli Cohen 		    struct mlx5_ib_cq **send_cq, struct mlx5_ib_cq **recv_cq)
2399e126ba97SEli Cohen {
240089ea94a7SMaor Gottlieb 	switch (qp_type) {
2401e126ba97SEli Cohen 	case IB_QPT_XRC_TGT:
2402e126ba97SEli Cohen 		*send_cq = NULL;
2403e126ba97SEli Cohen 		*recv_cq = NULL;
2404e126ba97SEli Cohen 		break;
2405e126ba97SEli Cohen 	case MLX5_IB_QPT_REG_UMR:
2406e126ba97SEli Cohen 	case IB_QPT_XRC_INI:
240789ea94a7SMaor Gottlieb 		*send_cq = ib_send_cq ? to_mcq(ib_send_cq) : NULL;
2408e126ba97SEli Cohen 		*recv_cq = NULL;
2409e126ba97SEli Cohen 		break;
2410e126ba97SEli Cohen 
2411e126ba97SEli Cohen 	case IB_QPT_SMI:
2412d16e91daSHaggai Eran 	case MLX5_IB_QPT_HW_GSI:
2413e126ba97SEli Cohen 	case IB_QPT_RC:
2414e126ba97SEli Cohen 	case IB_QPT_UC:
2415e126ba97SEli Cohen 	case IB_QPT_UD:
2416e126ba97SEli Cohen 	case IB_QPT_RAW_IPV6:
2417e126ba97SEli Cohen 	case IB_QPT_RAW_ETHERTYPE:
24180fb2ed66Smajd@mellanox.com 	case IB_QPT_RAW_PACKET:
241989ea94a7SMaor Gottlieb 		*send_cq = ib_send_cq ? to_mcq(ib_send_cq) : NULL;
242089ea94a7SMaor Gottlieb 		*recv_cq = ib_recv_cq ? to_mcq(ib_recv_cq) : NULL;
2421e126ba97SEli Cohen 		break;
2422e126ba97SEli Cohen 
2423e126ba97SEli Cohen 	case IB_QPT_MAX:
2424e126ba97SEli Cohen 	default:
2425e126ba97SEli Cohen 		*send_cq = NULL;
2426e126ba97SEli Cohen 		*recv_cq = NULL;
2427e126ba97SEli Cohen 		break;
2428e126ba97SEli Cohen 	}
2429e126ba97SEli Cohen }
2430e126ba97SEli Cohen 
2431ad5f8e96Smajd@mellanox.com static int modify_raw_packet_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp,
243213eab21fSAviv Heller 				const struct mlx5_modify_raw_qp_param *raw_qp_param,
243313eab21fSAviv Heller 				u8 lag_tx_affinity);
2434ad5f8e96Smajd@mellanox.com 
2435bdeacabdSShamir Rabinovitch static void destroy_qp_common(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp,
2436bdeacabdSShamir Rabinovitch 			      struct ib_udata *udata)
2437e126ba97SEli Cohen {
2438e126ba97SEli Cohen 	struct mlx5_ib_cq *send_cq, *recv_cq;
2439c2e53b2cSYishai Hadas 	struct mlx5_ib_qp_base *base;
244089ea94a7SMaor Gottlieb 	unsigned long flags;
2441e126ba97SEli Cohen 	int err;
2442e126ba97SEli Cohen 
244328d61370SYishai Hadas 	if (qp->ibqp.rwq_ind_tbl) {
244428d61370SYishai Hadas 		destroy_rss_raw_qp_tir(dev, qp);
244528d61370SYishai Hadas 		return;
244628d61370SYishai Hadas 	}
244728d61370SYishai Hadas 
2448c2e53b2cSYishai Hadas 	base = (qp->ibqp.qp_type == IB_QPT_RAW_PACKET ||
2449c2e53b2cSYishai Hadas 		qp->flags & MLX5_IB_QP_UNDERLAY) ?
24500fb2ed66Smajd@mellanox.com 	       &qp->raw_packet_qp.rq.base :
24510fb2ed66Smajd@mellanox.com 	       &qp->trans_qp.base;
24520fb2ed66Smajd@mellanox.com 
24536aec21f6SHaggai Eran 	if (qp->state != IB_QPS_RESET) {
2454c2e53b2cSYishai Hadas 		if (qp->ibqp.qp_type != IB_QPT_RAW_PACKET &&
2455c2e53b2cSYishai Hadas 		    !(qp->flags & MLX5_IB_QP_UNDERLAY)) {
2456ad5f8e96Smajd@mellanox.com 			err = mlx5_core_qp_modify(dev->mdev,
24571a412fb1SSaeed Mahameed 						  MLX5_CMD_OP_2RST_QP, 0,
24581a412fb1SSaeed Mahameed 						  NULL, &base->mqp);
2459ad5f8e96Smajd@mellanox.com 		} else {
24600680efa2SAlex Vesker 			struct mlx5_modify_raw_qp_param raw_qp_param = {
24610680efa2SAlex Vesker 				.operation = MLX5_CMD_OP_2RST_QP
24620680efa2SAlex Vesker 			};
24630680efa2SAlex Vesker 
246413eab21fSAviv Heller 			err = modify_raw_packet_qp(dev, qp, &raw_qp_param, 0);
2465ad5f8e96Smajd@mellanox.com 		}
2466ad5f8e96Smajd@mellanox.com 		if (err)
2467427c1e7bSmajd@mellanox.com 			mlx5_ib_warn(dev, "mlx5_ib: modify QP 0x%06x to RESET failed\n",
246819098df2Smajd@mellanox.com 				     base->mqp.qpn);
24696aec21f6SHaggai Eran 	}
2470e126ba97SEli Cohen 
247189ea94a7SMaor Gottlieb 	get_cqs(qp->ibqp.qp_type, qp->ibqp.send_cq, qp->ibqp.recv_cq,
247289ea94a7SMaor Gottlieb 		&send_cq, &recv_cq);
247389ea94a7SMaor Gottlieb 
247489ea94a7SMaor Gottlieb 	spin_lock_irqsave(&dev->reset_flow_resource_lock, flags);
247589ea94a7SMaor Gottlieb 	mlx5_ib_lock_cqs(send_cq, recv_cq);
247689ea94a7SMaor Gottlieb 	/* del from lists under both locks above to protect reset flow paths */
247789ea94a7SMaor Gottlieb 	list_del(&qp->qps_list);
247889ea94a7SMaor Gottlieb 	if (send_cq)
247989ea94a7SMaor Gottlieb 		list_del(&qp->cq_send_list);
248089ea94a7SMaor Gottlieb 
248189ea94a7SMaor Gottlieb 	if (recv_cq)
248289ea94a7SMaor Gottlieb 		list_del(&qp->cq_recv_list);
2483e126ba97SEli Cohen 
2484e126ba97SEli Cohen 	if (qp->create_type == MLX5_QP_KERNEL) {
248519098df2Smajd@mellanox.com 		__mlx5_ib_cq_clean(recv_cq, base->mqp.qpn,
2486e126ba97SEli Cohen 				   qp->ibqp.srq ? to_msrq(qp->ibqp.srq) : NULL);
2487e126ba97SEli Cohen 		if (send_cq != recv_cq)
248819098df2Smajd@mellanox.com 			__mlx5_ib_cq_clean(send_cq, base->mqp.qpn,
248919098df2Smajd@mellanox.com 					   NULL);
2490e126ba97SEli Cohen 	}
249189ea94a7SMaor Gottlieb 	mlx5_ib_unlock_cqs(send_cq, recv_cq);
249289ea94a7SMaor Gottlieb 	spin_unlock_irqrestore(&dev->reset_flow_resource_lock, flags);
2493e126ba97SEli Cohen 
2494c2e53b2cSYishai Hadas 	if (qp->ibqp.qp_type == IB_QPT_RAW_PACKET ||
2495c2e53b2cSYishai Hadas 	    qp->flags & MLX5_IB_QP_UNDERLAY) {
24960fb2ed66Smajd@mellanox.com 		destroy_raw_packet_qp(dev, qp);
24970fb2ed66Smajd@mellanox.com 	} else {
249819098df2Smajd@mellanox.com 		err = mlx5_core_destroy_qp(dev->mdev, &base->mqp);
2499e126ba97SEli Cohen 		if (err)
25000fb2ed66Smajd@mellanox.com 			mlx5_ib_warn(dev, "failed to destroy QP 0x%x\n",
25010fb2ed66Smajd@mellanox.com 				     base->mqp.qpn);
25020fb2ed66Smajd@mellanox.com 	}
2503e126ba97SEli Cohen 
2504e126ba97SEli Cohen 	if (qp->create_type == MLX5_QP_KERNEL)
2505e126ba97SEli Cohen 		destroy_qp_kernel(dev, qp);
2506e126ba97SEli Cohen 	else if (qp->create_type == MLX5_QP_USER)
2507bdeacabdSShamir Rabinovitch 		destroy_qp_user(dev, &get_pd(qp)->ibpd, qp, base, udata);
2508e126ba97SEli Cohen }
2509e126ba97SEli Cohen 
2510e126ba97SEli Cohen static const char *ib_qp_type_str(enum ib_qp_type type)
2511e126ba97SEli Cohen {
2512e126ba97SEli Cohen 	switch (type) {
2513e126ba97SEli Cohen 	case IB_QPT_SMI:
2514e126ba97SEli Cohen 		return "IB_QPT_SMI";
2515e126ba97SEli Cohen 	case IB_QPT_GSI:
2516e126ba97SEli Cohen 		return "IB_QPT_GSI";
2517e126ba97SEli Cohen 	case IB_QPT_RC:
2518e126ba97SEli Cohen 		return "IB_QPT_RC";
2519e126ba97SEli Cohen 	case IB_QPT_UC:
2520e126ba97SEli Cohen 		return "IB_QPT_UC";
2521e126ba97SEli Cohen 	case IB_QPT_UD:
2522e126ba97SEli Cohen 		return "IB_QPT_UD";
2523e126ba97SEli Cohen 	case IB_QPT_RAW_IPV6:
2524e126ba97SEli Cohen 		return "IB_QPT_RAW_IPV6";
2525e126ba97SEli Cohen 	case IB_QPT_RAW_ETHERTYPE:
2526e126ba97SEli Cohen 		return "IB_QPT_RAW_ETHERTYPE";
2527e126ba97SEli Cohen 	case IB_QPT_XRC_INI:
2528e126ba97SEli Cohen 		return "IB_QPT_XRC_INI";
2529e126ba97SEli Cohen 	case IB_QPT_XRC_TGT:
2530e126ba97SEli Cohen 		return "IB_QPT_XRC_TGT";
2531e126ba97SEli Cohen 	case IB_QPT_RAW_PACKET:
2532e126ba97SEli Cohen 		return "IB_QPT_RAW_PACKET";
2533e126ba97SEli Cohen 	case MLX5_IB_QPT_REG_UMR:
2534e126ba97SEli Cohen 		return "MLX5_IB_QPT_REG_UMR";
2535b4aaa1f0SMoni Shoua 	case IB_QPT_DRIVER:
2536b4aaa1f0SMoni Shoua 		return "IB_QPT_DRIVER";
2537e126ba97SEli Cohen 	case IB_QPT_MAX:
2538e126ba97SEli Cohen 	default:
2539e126ba97SEli Cohen 		return "Invalid QP type";
2540e126ba97SEli Cohen 	}
2541e126ba97SEli Cohen }
2542e126ba97SEli Cohen 
2543b4aaa1f0SMoni Shoua static struct ib_qp *mlx5_ib_create_dct(struct ib_pd *pd,
2544b4aaa1f0SMoni Shoua 					struct ib_qp_init_attr *attr,
254589944450SShamir Rabinovitch 					struct mlx5_ib_create_qp *ucmd,
254689944450SShamir Rabinovitch 					struct ib_udata *udata)
2547b4aaa1f0SMoni Shoua {
254889944450SShamir Rabinovitch 	struct mlx5_ib_ucontext *ucontext = rdma_udata_to_drv_context(
254989944450SShamir Rabinovitch 		udata, struct mlx5_ib_ucontext, ibucontext);
2550b4aaa1f0SMoni Shoua 	struct mlx5_ib_qp *qp;
2551b4aaa1f0SMoni Shoua 	int err = 0;
2552b4aaa1f0SMoni Shoua 	u32 uidx = MLX5_IB_DEFAULT_UIDX;
2553b4aaa1f0SMoni Shoua 	void *dctc;
2554b4aaa1f0SMoni Shoua 
2555b4aaa1f0SMoni Shoua 	if (!attr->srq || !attr->recv_cq)
2556b4aaa1f0SMoni Shoua 		return ERR_PTR(-EINVAL);
2557b4aaa1f0SMoni Shoua 
255889944450SShamir Rabinovitch 	err = get_qp_user_index(ucontext, ucmd, sizeof(*ucmd), &uidx);
2559b4aaa1f0SMoni Shoua 	if (err)
2560b4aaa1f0SMoni Shoua 		return ERR_PTR(err);
2561b4aaa1f0SMoni Shoua 
2562b4aaa1f0SMoni Shoua 	qp = kzalloc(sizeof(*qp), GFP_KERNEL);
2563b4aaa1f0SMoni Shoua 	if (!qp)
2564b4aaa1f0SMoni Shoua 		return ERR_PTR(-ENOMEM);
2565b4aaa1f0SMoni Shoua 
2566b4aaa1f0SMoni Shoua 	qp->dct.in = kzalloc(MLX5_ST_SZ_BYTES(create_dct_in), GFP_KERNEL);
2567b4aaa1f0SMoni Shoua 	if (!qp->dct.in) {
2568b4aaa1f0SMoni Shoua 		err = -ENOMEM;
2569b4aaa1f0SMoni Shoua 		goto err_free;
2570b4aaa1f0SMoni Shoua 	}
2571b4aaa1f0SMoni Shoua 
2572a01a5860SYishai Hadas 	MLX5_SET(create_dct_in, qp->dct.in, uid, to_mpd(pd)->uid);
2573b4aaa1f0SMoni Shoua 	dctc = MLX5_ADDR_OF(create_dct_in, qp->dct.in, dct_context_entry);
2574776a3906SMoni Shoua 	qp->qp_sub_type = MLX5_IB_QPT_DCT;
2575b4aaa1f0SMoni Shoua 	MLX5_SET(dctc, dctc, pd, to_mpd(pd)->pdn);
2576b4aaa1f0SMoni Shoua 	MLX5_SET(dctc, dctc, srqn_xrqn, to_msrq(attr->srq)->msrq.srqn);
2577b4aaa1f0SMoni Shoua 	MLX5_SET(dctc, dctc, cqn, to_mcq(attr->recv_cq)->mcq.cqn);
2578b4aaa1f0SMoni Shoua 	MLX5_SET64(dctc, dctc, dc_access_key, ucmd->access_key);
2579b4aaa1f0SMoni Shoua 	MLX5_SET(dctc, dctc, user_index, uidx);
2580b4aaa1f0SMoni Shoua 
25815d6ff1baSYonatan Cohen 	if (ucmd->flags & MLX5_QP_FLAG_SCATTER_CQE)
25825d6ff1baSYonatan Cohen 		configure_responder_scat_cqe(attr, dctc);
25835d6ff1baSYonatan Cohen 
2584b4aaa1f0SMoni Shoua 	qp->state = IB_QPS_RESET;
2585b4aaa1f0SMoni Shoua 
2586b4aaa1f0SMoni Shoua 	return &qp->ibqp;
2587b4aaa1f0SMoni Shoua err_free:
2588b4aaa1f0SMoni Shoua 	kfree(qp);
2589b4aaa1f0SMoni Shoua 	return ERR_PTR(err);
2590b4aaa1f0SMoni Shoua }
2591b4aaa1f0SMoni Shoua 
2592b4aaa1f0SMoni Shoua static int set_mlx_qp_type(struct mlx5_ib_dev *dev,
2593e126ba97SEli Cohen 			   struct ib_qp_init_attr *init_attr,
2594b4aaa1f0SMoni Shoua 			   struct mlx5_ib_create_qp *ucmd,
2595b4aaa1f0SMoni Shoua 			   struct ib_udata *udata)
2596b4aaa1f0SMoni Shoua {
2597b4aaa1f0SMoni Shoua 	enum { MLX_QP_FLAGS = MLX5_QP_FLAG_TYPE_DCT | MLX5_QP_FLAG_TYPE_DCI };
2598b4aaa1f0SMoni Shoua 	int err;
2599b4aaa1f0SMoni Shoua 
2600b4aaa1f0SMoni Shoua 	if (!udata)
2601b4aaa1f0SMoni Shoua 		return -EINVAL;
2602b4aaa1f0SMoni Shoua 
2603b4aaa1f0SMoni Shoua 	if (udata->inlen < sizeof(*ucmd)) {
2604b4aaa1f0SMoni Shoua 		mlx5_ib_dbg(dev, "create_qp user command is smaller than expected\n");
2605b4aaa1f0SMoni Shoua 		return -EINVAL;
2606b4aaa1f0SMoni Shoua 	}
2607b4aaa1f0SMoni Shoua 	err = ib_copy_from_udata(ucmd, udata, sizeof(*ucmd));
2608b4aaa1f0SMoni Shoua 	if (err)
2609b4aaa1f0SMoni Shoua 		return err;
2610b4aaa1f0SMoni Shoua 
2611b4aaa1f0SMoni Shoua 	if ((ucmd->flags & MLX_QP_FLAGS) == MLX5_QP_FLAG_TYPE_DCI) {
2612b4aaa1f0SMoni Shoua 		init_attr->qp_type = MLX5_IB_QPT_DCI;
2613b4aaa1f0SMoni Shoua 	} else {
2614b4aaa1f0SMoni Shoua 		if ((ucmd->flags & MLX_QP_FLAGS) == MLX5_QP_FLAG_TYPE_DCT) {
2615b4aaa1f0SMoni Shoua 			init_attr->qp_type = MLX5_IB_QPT_DCT;
2616b4aaa1f0SMoni Shoua 		} else {
2617b4aaa1f0SMoni Shoua 			mlx5_ib_dbg(dev, "Invalid QP flags\n");
2618b4aaa1f0SMoni Shoua 			return -EINVAL;
2619b4aaa1f0SMoni Shoua 		}
2620b4aaa1f0SMoni Shoua 	}
2621b4aaa1f0SMoni Shoua 
2622b4aaa1f0SMoni Shoua 	if (!MLX5_CAP_GEN(dev->mdev, dct)) {
2623b4aaa1f0SMoni Shoua 		mlx5_ib_dbg(dev, "DC transport is not supported\n");
2624b4aaa1f0SMoni Shoua 		return -EOPNOTSUPP;
2625b4aaa1f0SMoni Shoua 	}
2626b4aaa1f0SMoni Shoua 
2627b4aaa1f0SMoni Shoua 	return 0;
2628b4aaa1f0SMoni Shoua }
2629b4aaa1f0SMoni Shoua 
2630b4aaa1f0SMoni Shoua struct ib_qp *mlx5_ib_create_qp(struct ib_pd *pd,
2631b4aaa1f0SMoni Shoua 				struct ib_qp_init_attr *verbs_init_attr,
2632e126ba97SEli Cohen 				struct ib_udata *udata)
2633e126ba97SEli Cohen {
2634e126ba97SEli Cohen 	struct mlx5_ib_dev *dev;
2635e126ba97SEli Cohen 	struct mlx5_ib_qp *qp;
2636e126ba97SEli Cohen 	u16 xrcdn = 0;
2637e126ba97SEli Cohen 	int err;
2638b4aaa1f0SMoni Shoua 	struct ib_qp_init_attr mlx_init_attr;
2639b4aaa1f0SMoni Shoua 	struct ib_qp_init_attr *init_attr = verbs_init_attr;
264089944450SShamir Rabinovitch 	struct mlx5_ib_ucontext *ucontext = rdma_udata_to_drv_context(
264189944450SShamir Rabinovitch 		udata, struct mlx5_ib_ucontext, ibucontext);
2642e126ba97SEli Cohen 
2643e126ba97SEli Cohen 	if (pd) {
2644e126ba97SEli Cohen 		dev = to_mdev(pd->device);
26450fb2ed66Smajd@mellanox.com 
26460fb2ed66Smajd@mellanox.com 		if (init_attr->qp_type == IB_QPT_RAW_PACKET) {
264789944450SShamir Rabinovitch 			if (!ucontext) {
26480fb2ed66Smajd@mellanox.com 				mlx5_ib_dbg(dev, "Raw Packet QP is not supported for kernel consumers\n");
26490fb2ed66Smajd@mellanox.com 				return ERR_PTR(-EINVAL);
265089944450SShamir Rabinovitch 			} else if (!ucontext->cqe_version) {
26510fb2ed66Smajd@mellanox.com 				mlx5_ib_dbg(dev, "Raw Packet QP is only supported for CQE version > 0\n");
26520fb2ed66Smajd@mellanox.com 				return ERR_PTR(-EINVAL);
26530fb2ed66Smajd@mellanox.com 			}
26540fb2ed66Smajd@mellanox.com 		}
265509f16cf5SMajd Dibbiny 	} else {
265609f16cf5SMajd Dibbiny 		/* being cautious here */
265709f16cf5SMajd Dibbiny 		if (init_attr->qp_type != IB_QPT_XRC_TGT &&
265809f16cf5SMajd Dibbiny 		    init_attr->qp_type != MLX5_IB_QPT_REG_UMR) {
265909f16cf5SMajd Dibbiny 			pr_warn("%s: no PD for transport %s\n", __func__,
266009f16cf5SMajd Dibbiny 				ib_qp_type_str(init_attr->qp_type));
266109f16cf5SMajd Dibbiny 			return ERR_PTR(-EINVAL);
266209f16cf5SMajd Dibbiny 		}
266309f16cf5SMajd Dibbiny 		dev = to_mdev(to_mxrcd(init_attr->xrcd)->ibxrcd.device);
2664e126ba97SEli Cohen 	}
2665e126ba97SEli Cohen 
2666b4aaa1f0SMoni Shoua 	if (init_attr->qp_type == IB_QPT_DRIVER) {
2667b4aaa1f0SMoni Shoua 		struct mlx5_ib_create_qp ucmd;
2668b4aaa1f0SMoni Shoua 
2669b4aaa1f0SMoni Shoua 		init_attr = &mlx_init_attr;
2670b4aaa1f0SMoni Shoua 		memcpy(init_attr, verbs_init_attr, sizeof(*verbs_init_attr));
2671b4aaa1f0SMoni Shoua 		err = set_mlx_qp_type(dev, init_attr, &ucmd, udata);
2672b4aaa1f0SMoni Shoua 		if (err)
2673b4aaa1f0SMoni Shoua 			return ERR_PTR(err);
2674c32a4f29SMoni Shoua 
2675c32a4f29SMoni Shoua 		if (init_attr->qp_type == MLX5_IB_QPT_DCI) {
2676c32a4f29SMoni Shoua 			if (init_attr->cap.max_recv_wr ||
2677c32a4f29SMoni Shoua 			    init_attr->cap.max_recv_sge) {
2678c32a4f29SMoni Shoua 				mlx5_ib_dbg(dev, "DCI QP requires zero size receive queue\n");
2679c32a4f29SMoni Shoua 				return ERR_PTR(-EINVAL);
2680c32a4f29SMoni Shoua 			}
2681776a3906SMoni Shoua 		} else {
268289944450SShamir Rabinovitch 			return mlx5_ib_create_dct(pd, init_attr, &ucmd, udata);
2683c32a4f29SMoni Shoua 		}
2684b4aaa1f0SMoni Shoua 	}
2685b4aaa1f0SMoni Shoua 
2686e126ba97SEli Cohen 	switch (init_attr->qp_type) {
2687e126ba97SEli Cohen 	case IB_QPT_XRC_TGT:
2688e126ba97SEli Cohen 	case IB_QPT_XRC_INI:
2689938fe83cSSaeed Mahameed 		if (!MLX5_CAP_GEN(dev->mdev, xrc)) {
2690e126ba97SEli Cohen 			mlx5_ib_dbg(dev, "XRC not supported\n");
2691e126ba97SEli Cohen 			return ERR_PTR(-ENOSYS);
2692e126ba97SEli Cohen 		}
2693e126ba97SEli Cohen 		init_attr->recv_cq = NULL;
2694e126ba97SEli Cohen 		if (init_attr->qp_type == IB_QPT_XRC_TGT) {
2695e126ba97SEli Cohen 			xrcdn = to_mxrcd(init_attr->xrcd)->xrcdn;
2696e126ba97SEli Cohen 			init_attr->send_cq = NULL;
2697e126ba97SEli Cohen 		}
2698e126ba97SEli Cohen 
2699e126ba97SEli Cohen 		/* fall through */
27000fb2ed66Smajd@mellanox.com 	case IB_QPT_RAW_PACKET:
2701e126ba97SEli Cohen 	case IB_QPT_RC:
2702e126ba97SEli Cohen 	case IB_QPT_UC:
2703e126ba97SEli Cohen 	case IB_QPT_UD:
2704e126ba97SEli Cohen 	case IB_QPT_SMI:
2705d16e91daSHaggai Eran 	case MLX5_IB_QPT_HW_GSI:
2706e126ba97SEli Cohen 	case MLX5_IB_QPT_REG_UMR:
2707c32a4f29SMoni Shoua 	case MLX5_IB_QPT_DCI:
2708e126ba97SEli Cohen 		qp = kzalloc(sizeof(*qp), GFP_KERNEL);
2709e126ba97SEli Cohen 		if (!qp)
2710e126ba97SEli Cohen 			return ERR_PTR(-ENOMEM);
2711e126ba97SEli Cohen 
2712e126ba97SEli Cohen 		err = create_qp_common(dev, pd, init_attr, udata, qp);
2713e126ba97SEli Cohen 		if (err) {
2714e126ba97SEli Cohen 			mlx5_ib_dbg(dev, "create_qp_common failed\n");
2715e126ba97SEli Cohen 			kfree(qp);
2716e126ba97SEli Cohen 			return ERR_PTR(err);
2717e126ba97SEli Cohen 		}
2718e126ba97SEli Cohen 
2719e126ba97SEli Cohen 		if (is_qp0(init_attr->qp_type))
2720e126ba97SEli Cohen 			qp->ibqp.qp_num = 0;
2721e126ba97SEli Cohen 		else if (is_qp1(init_attr->qp_type))
2722e126ba97SEli Cohen 			qp->ibqp.qp_num = 1;
2723e126ba97SEli Cohen 		else
272419098df2Smajd@mellanox.com 			qp->ibqp.qp_num = qp->trans_qp.base.mqp.qpn;
2725e126ba97SEli Cohen 
2726e126ba97SEli Cohen 		mlx5_ib_dbg(dev, "ib qpnum 0x%x, mlx qpn 0x%x, rcqn 0x%x, scqn 0x%x\n",
272719098df2Smajd@mellanox.com 			    qp->ibqp.qp_num, qp->trans_qp.base.mqp.qpn,
2728a1ab8402SEli Cohen 			    init_attr->recv_cq ? to_mcq(init_attr->recv_cq)->mcq.cqn : -1,
2729a1ab8402SEli Cohen 			    init_attr->send_cq ? to_mcq(init_attr->send_cq)->mcq.cqn : -1);
2730e126ba97SEli Cohen 
273119098df2Smajd@mellanox.com 		qp->trans_qp.xrcdn = xrcdn;
2732e126ba97SEli Cohen 
2733e126ba97SEli Cohen 		break;
2734e126ba97SEli Cohen 
2735d16e91daSHaggai Eran 	case IB_QPT_GSI:
2736d16e91daSHaggai Eran 		return mlx5_ib_gsi_create_qp(pd, init_attr);
2737d16e91daSHaggai Eran 
2738e126ba97SEli Cohen 	case IB_QPT_RAW_IPV6:
2739e126ba97SEli Cohen 	case IB_QPT_RAW_ETHERTYPE:
2740e126ba97SEli Cohen 	case IB_QPT_MAX:
2741e126ba97SEli Cohen 	default:
2742e126ba97SEli Cohen 		mlx5_ib_dbg(dev, "unsupported qp type %d\n",
2743e126ba97SEli Cohen 			    init_attr->qp_type);
2744e126ba97SEli Cohen 		/* Don't support raw QPs */
2745e126ba97SEli Cohen 		return ERR_PTR(-EINVAL);
2746e126ba97SEli Cohen 	}
2747e126ba97SEli Cohen 
2748b4aaa1f0SMoni Shoua 	if (verbs_init_attr->qp_type == IB_QPT_DRIVER)
2749b4aaa1f0SMoni Shoua 		qp->qp_sub_type = init_attr->qp_type;
2750b4aaa1f0SMoni Shoua 
2751e126ba97SEli Cohen 	return &qp->ibqp;
2752e126ba97SEli Cohen }
2753e126ba97SEli Cohen 
2754776a3906SMoni Shoua static int mlx5_ib_destroy_dct(struct mlx5_ib_qp *mqp)
2755776a3906SMoni Shoua {
2756776a3906SMoni Shoua 	struct mlx5_ib_dev *dev = to_mdev(mqp->ibqp.device);
2757776a3906SMoni Shoua 
2758776a3906SMoni Shoua 	if (mqp->state == IB_QPS_RTR) {
2759776a3906SMoni Shoua 		int err;
2760776a3906SMoni Shoua 
2761776a3906SMoni Shoua 		err = mlx5_core_destroy_dct(dev->mdev, &mqp->dct.mdct);
2762776a3906SMoni Shoua 		if (err) {
2763776a3906SMoni Shoua 			mlx5_ib_warn(dev, "failed to destroy DCT %d\n", err);
2764776a3906SMoni Shoua 			return err;
2765776a3906SMoni Shoua 		}
2766776a3906SMoni Shoua 	}
2767776a3906SMoni Shoua 
2768776a3906SMoni Shoua 	kfree(mqp->dct.in);
2769776a3906SMoni Shoua 	kfree(mqp);
2770776a3906SMoni Shoua 	return 0;
2771776a3906SMoni Shoua }
2772776a3906SMoni Shoua 
2773c4367a26SShamir Rabinovitch int mlx5_ib_destroy_qp(struct ib_qp *qp, struct ib_udata *udata)
2774e126ba97SEli Cohen {
2775e126ba97SEli Cohen 	struct mlx5_ib_dev *dev = to_mdev(qp->device);
2776e126ba97SEli Cohen 	struct mlx5_ib_qp *mqp = to_mqp(qp);
2777e126ba97SEli Cohen 
2778d16e91daSHaggai Eran 	if (unlikely(qp->qp_type == IB_QPT_GSI))
2779d16e91daSHaggai Eran 		return mlx5_ib_gsi_destroy_qp(qp);
2780d16e91daSHaggai Eran 
2781776a3906SMoni Shoua 	if (mqp->qp_sub_type == MLX5_IB_QPT_DCT)
2782776a3906SMoni Shoua 		return mlx5_ib_destroy_dct(mqp);
2783776a3906SMoni Shoua 
2784bdeacabdSShamir Rabinovitch 	destroy_qp_common(dev, mqp, udata);
2785e126ba97SEli Cohen 
2786e126ba97SEli Cohen 	kfree(mqp);
2787e126ba97SEli Cohen 
2788e126ba97SEli Cohen 	return 0;
2789e126ba97SEli Cohen }
2790e126ba97SEli Cohen 
2791a60109dcSYonatan Cohen static int to_mlx5_access_flags(struct mlx5_ib_qp *qp,
2792a60109dcSYonatan Cohen 				const struct ib_qp_attr *attr,
2793bf3b4f06SBart Van Assche 				int attr_mask, __be32 *hw_access_flags_be)
2794e126ba97SEli Cohen {
2795e126ba97SEli Cohen 	u8 dest_rd_atomic;
2796bf3b4f06SBart Van Assche 	u32 access_flags, hw_access_flags = 0;
2797e126ba97SEli Cohen 
2798a60109dcSYonatan Cohen 	struct mlx5_ib_dev *dev = to_mdev(qp->ibqp.device);
2799a60109dcSYonatan Cohen 
2800e126ba97SEli Cohen 	if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC)
2801e126ba97SEli Cohen 		dest_rd_atomic = attr->max_dest_rd_atomic;
2802e126ba97SEli Cohen 	else
280319098df2Smajd@mellanox.com 		dest_rd_atomic = qp->trans_qp.resp_depth;
2804e126ba97SEli Cohen 
2805e126ba97SEli Cohen 	if (attr_mask & IB_QP_ACCESS_FLAGS)
2806e126ba97SEli Cohen 		access_flags = attr->qp_access_flags;
2807e126ba97SEli Cohen 	else
280819098df2Smajd@mellanox.com 		access_flags = qp->trans_qp.atomic_rd_en;
2809e126ba97SEli Cohen 
2810e126ba97SEli Cohen 	if (!dest_rd_atomic)
2811e126ba97SEli Cohen 		access_flags &= IB_ACCESS_REMOTE_WRITE;
2812e126ba97SEli Cohen 
2813e126ba97SEli Cohen 	if (access_flags & IB_ACCESS_REMOTE_READ)
2814bf3b4f06SBart Van Assche 		hw_access_flags |= MLX5_QP_BIT_RRE;
281513f8d9c1SYonatan Cohen 	if (access_flags & IB_ACCESS_REMOTE_ATOMIC) {
2816a60109dcSYonatan Cohen 		int atomic_mode;
2817e126ba97SEli Cohen 
2818a60109dcSYonatan Cohen 		atomic_mode = get_atomic_mode(dev, qp->ibqp.qp_type);
2819a60109dcSYonatan Cohen 		if (atomic_mode < 0)
2820a60109dcSYonatan Cohen 			return -EOPNOTSUPP;
2821a60109dcSYonatan Cohen 
2822bf3b4f06SBart Van Assche 		hw_access_flags |= MLX5_QP_BIT_RAE;
2823bf3b4f06SBart Van Assche 		hw_access_flags |= atomic_mode << MLX5_ATOMIC_MODE_OFFSET;
2824a60109dcSYonatan Cohen 	}
2825a60109dcSYonatan Cohen 
2826a60109dcSYonatan Cohen 	if (access_flags & IB_ACCESS_REMOTE_WRITE)
2827bf3b4f06SBart Van Assche 		hw_access_flags |= MLX5_QP_BIT_RWE;
2828a60109dcSYonatan Cohen 
2829bf3b4f06SBart Van Assche 	*hw_access_flags_be = cpu_to_be32(hw_access_flags);
2830a60109dcSYonatan Cohen 
2831a60109dcSYonatan Cohen 	return 0;
2832e126ba97SEli Cohen }
2833e126ba97SEli Cohen 
2834e126ba97SEli Cohen enum {
2835e126ba97SEli Cohen 	MLX5_PATH_FLAG_FL	= 1 << 0,
2836e126ba97SEli Cohen 	MLX5_PATH_FLAG_FREE_AR	= 1 << 1,
2837e126ba97SEli Cohen 	MLX5_PATH_FLAG_COUNTER	= 1 << 2,
2838e126ba97SEli Cohen };
2839e126ba97SEli Cohen 
2840e126ba97SEli Cohen static int ib_rate_to_mlx5(struct mlx5_ib_dev *dev, u8 rate)
2841e126ba97SEli Cohen {
28424f32ac2eSDanit Goldberg 	if (rate == IB_RATE_PORT_CURRENT)
2843e126ba97SEli Cohen 		return 0;
28444f32ac2eSDanit Goldberg 
2845a5a5d199SMichael Guralnik 	if (rate < IB_RATE_2_5_GBPS || rate > IB_RATE_600_GBPS)
2846e126ba97SEli Cohen 		return -EINVAL;
28474f32ac2eSDanit Goldberg 
28484f32ac2eSDanit Goldberg 	while (rate != IB_RATE_PORT_CURRENT &&
2849e126ba97SEli Cohen 	       !(1 << (rate + MLX5_STAT_RATE_OFFSET) &
2850938fe83cSSaeed Mahameed 		 MLX5_CAP_GEN(dev->mdev, stat_rate_support)))
2851e126ba97SEli Cohen 		--rate;
2852e126ba97SEli Cohen 
28534f32ac2eSDanit Goldberg 	return rate ? rate + MLX5_STAT_RATE_OFFSET : rate;
2854e126ba97SEli Cohen }
2855e126ba97SEli Cohen 
285675850d0bSmajd@mellanox.com static int modify_raw_packet_eth_prio(struct mlx5_core_dev *dev,
28571cd6dbd3SYishai Hadas 				      struct mlx5_ib_sq *sq, u8 sl,
28581cd6dbd3SYishai Hadas 				      struct ib_pd *pd)
285975850d0bSmajd@mellanox.com {
286075850d0bSmajd@mellanox.com 	void *in;
286175850d0bSmajd@mellanox.com 	void *tisc;
286275850d0bSmajd@mellanox.com 	int inlen;
286375850d0bSmajd@mellanox.com 	int err;
286475850d0bSmajd@mellanox.com 
286575850d0bSmajd@mellanox.com 	inlen = MLX5_ST_SZ_BYTES(modify_tis_in);
28661b9a07eeSLeon Romanovsky 	in = kvzalloc(inlen, GFP_KERNEL);
286775850d0bSmajd@mellanox.com 	if (!in)
286875850d0bSmajd@mellanox.com 		return -ENOMEM;
286975850d0bSmajd@mellanox.com 
287075850d0bSmajd@mellanox.com 	MLX5_SET(modify_tis_in, in, bitmask.prio, 1);
28711cd6dbd3SYishai Hadas 	MLX5_SET(modify_tis_in, in, uid, to_mpd(pd)->uid);
287275850d0bSmajd@mellanox.com 
287375850d0bSmajd@mellanox.com 	tisc = MLX5_ADDR_OF(modify_tis_in, in, ctx);
287475850d0bSmajd@mellanox.com 	MLX5_SET(tisc, tisc, prio, ((sl & 0x7) << 1));
287575850d0bSmajd@mellanox.com 
287675850d0bSmajd@mellanox.com 	err = mlx5_core_modify_tis(dev, sq->tisn, in, inlen);
287775850d0bSmajd@mellanox.com 
287875850d0bSmajd@mellanox.com 	kvfree(in);
287975850d0bSmajd@mellanox.com 
288075850d0bSmajd@mellanox.com 	return err;
288175850d0bSmajd@mellanox.com }
288275850d0bSmajd@mellanox.com 
288313eab21fSAviv Heller static int modify_raw_packet_tx_affinity(struct mlx5_core_dev *dev,
28841cd6dbd3SYishai Hadas 					 struct mlx5_ib_sq *sq, u8 tx_affinity,
28851cd6dbd3SYishai Hadas 					 struct ib_pd *pd)
288613eab21fSAviv Heller {
288713eab21fSAviv Heller 	void *in;
288813eab21fSAviv Heller 	void *tisc;
288913eab21fSAviv Heller 	int inlen;
289013eab21fSAviv Heller 	int err;
289113eab21fSAviv Heller 
289213eab21fSAviv Heller 	inlen = MLX5_ST_SZ_BYTES(modify_tis_in);
28931b9a07eeSLeon Romanovsky 	in = kvzalloc(inlen, GFP_KERNEL);
289413eab21fSAviv Heller 	if (!in)
289513eab21fSAviv Heller 		return -ENOMEM;
289613eab21fSAviv Heller 
289713eab21fSAviv Heller 	MLX5_SET(modify_tis_in, in, bitmask.lag_tx_port_affinity, 1);
28981cd6dbd3SYishai Hadas 	MLX5_SET(modify_tis_in, in, uid, to_mpd(pd)->uid);
289913eab21fSAviv Heller 
290013eab21fSAviv Heller 	tisc = MLX5_ADDR_OF(modify_tis_in, in, ctx);
290113eab21fSAviv Heller 	MLX5_SET(tisc, tisc, lag_tx_port_affinity, tx_affinity);
290213eab21fSAviv Heller 
290313eab21fSAviv Heller 	err = mlx5_core_modify_tis(dev, sq->tisn, in, inlen);
290413eab21fSAviv Heller 
290513eab21fSAviv Heller 	kvfree(in);
290613eab21fSAviv Heller 
290713eab21fSAviv Heller 	return err;
290813eab21fSAviv Heller }
290913eab21fSAviv Heller 
291075850d0bSmajd@mellanox.com static int mlx5_set_path(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp,
291190898850SDasaratharaman Chandramouli 			 const struct rdma_ah_attr *ah,
2912e126ba97SEli Cohen 			 struct mlx5_qp_path *path, u8 port, int attr_mask,
2913f879ee8dSAchiad Shochat 			 u32 path_flags, const struct ib_qp_attr *attr,
2914f879ee8dSAchiad Shochat 			 bool alt)
2915e126ba97SEli Cohen {
2916d8966fcdSDasaratharaman Chandramouli 	const struct ib_global_route *grh = rdma_ah_read_grh(ah);
2917e126ba97SEli Cohen 	int err;
2918ed88451eSMajd Dibbiny 	enum ib_gid_type gid_type;
2919d8966fcdSDasaratharaman Chandramouli 	u8 ah_flags = rdma_ah_get_ah_flags(ah);
2920d8966fcdSDasaratharaman Chandramouli 	u8 sl = rdma_ah_get_sl(ah);
2921e126ba97SEli Cohen 
2922e126ba97SEli Cohen 	if (attr_mask & IB_QP_PKEY_INDEX)
2923f879ee8dSAchiad Shochat 		path->pkey_index = cpu_to_be16(alt ? attr->alt_pkey_index :
2924f879ee8dSAchiad Shochat 						     attr->pkey_index);
2925e126ba97SEli Cohen 
2926d8966fcdSDasaratharaman Chandramouli 	if (ah_flags & IB_AH_GRH) {
2927d8966fcdSDasaratharaman Chandramouli 		if (grh->sgid_index >=
2928938fe83cSSaeed Mahameed 		    dev->mdev->port_caps[port - 1].gid_table_len) {
2929f4f01b54SJoe Perches 			pr_err("sgid_index (%u) too large. max is %d\n",
2930d8966fcdSDasaratharaman Chandramouli 			       grh->sgid_index,
2931938fe83cSSaeed Mahameed 			       dev->mdev->port_caps[port - 1].gid_table_len);
2932f83b4263SEli Cohen 			return -EINVAL;
2933f83b4263SEli Cohen 		}
29342811ba51SAchiad Shochat 	}
293544c58487SDasaratharaman Chandramouli 
293644c58487SDasaratharaman Chandramouli 	if (ah->type == RDMA_AH_ATTR_TYPE_ROCE) {
2937d8966fcdSDasaratharaman Chandramouli 		if (!(ah_flags & IB_AH_GRH))
29382811ba51SAchiad Shochat 			return -EINVAL;
293947ec3866SParav Pandit 
294044c58487SDasaratharaman Chandramouli 		memcpy(path->rmac, ah->roce.dmac, sizeof(ah->roce.dmac));
29412b621851SMajd Dibbiny 		if (qp->ibqp.qp_type == IB_QPT_RC ||
29422b621851SMajd Dibbiny 		    qp->ibqp.qp_type == IB_QPT_UC ||
29432b621851SMajd Dibbiny 		    qp->ibqp.qp_type == IB_QPT_XRC_INI ||
29442b621851SMajd Dibbiny 		    qp->ibqp.qp_type == IB_QPT_XRC_TGT)
294547ec3866SParav Pandit 			path->udp_sport =
294647ec3866SParav Pandit 				mlx5_get_roce_udp_sport(dev, ah->grh.sgid_attr);
2947d8966fcdSDasaratharaman Chandramouli 		path->dci_cfi_prio_sl = (sl & 0x7) << 4;
294847ec3866SParav Pandit 		gid_type = ah->grh.sgid_attr->gid_type;
2949ed88451eSMajd Dibbiny 		if (gid_type == IB_GID_TYPE_ROCE_UDP_ENCAP)
2950d8966fcdSDasaratharaman Chandramouli 			path->ecn_dscp = (grh->traffic_class >> 2) & 0x3f;
29512811ba51SAchiad Shochat 	} else {
2952d3ae2bdeSNoa Osherovich 		path->fl_free_ar = (path_flags & MLX5_PATH_FLAG_FL) ? 0x80 : 0;
2953d3ae2bdeSNoa Osherovich 		path->fl_free_ar |=
2954d3ae2bdeSNoa Osherovich 			(path_flags & MLX5_PATH_FLAG_FREE_AR) ? 0x40 : 0;
2955d8966fcdSDasaratharaman Chandramouli 		path->rlid = cpu_to_be16(rdma_ah_get_dlid(ah));
2956d8966fcdSDasaratharaman Chandramouli 		path->grh_mlid = rdma_ah_get_path_bits(ah) & 0x7f;
2957d8966fcdSDasaratharaman Chandramouli 		if (ah_flags & IB_AH_GRH)
2958e126ba97SEli Cohen 			path->grh_mlid	|= 1 << 7;
2959d8966fcdSDasaratharaman Chandramouli 		path->dci_cfi_prio_sl = sl & 0xf;
29602811ba51SAchiad Shochat 	}
29612811ba51SAchiad Shochat 
2962d8966fcdSDasaratharaman Chandramouli 	if (ah_flags & IB_AH_GRH) {
2963d8966fcdSDasaratharaman Chandramouli 		path->mgid_index = grh->sgid_index;
2964d8966fcdSDasaratharaman Chandramouli 		path->hop_limit  = grh->hop_limit;
2965e126ba97SEli Cohen 		path->tclass_flowlabel =
2966d8966fcdSDasaratharaman Chandramouli 			cpu_to_be32((grh->traffic_class << 20) |
2967d8966fcdSDasaratharaman Chandramouli 				    (grh->flow_label));
2968d8966fcdSDasaratharaman Chandramouli 		memcpy(path->rgid, grh->dgid.raw, 16);
2969e126ba97SEli Cohen 	}
2970e126ba97SEli Cohen 
2971d8966fcdSDasaratharaman Chandramouli 	err = ib_rate_to_mlx5(dev, rdma_ah_get_static_rate(ah));
2972e126ba97SEli Cohen 	if (err < 0)
2973e126ba97SEli Cohen 		return err;
2974e126ba97SEli Cohen 	path->static_rate = err;
2975e126ba97SEli Cohen 	path->port = port;
2976e126ba97SEli Cohen 
2977e126ba97SEli Cohen 	if (attr_mask & IB_QP_TIMEOUT)
2978f879ee8dSAchiad Shochat 		path->ackto_lt = (alt ? attr->alt_timeout : attr->timeout) << 3;
2979e126ba97SEli Cohen 
298075850d0bSmajd@mellanox.com 	if ((qp->ibqp.qp_type == IB_QPT_RAW_PACKET) && qp->sq.wqe_cnt)
298175850d0bSmajd@mellanox.com 		return modify_raw_packet_eth_prio(dev->mdev,
298275850d0bSmajd@mellanox.com 						  &qp->raw_packet_qp.sq,
29831cd6dbd3SYishai Hadas 						  sl & 0xf, qp->ibqp.pd);
298475850d0bSmajd@mellanox.com 
2985e126ba97SEli Cohen 	return 0;
2986e126ba97SEli Cohen }
2987e126ba97SEli Cohen 
2988e126ba97SEli Cohen static enum mlx5_qp_optpar opt_mask[MLX5_QP_NUM_STATE][MLX5_QP_NUM_STATE][MLX5_QP_ST_MAX] = {
2989e126ba97SEli Cohen 	[MLX5_QP_STATE_INIT] = {
2990e126ba97SEli Cohen 		[MLX5_QP_STATE_INIT] = {
2991e126ba97SEli Cohen 			[MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_RRE		|
2992e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_RAE		|
2993e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_RWE		|
2994e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_PKEY_INDEX	|
2995e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_PRI_PORT,
2996e126ba97SEli Cohen 			[MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_RWE		|
2997e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_PKEY_INDEX	|
2998e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_PRI_PORT,
2999e126ba97SEli Cohen 			[MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_PKEY_INDEX	|
3000e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_Q_KEY		|
3001e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_PRI_PORT,
30028f4426aaSJack Morgenstein 			[MLX5_QP_ST_XRC] = MLX5_QP_OPTPAR_RRE		|
30038f4426aaSJack Morgenstein 					  MLX5_QP_OPTPAR_RAE		|
30048f4426aaSJack Morgenstein 					  MLX5_QP_OPTPAR_RWE		|
30058f4426aaSJack Morgenstein 					  MLX5_QP_OPTPAR_PKEY_INDEX	|
30068f4426aaSJack Morgenstein 					  MLX5_QP_OPTPAR_PRI_PORT,
3007e126ba97SEli Cohen 		},
3008e126ba97SEli Cohen 		[MLX5_QP_STATE_RTR] = {
3009e126ba97SEli Cohen 			[MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH  |
3010e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_RRE            |
3011e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_RAE            |
3012e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_RWE            |
3013e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_PKEY_INDEX,
3014e126ba97SEli Cohen 			[MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH  |
3015e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_RWE            |
3016e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_PKEY_INDEX,
3017e126ba97SEli Cohen 			[MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_PKEY_INDEX     |
3018e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_Q_KEY,
3019e126ba97SEli Cohen 			[MLX5_QP_ST_MLX] = MLX5_QP_OPTPAR_PKEY_INDEX	|
3020e126ba97SEli Cohen 					   MLX5_QP_OPTPAR_Q_KEY,
3021a4774e90SEli Cohen 			[MLX5_QP_ST_XRC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH |
3022a4774e90SEli Cohen 					  MLX5_QP_OPTPAR_RRE            |
3023a4774e90SEli Cohen 					  MLX5_QP_OPTPAR_RAE            |
3024a4774e90SEli Cohen 					  MLX5_QP_OPTPAR_RWE            |
3025a4774e90SEli Cohen 					  MLX5_QP_OPTPAR_PKEY_INDEX,
3026e126ba97SEli Cohen 		},
3027e126ba97SEli Cohen 	},
3028e126ba97SEli Cohen 	[MLX5_QP_STATE_RTR] = {
3029e126ba97SEli Cohen 		[MLX5_QP_STATE_RTS] = {
3030e126ba97SEli Cohen 			[MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH	|
3031e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_RRE		|
3032e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_RAE		|
3033e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_RWE		|
3034e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_PM_STATE	|
3035e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_RNR_TIMEOUT,
3036e126ba97SEli Cohen 			[MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH	|
3037e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_RWE		|
3038e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_PM_STATE,
3039e126ba97SEli Cohen 			[MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_Q_KEY,
30408f4426aaSJack Morgenstein 			[MLX5_QP_ST_XRC] = MLX5_QP_OPTPAR_ALT_ADDR_PATH	|
30418f4426aaSJack Morgenstein 					  MLX5_QP_OPTPAR_RRE		|
30428f4426aaSJack Morgenstein 					  MLX5_QP_OPTPAR_RAE		|
30438f4426aaSJack Morgenstein 					  MLX5_QP_OPTPAR_RWE		|
30448f4426aaSJack Morgenstein 					  MLX5_QP_OPTPAR_PM_STATE	|
30458f4426aaSJack Morgenstein 					  MLX5_QP_OPTPAR_RNR_TIMEOUT,
3046e126ba97SEli Cohen 		},
3047e126ba97SEli Cohen 	},
3048e126ba97SEli Cohen 	[MLX5_QP_STATE_RTS] = {
3049e126ba97SEli Cohen 		[MLX5_QP_STATE_RTS] = {
3050e126ba97SEli Cohen 			[MLX5_QP_ST_RC] = MLX5_QP_OPTPAR_RRE		|
3051e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_RAE		|
3052e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_RWE		|
3053e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_RNR_TIMEOUT	|
3054c2a3431eSEli Cohen 					  MLX5_QP_OPTPAR_PM_STATE	|
3055c2a3431eSEli Cohen 					  MLX5_QP_OPTPAR_ALT_ADDR_PATH,
3056e126ba97SEli Cohen 			[MLX5_QP_ST_UC] = MLX5_QP_OPTPAR_RWE		|
3057c2a3431eSEli Cohen 					  MLX5_QP_OPTPAR_PM_STATE	|
3058c2a3431eSEli Cohen 					  MLX5_QP_OPTPAR_ALT_ADDR_PATH,
3059e126ba97SEli Cohen 			[MLX5_QP_ST_UD] = MLX5_QP_OPTPAR_Q_KEY		|
3060e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_SRQN		|
3061e126ba97SEli Cohen 					  MLX5_QP_OPTPAR_CQN_RCV,
30628f4426aaSJack Morgenstein 			[MLX5_QP_ST_XRC] = MLX5_QP_OPTPAR_RRE		|
30638f4426aaSJack Morgenstein 					  MLX5_QP_OPTPAR_RAE		|
30648f4426aaSJack Morgenstein 					  MLX5_QP_OPTPAR_RWE		|
30658f4426aaSJack Morgenstein 					  MLX5_QP_OPTPAR_RNR_TIMEOUT	|
30668f4426aaSJack Morgenstein 					  MLX5_QP_OPTPAR_PM_STATE	|
30678f4426aaSJack Morgenstein 					  MLX5_QP_OPTPAR_ALT_ADDR_PATH,
3068e126ba97SEli Cohen 		},
3069e126ba97SEli Cohen 	},
3070e126ba97SEli Cohen 	[MLX5_QP_STATE_SQER] = {
3071e126ba97SEli Cohen 		[MLX5_QP_STATE_RTS] = {
3072e126ba97SEli Cohen 			[MLX5_QP_ST_UD]	 = MLX5_QP_OPTPAR_Q_KEY,
3073e126ba97SEli Cohen 			[MLX5_QP_ST_MLX] = MLX5_QP_OPTPAR_Q_KEY,
307475959f56SEli Cohen 			[MLX5_QP_ST_UC]	 = MLX5_QP_OPTPAR_RWE,
3075a4774e90SEli Cohen 			[MLX5_QP_ST_RC]	 = MLX5_QP_OPTPAR_RNR_TIMEOUT	|
3076a4774e90SEli Cohen 					   MLX5_QP_OPTPAR_RWE		|
3077a4774e90SEli Cohen 					   MLX5_QP_OPTPAR_RAE		|
3078a4774e90SEli Cohen 					   MLX5_QP_OPTPAR_RRE,
30798f4426aaSJack Morgenstein 			[MLX5_QP_ST_XRC]  = MLX5_QP_OPTPAR_RNR_TIMEOUT	|
30808f4426aaSJack Morgenstein 					   MLX5_QP_OPTPAR_RWE		|
30818f4426aaSJack Morgenstein 					   MLX5_QP_OPTPAR_RAE		|
30828f4426aaSJack Morgenstein 					   MLX5_QP_OPTPAR_RRE,
3083e126ba97SEli Cohen 		},
3084e126ba97SEli Cohen 	},
3085e126ba97SEli Cohen };
3086e126ba97SEli Cohen 
3087e126ba97SEli Cohen static int ib_nr_to_mlx5_nr(int ib_mask)
3088e126ba97SEli Cohen {
3089e126ba97SEli Cohen 	switch (ib_mask) {
3090e126ba97SEli Cohen 	case IB_QP_STATE:
3091e126ba97SEli Cohen 		return 0;
3092e126ba97SEli Cohen 	case IB_QP_CUR_STATE:
3093e126ba97SEli Cohen 		return 0;
3094e126ba97SEli Cohen 	case IB_QP_EN_SQD_ASYNC_NOTIFY:
3095e126ba97SEli Cohen 		return 0;
3096e126ba97SEli Cohen 	case IB_QP_ACCESS_FLAGS:
3097e126ba97SEli Cohen 		return MLX5_QP_OPTPAR_RWE | MLX5_QP_OPTPAR_RRE |
3098e126ba97SEli Cohen 			MLX5_QP_OPTPAR_RAE;
3099e126ba97SEli Cohen 	case IB_QP_PKEY_INDEX:
3100e126ba97SEli Cohen 		return MLX5_QP_OPTPAR_PKEY_INDEX;
3101e126ba97SEli Cohen 	case IB_QP_PORT:
3102e126ba97SEli Cohen 		return MLX5_QP_OPTPAR_PRI_PORT;
3103e126ba97SEli Cohen 	case IB_QP_QKEY:
3104e126ba97SEli Cohen 		return MLX5_QP_OPTPAR_Q_KEY;
3105e126ba97SEli Cohen 	case IB_QP_AV:
3106e126ba97SEli Cohen 		return MLX5_QP_OPTPAR_PRIMARY_ADDR_PATH |
3107e126ba97SEli Cohen 			MLX5_QP_OPTPAR_PRI_PORT;
3108e126ba97SEli Cohen 	case IB_QP_PATH_MTU:
3109e126ba97SEli Cohen 		return 0;
3110e126ba97SEli Cohen 	case IB_QP_TIMEOUT:
3111e126ba97SEli Cohen 		return MLX5_QP_OPTPAR_ACK_TIMEOUT;
3112e126ba97SEli Cohen 	case IB_QP_RETRY_CNT:
3113e126ba97SEli Cohen 		return MLX5_QP_OPTPAR_RETRY_COUNT;
3114e126ba97SEli Cohen 	case IB_QP_RNR_RETRY:
3115e126ba97SEli Cohen 		return MLX5_QP_OPTPAR_RNR_RETRY;
3116e126ba97SEli Cohen 	case IB_QP_RQ_PSN:
3117e126ba97SEli Cohen 		return 0;
3118e126ba97SEli Cohen 	case IB_QP_MAX_QP_RD_ATOMIC:
3119e126ba97SEli Cohen 		return MLX5_QP_OPTPAR_SRA_MAX;
3120e126ba97SEli Cohen 	case IB_QP_ALT_PATH:
3121e126ba97SEli Cohen 		return MLX5_QP_OPTPAR_ALT_ADDR_PATH;
3122e126ba97SEli Cohen 	case IB_QP_MIN_RNR_TIMER:
3123e126ba97SEli Cohen 		return MLX5_QP_OPTPAR_RNR_TIMEOUT;
3124e126ba97SEli Cohen 	case IB_QP_SQ_PSN:
3125e126ba97SEli Cohen 		return 0;
3126e126ba97SEli Cohen 	case IB_QP_MAX_DEST_RD_ATOMIC:
3127e126ba97SEli Cohen 		return MLX5_QP_OPTPAR_RRA_MAX | MLX5_QP_OPTPAR_RWE |
3128e126ba97SEli Cohen 			MLX5_QP_OPTPAR_RRE | MLX5_QP_OPTPAR_RAE;
3129e126ba97SEli Cohen 	case IB_QP_PATH_MIG_STATE:
3130e126ba97SEli Cohen 		return MLX5_QP_OPTPAR_PM_STATE;
3131e126ba97SEli Cohen 	case IB_QP_CAP:
3132e126ba97SEli Cohen 		return 0;
3133e126ba97SEli Cohen 	case IB_QP_DEST_QPN:
3134e126ba97SEli Cohen 		return 0;
3135e126ba97SEli Cohen 	}
3136e126ba97SEli Cohen 	return 0;
3137e126ba97SEli Cohen }
3138e126ba97SEli Cohen 
3139e126ba97SEli Cohen static int ib_mask_to_mlx5_opt(int ib_mask)
3140e126ba97SEli Cohen {
3141e126ba97SEli Cohen 	int result = 0;
3142e126ba97SEli Cohen 	int i;
3143e126ba97SEli Cohen 
3144e126ba97SEli Cohen 	for (i = 0; i < 8 * sizeof(int); i++) {
3145e126ba97SEli Cohen 		if ((1 << i) & ib_mask)
3146e126ba97SEli Cohen 			result |= ib_nr_to_mlx5_nr(1 << i);
3147e126ba97SEli Cohen 	}
3148e126ba97SEli Cohen 
3149e126ba97SEli Cohen 	return result;
3150e126ba97SEli Cohen }
3151e126ba97SEli Cohen 
315234d57585SYishai Hadas static int modify_raw_packet_qp_rq(
315334d57585SYishai Hadas 	struct mlx5_ib_dev *dev, struct mlx5_ib_rq *rq, int new_state,
315434d57585SYishai Hadas 	const struct mlx5_modify_raw_qp_param *raw_qp_param, struct ib_pd *pd)
3155ad5f8e96Smajd@mellanox.com {
3156ad5f8e96Smajd@mellanox.com 	void *in;
3157ad5f8e96Smajd@mellanox.com 	void *rqc;
3158ad5f8e96Smajd@mellanox.com 	int inlen;
3159ad5f8e96Smajd@mellanox.com 	int err;
3160ad5f8e96Smajd@mellanox.com 
3161ad5f8e96Smajd@mellanox.com 	inlen = MLX5_ST_SZ_BYTES(modify_rq_in);
31621b9a07eeSLeon Romanovsky 	in = kvzalloc(inlen, GFP_KERNEL);
3163ad5f8e96Smajd@mellanox.com 	if (!in)
3164ad5f8e96Smajd@mellanox.com 		return -ENOMEM;
3165ad5f8e96Smajd@mellanox.com 
3166ad5f8e96Smajd@mellanox.com 	MLX5_SET(modify_rq_in, in, rq_state, rq->state);
316734d57585SYishai Hadas 	MLX5_SET(modify_rq_in, in, uid, to_mpd(pd)->uid);
3168ad5f8e96Smajd@mellanox.com 
3169ad5f8e96Smajd@mellanox.com 	rqc = MLX5_ADDR_OF(modify_rq_in, in, ctx);
3170ad5f8e96Smajd@mellanox.com 	MLX5_SET(rqc, rqc, state, new_state);
3171ad5f8e96Smajd@mellanox.com 
3172eb49ab0cSAlex Vesker 	if (raw_qp_param->set_mask & MLX5_RAW_QP_MOD_SET_RQ_Q_CTR_ID) {
3173eb49ab0cSAlex Vesker 		if (MLX5_CAP_GEN(dev->mdev, modify_rq_counter_set_id)) {
3174eb49ab0cSAlex Vesker 			MLX5_SET64(modify_rq_in, in, modify_bitmask,
317523a6964eSMajd Dibbiny 				   MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID);
3176eb49ab0cSAlex Vesker 			MLX5_SET(rqc, rqc, counter_set_id, raw_qp_param->rq_q_ctr_id);
3177eb49ab0cSAlex Vesker 		} else
31785a738b5dSJason Gunthorpe 			dev_info_once(
31795a738b5dSJason Gunthorpe 				&dev->ib_dev.dev,
31805a738b5dSJason Gunthorpe 				"RAW PACKET QP counters are not supported on current FW\n");
3181eb49ab0cSAlex Vesker 	}
3182eb49ab0cSAlex Vesker 
3183eb49ab0cSAlex Vesker 	err = mlx5_core_modify_rq(dev->mdev, rq->base.mqp.qpn, in, inlen);
3184ad5f8e96Smajd@mellanox.com 	if (err)
3185ad5f8e96Smajd@mellanox.com 		goto out;
3186ad5f8e96Smajd@mellanox.com 
3187ad5f8e96Smajd@mellanox.com 	rq->state = new_state;
3188ad5f8e96Smajd@mellanox.com 
3189ad5f8e96Smajd@mellanox.com out:
3190ad5f8e96Smajd@mellanox.com 	kvfree(in);
3191ad5f8e96Smajd@mellanox.com 	return err;
3192ad5f8e96Smajd@mellanox.com }
3193ad5f8e96Smajd@mellanox.com 
3194c14003f0SYishai Hadas static int modify_raw_packet_qp_sq(
3195c14003f0SYishai Hadas 	struct mlx5_core_dev *dev, struct mlx5_ib_sq *sq, int new_state,
3196c14003f0SYishai Hadas 	const struct mlx5_modify_raw_qp_param *raw_qp_param, struct ib_pd *pd)
3197ad5f8e96Smajd@mellanox.com {
31987d29f349SBodong Wang 	struct mlx5_ib_qp *ibqp = sq->base.container_mibqp;
319961147f39SBodong Wang 	struct mlx5_rate_limit old_rl = ibqp->rl;
320061147f39SBodong Wang 	struct mlx5_rate_limit new_rl = old_rl;
320161147f39SBodong Wang 	bool new_rate_added = false;
32027d29f349SBodong Wang 	u16 rl_index = 0;
3203ad5f8e96Smajd@mellanox.com 	void *in;
3204ad5f8e96Smajd@mellanox.com 	void *sqc;
3205ad5f8e96Smajd@mellanox.com 	int inlen;
3206ad5f8e96Smajd@mellanox.com 	int err;
3207ad5f8e96Smajd@mellanox.com 
3208ad5f8e96Smajd@mellanox.com 	inlen = MLX5_ST_SZ_BYTES(modify_sq_in);
32091b9a07eeSLeon Romanovsky 	in = kvzalloc(inlen, GFP_KERNEL);
3210ad5f8e96Smajd@mellanox.com 	if (!in)
3211ad5f8e96Smajd@mellanox.com 		return -ENOMEM;
3212ad5f8e96Smajd@mellanox.com 
3213c14003f0SYishai Hadas 	MLX5_SET(modify_sq_in, in, uid, to_mpd(pd)->uid);
3214ad5f8e96Smajd@mellanox.com 	MLX5_SET(modify_sq_in, in, sq_state, sq->state);
3215ad5f8e96Smajd@mellanox.com 
3216ad5f8e96Smajd@mellanox.com 	sqc = MLX5_ADDR_OF(modify_sq_in, in, ctx);
3217ad5f8e96Smajd@mellanox.com 	MLX5_SET(sqc, sqc, state, new_state);
3218ad5f8e96Smajd@mellanox.com 
32197d29f349SBodong Wang 	if (raw_qp_param->set_mask & MLX5_RAW_QP_RATE_LIMIT) {
32207d29f349SBodong Wang 		if (new_state != MLX5_SQC_STATE_RDY)
32217d29f349SBodong Wang 			pr_warn("%s: Rate limit can only be changed when SQ is moving to RDY\n",
32227d29f349SBodong Wang 				__func__);
32237d29f349SBodong Wang 		else
322461147f39SBodong Wang 			new_rl = raw_qp_param->rl;
32257d29f349SBodong Wang 	}
3226ad5f8e96Smajd@mellanox.com 
322761147f39SBodong Wang 	if (!mlx5_rl_are_equal(&old_rl, &new_rl)) {
322861147f39SBodong Wang 		if (new_rl.rate) {
322961147f39SBodong Wang 			err = mlx5_rl_add_rate(dev, &rl_index, &new_rl);
32307d29f349SBodong Wang 			if (err) {
323161147f39SBodong Wang 				pr_err("Failed configuring rate limit(err %d): \
323261147f39SBodong Wang 				       rate %u, max_burst_sz %u, typical_pkt_sz %u\n",
323361147f39SBodong Wang 				       err, new_rl.rate, new_rl.max_burst_sz,
323461147f39SBodong Wang 				       new_rl.typical_pkt_sz);
323561147f39SBodong Wang 
32367d29f349SBodong Wang 				goto out;
32377d29f349SBodong Wang 			}
323861147f39SBodong Wang 			new_rate_added = true;
32397d29f349SBodong Wang 		}
32407d29f349SBodong Wang 
32417d29f349SBodong Wang 		MLX5_SET64(modify_sq_in, in, modify_bitmask, 1);
324261147f39SBodong Wang 		/* index 0 means no limit */
32437d29f349SBodong Wang 		MLX5_SET(sqc, sqc, packet_pacing_rate_limit_index, rl_index);
32447d29f349SBodong Wang 	}
32457d29f349SBodong Wang 
32467d29f349SBodong Wang 	err = mlx5_core_modify_sq(dev, sq->base.mqp.qpn, in, inlen);
32477d29f349SBodong Wang 	if (err) {
32487d29f349SBodong Wang 		/* Remove new rate from table if failed */
324961147f39SBodong Wang 		if (new_rate_added)
325061147f39SBodong Wang 			mlx5_rl_remove_rate(dev, &new_rl);
32517d29f349SBodong Wang 		goto out;
32527d29f349SBodong Wang 	}
32537d29f349SBodong Wang 
32547d29f349SBodong Wang 	/* Only remove the old rate after new rate was set */
3255c8973df2SRafi Wiener 	if ((old_rl.rate && !mlx5_rl_are_equal(&old_rl, &new_rl)) ||
3256c8973df2SRafi Wiener 	    (new_state != MLX5_SQC_STATE_RDY)) {
325761147f39SBodong Wang 		mlx5_rl_remove_rate(dev, &old_rl);
3258c8973df2SRafi Wiener 		if (new_state != MLX5_SQC_STATE_RDY)
3259c8973df2SRafi Wiener 			memset(&new_rl, 0, sizeof(new_rl));
3260c8973df2SRafi Wiener 	}
32617d29f349SBodong Wang 
326261147f39SBodong Wang 	ibqp->rl = new_rl;
3263ad5f8e96Smajd@mellanox.com 	sq->state = new_state;
3264ad5f8e96Smajd@mellanox.com 
3265ad5f8e96Smajd@mellanox.com out:
3266ad5f8e96Smajd@mellanox.com 	kvfree(in);
3267ad5f8e96Smajd@mellanox.com 	return err;
3268ad5f8e96Smajd@mellanox.com }
3269ad5f8e96Smajd@mellanox.com 
3270ad5f8e96Smajd@mellanox.com static int modify_raw_packet_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp,
327113eab21fSAviv Heller 				const struct mlx5_modify_raw_qp_param *raw_qp_param,
327213eab21fSAviv Heller 				u8 tx_affinity)
3273ad5f8e96Smajd@mellanox.com {
3274ad5f8e96Smajd@mellanox.com 	struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp;
3275ad5f8e96Smajd@mellanox.com 	struct mlx5_ib_rq *rq = &raw_packet_qp->rq;
3276ad5f8e96Smajd@mellanox.com 	struct mlx5_ib_sq *sq = &raw_packet_qp->sq;
32777d29f349SBodong Wang 	int modify_rq = !!qp->rq.wqe_cnt;
32787d29f349SBodong Wang 	int modify_sq = !!qp->sq.wqe_cnt;
3279ad5f8e96Smajd@mellanox.com 	int rq_state;
3280ad5f8e96Smajd@mellanox.com 	int sq_state;
3281ad5f8e96Smajd@mellanox.com 	int err;
3282ad5f8e96Smajd@mellanox.com 
32830680efa2SAlex Vesker 	switch (raw_qp_param->operation) {
3284ad5f8e96Smajd@mellanox.com 	case MLX5_CMD_OP_RST2INIT_QP:
3285ad5f8e96Smajd@mellanox.com 		rq_state = MLX5_RQC_STATE_RDY;
3286ad5f8e96Smajd@mellanox.com 		sq_state = MLX5_SQC_STATE_RDY;
3287ad5f8e96Smajd@mellanox.com 		break;
3288ad5f8e96Smajd@mellanox.com 	case MLX5_CMD_OP_2ERR_QP:
3289ad5f8e96Smajd@mellanox.com 		rq_state = MLX5_RQC_STATE_ERR;
3290ad5f8e96Smajd@mellanox.com 		sq_state = MLX5_SQC_STATE_ERR;
3291ad5f8e96Smajd@mellanox.com 		break;
3292ad5f8e96Smajd@mellanox.com 	case MLX5_CMD_OP_2RST_QP:
3293ad5f8e96Smajd@mellanox.com 		rq_state = MLX5_RQC_STATE_RST;
3294ad5f8e96Smajd@mellanox.com 		sq_state = MLX5_SQC_STATE_RST;
3295ad5f8e96Smajd@mellanox.com 		break;
3296ad5f8e96Smajd@mellanox.com 	case MLX5_CMD_OP_RTR2RTS_QP:
3297ad5f8e96Smajd@mellanox.com 	case MLX5_CMD_OP_RTS2RTS_QP:
32987d29f349SBodong Wang 		if (raw_qp_param->set_mask ==
32997d29f349SBodong Wang 		    MLX5_RAW_QP_RATE_LIMIT) {
33007d29f349SBodong Wang 			modify_rq = 0;
33017d29f349SBodong Wang 			sq_state = sq->state;
33027d29f349SBodong Wang 		} else {
33037d29f349SBodong Wang 			return raw_qp_param->set_mask ? -EINVAL : 0;
33047d29f349SBodong Wang 		}
33057d29f349SBodong Wang 		break;
33067d29f349SBodong Wang 	case MLX5_CMD_OP_INIT2INIT_QP:
33077d29f349SBodong Wang 	case MLX5_CMD_OP_INIT2RTR_QP:
3308eb49ab0cSAlex Vesker 		if (raw_qp_param->set_mask)
3309eb49ab0cSAlex Vesker 			return -EINVAL;
3310eb49ab0cSAlex Vesker 		else
3311ad5f8e96Smajd@mellanox.com 			return 0;
3312ad5f8e96Smajd@mellanox.com 	default:
3313ad5f8e96Smajd@mellanox.com 		WARN_ON(1);
3314ad5f8e96Smajd@mellanox.com 		return -EINVAL;
3315ad5f8e96Smajd@mellanox.com 	}
3316ad5f8e96Smajd@mellanox.com 
33177d29f349SBodong Wang 	if (modify_rq) {
331834d57585SYishai Hadas 		err =  modify_raw_packet_qp_rq(dev, rq, rq_state, raw_qp_param,
331934d57585SYishai Hadas 					       qp->ibqp.pd);
3320ad5f8e96Smajd@mellanox.com 		if (err)
3321ad5f8e96Smajd@mellanox.com 			return err;
3322ad5f8e96Smajd@mellanox.com 	}
3323ad5f8e96Smajd@mellanox.com 
33247d29f349SBodong Wang 	if (modify_sq) {
3325d5ed8ac3SMark Bloch 		struct mlx5_flow_handle *flow_rule;
3326d5ed8ac3SMark Bloch 
332713eab21fSAviv Heller 		if (tx_affinity) {
332813eab21fSAviv Heller 			err = modify_raw_packet_tx_affinity(dev->mdev, sq,
33291cd6dbd3SYishai Hadas 							    tx_affinity,
33301cd6dbd3SYishai Hadas 							    qp->ibqp.pd);
333113eab21fSAviv Heller 			if (err)
333213eab21fSAviv Heller 				return err;
333313eab21fSAviv Heller 		}
333413eab21fSAviv Heller 
3335d5ed8ac3SMark Bloch 		flow_rule = create_flow_rule_vport_sq(dev, sq,
3336d5ed8ac3SMark Bloch 						      raw_qp_param->port);
3337d5ed8ac3SMark Bloch 		if (IS_ERR(flow_rule))
33381db86318SColin Ian King 			return PTR_ERR(flow_rule);
3339d5ed8ac3SMark Bloch 
3340d5ed8ac3SMark Bloch 		err = modify_raw_packet_qp_sq(dev->mdev, sq, sq_state,
3341c14003f0SYishai Hadas 					      raw_qp_param, qp->ibqp.pd);
3342d5ed8ac3SMark Bloch 		if (err) {
3343d5ed8ac3SMark Bloch 			if (flow_rule)
3344d5ed8ac3SMark Bloch 				mlx5_del_flow_rules(flow_rule);
3345d5ed8ac3SMark Bloch 			return err;
3346d5ed8ac3SMark Bloch 		}
3347d5ed8ac3SMark Bloch 
3348d5ed8ac3SMark Bloch 		if (flow_rule) {
3349d5ed8ac3SMark Bloch 			destroy_flow_rule_vport_sq(sq);
3350d5ed8ac3SMark Bloch 			sq->flow_rule = flow_rule;
3351d5ed8ac3SMark Bloch 		}
3352d5ed8ac3SMark Bloch 
3353d5ed8ac3SMark Bloch 		return err;
335413eab21fSAviv Heller 	}
3355ad5f8e96Smajd@mellanox.com 
3356ad5f8e96Smajd@mellanox.com 	return 0;
3357ad5f8e96Smajd@mellanox.com }
3358ad5f8e96Smajd@mellanox.com 
3359c6a21c38SMajd Dibbiny static unsigned int get_tx_affinity(struct mlx5_ib_dev *dev,
3360c6a21c38SMajd Dibbiny 				    struct mlx5_ib_pd *pd,
3361c6a21c38SMajd Dibbiny 				    struct mlx5_ib_qp_base *qp_base,
336289944450SShamir Rabinovitch 				    u8 port_num, struct ib_udata *udata)
3363c6a21c38SMajd Dibbiny {
336489944450SShamir Rabinovitch 	struct mlx5_ib_ucontext *ucontext = rdma_udata_to_drv_context(
336589944450SShamir Rabinovitch 		udata, struct mlx5_ib_ucontext, ibucontext);
3366c6a21c38SMajd Dibbiny 	unsigned int tx_port_affinity;
3367c6a21c38SMajd Dibbiny 
3368c6a21c38SMajd Dibbiny 	if (ucontext) {
3369c6a21c38SMajd Dibbiny 		tx_port_affinity = (unsigned int)atomic_add_return(
3370c6a21c38SMajd Dibbiny 					   1, &ucontext->tx_port_affinity) %
3371c6a21c38SMajd Dibbiny 					   MLX5_MAX_PORTS +
3372c6a21c38SMajd Dibbiny 				   1;
3373c6a21c38SMajd Dibbiny 		mlx5_ib_dbg(dev, "Set tx affinity 0x%x to qpn 0x%x ucontext %p\n",
3374c6a21c38SMajd Dibbiny 				tx_port_affinity, qp_base->mqp.qpn, ucontext);
3375c6a21c38SMajd Dibbiny 	} else {
3376c6a21c38SMajd Dibbiny 		tx_port_affinity =
3377c6a21c38SMajd Dibbiny 			(unsigned int)atomic_add_return(
337895579e78SMark Bloch 				1, &dev->port[port_num].roce.tx_port_affinity) %
3379c6a21c38SMajd Dibbiny 				MLX5_MAX_PORTS +
3380c6a21c38SMajd Dibbiny 			1;
3381c6a21c38SMajd Dibbiny 		mlx5_ib_dbg(dev, "Set tx affinity 0x%x to qpn 0x%x\n",
3382c6a21c38SMajd Dibbiny 				tx_port_affinity, qp_base->mqp.qpn);
3383c6a21c38SMajd Dibbiny 	}
3384c6a21c38SMajd Dibbiny 
3385c6a21c38SMajd Dibbiny 	return tx_port_affinity;
3386c6a21c38SMajd Dibbiny }
3387c6a21c38SMajd Dibbiny 
3388d14133ddSMark Zhang static int __mlx5_ib_qp_set_counter(struct ib_qp *qp,
3389d14133ddSMark Zhang 				    struct rdma_counter *counter)
3390d14133ddSMark Zhang {
3391d14133ddSMark Zhang 	struct mlx5_ib_dev *dev = to_mdev(qp->device);
3392d14133ddSMark Zhang 	struct mlx5_ib_qp *mqp = to_mqp(qp);
3393d14133ddSMark Zhang 	struct mlx5_qp_context context = {};
3394d14133ddSMark Zhang 	struct mlx5_ib_qp_base *base;
3395d14133ddSMark Zhang 	u32 set_id;
3396d14133ddSMark Zhang 
3397d14133ddSMark Zhang 	if (!MLX5_CAP_GEN(dev->mdev, rts2rts_qp_counters_set_id))
3398d14133ddSMark Zhang 		return 0;
3399d14133ddSMark Zhang 
34003e1f000fSParav Pandit 	if (counter)
3401d14133ddSMark Zhang 		set_id = counter->id;
34023e1f000fSParav Pandit 	else
34033e1f000fSParav Pandit 		set_id = mlx5_ib_get_counters_id(dev, mqp->port - 1);
3404d14133ddSMark Zhang 
3405d14133ddSMark Zhang 	base = &mqp->trans_qp.base;
3406d14133ddSMark Zhang 	context.qp_counter_set_usr_page &= cpu_to_be32(0xffffff);
3407d14133ddSMark Zhang 	context.qp_counter_set_usr_page |= cpu_to_be32(set_id << 24);
3408d14133ddSMark Zhang 	return mlx5_core_qp_modify(dev->mdev,
3409d14133ddSMark Zhang 				   MLX5_CMD_OP_RTS2RTS_QP,
3410d14133ddSMark Zhang 				   MLX5_QP_OPTPAR_COUNTER_SET_ID,
3411d14133ddSMark Zhang 				   &context, &base->mqp);
3412d14133ddSMark Zhang }
3413d14133ddSMark Zhang 
3414e126ba97SEli Cohen static int __mlx5_ib_modify_qp(struct ib_qp *ibqp,
3415e126ba97SEli Cohen 			       const struct ib_qp_attr *attr, int attr_mask,
341689944450SShamir Rabinovitch 			       enum ib_qp_state cur_state,
341789944450SShamir Rabinovitch 			       enum ib_qp_state new_state,
341889944450SShamir Rabinovitch 			       const struct mlx5_ib_modify_qp *ucmd,
341989944450SShamir Rabinovitch 			       struct ib_udata *udata)
3420e126ba97SEli Cohen {
3421427c1e7bSmajd@mellanox.com 	static const u16 optab[MLX5_QP_NUM_STATE][MLX5_QP_NUM_STATE] = {
3422427c1e7bSmajd@mellanox.com 		[MLX5_QP_STATE_RST] = {
3423427c1e7bSmajd@mellanox.com 			[MLX5_QP_STATE_RST]	= MLX5_CMD_OP_2RST_QP,
3424427c1e7bSmajd@mellanox.com 			[MLX5_QP_STATE_ERR]	= MLX5_CMD_OP_2ERR_QP,
3425427c1e7bSmajd@mellanox.com 			[MLX5_QP_STATE_INIT]	= MLX5_CMD_OP_RST2INIT_QP,
3426427c1e7bSmajd@mellanox.com 		},
3427427c1e7bSmajd@mellanox.com 		[MLX5_QP_STATE_INIT]  = {
3428427c1e7bSmajd@mellanox.com 			[MLX5_QP_STATE_RST]	= MLX5_CMD_OP_2RST_QP,
3429427c1e7bSmajd@mellanox.com 			[MLX5_QP_STATE_ERR]	= MLX5_CMD_OP_2ERR_QP,
3430427c1e7bSmajd@mellanox.com 			[MLX5_QP_STATE_INIT]	= MLX5_CMD_OP_INIT2INIT_QP,
3431427c1e7bSmajd@mellanox.com 			[MLX5_QP_STATE_RTR]	= MLX5_CMD_OP_INIT2RTR_QP,
3432427c1e7bSmajd@mellanox.com 		},
3433427c1e7bSmajd@mellanox.com 		[MLX5_QP_STATE_RTR]   = {
3434427c1e7bSmajd@mellanox.com 			[MLX5_QP_STATE_RST]	= MLX5_CMD_OP_2RST_QP,
3435427c1e7bSmajd@mellanox.com 			[MLX5_QP_STATE_ERR]	= MLX5_CMD_OP_2ERR_QP,
3436427c1e7bSmajd@mellanox.com 			[MLX5_QP_STATE_RTS]	= MLX5_CMD_OP_RTR2RTS_QP,
3437427c1e7bSmajd@mellanox.com 		},
3438427c1e7bSmajd@mellanox.com 		[MLX5_QP_STATE_RTS]   = {
3439427c1e7bSmajd@mellanox.com 			[MLX5_QP_STATE_RST]	= MLX5_CMD_OP_2RST_QP,
3440427c1e7bSmajd@mellanox.com 			[MLX5_QP_STATE_ERR]	= MLX5_CMD_OP_2ERR_QP,
3441427c1e7bSmajd@mellanox.com 			[MLX5_QP_STATE_RTS]	= MLX5_CMD_OP_RTS2RTS_QP,
3442427c1e7bSmajd@mellanox.com 		},
3443427c1e7bSmajd@mellanox.com 		[MLX5_QP_STATE_SQD] = {
3444427c1e7bSmajd@mellanox.com 			[MLX5_QP_STATE_RST]	= MLX5_CMD_OP_2RST_QP,
3445427c1e7bSmajd@mellanox.com 			[MLX5_QP_STATE_ERR]	= MLX5_CMD_OP_2ERR_QP,
3446427c1e7bSmajd@mellanox.com 		},
3447427c1e7bSmajd@mellanox.com 		[MLX5_QP_STATE_SQER] = {
3448427c1e7bSmajd@mellanox.com 			[MLX5_QP_STATE_RST]	= MLX5_CMD_OP_2RST_QP,
3449427c1e7bSmajd@mellanox.com 			[MLX5_QP_STATE_ERR]	= MLX5_CMD_OP_2ERR_QP,
3450427c1e7bSmajd@mellanox.com 			[MLX5_QP_STATE_RTS]	= MLX5_CMD_OP_SQERR2RTS_QP,
3451427c1e7bSmajd@mellanox.com 		},
3452427c1e7bSmajd@mellanox.com 		[MLX5_QP_STATE_ERR] = {
3453427c1e7bSmajd@mellanox.com 			[MLX5_QP_STATE_RST]	= MLX5_CMD_OP_2RST_QP,
3454427c1e7bSmajd@mellanox.com 			[MLX5_QP_STATE_ERR]	= MLX5_CMD_OP_2ERR_QP,
3455427c1e7bSmajd@mellanox.com 		}
3456427c1e7bSmajd@mellanox.com 	};
3457427c1e7bSmajd@mellanox.com 
3458e126ba97SEli Cohen 	struct mlx5_ib_dev *dev = to_mdev(ibqp->device);
3459e126ba97SEli Cohen 	struct mlx5_ib_qp *qp = to_mqp(ibqp);
346019098df2Smajd@mellanox.com 	struct mlx5_ib_qp_base *base = &qp->trans_qp.base;
3461e126ba97SEli Cohen 	struct mlx5_ib_cq *send_cq, *recv_cq;
3462e126ba97SEli Cohen 	struct mlx5_qp_context *context;
3463e126ba97SEli Cohen 	struct mlx5_ib_pd *pd;
3464e126ba97SEli Cohen 	enum mlx5_qp_state mlx5_cur, mlx5_new;
3465e126ba97SEli Cohen 	enum mlx5_qp_optpar optpar;
3466d14133ddSMark Zhang 	u32 set_id = 0;
3467e126ba97SEli Cohen 	int mlx5_st;
3468e126ba97SEli Cohen 	int err;
3469427c1e7bSmajd@mellanox.com 	u16 op;
347013eab21fSAviv Heller 	u8 tx_affinity = 0;
3471e126ba97SEli Cohen 
347255de9a77SLeon Romanovsky 	mlx5_st = to_mlx5_st(ibqp->qp_type == IB_QPT_DRIVER ?
347355de9a77SLeon Romanovsky 			     qp->qp_sub_type : ibqp->qp_type);
347455de9a77SLeon Romanovsky 	if (mlx5_st < 0)
347555de9a77SLeon Romanovsky 		return -EINVAL;
347655de9a77SLeon Romanovsky 
34771a412fb1SSaeed Mahameed 	context = kzalloc(sizeof(*context), GFP_KERNEL);
34781a412fb1SSaeed Mahameed 	if (!context)
3479e126ba97SEli Cohen 		return -ENOMEM;
3480e126ba97SEli Cohen 
3481c6a21c38SMajd Dibbiny 	pd = get_pd(qp);
348255de9a77SLeon Romanovsky 	context->flags = cpu_to_be32(mlx5_st << 16);
3483e126ba97SEli Cohen 
3484e126ba97SEli Cohen 	if (!(attr_mask & IB_QP_PATH_MIG_STATE)) {
3485e126ba97SEli Cohen 		context->flags |= cpu_to_be32(MLX5_QP_PM_MIGRATED << 11);
3486e126ba97SEli Cohen 	} else {
3487e126ba97SEli Cohen 		switch (attr->path_mig_state) {
3488e126ba97SEli Cohen 		case IB_MIG_MIGRATED:
3489e126ba97SEli Cohen 			context->flags |= cpu_to_be32(MLX5_QP_PM_MIGRATED << 11);
3490e126ba97SEli Cohen 			break;
3491e126ba97SEli Cohen 		case IB_MIG_REARM:
3492e126ba97SEli Cohen 			context->flags |= cpu_to_be32(MLX5_QP_PM_REARM << 11);
3493e126ba97SEli Cohen 			break;
3494e126ba97SEli Cohen 		case IB_MIG_ARMED:
3495e126ba97SEli Cohen 			context->flags |= cpu_to_be32(MLX5_QP_PM_ARMED << 11);
3496e126ba97SEli Cohen 			break;
3497e126ba97SEli Cohen 		}
3498e126ba97SEli Cohen 	}
3499e126ba97SEli Cohen 
350013eab21fSAviv Heller 	if ((cur_state == IB_QPS_RESET) && (new_state == IB_QPS_INIT)) {
350113eab21fSAviv Heller 		if ((ibqp->qp_type == IB_QPT_RC) ||
350213eab21fSAviv Heller 		    (ibqp->qp_type == IB_QPT_UD &&
350313eab21fSAviv Heller 		     !(qp->flags & MLX5_IB_QP_SQPN_QP1)) ||
350413eab21fSAviv Heller 		    (ibqp->qp_type == IB_QPT_UC) ||
350513eab21fSAviv Heller 		    (ibqp->qp_type == IB_QPT_RAW_PACKET) ||
350613eab21fSAviv Heller 		    (ibqp->qp_type == IB_QPT_XRC_INI) ||
350713eab21fSAviv Heller 		    (ibqp->qp_type == IB_QPT_XRC_TGT)) {
35087c34ec19SAviv Heller 			if (dev->lag_active) {
350995579e78SMark Bloch 				u8 p = mlx5_core_native_port_num(dev->mdev) - 1;
351089944450SShamir Rabinovitch 				tx_affinity = get_tx_affinity(dev, pd, base, p,
351189944450SShamir Rabinovitch 							      udata);
351213eab21fSAviv Heller 				context->flags |= cpu_to_be32(tx_affinity << 24);
351313eab21fSAviv Heller 			}
351413eab21fSAviv Heller 		}
351513eab21fSAviv Heller 	}
351613eab21fSAviv Heller 
3517d16e91daSHaggai Eran 	if (is_sqp(ibqp->qp_type)) {
3518e126ba97SEli Cohen 		context->mtu_msgmax = (IB_MTU_256 << 5) | 8;
3519c2e53b2cSYishai Hadas 	} else if ((ibqp->qp_type == IB_QPT_UD &&
3520c2e53b2cSYishai Hadas 		    !(qp->flags & MLX5_IB_QP_UNDERLAY)) ||
3521e126ba97SEli Cohen 		   ibqp->qp_type == MLX5_IB_QPT_REG_UMR) {
3522e126ba97SEli Cohen 		context->mtu_msgmax = (IB_MTU_4096 << 5) | 12;
3523e126ba97SEli Cohen 	} else if (attr_mask & IB_QP_PATH_MTU) {
3524e126ba97SEli Cohen 		if (attr->path_mtu < IB_MTU_256 ||
3525e126ba97SEli Cohen 		    attr->path_mtu > IB_MTU_4096) {
3526e126ba97SEli Cohen 			mlx5_ib_warn(dev, "invalid mtu %d\n", attr->path_mtu);
3527e126ba97SEli Cohen 			err = -EINVAL;
3528e126ba97SEli Cohen 			goto out;
3529e126ba97SEli Cohen 		}
3530938fe83cSSaeed Mahameed 		context->mtu_msgmax = (attr->path_mtu << 5) |
3531938fe83cSSaeed Mahameed 				      (u8)MLX5_CAP_GEN(dev->mdev, log_max_msg);
3532e126ba97SEli Cohen 	}
3533e126ba97SEli Cohen 
3534e126ba97SEli Cohen 	if (attr_mask & IB_QP_DEST_QPN)
3535e126ba97SEli Cohen 		context->log_pg_sz_remote_qpn = cpu_to_be32(attr->dest_qp_num);
3536e126ba97SEli Cohen 
3537e126ba97SEli Cohen 	if (attr_mask & IB_QP_PKEY_INDEX)
3538d3ae2bdeSNoa Osherovich 		context->pri_path.pkey_index = cpu_to_be16(attr->pkey_index);
3539e126ba97SEli Cohen 
3540e126ba97SEli Cohen 	/* todo implement counter_index functionality */
3541e126ba97SEli Cohen 
3542e126ba97SEli Cohen 	if (is_sqp(ibqp->qp_type))
3543e126ba97SEli Cohen 		context->pri_path.port = qp->port;
3544e126ba97SEli Cohen 
3545e126ba97SEli Cohen 	if (attr_mask & IB_QP_PORT)
3546e126ba97SEli Cohen 		context->pri_path.port = attr->port_num;
3547e126ba97SEli Cohen 
3548e126ba97SEli Cohen 	if (attr_mask & IB_QP_AV) {
354975850d0bSmajd@mellanox.com 		err = mlx5_set_path(dev, qp, &attr->ah_attr, &context->pri_path,
3550e126ba97SEli Cohen 				    attr_mask & IB_QP_PORT ? attr->port_num : qp->port,
3551f879ee8dSAchiad Shochat 				    attr_mask, 0, attr, false);
3552e126ba97SEli Cohen 		if (err)
3553e126ba97SEli Cohen 			goto out;
3554e126ba97SEli Cohen 	}
3555e126ba97SEli Cohen 
3556e126ba97SEli Cohen 	if (attr_mask & IB_QP_TIMEOUT)
3557e126ba97SEli Cohen 		context->pri_path.ackto_lt |= attr->timeout << 3;
3558e126ba97SEli Cohen 
3559e126ba97SEli Cohen 	if (attr_mask & IB_QP_ALT_PATH) {
356075850d0bSmajd@mellanox.com 		err = mlx5_set_path(dev, qp, &attr->alt_ah_attr,
356175850d0bSmajd@mellanox.com 				    &context->alt_path,
3562f879ee8dSAchiad Shochat 				    attr->alt_port_num,
3563f879ee8dSAchiad Shochat 				    attr_mask | IB_QP_PKEY_INDEX | IB_QP_TIMEOUT,
3564f879ee8dSAchiad Shochat 				    0, attr, true);
3565e126ba97SEli Cohen 		if (err)
3566e126ba97SEli Cohen 			goto out;
3567e126ba97SEli Cohen 	}
3568e126ba97SEli Cohen 
356989ea94a7SMaor Gottlieb 	get_cqs(qp->ibqp.qp_type, qp->ibqp.send_cq, qp->ibqp.recv_cq,
357089ea94a7SMaor Gottlieb 		&send_cq, &recv_cq);
3571e126ba97SEli Cohen 
3572e126ba97SEli Cohen 	context->flags_pd = cpu_to_be32(pd ? pd->pdn : to_mpd(dev->devr.p0)->pdn);
3573e126ba97SEli Cohen 	context->cqn_send = send_cq ? cpu_to_be32(send_cq->mcq.cqn) : 0;
3574e126ba97SEli Cohen 	context->cqn_recv = recv_cq ? cpu_to_be32(recv_cq->mcq.cqn) : 0;
3575e126ba97SEli Cohen 	context->params1  = cpu_to_be32(MLX5_IB_ACK_REQ_FREQ << 28);
3576e126ba97SEli Cohen 
3577e126ba97SEli Cohen 	if (attr_mask & IB_QP_RNR_RETRY)
3578e126ba97SEli Cohen 		context->params1 |= cpu_to_be32(attr->rnr_retry << 13);
3579e126ba97SEli Cohen 
3580e126ba97SEli Cohen 	if (attr_mask & IB_QP_RETRY_CNT)
3581e126ba97SEli Cohen 		context->params1 |= cpu_to_be32(attr->retry_cnt << 16);
3582e126ba97SEli Cohen 
3583e126ba97SEli Cohen 	if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC) {
3584e126ba97SEli Cohen 		if (attr->max_rd_atomic)
3585e126ba97SEli Cohen 			context->params1 |=
3586e126ba97SEli Cohen 				cpu_to_be32(fls(attr->max_rd_atomic - 1) << 21);
3587e126ba97SEli Cohen 	}
3588e126ba97SEli Cohen 
3589e126ba97SEli Cohen 	if (attr_mask & IB_QP_SQ_PSN)
3590e126ba97SEli Cohen 		context->next_send_psn = cpu_to_be32(attr->sq_psn);
3591e126ba97SEli Cohen 
3592e126ba97SEli Cohen 	if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) {
3593e126ba97SEli Cohen 		if (attr->max_dest_rd_atomic)
3594e126ba97SEli Cohen 			context->params2 |=
3595e126ba97SEli Cohen 				cpu_to_be32(fls(attr->max_dest_rd_atomic - 1) << 21);
3596e126ba97SEli Cohen 	}
3597e126ba97SEli Cohen 
3598a60109dcSYonatan Cohen 	if (attr_mask & (IB_QP_ACCESS_FLAGS | IB_QP_MAX_DEST_RD_ATOMIC)) {
3599bf3b4f06SBart Van Assche 		__be32 access_flags;
3600a60109dcSYonatan Cohen 
3601a60109dcSYonatan Cohen 		err = to_mlx5_access_flags(qp, attr, attr_mask, &access_flags);
3602a60109dcSYonatan Cohen 		if (err)
3603a60109dcSYonatan Cohen 			goto out;
3604a60109dcSYonatan Cohen 
3605a60109dcSYonatan Cohen 		context->params2 |= access_flags;
3606a60109dcSYonatan Cohen 	}
3607e126ba97SEli Cohen 
3608e126ba97SEli Cohen 	if (attr_mask & IB_QP_MIN_RNR_TIMER)
3609e126ba97SEli Cohen 		context->rnr_nextrecvpsn |= cpu_to_be32(attr->min_rnr_timer << 24);
3610e126ba97SEli Cohen 
3611e126ba97SEli Cohen 	if (attr_mask & IB_QP_RQ_PSN)
3612e126ba97SEli Cohen 		context->rnr_nextrecvpsn |= cpu_to_be32(attr->rq_psn);
3613e126ba97SEli Cohen 
3614e126ba97SEli Cohen 	if (attr_mask & IB_QP_QKEY)
3615e126ba97SEli Cohen 		context->qkey = cpu_to_be32(attr->qkey);
3616e126ba97SEli Cohen 
3617e126ba97SEli Cohen 	if (qp->rq.wqe_cnt && cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT)
3618e126ba97SEli Cohen 		context->db_rec_addr = cpu_to_be64(qp->db.dma);
3619e126ba97SEli Cohen 
36200837e86aSMark Bloch 	if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) {
36210837e86aSMark Bloch 		u8 port_num = (attr_mask & IB_QP_PORT ? attr->port_num :
36220837e86aSMark Bloch 			       qp->port) - 1;
3623c2e53b2cSYishai Hadas 
3624c2e53b2cSYishai Hadas 		/* Underlay port should be used - index 0 function per port */
3625c2e53b2cSYishai Hadas 		if (qp->flags & MLX5_IB_QP_UNDERLAY)
3626c2e53b2cSYishai Hadas 			port_num = 0;
3627c2e53b2cSYishai Hadas 
3628d14133ddSMark Zhang 		if (ibqp->counter)
3629d14133ddSMark Zhang 			set_id = ibqp->counter->id;
3630d14133ddSMark Zhang 		else
36313e1f000fSParav Pandit 			set_id = mlx5_ib_get_counters_id(dev, port_num);
36320837e86aSMark Bloch 		context->qp_counter_set_usr_page |=
3633d14133ddSMark Zhang 			cpu_to_be32(set_id << 24);
36340837e86aSMark Bloch 	}
36350837e86aSMark Bloch 
3636e126ba97SEli Cohen 	if (!ibqp->uobject && cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT)
3637e126ba97SEli Cohen 		context->sq_crq_size |= cpu_to_be16(1 << 4);
3638e126ba97SEli Cohen 
3639b11a4f9cSHaggai Eran 	if (qp->flags & MLX5_IB_QP_SQPN_QP1)
3640b11a4f9cSHaggai Eran 		context->deth_sqpn = cpu_to_be32(1);
3641e126ba97SEli Cohen 
3642e126ba97SEli Cohen 	mlx5_cur = to_mlx5_state(cur_state);
3643e126ba97SEli Cohen 	mlx5_new = to_mlx5_state(new_state);
3644e126ba97SEli Cohen 
3645427c1e7bSmajd@mellanox.com 	if (mlx5_cur >= MLX5_QP_NUM_STATE || mlx5_new >= MLX5_QP_NUM_STATE ||
36465d414b17SDan Carpenter 	    !optab[mlx5_cur][mlx5_new]) {
36475d414b17SDan Carpenter 		err = -EINVAL;
3648427c1e7bSmajd@mellanox.com 		goto out;
36495d414b17SDan Carpenter 	}
3650427c1e7bSmajd@mellanox.com 
3651427c1e7bSmajd@mellanox.com 	op = optab[mlx5_cur][mlx5_new];
3652e126ba97SEli Cohen 	optpar = ib_mask_to_mlx5_opt(attr_mask);
3653e126ba97SEli Cohen 	optpar &= opt_mask[mlx5_cur][mlx5_new][mlx5_st];
3654ad5f8e96Smajd@mellanox.com 
3655c2e53b2cSYishai Hadas 	if (qp->ibqp.qp_type == IB_QPT_RAW_PACKET ||
3656c2e53b2cSYishai Hadas 	    qp->flags & MLX5_IB_QP_UNDERLAY) {
36570680efa2SAlex Vesker 		struct mlx5_modify_raw_qp_param raw_qp_param = {};
36580680efa2SAlex Vesker 
36590680efa2SAlex Vesker 		raw_qp_param.operation = op;
3660eb49ab0cSAlex Vesker 		if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) {
3661d14133ddSMark Zhang 			raw_qp_param.rq_q_ctr_id = set_id;
3662eb49ab0cSAlex Vesker 			raw_qp_param.set_mask |= MLX5_RAW_QP_MOD_SET_RQ_Q_CTR_ID;
3663eb49ab0cSAlex Vesker 		}
36647d29f349SBodong Wang 
3665d5ed8ac3SMark Bloch 		if (attr_mask & IB_QP_PORT)
3666d5ed8ac3SMark Bloch 			raw_qp_param.port = attr->port_num;
3667d5ed8ac3SMark Bloch 
36687d29f349SBodong Wang 		if (attr_mask & IB_QP_RATE_LIMIT) {
366961147f39SBodong Wang 			raw_qp_param.rl.rate = attr->rate_limit;
367061147f39SBodong Wang 
367161147f39SBodong Wang 			if (ucmd->burst_info.max_burst_sz) {
367261147f39SBodong Wang 				if (attr->rate_limit &&
367361147f39SBodong Wang 				    MLX5_CAP_QOS(dev->mdev, packet_pacing_burst_bound)) {
367461147f39SBodong Wang 					raw_qp_param.rl.max_burst_sz =
367561147f39SBodong Wang 						ucmd->burst_info.max_burst_sz;
367661147f39SBodong Wang 				} else {
367761147f39SBodong Wang 					err = -EINVAL;
367861147f39SBodong Wang 					goto out;
367961147f39SBodong Wang 				}
368061147f39SBodong Wang 			}
368161147f39SBodong Wang 
368261147f39SBodong Wang 			if (ucmd->burst_info.typical_pkt_sz) {
368361147f39SBodong Wang 				if (attr->rate_limit &&
368461147f39SBodong Wang 				    MLX5_CAP_QOS(dev->mdev, packet_pacing_typical_size)) {
368561147f39SBodong Wang 					raw_qp_param.rl.typical_pkt_sz =
368661147f39SBodong Wang 						ucmd->burst_info.typical_pkt_sz;
368761147f39SBodong Wang 				} else {
368861147f39SBodong Wang 					err = -EINVAL;
368961147f39SBodong Wang 					goto out;
369061147f39SBodong Wang 				}
369161147f39SBodong Wang 			}
369261147f39SBodong Wang 
36937d29f349SBodong Wang 			raw_qp_param.set_mask |= MLX5_RAW_QP_RATE_LIMIT;
36947d29f349SBodong Wang 		}
36957d29f349SBodong Wang 
369613eab21fSAviv Heller 		err = modify_raw_packet_qp(dev, qp, &raw_qp_param, tx_affinity);
36970680efa2SAlex Vesker 	} else {
36981a412fb1SSaeed Mahameed 		err = mlx5_core_qp_modify(dev->mdev, op, optpar, context,
369919098df2Smajd@mellanox.com 					  &base->mqp);
37000680efa2SAlex Vesker 	}
37010680efa2SAlex Vesker 
3702e126ba97SEli Cohen 	if (err)
3703e126ba97SEli Cohen 		goto out;
3704e126ba97SEli Cohen 
3705e126ba97SEli Cohen 	qp->state = new_state;
3706e126ba97SEli Cohen 
3707e126ba97SEli Cohen 	if (attr_mask & IB_QP_ACCESS_FLAGS)
370819098df2Smajd@mellanox.com 		qp->trans_qp.atomic_rd_en = attr->qp_access_flags;
3709e126ba97SEli Cohen 	if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC)
371019098df2Smajd@mellanox.com 		qp->trans_qp.resp_depth = attr->max_dest_rd_atomic;
3711e126ba97SEli Cohen 	if (attr_mask & IB_QP_PORT)
3712e126ba97SEli Cohen 		qp->port = attr->port_num;
3713e126ba97SEli Cohen 	if (attr_mask & IB_QP_ALT_PATH)
371419098df2Smajd@mellanox.com 		qp->trans_qp.alt_port = attr->alt_port_num;
3715e126ba97SEli Cohen 
3716e126ba97SEli Cohen 	/*
3717e126ba97SEli Cohen 	 * If we moved a kernel QP to RESET, clean up all old CQ
3718e126ba97SEli Cohen 	 * entries and reinitialize the QP.
3719e126ba97SEli Cohen 	 */
372075a45982SLeon Romanovsky 	if (new_state == IB_QPS_RESET &&
372175a45982SLeon Romanovsky 	    !ibqp->uobject && ibqp->qp_type != IB_QPT_XRC_TGT) {
372219098df2Smajd@mellanox.com 		mlx5_ib_cq_clean(recv_cq, base->mqp.qpn,
3723e126ba97SEli Cohen 				 ibqp->srq ? to_msrq(ibqp->srq) : NULL);
3724e126ba97SEli Cohen 		if (send_cq != recv_cq)
372519098df2Smajd@mellanox.com 			mlx5_ib_cq_clean(send_cq, base->mqp.qpn, NULL);
3726e126ba97SEli Cohen 
3727e126ba97SEli Cohen 		qp->rq.head = 0;
3728e126ba97SEli Cohen 		qp->rq.tail = 0;
3729e126ba97SEli Cohen 		qp->sq.head = 0;
3730e126ba97SEli Cohen 		qp->sq.tail = 0;
3731e126ba97SEli Cohen 		qp->sq.cur_post = 0;
373234f4c955SGuy Levi 		if (qp->sq.wqe_cnt)
373334f4c955SGuy Levi 			qp->sq.cur_edge = get_sq_edge(&qp->sq, 0);
3734e126ba97SEli Cohen 		qp->db.db[MLX5_RCV_DBR] = 0;
3735e126ba97SEli Cohen 		qp->db.db[MLX5_SND_DBR] = 0;
3736e126ba97SEli Cohen 	}
3737e126ba97SEli Cohen 
3738d14133ddSMark Zhang 	if ((new_state == IB_QPS_RTS) && qp->counter_pending) {
3739d14133ddSMark Zhang 		err = __mlx5_ib_qp_set_counter(ibqp, ibqp->counter);
3740d14133ddSMark Zhang 		if (!err)
3741d14133ddSMark Zhang 			qp->counter_pending = 0;
3742d14133ddSMark Zhang 	}
3743d14133ddSMark Zhang 
3744e126ba97SEli Cohen out:
37451a412fb1SSaeed Mahameed 	kfree(context);
3746e126ba97SEli Cohen 	return err;
3747e126ba97SEli Cohen }
3748e126ba97SEli Cohen 
3749c32a4f29SMoni Shoua static inline bool is_valid_mask(int mask, int req, int opt)
3750c32a4f29SMoni Shoua {
3751c32a4f29SMoni Shoua 	if ((mask & req) != req)
3752c32a4f29SMoni Shoua 		return false;
3753c32a4f29SMoni Shoua 
3754c32a4f29SMoni Shoua 	if (mask & ~(req | opt))
3755c32a4f29SMoni Shoua 		return false;
3756c32a4f29SMoni Shoua 
3757c32a4f29SMoni Shoua 	return true;
3758c32a4f29SMoni Shoua }
3759c32a4f29SMoni Shoua 
3760c32a4f29SMoni Shoua /* check valid transition for driver QP types
3761c32a4f29SMoni Shoua  * for now the only QP type that this function supports is DCI
3762c32a4f29SMoni Shoua  */
3763c32a4f29SMoni Shoua static bool modify_dci_qp_is_ok(enum ib_qp_state cur_state, enum ib_qp_state new_state,
3764c32a4f29SMoni Shoua 				enum ib_qp_attr_mask attr_mask)
3765c32a4f29SMoni Shoua {
3766c32a4f29SMoni Shoua 	int req = IB_QP_STATE;
3767c32a4f29SMoni Shoua 	int opt = 0;
3768c32a4f29SMoni Shoua 
376999ed748eSMoni Shoua 	if (new_state == IB_QPS_RESET) {
377099ed748eSMoni Shoua 		return is_valid_mask(attr_mask, req, opt);
377199ed748eSMoni Shoua 	} else if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) {
3772c32a4f29SMoni Shoua 		req |= IB_QP_PKEY_INDEX | IB_QP_PORT;
3773c32a4f29SMoni Shoua 		return is_valid_mask(attr_mask, req, opt);
3774c32a4f29SMoni Shoua 	} else if (cur_state == IB_QPS_INIT && new_state == IB_QPS_INIT) {
3775c32a4f29SMoni Shoua 		opt = IB_QP_PKEY_INDEX | IB_QP_PORT;
3776c32a4f29SMoni Shoua 		return is_valid_mask(attr_mask, req, opt);
3777c32a4f29SMoni Shoua 	} else if (cur_state == IB_QPS_INIT && new_state == IB_QPS_RTR) {
3778c32a4f29SMoni Shoua 		req |= IB_QP_PATH_MTU;
37795ec0304cSArtemy Kovalyov 		opt = IB_QP_PKEY_INDEX | IB_QP_AV;
3780c32a4f29SMoni Shoua 		return is_valid_mask(attr_mask, req, opt);
3781c32a4f29SMoni Shoua 	} else if (cur_state == IB_QPS_RTR && new_state == IB_QPS_RTS) {
3782c32a4f29SMoni Shoua 		req |= IB_QP_TIMEOUT | IB_QP_RETRY_CNT | IB_QP_RNR_RETRY |
3783c32a4f29SMoni Shoua 		       IB_QP_MAX_QP_RD_ATOMIC | IB_QP_SQ_PSN;
3784c32a4f29SMoni Shoua 		opt = IB_QP_MIN_RNR_TIMER;
3785c32a4f29SMoni Shoua 		return is_valid_mask(attr_mask, req, opt);
3786c32a4f29SMoni Shoua 	} else if (cur_state == IB_QPS_RTS && new_state == IB_QPS_RTS) {
3787c32a4f29SMoni Shoua 		opt = IB_QP_MIN_RNR_TIMER;
3788c32a4f29SMoni Shoua 		return is_valid_mask(attr_mask, req, opt);
3789c32a4f29SMoni Shoua 	} else if (cur_state != IB_QPS_RESET && new_state == IB_QPS_ERR) {
3790c32a4f29SMoni Shoua 		return is_valid_mask(attr_mask, req, opt);
3791c32a4f29SMoni Shoua 	}
3792c32a4f29SMoni Shoua 	return false;
3793c32a4f29SMoni Shoua }
3794c32a4f29SMoni Shoua 
3795776a3906SMoni Shoua /* mlx5_ib_modify_dct: modify a DCT QP
3796776a3906SMoni Shoua  * valid transitions are:
3797776a3906SMoni Shoua  * RESET to INIT: must set access_flags, pkey_index and port
3798776a3906SMoni Shoua  * INIT  to RTR : must set min_rnr_timer, tclass, flow_label,
3799776a3906SMoni Shoua  *			   mtu, gid_index and hop_limit
3800776a3906SMoni Shoua  * Other transitions and attributes are illegal
3801776a3906SMoni Shoua  */
3802776a3906SMoni Shoua static int mlx5_ib_modify_dct(struct ib_qp *ibqp, struct ib_qp_attr *attr,
3803776a3906SMoni Shoua 			      int attr_mask, struct ib_udata *udata)
3804776a3906SMoni Shoua {
3805776a3906SMoni Shoua 	struct mlx5_ib_qp *qp = to_mqp(ibqp);
3806776a3906SMoni Shoua 	struct mlx5_ib_dev *dev = to_mdev(ibqp->device);
3807776a3906SMoni Shoua 	enum ib_qp_state cur_state, new_state;
3808776a3906SMoni Shoua 	int err = 0;
3809776a3906SMoni Shoua 	int required = IB_QP_STATE;
3810776a3906SMoni Shoua 	void *dctc;
3811776a3906SMoni Shoua 
3812776a3906SMoni Shoua 	if (!(attr_mask & IB_QP_STATE))
3813776a3906SMoni Shoua 		return -EINVAL;
3814776a3906SMoni Shoua 
3815776a3906SMoni Shoua 	cur_state = qp->state;
3816776a3906SMoni Shoua 	new_state = attr->qp_state;
3817776a3906SMoni Shoua 
3818776a3906SMoni Shoua 	dctc = MLX5_ADDR_OF(create_dct_in, qp->dct.in, dct_context_entry);
3819776a3906SMoni Shoua 	if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) {
38203e1f000fSParav Pandit 		u16 set_id;
38213e1f000fSParav Pandit 
3822776a3906SMoni Shoua 		required |= IB_QP_ACCESS_FLAGS | IB_QP_PKEY_INDEX | IB_QP_PORT;
3823776a3906SMoni Shoua 		if (!is_valid_mask(attr_mask, required, 0))
3824776a3906SMoni Shoua 			return -EINVAL;
3825776a3906SMoni Shoua 
3826776a3906SMoni Shoua 		if (attr->port_num == 0 ||
3827776a3906SMoni Shoua 		    attr->port_num > MLX5_CAP_GEN(dev->mdev, num_ports)) {
3828776a3906SMoni Shoua 			mlx5_ib_dbg(dev, "invalid port number %d. number of ports is %d\n",
3829776a3906SMoni Shoua 				    attr->port_num, dev->num_ports);
3830776a3906SMoni Shoua 			return -EINVAL;
3831776a3906SMoni Shoua 		}
3832776a3906SMoni Shoua 		if (attr->qp_access_flags & IB_ACCESS_REMOTE_READ)
3833776a3906SMoni Shoua 			MLX5_SET(dctc, dctc, rre, 1);
3834776a3906SMoni Shoua 		if (attr->qp_access_flags & IB_ACCESS_REMOTE_WRITE)
3835776a3906SMoni Shoua 			MLX5_SET(dctc, dctc, rwe, 1);
3836776a3906SMoni Shoua 		if (attr->qp_access_flags & IB_ACCESS_REMOTE_ATOMIC) {
3837a60109dcSYonatan Cohen 			int atomic_mode;
3838a60109dcSYonatan Cohen 
3839a60109dcSYonatan Cohen 			atomic_mode = get_atomic_mode(dev, MLX5_IB_QPT_DCT);
3840a60109dcSYonatan Cohen 			if (atomic_mode < 0)
3841776a3906SMoni Shoua 				return -EOPNOTSUPP;
3842a60109dcSYonatan Cohen 
3843a60109dcSYonatan Cohen 			MLX5_SET(dctc, dctc, atomic_mode, atomic_mode);
3844776a3906SMoni Shoua 			MLX5_SET(dctc, dctc, rae, 1);
3845776a3906SMoni Shoua 		}
3846776a3906SMoni Shoua 		MLX5_SET(dctc, dctc, pkey_index, attr->pkey_index);
3847776a3906SMoni Shoua 		MLX5_SET(dctc, dctc, port, attr->port_num);
38483e1f000fSParav Pandit 
38493e1f000fSParav Pandit 		set_id = mlx5_ib_get_counters_id(dev, attr->port_num - 1);
38503e1f000fSParav Pandit 		MLX5_SET(dctc, dctc, counter_set_id, set_id);
3851776a3906SMoni Shoua 
3852776a3906SMoni Shoua 	} else if (cur_state == IB_QPS_INIT && new_state == IB_QPS_RTR) {
3853776a3906SMoni Shoua 		struct mlx5_ib_modify_qp_resp resp = {};
3854c5ae1954SYishai Hadas 		u32 out[MLX5_ST_SZ_DW(create_dct_out)] = {0};
3855776a3906SMoni Shoua 		u32 min_resp_len = offsetof(typeof(resp), dctn) +
3856776a3906SMoni Shoua 				   sizeof(resp.dctn);
3857776a3906SMoni Shoua 
3858776a3906SMoni Shoua 		if (udata->outlen < min_resp_len)
3859776a3906SMoni Shoua 			return -EINVAL;
3860776a3906SMoni Shoua 		resp.response_length = min_resp_len;
3861776a3906SMoni Shoua 
3862776a3906SMoni Shoua 		required |= IB_QP_MIN_RNR_TIMER | IB_QP_AV | IB_QP_PATH_MTU;
3863776a3906SMoni Shoua 		if (!is_valid_mask(attr_mask, required, 0))
3864776a3906SMoni Shoua 			return -EINVAL;
3865776a3906SMoni Shoua 		MLX5_SET(dctc, dctc, min_rnr_nak, attr->min_rnr_timer);
3866776a3906SMoni Shoua 		MLX5_SET(dctc, dctc, tclass, attr->ah_attr.grh.traffic_class);
3867776a3906SMoni Shoua 		MLX5_SET(dctc, dctc, flow_label, attr->ah_attr.grh.flow_label);
3868776a3906SMoni Shoua 		MLX5_SET(dctc, dctc, mtu, attr->path_mtu);
3869776a3906SMoni Shoua 		MLX5_SET(dctc, dctc, my_addr_index, attr->ah_attr.grh.sgid_index);
3870776a3906SMoni Shoua 		MLX5_SET(dctc, dctc, hop_limit, attr->ah_attr.grh.hop_limit);
3871776a3906SMoni Shoua 
3872776a3906SMoni Shoua 		err = mlx5_core_create_dct(dev->mdev, &qp->dct.mdct, qp->dct.in,
3873c5ae1954SYishai Hadas 					   MLX5_ST_SZ_BYTES(create_dct_in), out,
3874c5ae1954SYishai Hadas 					   sizeof(out));
3875776a3906SMoni Shoua 		if (err)
3876776a3906SMoni Shoua 			return err;
3877776a3906SMoni Shoua 		resp.dctn = qp->dct.mdct.mqp.qpn;
3878776a3906SMoni Shoua 		err = ib_copy_to_udata(udata, &resp, resp.response_length);
3879776a3906SMoni Shoua 		if (err) {
3880776a3906SMoni Shoua 			mlx5_core_destroy_dct(dev->mdev, &qp->dct.mdct);
3881776a3906SMoni Shoua 			return err;
3882776a3906SMoni Shoua 		}
3883776a3906SMoni Shoua 	} else {
3884776a3906SMoni Shoua 		mlx5_ib_warn(dev, "Modify DCT: Invalid transition from %d to %d\n", cur_state, new_state);
3885776a3906SMoni Shoua 		return -EINVAL;
3886776a3906SMoni Shoua 	}
3887776a3906SMoni Shoua 	if (err)
3888776a3906SMoni Shoua 		qp->state = IB_QPS_ERR;
3889776a3906SMoni Shoua 	else
3890776a3906SMoni Shoua 		qp->state = new_state;
3891776a3906SMoni Shoua 	return err;
3892776a3906SMoni Shoua }
3893776a3906SMoni Shoua 
3894e126ba97SEli Cohen int mlx5_ib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
3895e126ba97SEli Cohen 		      int attr_mask, struct ib_udata *udata)
3896e126ba97SEli Cohen {
3897e126ba97SEli Cohen 	struct mlx5_ib_dev *dev = to_mdev(ibqp->device);
3898e126ba97SEli Cohen 	struct mlx5_ib_qp *qp = to_mqp(ibqp);
389961147f39SBodong Wang 	struct mlx5_ib_modify_qp ucmd = {};
3900d16e91daSHaggai Eran 	enum ib_qp_type qp_type;
3901e126ba97SEli Cohen 	enum ib_qp_state cur_state, new_state;
390261147f39SBodong Wang 	size_t required_cmd_sz;
3903e126ba97SEli Cohen 	int err = -EINVAL;
3904e126ba97SEli Cohen 	int port;
3905e126ba97SEli Cohen 
390628d61370SYishai Hadas 	if (ibqp->rwq_ind_tbl)
390728d61370SYishai Hadas 		return -ENOSYS;
390828d61370SYishai Hadas 
390961147f39SBodong Wang 	if (udata && udata->inlen) {
391061147f39SBodong Wang 		required_cmd_sz = offsetof(typeof(ucmd), reserved) +
391161147f39SBodong Wang 			sizeof(ucmd.reserved);
391261147f39SBodong Wang 		if (udata->inlen < required_cmd_sz)
391361147f39SBodong Wang 			return -EINVAL;
391461147f39SBodong Wang 
391561147f39SBodong Wang 		if (udata->inlen > sizeof(ucmd) &&
391661147f39SBodong Wang 		    !ib_is_udata_cleared(udata, sizeof(ucmd),
391761147f39SBodong Wang 					 udata->inlen - sizeof(ucmd)))
391861147f39SBodong Wang 			return -EOPNOTSUPP;
391961147f39SBodong Wang 
392061147f39SBodong Wang 		if (ib_copy_from_udata(&ucmd, udata,
392161147f39SBodong Wang 				       min(udata->inlen, sizeof(ucmd))))
392261147f39SBodong Wang 			return -EFAULT;
392361147f39SBodong Wang 
392461147f39SBodong Wang 		if (ucmd.comp_mask ||
392561147f39SBodong Wang 		    memchr_inv(&ucmd.reserved, 0, sizeof(ucmd.reserved)) ||
392661147f39SBodong Wang 		    memchr_inv(&ucmd.burst_info.reserved, 0,
392761147f39SBodong Wang 			       sizeof(ucmd.burst_info.reserved)))
392861147f39SBodong Wang 			return -EOPNOTSUPP;
392961147f39SBodong Wang 	}
393061147f39SBodong Wang 
3931d16e91daSHaggai Eran 	if (unlikely(ibqp->qp_type == IB_QPT_GSI))
3932d16e91daSHaggai Eran 		return mlx5_ib_gsi_modify_qp(ibqp, attr, attr_mask);
3933d16e91daSHaggai Eran 
3934c32a4f29SMoni Shoua 	if (ibqp->qp_type == IB_QPT_DRIVER)
3935c32a4f29SMoni Shoua 		qp_type = qp->qp_sub_type;
3936c32a4f29SMoni Shoua 	else
3937d16e91daSHaggai Eran 		qp_type = (unlikely(ibqp->qp_type == MLX5_IB_QPT_HW_GSI)) ?
3938d16e91daSHaggai Eran 			IB_QPT_GSI : ibqp->qp_type;
3939d16e91daSHaggai Eran 
3940776a3906SMoni Shoua 	if (qp_type == MLX5_IB_QPT_DCT)
3941776a3906SMoni Shoua 		return mlx5_ib_modify_dct(ibqp, attr, attr_mask, udata);
3942c32a4f29SMoni Shoua 
3943e126ba97SEli Cohen 	mutex_lock(&qp->mutex);
3944e126ba97SEli Cohen 
3945e126ba97SEli Cohen 	cur_state = attr_mask & IB_QP_CUR_STATE ? attr->cur_qp_state : qp->state;
3946e126ba97SEli Cohen 	new_state = attr_mask & IB_QP_STATE ? attr->qp_state : cur_state;
3947e126ba97SEli Cohen 
39482811ba51SAchiad Shochat 	if (!(cur_state == new_state && cur_state == IB_QPS_RESET)) {
39492811ba51SAchiad Shochat 		port = attr_mask & IB_QP_PORT ? attr->port_num : qp->port;
39502811ba51SAchiad Shochat 	}
39512811ba51SAchiad Shochat 
3952c2e53b2cSYishai Hadas 	if (qp->flags & MLX5_IB_QP_UNDERLAY) {
3953c2e53b2cSYishai Hadas 		if (attr_mask & ~(IB_QP_STATE | IB_QP_CUR_STATE)) {
3954c2e53b2cSYishai Hadas 			mlx5_ib_dbg(dev, "invalid attr_mask 0x%x when underlay QP is used\n",
3955c2e53b2cSYishai Hadas 				    attr_mask);
3956c2e53b2cSYishai Hadas 			goto out;
3957c2e53b2cSYishai Hadas 		}
3958c2e53b2cSYishai Hadas 	} else if (qp_type != MLX5_IB_QPT_REG_UMR &&
3959c32a4f29SMoni Shoua 		   qp_type != MLX5_IB_QPT_DCI &&
3960d31131bbSKamal Heib 		   !ib_modify_qp_is_ok(cur_state, new_state, qp_type,
3961d31131bbSKamal Heib 				       attr_mask)) {
3962158abf86SHaggai Eran 		mlx5_ib_dbg(dev, "invalid QP state transition from %d to %d, qp_type %d, attr_mask 0x%x\n",
3963158abf86SHaggai Eran 			    cur_state, new_state, ibqp->qp_type, attr_mask);
3964e126ba97SEli Cohen 		goto out;
3965c32a4f29SMoni Shoua 	} else if (qp_type == MLX5_IB_QPT_DCI &&
3966c32a4f29SMoni Shoua 		   !modify_dci_qp_is_ok(cur_state, new_state, attr_mask)) {
3967c32a4f29SMoni Shoua 		mlx5_ib_dbg(dev, "invalid QP state transition from %d to %d, qp_type %d, attr_mask 0x%x\n",
3968c32a4f29SMoni Shoua 			    cur_state, new_state, qp_type, attr_mask);
3969c32a4f29SMoni Shoua 		goto out;
3970158abf86SHaggai Eran 	}
3971e126ba97SEli Cohen 
3972e126ba97SEli Cohen 	if ((attr_mask & IB_QP_PORT) &&
3973938fe83cSSaeed Mahameed 	    (attr->port_num == 0 ||
3974508562d6SDaniel Jurgens 	     attr->port_num > dev->num_ports)) {
3975158abf86SHaggai Eran 		mlx5_ib_dbg(dev, "invalid port number %d. number of ports is %d\n",
3976158abf86SHaggai Eran 			    attr->port_num, dev->num_ports);
3977e126ba97SEli Cohen 		goto out;
3978158abf86SHaggai Eran 	}
3979e126ba97SEli Cohen 
3980e126ba97SEli Cohen 	if (attr_mask & IB_QP_PKEY_INDEX) {
3981e126ba97SEli Cohen 		port = attr_mask & IB_QP_PORT ? attr->port_num : qp->port;
3982938fe83cSSaeed Mahameed 		if (attr->pkey_index >=
3983158abf86SHaggai Eran 		    dev->mdev->port_caps[port - 1].pkey_table_len) {
3984158abf86SHaggai Eran 			mlx5_ib_dbg(dev, "invalid pkey index %d\n",
3985158abf86SHaggai Eran 				    attr->pkey_index);
3986e126ba97SEli Cohen 			goto out;
3987e126ba97SEli Cohen 		}
3988158abf86SHaggai Eran 	}
3989e126ba97SEli Cohen 
3990e126ba97SEli Cohen 	if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC &&
3991938fe83cSSaeed Mahameed 	    attr->max_rd_atomic >
3992158abf86SHaggai Eran 	    (1 << MLX5_CAP_GEN(dev->mdev, log_max_ra_res_qp))) {
3993158abf86SHaggai Eran 		mlx5_ib_dbg(dev, "invalid max_rd_atomic value %d\n",
3994158abf86SHaggai Eran 			    attr->max_rd_atomic);
3995e126ba97SEli Cohen 		goto out;
3996158abf86SHaggai Eran 	}
3997e126ba97SEli Cohen 
3998e126ba97SEli Cohen 	if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC &&
3999938fe83cSSaeed Mahameed 	    attr->max_dest_rd_atomic >
4000158abf86SHaggai Eran 	    (1 << MLX5_CAP_GEN(dev->mdev, log_max_ra_req_qp))) {
4001158abf86SHaggai Eran 		mlx5_ib_dbg(dev, "invalid max_dest_rd_atomic value %d\n",
4002158abf86SHaggai Eran 			    attr->max_dest_rd_atomic);
4003e126ba97SEli Cohen 		goto out;
4004158abf86SHaggai Eran 	}
4005e126ba97SEli Cohen 
4006e126ba97SEli Cohen 	if (cur_state == new_state && cur_state == IB_QPS_RESET) {
4007e126ba97SEli Cohen 		err = 0;
4008e126ba97SEli Cohen 		goto out;
4009e126ba97SEli Cohen 	}
4010e126ba97SEli Cohen 
401161147f39SBodong Wang 	err = __mlx5_ib_modify_qp(ibqp, attr, attr_mask, cur_state,
401289944450SShamir Rabinovitch 				  new_state, &ucmd, udata);
4013e126ba97SEli Cohen 
4014e126ba97SEli Cohen out:
4015e126ba97SEli Cohen 	mutex_unlock(&qp->mutex);
4016e126ba97SEli Cohen 	return err;
4017e126ba97SEli Cohen }
4018e126ba97SEli Cohen 
401934f4c955SGuy Levi static void _handle_post_send_edge(struct mlx5_ib_wq *sq, void **seg,
402034f4c955SGuy Levi 				   u32 wqe_sz, void **cur_edge)
402134f4c955SGuy Levi {
402234f4c955SGuy Levi 	u32 idx;
402334f4c955SGuy Levi 
402434f4c955SGuy Levi 	idx = (sq->cur_post + (wqe_sz >> 2)) & (sq->wqe_cnt - 1);
402534f4c955SGuy Levi 	*cur_edge = get_sq_edge(sq, idx);
402634f4c955SGuy Levi 
402734f4c955SGuy Levi 	*seg = mlx5_frag_buf_get_wqe(&sq->fbc, idx);
402834f4c955SGuy Levi }
402934f4c955SGuy Levi 
403034f4c955SGuy Levi /* handle_post_send_edge - Check if we get to SQ edge. If yes, update to the
403134f4c955SGuy Levi  * next nearby edge and get new address translation for current WQE position.
403234f4c955SGuy Levi  * @sq - SQ buffer.
403334f4c955SGuy Levi  * @seg: Current WQE position (16B aligned).
403434f4c955SGuy Levi  * @wqe_sz: Total current WQE size [16B].
403534f4c955SGuy Levi  * @cur_edge: Updated current edge.
403634f4c955SGuy Levi  */
403734f4c955SGuy Levi static inline void handle_post_send_edge(struct mlx5_ib_wq *sq, void **seg,
403834f4c955SGuy Levi 					 u32 wqe_sz, void **cur_edge)
403934f4c955SGuy Levi {
404034f4c955SGuy Levi 	if (likely(*seg != *cur_edge))
404134f4c955SGuy Levi 		return;
404234f4c955SGuy Levi 
404334f4c955SGuy Levi 	_handle_post_send_edge(sq, seg, wqe_sz, cur_edge);
404434f4c955SGuy Levi }
404534f4c955SGuy Levi 
404634f4c955SGuy Levi /* memcpy_send_wqe - copy data from src to WQE and update the relevant WQ's
404734f4c955SGuy Levi  * pointers. At the end @seg is aligned to 16B regardless the copied size.
404834f4c955SGuy Levi  * @sq - SQ buffer.
404934f4c955SGuy Levi  * @cur_edge: Updated current edge.
405034f4c955SGuy Levi  * @seg: Current WQE position (16B aligned).
405134f4c955SGuy Levi  * @wqe_sz: Total current WQE size [16B].
405234f4c955SGuy Levi  * @src: Pointer to copy from.
405334f4c955SGuy Levi  * @n: Number of bytes to copy.
405434f4c955SGuy Levi  */
405534f4c955SGuy Levi static inline void memcpy_send_wqe(struct mlx5_ib_wq *sq, void **cur_edge,
405634f4c955SGuy Levi 				   void **seg, u32 *wqe_sz, const void *src,
405734f4c955SGuy Levi 				   size_t n)
405834f4c955SGuy Levi {
405934f4c955SGuy Levi 	while (likely(n)) {
406034f4c955SGuy Levi 		size_t leftlen = *cur_edge - *seg;
406134f4c955SGuy Levi 		size_t copysz = min_t(size_t, leftlen, n);
406234f4c955SGuy Levi 		size_t stride;
406334f4c955SGuy Levi 
406434f4c955SGuy Levi 		memcpy(*seg, src, copysz);
406534f4c955SGuy Levi 
406634f4c955SGuy Levi 		n -= copysz;
406734f4c955SGuy Levi 		src += copysz;
406834f4c955SGuy Levi 		stride = !n ? ALIGN(copysz, 16) : copysz;
406934f4c955SGuy Levi 		*seg += stride;
407034f4c955SGuy Levi 		*wqe_sz += stride >> 4;
407134f4c955SGuy Levi 		handle_post_send_edge(sq, seg, *wqe_sz, cur_edge);
407234f4c955SGuy Levi 	}
407334f4c955SGuy Levi }
407434f4c955SGuy Levi 
4075e126ba97SEli Cohen static int mlx5_wq_overflow(struct mlx5_ib_wq *wq, int nreq, struct ib_cq *ib_cq)
4076e126ba97SEli Cohen {
4077e126ba97SEli Cohen 	struct mlx5_ib_cq *cq;
4078e126ba97SEli Cohen 	unsigned cur;
4079e126ba97SEli Cohen 
4080e126ba97SEli Cohen 	cur = wq->head - wq->tail;
4081e126ba97SEli Cohen 	if (likely(cur + nreq < wq->max_post))
4082e126ba97SEli Cohen 		return 0;
4083e126ba97SEli Cohen 
4084e126ba97SEli Cohen 	cq = to_mcq(ib_cq);
4085e126ba97SEli Cohen 	spin_lock(&cq->lock);
4086e126ba97SEli Cohen 	cur = wq->head - wq->tail;
4087e126ba97SEli Cohen 	spin_unlock(&cq->lock);
4088e126ba97SEli Cohen 
4089e126ba97SEli Cohen 	return cur + nreq >= wq->max_post;
4090e126ba97SEli Cohen }
4091e126ba97SEli Cohen 
4092e126ba97SEli Cohen static __always_inline void set_raddr_seg(struct mlx5_wqe_raddr_seg *rseg,
4093e126ba97SEli Cohen 					  u64 remote_addr, u32 rkey)
4094e126ba97SEli Cohen {
4095e126ba97SEli Cohen 	rseg->raddr    = cpu_to_be64(remote_addr);
4096e126ba97SEli Cohen 	rseg->rkey     = cpu_to_be32(rkey);
4097e126ba97SEli Cohen 	rseg->reserved = 0;
4098e126ba97SEli Cohen }
4099e126ba97SEli Cohen 
410034f4c955SGuy Levi static void set_eth_seg(const struct ib_send_wr *wr, struct mlx5_ib_qp *qp,
410134f4c955SGuy Levi 			void **seg, int *size, void **cur_edge)
4102f0313965SErez Shitrit {
410334f4c955SGuy Levi 	struct mlx5_wqe_eth_seg *eseg = *seg;
4104f0313965SErez Shitrit 
4105f0313965SErez Shitrit 	memset(eseg, 0, sizeof(struct mlx5_wqe_eth_seg));
4106f0313965SErez Shitrit 
4107f0313965SErez Shitrit 	if (wr->send_flags & IB_SEND_IP_CSUM)
4108f0313965SErez Shitrit 		eseg->cs_flags = MLX5_ETH_WQE_L3_CSUM |
4109f0313965SErez Shitrit 				 MLX5_ETH_WQE_L4_CSUM;
4110f0313965SErez Shitrit 
4111f0313965SErez Shitrit 	if (wr->opcode == IB_WR_LSO) {
4112f0313965SErez Shitrit 		struct ib_ud_wr *ud_wr = container_of(wr, struct ib_ud_wr, wr);
411334f4c955SGuy Levi 		size_t left, copysz;
4114f0313965SErez Shitrit 		void *pdata = ud_wr->header;
411534f4c955SGuy Levi 		size_t stride;
4116f0313965SErez Shitrit 
4117f0313965SErez Shitrit 		left = ud_wr->hlen;
4118f0313965SErez Shitrit 		eseg->mss = cpu_to_be16(ud_wr->mss);
41192b31f7aeSSaeed Mahameed 		eseg->inline_hdr.sz = cpu_to_be16(left);
4120f0313965SErez Shitrit 
412134f4c955SGuy Levi 		/* memcpy_send_wqe should get a 16B align address. Hence, we
412234f4c955SGuy Levi 		 * first copy up to the current edge and then, if needed,
412334f4c955SGuy Levi 		 * fall-through to memcpy_send_wqe.
4124f0313965SErez Shitrit 		 */
412534f4c955SGuy Levi 		copysz = min_t(u64, *cur_edge - (void *)eseg->inline_hdr.start,
412634f4c955SGuy Levi 			       left);
412734f4c955SGuy Levi 		memcpy(eseg->inline_hdr.start, pdata, copysz);
412834f4c955SGuy Levi 		stride = ALIGN(sizeof(struct mlx5_wqe_eth_seg) -
412934f4c955SGuy Levi 			       sizeof(eseg->inline_hdr.start) + copysz, 16);
413034f4c955SGuy Levi 		*size += stride / 16;
413134f4c955SGuy Levi 		*seg += stride;
4132f0313965SErez Shitrit 
413334f4c955SGuy Levi 		if (copysz < left) {
413434f4c955SGuy Levi 			handle_post_send_edge(&qp->sq, seg, *size, cur_edge);
4135f0313965SErez Shitrit 			left -= copysz;
4136f0313965SErez Shitrit 			pdata += copysz;
413734f4c955SGuy Levi 			memcpy_send_wqe(&qp->sq, cur_edge, seg, size, pdata,
413834f4c955SGuy Levi 					left);
4139f0313965SErez Shitrit 		}
4140f0313965SErez Shitrit 
414134f4c955SGuy Levi 		return;
414234f4c955SGuy Levi 	}
414334f4c955SGuy Levi 
414434f4c955SGuy Levi 	*seg += sizeof(struct mlx5_wqe_eth_seg);
414534f4c955SGuy Levi 	*size += sizeof(struct mlx5_wqe_eth_seg) / 16;
4146f0313965SErez Shitrit }
4147f0313965SErez Shitrit 
4148e126ba97SEli Cohen static void set_datagram_seg(struct mlx5_wqe_datagram_seg *dseg,
4149f696bf6dSBart Van Assche 			     const struct ib_send_wr *wr)
4150e126ba97SEli Cohen {
4151e622f2f4SChristoph Hellwig 	memcpy(&dseg->av, &to_mah(ud_wr(wr)->ah)->av, sizeof(struct mlx5_av));
4152e622f2f4SChristoph Hellwig 	dseg->av.dqp_dct = cpu_to_be32(ud_wr(wr)->remote_qpn | MLX5_EXTENDED_UD_AV);
4153e622f2f4SChristoph Hellwig 	dseg->av.key.qkey.qkey = cpu_to_be32(ud_wr(wr)->remote_qkey);
4154e126ba97SEli Cohen }
4155e126ba97SEli Cohen 
4156e126ba97SEli Cohen static void set_data_ptr_seg(struct mlx5_wqe_data_seg *dseg, struct ib_sge *sg)
4157e126ba97SEli Cohen {
4158e126ba97SEli Cohen 	dseg->byte_count = cpu_to_be32(sg->length);
4159e126ba97SEli Cohen 	dseg->lkey       = cpu_to_be32(sg->lkey);
4160e126ba97SEli Cohen 	dseg->addr       = cpu_to_be64(sg->addr);
4161e126ba97SEli Cohen }
4162e126ba97SEli Cohen 
416331616255SArtemy Kovalyov static u64 get_xlt_octo(u64 bytes)
4164e126ba97SEli Cohen {
416531616255SArtemy Kovalyov 	return ALIGN(bytes, MLX5_IB_UMR_XLT_ALIGNMENT) /
416631616255SArtemy Kovalyov 	       MLX5_IB_UMR_OCTOWORD;
4167e126ba97SEli Cohen }
4168e126ba97SEli Cohen 
4169841b07f9SMoni Shoua static __be64 frwr_mkey_mask(bool atomic)
4170e126ba97SEli Cohen {
4171e126ba97SEli Cohen 	u64 result;
4172e126ba97SEli Cohen 
4173e126ba97SEli Cohen 	result = MLX5_MKEY_MASK_LEN		|
4174e126ba97SEli Cohen 		MLX5_MKEY_MASK_PAGE_SIZE	|
4175e126ba97SEli Cohen 		MLX5_MKEY_MASK_START_ADDR	|
4176e126ba97SEli Cohen 		MLX5_MKEY_MASK_EN_RINVAL	|
4177e126ba97SEli Cohen 		MLX5_MKEY_MASK_KEY		|
4178e126ba97SEli Cohen 		MLX5_MKEY_MASK_LR		|
4179e126ba97SEli Cohen 		MLX5_MKEY_MASK_LW		|
4180e126ba97SEli Cohen 		MLX5_MKEY_MASK_RR		|
4181e126ba97SEli Cohen 		MLX5_MKEY_MASK_RW		|
4182e126ba97SEli Cohen 		MLX5_MKEY_MASK_SMALL_FENCE	|
4183e126ba97SEli Cohen 		MLX5_MKEY_MASK_FREE;
4184e126ba97SEli Cohen 
4185841b07f9SMoni Shoua 	if (atomic)
4186841b07f9SMoni Shoua 		result |= MLX5_MKEY_MASK_A;
4187841b07f9SMoni Shoua 
4188e126ba97SEli Cohen 	return cpu_to_be64(result);
4189e126ba97SEli Cohen }
4190e126ba97SEli Cohen 
4191e6631814SSagi Grimberg static __be64 sig_mkey_mask(void)
4192e6631814SSagi Grimberg {
4193e6631814SSagi Grimberg 	u64 result;
4194e6631814SSagi Grimberg 
4195e6631814SSagi Grimberg 	result = MLX5_MKEY_MASK_LEN		|
4196e6631814SSagi Grimberg 		MLX5_MKEY_MASK_PAGE_SIZE	|
4197e6631814SSagi Grimberg 		MLX5_MKEY_MASK_START_ADDR	|
4198d5436ba0SSagi Grimberg 		MLX5_MKEY_MASK_EN_SIGERR	|
4199e6631814SSagi Grimberg 		MLX5_MKEY_MASK_EN_RINVAL	|
4200e6631814SSagi Grimberg 		MLX5_MKEY_MASK_KEY		|
4201e6631814SSagi Grimberg 		MLX5_MKEY_MASK_LR		|
4202e6631814SSagi Grimberg 		MLX5_MKEY_MASK_LW		|
4203e6631814SSagi Grimberg 		MLX5_MKEY_MASK_RR		|
4204e6631814SSagi Grimberg 		MLX5_MKEY_MASK_RW		|
4205e6631814SSagi Grimberg 		MLX5_MKEY_MASK_SMALL_FENCE	|
4206e6631814SSagi Grimberg 		MLX5_MKEY_MASK_FREE		|
4207e6631814SSagi Grimberg 		MLX5_MKEY_MASK_BSF_EN;
4208e6631814SSagi Grimberg 
4209e6631814SSagi Grimberg 	return cpu_to_be64(result);
4210e6631814SSagi Grimberg }
4211e6631814SSagi Grimberg 
42128a187ee5SSagi Grimberg static void set_reg_umr_seg(struct mlx5_wqe_umr_ctrl_seg *umr,
4213841b07f9SMoni Shoua 			    struct mlx5_ib_mr *mr, u8 flags, bool atomic)
42148a187ee5SSagi Grimberg {
421538ca87c6SMax Gurtovoy 	int size = (mr->ndescs + mr->meta_ndescs) * mr->desc_size;
42168a187ee5SSagi Grimberg 
42178a187ee5SSagi Grimberg 	memset(umr, 0, sizeof(*umr));
4218b005d316SSagi Grimberg 
42199ac7c4bcSMax Gurtovoy 	umr->flags = flags;
422031616255SArtemy Kovalyov 	umr->xlt_octowords = cpu_to_be16(get_xlt_octo(size));
4221841b07f9SMoni Shoua 	umr->mkey_mask = frwr_mkey_mask(atomic);
42228a187ee5SSagi Grimberg }
42238a187ee5SSagi Grimberg 
4224dd01e66aSSagi Grimberg static void set_linv_umr_seg(struct mlx5_wqe_umr_ctrl_seg *umr)
4225e126ba97SEli Cohen {
4226e126ba97SEli Cohen 	memset(umr, 0, sizeof(*umr));
4227e126ba97SEli Cohen 	umr->mkey_mask = cpu_to_be64(MLX5_MKEY_MASK_FREE);
42282d221588SMax Gurtovoy 	umr->flags = MLX5_UMR_INLINE;
4229e126ba97SEli Cohen }
4230e126ba97SEli Cohen 
423131616255SArtemy Kovalyov static __be64 get_umr_enable_mr_mask(void)
4232e126ba97SEli Cohen {
4233968e78ddSHaggai Eran 	u64 result;
4234e126ba97SEli Cohen 
423531616255SArtemy Kovalyov 	result = MLX5_MKEY_MASK_KEY |
4236e126ba97SEli Cohen 		 MLX5_MKEY_MASK_FREE;
4237968e78ddSHaggai Eran 
4238968e78ddSHaggai Eran 	return cpu_to_be64(result);
4239968e78ddSHaggai Eran }
4240968e78ddSHaggai Eran 
424131616255SArtemy Kovalyov static __be64 get_umr_disable_mr_mask(void)
4242968e78ddSHaggai Eran {
4243968e78ddSHaggai Eran 	u64 result;
4244968e78ddSHaggai Eran 
4245968e78ddSHaggai Eran 	result = MLX5_MKEY_MASK_FREE;
4246968e78ddSHaggai Eran 
4247968e78ddSHaggai Eran 	return cpu_to_be64(result);
4248968e78ddSHaggai Eran }
4249968e78ddSHaggai Eran 
425056e11d62SNoa Osherovich static __be64 get_umr_update_translation_mask(void)
425156e11d62SNoa Osherovich {
425256e11d62SNoa Osherovich 	u64 result;
425356e11d62SNoa Osherovich 
425456e11d62SNoa Osherovich 	result = MLX5_MKEY_MASK_LEN |
425556e11d62SNoa Osherovich 		 MLX5_MKEY_MASK_PAGE_SIZE |
425631616255SArtemy Kovalyov 		 MLX5_MKEY_MASK_START_ADDR;
425756e11d62SNoa Osherovich 
425856e11d62SNoa Osherovich 	return cpu_to_be64(result);
425956e11d62SNoa Osherovich }
426056e11d62SNoa Osherovich 
426131616255SArtemy Kovalyov static __be64 get_umr_update_access_mask(int atomic)
426256e11d62SNoa Osherovich {
426356e11d62SNoa Osherovich 	u64 result;
426456e11d62SNoa Osherovich 
426531616255SArtemy Kovalyov 	result = MLX5_MKEY_MASK_LR |
426631616255SArtemy Kovalyov 		 MLX5_MKEY_MASK_LW |
426756e11d62SNoa Osherovich 		 MLX5_MKEY_MASK_RR |
426831616255SArtemy Kovalyov 		 MLX5_MKEY_MASK_RW;
426931616255SArtemy Kovalyov 
427031616255SArtemy Kovalyov 	if (atomic)
427131616255SArtemy Kovalyov 		result |= MLX5_MKEY_MASK_A;
427256e11d62SNoa Osherovich 
427356e11d62SNoa Osherovich 	return cpu_to_be64(result);
427456e11d62SNoa Osherovich }
427556e11d62SNoa Osherovich 
427656e11d62SNoa Osherovich static __be64 get_umr_update_pd_mask(void)
427756e11d62SNoa Osherovich {
427856e11d62SNoa Osherovich 	u64 result;
427956e11d62SNoa Osherovich 
428031616255SArtemy Kovalyov 	result = MLX5_MKEY_MASK_PD;
428156e11d62SNoa Osherovich 
428256e11d62SNoa Osherovich 	return cpu_to_be64(result);
428356e11d62SNoa Osherovich }
428456e11d62SNoa Osherovich 
4285c8d75a98SMajd Dibbiny static int umr_check_mkey_mask(struct mlx5_ib_dev *dev, u64 mask)
4286c8d75a98SMajd Dibbiny {
4287c8d75a98SMajd Dibbiny 	if ((mask & MLX5_MKEY_MASK_PAGE_SIZE &&
4288c8d75a98SMajd Dibbiny 	     MLX5_CAP_GEN(dev->mdev, umr_modify_entity_size_disabled)) ||
4289c8d75a98SMajd Dibbiny 	    (mask & MLX5_MKEY_MASK_A &&
4290c8d75a98SMajd Dibbiny 	     MLX5_CAP_GEN(dev->mdev, umr_modify_atomic_disabled)))
4291c8d75a98SMajd Dibbiny 		return -EPERM;
4292c8d75a98SMajd Dibbiny 	return 0;
4293c8d75a98SMajd Dibbiny }
4294c8d75a98SMajd Dibbiny 
4295c8d75a98SMajd Dibbiny static int set_reg_umr_segment(struct mlx5_ib_dev *dev,
4296c8d75a98SMajd Dibbiny 			       struct mlx5_wqe_umr_ctrl_seg *umr,
4297f696bf6dSBart Van Assche 			       const struct ib_send_wr *wr, int atomic)
4298968e78ddSHaggai Eran {
4299f696bf6dSBart Van Assche 	const struct mlx5_umr_wr *umrwr = umr_wr(wr);
4300968e78ddSHaggai Eran 
4301968e78ddSHaggai Eran 	memset(umr, 0, sizeof(*umr));
4302968e78ddSHaggai Eran 
43036a053953SYishai Hadas 	if (!umrwr->ignore_free_state) {
4304968e78ddSHaggai Eran 		if (wr->send_flags & MLX5_IB_SEND_UMR_FAIL_IF_FREE)
43056a053953SYishai Hadas 			 /* fail if free */
43066a053953SYishai Hadas 			umr->flags = MLX5_UMR_CHECK_FREE;
4307968e78ddSHaggai Eran 		else
43086a053953SYishai Hadas 			/* fail if not free */
43096a053953SYishai Hadas 			umr->flags = MLX5_UMR_CHECK_NOT_FREE;
43106a053953SYishai Hadas 	}
4311968e78ddSHaggai Eran 
431231616255SArtemy Kovalyov 	umr->xlt_octowords = cpu_to_be16(get_xlt_octo(umrwr->xlt_size));
431331616255SArtemy Kovalyov 	if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_XLT) {
431431616255SArtemy Kovalyov 		u64 offset = get_xlt_octo(umrwr->offset);
431531616255SArtemy Kovalyov 
431631616255SArtemy Kovalyov 		umr->xlt_offset = cpu_to_be16(offset & 0xffff);
431731616255SArtemy Kovalyov 		umr->xlt_offset_47_16 = cpu_to_be32(offset >> 16);
4318968e78ddSHaggai Eran 		umr->flags |= MLX5_UMR_TRANSLATION_OFFSET_EN;
4319968e78ddSHaggai Eran 	}
432056e11d62SNoa Osherovich 	if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_TRANSLATION)
432156e11d62SNoa Osherovich 		umr->mkey_mask |= get_umr_update_translation_mask();
432231616255SArtemy Kovalyov 	if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_PD_ACCESS) {
432331616255SArtemy Kovalyov 		umr->mkey_mask |= get_umr_update_access_mask(atomic);
432456e11d62SNoa Osherovich 		umr->mkey_mask |= get_umr_update_pd_mask();
4325e126ba97SEli Cohen 	}
432631616255SArtemy Kovalyov 	if (wr->send_flags & MLX5_IB_SEND_UMR_ENABLE_MR)
432731616255SArtemy Kovalyov 		umr->mkey_mask |= get_umr_enable_mr_mask();
432831616255SArtemy Kovalyov 	if (wr->send_flags & MLX5_IB_SEND_UMR_DISABLE_MR)
432931616255SArtemy Kovalyov 		umr->mkey_mask |= get_umr_disable_mr_mask();
4330e126ba97SEli Cohen 
4331e126ba97SEli Cohen 	if (!wr->num_sge)
4332968e78ddSHaggai Eran 		umr->flags |= MLX5_UMR_INLINE;
4333c8d75a98SMajd Dibbiny 
4334c8d75a98SMajd Dibbiny 	return umr_check_mkey_mask(dev, be64_to_cpu(umr->mkey_mask));
4335e126ba97SEli Cohen }
4336e126ba97SEli Cohen 
4337e126ba97SEli Cohen static u8 get_umr_flags(int acc)
4338e126ba97SEli Cohen {
4339e126ba97SEli Cohen 	return (acc & IB_ACCESS_REMOTE_ATOMIC ? MLX5_PERM_ATOMIC       : 0) |
4340e126ba97SEli Cohen 	       (acc & IB_ACCESS_REMOTE_WRITE  ? MLX5_PERM_REMOTE_WRITE : 0) |
4341e126ba97SEli Cohen 	       (acc & IB_ACCESS_REMOTE_READ   ? MLX5_PERM_REMOTE_READ  : 0) |
4342e126ba97SEli Cohen 	       (acc & IB_ACCESS_LOCAL_WRITE   ? MLX5_PERM_LOCAL_WRITE  : 0) |
43432ac45934SSagi Grimberg 		MLX5_PERM_LOCAL_READ | MLX5_PERM_UMR_EN;
4344e126ba97SEli Cohen }
4345e126ba97SEli Cohen 
43468a187ee5SSagi Grimberg static void set_reg_mkey_seg(struct mlx5_mkey_seg *seg,
43478a187ee5SSagi Grimberg 			     struct mlx5_ib_mr *mr,
43488a187ee5SSagi Grimberg 			     u32 key, int access)
43498a187ee5SSagi Grimberg {
435038ca87c6SMax Gurtovoy 	int ndescs = ALIGN(mr->ndescs + mr->meta_ndescs, 8) >> 1;
43518a187ee5SSagi Grimberg 
43528a187ee5SSagi Grimberg 	memset(seg, 0, sizeof(*seg));
4353b005d316SSagi Grimberg 
4354ec22eb53SSaeed Mahameed 	if (mr->access_mode == MLX5_MKC_ACCESS_MODE_MTT)
4355b005d316SSagi Grimberg 		seg->log2_page_size = ilog2(mr->ibmr.page_size);
4356ec22eb53SSaeed Mahameed 	else if (mr->access_mode == MLX5_MKC_ACCESS_MODE_KLMS)
4357b005d316SSagi Grimberg 		/* KLMs take twice the size of MTTs */
4358b005d316SSagi Grimberg 		ndescs *= 2;
4359b005d316SSagi Grimberg 
4360b005d316SSagi Grimberg 	seg->flags = get_umr_flags(access) | mr->access_mode;
43618a187ee5SSagi Grimberg 	seg->qpn_mkey7_0 = cpu_to_be32((key & 0xff) | 0xffffff00);
43628a187ee5SSagi Grimberg 	seg->flags_pd = cpu_to_be32(MLX5_MKEY_REMOTE_INVAL);
43638a187ee5SSagi Grimberg 	seg->start_addr = cpu_to_be64(mr->ibmr.iova);
43648a187ee5SSagi Grimberg 	seg->len = cpu_to_be64(mr->ibmr.length);
43658a187ee5SSagi Grimberg 	seg->xlt_oct_size = cpu_to_be32(ndescs);
43668a187ee5SSagi Grimberg }
43678a187ee5SSagi Grimberg 
4368dd01e66aSSagi Grimberg static void set_linv_mkey_seg(struct mlx5_mkey_seg *seg)
4369e126ba97SEli Cohen {
4370e126ba97SEli Cohen 	memset(seg, 0, sizeof(*seg));
4371968e78ddSHaggai Eran 	seg->status = MLX5_MKEY_STATUS_FREE;
4372e126ba97SEli Cohen }
4373e126ba97SEli Cohen 
4374f696bf6dSBart Van Assche static void set_reg_mkey_segment(struct mlx5_mkey_seg *seg,
4375f696bf6dSBart Van Assche 				 const struct ib_send_wr *wr)
4376e126ba97SEli Cohen {
4377f696bf6dSBart Van Assche 	const struct mlx5_umr_wr *umrwr = umr_wr(wr);
4378968e78ddSHaggai Eran 
4379e126ba97SEli Cohen 	memset(seg, 0, sizeof(*seg));
438031616255SArtemy Kovalyov 	if (wr->send_flags & MLX5_IB_SEND_UMR_DISABLE_MR)
4381968e78ddSHaggai Eran 		seg->status = MLX5_MKEY_STATUS_FREE;
4382e126ba97SEli Cohen 
4383968e78ddSHaggai Eran 	seg->flags = convert_access(umrwr->access_flags);
438456e11d62SNoa Osherovich 	if (umrwr->pd)
4385968e78ddSHaggai Eran 		seg->flags_pd = cpu_to_be32(to_mpd(umrwr->pd)->pdn);
438631616255SArtemy Kovalyov 	if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_TRANSLATION &&
438731616255SArtemy Kovalyov 	    !umrwr->length)
438831616255SArtemy Kovalyov 		seg->flags_pd |= cpu_to_be32(MLX5_MKEY_LEN64);
438931616255SArtemy Kovalyov 
439031616255SArtemy Kovalyov 	seg->start_addr = cpu_to_be64(umrwr->virt_addr);
4391968e78ddSHaggai Eran 	seg->len = cpu_to_be64(umrwr->length);
4392968e78ddSHaggai Eran 	seg->log2_page_size = umrwr->page_shift;
4393746b5583SEli Cohen 	seg->qpn_mkey7_0 = cpu_to_be32(0xffffff00 |
4394968e78ddSHaggai Eran 				       mlx5_mkey_variant(umrwr->mkey));
4395e126ba97SEli Cohen }
4396e126ba97SEli Cohen 
43978a187ee5SSagi Grimberg static void set_reg_data_seg(struct mlx5_wqe_data_seg *dseg,
43988a187ee5SSagi Grimberg 			     struct mlx5_ib_mr *mr,
43998a187ee5SSagi Grimberg 			     struct mlx5_ib_pd *pd)
44008a187ee5SSagi Grimberg {
440138ca87c6SMax Gurtovoy 	int bcount = mr->desc_size * (mr->ndescs + mr->meta_ndescs);
44028a187ee5SSagi Grimberg 
44038a187ee5SSagi Grimberg 	dseg->addr = cpu_to_be64(mr->desc_map);
44048a187ee5SSagi Grimberg 	dseg->byte_count = cpu_to_be32(ALIGN(bcount, 64));
44058a187ee5SSagi Grimberg 	dseg->lkey = cpu_to_be32(pd->ibpd.local_dma_lkey);
44068a187ee5SSagi Grimberg }
44078a187ee5SSagi Grimberg 
4408f696bf6dSBart Van Assche static __be32 send_ieth(const struct ib_send_wr *wr)
4409e126ba97SEli Cohen {
4410e126ba97SEli Cohen 	switch (wr->opcode) {
4411e126ba97SEli Cohen 	case IB_WR_SEND_WITH_IMM:
4412e126ba97SEli Cohen 	case IB_WR_RDMA_WRITE_WITH_IMM:
4413e126ba97SEli Cohen 		return wr->ex.imm_data;
4414e126ba97SEli Cohen 
4415e126ba97SEli Cohen 	case IB_WR_SEND_WITH_INV:
4416e126ba97SEli Cohen 		return cpu_to_be32(wr->ex.invalidate_rkey);
4417e126ba97SEli Cohen 
4418e126ba97SEli Cohen 	default:
4419e126ba97SEli Cohen 		return 0;
4420e126ba97SEli Cohen 	}
4421e126ba97SEli Cohen }
4422e126ba97SEli Cohen 
4423e126ba97SEli Cohen static u8 calc_sig(void *wqe, int size)
4424e126ba97SEli Cohen {
4425e126ba97SEli Cohen 	u8 *p = wqe;
4426e126ba97SEli Cohen 	u8 res = 0;
4427e126ba97SEli Cohen 	int i;
4428e126ba97SEli Cohen 
4429e126ba97SEli Cohen 	for (i = 0; i < size; i++)
4430e126ba97SEli Cohen 		res ^= p[i];
4431e126ba97SEli Cohen 
4432e126ba97SEli Cohen 	return ~res;
4433e126ba97SEli Cohen }
4434e126ba97SEli Cohen 
4435e126ba97SEli Cohen static u8 wq_sig(void *wqe)
4436e126ba97SEli Cohen {
4437e126ba97SEli Cohen 	return calc_sig(wqe, (*((u8 *)wqe + 8) & 0x3f) << 4);
4438e126ba97SEli Cohen }
4439e126ba97SEli Cohen 
4440f696bf6dSBart Van Assche static int set_data_inl_seg(struct mlx5_ib_qp *qp, const struct ib_send_wr *wr,
444134f4c955SGuy Levi 			    void **wqe, int *wqe_sz, void **cur_edge)
4442e126ba97SEli Cohen {
4443e126ba97SEli Cohen 	struct mlx5_wqe_inline_seg *seg;
444434f4c955SGuy Levi 	size_t offset;
4445e126ba97SEli Cohen 	int inl = 0;
4446e126ba97SEli Cohen 	int i;
4447e126ba97SEli Cohen 
444834f4c955SGuy Levi 	seg = *wqe;
444934f4c955SGuy Levi 	*wqe += sizeof(*seg);
445034f4c955SGuy Levi 	offset = sizeof(*seg);
445134f4c955SGuy Levi 
4452e126ba97SEli Cohen 	for (i = 0; i < wr->num_sge; i++) {
445334f4c955SGuy Levi 		size_t len  = wr->sg_list[i].length;
445434f4c955SGuy Levi 		void *addr = (void *)(unsigned long)(wr->sg_list[i].addr);
445534f4c955SGuy Levi 
4456e126ba97SEli Cohen 		inl += len;
4457e126ba97SEli Cohen 
4458e126ba97SEli Cohen 		if (unlikely(inl > qp->max_inline_data))
4459e126ba97SEli Cohen 			return -ENOMEM;
4460e126ba97SEli Cohen 
446134f4c955SGuy Levi 		while (likely(len)) {
446234f4c955SGuy Levi 			size_t leftlen;
446334f4c955SGuy Levi 			size_t copysz;
446434f4c955SGuy Levi 
446534f4c955SGuy Levi 			handle_post_send_edge(&qp->sq, wqe,
446634f4c955SGuy Levi 					      *wqe_sz + (offset >> 4),
446734f4c955SGuy Levi 					      cur_edge);
446834f4c955SGuy Levi 
446934f4c955SGuy Levi 			leftlen = *cur_edge - *wqe;
447034f4c955SGuy Levi 			copysz = min_t(size_t, leftlen, len);
447134f4c955SGuy Levi 
447234f4c955SGuy Levi 			memcpy(*wqe, addr, copysz);
447334f4c955SGuy Levi 			len -= copysz;
447434f4c955SGuy Levi 			addr += copysz;
447534f4c955SGuy Levi 			*wqe += copysz;
447634f4c955SGuy Levi 			offset += copysz;
4477e126ba97SEli Cohen 		}
4478e126ba97SEli Cohen 	}
4479e126ba97SEli Cohen 
4480e126ba97SEli Cohen 	seg->byte_count = cpu_to_be32(inl | MLX5_INLINE_SEG);
4481e126ba97SEli Cohen 
448234f4c955SGuy Levi 	*wqe_sz +=  ALIGN(inl + sizeof(seg->byte_count), 16) / 16;
4483e126ba97SEli Cohen 
4484e126ba97SEli Cohen 	return 0;
4485e126ba97SEli Cohen }
4486e126ba97SEli Cohen 
4487e6631814SSagi Grimberg static u16 prot_field_size(enum ib_signature_type type)
4488e6631814SSagi Grimberg {
4489e6631814SSagi Grimberg 	switch (type) {
4490e6631814SSagi Grimberg 	case IB_SIG_TYPE_T10_DIF:
4491e6631814SSagi Grimberg 		return MLX5_DIF_SIZE;
4492e6631814SSagi Grimberg 	default:
4493e6631814SSagi Grimberg 		return 0;
4494e6631814SSagi Grimberg 	}
4495e6631814SSagi Grimberg }
4496e6631814SSagi Grimberg 
4497e6631814SSagi Grimberg static u8 bs_selector(int block_size)
4498e6631814SSagi Grimberg {
4499e6631814SSagi Grimberg 	switch (block_size) {
4500e6631814SSagi Grimberg 	case 512:	    return 0x1;
4501e6631814SSagi Grimberg 	case 520:	    return 0x2;
4502e6631814SSagi Grimberg 	case 4096:	    return 0x3;
4503e6631814SSagi Grimberg 	case 4160:	    return 0x4;
4504e6631814SSagi Grimberg 	case 1073741824:    return 0x5;
4505e6631814SSagi Grimberg 	default:	    return 0;
4506e6631814SSagi Grimberg 	}
4507e6631814SSagi Grimberg }
4508e6631814SSagi Grimberg 
450978eda2bbSSagi Grimberg static void mlx5_fill_inl_bsf(struct ib_sig_domain *domain,
4510142537f4SSagi Grimberg 			      struct mlx5_bsf_inl *inl)
4511e6631814SSagi Grimberg {
4512142537f4SSagi Grimberg 	/* Valid inline section and allow BSF refresh */
4513142537f4SSagi Grimberg 	inl->vld_refresh = cpu_to_be16(MLX5_BSF_INL_VALID |
4514142537f4SSagi Grimberg 				       MLX5_BSF_REFRESH_DIF);
4515142537f4SSagi Grimberg 	inl->dif_apptag = cpu_to_be16(domain->sig.dif.app_tag);
4516142537f4SSagi Grimberg 	inl->dif_reftag = cpu_to_be32(domain->sig.dif.ref_tag);
4517142537f4SSagi Grimberg 	/* repeating block */
4518142537f4SSagi Grimberg 	inl->rp_inv_seed = MLX5_BSF_REPEAT_BLOCK;
4519142537f4SSagi Grimberg 	inl->sig_type = domain->sig.dif.bg_type == IB_T10DIF_CRC ?
4520142537f4SSagi Grimberg 			MLX5_DIF_CRC : MLX5_DIF_IPCS;
4521e6631814SSagi Grimberg 
452278eda2bbSSagi Grimberg 	if (domain->sig.dif.ref_remap)
452378eda2bbSSagi Grimberg 		inl->dif_inc_ref_guard_check |= MLX5_BSF_INC_REFTAG;
4524e6631814SSagi Grimberg 
452578eda2bbSSagi Grimberg 	if (domain->sig.dif.app_escape) {
452678eda2bbSSagi Grimberg 		if (domain->sig.dif.ref_escape)
452778eda2bbSSagi Grimberg 			inl->dif_inc_ref_guard_check |= MLX5_BSF_APPREF_ESCAPE;
452878eda2bbSSagi Grimberg 		else
452978eda2bbSSagi Grimberg 			inl->dif_inc_ref_guard_check |= MLX5_BSF_APPTAG_ESCAPE;
4530e6631814SSagi Grimberg 	}
4531e6631814SSagi Grimberg 
453278eda2bbSSagi Grimberg 	inl->dif_app_bitmask_check =
453378eda2bbSSagi Grimberg 		cpu_to_be16(domain->sig.dif.apptag_check_mask);
4534e6631814SSagi Grimberg }
4535e6631814SSagi Grimberg 
4536e6631814SSagi Grimberg static int mlx5_set_bsf(struct ib_mr *sig_mr,
4537e6631814SSagi Grimberg 			struct ib_sig_attrs *sig_attrs,
4538e6631814SSagi Grimberg 			struct mlx5_bsf *bsf, u32 data_size)
4539e6631814SSagi Grimberg {
4540e6631814SSagi Grimberg 	struct mlx5_core_sig_ctx *msig = to_mmr(sig_mr)->sig;
4541e6631814SSagi Grimberg 	struct mlx5_bsf_basic *basic = &bsf->basic;
4542e6631814SSagi Grimberg 	struct ib_sig_domain *mem = &sig_attrs->mem;
4543e6631814SSagi Grimberg 	struct ib_sig_domain *wire = &sig_attrs->wire;
4544e6631814SSagi Grimberg 
4545c7f44fbdSSagi Grimberg 	memset(bsf, 0, sizeof(*bsf));
4546e6631814SSagi Grimberg 
4547142537f4SSagi Grimberg 	/* Basic + Extended + Inline */
4548142537f4SSagi Grimberg 	basic->bsf_size_sbs = 1 << 7;
4549e6631814SSagi Grimberg 	/* Input domain check byte mask */
4550e6631814SSagi Grimberg 	basic->check_byte_mask = sig_attrs->check_mask;
455178eda2bbSSagi Grimberg 	basic->raw_data_size = cpu_to_be32(data_size);
455278eda2bbSSagi Grimberg 
455378eda2bbSSagi Grimberg 	/* Memory domain */
455478eda2bbSSagi Grimberg 	switch (sig_attrs->mem.sig_type) {
455578eda2bbSSagi Grimberg 	case IB_SIG_TYPE_NONE:
455678eda2bbSSagi Grimberg 		break;
455778eda2bbSSagi Grimberg 	case IB_SIG_TYPE_T10_DIF:
455878eda2bbSSagi Grimberg 		basic->mem.bs_selector = bs_selector(mem->sig.dif.pi_interval);
455978eda2bbSSagi Grimberg 		basic->m_bfs_psv = cpu_to_be32(msig->psv_memory.psv_idx);
456078eda2bbSSagi Grimberg 		mlx5_fill_inl_bsf(mem, &bsf->m_inl);
456178eda2bbSSagi Grimberg 		break;
456278eda2bbSSagi Grimberg 	default:
456378eda2bbSSagi Grimberg 		return -EINVAL;
456478eda2bbSSagi Grimberg 	}
456578eda2bbSSagi Grimberg 
456678eda2bbSSagi Grimberg 	/* Wire domain */
456778eda2bbSSagi Grimberg 	switch (sig_attrs->wire.sig_type) {
456878eda2bbSSagi Grimberg 	case IB_SIG_TYPE_NONE:
456978eda2bbSSagi Grimberg 		break;
457078eda2bbSSagi Grimberg 	case IB_SIG_TYPE_T10_DIF:
4571e6631814SSagi Grimberg 		if (mem->sig.dif.pi_interval == wire->sig.dif.pi_interval &&
457278eda2bbSSagi Grimberg 		    mem->sig_type == wire->sig_type) {
4573e6631814SSagi Grimberg 			/* Same block structure */
4574142537f4SSagi Grimberg 			basic->bsf_size_sbs |= 1 << 4;
4575e6631814SSagi Grimberg 			if (mem->sig.dif.bg_type == wire->sig.dif.bg_type)
4576fd22f78cSSagi Grimberg 				basic->wire.copy_byte_mask |= MLX5_CPY_GRD_MASK;
4577c7f44fbdSSagi Grimberg 			if (mem->sig.dif.app_tag == wire->sig.dif.app_tag)
4578fd22f78cSSagi Grimberg 				basic->wire.copy_byte_mask |= MLX5_CPY_APP_MASK;
4579c7f44fbdSSagi Grimberg 			if (mem->sig.dif.ref_tag == wire->sig.dif.ref_tag)
4580fd22f78cSSagi Grimberg 				basic->wire.copy_byte_mask |= MLX5_CPY_REF_MASK;
4581e6631814SSagi Grimberg 		} else
4582e6631814SSagi Grimberg 			basic->wire.bs_selector = bs_selector(wire->sig.dif.pi_interval);
4583e6631814SSagi Grimberg 
4584142537f4SSagi Grimberg 		basic->w_bfs_psv = cpu_to_be32(msig->psv_wire.psv_idx);
458578eda2bbSSagi Grimberg 		mlx5_fill_inl_bsf(wire, &bsf->w_inl);
4586e6631814SSagi Grimberg 		break;
4587e6631814SSagi Grimberg 	default:
4588e6631814SSagi Grimberg 		return -EINVAL;
4589e6631814SSagi Grimberg 	}
4590e6631814SSagi Grimberg 
4591e6631814SSagi Grimberg 	return 0;
4592e6631814SSagi Grimberg }
4593e6631814SSagi Grimberg 
459438ca87c6SMax Gurtovoy static int set_sig_data_segment(const struct ib_send_wr *send_wr,
459538ca87c6SMax Gurtovoy 				struct ib_mr *sig_mr,
459638ca87c6SMax Gurtovoy 				struct ib_sig_attrs *sig_attrs,
459738ca87c6SMax Gurtovoy 				struct mlx5_ib_qp *qp, void **seg, int *size,
459838ca87c6SMax Gurtovoy 				void **cur_edge)
4599e6631814SSagi Grimberg {
4600e6631814SSagi Grimberg 	struct mlx5_bsf *bsf;
460138ca87c6SMax Gurtovoy 	u32 data_len;
460238ca87c6SMax Gurtovoy 	u32 data_key;
460338ca87c6SMax Gurtovoy 	u64 data_va;
460438ca87c6SMax Gurtovoy 	u32 prot_len = 0;
460538ca87c6SMax Gurtovoy 	u32 prot_key = 0;
460638ca87c6SMax Gurtovoy 	u64 prot_va = 0;
460738ca87c6SMax Gurtovoy 	bool prot = false;
4608e6631814SSagi Grimberg 	int ret;
4609e6631814SSagi Grimberg 	int wqe_size;
461038ca87c6SMax Gurtovoy 	struct mlx5_ib_mr *mr = to_mmr(sig_mr);
461138ca87c6SMax Gurtovoy 	struct mlx5_ib_mr *pi_mr = mr->pi_mr;
461238ca87c6SMax Gurtovoy 
461338ca87c6SMax Gurtovoy 	data_len = pi_mr->data_length;
461438ca87c6SMax Gurtovoy 	data_key = pi_mr->ibmr.lkey;
46152563e2f3SMax Gurtovoy 	data_va = pi_mr->data_iova;
461638ca87c6SMax Gurtovoy 	if (pi_mr->meta_ndescs) {
461738ca87c6SMax Gurtovoy 		prot_len = pi_mr->meta_length;
461838ca87c6SMax Gurtovoy 		prot_key = pi_mr->ibmr.lkey;
4619de0ae958SIsrael Rukshin 		prot_va = pi_mr->pi_iova;
462038ca87c6SMax Gurtovoy 		prot = true;
462138ca87c6SMax Gurtovoy 	}
462238ca87c6SMax Gurtovoy 
462338ca87c6SMax Gurtovoy 	if (!prot || (data_key == prot_key && data_va == prot_va &&
462438ca87c6SMax Gurtovoy 		      data_len == prot_len)) {
4625e6631814SSagi Grimberg 		/**
4626e6631814SSagi Grimberg 		 * Source domain doesn't contain signature information
46275c273b16SSagi Grimberg 		 * or data and protection are interleaved in memory.
4628e6631814SSagi Grimberg 		 * So need construct:
4629e6631814SSagi Grimberg 		 *                  ------------------
4630e6631814SSagi Grimberg 		 *                 |     data_klm     |
4631e6631814SSagi Grimberg 		 *                  ------------------
4632e6631814SSagi Grimberg 		 *                 |       BSF        |
4633e6631814SSagi Grimberg 		 *                  ------------------
4634e6631814SSagi Grimberg 		 **/
4635e6631814SSagi Grimberg 		struct mlx5_klm *data_klm = *seg;
4636e6631814SSagi Grimberg 
4637e6631814SSagi Grimberg 		data_klm->bcount = cpu_to_be32(data_len);
4638e6631814SSagi Grimberg 		data_klm->key = cpu_to_be32(data_key);
4639e6631814SSagi Grimberg 		data_klm->va = cpu_to_be64(data_va);
4640e6631814SSagi Grimberg 		wqe_size = ALIGN(sizeof(*data_klm), 64);
4641e6631814SSagi Grimberg 	} else {
4642e6631814SSagi Grimberg 		/**
4643e6631814SSagi Grimberg 		 * Source domain contains signature information
4644e6631814SSagi Grimberg 		 * So need construct a strided block format:
4645e6631814SSagi Grimberg 		 *               ---------------------------
4646e6631814SSagi Grimberg 		 *              |     stride_block_ctrl     |
4647e6631814SSagi Grimberg 		 *               ---------------------------
4648e6631814SSagi Grimberg 		 *              |          data_klm         |
4649e6631814SSagi Grimberg 		 *               ---------------------------
4650e6631814SSagi Grimberg 		 *              |          prot_klm         |
4651e6631814SSagi Grimberg 		 *               ---------------------------
4652e6631814SSagi Grimberg 		 *              |             BSF           |
4653e6631814SSagi Grimberg 		 *               ---------------------------
4654e6631814SSagi Grimberg 		 **/
4655e6631814SSagi Grimberg 		struct mlx5_stride_block_ctrl_seg *sblock_ctrl;
4656e6631814SSagi Grimberg 		struct mlx5_stride_block_entry *data_sentry;
4657e6631814SSagi Grimberg 		struct mlx5_stride_block_entry *prot_sentry;
4658e6631814SSagi Grimberg 		u16 block_size = sig_attrs->mem.sig.dif.pi_interval;
4659e6631814SSagi Grimberg 		int prot_size;
4660e6631814SSagi Grimberg 
4661e6631814SSagi Grimberg 		sblock_ctrl = *seg;
4662e6631814SSagi Grimberg 		data_sentry = (void *)sblock_ctrl + sizeof(*sblock_ctrl);
4663e6631814SSagi Grimberg 		prot_sentry = (void *)data_sentry + sizeof(*data_sentry);
4664e6631814SSagi Grimberg 
4665e6631814SSagi Grimberg 		prot_size = prot_field_size(sig_attrs->mem.sig_type);
4666e6631814SSagi Grimberg 		if (!prot_size) {
4667e6631814SSagi Grimberg 			pr_err("Bad block size given: %u\n", block_size);
4668e6631814SSagi Grimberg 			return -EINVAL;
4669e6631814SSagi Grimberg 		}
4670e6631814SSagi Grimberg 		sblock_ctrl->bcount_per_cycle = cpu_to_be32(block_size +
4671e6631814SSagi Grimberg 							    prot_size);
4672e6631814SSagi Grimberg 		sblock_ctrl->op = cpu_to_be32(MLX5_STRIDE_BLOCK_OP);
4673e6631814SSagi Grimberg 		sblock_ctrl->repeat_count = cpu_to_be32(data_len / block_size);
4674e6631814SSagi Grimberg 		sblock_ctrl->num_entries = cpu_to_be16(2);
4675e6631814SSagi Grimberg 
4676e6631814SSagi Grimberg 		data_sentry->bcount = cpu_to_be16(block_size);
4677e6631814SSagi Grimberg 		data_sentry->key = cpu_to_be32(data_key);
4678e6631814SSagi Grimberg 		data_sentry->va = cpu_to_be64(data_va);
46795c273b16SSagi Grimberg 		data_sentry->stride = cpu_to_be16(block_size);
46805c273b16SSagi Grimberg 
4681e6631814SSagi Grimberg 		prot_sentry->bcount = cpu_to_be16(prot_size);
4682e6631814SSagi Grimberg 		prot_sentry->key = cpu_to_be32(prot_key);
4683e6631814SSagi Grimberg 		prot_sentry->va = cpu_to_be64(prot_va);
4684e6631814SSagi Grimberg 		prot_sentry->stride = cpu_to_be16(prot_size);
46855c273b16SSagi Grimberg 
4686e6631814SSagi Grimberg 		wqe_size = ALIGN(sizeof(*sblock_ctrl) + sizeof(*data_sentry) +
4687e6631814SSagi Grimberg 				 sizeof(*prot_sentry), 64);
4688e6631814SSagi Grimberg 	}
4689e6631814SSagi Grimberg 
4690e6631814SSagi Grimberg 	*seg += wqe_size;
4691e6631814SSagi Grimberg 	*size += wqe_size / 16;
469234f4c955SGuy Levi 	handle_post_send_edge(&qp->sq, seg, *size, cur_edge);
4693e6631814SSagi Grimberg 
4694e6631814SSagi Grimberg 	bsf = *seg;
4695e6631814SSagi Grimberg 	ret = mlx5_set_bsf(sig_mr, sig_attrs, bsf, data_len);
4696e6631814SSagi Grimberg 	if (ret)
4697e6631814SSagi Grimberg 		return -EINVAL;
4698e6631814SSagi Grimberg 
4699e6631814SSagi Grimberg 	*seg += sizeof(*bsf);
4700e6631814SSagi Grimberg 	*size += sizeof(*bsf) / 16;
470134f4c955SGuy Levi 	handle_post_send_edge(&qp->sq, seg, *size, cur_edge);
4702e6631814SSagi Grimberg 
4703e6631814SSagi Grimberg 	return 0;
4704e6631814SSagi Grimberg }
4705e6631814SSagi Grimberg 
4706e6631814SSagi Grimberg static void set_sig_mkey_segment(struct mlx5_mkey_seg *seg,
470722465bbaSMax Gurtovoy 				 struct ib_mr *sig_mr, int access_flags,
470822465bbaSMax Gurtovoy 				 u32 size, u32 length, u32 pdn)
4709e6631814SSagi Grimberg {
4710e6631814SSagi Grimberg 	u32 sig_key = sig_mr->rkey;
4711d5436ba0SSagi Grimberg 	u8 sigerr = to_mmr(sig_mr)->sig->sigerr_count & 1;
4712e6631814SSagi Grimberg 
4713e6631814SSagi Grimberg 	memset(seg, 0, sizeof(*seg));
4714e6631814SSagi Grimberg 
471522465bbaSMax Gurtovoy 	seg->flags = get_umr_flags(access_flags) | MLX5_MKC_ACCESS_MODE_KLMS;
4716e6631814SSagi Grimberg 	seg->qpn_mkey7_0 = cpu_to_be32((sig_key & 0xff) | 0xffffff00);
4717d5436ba0SSagi Grimberg 	seg->flags_pd = cpu_to_be32(MLX5_MKEY_REMOTE_INVAL | sigerr << 26 |
4718e6631814SSagi Grimberg 				    MLX5_MKEY_BSF_EN | pdn);
4719e6631814SSagi Grimberg 	seg->len = cpu_to_be64(length);
472031616255SArtemy Kovalyov 	seg->xlt_oct_size = cpu_to_be32(get_xlt_octo(size));
4721e6631814SSagi Grimberg 	seg->bsfs_octo_size = cpu_to_be32(MLX5_MKEY_BSF_OCTO_SIZE);
4722e6631814SSagi Grimberg }
4723e6631814SSagi Grimberg 
4724e6631814SSagi Grimberg static void set_sig_umr_segment(struct mlx5_wqe_umr_ctrl_seg *umr,
472531616255SArtemy Kovalyov 				u32 size)
4726e6631814SSagi Grimberg {
4727e6631814SSagi Grimberg 	memset(umr, 0, sizeof(*umr));
4728e6631814SSagi Grimberg 
4729e6631814SSagi Grimberg 	umr->flags = MLX5_FLAGS_INLINE | MLX5_FLAGS_CHECK_FREE;
473031616255SArtemy Kovalyov 	umr->xlt_octowords = cpu_to_be16(get_xlt_octo(size));
4731e6631814SSagi Grimberg 	umr->bsf_octowords = cpu_to_be16(MLX5_MKEY_BSF_OCTO_SIZE);
4732e6631814SSagi Grimberg 	umr->mkey_mask = sig_mkey_mask();
4733e6631814SSagi Grimberg }
4734e6631814SSagi Grimberg 
473538ca87c6SMax Gurtovoy static int set_pi_umr_wr(const struct ib_send_wr *send_wr,
473638ca87c6SMax Gurtovoy 			 struct mlx5_ib_qp *qp, void **seg, int *size,
473738ca87c6SMax Gurtovoy 			 void **cur_edge)
473838ca87c6SMax Gurtovoy {
473938ca87c6SMax Gurtovoy 	const struct ib_reg_wr *wr = reg_wr(send_wr);
474038ca87c6SMax Gurtovoy 	struct mlx5_ib_mr *sig_mr = to_mmr(wr->mr);
474138ca87c6SMax Gurtovoy 	struct mlx5_ib_mr *pi_mr = sig_mr->pi_mr;
474238ca87c6SMax Gurtovoy 	struct ib_sig_attrs *sig_attrs = sig_mr->ibmr.sig_attrs;
474338ca87c6SMax Gurtovoy 	u32 pdn = get_pd(qp)->pdn;
474438ca87c6SMax Gurtovoy 	u32 xlt_size;
474538ca87c6SMax Gurtovoy 	int region_len, ret;
474638ca87c6SMax Gurtovoy 
474738ca87c6SMax Gurtovoy 	if (unlikely(send_wr->num_sge != 0) ||
474838ca87c6SMax Gurtovoy 	    unlikely(wr->access & IB_ACCESS_REMOTE_ATOMIC) ||
4749185eddc4SMax Gurtovoy 	    unlikely(!sig_mr->sig) || unlikely(!qp->ibqp.integrity_en) ||
475038ca87c6SMax Gurtovoy 	    unlikely(!sig_mr->sig->sig_status_checked))
475138ca87c6SMax Gurtovoy 		return -EINVAL;
475238ca87c6SMax Gurtovoy 
475338ca87c6SMax Gurtovoy 	/* length of the protected region, data + protection */
475438ca87c6SMax Gurtovoy 	region_len = pi_mr->ibmr.length;
475538ca87c6SMax Gurtovoy 
475638ca87c6SMax Gurtovoy 	/**
475738ca87c6SMax Gurtovoy 	 * KLM octoword size - if protection was provided
475838ca87c6SMax Gurtovoy 	 * then we use strided block format (3 octowords),
475938ca87c6SMax Gurtovoy 	 * else we use single KLM (1 octoword)
476038ca87c6SMax Gurtovoy 	 **/
476138ca87c6SMax Gurtovoy 	if (sig_attrs->mem.sig_type != IB_SIG_TYPE_NONE)
476238ca87c6SMax Gurtovoy 		xlt_size = 0x30;
476338ca87c6SMax Gurtovoy 	else
476438ca87c6SMax Gurtovoy 		xlt_size = sizeof(struct mlx5_klm);
476538ca87c6SMax Gurtovoy 
476638ca87c6SMax Gurtovoy 	set_sig_umr_segment(*seg, xlt_size);
476738ca87c6SMax Gurtovoy 	*seg += sizeof(struct mlx5_wqe_umr_ctrl_seg);
476838ca87c6SMax Gurtovoy 	*size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16;
476938ca87c6SMax Gurtovoy 	handle_post_send_edge(&qp->sq, seg, *size, cur_edge);
477038ca87c6SMax Gurtovoy 
477138ca87c6SMax Gurtovoy 	set_sig_mkey_segment(*seg, wr->mr, wr->access, xlt_size, region_len,
477238ca87c6SMax Gurtovoy 			     pdn);
477338ca87c6SMax Gurtovoy 	*seg += sizeof(struct mlx5_mkey_seg);
477438ca87c6SMax Gurtovoy 	*size += sizeof(struct mlx5_mkey_seg) / 16;
477538ca87c6SMax Gurtovoy 	handle_post_send_edge(&qp->sq, seg, *size, cur_edge);
477638ca87c6SMax Gurtovoy 
477738ca87c6SMax Gurtovoy 	ret = set_sig_data_segment(send_wr, wr->mr, sig_attrs, qp, seg, size,
477838ca87c6SMax Gurtovoy 				   cur_edge);
477938ca87c6SMax Gurtovoy 	if (ret)
478038ca87c6SMax Gurtovoy 		return ret;
478138ca87c6SMax Gurtovoy 
478238ca87c6SMax Gurtovoy 	sig_mr->sig->sig_status_checked = false;
478338ca87c6SMax Gurtovoy 	return 0;
478438ca87c6SMax Gurtovoy }
4785e6631814SSagi Grimberg 
4786e6631814SSagi Grimberg static int set_psv_wr(struct ib_sig_domain *domain,
4787e6631814SSagi Grimberg 		      u32 psv_idx, void **seg, int *size)
4788e6631814SSagi Grimberg {
4789e6631814SSagi Grimberg 	struct mlx5_seg_set_psv *psv_seg = *seg;
4790e6631814SSagi Grimberg 
4791e6631814SSagi Grimberg 	memset(psv_seg, 0, sizeof(*psv_seg));
4792e6631814SSagi Grimberg 	psv_seg->psv_num = cpu_to_be32(psv_idx);
4793e6631814SSagi Grimberg 	switch (domain->sig_type) {
479478eda2bbSSagi Grimberg 	case IB_SIG_TYPE_NONE:
479578eda2bbSSagi Grimberg 		break;
4796e6631814SSagi Grimberg 	case IB_SIG_TYPE_T10_DIF:
4797e6631814SSagi Grimberg 		psv_seg->transient_sig = cpu_to_be32(domain->sig.dif.bg << 16 |
4798e6631814SSagi Grimberg 						     domain->sig.dif.app_tag);
4799e6631814SSagi Grimberg 		psv_seg->ref_tag = cpu_to_be32(domain->sig.dif.ref_tag);
4800e6631814SSagi Grimberg 		break;
4801e6631814SSagi Grimberg 	default:
480212bbf1eaSLeon Romanovsky 		pr_err("Bad signature type (%d) is given.\n",
480312bbf1eaSLeon Romanovsky 		       domain->sig_type);
480412bbf1eaSLeon Romanovsky 		return -EINVAL;
4805e6631814SSagi Grimberg 	}
4806e6631814SSagi Grimberg 
480778eda2bbSSagi Grimberg 	*seg += sizeof(*psv_seg);
480878eda2bbSSagi Grimberg 	*size += sizeof(*psv_seg) / 16;
480978eda2bbSSagi Grimberg 
4810e6631814SSagi Grimberg 	return 0;
4811e6631814SSagi Grimberg }
4812e6631814SSagi Grimberg 
48138a187ee5SSagi Grimberg static int set_reg_wr(struct mlx5_ib_qp *qp,
4814f696bf6dSBart Van Assche 		      const struct ib_reg_wr *wr,
48159ac7c4bcSMax Gurtovoy 		      void **seg, int *size, void **cur_edge,
48169ac7c4bcSMax Gurtovoy 		      bool check_not_free)
48178a187ee5SSagi Grimberg {
48188a187ee5SSagi Grimberg 	struct mlx5_ib_mr *mr = to_mmr(wr->mr);
48198a187ee5SSagi Grimberg 	struct mlx5_ib_pd *pd = to_mpd(qp->ibqp.pd);
4820841b07f9SMoni Shoua 	struct mlx5_ib_dev *dev = to_mdev(pd->ibpd.device);
482138ca87c6SMax Gurtovoy 	int mr_list_size = (mr->ndescs + mr->meta_ndescs) * mr->desc_size;
4822064e5262SIdan Burstein 	bool umr_inline = mr_list_size <= MLX5_IB_SQ_UMR_INLINE_THRESHOLD;
4823841b07f9SMoni Shoua 	bool atomic = wr->access & IB_ACCESS_REMOTE_ATOMIC;
48249ac7c4bcSMax Gurtovoy 	u8 flags = 0;
48258a187ee5SSagi Grimberg 
4826d6de0bb1SMichael Guralnik 	if (!mlx5_ib_can_use_umr(dev, atomic, wr->access)) {
4827841b07f9SMoni Shoua 		mlx5_ib_warn(to_mdev(qp->ibqp.device),
4828841b07f9SMoni Shoua 			     "Fast update of %s for MR is disabled\n",
4829841b07f9SMoni Shoua 			     (MLX5_CAP_GEN(dev->mdev,
4830841b07f9SMoni Shoua 					   umr_modify_entity_size_disabled)) ?
4831841b07f9SMoni Shoua 				     "entity size" :
4832841b07f9SMoni Shoua 				     "atomic access");
4833841b07f9SMoni Shoua 		return -EINVAL;
4834841b07f9SMoni Shoua 	}
4835841b07f9SMoni Shoua 
48368a187ee5SSagi Grimberg 	if (unlikely(wr->wr.send_flags & IB_SEND_INLINE)) {
48378a187ee5SSagi Grimberg 		mlx5_ib_warn(to_mdev(qp->ibqp.device),
48388a187ee5SSagi Grimberg 			     "Invalid IB_SEND_INLINE send flag\n");
48398a187ee5SSagi Grimberg 		return -EINVAL;
48408a187ee5SSagi Grimberg 	}
48418a187ee5SSagi Grimberg 
48429ac7c4bcSMax Gurtovoy 	if (check_not_free)
48439ac7c4bcSMax Gurtovoy 		flags |= MLX5_UMR_CHECK_NOT_FREE;
48449ac7c4bcSMax Gurtovoy 	if (umr_inline)
48459ac7c4bcSMax Gurtovoy 		flags |= MLX5_UMR_INLINE;
48469ac7c4bcSMax Gurtovoy 
4847841b07f9SMoni Shoua 	set_reg_umr_seg(*seg, mr, flags, atomic);
48488a187ee5SSagi Grimberg 	*seg += sizeof(struct mlx5_wqe_umr_ctrl_seg);
48498a187ee5SSagi Grimberg 	*size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16;
485034f4c955SGuy Levi 	handle_post_send_edge(&qp->sq, seg, *size, cur_edge);
48518a187ee5SSagi Grimberg 
48528a187ee5SSagi Grimberg 	set_reg_mkey_seg(*seg, mr, wr->key, wr->access);
48538a187ee5SSagi Grimberg 	*seg += sizeof(struct mlx5_mkey_seg);
48548a187ee5SSagi Grimberg 	*size += sizeof(struct mlx5_mkey_seg) / 16;
485534f4c955SGuy Levi 	handle_post_send_edge(&qp->sq, seg, *size, cur_edge);
48568a187ee5SSagi Grimberg 
4857064e5262SIdan Burstein 	if (umr_inline) {
485834f4c955SGuy Levi 		memcpy_send_wqe(&qp->sq, cur_edge, seg, size, mr->descs,
485934f4c955SGuy Levi 				mr_list_size);
486034f4c955SGuy Levi 		*size = ALIGN(*size, MLX5_SEND_WQE_BB >> 4);
4861064e5262SIdan Burstein 	} else {
48628a187ee5SSagi Grimberg 		set_reg_data_seg(*seg, mr, pd);
48638a187ee5SSagi Grimberg 		*seg += sizeof(struct mlx5_wqe_data_seg);
48648a187ee5SSagi Grimberg 		*size += (sizeof(struct mlx5_wqe_data_seg) / 16);
4865064e5262SIdan Burstein 	}
48668a187ee5SSagi Grimberg 	return 0;
48678a187ee5SSagi Grimberg }
48688a187ee5SSagi Grimberg 
486934f4c955SGuy Levi static void set_linv_wr(struct mlx5_ib_qp *qp, void **seg, int *size,
487034f4c955SGuy Levi 			void **cur_edge)
4871e126ba97SEli Cohen {
4872dd01e66aSSagi Grimberg 	set_linv_umr_seg(*seg);
4873e126ba97SEli Cohen 	*seg += sizeof(struct mlx5_wqe_umr_ctrl_seg);
4874e126ba97SEli Cohen 	*size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16;
487534f4c955SGuy Levi 	handle_post_send_edge(&qp->sq, seg, *size, cur_edge);
4876dd01e66aSSagi Grimberg 	set_linv_mkey_seg(*seg);
4877e126ba97SEli Cohen 	*seg += sizeof(struct mlx5_mkey_seg);
4878e126ba97SEli Cohen 	*size += sizeof(struct mlx5_mkey_seg) / 16;
487934f4c955SGuy Levi 	handle_post_send_edge(&qp->sq, seg, *size, cur_edge);
4880e126ba97SEli Cohen }
4881e126ba97SEli Cohen 
488234f4c955SGuy Levi static void dump_wqe(struct mlx5_ib_qp *qp, u32 idx, int size_16)
4883e126ba97SEli Cohen {
4884e126ba97SEli Cohen 	__be32 *p = NULL;
4885e126ba97SEli Cohen 	int i, j;
4886e126ba97SEli Cohen 
488734f4c955SGuy Levi 	pr_debug("dump WQE index %u:\n", idx);
4888e126ba97SEli Cohen 	for (i = 0, j = 0; i < size_16 * 4; i += 4, j += 4) {
4889e126ba97SEli Cohen 		if ((i & 0xf) == 0) {
48901e5887b7SArtemy Kovalyov 			p = mlx5_frag_buf_get_wqe(&qp->sq.fbc, idx);
489134f4c955SGuy Levi 			pr_debug("WQBB at %p:\n", (void *)p);
4892e126ba97SEli Cohen 			j = 0;
48931e5887b7SArtemy Kovalyov 			idx = (idx + 1) & (qp->sq.wqe_cnt - 1);
4894e126ba97SEli Cohen 		}
4895e126ba97SEli Cohen 		pr_debug("%08x %08x %08x %08x\n", be32_to_cpu(p[j]),
4896e126ba97SEli Cohen 			 be32_to_cpu(p[j + 1]), be32_to_cpu(p[j + 2]),
4897e126ba97SEli Cohen 			 be32_to_cpu(p[j + 3]));
4898e126ba97SEli Cohen 	}
4899e126ba97SEli Cohen }
4900e126ba97SEli Cohen 
49017bb1fafcSBart Van Assche static int __begin_wqe(struct mlx5_ib_qp *qp, void **seg,
49026e5eadacSSagi Grimberg 		       struct mlx5_wqe_ctrl_seg **ctrl,
490334f4c955SGuy Levi 		       const struct ib_send_wr *wr, unsigned int *idx,
490434f4c955SGuy Levi 		       int *size, void **cur_edge, int nreq,
490534f4c955SGuy Levi 		       bool send_signaled, bool solicited)
49066e5eadacSSagi Grimberg {
4907b2a232d2SLeon Romanovsky 	if (unlikely(mlx5_wq_overflow(&qp->sq, nreq, qp->ibqp.send_cq)))
4908b2a232d2SLeon Romanovsky 		return -ENOMEM;
49096e5eadacSSagi Grimberg 
49106e5eadacSSagi Grimberg 	*idx = qp->sq.cur_post & (qp->sq.wqe_cnt - 1);
491134f4c955SGuy Levi 	*seg = mlx5_frag_buf_get_wqe(&qp->sq.fbc, *idx);
49126e5eadacSSagi Grimberg 	*ctrl = *seg;
49136e5eadacSSagi Grimberg 	*(uint32_t *)(*seg + 8) = 0;
49146e5eadacSSagi Grimberg 	(*ctrl)->imm = send_ieth(wr);
49156e5eadacSSagi Grimberg 	(*ctrl)->fm_ce_se = qp->sq_signal_bits |
49167bb1fafcSBart Van Assche 		(send_signaled ? MLX5_WQE_CTRL_CQ_UPDATE : 0) |
49177bb1fafcSBart Van Assche 		(solicited ? MLX5_WQE_CTRL_SOLICITED : 0);
49186e5eadacSSagi Grimberg 
49196e5eadacSSagi Grimberg 	*seg += sizeof(**ctrl);
49206e5eadacSSagi Grimberg 	*size = sizeof(**ctrl) / 16;
492134f4c955SGuy Levi 	*cur_edge = qp->sq.cur_edge;
49226e5eadacSSagi Grimberg 
4923b2a232d2SLeon Romanovsky 	return 0;
49246e5eadacSSagi Grimberg }
49256e5eadacSSagi Grimberg 
49267bb1fafcSBart Van Assche static int begin_wqe(struct mlx5_ib_qp *qp, void **seg,
49277bb1fafcSBart Van Assche 		     struct mlx5_wqe_ctrl_seg **ctrl,
49287bb1fafcSBart Van Assche 		     const struct ib_send_wr *wr, unsigned *idx,
492934f4c955SGuy Levi 		     int *size, void **cur_edge, int nreq)
49307bb1fafcSBart Van Assche {
493134f4c955SGuy Levi 	return __begin_wqe(qp, seg, ctrl, wr, idx, size, cur_edge, nreq,
49327bb1fafcSBart Van Assche 			   wr->send_flags & IB_SEND_SIGNALED,
49337bb1fafcSBart Van Assche 			   wr->send_flags & IB_SEND_SOLICITED);
49347bb1fafcSBart Van Assche }
49357bb1fafcSBart Van Assche 
49366e5eadacSSagi Grimberg static void finish_wqe(struct mlx5_ib_qp *qp,
49376e5eadacSSagi Grimberg 		       struct mlx5_wqe_ctrl_seg *ctrl,
493834f4c955SGuy Levi 		       void *seg, u8 size, void *cur_edge,
493934f4c955SGuy Levi 		       unsigned int idx, u64 wr_id, int nreq, u8 fence,
494034f4c955SGuy Levi 		       u32 mlx5_opcode)
49416e5eadacSSagi Grimberg {
49426e5eadacSSagi Grimberg 	u8 opmod = 0;
49436e5eadacSSagi Grimberg 
49446e5eadacSSagi Grimberg 	ctrl->opmod_idx_opcode = cpu_to_be32(((u32)(qp->sq.cur_post) << 8) |
49456e5eadacSSagi Grimberg 					     mlx5_opcode | ((u32)opmod << 24));
494619098df2Smajd@mellanox.com 	ctrl->qpn_ds = cpu_to_be32(size | (qp->trans_qp.base.mqp.qpn << 8));
49476e5eadacSSagi Grimberg 	ctrl->fm_ce_se |= fence;
49486e5eadacSSagi Grimberg 	if (unlikely(qp->wq_sig))
49496e5eadacSSagi Grimberg 		ctrl->signature = wq_sig(ctrl);
49506e5eadacSSagi Grimberg 
49516e5eadacSSagi Grimberg 	qp->sq.wrid[idx] = wr_id;
49526e5eadacSSagi Grimberg 	qp->sq.w_list[idx].opcode = mlx5_opcode;
49536e5eadacSSagi Grimberg 	qp->sq.wqe_head[idx] = qp->sq.head + nreq;
49546e5eadacSSagi Grimberg 	qp->sq.cur_post += DIV_ROUND_UP(size * 16, MLX5_SEND_WQE_BB);
49556e5eadacSSagi Grimberg 	qp->sq.w_list[idx].next = qp->sq.cur_post;
495634f4c955SGuy Levi 
495734f4c955SGuy Levi 	/* We save the edge which was possibly updated during the WQE
495834f4c955SGuy Levi 	 * construction, into SQ's cache.
495934f4c955SGuy Levi 	 */
496034f4c955SGuy Levi 	seg = PTR_ALIGN(seg, MLX5_SEND_WQE_BB);
496134f4c955SGuy Levi 	qp->sq.cur_edge = (unlikely(seg == cur_edge)) ?
496234f4c955SGuy Levi 			  get_sq_edge(&qp->sq, qp->sq.cur_post &
496334f4c955SGuy Levi 				      (qp->sq.wqe_cnt - 1)) :
496434f4c955SGuy Levi 			  cur_edge;
49656e5eadacSSagi Grimberg }
49666e5eadacSSagi Grimberg 
4967d34ac5cdSBart Van Assche static int _mlx5_ib_post_send(struct ib_qp *ibqp, const struct ib_send_wr *wr,
4968d34ac5cdSBart Van Assche 			      const struct ib_send_wr **bad_wr, bool drain)
4969e126ba97SEli Cohen {
4970e126ba97SEli Cohen 	struct mlx5_wqe_ctrl_seg *ctrl = NULL;  /* compiler warning */
4971e126ba97SEli Cohen 	struct mlx5_ib_dev *dev = to_mdev(ibqp->device);
497289ea94a7SMaor Gottlieb 	struct mlx5_core_dev *mdev = dev->mdev;
497338ca87c6SMax Gurtovoy 	struct ib_reg_wr reg_pi_wr;
4974d16e91daSHaggai Eran 	struct mlx5_ib_qp *qp;
4975e6631814SSagi Grimberg 	struct mlx5_ib_mr *mr;
497638ca87c6SMax Gurtovoy 	struct mlx5_ib_mr *pi_mr;
49772563e2f3SMax Gurtovoy 	struct mlx5_ib_mr pa_pi_mr;
497838ca87c6SMax Gurtovoy 	struct ib_sig_attrs *sig_attrs;
4979e126ba97SEli Cohen 	struct mlx5_wqe_xrc_seg *xrc;
4980d16e91daSHaggai Eran 	struct mlx5_bf *bf;
498134f4c955SGuy Levi 	void *cur_edge;
4982e126ba97SEli Cohen 	int uninitialized_var(size);
4983e126ba97SEli Cohen 	unsigned long flags;
4984e126ba97SEli Cohen 	unsigned idx;
4985e126ba97SEli Cohen 	int err = 0;
4986e126ba97SEli Cohen 	int num_sge;
4987e126ba97SEli Cohen 	void *seg;
4988e126ba97SEli Cohen 	int nreq;
4989e126ba97SEli Cohen 	int i;
4990e126ba97SEli Cohen 	u8 next_fence = 0;
4991e126ba97SEli Cohen 	u8 fence;
4992e126ba97SEli Cohen 
49936c75520fSParav Pandit 	if (unlikely(mdev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR &&
49946c75520fSParav Pandit 		     !drain)) {
49956c75520fSParav Pandit 		*bad_wr = wr;
49966c75520fSParav Pandit 		return -EIO;
49976c75520fSParav Pandit 	}
49986c75520fSParav Pandit 
4999d16e91daSHaggai Eran 	if (unlikely(ibqp->qp_type == IB_QPT_GSI))
5000d16e91daSHaggai Eran 		return mlx5_ib_gsi_post_send(ibqp, wr, bad_wr);
5001d16e91daSHaggai Eran 
5002d16e91daSHaggai Eran 	qp = to_mqp(ibqp);
50035fe9dec0SEli Cohen 	bf = &qp->bf;
5004d16e91daSHaggai Eran 
5005e126ba97SEli Cohen 	spin_lock_irqsave(&qp->sq.lock, flags);
5006e126ba97SEli Cohen 
5007e126ba97SEli Cohen 	for (nreq = 0; wr; nreq++, wr = wr->next) {
5008a8f731ebSFabian Frederick 		if (unlikely(wr->opcode >= ARRAY_SIZE(mlx5_ib_opcode))) {
5009e126ba97SEli Cohen 			mlx5_ib_warn(dev, "\n");
5010e126ba97SEli Cohen 			err = -EINVAL;
5011e126ba97SEli Cohen 			*bad_wr = wr;
5012e126ba97SEli Cohen 			goto out;
5013e126ba97SEli Cohen 		}
5014e126ba97SEli Cohen 
5015e126ba97SEli Cohen 		num_sge = wr->num_sge;
5016e126ba97SEli Cohen 		if (unlikely(num_sge > qp->sq.max_gs)) {
5017e126ba97SEli Cohen 			mlx5_ib_warn(dev, "\n");
501824be409bSChuck Lever 			err = -EINVAL;
5019e126ba97SEli Cohen 			*bad_wr = wr;
5020e126ba97SEli Cohen 			goto out;
5021e126ba97SEli Cohen 		}
5022e126ba97SEli Cohen 
502334f4c955SGuy Levi 		err = begin_wqe(qp, &seg, &ctrl, wr, &idx, &size, &cur_edge,
502434f4c955SGuy Levi 				nreq);
50256e5eadacSSagi Grimberg 		if (err) {
50266e5eadacSSagi Grimberg 			mlx5_ib_warn(dev, "\n");
50276e5eadacSSagi Grimberg 			err = -ENOMEM;
50286e5eadacSSagi Grimberg 			*bad_wr = wr;
50296e5eadacSSagi Grimberg 			goto out;
50306e5eadacSSagi Grimberg 		}
5031e126ba97SEli Cohen 
503238ca87c6SMax Gurtovoy 		if (wr->opcode == IB_WR_REG_MR ||
503338ca87c6SMax Gurtovoy 		    wr->opcode == IB_WR_REG_MR_INTEGRITY) {
50346e8484c5SMax Gurtovoy 			fence = dev->umr_fence;
50356e8484c5SMax Gurtovoy 			next_fence = MLX5_FENCE_MODE_INITIATOR_SMALL;
5036074fca3aSMajd Dibbiny 		} else  {
5037074fca3aSMajd Dibbiny 			if (wr->send_flags & IB_SEND_FENCE) {
50386e8484c5SMax Gurtovoy 				if (qp->next_fence)
50396e8484c5SMax Gurtovoy 					fence = MLX5_FENCE_MODE_SMALL_AND_FENCE;
50406e8484c5SMax Gurtovoy 				else
50416e8484c5SMax Gurtovoy 					fence = MLX5_FENCE_MODE_FENCE;
50426e8484c5SMax Gurtovoy 			} else {
50436e8484c5SMax Gurtovoy 				fence = qp->next_fence;
50446e8484c5SMax Gurtovoy 			}
5045074fca3aSMajd Dibbiny 		}
50466e8484c5SMax Gurtovoy 
5047e126ba97SEli Cohen 		switch (ibqp->qp_type) {
5048e126ba97SEli Cohen 		case IB_QPT_XRC_INI:
5049e126ba97SEli Cohen 			xrc = seg;
5050e126ba97SEli Cohen 			seg += sizeof(*xrc);
5051e126ba97SEli Cohen 			size += sizeof(*xrc) / 16;
5052e126ba97SEli Cohen 			/* fall through */
5053e126ba97SEli Cohen 		case IB_QPT_RC:
5054e126ba97SEli Cohen 			switch (wr->opcode) {
5055e126ba97SEli Cohen 			case IB_WR_RDMA_READ:
5056e126ba97SEli Cohen 			case IB_WR_RDMA_WRITE:
5057e126ba97SEli Cohen 			case IB_WR_RDMA_WRITE_WITH_IMM:
5058e622f2f4SChristoph Hellwig 				set_raddr_seg(seg, rdma_wr(wr)->remote_addr,
5059e622f2f4SChristoph Hellwig 					      rdma_wr(wr)->rkey);
5060e126ba97SEli Cohen 				seg += sizeof(struct mlx5_wqe_raddr_seg);
5061e126ba97SEli Cohen 				size += sizeof(struct mlx5_wqe_raddr_seg) / 16;
5062e126ba97SEli Cohen 				break;
5063e126ba97SEli Cohen 
5064e126ba97SEli Cohen 			case IB_WR_ATOMIC_CMP_AND_SWP:
5065e126ba97SEli Cohen 			case IB_WR_ATOMIC_FETCH_AND_ADD:
5066e126ba97SEli Cohen 			case IB_WR_MASKED_ATOMIC_CMP_AND_SWP:
506781bea28fSEli Cohen 				mlx5_ib_warn(dev, "Atomic operations are not supported yet\n");
506881bea28fSEli Cohen 				err = -ENOSYS;
506981bea28fSEli Cohen 				*bad_wr = wr;
507081bea28fSEli Cohen 				goto out;
5071e126ba97SEli Cohen 
5072e126ba97SEli Cohen 			case IB_WR_LOCAL_INV:
5073e126ba97SEli Cohen 				qp->sq.wr_data[idx] = IB_WR_LOCAL_INV;
5074e126ba97SEli Cohen 				ctrl->imm = cpu_to_be32(wr->ex.invalidate_rkey);
507534f4c955SGuy Levi 				set_linv_wr(qp, &seg, &size, &cur_edge);
5076e126ba97SEli Cohen 				num_sge = 0;
5077e126ba97SEli Cohen 				break;
5078e126ba97SEli Cohen 
50798a187ee5SSagi Grimberg 			case IB_WR_REG_MR:
50808a187ee5SSagi Grimberg 				qp->sq.wr_data[idx] = IB_WR_REG_MR;
50818a187ee5SSagi Grimberg 				ctrl->imm = cpu_to_be32(reg_wr(wr)->key);
508234f4c955SGuy Levi 				err = set_reg_wr(qp, reg_wr(wr), &seg, &size,
50839ac7c4bcSMax Gurtovoy 						 &cur_edge, true);
50848a187ee5SSagi Grimberg 				if (err) {
50858a187ee5SSagi Grimberg 					*bad_wr = wr;
50868a187ee5SSagi Grimberg 					goto out;
50878a187ee5SSagi Grimberg 				}
50888a187ee5SSagi Grimberg 				num_sge = 0;
50898a187ee5SSagi Grimberg 				break;
50908a187ee5SSagi Grimberg 
509138ca87c6SMax Gurtovoy 			case IB_WR_REG_MR_INTEGRITY:
50922563e2f3SMax Gurtovoy 				qp->sq.wr_data[idx] = IB_WR_REG_MR_INTEGRITY;
509338ca87c6SMax Gurtovoy 
509438ca87c6SMax Gurtovoy 				mr = to_mmr(reg_wr(wr)->mr);
509538ca87c6SMax Gurtovoy 				pi_mr = mr->pi_mr;
509638ca87c6SMax Gurtovoy 
50972563e2f3SMax Gurtovoy 				if (pi_mr) {
50982563e2f3SMax Gurtovoy 					memset(&reg_pi_wr, 0,
50992563e2f3SMax Gurtovoy 					       sizeof(struct ib_reg_wr));
51002563e2f3SMax Gurtovoy 
510138ca87c6SMax Gurtovoy 					reg_pi_wr.mr = &pi_mr->ibmr;
510238ca87c6SMax Gurtovoy 					reg_pi_wr.access = reg_wr(wr)->access;
510338ca87c6SMax Gurtovoy 					reg_pi_wr.key = pi_mr->ibmr.rkey;
510438ca87c6SMax Gurtovoy 
510538ca87c6SMax Gurtovoy 					ctrl->imm = cpu_to_be32(reg_pi_wr.key);
51062563e2f3SMax Gurtovoy 					/* UMR for data + prot registration */
51072563e2f3SMax Gurtovoy 					err = set_reg_wr(qp, &reg_pi_wr, &seg,
51082563e2f3SMax Gurtovoy 							 &size, &cur_edge,
51092563e2f3SMax Gurtovoy 							 false);
511038ca87c6SMax Gurtovoy 					if (err) {
511138ca87c6SMax Gurtovoy 						*bad_wr = wr;
511238ca87c6SMax Gurtovoy 						goto out;
511338ca87c6SMax Gurtovoy 					}
51142563e2f3SMax Gurtovoy 					finish_wqe(qp, ctrl, seg, size,
51152563e2f3SMax Gurtovoy 						   cur_edge, idx, wr->wr_id,
51162563e2f3SMax Gurtovoy 						   nreq, fence,
511738ca87c6SMax Gurtovoy 						   MLX5_OPCODE_UMR);
511838ca87c6SMax Gurtovoy 
51192563e2f3SMax Gurtovoy 					err = begin_wqe(qp, &seg, &ctrl, wr,
51202563e2f3SMax Gurtovoy 							&idx, &size, &cur_edge,
51212563e2f3SMax Gurtovoy 							nreq);
512238ca87c6SMax Gurtovoy 					if (err) {
512338ca87c6SMax Gurtovoy 						mlx5_ib_warn(dev, "\n");
512438ca87c6SMax Gurtovoy 						err = -ENOMEM;
512538ca87c6SMax Gurtovoy 						*bad_wr = wr;
512638ca87c6SMax Gurtovoy 						goto out;
512738ca87c6SMax Gurtovoy 					}
51282563e2f3SMax Gurtovoy 				} else {
51292563e2f3SMax Gurtovoy 					memset(&pa_pi_mr, 0,
51302563e2f3SMax Gurtovoy 					       sizeof(struct mlx5_ib_mr));
51312563e2f3SMax Gurtovoy 					/* No UMR, use local_dma_lkey */
51322563e2f3SMax Gurtovoy 					pa_pi_mr.ibmr.lkey =
51332563e2f3SMax Gurtovoy 						mr->ibmr.pd->local_dma_lkey;
51342563e2f3SMax Gurtovoy 
51352563e2f3SMax Gurtovoy 					pa_pi_mr.ndescs = mr->ndescs;
51362563e2f3SMax Gurtovoy 					pa_pi_mr.data_length = mr->data_length;
51372563e2f3SMax Gurtovoy 					pa_pi_mr.data_iova = mr->data_iova;
51382563e2f3SMax Gurtovoy 					if (mr->meta_ndescs) {
51392563e2f3SMax Gurtovoy 						pa_pi_mr.meta_ndescs =
51402563e2f3SMax Gurtovoy 							mr->meta_ndescs;
51412563e2f3SMax Gurtovoy 						pa_pi_mr.meta_length =
51422563e2f3SMax Gurtovoy 							mr->meta_length;
51432563e2f3SMax Gurtovoy 						pa_pi_mr.pi_iova = mr->pi_iova;
51442563e2f3SMax Gurtovoy 					}
51452563e2f3SMax Gurtovoy 
51462563e2f3SMax Gurtovoy 					pa_pi_mr.ibmr.length = mr->ibmr.length;
51472563e2f3SMax Gurtovoy 					mr->pi_mr = &pa_pi_mr;
51482563e2f3SMax Gurtovoy 				}
514938ca87c6SMax Gurtovoy 				ctrl->imm = cpu_to_be32(mr->ibmr.rkey);
515038ca87c6SMax Gurtovoy 				/* UMR for sig MR */
515138ca87c6SMax Gurtovoy 				err = set_pi_umr_wr(wr, qp, &seg, &size,
515238ca87c6SMax Gurtovoy 						    &cur_edge);
515338ca87c6SMax Gurtovoy 				if (err) {
515438ca87c6SMax Gurtovoy 					mlx5_ib_warn(dev, "\n");
515538ca87c6SMax Gurtovoy 					*bad_wr = wr;
515638ca87c6SMax Gurtovoy 					goto out;
515738ca87c6SMax Gurtovoy 				}
515838ca87c6SMax Gurtovoy 				finish_wqe(qp, ctrl, seg, size, cur_edge, idx,
515938ca87c6SMax Gurtovoy 					   wr->wr_id, nreq, fence,
516038ca87c6SMax Gurtovoy 					   MLX5_OPCODE_UMR);
516138ca87c6SMax Gurtovoy 
516238ca87c6SMax Gurtovoy 				/*
516338ca87c6SMax Gurtovoy 				 * SET_PSV WQEs are not signaled and solicited
516438ca87c6SMax Gurtovoy 				 * on error
516538ca87c6SMax Gurtovoy 				 */
516638ca87c6SMax Gurtovoy 				sig_attrs = mr->ibmr.sig_attrs;
516738ca87c6SMax Gurtovoy 				err = __begin_wqe(qp, &seg, &ctrl, wr, &idx,
516838ca87c6SMax Gurtovoy 						  &size, &cur_edge, nreq, false,
516938ca87c6SMax Gurtovoy 						  true);
517038ca87c6SMax Gurtovoy 				if (err) {
517138ca87c6SMax Gurtovoy 					mlx5_ib_warn(dev, "\n");
517238ca87c6SMax Gurtovoy 					err = -ENOMEM;
517338ca87c6SMax Gurtovoy 					*bad_wr = wr;
517438ca87c6SMax Gurtovoy 					goto out;
517538ca87c6SMax Gurtovoy 				}
517638ca87c6SMax Gurtovoy 				err = set_psv_wr(&sig_attrs->mem,
517738ca87c6SMax Gurtovoy 						 mr->sig->psv_memory.psv_idx,
517838ca87c6SMax Gurtovoy 						 &seg, &size);
517938ca87c6SMax Gurtovoy 				if (err) {
518038ca87c6SMax Gurtovoy 					mlx5_ib_warn(dev, "\n");
518138ca87c6SMax Gurtovoy 					*bad_wr = wr;
518238ca87c6SMax Gurtovoy 					goto out;
518338ca87c6SMax Gurtovoy 				}
518438ca87c6SMax Gurtovoy 				finish_wqe(qp, ctrl, seg, size, cur_edge, idx,
518538ca87c6SMax Gurtovoy 					   wr->wr_id, nreq, next_fence,
518638ca87c6SMax Gurtovoy 					   MLX5_OPCODE_SET_PSV);
518738ca87c6SMax Gurtovoy 
518838ca87c6SMax Gurtovoy 				err = __begin_wqe(qp, &seg, &ctrl, wr, &idx,
518938ca87c6SMax Gurtovoy 						  &size, &cur_edge, nreq, false,
519038ca87c6SMax Gurtovoy 						  true);
519138ca87c6SMax Gurtovoy 				if (err) {
519238ca87c6SMax Gurtovoy 					mlx5_ib_warn(dev, "\n");
519338ca87c6SMax Gurtovoy 					err = -ENOMEM;
519438ca87c6SMax Gurtovoy 					*bad_wr = wr;
519538ca87c6SMax Gurtovoy 					goto out;
519638ca87c6SMax Gurtovoy 				}
519738ca87c6SMax Gurtovoy 				err = set_psv_wr(&sig_attrs->wire,
519838ca87c6SMax Gurtovoy 						 mr->sig->psv_wire.psv_idx,
519938ca87c6SMax Gurtovoy 						 &seg, &size);
520038ca87c6SMax Gurtovoy 				if (err) {
520138ca87c6SMax Gurtovoy 					mlx5_ib_warn(dev, "\n");
520238ca87c6SMax Gurtovoy 					*bad_wr = wr;
520338ca87c6SMax Gurtovoy 					goto out;
520438ca87c6SMax Gurtovoy 				}
520538ca87c6SMax Gurtovoy 				finish_wqe(qp, ctrl, seg, size, cur_edge, idx,
520638ca87c6SMax Gurtovoy 					   wr->wr_id, nreq, next_fence,
520738ca87c6SMax Gurtovoy 					   MLX5_OPCODE_SET_PSV);
520838ca87c6SMax Gurtovoy 
520938ca87c6SMax Gurtovoy 				qp->next_fence =
521038ca87c6SMax Gurtovoy 					MLX5_FENCE_MODE_INITIATOR_SMALL;
521138ca87c6SMax Gurtovoy 				num_sge = 0;
521238ca87c6SMax Gurtovoy 				goto skip_psv;
521338ca87c6SMax Gurtovoy 
5214e126ba97SEli Cohen 			default:
5215e126ba97SEli Cohen 				break;
5216e126ba97SEli Cohen 			}
5217e126ba97SEli Cohen 			break;
5218e126ba97SEli Cohen 
5219e126ba97SEli Cohen 		case IB_QPT_UC:
5220e126ba97SEli Cohen 			switch (wr->opcode) {
5221e126ba97SEli Cohen 			case IB_WR_RDMA_WRITE:
5222e126ba97SEli Cohen 			case IB_WR_RDMA_WRITE_WITH_IMM:
5223e622f2f4SChristoph Hellwig 				set_raddr_seg(seg, rdma_wr(wr)->remote_addr,
5224e622f2f4SChristoph Hellwig 					      rdma_wr(wr)->rkey);
5225e126ba97SEli Cohen 				seg  += sizeof(struct mlx5_wqe_raddr_seg);
5226e126ba97SEli Cohen 				size += sizeof(struct mlx5_wqe_raddr_seg) / 16;
5227e126ba97SEli Cohen 				break;
5228e126ba97SEli Cohen 
5229e126ba97SEli Cohen 			default:
5230e126ba97SEli Cohen 				break;
5231e126ba97SEli Cohen 			}
5232e126ba97SEli Cohen 			break;
5233e126ba97SEli Cohen 
5234e126ba97SEli Cohen 		case IB_QPT_SMI:
52351e0e50b6SMaor Gottlieb 			if (unlikely(!mdev->port_caps[qp->port - 1].has_smi)) {
52361e0e50b6SMaor Gottlieb 				mlx5_ib_warn(dev, "Send SMP MADs is not allowed\n");
52371e0e50b6SMaor Gottlieb 				err = -EPERM;
52381e0e50b6SMaor Gottlieb 				*bad_wr = wr;
52391e0e50b6SMaor Gottlieb 				goto out;
52401e0e50b6SMaor Gottlieb 			}
5241f6b1ee34SBart Van Assche 			/* fall through */
5242d16e91daSHaggai Eran 		case MLX5_IB_QPT_HW_GSI:
5243e126ba97SEli Cohen 			set_datagram_seg(seg, wr);
5244e126ba97SEli Cohen 			seg += sizeof(struct mlx5_wqe_datagram_seg);
5245e126ba97SEli Cohen 			size += sizeof(struct mlx5_wqe_datagram_seg) / 16;
524634f4c955SGuy Levi 			handle_post_send_edge(&qp->sq, &seg, size, &cur_edge);
524734f4c955SGuy Levi 
5248e126ba97SEli Cohen 			break;
5249f0313965SErez Shitrit 		case IB_QPT_UD:
5250f0313965SErez Shitrit 			set_datagram_seg(seg, wr);
5251f0313965SErez Shitrit 			seg += sizeof(struct mlx5_wqe_datagram_seg);
5252f0313965SErez Shitrit 			size += sizeof(struct mlx5_wqe_datagram_seg) / 16;
525334f4c955SGuy Levi 			handle_post_send_edge(&qp->sq, &seg, size, &cur_edge);
5254f0313965SErez Shitrit 
5255f0313965SErez Shitrit 			/* handle qp that supports ud offload */
5256f0313965SErez Shitrit 			if (qp->flags & IB_QP_CREATE_IPOIB_UD_LSO) {
5257f0313965SErez Shitrit 				struct mlx5_wqe_eth_pad *pad;
5258f0313965SErez Shitrit 
5259f0313965SErez Shitrit 				pad = seg;
5260f0313965SErez Shitrit 				memset(pad, 0, sizeof(struct mlx5_wqe_eth_pad));
5261f0313965SErez Shitrit 				seg += sizeof(struct mlx5_wqe_eth_pad);
5262f0313965SErez Shitrit 				size += sizeof(struct mlx5_wqe_eth_pad) / 16;
526334f4c955SGuy Levi 				set_eth_seg(wr, qp, &seg, &size, &cur_edge);
526434f4c955SGuy Levi 				handle_post_send_edge(&qp->sq, &seg, size,
526534f4c955SGuy Levi 						      &cur_edge);
5266f0313965SErez Shitrit 			}
5267f0313965SErez Shitrit 			break;
5268e126ba97SEli Cohen 		case MLX5_IB_QPT_REG_UMR:
5269e126ba97SEli Cohen 			if (wr->opcode != MLX5_IB_WR_UMR) {
5270e126ba97SEli Cohen 				err = -EINVAL;
5271e126ba97SEli Cohen 				mlx5_ib_warn(dev, "bad opcode\n");
5272e126ba97SEli Cohen 				goto out;
5273e126ba97SEli Cohen 			}
5274e126ba97SEli Cohen 			qp->sq.wr_data[idx] = MLX5_IB_WR_UMR;
5275e622f2f4SChristoph Hellwig 			ctrl->imm = cpu_to_be32(umr_wr(wr)->mkey);
5276c8d75a98SMajd Dibbiny 			err = set_reg_umr_segment(dev, seg, wr, !!(MLX5_CAP_GEN(mdev, atomic)));
5277c8d75a98SMajd Dibbiny 			if (unlikely(err))
5278c8d75a98SMajd Dibbiny 				goto out;
5279e126ba97SEli Cohen 			seg += sizeof(struct mlx5_wqe_umr_ctrl_seg);
5280e126ba97SEli Cohen 			size += sizeof(struct mlx5_wqe_umr_ctrl_seg) / 16;
528134f4c955SGuy Levi 			handle_post_send_edge(&qp->sq, &seg, size, &cur_edge);
5282e126ba97SEli Cohen 			set_reg_mkey_segment(seg, wr);
5283e126ba97SEli Cohen 			seg += sizeof(struct mlx5_mkey_seg);
5284e126ba97SEli Cohen 			size += sizeof(struct mlx5_mkey_seg) / 16;
528534f4c955SGuy Levi 			handle_post_send_edge(&qp->sq, &seg, size, &cur_edge);
5286e126ba97SEli Cohen 			break;
5287e126ba97SEli Cohen 
5288e126ba97SEli Cohen 		default:
5289e126ba97SEli Cohen 			break;
5290e126ba97SEli Cohen 		}
5291e126ba97SEli Cohen 
5292e126ba97SEli Cohen 		if (wr->send_flags & IB_SEND_INLINE && num_sge) {
529334f4c955SGuy Levi 			err = set_data_inl_seg(qp, wr, &seg, &size, &cur_edge);
5294e126ba97SEli Cohen 			if (unlikely(err)) {
5295e126ba97SEli Cohen 				mlx5_ib_warn(dev, "\n");
5296e126ba97SEli Cohen 				*bad_wr = wr;
5297e126ba97SEli Cohen 				goto out;
5298e126ba97SEli Cohen 			}
5299e126ba97SEli Cohen 		} else {
5300e126ba97SEli Cohen 			for (i = 0; i < num_sge; i++) {
530134f4c955SGuy Levi 				handle_post_send_edge(&qp->sq, &seg, size,
530234f4c955SGuy Levi 						      &cur_edge);
5303e126ba97SEli Cohen 				if (likely(wr->sg_list[i].length)) {
530434f4c955SGuy Levi 					set_data_ptr_seg
530534f4c955SGuy Levi 					((struct mlx5_wqe_data_seg *)seg,
530634f4c955SGuy Levi 					 wr->sg_list + i);
5307e126ba97SEli Cohen 					size += sizeof(struct mlx5_wqe_data_seg) / 16;
530834f4c955SGuy Levi 					seg += sizeof(struct mlx5_wqe_data_seg);
5309e126ba97SEli Cohen 				}
5310e126ba97SEli Cohen 			}
5311e126ba97SEli Cohen 		}
5312e126ba97SEli Cohen 
53136e8484c5SMax Gurtovoy 		qp->next_fence = next_fence;
531434f4c955SGuy Levi 		finish_wqe(qp, ctrl, seg, size, cur_edge, idx, wr->wr_id, nreq,
531534f4c955SGuy Levi 			   fence, mlx5_ib_opcode[wr->opcode]);
5316e6631814SSagi Grimberg skip_psv:
5317e126ba97SEli Cohen 		if (0)
5318e126ba97SEli Cohen 			dump_wqe(qp, idx, size);
5319e126ba97SEli Cohen 	}
5320e126ba97SEli Cohen 
5321e126ba97SEli Cohen out:
5322e126ba97SEli Cohen 	if (likely(nreq)) {
5323e126ba97SEli Cohen 		qp->sq.head += nreq;
5324e126ba97SEli Cohen 
5325e126ba97SEli Cohen 		/* Make sure that descriptors are written before
5326e126ba97SEli Cohen 		 * updating doorbell record and ringing the doorbell
5327e126ba97SEli Cohen 		 */
5328e126ba97SEli Cohen 		wmb();
5329e126ba97SEli Cohen 
5330e126ba97SEli Cohen 		qp->db.db[MLX5_SND_DBR] = cpu_to_be32(qp->sq.cur_post);
5331e126ba97SEli Cohen 
5332ada388f7SEli Cohen 		/* Make sure doorbell record is visible to the HCA before
5333ada388f7SEli Cohen 		 * we hit doorbell */
5334ada388f7SEli Cohen 		wmb();
5335ada388f7SEli Cohen 
5336bbf29f61SMaxim Mikityanskiy 		mlx5_write64((__be32 *)ctrl, bf->bfreg->map + bf->offset);
5337e126ba97SEli Cohen 		/* Make sure doorbells don't leak out of SQ spinlock
5338e126ba97SEli Cohen 		 * and reach the HCA out of order.
5339e126ba97SEli Cohen 		 */
5340e126ba97SEli Cohen 		bf->offset ^= bf->buf_size;
5341e126ba97SEli Cohen 	}
5342e126ba97SEli Cohen 
5343e126ba97SEli Cohen 	spin_unlock_irqrestore(&qp->sq.lock, flags);
5344e126ba97SEli Cohen 
5345e126ba97SEli Cohen 	return err;
5346e126ba97SEli Cohen }
5347e126ba97SEli Cohen 
5348d34ac5cdSBart Van Assche int mlx5_ib_post_send(struct ib_qp *ibqp, const struct ib_send_wr *wr,
5349d34ac5cdSBart Van Assche 		      const struct ib_send_wr **bad_wr)
5350d0e84c0aSYishai Hadas {
5351d0e84c0aSYishai Hadas 	return _mlx5_ib_post_send(ibqp, wr, bad_wr, false);
5352d0e84c0aSYishai Hadas }
5353d0e84c0aSYishai Hadas 
5354e126ba97SEli Cohen static void set_sig_seg(struct mlx5_rwqe_sig *sig, int size)
5355e126ba97SEli Cohen {
5356e126ba97SEli Cohen 	sig->signature = calc_sig(sig, size);
5357e126ba97SEli Cohen }
5358e126ba97SEli Cohen 
5359d34ac5cdSBart Van Assche static int _mlx5_ib_post_recv(struct ib_qp *ibqp, const struct ib_recv_wr *wr,
5360d34ac5cdSBart Van Assche 		      const struct ib_recv_wr **bad_wr, bool drain)
5361e126ba97SEli Cohen {
5362e126ba97SEli Cohen 	struct mlx5_ib_qp *qp = to_mqp(ibqp);
5363e126ba97SEli Cohen 	struct mlx5_wqe_data_seg *scat;
5364e126ba97SEli Cohen 	struct mlx5_rwqe_sig *sig;
536589ea94a7SMaor Gottlieb 	struct mlx5_ib_dev *dev = to_mdev(ibqp->device);
536689ea94a7SMaor Gottlieb 	struct mlx5_core_dev *mdev = dev->mdev;
5367e126ba97SEli Cohen 	unsigned long flags;
5368e126ba97SEli Cohen 	int err = 0;
5369e126ba97SEli Cohen 	int nreq;
5370e126ba97SEli Cohen 	int ind;
5371e126ba97SEli Cohen 	int i;
5372e126ba97SEli Cohen 
53736c75520fSParav Pandit 	if (unlikely(mdev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR &&
53746c75520fSParav Pandit 		     !drain)) {
53756c75520fSParav Pandit 		*bad_wr = wr;
53766c75520fSParav Pandit 		return -EIO;
53776c75520fSParav Pandit 	}
53786c75520fSParav Pandit 
5379d16e91daSHaggai Eran 	if (unlikely(ibqp->qp_type == IB_QPT_GSI))
5380d16e91daSHaggai Eran 		return mlx5_ib_gsi_post_recv(ibqp, wr, bad_wr);
5381d16e91daSHaggai Eran 
5382e126ba97SEli Cohen 	spin_lock_irqsave(&qp->rq.lock, flags);
5383e126ba97SEli Cohen 
5384e126ba97SEli Cohen 	ind = qp->rq.head & (qp->rq.wqe_cnt - 1);
5385e126ba97SEli Cohen 
5386e126ba97SEli Cohen 	for (nreq = 0; wr; nreq++, wr = wr->next) {
5387e126ba97SEli Cohen 		if (mlx5_wq_overflow(&qp->rq, nreq, qp->ibqp.recv_cq)) {
5388e126ba97SEli Cohen 			err = -ENOMEM;
5389e126ba97SEli Cohen 			*bad_wr = wr;
5390e126ba97SEli Cohen 			goto out;
5391e126ba97SEli Cohen 		}
5392e126ba97SEli Cohen 
5393e126ba97SEli Cohen 		if (unlikely(wr->num_sge > qp->rq.max_gs)) {
5394e126ba97SEli Cohen 			err = -EINVAL;
5395e126ba97SEli Cohen 			*bad_wr = wr;
5396e126ba97SEli Cohen 			goto out;
5397e126ba97SEli Cohen 		}
5398e126ba97SEli Cohen 
539934f4c955SGuy Levi 		scat = mlx5_frag_buf_get_wqe(&qp->rq.fbc, ind);
5400e126ba97SEli Cohen 		if (qp->wq_sig)
5401e126ba97SEli Cohen 			scat++;
5402e126ba97SEli Cohen 
5403e126ba97SEli Cohen 		for (i = 0; i < wr->num_sge; i++)
5404e126ba97SEli Cohen 			set_data_ptr_seg(scat + i, wr->sg_list + i);
5405e126ba97SEli Cohen 
5406e126ba97SEli Cohen 		if (i < qp->rq.max_gs) {
5407e126ba97SEli Cohen 			scat[i].byte_count = 0;
5408e126ba97SEli Cohen 			scat[i].lkey       = cpu_to_be32(MLX5_INVALID_LKEY);
5409e126ba97SEli Cohen 			scat[i].addr       = 0;
5410e126ba97SEli Cohen 		}
5411e126ba97SEli Cohen 
5412e126ba97SEli Cohen 		if (qp->wq_sig) {
5413e126ba97SEli Cohen 			sig = (struct mlx5_rwqe_sig *)scat;
5414e126ba97SEli Cohen 			set_sig_seg(sig, (qp->rq.max_gs + 1) << 2);
5415e126ba97SEli Cohen 		}
5416e126ba97SEli Cohen 
5417e126ba97SEli Cohen 		qp->rq.wrid[ind] = wr->wr_id;
5418e126ba97SEli Cohen 
5419e126ba97SEli Cohen 		ind = (ind + 1) & (qp->rq.wqe_cnt - 1);
5420e126ba97SEli Cohen 	}
5421e126ba97SEli Cohen 
5422e126ba97SEli Cohen out:
5423e126ba97SEli Cohen 	if (likely(nreq)) {
5424e126ba97SEli Cohen 		qp->rq.head += nreq;
5425e126ba97SEli Cohen 
5426e126ba97SEli Cohen 		/* Make sure that descriptors are written before
5427e126ba97SEli Cohen 		 * doorbell record.
5428e126ba97SEli Cohen 		 */
5429e126ba97SEli Cohen 		wmb();
5430e126ba97SEli Cohen 
5431e126ba97SEli Cohen 		*qp->db.db = cpu_to_be32(qp->rq.head & 0xffff);
5432e126ba97SEli Cohen 	}
5433e126ba97SEli Cohen 
5434e126ba97SEli Cohen 	spin_unlock_irqrestore(&qp->rq.lock, flags);
5435e126ba97SEli Cohen 
5436e126ba97SEli Cohen 	return err;
5437e126ba97SEli Cohen }
5438e126ba97SEli Cohen 
5439d34ac5cdSBart Van Assche int mlx5_ib_post_recv(struct ib_qp *ibqp, const struct ib_recv_wr *wr,
5440d34ac5cdSBart Van Assche 		      const struct ib_recv_wr **bad_wr)
5441d0e84c0aSYishai Hadas {
5442d0e84c0aSYishai Hadas 	return _mlx5_ib_post_recv(ibqp, wr, bad_wr, false);
5443d0e84c0aSYishai Hadas }
5444d0e84c0aSYishai Hadas 
5445e126ba97SEli Cohen static inline enum ib_qp_state to_ib_qp_state(enum mlx5_qp_state mlx5_state)
5446e126ba97SEli Cohen {
5447e126ba97SEli Cohen 	switch (mlx5_state) {
5448e126ba97SEli Cohen 	case MLX5_QP_STATE_RST:      return IB_QPS_RESET;
5449e126ba97SEli Cohen 	case MLX5_QP_STATE_INIT:     return IB_QPS_INIT;
5450e126ba97SEli Cohen 	case MLX5_QP_STATE_RTR:      return IB_QPS_RTR;
5451e126ba97SEli Cohen 	case MLX5_QP_STATE_RTS:      return IB_QPS_RTS;
5452e126ba97SEli Cohen 	case MLX5_QP_STATE_SQ_DRAINING:
5453e126ba97SEli Cohen 	case MLX5_QP_STATE_SQD:      return IB_QPS_SQD;
5454e126ba97SEli Cohen 	case MLX5_QP_STATE_SQER:     return IB_QPS_SQE;
5455e126ba97SEli Cohen 	case MLX5_QP_STATE_ERR:      return IB_QPS_ERR;
5456e126ba97SEli Cohen 	default:		     return -1;
5457e126ba97SEli Cohen 	}
5458e126ba97SEli Cohen }
5459e126ba97SEli Cohen 
5460e126ba97SEli Cohen static inline enum ib_mig_state to_ib_mig_state(int mlx5_mig_state)
5461e126ba97SEli Cohen {
5462e126ba97SEli Cohen 	switch (mlx5_mig_state) {
5463e126ba97SEli Cohen 	case MLX5_QP_PM_ARMED:		return IB_MIG_ARMED;
5464e126ba97SEli Cohen 	case MLX5_QP_PM_REARM:		return IB_MIG_REARM;
5465e126ba97SEli Cohen 	case MLX5_QP_PM_MIGRATED:	return IB_MIG_MIGRATED;
5466e126ba97SEli Cohen 	default: return -1;
5467e126ba97SEli Cohen 	}
5468e126ba97SEli Cohen }
5469e126ba97SEli Cohen 
5470e126ba97SEli Cohen static int to_ib_qp_access_flags(int mlx5_flags)
5471e126ba97SEli Cohen {
5472e126ba97SEli Cohen 	int ib_flags = 0;
5473e126ba97SEli Cohen 
5474e126ba97SEli Cohen 	if (mlx5_flags & MLX5_QP_BIT_RRE)
5475e126ba97SEli Cohen 		ib_flags |= IB_ACCESS_REMOTE_READ;
5476e126ba97SEli Cohen 	if (mlx5_flags & MLX5_QP_BIT_RWE)
5477e126ba97SEli Cohen 		ib_flags |= IB_ACCESS_REMOTE_WRITE;
5478e126ba97SEli Cohen 	if (mlx5_flags & MLX5_QP_BIT_RAE)
5479e126ba97SEli Cohen 		ib_flags |= IB_ACCESS_REMOTE_ATOMIC;
5480e126ba97SEli Cohen 
5481e126ba97SEli Cohen 	return ib_flags;
5482e126ba97SEli Cohen }
5483e126ba97SEli Cohen 
548438349389SDasaratharaman Chandramouli static void to_rdma_ah_attr(struct mlx5_ib_dev *ibdev,
5485d8966fcdSDasaratharaman Chandramouli 			    struct rdma_ah_attr *ah_attr,
5486e126ba97SEli Cohen 			    struct mlx5_qp_path *path)
5487e126ba97SEli Cohen {
5488e126ba97SEli Cohen 
5489d8966fcdSDasaratharaman Chandramouli 	memset(ah_attr, 0, sizeof(*ah_attr));
5490e126ba97SEli Cohen 
5491e7996a9aSJason Gunthorpe 	if (!path->port || path->port > ibdev->num_ports)
5492e126ba97SEli Cohen 		return;
5493e126ba97SEli Cohen 
5494ae59c3f0SLeon Romanovsky 	ah_attr->type = rdma_ah_find_type(&ibdev->ib_dev, path->port);
5495ae59c3f0SLeon Romanovsky 
5496d8966fcdSDasaratharaman Chandramouli 	rdma_ah_set_port_num(ah_attr, path->port);
5497d8966fcdSDasaratharaman Chandramouli 	rdma_ah_set_sl(ah_attr, path->dci_cfi_prio_sl & 0xf);
5498e126ba97SEli Cohen 
5499d8966fcdSDasaratharaman Chandramouli 	rdma_ah_set_dlid(ah_attr, be16_to_cpu(path->rlid));
5500d8966fcdSDasaratharaman Chandramouli 	rdma_ah_set_path_bits(ah_attr, path->grh_mlid & 0x7f);
5501d8966fcdSDasaratharaman Chandramouli 	rdma_ah_set_static_rate(ah_attr,
5502d8966fcdSDasaratharaman Chandramouli 				path->static_rate ? path->static_rate - 5 : 0);
5503d8966fcdSDasaratharaman Chandramouli 	if (path->grh_mlid & (1 << 7)) {
5504d8966fcdSDasaratharaman Chandramouli 		u32 tc_fl = be32_to_cpu(path->tclass_flowlabel);
5505d8966fcdSDasaratharaman Chandramouli 
5506d8966fcdSDasaratharaman Chandramouli 		rdma_ah_set_grh(ah_attr, NULL,
5507d8966fcdSDasaratharaman Chandramouli 				tc_fl & 0xfffff,
5508d8966fcdSDasaratharaman Chandramouli 				path->mgid_index,
5509d8966fcdSDasaratharaman Chandramouli 				path->hop_limit,
5510d8966fcdSDasaratharaman Chandramouli 				(tc_fl >> 20) & 0xff);
5511d8966fcdSDasaratharaman Chandramouli 		rdma_ah_set_dgid_raw(ah_attr, path->rgid);
5512e126ba97SEli Cohen 	}
5513e126ba97SEli Cohen }
5514e126ba97SEli Cohen 
55156d2f89dfSmajd@mellanox.com static int query_raw_packet_qp_sq_state(struct mlx5_ib_dev *dev,
55166d2f89dfSmajd@mellanox.com 					struct mlx5_ib_sq *sq,
55176d2f89dfSmajd@mellanox.com 					u8 *sq_state)
5518e126ba97SEli Cohen {
55196d2f89dfSmajd@mellanox.com 	int err;
55206d2f89dfSmajd@mellanox.com 
552128160771SEran Ben Elisha 	err = mlx5_core_query_sq_state(dev->mdev, sq->base.mqp.qpn, sq_state);
55226d2f89dfSmajd@mellanox.com 	if (err)
55236d2f89dfSmajd@mellanox.com 		goto out;
55246d2f89dfSmajd@mellanox.com 	sq->state = *sq_state;
55256d2f89dfSmajd@mellanox.com 
55266d2f89dfSmajd@mellanox.com out:
55276d2f89dfSmajd@mellanox.com 	return err;
55286d2f89dfSmajd@mellanox.com }
55296d2f89dfSmajd@mellanox.com 
55306d2f89dfSmajd@mellanox.com static int query_raw_packet_qp_rq_state(struct mlx5_ib_dev *dev,
55316d2f89dfSmajd@mellanox.com 					struct mlx5_ib_rq *rq,
55326d2f89dfSmajd@mellanox.com 					u8 *rq_state)
55336d2f89dfSmajd@mellanox.com {
55346d2f89dfSmajd@mellanox.com 	void *out;
55356d2f89dfSmajd@mellanox.com 	void *rqc;
55366d2f89dfSmajd@mellanox.com 	int inlen;
55376d2f89dfSmajd@mellanox.com 	int err;
55386d2f89dfSmajd@mellanox.com 
55396d2f89dfSmajd@mellanox.com 	inlen = MLX5_ST_SZ_BYTES(query_rq_out);
55401b9a07eeSLeon Romanovsky 	out = kvzalloc(inlen, GFP_KERNEL);
55416d2f89dfSmajd@mellanox.com 	if (!out)
55426d2f89dfSmajd@mellanox.com 		return -ENOMEM;
55436d2f89dfSmajd@mellanox.com 
55446d2f89dfSmajd@mellanox.com 	err = mlx5_core_query_rq(dev->mdev, rq->base.mqp.qpn, out);
55456d2f89dfSmajd@mellanox.com 	if (err)
55466d2f89dfSmajd@mellanox.com 		goto out;
55476d2f89dfSmajd@mellanox.com 
55486d2f89dfSmajd@mellanox.com 	rqc = MLX5_ADDR_OF(query_rq_out, out, rq_context);
55496d2f89dfSmajd@mellanox.com 	*rq_state = MLX5_GET(rqc, rqc, state);
55506d2f89dfSmajd@mellanox.com 	rq->state = *rq_state;
55516d2f89dfSmajd@mellanox.com 
55526d2f89dfSmajd@mellanox.com out:
55536d2f89dfSmajd@mellanox.com 	kvfree(out);
55546d2f89dfSmajd@mellanox.com 	return err;
55556d2f89dfSmajd@mellanox.com }
55566d2f89dfSmajd@mellanox.com 
55576d2f89dfSmajd@mellanox.com static int sqrq_state_to_qp_state(u8 sq_state, u8 rq_state,
55586d2f89dfSmajd@mellanox.com 				  struct mlx5_ib_qp *qp, u8 *qp_state)
55596d2f89dfSmajd@mellanox.com {
55606d2f89dfSmajd@mellanox.com 	static const u8 sqrq_trans[MLX5_RQ_NUM_STATE][MLX5_SQ_NUM_STATE] = {
55616d2f89dfSmajd@mellanox.com 		[MLX5_RQC_STATE_RST] = {
55626d2f89dfSmajd@mellanox.com 			[MLX5_SQC_STATE_RST]	= IB_QPS_RESET,
55636d2f89dfSmajd@mellanox.com 			[MLX5_SQC_STATE_RDY]	= MLX5_QP_STATE_BAD,
55646d2f89dfSmajd@mellanox.com 			[MLX5_SQC_STATE_ERR]	= MLX5_QP_STATE_BAD,
55656d2f89dfSmajd@mellanox.com 			[MLX5_SQ_STATE_NA]	= IB_QPS_RESET,
55666d2f89dfSmajd@mellanox.com 		},
55676d2f89dfSmajd@mellanox.com 		[MLX5_RQC_STATE_RDY] = {
55686d2f89dfSmajd@mellanox.com 			[MLX5_SQC_STATE_RST]	= MLX5_QP_STATE_BAD,
55696d2f89dfSmajd@mellanox.com 			[MLX5_SQC_STATE_RDY]	= MLX5_QP_STATE,
55706d2f89dfSmajd@mellanox.com 			[MLX5_SQC_STATE_ERR]	= IB_QPS_SQE,
55716d2f89dfSmajd@mellanox.com 			[MLX5_SQ_STATE_NA]	= MLX5_QP_STATE,
55726d2f89dfSmajd@mellanox.com 		},
55736d2f89dfSmajd@mellanox.com 		[MLX5_RQC_STATE_ERR] = {
55746d2f89dfSmajd@mellanox.com 			[MLX5_SQC_STATE_RST]    = MLX5_QP_STATE_BAD,
55756d2f89dfSmajd@mellanox.com 			[MLX5_SQC_STATE_RDY]	= MLX5_QP_STATE_BAD,
55766d2f89dfSmajd@mellanox.com 			[MLX5_SQC_STATE_ERR]	= IB_QPS_ERR,
55776d2f89dfSmajd@mellanox.com 			[MLX5_SQ_STATE_NA]	= IB_QPS_ERR,
55786d2f89dfSmajd@mellanox.com 		},
55796d2f89dfSmajd@mellanox.com 		[MLX5_RQ_STATE_NA] = {
55806d2f89dfSmajd@mellanox.com 			[MLX5_SQC_STATE_RST]    = IB_QPS_RESET,
55816d2f89dfSmajd@mellanox.com 			[MLX5_SQC_STATE_RDY]	= MLX5_QP_STATE,
55826d2f89dfSmajd@mellanox.com 			[MLX5_SQC_STATE_ERR]	= MLX5_QP_STATE,
55836d2f89dfSmajd@mellanox.com 			[MLX5_SQ_STATE_NA]	= MLX5_QP_STATE_BAD,
55846d2f89dfSmajd@mellanox.com 		},
55856d2f89dfSmajd@mellanox.com 	};
55866d2f89dfSmajd@mellanox.com 
55876d2f89dfSmajd@mellanox.com 	*qp_state = sqrq_trans[rq_state][sq_state];
55886d2f89dfSmajd@mellanox.com 
55896d2f89dfSmajd@mellanox.com 	if (*qp_state == MLX5_QP_STATE_BAD) {
55906d2f89dfSmajd@mellanox.com 		WARN(1, "Buggy Raw Packet QP state, SQ 0x%x state: 0x%x, RQ 0x%x state: 0x%x",
55916d2f89dfSmajd@mellanox.com 		     qp->raw_packet_qp.sq.base.mqp.qpn, sq_state,
55926d2f89dfSmajd@mellanox.com 		     qp->raw_packet_qp.rq.base.mqp.qpn, rq_state);
55936d2f89dfSmajd@mellanox.com 		return -EINVAL;
55946d2f89dfSmajd@mellanox.com 	}
55956d2f89dfSmajd@mellanox.com 
55966d2f89dfSmajd@mellanox.com 	if (*qp_state == MLX5_QP_STATE)
55976d2f89dfSmajd@mellanox.com 		*qp_state = qp->state;
55986d2f89dfSmajd@mellanox.com 
55996d2f89dfSmajd@mellanox.com 	return 0;
56006d2f89dfSmajd@mellanox.com }
56016d2f89dfSmajd@mellanox.com 
56026d2f89dfSmajd@mellanox.com static int query_raw_packet_qp_state(struct mlx5_ib_dev *dev,
56036d2f89dfSmajd@mellanox.com 				     struct mlx5_ib_qp *qp,
56046d2f89dfSmajd@mellanox.com 				     u8 *raw_packet_qp_state)
56056d2f89dfSmajd@mellanox.com {
56066d2f89dfSmajd@mellanox.com 	struct mlx5_ib_raw_packet_qp *raw_packet_qp = &qp->raw_packet_qp;
56076d2f89dfSmajd@mellanox.com 	struct mlx5_ib_sq *sq = &raw_packet_qp->sq;
56086d2f89dfSmajd@mellanox.com 	struct mlx5_ib_rq *rq = &raw_packet_qp->rq;
56096d2f89dfSmajd@mellanox.com 	int err;
56106d2f89dfSmajd@mellanox.com 	u8 sq_state = MLX5_SQ_STATE_NA;
56116d2f89dfSmajd@mellanox.com 	u8 rq_state = MLX5_RQ_STATE_NA;
56126d2f89dfSmajd@mellanox.com 
56136d2f89dfSmajd@mellanox.com 	if (qp->sq.wqe_cnt) {
56146d2f89dfSmajd@mellanox.com 		err = query_raw_packet_qp_sq_state(dev, sq, &sq_state);
56156d2f89dfSmajd@mellanox.com 		if (err)
56166d2f89dfSmajd@mellanox.com 			return err;
56176d2f89dfSmajd@mellanox.com 	}
56186d2f89dfSmajd@mellanox.com 
56196d2f89dfSmajd@mellanox.com 	if (qp->rq.wqe_cnt) {
56206d2f89dfSmajd@mellanox.com 		err = query_raw_packet_qp_rq_state(dev, rq, &rq_state);
56216d2f89dfSmajd@mellanox.com 		if (err)
56226d2f89dfSmajd@mellanox.com 			return err;
56236d2f89dfSmajd@mellanox.com 	}
56246d2f89dfSmajd@mellanox.com 
56256d2f89dfSmajd@mellanox.com 	return sqrq_state_to_qp_state(sq_state, rq_state, qp,
56266d2f89dfSmajd@mellanox.com 				      raw_packet_qp_state);
56276d2f89dfSmajd@mellanox.com }
56286d2f89dfSmajd@mellanox.com 
56296d2f89dfSmajd@mellanox.com static int query_qp_attr(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp,
56306d2f89dfSmajd@mellanox.com 			 struct ib_qp_attr *qp_attr)
56316d2f89dfSmajd@mellanox.com {
563209a7d9ecSSaeed Mahameed 	int outlen = MLX5_ST_SZ_BYTES(query_qp_out);
5633e126ba97SEli Cohen 	struct mlx5_qp_context *context;
5634e126ba97SEli Cohen 	int mlx5_state;
563509a7d9ecSSaeed Mahameed 	u32 *outb;
5636e126ba97SEli Cohen 	int err = 0;
5637e126ba97SEli Cohen 
563809a7d9ecSSaeed Mahameed 	outb = kzalloc(outlen, GFP_KERNEL);
56396d2f89dfSmajd@mellanox.com 	if (!outb)
56406d2f89dfSmajd@mellanox.com 		return -ENOMEM;
56416d2f89dfSmajd@mellanox.com 
564219098df2Smajd@mellanox.com 	err = mlx5_core_qp_query(dev->mdev, &qp->trans_qp.base.mqp, outb,
564309a7d9ecSSaeed Mahameed 				 outlen);
5644e126ba97SEli Cohen 	if (err)
56456d2f89dfSmajd@mellanox.com 		goto out;
5646e126ba97SEli Cohen 
564709a7d9ecSSaeed Mahameed 	/* FIXME: use MLX5_GET rather than mlx5_qp_context manual struct */
564809a7d9ecSSaeed Mahameed 	context = (struct mlx5_qp_context *)MLX5_ADDR_OF(query_qp_out, outb, qpc);
564909a7d9ecSSaeed Mahameed 
5650e126ba97SEli Cohen 	mlx5_state = be32_to_cpu(context->flags) >> 28;
5651e126ba97SEli Cohen 
5652e126ba97SEli Cohen 	qp->state		     = to_ib_qp_state(mlx5_state);
5653e126ba97SEli Cohen 	qp_attr->path_mtu	     = context->mtu_msgmax >> 5;
5654e126ba97SEli Cohen 	qp_attr->path_mig_state	     =
5655e126ba97SEli Cohen 		to_ib_mig_state((be32_to_cpu(context->flags) >> 11) & 0x3);
5656e126ba97SEli Cohen 	qp_attr->qkey		     = be32_to_cpu(context->qkey);
5657e126ba97SEli Cohen 	qp_attr->rq_psn		     = be32_to_cpu(context->rnr_nextrecvpsn) & 0xffffff;
5658e126ba97SEli Cohen 	qp_attr->sq_psn		     = be32_to_cpu(context->next_send_psn) & 0xffffff;
5659e126ba97SEli Cohen 	qp_attr->dest_qp_num	     = be32_to_cpu(context->log_pg_sz_remote_qpn) & 0xffffff;
5660e126ba97SEli Cohen 	qp_attr->qp_access_flags     =
5661e126ba97SEli Cohen 		to_ib_qp_access_flags(be32_to_cpu(context->params2));
5662e126ba97SEli Cohen 
5663e126ba97SEli Cohen 	if (qp->ibqp.qp_type == IB_QPT_RC || qp->ibqp.qp_type == IB_QPT_UC) {
566438349389SDasaratharaman Chandramouli 		to_rdma_ah_attr(dev, &qp_attr->ah_attr, &context->pri_path);
566538349389SDasaratharaman Chandramouli 		to_rdma_ah_attr(dev, &qp_attr->alt_ah_attr, &context->alt_path);
5666d3ae2bdeSNoa Osherovich 		qp_attr->alt_pkey_index =
5667d3ae2bdeSNoa Osherovich 			be16_to_cpu(context->alt_path.pkey_index);
5668d8966fcdSDasaratharaman Chandramouli 		qp_attr->alt_port_num	=
5669d8966fcdSDasaratharaman Chandramouli 			rdma_ah_get_port_num(&qp_attr->alt_ah_attr);
5670e126ba97SEli Cohen 	}
5671e126ba97SEli Cohen 
5672d3ae2bdeSNoa Osherovich 	qp_attr->pkey_index = be16_to_cpu(context->pri_path.pkey_index);
5673e126ba97SEli Cohen 	qp_attr->port_num = context->pri_path.port;
5674e126ba97SEli Cohen 
5675e126ba97SEli Cohen 	/* qp_attr->en_sqd_async_notify is only applicable in modify qp */
5676e126ba97SEli Cohen 	qp_attr->sq_draining = mlx5_state == MLX5_QP_STATE_SQ_DRAINING;
5677e126ba97SEli Cohen 
5678e126ba97SEli Cohen 	qp_attr->max_rd_atomic = 1 << ((be32_to_cpu(context->params1) >> 21) & 0x7);
5679e126ba97SEli Cohen 
5680e126ba97SEli Cohen 	qp_attr->max_dest_rd_atomic =
5681e126ba97SEli Cohen 		1 << ((be32_to_cpu(context->params2) >> 21) & 0x7);
5682e126ba97SEli Cohen 	qp_attr->min_rnr_timer	    =
5683e126ba97SEli Cohen 		(be32_to_cpu(context->rnr_nextrecvpsn) >> 24) & 0x1f;
5684e126ba97SEli Cohen 	qp_attr->timeout	    = context->pri_path.ackto_lt >> 3;
5685e126ba97SEli Cohen 	qp_attr->retry_cnt	    = (be32_to_cpu(context->params1) >> 16) & 0x7;
5686e126ba97SEli Cohen 	qp_attr->rnr_retry	    = (be32_to_cpu(context->params1) >> 13) & 0x7;
5687e126ba97SEli Cohen 	qp_attr->alt_timeout	    = context->alt_path.ackto_lt >> 3;
56886d2f89dfSmajd@mellanox.com 
56896d2f89dfSmajd@mellanox.com out:
56906d2f89dfSmajd@mellanox.com 	kfree(outb);
56916d2f89dfSmajd@mellanox.com 	return err;
56926d2f89dfSmajd@mellanox.com }
56936d2f89dfSmajd@mellanox.com 
5694776a3906SMoni Shoua static int mlx5_ib_dct_query_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *mqp,
5695776a3906SMoni Shoua 				struct ib_qp_attr *qp_attr, int qp_attr_mask,
5696776a3906SMoni Shoua 				struct ib_qp_init_attr *qp_init_attr)
5697776a3906SMoni Shoua {
5698776a3906SMoni Shoua 	struct mlx5_core_dct	*dct = &mqp->dct.mdct;
5699776a3906SMoni Shoua 	u32 *out;
5700776a3906SMoni Shoua 	u32 access_flags = 0;
5701776a3906SMoni Shoua 	int outlen = MLX5_ST_SZ_BYTES(query_dct_out);
5702776a3906SMoni Shoua 	void *dctc;
5703776a3906SMoni Shoua 	int err;
5704776a3906SMoni Shoua 	int supported_mask = IB_QP_STATE |
5705776a3906SMoni Shoua 			     IB_QP_ACCESS_FLAGS |
5706776a3906SMoni Shoua 			     IB_QP_PORT |
5707776a3906SMoni Shoua 			     IB_QP_MIN_RNR_TIMER |
5708776a3906SMoni Shoua 			     IB_QP_AV |
5709776a3906SMoni Shoua 			     IB_QP_PATH_MTU |
5710776a3906SMoni Shoua 			     IB_QP_PKEY_INDEX;
5711776a3906SMoni Shoua 
5712776a3906SMoni Shoua 	if (qp_attr_mask & ~supported_mask)
5713776a3906SMoni Shoua 		return -EINVAL;
5714776a3906SMoni Shoua 	if (mqp->state != IB_QPS_RTR)
5715776a3906SMoni Shoua 		return -EINVAL;
5716776a3906SMoni Shoua 
5717776a3906SMoni Shoua 	out = kzalloc(outlen, GFP_KERNEL);
5718776a3906SMoni Shoua 	if (!out)
5719776a3906SMoni Shoua 		return -ENOMEM;
5720776a3906SMoni Shoua 
5721776a3906SMoni Shoua 	err = mlx5_core_dct_query(dev->mdev, dct, out, outlen);
5722776a3906SMoni Shoua 	if (err)
5723776a3906SMoni Shoua 		goto out;
5724776a3906SMoni Shoua 
5725776a3906SMoni Shoua 	dctc = MLX5_ADDR_OF(query_dct_out, out, dct_context_entry);
5726776a3906SMoni Shoua 
5727776a3906SMoni Shoua 	if (qp_attr_mask & IB_QP_STATE)
5728776a3906SMoni Shoua 		qp_attr->qp_state = IB_QPS_RTR;
5729776a3906SMoni Shoua 
5730776a3906SMoni Shoua 	if (qp_attr_mask & IB_QP_ACCESS_FLAGS) {
5731776a3906SMoni Shoua 		if (MLX5_GET(dctc, dctc, rre))
5732776a3906SMoni Shoua 			access_flags |= IB_ACCESS_REMOTE_READ;
5733776a3906SMoni Shoua 		if (MLX5_GET(dctc, dctc, rwe))
5734776a3906SMoni Shoua 			access_flags |= IB_ACCESS_REMOTE_WRITE;
5735776a3906SMoni Shoua 		if (MLX5_GET(dctc, dctc, rae))
5736776a3906SMoni Shoua 			access_flags |= IB_ACCESS_REMOTE_ATOMIC;
5737776a3906SMoni Shoua 		qp_attr->qp_access_flags = access_flags;
5738776a3906SMoni Shoua 	}
5739776a3906SMoni Shoua 
5740776a3906SMoni Shoua 	if (qp_attr_mask & IB_QP_PORT)
5741776a3906SMoni Shoua 		qp_attr->port_num = MLX5_GET(dctc, dctc, port);
5742776a3906SMoni Shoua 	if (qp_attr_mask & IB_QP_MIN_RNR_TIMER)
5743776a3906SMoni Shoua 		qp_attr->min_rnr_timer = MLX5_GET(dctc, dctc, min_rnr_nak);
5744776a3906SMoni Shoua 	if (qp_attr_mask & IB_QP_AV) {
5745776a3906SMoni Shoua 		qp_attr->ah_attr.grh.traffic_class = MLX5_GET(dctc, dctc, tclass);
5746776a3906SMoni Shoua 		qp_attr->ah_attr.grh.flow_label = MLX5_GET(dctc, dctc, flow_label);
5747776a3906SMoni Shoua 		qp_attr->ah_attr.grh.sgid_index = MLX5_GET(dctc, dctc, my_addr_index);
5748776a3906SMoni Shoua 		qp_attr->ah_attr.grh.hop_limit = MLX5_GET(dctc, dctc, hop_limit);
5749776a3906SMoni Shoua 	}
5750776a3906SMoni Shoua 	if (qp_attr_mask & IB_QP_PATH_MTU)
5751776a3906SMoni Shoua 		qp_attr->path_mtu = MLX5_GET(dctc, dctc, mtu);
5752776a3906SMoni Shoua 	if (qp_attr_mask & IB_QP_PKEY_INDEX)
5753776a3906SMoni Shoua 		qp_attr->pkey_index = MLX5_GET(dctc, dctc, pkey_index);
5754776a3906SMoni Shoua out:
5755776a3906SMoni Shoua 	kfree(out);
5756776a3906SMoni Shoua 	return err;
5757776a3906SMoni Shoua }
5758776a3906SMoni Shoua 
57596d2f89dfSmajd@mellanox.com int mlx5_ib_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *qp_attr,
57606d2f89dfSmajd@mellanox.com 		     int qp_attr_mask, struct ib_qp_init_attr *qp_init_attr)
57616d2f89dfSmajd@mellanox.com {
57626d2f89dfSmajd@mellanox.com 	struct mlx5_ib_dev *dev = to_mdev(ibqp->device);
57636d2f89dfSmajd@mellanox.com 	struct mlx5_ib_qp *qp = to_mqp(ibqp);
57646d2f89dfSmajd@mellanox.com 	int err = 0;
57656d2f89dfSmajd@mellanox.com 	u8 raw_packet_qp_state;
57666d2f89dfSmajd@mellanox.com 
576728d61370SYishai Hadas 	if (ibqp->rwq_ind_tbl)
576828d61370SYishai Hadas 		return -ENOSYS;
576928d61370SYishai Hadas 
5770d16e91daSHaggai Eran 	if (unlikely(ibqp->qp_type == IB_QPT_GSI))
5771d16e91daSHaggai Eran 		return mlx5_ib_gsi_query_qp(ibqp, qp_attr, qp_attr_mask,
5772d16e91daSHaggai Eran 					    qp_init_attr);
5773d16e91daSHaggai Eran 
5774c2e53b2cSYishai Hadas 	/* Not all of output fields are applicable, make sure to zero them */
5775c2e53b2cSYishai Hadas 	memset(qp_init_attr, 0, sizeof(*qp_init_attr));
5776c2e53b2cSYishai Hadas 	memset(qp_attr, 0, sizeof(*qp_attr));
5777c2e53b2cSYishai Hadas 
5778776a3906SMoni Shoua 	if (unlikely(qp->qp_sub_type == MLX5_IB_QPT_DCT))
5779776a3906SMoni Shoua 		return mlx5_ib_dct_query_qp(dev, qp, qp_attr,
5780776a3906SMoni Shoua 					    qp_attr_mask, qp_init_attr);
5781776a3906SMoni Shoua 
57826d2f89dfSmajd@mellanox.com 	mutex_lock(&qp->mutex);
57836d2f89dfSmajd@mellanox.com 
5784c2e53b2cSYishai Hadas 	if (qp->ibqp.qp_type == IB_QPT_RAW_PACKET ||
5785c2e53b2cSYishai Hadas 	    qp->flags & MLX5_IB_QP_UNDERLAY) {
57866d2f89dfSmajd@mellanox.com 		err = query_raw_packet_qp_state(dev, qp, &raw_packet_qp_state);
57876d2f89dfSmajd@mellanox.com 		if (err)
57886d2f89dfSmajd@mellanox.com 			goto out;
57896d2f89dfSmajd@mellanox.com 		qp->state = raw_packet_qp_state;
57906d2f89dfSmajd@mellanox.com 		qp_attr->port_num = 1;
57916d2f89dfSmajd@mellanox.com 	} else {
57926d2f89dfSmajd@mellanox.com 		err = query_qp_attr(dev, qp, qp_attr);
57936d2f89dfSmajd@mellanox.com 		if (err)
57946d2f89dfSmajd@mellanox.com 			goto out;
57956d2f89dfSmajd@mellanox.com 	}
57966d2f89dfSmajd@mellanox.com 
57976d2f89dfSmajd@mellanox.com 	qp_attr->qp_state	     = qp->state;
5798e126ba97SEli Cohen 	qp_attr->cur_qp_state	     = qp_attr->qp_state;
5799e126ba97SEli Cohen 	qp_attr->cap.max_recv_wr     = qp->rq.wqe_cnt;
5800e126ba97SEli Cohen 	qp_attr->cap.max_recv_sge    = qp->rq.max_gs;
5801e126ba97SEli Cohen 
5802e126ba97SEli Cohen 	if (!ibqp->uobject) {
58030540d814SNoa Osherovich 		qp_attr->cap.max_send_wr  = qp->sq.max_post;
5804e126ba97SEli Cohen 		qp_attr->cap.max_send_sge = qp->sq.max_gs;
58050540d814SNoa Osherovich 		qp_init_attr->qp_context = ibqp->qp_context;
5806e126ba97SEli Cohen 	} else {
5807e126ba97SEli Cohen 		qp_attr->cap.max_send_wr  = 0;
5808e126ba97SEli Cohen 		qp_attr->cap.max_send_sge = 0;
5809e126ba97SEli Cohen 	}
5810e126ba97SEli Cohen 
58110540d814SNoa Osherovich 	qp_init_attr->qp_type = ibqp->qp_type;
58120540d814SNoa Osherovich 	qp_init_attr->recv_cq = ibqp->recv_cq;
58130540d814SNoa Osherovich 	qp_init_attr->send_cq = ibqp->send_cq;
58140540d814SNoa Osherovich 	qp_init_attr->srq = ibqp->srq;
58150540d814SNoa Osherovich 	qp_attr->cap.max_inline_data = qp->max_inline_data;
5816e126ba97SEli Cohen 
5817e126ba97SEli Cohen 	qp_init_attr->cap	     = qp_attr->cap;
5818e126ba97SEli Cohen 
5819e126ba97SEli Cohen 	qp_init_attr->create_flags = 0;
5820e126ba97SEli Cohen 	if (qp->flags & MLX5_IB_QP_BLOCK_MULTICAST_LOOPBACK)
5821e126ba97SEli Cohen 		qp_init_attr->create_flags |= IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK;
5822e126ba97SEli Cohen 
5823051f2630SLeon Romanovsky 	if (qp->flags & MLX5_IB_QP_CROSS_CHANNEL)
5824051f2630SLeon Romanovsky 		qp_init_attr->create_flags |= IB_QP_CREATE_CROSS_CHANNEL;
5825051f2630SLeon Romanovsky 	if (qp->flags & MLX5_IB_QP_MANAGED_SEND)
5826051f2630SLeon Romanovsky 		qp_init_attr->create_flags |= IB_QP_CREATE_MANAGED_SEND;
5827051f2630SLeon Romanovsky 	if (qp->flags & MLX5_IB_QP_MANAGED_RECV)
5828051f2630SLeon Romanovsky 		qp_init_attr->create_flags |= IB_QP_CREATE_MANAGED_RECV;
5829b11a4f9cSHaggai Eran 	if (qp->flags & MLX5_IB_QP_SQPN_QP1)
58303f89b01fSMichael Guralnik 		qp_init_attr->create_flags |= MLX5_IB_QP_CREATE_SQPN_QP1;
5831051f2630SLeon Romanovsky 
5832e126ba97SEli Cohen 	qp_init_attr->sq_sig_type = qp->sq_signal_bits & MLX5_WQE_CTRL_CQ_UPDATE ?
5833e126ba97SEli Cohen 		IB_SIGNAL_ALL_WR : IB_SIGNAL_REQ_WR;
5834e126ba97SEli Cohen 
5835e126ba97SEli Cohen out:
5836e126ba97SEli Cohen 	mutex_unlock(&qp->mutex);
5837e126ba97SEli Cohen 	return err;
5838e126ba97SEli Cohen }
5839e126ba97SEli Cohen 
5840e126ba97SEli Cohen struct ib_xrcd *mlx5_ib_alloc_xrcd(struct ib_device *ibdev,
5841e126ba97SEli Cohen 				   struct ib_udata *udata)
5842e126ba97SEli Cohen {
5843e126ba97SEli Cohen 	struct mlx5_ib_dev *dev = to_mdev(ibdev);
5844e126ba97SEli Cohen 	struct mlx5_ib_xrcd *xrcd;
5845e126ba97SEli Cohen 	int err;
5846e126ba97SEli Cohen 
5847938fe83cSSaeed Mahameed 	if (!MLX5_CAP_GEN(dev->mdev, xrc))
5848e126ba97SEli Cohen 		return ERR_PTR(-ENOSYS);
5849e126ba97SEli Cohen 
5850e126ba97SEli Cohen 	xrcd = kmalloc(sizeof(*xrcd), GFP_KERNEL);
5851e126ba97SEli Cohen 	if (!xrcd)
5852e126ba97SEli Cohen 		return ERR_PTR(-ENOMEM);
5853e126ba97SEli Cohen 
58545aa3771dSYishai Hadas 	err = mlx5_cmd_xrcd_alloc(dev->mdev, &xrcd->xrcdn, 0);
5855e126ba97SEli Cohen 	if (err) {
5856e126ba97SEli Cohen 		kfree(xrcd);
5857e126ba97SEli Cohen 		return ERR_PTR(-ENOMEM);
5858e126ba97SEli Cohen 	}
5859e126ba97SEli Cohen 
5860e126ba97SEli Cohen 	return &xrcd->ibxrcd;
5861e126ba97SEli Cohen }
5862e126ba97SEli Cohen 
5863c4367a26SShamir Rabinovitch int mlx5_ib_dealloc_xrcd(struct ib_xrcd *xrcd, struct ib_udata *udata)
5864e126ba97SEli Cohen {
5865e126ba97SEli Cohen 	struct mlx5_ib_dev *dev = to_mdev(xrcd->device);
5866e126ba97SEli Cohen 	u32 xrcdn = to_mxrcd(xrcd)->xrcdn;
5867e126ba97SEli Cohen 	int err;
5868e126ba97SEli Cohen 
58695aa3771dSYishai Hadas 	err = mlx5_cmd_xrcd_dealloc(dev->mdev, xrcdn, 0);
5870b081808aSLeon Romanovsky 	if (err)
5871e126ba97SEli Cohen 		mlx5_ib_warn(dev, "failed to dealloc xrcdn 0x%x\n", xrcdn);
5872e126ba97SEli Cohen 
5873e126ba97SEli Cohen 	kfree(xrcd);
5874e126ba97SEli Cohen 	return 0;
5875e126ba97SEli Cohen }
587679b20a6cSYishai Hadas 
5877350d0e4cSYishai Hadas static void mlx5_ib_wq_event(struct mlx5_core_qp *core_qp, int type)
5878350d0e4cSYishai Hadas {
5879350d0e4cSYishai Hadas 	struct mlx5_ib_rwq *rwq = to_mibrwq(core_qp);
5880350d0e4cSYishai Hadas 	struct mlx5_ib_dev *dev = to_mdev(rwq->ibwq.device);
5881350d0e4cSYishai Hadas 	struct ib_event event;
5882350d0e4cSYishai Hadas 
5883350d0e4cSYishai Hadas 	if (rwq->ibwq.event_handler) {
5884350d0e4cSYishai Hadas 		event.device     = rwq->ibwq.device;
5885350d0e4cSYishai Hadas 		event.element.wq = &rwq->ibwq;
5886350d0e4cSYishai Hadas 		switch (type) {
5887350d0e4cSYishai Hadas 		case MLX5_EVENT_TYPE_WQ_CATAS_ERROR:
5888350d0e4cSYishai Hadas 			event.event = IB_EVENT_WQ_FATAL;
5889350d0e4cSYishai Hadas 			break;
5890350d0e4cSYishai Hadas 		default:
5891350d0e4cSYishai Hadas 			mlx5_ib_warn(dev, "Unexpected event type %d on WQ %06x\n", type, core_qp->qpn);
5892350d0e4cSYishai Hadas 			return;
5893350d0e4cSYishai Hadas 		}
5894350d0e4cSYishai Hadas 
5895350d0e4cSYishai Hadas 		rwq->ibwq.event_handler(&event, rwq->ibwq.wq_context);
5896350d0e4cSYishai Hadas 	}
5897350d0e4cSYishai Hadas }
5898350d0e4cSYishai Hadas 
589903404e8aSMaor Gottlieb static int set_delay_drop(struct mlx5_ib_dev *dev)
590003404e8aSMaor Gottlieb {
590103404e8aSMaor Gottlieb 	int err = 0;
590203404e8aSMaor Gottlieb 
590303404e8aSMaor Gottlieb 	mutex_lock(&dev->delay_drop.lock);
590403404e8aSMaor Gottlieb 	if (dev->delay_drop.activate)
590503404e8aSMaor Gottlieb 		goto out;
590603404e8aSMaor Gottlieb 
590703404e8aSMaor Gottlieb 	err = mlx5_core_set_delay_drop(dev->mdev, dev->delay_drop.timeout);
590803404e8aSMaor Gottlieb 	if (err)
590903404e8aSMaor Gottlieb 		goto out;
591003404e8aSMaor Gottlieb 
591103404e8aSMaor Gottlieb 	dev->delay_drop.activate = true;
591203404e8aSMaor Gottlieb out:
591303404e8aSMaor Gottlieb 	mutex_unlock(&dev->delay_drop.lock);
5914fe248c3aSMaor Gottlieb 
5915fe248c3aSMaor Gottlieb 	if (!err)
5916fe248c3aSMaor Gottlieb 		atomic_inc(&dev->delay_drop.rqs_cnt);
591703404e8aSMaor Gottlieb 	return err;
591803404e8aSMaor Gottlieb }
591903404e8aSMaor Gottlieb 
592079b20a6cSYishai Hadas static int  create_rq(struct mlx5_ib_rwq *rwq, struct ib_pd *pd,
592179b20a6cSYishai Hadas 		      struct ib_wq_init_attr *init_attr)
592279b20a6cSYishai Hadas {
592379b20a6cSYishai Hadas 	struct mlx5_ib_dev *dev;
59244be6da1eSNoa Osherovich 	int has_net_offloads;
592579b20a6cSYishai Hadas 	__be64 *rq_pas0;
592679b20a6cSYishai Hadas 	void *in;
592779b20a6cSYishai Hadas 	void *rqc;
592879b20a6cSYishai Hadas 	void *wq;
592979b20a6cSYishai Hadas 	int inlen;
593079b20a6cSYishai Hadas 	int err;
593179b20a6cSYishai Hadas 
593279b20a6cSYishai Hadas 	dev = to_mdev(pd->device);
593379b20a6cSYishai Hadas 
593479b20a6cSYishai Hadas 	inlen = MLX5_ST_SZ_BYTES(create_rq_in) + sizeof(u64) * rwq->rq_num_pas;
59351b9a07eeSLeon Romanovsky 	in = kvzalloc(inlen, GFP_KERNEL);
593679b20a6cSYishai Hadas 	if (!in)
593779b20a6cSYishai Hadas 		return -ENOMEM;
593879b20a6cSYishai Hadas 
593934d57585SYishai Hadas 	MLX5_SET(create_rq_in, in, uid, to_mpd(pd)->uid);
594079b20a6cSYishai Hadas 	rqc = MLX5_ADDR_OF(create_rq_in, in, ctx);
594179b20a6cSYishai Hadas 	MLX5_SET(rqc,  rqc, mem_rq_type,
594279b20a6cSYishai Hadas 		 MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE);
594379b20a6cSYishai Hadas 	MLX5_SET(rqc, rqc, user_index, rwq->user_index);
594479b20a6cSYishai Hadas 	MLX5_SET(rqc,  rqc, cqn, to_mcq(init_attr->cq)->mcq.cqn);
594579b20a6cSYishai Hadas 	MLX5_SET(rqc,  rqc, state, MLX5_RQC_STATE_RST);
594679b20a6cSYishai Hadas 	MLX5_SET(rqc,  rqc, flush_in_error_en, 1);
594779b20a6cSYishai Hadas 	wq = MLX5_ADDR_OF(rqc, rqc, wq);
5948ccc87087SNoa Osherovich 	MLX5_SET(wq, wq, wq_type,
5949ccc87087SNoa Osherovich 		 rwq->create_flags & MLX5_IB_WQ_FLAGS_STRIDING_RQ ?
5950ccc87087SNoa Osherovich 		 MLX5_WQ_TYPE_CYCLIC_STRIDING_RQ : MLX5_WQ_TYPE_CYCLIC);
5951b1383aa6SNoa Osherovich 	if (init_attr->create_flags & IB_WQ_FLAGS_PCI_WRITE_END_PADDING) {
5952b1383aa6SNoa Osherovich 		if (!MLX5_CAP_GEN(dev->mdev, end_pad)) {
5953b1383aa6SNoa Osherovich 			mlx5_ib_dbg(dev, "Scatter end padding is not supported\n");
5954b1383aa6SNoa Osherovich 			err = -EOPNOTSUPP;
5955b1383aa6SNoa Osherovich 			goto out;
5956b1383aa6SNoa Osherovich 		} else {
595779b20a6cSYishai Hadas 			MLX5_SET(wq, wq, end_padding_mode, MLX5_WQ_END_PAD_MODE_ALIGN);
5958b1383aa6SNoa Osherovich 		}
5959b1383aa6SNoa Osherovich 	}
596079b20a6cSYishai Hadas 	MLX5_SET(wq, wq, log_wq_stride, rwq->log_rq_stride);
5961ccc87087SNoa Osherovich 	if (rwq->create_flags & MLX5_IB_WQ_FLAGS_STRIDING_RQ) {
5962c16339b6SMark Zhang 		/*
5963c16339b6SMark Zhang 		 * In Firmware number of strides in each WQE is:
5964c16339b6SMark Zhang 		 *   "512 * 2^single_wqe_log_num_of_strides"
5965c16339b6SMark Zhang 		 * Values 3 to 8 are accepted as 10 to 15, 9 to 18 are
5966c16339b6SMark Zhang 		 * accepted as 0 to 9
5967c16339b6SMark Zhang 		 */
5968c16339b6SMark Zhang 		static const u8 fw_map[] = { 10, 11, 12, 13, 14, 15, 0, 1,
5969c16339b6SMark Zhang 					     2,  3,  4,  5,  6,  7,  8, 9 };
5970ccc87087SNoa Osherovich 		MLX5_SET(wq, wq, two_byte_shift_en, rwq->two_byte_shift_en);
5971ccc87087SNoa Osherovich 		MLX5_SET(wq, wq, log_wqe_stride_size,
5972ccc87087SNoa Osherovich 			 rwq->single_stride_log_num_of_bytes -
5973ccc87087SNoa Osherovich 			 MLX5_MIN_SINGLE_STRIDE_LOG_NUM_BYTES);
5974c16339b6SMark Zhang 		MLX5_SET(wq, wq, log_wqe_num_of_strides,
5975c16339b6SMark Zhang 			 fw_map[rwq->log_num_strides -
5976c16339b6SMark Zhang 				MLX5_EXT_MIN_SINGLE_WQE_LOG_NUM_STRIDES]);
5977ccc87087SNoa Osherovich 	}
597879b20a6cSYishai Hadas 	MLX5_SET(wq, wq, log_wq_sz, rwq->log_rq_size);
597979b20a6cSYishai Hadas 	MLX5_SET(wq, wq, pd, to_mpd(pd)->pdn);
598079b20a6cSYishai Hadas 	MLX5_SET(wq, wq, page_offset, rwq->rq_page_offset);
598179b20a6cSYishai Hadas 	MLX5_SET(wq, wq, log_wq_pg_sz, rwq->log_page_size);
598279b20a6cSYishai Hadas 	MLX5_SET(wq, wq, wq_signature, rwq->wq_sig);
598379b20a6cSYishai Hadas 	MLX5_SET64(wq, wq, dbr_addr, rwq->db.dma);
59844be6da1eSNoa Osherovich 	has_net_offloads = MLX5_CAP_GEN(dev->mdev, eth_net_offloads);
5985b1f74a84SNoa Osherovich 	if (init_attr->create_flags & IB_WQ_FLAGS_CVLAN_STRIPPING) {
59864be6da1eSNoa Osherovich 		if (!(has_net_offloads && MLX5_CAP_ETH(dev->mdev, vlan_cap))) {
5987b1f74a84SNoa Osherovich 			mlx5_ib_dbg(dev, "VLAN offloads are not supported\n");
5988b1f74a84SNoa Osherovich 			err = -EOPNOTSUPP;
5989b1f74a84SNoa Osherovich 			goto out;
5990b1f74a84SNoa Osherovich 		}
5991b1f74a84SNoa Osherovich 	} else {
5992b1f74a84SNoa Osherovich 		MLX5_SET(rqc, rqc, vsd, 1);
5993b1f74a84SNoa Osherovich 	}
59944be6da1eSNoa Osherovich 	if (init_attr->create_flags & IB_WQ_FLAGS_SCATTER_FCS) {
59954be6da1eSNoa Osherovich 		if (!(has_net_offloads && MLX5_CAP_ETH(dev->mdev, scatter_fcs))) {
59964be6da1eSNoa Osherovich 			mlx5_ib_dbg(dev, "Scatter FCS is not supported\n");
59974be6da1eSNoa Osherovich 			err = -EOPNOTSUPP;
59984be6da1eSNoa Osherovich 			goto out;
59994be6da1eSNoa Osherovich 		}
60004be6da1eSNoa Osherovich 		MLX5_SET(rqc, rqc, scatter_fcs, 1);
60014be6da1eSNoa Osherovich 	}
600203404e8aSMaor Gottlieb 	if (init_attr->create_flags & IB_WQ_FLAGS_DELAY_DROP) {
600303404e8aSMaor Gottlieb 		if (!(dev->ib_dev.attrs.raw_packet_caps &
600403404e8aSMaor Gottlieb 		      IB_RAW_PACKET_CAP_DELAY_DROP)) {
600503404e8aSMaor Gottlieb 			mlx5_ib_dbg(dev, "Delay drop is not supported\n");
600603404e8aSMaor Gottlieb 			err = -EOPNOTSUPP;
600703404e8aSMaor Gottlieb 			goto out;
600803404e8aSMaor Gottlieb 		}
600903404e8aSMaor Gottlieb 		MLX5_SET(rqc, rqc, delay_drop_en, 1);
601003404e8aSMaor Gottlieb 	}
601179b20a6cSYishai Hadas 	rq_pas0 = (__be64 *)MLX5_ADDR_OF(wq, wq, pas);
601279b20a6cSYishai Hadas 	mlx5_ib_populate_pas(dev, rwq->umem, rwq->page_shift, rq_pas0, 0);
6013350d0e4cSYishai Hadas 	err = mlx5_core_create_rq_tracked(dev->mdev, in, inlen, &rwq->core_qp);
601403404e8aSMaor Gottlieb 	if (!err && init_attr->create_flags & IB_WQ_FLAGS_DELAY_DROP) {
601503404e8aSMaor Gottlieb 		err = set_delay_drop(dev);
601603404e8aSMaor Gottlieb 		if (err) {
601703404e8aSMaor Gottlieb 			mlx5_ib_warn(dev, "Failed to enable delay drop err=%d\n",
601803404e8aSMaor Gottlieb 				     err);
601903404e8aSMaor Gottlieb 			mlx5_core_destroy_rq_tracked(dev->mdev, &rwq->core_qp);
602003404e8aSMaor Gottlieb 		} else {
602103404e8aSMaor Gottlieb 			rwq->create_flags |= MLX5_IB_WQ_FLAGS_DELAY_DROP;
602203404e8aSMaor Gottlieb 		}
602303404e8aSMaor Gottlieb 	}
6024b1f74a84SNoa Osherovich out:
602579b20a6cSYishai Hadas 	kvfree(in);
602679b20a6cSYishai Hadas 	return err;
602779b20a6cSYishai Hadas }
602879b20a6cSYishai Hadas 
602979b20a6cSYishai Hadas static int set_user_rq_size(struct mlx5_ib_dev *dev,
603079b20a6cSYishai Hadas 			    struct ib_wq_init_attr *wq_init_attr,
603179b20a6cSYishai Hadas 			    struct mlx5_ib_create_wq *ucmd,
603279b20a6cSYishai Hadas 			    struct mlx5_ib_rwq *rwq)
603379b20a6cSYishai Hadas {
603479b20a6cSYishai Hadas 	/* Sanity check RQ size before proceeding */
603579b20a6cSYishai Hadas 	if (wq_init_attr->max_wr > (1 << MLX5_CAP_GEN(dev->mdev, log_max_wq_sz)))
603679b20a6cSYishai Hadas 		return -EINVAL;
603779b20a6cSYishai Hadas 
603879b20a6cSYishai Hadas 	if (!ucmd->rq_wqe_count)
603979b20a6cSYishai Hadas 		return -EINVAL;
604079b20a6cSYishai Hadas 
604179b20a6cSYishai Hadas 	rwq->wqe_count = ucmd->rq_wqe_count;
604279b20a6cSYishai Hadas 	rwq->wqe_shift = ucmd->rq_wqe_shift;
60430dfe4522SLeon Romanovsky 	if (check_shl_overflow(rwq->wqe_count, rwq->wqe_shift, &rwq->buf_size))
60440dfe4522SLeon Romanovsky 		return -EINVAL;
60450dfe4522SLeon Romanovsky 
604679b20a6cSYishai Hadas 	rwq->log_rq_stride = rwq->wqe_shift;
604779b20a6cSYishai Hadas 	rwq->log_rq_size = ilog2(rwq->wqe_count);
604879b20a6cSYishai Hadas 	return 0;
604979b20a6cSYishai Hadas }
605079b20a6cSYishai Hadas 
6051c16339b6SMark Zhang static bool log_of_strides_valid(struct mlx5_ib_dev *dev, u32 log_num_strides)
6052c16339b6SMark Zhang {
6053c16339b6SMark Zhang 	if ((log_num_strides > MLX5_MAX_SINGLE_WQE_LOG_NUM_STRIDES) ||
6054c16339b6SMark Zhang 	    (log_num_strides < MLX5_EXT_MIN_SINGLE_WQE_LOG_NUM_STRIDES))
6055c16339b6SMark Zhang 		return false;
6056c16339b6SMark Zhang 
6057c16339b6SMark Zhang 	if (!MLX5_CAP_GEN(dev->mdev, ext_stride_num_range) &&
6058c16339b6SMark Zhang 	    (log_num_strides < MLX5_MIN_SINGLE_WQE_LOG_NUM_STRIDES))
6059c16339b6SMark Zhang 		return false;
6060c16339b6SMark Zhang 
6061c16339b6SMark Zhang 	return true;
6062c16339b6SMark Zhang }
6063c16339b6SMark Zhang 
606479b20a6cSYishai Hadas static int prepare_user_rq(struct ib_pd *pd,
606579b20a6cSYishai Hadas 			   struct ib_wq_init_attr *init_attr,
606679b20a6cSYishai Hadas 			   struct ib_udata *udata,
606779b20a6cSYishai Hadas 			   struct mlx5_ib_rwq *rwq)
606879b20a6cSYishai Hadas {
606979b20a6cSYishai Hadas 	struct mlx5_ib_dev *dev = to_mdev(pd->device);
607079b20a6cSYishai Hadas 	struct mlx5_ib_create_wq ucmd = {};
607179b20a6cSYishai Hadas 	int err;
607279b20a6cSYishai Hadas 	size_t required_cmd_sz;
607379b20a6cSYishai Hadas 
6074ccc87087SNoa Osherovich 	required_cmd_sz = offsetof(typeof(ucmd), single_stride_log_num_of_bytes)
6075ccc87087SNoa Osherovich 		+ sizeof(ucmd.single_stride_log_num_of_bytes);
607679b20a6cSYishai Hadas 	if (udata->inlen < required_cmd_sz) {
607779b20a6cSYishai Hadas 		mlx5_ib_dbg(dev, "invalid inlen\n");
607879b20a6cSYishai Hadas 		return -EINVAL;
607979b20a6cSYishai Hadas 	}
608079b20a6cSYishai Hadas 
608179b20a6cSYishai Hadas 	if (udata->inlen > sizeof(ucmd) &&
608279b20a6cSYishai Hadas 	    !ib_is_udata_cleared(udata, sizeof(ucmd),
608379b20a6cSYishai Hadas 				 udata->inlen - sizeof(ucmd))) {
608479b20a6cSYishai Hadas 		mlx5_ib_dbg(dev, "inlen is not supported\n");
608579b20a6cSYishai Hadas 		return -EOPNOTSUPP;
608679b20a6cSYishai Hadas 	}
608779b20a6cSYishai Hadas 
608879b20a6cSYishai Hadas 	if (ib_copy_from_udata(&ucmd, udata, min(sizeof(ucmd), udata->inlen))) {
608979b20a6cSYishai Hadas 		mlx5_ib_dbg(dev, "copy failed\n");
609079b20a6cSYishai Hadas 		return -EFAULT;
609179b20a6cSYishai Hadas 	}
609279b20a6cSYishai Hadas 
6093ccc87087SNoa Osherovich 	if (ucmd.comp_mask & (~MLX5_IB_CREATE_WQ_STRIDING_RQ)) {
609479b20a6cSYishai Hadas 		mlx5_ib_dbg(dev, "invalid comp mask\n");
609579b20a6cSYishai Hadas 		return -EOPNOTSUPP;
6096ccc87087SNoa Osherovich 	} else if (ucmd.comp_mask & MLX5_IB_CREATE_WQ_STRIDING_RQ) {
6097ccc87087SNoa Osherovich 		if (!MLX5_CAP_GEN(dev->mdev, striding_rq)) {
6098ccc87087SNoa Osherovich 			mlx5_ib_dbg(dev, "Striding RQ is not supported\n");
609979b20a6cSYishai Hadas 			return -EOPNOTSUPP;
610079b20a6cSYishai Hadas 		}
6101ccc87087SNoa Osherovich 		if ((ucmd.single_stride_log_num_of_bytes <
6102ccc87087SNoa Osherovich 		    MLX5_MIN_SINGLE_STRIDE_LOG_NUM_BYTES) ||
6103ccc87087SNoa Osherovich 		    (ucmd.single_stride_log_num_of_bytes >
6104ccc87087SNoa Osherovich 		     MLX5_MAX_SINGLE_STRIDE_LOG_NUM_BYTES)) {
6105ccc87087SNoa Osherovich 			mlx5_ib_dbg(dev, "Invalid log stride size (%u. Range is %u - %u)\n",
6106ccc87087SNoa Osherovich 				    ucmd.single_stride_log_num_of_bytes,
6107ccc87087SNoa Osherovich 				    MLX5_MIN_SINGLE_STRIDE_LOG_NUM_BYTES,
6108ccc87087SNoa Osherovich 				    MLX5_MAX_SINGLE_STRIDE_LOG_NUM_BYTES);
6109ccc87087SNoa Osherovich 			return -EINVAL;
6110ccc87087SNoa Osherovich 		}
6111c16339b6SMark Zhang 		if (!log_of_strides_valid(dev,
6112c16339b6SMark Zhang 					  ucmd.single_wqe_log_num_of_strides)) {
6113c16339b6SMark Zhang 			mlx5_ib_dbg(
6114c16339b6SMark Zhang 				dev,
6115c16339b6SMark Zhang 				"Invalid log num strides (%u. Range is %u - %u)\n",
6116ccc87087SNoa Osherovich 				ucmd.single_wqe_log_num_of_strides,
6117c16339b6SMark Zhang 				MLX5_CAP_GEN(dev->mdev, ext_stride_num_range) ?
6118c16339b6SMark Zhang 					MLX5_EXT_MIN_SINGLE_WQE_LOG_NUM_STRIDES :
6119ccc87087SNoa Osherovich 					MLX5_MIN_SINGLE_WQE_LOG_NUM_STRIDES,
6120ccc87087SNoa Osherovich 				MLX5_MAX_SINGLE_WQE_LOG_NUM_STRIDES);
6121ccc87087SNoa Osherovich 			return -EINVAL;
6122ccc87087SNoa Osherovich 		}
6123ccc87087SNoa Osherovich 		rwq->single_stride_log_num_of_bytes =
6124ccc87087SNoa Osherovich 			ucmd.single_stride_log_num_of_bytes;
6125ccc87087SNoa Osherovich 		rwq->log_num_strides = ucmd.single_wqe_log_num_of_strides;
6126ccc87087SNoa Osherovich 		rwq->two_byte_shift_en = !!ucmd.two_byte_shift_en;
6127ccc87087SNoa Osherovich 		rwq->create_flags |= MLX5_IB_WQ_FLAGS_STRIDING_RQ;
6128ccc87087SNoa Osherovich 	}
612979b20a6cSYishai Hadas 
613079b20a6cSYishai Hadas 	err = set_user_rq_size(dev, init_attr, &ucmd, rwq);
613179b20a6cSYishai Hadas 	if (err) {
613279b20a6cSYishai Hadas 		mlx5_ib_dbg(dev, "err %d\n", err);
613379b20a6cSYishai Hadas 		return err;
613479b20a6cSYishai Hadas 	}
613579b20a6cSYishai Hadas 
6136b0ea0fa5SJason Gunthorpe 	err = create_user_rq(dev, pd, udata, rwq, &ucmd);
613779b20a6cSYishai Hadas 	if (err) {
613879b20a6cSYishai Hadas 		mlx5_ib_dbg(dev, "err %d\n", err);
613979b20a6cSYishai Hadas 		return err;
614079b20a6cSYishai Hadas 	}
614179b20a6cSYishai Hadas 
614279b20a6cSYishai Hadas 	rwq->user_index = ucmd.user_index;
614379b20a6cSYishai Hadas 	return 0;
614479b20a6cSYishai Hadas }
614579b20a6cSYishai Hadas 
614679b20a6cSYishai Hadas struct ib_wq *mlx5_ib_create_wq(struct ib_pd *pd,
614779b20a6cSYishai Hadas 				struct ib_wq_init_attr *init_attr,
614879b20a6cSYishai Hadas 				struct ib_udata *udata)
614979b20a6cSYishai Hadas {
615079b20a6cSYishai Hadas 	struct mlx5_ib_dev *dev;
615179b20a6cSYishai Hadas 	struct mlx5_ib_rwq *rwq;
615279b20a6cSYishai Hadas 	struct mlx5_ib_create_wq_resp resp = {};
615379b20a6cSYishai Hadas 	size_t min_resp_len;
615479b20a6cSYishai Hadas 	int err;
615579b20a6cSYishai Hadas 
615679b20a6cSYishai Hadas 	if (!udata)
615779b20a6cSYishai Hadas 		return ERR_PTR(-ENOSYS);
615879b20a6cSYishai Hadas 
615979b20a6cSYishai Hadas 	min_resp_len = offsetof(typeof(resp), reserved) + sizeof(resp.reserved);
616079b20a6cSYishai Hadas 	if (udata->outlen && udata->outlen < min_resp_len)
616179b20a6cSYishai Hadas 		return ERR_PTR(-EINVAL);
616279b20a6cSYishai Hadas 
616379b20a6cSYishai Hadas 	dev = to_mdev(pd->device);
616479b20a6cSYishai Hadas 	switch (init_attr->wq_type) {
616579b20a6cSYishai Hadas 	case IB_WQT_RQ:
616679b20a6cSYishai Hadas 		rwq = kzalloc(sizeof(*rwq), GFP_KERNEL);
616779b20a6cSYishai Hadas 		if (!rwq)
616879b20a6cSYishai Hadas 			return ERR_PTR(-ENOMEM);
616979b20a6cSYishai Hadas 		err = prepare_user_rq(pd, init_attr, udata, rwq);
617079b20a6cSYishai Hadas 		if (err)
617179b20a6cSYishai Hadas 			goto err;
617279b20a6cSYishai Hadas 		err = create_rq(rwq, pd, init_attr);
617379b20a6cSYishai Hadas 		if (err)
617479b20a6cSYishai Hadas 			goto err_user_rq;
617579b20a6cSYishai Hadas 		break;
617679b20a6cSYishai Hadas 	default:
617779b20a6cSYishai Hadas 		mlx5_ib_dbg(dev, "unsupported wq type %d\n",
617879b20a6cSYishai Hadas 			    init_attr->wq_type);
617979b20a6cSYishai Hadas 		return ERR_PTR(-EINVAL);
618079b20a6cSYishai Hadas 	}
618179b20a6cSYishai Hadas 
6182350d0e4cSYishai Hadas 	rwq->ibwq.wq_num = rwq->core_qp.qpn;
618379b20a6cSYishai Hadas 	rwq->ibwq.state = IB_WQS_RESET;
618479b20a6cSYishai Hadas 	if (udata->outlen) {
618579b20a6cSYishai Hadas 		resp.response_length = offsetof(typeof(resp), response_length) +
618679b20a6cSYishai Hadas 				sizeof(resp.response_length);
618779b20a6cSYishai Hadas 		err = ib_copy_to_udata(udata, &resp, resp.response_length);
618879b20a6cSYishai Hadas 		if (err)
618979b20a6cSYishai Hadas 			goto err_copy;
619079b20a6cSYishai Hadas 	}
619179b20a6cSYishai Hadas 
6192350d0e4cSYishai Hadas 	rwq->core_qp.event = mlx5_ib_wq_event;
6193350d0e4cSYishai Hadas 	rwq->ibwq.event_handler = init_attr->event_handler;
619479b20a6cSYishai Hadas 	return &rwq->ibwq;
619579b20a6cSYishai Hadas 
619679b20a6cSYishai Hadas err_copy:
6197350d0e4cSYishai Hadas 	mlx5_core_destroy_rq_tracked(dev->mdev, &rwq->core_qp);
619879b20a6cSYishai Hadas err_user_rq:
6199bdeacabdSShamir Rabinovitch 	destroy_user_rq(dev, pd, rwq, udata);
620079b20a6cSYishai Hadas err:
620179b20a6cSYishai Hadas 	kfree(rwq);
620279b20a6cSYishai Hadas 	return ERR_PTR(err);
620379b20a6cSYishai Hadas }
620479b20a6cSYishai Hadas 
6205a49b1dc7SLeon Romanovsky void mlx5_ib_destroy_wq(struct ib_wq *wq, struct ib_udata *udata)
620679b20a6cSYishai Hadas {
620779b20a6cSYishai Hadas 	struct mlx5_ib_dev *dev = to_mdev(wq->device);
620879b20a6cSYishai Hadas 	struct mlx5_ib_rwq *rwq = to_mrwq(wq);
620979b20a6cSYishai Hadas 
6210350d0e4cSYishai Hadas 	mlx5_core_destroy_rq_tracked(dev->mdev, &rwq->core_qp);
6211bdeacabdSShamir Rabinovitch 	destroy_user_rq(dev, wq->pd, rwq, udata);
621279b20a6cSYishai Hadas 	kfree(rwq);
621379b20a6cSYishai Hadas }
621479b20a6cSYishai Hadas 
6215c5f90929SYishai Hadas struct ib_rwq_ind_table *mlx5_ib_create_rwq_ind_table(struct ib_device *device,
6216c5f90929SYishai Hadas 						      struct ib_rwq_ind_table_init_attr *init_attr,
6217c5f90929SYishai Hadas 						      struct ib_udata *udata)
6218c5f90929SYishai Hadas {
6219c5f90929SYishai Hadas 	struct mlx5_ib_dev *dev = to_mdev(device);
6220c5f90929SYishai Hadas 	struct mlx5_ib_rwq_ind_table *rwq_ind_tbl;
6221c5f90929SYishai Hadas 	int sz = 1 << init_attr->log_ind_tbl_size;
6222c5f90929SYishai Hadas 	struct mlx5_ib_create_rwq_ind_tbl_resp resp = {};
6223c5f90929SYishai Hadas 	size_t min_resp_len;
6224c5f90929SYishai Hadas 	int inlen;
6225c5f90929SYishai Hadas 	int err;
6226c5f90929SYishai Hadas 	int i;
6227c5f90929SYishai Hadas 	u32 *in;
6228c5f90929SYishai Hadas 	void *rqtc;
6229c5f90929SYishai Hadas 
6230c5f90929SYishai Hadas 	if (udata->inlen > 0 &&
6231c5f90929SYishai Hadas 	    !ib_is_udata_cleared(udata, 0,
6232c5f90929SYishai Hadas 				 udata->inlen))
6233c5f90929SYishai Hadas 		return ERR_PTR(-EOPNOTSUPP);
6234c5f90929SYishai Hadas 
6235efd7f400SMaor Gottlieb 	if (init_attr->log_ind_tbl_size >
6236efd7f400SMaor Gottlieb 	    MLX5_CAP_GEN(dev->mdev, log_max_rqt_size)) {
6237efd7f400SMaor Gottlieb 		mlx5_ib_dbg(dev, "log_ind_tbl_size = %d is bigger than supported = %d\n",
6238efd7f400SMaor Gottlieb 			    init_attr->log_ind_tbl_size,
6239efd7f400SMaor Gottlieb 			    MLX5_CAP_GEN(dev->mdev, log_max_rqt_size));
6240efd7f400SMaor Gottlieb 		return ERR_PTR(-EINVAL);
6241efd7f400SMaor Gottlieb 	}
6242efd7f400SMaor Gottlieb 
6243c5f90929SYishai Hadas 	min_resp_len = offsetof(typeof(resp), reserved) + sizeof(resp.reserved);
6244c5f90929SYishai Hadas 	if (udata->outlen && udata->outlen < min_resp_len)
6245c5f90929SYishai Hadas 		return ERR_PTR(-EINVAL);
6246c5f90929SYishai Hadas 
6247c5f90929SYishai Hadas 	rwq_ind_tbl = kzalloc(sizeof(*rwq_ind_tbl), GFP_KERNEL);
6248c5f90929SYishai Hadas 	if (!rwq_ind_tbl)
6249c5f90929SYishai Hadas 		return ERR_PTR(-ENOMEM);
6250c5f90929SYishai Hadas 
6251c5f90929SYishai Hadas 	inlen = MLX5_ST_SZ_BYTES(create_rqt_in) + sizeof(u32) * sz;
62521b9a07eeSLeon Romanovsky 	in = kvzalloc(inlen, GFP_KERNEL);
6253c5f90929SYishai Hadas 	if (!in) {
6254c5f90929SYishai Hadas 		err = -ENOMEM;
6255c5f90929SYishai Hadas 		goto err;
6256c5f90929SYishai Hadas 	}
6257c5f90929SYishai Hadas 
6258c5f90929SYishai Hadas 	rqtc = MLX5_ADDR_OF(create_rqt_in, in, rqt_context);
6259c5f90929SYishai Hadas 
6260c5f90929SYishai Hadas 	MLX5_SET(rqtc, rqtc, rqt_actual_size, sz);
6261c5f90929SYishai Hadas 	MLX5_SET(rqtc, rqtc, rqt_max_size, sz);
6262c5f90929SYishai Hadas 
6263c5f90929SYishai Hadas 	for (i = 0; i < sz; i++)
6264c5f90929SYishai Hadas 		MLX5_SET(rqtc, rqtc, rq_num[i], init_attr->ind_tbl[i]->wq_num);
6265c5f90929SYishai Hadas 
62665deba86eSYishai Hadas 	rwq_ind_tbl->uid = to_mpd(init_attr->ind_tbl[0]->pd)->uid;
62675deba86eSYishai Hadas 	MLX5_SET(create_rqt_in, in, uid, rwq_ind_tbl->uid);
62685deba86eSYishai Hadas 
6269c5f90929SYishai Hadas 	err = mlx5_core_create_rqt(dev->mdev, in, inlen, &rwq_ind_tbl->rqtn);
6270c5f90929SYishai Hadas 	kvfree(in);
6271c5f90929SYishai Hadas 
6272c5f90929SYishai Hadas 	if (err)
6273c5f90929SYishai Hadas 		goto err;
6274c5f90929SYishai Hadas 
6275c5f90929SYishai Hadas 	rwq_ind_tbl->ib_rwq_ind_tbl.ind_tbl_num = rwq_ind_tbl->rqtn;
6276c5f90929SYishai Hadas 	if (udata->outlen) {
6277c5f90929SYishai Hadas 		resp.response_length = offsetof(typeof(resp), response_length) +
6278c5f90929SYishai Hadas 					sizeof(resp.response_length);
6279c5f90929SYishai Hadas 		err = ib_copy_to_udata(udata, &resp, resp.response_length);
6280c5f90929SYishai Hadas 		if (err)
6281c5f90929SYishai Hadas 			goto err_copy;
6282c5f90929SYishai Hadas 	}
6283c5f90929SYishai Hadas 
6284c5f90929SYishai Hadas 	return &rwq_ind_tbl->ib_rwq_ind_tbl;
6285c5f90929SYishai Hadas 
6286c5f90929SYishai Hadas err_copy:
62875deba86eSYishai Hadas 	mlx5_cmd_destroy_rqt(dev->mdev, rwq_ind_tbl->rqtn, rwq_ind_tbl->uid);
6288c5f90929SYishai Hadas err:
6289c5f90929SYishai Hadas 	kfree(rwq_ind_tbl);
6290c5f90929SYishai Hadas 	return ERR_PTR(err);
6291c5f90929SYishai Hadas }
6292c5f90929SYishai Hadas 
6293c5f90929SYishai Hadas int mlx5_ib_destroy_rwq_ind_table(struct ib_rwq_ind_table *ib_rwq_ind_tbl)
6294c5f90929SYishai Hadas {
6295c5f90929SYishai Hadas 	struct mlx5_ib_rwq_ind_table *rwq_ind_tbl = to_mrwq_ind_table(ib_rwq_ind_tbl);
6296c5f90929SYishai Hadas 	struct mlx5_ib_dev *dev = to_mdev(ib_rwq_ind_tbl->device);
6297c5f90929SYishai Hadas 
62985deba86eSYishai Hadas 	mlx5_cmd_destroy_rqt(dev->mdev, rwq_ind_tbl->rqtn, rwq_ind_tbl->uid);
6299c5f90929SYishai Hadas 
6300c5f90929SYishai Hadas 	kfree(rwq_ind_tbl);
6301c5f90929SYishai Hadas 	return 0;
6302c5f90929SYishai Hadas }
6303c5f90929SYishai Hadas 
630479b20a6cSYishai Hadas int mlx5_ib_modify_wq(struct ib_wq *wq, struct ib_wq_attr *wq_attr,
630579b20a6cSYishai Hadas 		      u32 wq_attr_mask, struct ib_udata *udata)
630679b20a6cSYishai Hadas {
630779b20a6cSYishai Hadas 	struct mlx5_ib_dev *dev = to_mdev(wq->device);
630879b20a6cSYishai Hadas 	struct mlx5_ib_rwq *rwq = to_mrwq(wq);
630979b20a6cSYishai Hadas 	struct mlx5_ib_modify_wq ucmd = {};
631079b20a6cSYishai Hadas 	size_t required_cmd_sz;
631179b20a6cSYishai Hadas 	int curr_wq_state;
631279b20a6cSYishai Hadas 	int wq_state;
631379b20a6cSYishai Hadas 	int inlen;
631479b20a6cSYishai Hadas 	int err;
631579b20a6cSYishai Hadas 	void *rqc;
631679b20a6cSYishai Hadas 	void *in;
631779b20a6cSYishai Hadas 
631879b20a6cSYishai Hadas 	required_cmd_sz = offsetof(typeof(ucmd), reserved) + sizeof(ucmd.reserved);
631979b20a6cSYishai Hadas 	if (udata->inlen < required_cmd_sz)
632079b20a6cSYishai Hadas 		return -EINVAL;
632179b20a6cSYishai Hadas 
632279b20a6cSYishai Hadas 	if (udata->inlen > sizeof(ucmd) &&
632379b20a6cSYishai Hadas 	    !ib_is_udata_cleared(udata, sizeof(ucmd),
632479b20a6cSYishai Hadas 				 udata->inlen - sizeof(ucmd)))
632579b20a6cSYishai Hadas 		return -EOPNOTSUPP;
632679b20a6cSYishai Hadas 
632779b20a6cSYishai Hadas 	if (ib_copy_from_udata(&ucmd, udata, min(sizeof(ucmd), udata->inlen)))
632879b20a6cSYishai Hadas 		return -EFAULT;
632979b20a6cSYishai Hadas 
633079b20a6cSYishai Hadas 	if (ucmd.comp_mask || ucmd.reserved)
633179b20a6cSYishai Hadas 		return -EOPNOTSUPP;
633279b20a6cSYishai Hadas 
633379b20a6cSYishai Hadas 	inlen = MLX5_ST_SZ_BYTES(modify_rq_in);
63341b9a07eeSLeon Romanovsky 	in = kvzalloc(inlen, GFP_KERNEL);
633579b20a6cSYishai Hadas 	if (!in)
633679b20a6cSYishai Hadas 		return -ENOMEM;
633779b20a6cSYishai Hadas 
633879b20a6cSYishai Hadas 	rqc = MLX5_ADDR_OF(modify_rq_in, in, ctx);
633979b20a6cSYishai Hadas 
634079b20a6cSYishai Hadas 	curr_wq_state = (wq_attr_mask & IB_WQ_CUR_STATE) ?
634179b20a6cSYishai Hadas 		wq_attr->curr_wq_state : wq->state;
634279b20a6cSYishai Hadas 	wq_state = (wq_attr_mask & IB_WQ_STATE) ?
634379b20a6cSYishai Hadas 		wq_attr->wq_state : curr_wq_state;
634479b20a6cSYishai Hadas 	if (curr_wq_state == IB_WQS_ERR)
634579b20a6cSYishai Hadas 		curr_wq_state = MLX5_RQC_STATE_ERR;
634679b20a6cSYishai Hadas 	if (wq_state == IB_WQS_ERR)
634779b20a6cSYishai Hadas 		wq_state = MLX5_RQC_STATE_ERR;
634879b20a6cSYishai Hadas 	MLX5_SET(modify_rq_in, in, rq_state, curr_wq_state);
634934d57585SYishai Hadas 	MLX5_SET(modify_rq_in, in, uid, to_mpd(wq->pd)->uid);
635079b20a6cSYishai Hadas 	MLX5_SET(rqc, rqc, state, wq_state);
635179b20a6cSYishai Hadas 
6352b1f74a84SNoa Osherovich 	if (wq_attr_mask & IB_WQ_FLAGS) {
6353b1f74a84SNoa Osherovich 		if (wq_attr->flags_mask & IB_WQ_FLAGS_CVLAN_STRIPPING) {
6354b1f74a84SNoa Osherovich 			if (!(MLX5_CAP_GEN(dev->mdev, eth_net_offloads) &&
6355b1f74a84SNoa Osherovich 			      MLX5_CAP_ETH(dev->mdev, vlan_cap))) {
6356b1f74a84SNoa Osherovich 				mlx5_ib_dbg(dev, "VLAN offloads are not "
6357b1f74a84SNoa Osherovich 					    "supported\n");
6358b1f74a84SNoa Osherovich 				err = -EOPNOTSUPP;
6359b1f74a84SNoa Osherovich 				goto out;
6360b1f74a84SNoa Osherovich 			}
6361b1f74a84SNoa Osherovich 			MLX5_SET64(modify_rq_in, in, modify_bitmask,
6362b1f74a84SNoa Osherovich 				   MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_VSD);
6363b1f74a84SNoa Osherovich 			MLX5_SET(rqc, rqc, vsd,
6364b1f74a84SNoa Osherovich 				 (wq_attr->flags & IB_WQ_FLAGS_CVLAN_STRIPPING) ? 0 : 1);
6365b1f74a84SNoa Osherovich 		}
6366b1383aa6SNoa Osherovich 
6367b1383aa6SNoa Osherovich 		if (wq_attr->flags_mask & IB_WQ_FLAGS_PCI_WRITE_END_PADDING) {
6368b1383aa6SNoa Osherovich 			mlx5_ib_dbg(dev, "Modifying scatter end padding is not supported\n");
6369b1383aa6SNoa Osherovich 			err = -EOPNOTSUPP;
6370b1383aa6SNoa Osherovich 			goto out;
6371b1383aa6SNoa Osherovich 		}
6372b1f74a84SNoa Osherovich 	}
6373b1f74a84SNoa Osherovich 
637423a6964eSMajd Dibbiny 	if (curr_wq_state == IB_WQS_RESET && wq_state == IB_WQS_RDY) {
63753e1f000fSParav Pandit 		u16 set_id;
63763e1f000fSParav Pandit 
63773e1f000fSParav Pandit 		set_id = mlx5_ib_get_counters_id(dev, 0);
637823a6964eSMajd Dibbiny 		if (MLX5_CAP_GEN(dev->mdev, modify_rq_counter_set_id)) {
637923a6964eSMajd Dibbiny 			MLX5_SET64(modify_rq_in, in, modify_bitmask,
638023a6964eSMajd Dibbiny 				   MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID);
63813e1f000fSParav Pandit 			MLX5_SET(rqc, rqc, counter_set_id, set_id);
638223a6964eSMajd Dibbiny 		} else
63835a738b5dSJason Gunthorpe 			dev_info_once(
63845a738b5dSJason Gunthorpe 				&dev->ib_dev.dev,
63855a738b5dSJason Gunthorpe 				"Receive WQ counters are not supported on current FW\n");
638623a6964eSMajd Dibbiny 	}
638723a6964eSMajd Dibbiny 
6388350d0e4cSYishai Hadas 	err = mlx5_core_modify_rq(dev->mdev, rwq->core_qp.qpn, in, inlen);
638979b20a6cSYishai Hadas 	if (!err)
639079b20a6cSYishai Hadas 		rwq->ibwq.state = (wq_state == MLX5_RQC_STATE_ERR) ? IB_WQS_ERR : wq_state;
639179b20a6cSYishai Hadas 
6392b1f74a84SNoa Osherovich out:
6393b1f74a84SNoa Osherovich 	kvfree(in);
639479b20a6cSYishai Hadas 	return err;
639579b20a6cSYishai Hadas }
6396d0e84c0aSYishai Hadas 
6397d0e84c0aSYishai Hadas struct mlx5_ib_drain_cqe {
6398d0e84c0aSYishai Hadas 	struct ib_cqe cqe;
6399d0e84c0aSYishai Hadas 	struct completion done;
6400d0e84c0aSYishai Hadas };
6401d0e84c0aSYishai Hadas 
6402d0e84c0aSYishai Hadas static void mlx5_ib_drain_qp_done(struct ib_cq *cq, struct ib_wc *wc)
6403d0e84c0aSYishai Hadas {
6404d0e84c0aSYishai Hadas 	struct mlx5_ib_drain_cqe *cqe = container_of(wc->wr_cqe,
6405d0e84c0aSYishai Hadas 						     struct mlx5_ib_drain_cqe,
6406d0e84c0aSYishai Hadas 						     cqe);
6407d0e84c0aSYishai Hadas 
6408d0e84c0aSYishai Hadas 	complete(&cqe->done);
6409d0e84c0aSYishai Hadas }
6410d0e84c0aSYishai Hadas 
6411d0e84c0aSYishai Hadas /* This function returns only once the drained WR was completed */
6412d0e84c0aSYishai Hadas static void handle_drain_completion(struct ib_cq *cq,
6413d0e84c0aSYishai Hadas 				    struct mlx5_ib_drain_cqe *sdrain,
6414d0e84c0aSYishai Hadas 				    struct mlx5_ib_dev *dev)
6415d0e84c0aSYishai Hadas {
6416d0e84c0aSYishai Hadas 	struct mlx5_core_dev *mdev = dev->mdev;
6417d0e84c0aSYishai Hadas 
6418d0e84c0aSYishai Hadas 	if (cq->poll_ctx == IB_POLL_DIRECT) {
6419d0e84c0aSYishai Hadas 		while (wait_for_completion_timeout(&sdrain->done, HZ / 10) <= 0)
6420d0e84c0aSYishai Hadas 			ib_process_cq_direct(cq, -1);
6421d0e84c0aSYishai Hadas 		return;
6422d0e84c0aSYishai Hadas 	}
6423d0e84c0aSYishai Hadas 
6424d0e84c0aSYishai Hadas 	if (mdev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR) {
6425d0e84c0aSYishai Hadas 		struct mlx5_ib_cq *mcq = to_mcq(cq);
6426d0e84c0aSYishai Hadas 		bool triggered = false;
6427d0e84c0aSYishai Hadas 		unsigned long flags;
6428d0e84c0aSYishai Hadas 
6429d0e84c0aSYishai Hadas 		spin_lock_irqsave(&dev->reset_flow_resource_lock, flags);
6430d0e84c0aSYishai Hadas 		/* Make sure that the CQ handler won't run if wasn't run yet */
6431d0e84c0aSYishai Hadas 		if (!mcq->mcq.reset_notify_added)
6432d0e84c0aSYishai Hadas 			mcq->mcq.reset_notify_added = 1;
6433d0e84c0aSYishai Hadas 		else
6434d0e84c0aSYishai Hadas 			triggered = true;
6435d0e84c0aSYishai Hadas 		spin_unlock_irqrestore(&dev->reset_flow_resource_lock, flags);
6436d0e84c0aSYishai Hadas 
6437d0e84c0aSYishai Hadas 		if (triggered) {
6438d0e84c0aSYishai Hadas 			/* Wait for any scheduled/running task to be ended */
6439d0e84c0aSYishai Hadas 			switch (cq->poll_ctx) {
6440d0e84c0aSYishai Hadas 			case IB_POLL_SOFTIRQ:
6441d0e84c0aSYishai Hadas 				irq_poll_disable(&cq->iop);
6442d0e84c0aSYishai Hadas 				irq_poll_enable(&cq->iop);
6443d0e84c0aSYishai Hadas 				break;
6444d0e84c0aSYishai Hadas 			case IB_POLL_WORKQUEUE:
6445d0e84c0aSYishai Hadas 				cancel_work_sync(&cq->work);
6446d0e84c0aSYishai Hadas 				break;
6447d0e84c0aSYishai Hadas 			default:
6448d0e84c0aSYishai Hadas 				WARN_ON_ONCE(1);
6449d0e84c0aSYishai Hadas 			}
6450d0e84c0aSYishai Hadas 		}
6451d0e84c0aSYishai Hadas 
6452d0e84c0aSYishai Hadas 		/* Run the CQ handler - this makes sure that the drain WR will
6453d0e84c0aSYishai Hadas 		 * be processed if wasn't processed yet.
6454d0e84c0aSYishai Hadas 		 */
64554e0e2ea1SYishai Hadas 		mcq->mcq.comp(&mcq->mcq, NULL);
6456d0e84c0aSYishai Hadas 	}
6457d0e84c0aSYishai Hadas 
6458d0e84c0aSYishai Hadas 	wait_for_completion(&sdrain->done);
6459d0e84c0aSYishai Hadas }
6460d0e84c0aSYishai Hadas 
6461d0e84c0aSYishai Hadas void mlx5_ib_drain_sq(struct ib_qp *qp)
6462d0e84c0aSYishai Hadas {
6463d0e84c0aSYishai Hadas 	struct ib_cq *cq = qp->send_cq;
6464d0e84c0aSYishai Hadas 	struct ib_qp_attr attr = { .qp_state = IB_QPS_ERR };
6465d0e84c0aSYishai Hadas 	struct mlx5_ib_drain_cqe sdrain;
6466d34ac5cdSBart Van Assche 	const struct ib_send_wr *bad_swr;
6467d0e84c0aSYishai Hadas 	struct ib_rdma_wr swr = {
6468d0e84c0aSYishai Hadas 		.wr = {
6469d0e84c0aSYishai Hadas 			.next = NULL,
6470d0e84c0aSYishai Hadas 			{ .wr_cqe	= &sdrain.cqe, },
6471d0e84c0aSYishai Hadas 			.opcode	= IB_WR_RDMA_WRITE,
6472d0e84c0aSYishai Hadas 		},
6473d0e84c0aSYishai Hadas 	};
6474d0e84c0aSYishai Hadas 	int ret;
6475d0e84c0aSYishai Hadas 	struct mlx5_ib_dev *dev = to_mdev(qp->device);
6476d0e84c0aSYishai Hadas 	struct mlx5_core_dev *mdev = dev->mdev;
6477d0e84c0aSYishai Hadas 
6478d0e84c0aSYishai Hadas 	ret = ib_modify_qp(qp, &attr, IB_QP_STATE);
6479d0e84c0aSYishai Hadas 	if (ret && mdev->state != MLX5_DEVICE_STATE_INTERNAL_ERROR) {
6480d0e84c0aSYishai Hadas 		WARN_ONCE(ret, "failed to drain send queue: %d\n", ret);
6481d0e84c0aSYishai Hadas 		return;
6482d0e84c0aSYishai Hadas 	}
6483d0e84c0aSYishai Hadas 
6484d0e84c0aSYishai Hadas 	sdrain.cqe.done = mlx5_ib_drain_qp_done;
6485d0e84c0aSYishai Hadas 	init_completion(&sdrain.done);
6486d0e84c0aSYishai Hadas 
6487d0e84c0aSYishai Hadas 	ret = _mlx5_ib_post_send(qp, &swr.wr, &bad_swr, true);
6488d0e84c0aSYishai Hadas 	if (ret) {
6489d0e84c0aSYishai Hadas 		WARN_ONCE(ret, "failed to drain send queue: %d\n", ret);
6490d0e84c0aSYishai Hadas 		return;
6491d0e84c0aSYishai Hadas 	}
6492d0e84c0aSYishai Hadas 
6493d0e84c0aSYishai Hadas 	handle_drain_completion(cq, &sdrain, dev);
6494d0e84c0aSYishai Hadas }
6495d0e84c0aSYishai Hadas 
6496d0e84c0aSYishai Hadas void mlx5_ib_drain_rq(struct ib_qp *qp)
6497d0e84c0aSYishai Hadas {
6498d0e84c0aSYishai Hadas 	struct ib_cq *cq = qp->recv_cq;
6499d0e84c0aSYishai Hadas 	struct ib_qp_attr attr = { .qp_state = IB_QPS_ERR };
6500d0e84c0aSYishai Hadas 	struct mlx5_ib_drain_cqe rdrain;
6501d34ac5cdSBart Van Assche 	struct ib_recv_wr rwr = {};
6502d34ac5cdSBart Van Assche 	const struct ib_recv_wr *bad_rwr;
6503d0e84c0aSYishai Hadas 	int ret;
6504d0e84c0aSYishai Hadas 	struct mlx5_ib_dev *dev = to_mdev(qp->device);
6505d0e84c0aSYishai Hadas 	struct mlx5_core_dev *mdev = dev->mdev;
6506d0e84c0aSYishai Hadas 
6507d0e84c0aSYishai Hadas 	ret = ib_modify_qp(qp, &attr, IB_QP_STATE);
6508d0e84c0aSYishai Hadas 	if (ret && mdev->state != MLX5_DEVICE_STATE_INTERNAL_ERROR) {
6509d0e84c0aSYishai Hadas 		WARN_ONCE(ret, "failed to drain recv queue: %d\n", ret);
6510d0e84c0aSYishai Hadas 		return;
6511d0e84c0aSYishai Hadas 	}
6512d0e84c0aSYishai Hadas 
6513d0e84c0aSYishai Hadas 	rwr.wr_cqe = &rdrain.cqe;
6514d0e84c0aSYishai Hadas 	rdrain.cqe.done = mlx5_ib_drain_qp_done;
6515d0e84c0aSYishai Hadas 	init_completion(&rdrain.done);
6516d0e84c0aSYishai Hadas 
6517d0e84c0aSYishai Hadas 	ret = _mlx5_ib_post_recv(qp, &rwr, &bad_rwr, true);
6518d0e84c0aSYishai Hadas 	if (ret) {
6519d0e84c0aSYishai Hadas 		WARN_ONCE(ret, "failed to drain recv queue: %d\n", ret);
6520d0e84c0aSYishai Hadas 		return;
6521d0e84c0aSYishai Hadas 	}
6522d0e84c0aSYishai Hadas 
6523d0e84c0aSYishai Hadas 	handle_drain_completion(cq, &rdrain, dev);
6524d0e84c0aSYishai Hadas }
6525d14133ddSMark Zhang 
6526d14133ddSMark Zhang /**
6527d14133ddSMark Zhang  * Bind a qp to a counter. If @counter is NULL then bind the qp to
6528d14133ddSMark Zhang  * the default counter
6529d14133ddSMark Zhang  */
6530d14133ddSMark Zhang int mlx5_ib_qp_set_counter(struct ib_qp *qp, struct rdma_counter *counter)
6531d14133ddSMark Zhang {
6532d14133ddSMark Zhang 	struct mlx5_ib_qp *mqp = to_mqp(qp);
6533d14133ddSMark Zhang 	int err = 0;
6534d14133ddSMark Zhang 
6535d14133ddSMark Zhang 	mutex_lock(&mqp->mutex);
6536d14133ddSMark Zhang 	if (mqp->state == IB_QPS_RESET) {
6537d14133ddSMark Zhang 		qp->counter = counter;
6538d14133ddSMark Zhang 		goto out;
6539d14133ddSMark Zhang 	}
6540d14133ddSMark Zhang 
6541d14133ddSMark Zhang 	if (mqp->state == IB_QPS_RTS) {
6542d14133ddSMark Zhang 		err = __mlx5_ib_qp_set_counter(qp, counter);
6543d14133ddSMark Zhang 		if (!err)
6544d14133ddSMark Zhang 			qp->counter = counter;
6545d14133ddSMark Zhang 
6546d14133ddSMark Zhang 		goto out;
6547d14133ddSMark Zhang 	}
6548d14133ddSMark Zhang 
6549d14133ddSMark Zhang 	mqp->counter_pending = 1;
6550d14133ddSMark Zhang 	qp->counter = counter;
6551d14133ddSMark Zhang 
6552d14133ddSMark Zhang out:
6553d14133ddSMark Zhang 	mutex_unlock(&mqp->mutex);
6554d14133ddSMark Zhang 	return err;
6555d14133ddSMark Zhang }
6556